* [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD.
@ 2011-05-26 3:05 Brad
2011-05-26 11:21 ` malc
0 siblings, 1 reply; 7+ messages in thread
From: Brad @ 2011-05-26 3:05 UTC (permalink / raw)
To: qemu-devel
Add ppc_init_cacheline_sizes() function for OpenBSD to fix compilation
of PowerPC host support for OpenBSD/powerpc based architectures.
Signed-off-by: Brad Smith <brad@comstyle.com>
---
cache-utils.c | 11 +++++++++--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/cache-utils.c b/cache-utils.c
index 2db5af2..c319705 100644
--- a/cache-utils.c
+++ b/cache-utils.c
@@ -55,9 +55,16 @@ static void ppc_init_cacheline_sizes(void)
qemu_cache_conf.icache_bsize = cacheline;
}
}
-#endif
-#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
+#elif defined(__OpenBSD__)
+
+static void ppc_init_cacheline_sizes(void)
+{
+ qemu_cache_conf.dcache_bsize = 32;
+ qemu_cache_conf.icache_bsize = 32;
+}
+
+#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
#include <errno.h>
#include <stdio.h>
#include <stdlib.h>
--
1.7.5
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* Re: [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD.
2011-05-26 3:05 [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD Brad
@ 2011-05-26 11:21 ` malc
2011-05-26 12:58 ` Brad
0 siblings, 1 reply; 7+ messages in thread
From: malc @ 2011-05-26 11:21 UTC (permalink / raw)
To: Brad; +Cc: qemu-devel
On Wed, 25 May 2011, Brad wrote:
> Add ppc_init_cacheline_sizes() function for OpenBSD to fix compilation
> of PowerPC host support for OpenBSD/powerpc based architectures.
>
> Signed-off-by: Brad Smith <brad@comstyle.com>
>
> ---
> cache-utils.c | 11 +++++++++--
> 1 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/cache-utils.c b/cache-utils.c
> index 2db5af2..c319705 100644
> --- a/cache-utils.c
> +++ b/cache-utils.c
> @@ -55,9 +55,16 @@ static void ppc_init_cacheline_sizes(void)
> qemu_cache_conf.icache_bsize = cacheline;
> }
> }
> -#endif
>
> -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
> +#elif defined(__OpenBSD__)
> +
> +static void ppc_init_cacheline_sizes(void)
> +{
> + qemu_cache_conf.dcache_bsize = 32;
> + qemu_cache_conf.icache_bsize = 32;
> +}
> +
> +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
> #include <errno.h>
> #include <stdio.h>
> #include <stdlib.h>
>
This can't be right for most ppc64's.
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD.
2011-05-26 11:21 ` malc
@ 2011-05-26 12:58 ` Brad
2011-05-26 13:15 ` malc
0 siblings, 1 reply; 7+ messages in thread
From: Brad @ 2011-05-26 12:58 UTC (permalink / raw)
To: malc; +Cc: qemu-devel
----- Original message -----
> On Wed, 25 May 2011, Brad wrote:
>
> > Add ppc_init_cacheline_sizes() function for OpenBSD to fix compilation
> > of PowerPC host support for OpenBSD/powerpc based architectures.
> >
> > Signed-off-by: Brad Smith <brad@comstyle.com>
> >
> > ---
> > cache-utils.c | 11 +++++++++--
> > 1 files changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/cache-utils.c b/cache-utils.c
> > index 2db5af2..c319705 100644
> > --- a/cache-utils.c
> > +++ b/cache-utils.c
> > @@ -55,9 +55,16 @@ static void ppc_init_cacheline_sizes(void)
> > qemu_cache_conf.icache_bsize = cacheline;
> > }
> > }
> > -#endif
> >
> > -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
> > +#elif defined(__OpenBSD__)
> > +
> > +static void ppc_init_cacheline_sizes(void)
> > +{
> > + qemu_cache_conf.dcache_bsize = 32;
> > + qemu_cache_conf.icache_bsize = 32;
> > +}
> > +
> > +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
> > #include <errno.h>
> > #include <stdio.h>
> > #include <stdlib.h>
> >
>
> This can't be right for most ppc64's.
Well this is what OpenBSD currently does and runs on G5's in 32-bit mode only.
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* Re: [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD.
2011-05-26 12:58 ` Brad
@ 2011-05-26 13:15 ` malc
2011-05-26 23:32 ` Brad
0 siblings, 1 reply; 7+ messages in thread
From: malc @ 2011-05-26 13:15 UTC (permalink / raw)
To: Brad; +Cc: qemu-devel
[-- Attachment #1: Type: TEXT/PLAIN, Size: 1458 bytes --]
On Thu, 26 May 2011, Brad wrote:
> ----- Original message -----
> > On Wed, 25 May 2011, Brad wrote:
> >
> > > Add ppc_init_cacheline_sizes() function for OpenBSD to fix compilation
> > > of PowerPC host support for OpenBSD/powerpc based architectures.
> > >
> > > Signed-off-by: Brad Smith <brad@comstyle.com>
> > >
> > > ---
> > > cache-utils.c | 11 +++++++++--
> > > 1 files changed, 9 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/cache-utils.c b/cache-utils.c
> > > index 2db5af2..c319705 100644
> > > --- a/cache-utils.c
> > > +++ b/cache-utils.c
> > > @@ -55,9 +55,16 @@ static void ppc_init_cacheline_sizes(void)
> > > qemu_cache_conf.icache_bsize = cacheline;
> > > }
> > > }
> > > -#endif
> > >
> > > -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
> > > +#elif defined(__OpenBSD__)
> > > +
> > > +static void ppc_init_cacheline_sizes(void)
> > > +{
> > > + qemu_cache_conf.dcache_bsize = 32;
> > > + qemu_cache_conf.icache_bsize = 32;
> > > +}
> > > +
> > > +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
> > > #include <errno.h>
> > > #include <stdio.h>
> > > #include <stdlib.h>
> > >
> >
> > This can't be right for most ppc64's.
>
> Well this is what OpenBSD currently does and runs on G5's in 32-bit mode only.
>
Mode of operation does not, to the best of my knowledge, change the
hardware limits, the cache line size will still be 128 on those G5s.
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD.
2011-05-26 13:15 ` malc
@ 2011-05-26 23:32 ` Brad
2011-05-27 0:20 ` malc
0 siblings, 1 reply; 7+ messages in thread
From: Brad @ 2011-05-26 23:32 UTC (permalink / raw)
To: malc; +Cc: qemu-devel
On 26/05/11 9:15 AM, malc wrote:
> On Thu, 26 May 2011, Brad wrote:
>
>> ----- Original message -----
>>> On Wed, 25 May 2011, Brad wrote:
>>>
>>>> Add ppc_init_cacheline_sizes() function for OpenBSD to fix compilation
>>>> of PowerPC host support for OpenBSD/powerpc based architectures.
>>>>
>>>> Signed-off-by: Brad Smith<brad@comstyle.com>
>>>>
>>>> ---
>>>> cache-utils.c | 11 +++++++++--
>>>> 1 files changed, 9 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/cache-utils.c b/cache-utils.c
>>>> index 2db5af2..c319705 100644
>>>> --- a/cache-utils.c
>>>> +++ b/cache-utils.c
>>>> @@ -55,9 +55,16 @@ static void ppc_init_cacheline_sizes(void)
>>>> qemu_cache_conf.icache_bsize = cacheline;
>>>> }
>>>> }
>>>> -#endif
>>>>
>>>> -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
>>>> +#elif defined(__OpenBSD__)
>>>> +
>>>> +static void ppc_init_cacheline_sizes(void)
>>>> +{
>>>> + qemu_cache_conf.dcache_bsize = 32;
>>>> + qemu_cache_conf.icache_bsize = 32;
>>>> +}
>>>> +
>>>> +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
>>>> #include<errno.h>
>>>> #include<stdio.h>
>>>> #include<stdlib.h>
>>>>
>>>
>>> This can't be right for most ppc64's.
>>
>> Well this is what OpenBSD currently does and runs on G5's in 32-bit mode only.
>>
>
> Mode of operation does not, to the best of my knowledge, change the
> hardware limits, the cache line size will still be 128 on those G5s.
Well this is the behavior of our kernel no matter what the CPU type is.
from sys/arch/powerpc/cpu.h..
#define CACHELINE 32 /* Note that this value is
really hardwired */
static __inline void
syncicache(void *from, int len)
{
int l;
char *p = from;
len = len + (((u_int32_t) from) & (CACHELINESIZE - 1));
l = len;
do {
__asm __volatile ("dcbst 0,%0" :: "r"(p));
p += CACHELINESIZE;
} while ((l -= CACHELINESIZE) > 0);
__asm __volatile ("sync");
p = from;
l = len;
do {
__asm __volatile ("icbi 0,%0" :: "r"(p));
p += CACHELINESIZE;
} while ((l -= CACHELINESIZE) > 0);
__asm __volatile ("isync");
}
static __inline void
invdcache(void *from, int len)
{
int l;
char *p = from;
len = len + (((u_int32_t) from) & (CACHELINESIZE - 1));
l = len;
do {
__asm __volatile ("dcbi 0,%0" :: "r"(p));
p += CACHELINESIZE;
} while ((l -= CACHELINESIZE) > 0);
__asm __volatile ("sync");
}
--
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* Re: [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD.
2011-05-26 23:32 ` Brad
@ 2011-05-27 0:20 ` malc
2011-05-29 16:56 ` Brad
0 siblings, 1 reply; 7+ messages in thread
From: malc @ 2011-05-27 0:20 UTC (permalink / raw)
To: Brad; +Cc: qemu-devel
On Thu, 26 May 2011, Brad wrote:
> On 26/05/11 9:15 AM, malc wrote:
> > On Thu, 26 May 2011, Brad wrote:
> >
> > > ----- Original message -----
> > > > On Wed, 25 May 2011, Brad wrote:
> > > >
> > > > > Add ppc_init_cacheline_sizes() function for OpenBSD to fix compilation
> > > > > of PowerPC host support for OpenBSD/powerpc based architectures.
> > > > >
> > > > > Signed-off-by: Brad Smith<brad@comstyle.com>
> > > > >
[..snip..]
>
> Well this is the behavior of our kernel no matter what the CPU type is.
>
> from sys/arch/powerpc/cpu.h..
>
>
> #define CACHELINE 32 /* Note that this value is really
> hardwired */
>
[..snip..]
I sure hope that OpenBSD doesn't use this value for dcbz/a's on ppc's with
less than 32 bytes per cache line and am not sure i want to take this
patch even if the kernel itself does this, not without some nagging printf
in the init cache line function urging OpenBSD kernel developers to fix
things..
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD.
2011-05-27 0:20 ` malc
@ 2011-05-29 16:56 ` Brad
0 siblings, 0 replies; 7+ messages in thread
From: Brad @ 2011-05-29 16:56 UTC (permalink / raw)
To: malc; +Cc: qemu-devel
On 26/05/11 8:20 PM, malc wrote:
> On Thu, 26 May 2011, Brad wrote:
>
>> On 26/05/11 9:15 AM, malc wrote:
>>> On Thu, 26 May 2011, Brad wrote:
>>>
>>>> ----- Original message -----
>>>>> On Wed, 25 May 2011, Brad wrote:
>>>>>
>>>>>> Add ppc_init_cacheline_sizes() function for OpenBSD to fix compilation
>>>>>> of PowerPC host support for OpenBSD/powerpc based architectures.
>>>>>>
>>>>>> Signed-off-by: Brad Smith<brad@comstyle.com>
>>>>>>
>
> [..snip..]
>
>>
>> Well this is the behavior of our kernel no matter what the CPU type is.
>>
>> from sys/arch/powerpc/cpu.h..
>>
>>
>> #define CACHELINE 32 /* Note that this value is really
>> hardwired */
>>
>
> [..snip..]
>
> I sure hope that OpenBSD doesn't use this value for dcbz/a's on ppc's with
> less than 32 bytes per cache line and am not sure i want to take this
> patch even if the kernel itself does this, not without some nagging printf
> in the init cache line function urging OpenBSD kernel developers to fix
> things..
USE_DCBZ is not defined.
/*
* Fill the given physical page with zeros.
*/
void
pmap_zero_page(struct vm_page *pg)
{
paddr_t pa = VM_PAGE_TO_PHYS(pg);
#ifdef USE_DCBZ
int i;
paddr_t addr = zero_page;
#endif
/* simple_lock(&pmap_zero_page_lock); */
pmap_kenter_pa(zero_page, pa, VM_PROT_READ|VM_PROT_WRITE);
#ifdef USE_DCBZ
for (i = PAGE_SIZE/CACHELINESIZE; i>0; i--) {
__asm volatile ("dcbz 0,%0" :: "r"(addr));
addr += CACHELINESIZE;
}
#else
bzero((void *)zero_page, PAGE_SIZE);
#endif
pmap_kremove_pg(zero_page);
/* simple_unlock(&pmap_zero_page_lock); */
}
--
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2011-05-26 3:05 [Qemu-devel] [PATCH 1/3] Add ppc_init_cacheline_sizes() function for OpenBSD Brad
2011-05-26 11:21 ` malc
2011-05-26 12:58 ` Brad
2011-05-26 13:15 ` malc
2011-05-26 23:32 ` Brad
2011-05-27 0:20 ` malc
2011-05-29 16:56 ` Brad
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