* [U-Boot] relocation problem
@ 2011-08-11 10:13 Cajus Hahn
2011-08-11 15:03 ` Reinhard Meyer
0 siblings, 1 reply; 3+ messages in thread
From: Cajus Hahn @ 2011-08-11 10:13 UTC (permalink / raw)
To: u-boot
Dear Marcel, Dear Reinhard,
I have the same problem with my board and the actual u-boot-atmel (git
from 5th Aug. 2011). It even looks like I am using the same board.
It is a in-circuit ICnova SAM9G45 OEM on a ADB1000 with a 5" display.
Actually I use the u-boot from in-circuit, which is a patched version
basing on u-boot from 2009. I would like to upgrade this old version to
the actual u-boot version. Some time ago somebody tried to get the
in-circuit patch into the u-boot mainstream, but the patch was rejected
because of not meeting the coding rules.
Marcel, can you give me a hint what you changed to get your
configuration running ? I used the latest code for the
at91sam9m10g45ek as reference and added/changed it.
Starting the old u-boot version with patches from in-circuit:
-------------------------------------------------------------
Start AT91Bootstrap
U-Boot 2009.11 (Jun 18 2011 - 19:57:09)
DRAM: 128 MB
Flash: 1 MB
NAND: 256 MiB
In: serial
Out: serial
Err: serial
MMC: Atmel MCI: 0
Net: macb0
Hit any key to stop autoboot: 0
ICnova>
Starting u-boot-atmel (git) from 5th Aug. 2011:
------------------------------------------------
Start AT91Bootstrap
U-Boot 2011.06 (Aug 10 2011 - 20:49:32)
U-Boot code: 73F00000 -> 73F45494 BSS: -> 73F87110
CPU: AT91SAM9G45
Crystal frequency: 12 MHz
CPU clock : 400 MHz
Master clock : 133.333 MHz
monitor len: 00087110
ramsize: 08000000
TLB table at: 77ff0000
Top of RAM usable for U-Boot at: 77ff0000
Reserving 540k for U-Boot at: 77f68000
Reserving 384k for malloc() at: 77f08000
Reserving 24 Bytes for Board Info at: 77f07fe8
Reserving 144 Bytes for Global Data at: 77f07f58
New Stack Pointer is: 77f07f48
RAM Configuration:
Bank #0: 70000000 128 MiB
relocation Offset is: 04068000
no more output, it seems the relocation fails.
I have a #DEBUG in lib/board.c to get the above output.
Here is my configuration:
/*
* Configuation settings for the ICNOVA ADB1000 with SAM9G45 OEM and 5" TFT.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/hardware.h>
#define CONFIG_AT91_LEGACY
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
#define CONFIG_SYS_HZ 1000
#define CONFIG_AT91FAMILY
#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO
#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID ATMEL_ID_SYS
/*
* This needs to be defined for the OHCI code to work but it is defined as
* ATMEL_ID_UHPHS in the CPU specific header files.
*/
#define ATMEL_ID_UHP ATMEL_ID_UHPHS
/*
* Specify the clock enable bit in the PMC_SCER register.
*/
#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
/* LCD */
#define CONFIG_LCD
#define LCD_BPP LCD_COLOR8
#define CONFIG_LCD_LOGO
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_LCD
#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
/* board specific(not enough SRAM) */
#define CONFIG_ICNOVA_LCD_BASE 0x73E00000
#define CONFIG_BOOTDELAY 3
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_USB
#define CONFIG_CMD_NAND
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_NAND_ECC_JFFS2
//#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_MMC
#define CONFIG_DOS_PARTITION 1
#undef CONFIG_CMD_FPGA
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x70000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
/* NOR flash */
#define CONFIG_SYS_FLASH_BASE 0x00000000
#define CONFIG_SYS_FLASH_SIZE 0x00100000
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_FLASH_SECT 8
#define CONFIG_SYS_MAX_FLASH_SECT (CONFIG_SYS_FLASH_SECT+1)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
/* NAND flash */
#define CONFIG_JFFS2_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* our CLE is AD22 */
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC8
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC11
#define MTDIDS_DEFAULT "nand0=nand.0"
#define MTDPARTS_DEFAULT "mtdparts=nand.0:2M(kernel),16M(root),-(Data)"
/* MCI */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#define MMCI_BASE 0xFFF80000
/* Ethernet */
#define CONFIG_MACB
#define CONFIG_NET_MULTI
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91SAM9G45_UHP_OHCI_BASE */
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "adb1000"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00400000) /* Allow 4MB for the kernel run-time image */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
/* bootstrap + u-boot + env in norflash */
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE (CONFIG_SYS_FLASH_SIZE / CONFIG_SYS_FLASH_SECT)
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
#define CONFIG_SYS_PROMPT "u-boot> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (256*1024)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000)
#ifdef CONFIG_USE_IRQ
#error CONFIG_USE_IRQ not supported
#endif
#endif
and this is my board file:
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91sam9g45_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
#include <lcd.h>
#include <mmc.h>
#include <atmel_lcdc.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
*/
#ifdef CONFIG_CMD_NAND
void icnova_nand_hw_init(void)
{
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
unsigned long csa;
/* Enable CS3 */
csa = readl(&matrix->ebicsa);
csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
writel(csa, &matrix->ebicsa);
/* Configure SMC CS3 for NAND/SmartMedia */
writel(AT91_SMC_SETUP_NWE(8) | AT91_SMC_SETUP_NCS_WR(0) |
AT91_SMC_SETUP_NRD(8) | AT91_SMC_SETUP_NCS_RD(0),
&smc->cs[3].setup);
writel(AT91_SMC_PULSE_NWE(28) | AT91_SMC_PULSE_NCS_WR(20) |
AT91_SMC_PULSE_NRD(28) | AT91_SMC_PULSE_NCS_RD(20),
&smc->cs[3].pulse);
writel(AT91_SMC_CYCLE_NWE(36) | AT91_SMC_CYCLE_NRD(36),
&smc->cs[3].cycle);
writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
AT91_SMC_MODE_EXNW_DISABLE |
#ifdef CONFIG_SYS_NAND_DBW_16
AT91_SMC_MODE_DBW_16 |
#else /* CONFIG_SYS_NAND_DBW_8 */
AT91_SMC_MODE_DBW_8 |
#endif
AT91_SMC_MODE_TDF_CYCLE(3),
&smc->cs[3].mode);
writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
/* Configure RDY/BSY */
at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
/* Enable NandFlash */
at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
}
#endif
#ifdef CONFIG_CMD_USB
static void icnova_usb_hw_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
at91_set_gpio_output(AT91_PIN_PD1, 0);
at91_set_gpio_output(AT91_PIN_PD3, 0);
}
#endif
#ifdef CONFIG_MACB
static void icnova_macb_hw_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
/*
* Disable pull-up on:
* RXDV (PA15) => PHY normal mode (not Test mode)
* ERX0 (PA12) => PHY ADDR0
* ERX1 (PA13) => PHY ADDR1
* ERX2 (PA8) => PHY ADDR2
* ERX3 (PA9) => PHY ADDR3
* ECRS (PA29) => PHY ADDR4 => PHYADDR = 0x0
* ECOL (PA30) => full MII interface
* ERXER (PA16) => no repeater
* ETXCLK (PA17) => no isolate
*/
unsigned long phy_mask = 0;
/* Reset and pdwn-pins */
unsigned long rst = pin_to_mask(AT91_PIN_PA27);
unsigned long pdwn = 0;
phy_mask = pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA8) | pin_to_mask(AT91_PIN_PA9) |
pin_to_mask(AT91_PIN_PA12) | pin_to_mask(AT91_PIN_PA13) |
pin_to_mask(AT91_PIN_PA29) | pin_to_mask(AT91_PIN_PA30) |
pin_to_mask(AT91_PIN_PA16) | pin_to_mask(AT91_PIN_PA17);
rst = pin_to_mask(AT91_PIN_PA26);
pdwn = pin_to_mask(AT91_PIN_PA25);
/* Enable clock */
writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
/*
* Set up Pins
*/
writel(rst | pdwn | phy_mask,
pin_to_controller(AT91_PIN_PA0) + PIO_PER);
writel(rst | pdwn | phy_mask,
pin_to_controller(AT91_PIN_PA0) + PIO_OER);
writel(rst | pdwn | phy_mask,
pin_to_controller(AT91_PIN_PA0) + PIO_CODR);
udelay(1000);
writel(rst,
pin_to_controller(AT91_PIN_PA0) + PIO_SODR);
udelay(500000);
// phy-mask will be resetted by internal hardware
/* And the pins. */
at91_macb_hw_init();
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
vl_col: 800,
vl_row: 480,
vl_clk: 33260000,
vl_sync: ATMEL_LCDC_INVLINE_NORMAL |
ATMEL_LCDC_INVFRAME_NORMAL,
vl_bpix: 3,
vl_tft: 1,
vl_hsync_len: 40,
vl_left_margin: 176,
vl_right_margin:38,
vl_vsync_len: 2,
vl_upper_margin:35,
vl_lower_margin:8,
mmio : ATMEL_BASE_LCDC,
};
void lcd_enable(void)
{
at91_set_A_periph(AT91_PIN_PE6, 1); /* power up */
}
void lcd_disable(void)
{
at91_set_A_periph(AT91_PIN_PE6, 0); /* power down */
}
static void icnova_lcd_hw_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
at91_set_B_periph(AT91_PIN_PE20, 0); /* LCDD13 */
at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
at91_set_B_periph(AT91_PIN_PE28, 0); /* LCDD21 */
at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
gd->fb_base = CONFIG_ICNOVA_LCD_BASE;
}
#ifdef CONFIG_LCD_INFO
#include <nand.h>
#include <version.h>
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
int i;
char temp[32];
lcd_printf ("%s\n", U_BOOT_VERSION);
lcd_printf ("(C) 2008 ATMEL Corp\n");
lcd_printf ("at91support at atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
ATMEL_CPU_NAME,
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20 );
}
#endif /* CONFIG_LCD_INFO */
#endif
int board_early_init_f(void)
{
at91_seriald_hw_init();
return 0;
}
#ifdef CONFIG_MMC
static void icnova_mmc_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
at91_set_A_periph(AT91_PIN_PA0, 0);
at91_set_A_periph(AT91_PIN_PA1, 1);
at91_set_A_periph(AT91_PIN_PA2, 1);
at91_set_A_periph(AT91_PIN_PA3, 1);
at91_set_A_periph(AT91_PIN_PA4, 1);
at91_set_A_periph(AT91_PIN_PA5, 1);
writel(1 << ATMEL_ID_MCI0, &pmc->pcer);
}
int board_mmc_init(bd_t *bd) {
icnova_mmc_init();
return atmel_mci_init(bd);
}
#endif
int board_init(void)
{
/* Enable Ctrlc */
console_init_f();
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G45EKES;
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_CMD_NAND
icnova_nand_hw_init();
#endif
#ifdef CONFIG_CMD_USB
icnova_usb_hw_init();
#endif
#ifdef CONFIG_MACB
icnova_macb_hw_init();
#endif
#ifdef CONFIG_LCD
icnova_lcd_hw_init();
#endif
return 0;
}
int dram_init(void)
{
gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
CONFIG_SYS_SDRAM_SIZE);
return 0;
}
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
#ifdef CONFIG_MACB
/*
* Initialize ethernet HW addr prior to starting Linux,
* needed for nfsroot
*/
eth_init(gd->bd);
#endif
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
#endif
return rc;
}
Can you see anything that could cause the relocation problem?
I would also like to get rid of the AT91Bootstrap.
Marcel, did you manage to include the NOR boot code into u-boot?
I am using the ELDK-4.2 as toolchain, could this cause the problem?
Cajus
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] relocation problem
2011-08-11 10:13 [U-Boot] relocation problem Cajus Hahn
@ 2011-08-11 15:03 ` Reinhard Meyer
2011-08-14 19:04 ` Cajus Hahn
0 siblings, 1 reply; 3+ messages in thread
From: Reinhard Meyer @ 2011-08-11 15:03 UTC (permalink / raw)
To: u-boot
Dear Cajus Hahn,
> Dear Marcel, Dear Reinhard,
>
> I have the same problem with my board and the actual u-boot-atmel (git
> from 5th Aug. 2011). It even looks like I am using the same board.
> It is a in-circuit ICnova SAM9G45 OEM on a ADB1000 with a 5" display.
>
> Actually I use the u-boot from in-circuit, which is a patched version
> basing on u-boot from 2009. I would like to upgrade this old version to
> the actual u-boot version. Some time ago somebody tried to get the
> in-circuit patch into the u-boot mainstream, but the patch was rejected
> because of not meeting the coding rules.
>
> Marcel, can you give me a hint what you changed to get your
> configuration running ? I used the latest code for the
> at91sam9m10g45ek as reference and added/changed it.
First, let me clear up a thing:
Most ARM boards were "runtime broken" when relocation was introduced.
We additionally broke the AT91 boards by cleaning up the SoC
header and source files. This second brokenness has been removed by
the recent patches for most of the AT91 SoCs. What probably has not
been fixed in all cases is the brokeness due to the relocation.
It might well be, that boards build clean, but might not run beyond
relocation. You probably have such an issue.
Please refer to the "doc/README.ARM-relocation".
Make sure TEXT_BASE is exactly the address where at91bootstrap loads
u-boot. Make sure that at91bootstrap loads the full u-boot image (u-boot
became larger quite a bit due to relocation and other changes).
Make sure that area is not overlapping the final location of the
relocated u-boot (top of RAM). The default at91bootstraps tend to load
the image already quite high into RAM, if relocation overlaps this,
you are doomed.
>
> Starting the old u-boot version with patches from in-circuit:
> -------------------------------------------------------------
>
> Start AT91Bootstrap
>
> U-Boot 2009.11 (Jun 18 2011 - 19:57:09)
>
> DRAM: 128 MB
> Flash: 1 MB
> NAND: 256 MiB
> In: serial
> Out: serial
> Err: serial
> MMC: Atmel MCI: 0
> Net: macb0
> Hit any key to stop autoboot: 0
> ICnova>
>
>
> Starting u-boot-atmel (git) from 5th Aug. 2011:
> ------------------------------------------------
>
> Start AT91Bootstrap
>
> U-Boot 2011.06 (Aug 10 2011 - 20:49:32)
>
> U-Boot code: 73F00000 -> 73F45494 BSS: -> 73F87110
I do not see any TEXT_BASE definition in the files below.
Have you merged current u-boot with some old patches?
> CPU: AT91SAM9G45
> Crystal frequency: 12 MHz
> CPU clock : 400 MHz
> Master clock : 133.333 MHz
> monitor len: 00087110
> ramsize: 08000000
> TLB table at: 77ff0000
> Top of RAM usable for U-Boot at: 77ff0000
> Reserving 540k for U-Boot at: 77f68000
> Reserving 384k for malloc() at: 77f08000
> Reserving 24 Bytes for Board Info at: 77f07fe8
> Reserving 144 Bytes for Global Data at: 77f07f58
> New Stack Pointer is: 77f07f48
> RAM Configuration:
> Bank #0: 70000000 128 MiB
> relocation Offset is: 04068000
>
> no more output, it seems the relocation fails.
> I have a #DEBUG in lib/board.c to get the above output.
>
> Here is my configuration:
>
> /*
> * Configuation settings for the ICNOVA ADB1000 with SAM9G45 OEM and 5" TFT.
> *
> * See file CREDITS for list of people who contributed to this
> * project.
> *
> * This program is free software; you can redistribute it and/or
> * modify it under the terms of the GNU General Public License as
> * published by the Free Software Foundation; either version 2 of
> * the License, or (at your option) any later version.
> *
> * This program is distributed in the hope that it will be useful,
> * but WITHOUT ANY WARRANTY; without even the implied warranty of
> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> * GNU General Public License for more details.
> *
> * You should have received a copy of the GNU General Public License
> * along with this program; if not, write to the Free Software
> * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> * MA 02111-1307 USA
> */
>
> #ifndef __CONFIG_H
> #define __CONFIG_H
>
> #include <asm/hardware.h>
Where is the definition that an AT91SAM9G45 is used?
It MUST BE defined before hardware.h is included.
>
> #define CONFIG_AT91_LEGACY
> #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
>
> /* ARM asynchronous clock */
> #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
> #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
> #define CONFIG_SYS_HZ 1000
>
> #define CONFIG_AT91FAMILY
> #define CONFIG_ARCH_CPU_INIT
> #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
>
> #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> #define CONFIG_SETUP_MEMORY_TAGS
> #define CONFIG_INITRD_TAG
> #define CONFIG_SKIP_LOWLEVEL_INIT
> #define CONFIG_BOARD_EARLY_INIT_F
> #define CONFIG_DISPLAY_CPUINFO
>
> /* general purpose I/O */
> #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
> #define CONFIG_AT91_GPIO
> #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
>
> /* serial console */
> #define CONFIG_ATMEL_USART
> #define CONFIG_USART_BASE ATMEL_BASE_DBGU
> #define CONFIG_USART_ID ATMEL_ID_SYS
>
> /*
> * This needs to be defined for the OHCI code to work but it is defined as
> * ATMEL_ID_UHPHS in the CPU specific header files.
> */
> #define ATMEL_ID_UHP ATMEL_ID_UHPHS
How does this compile? It is already defined in at91sam9g45.h
>
> /*
> * Specify the clock enable bit in the PMC_SCER register.
> */
> #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
Same here.
>
> /* LCD */
> #define CONFIG_LCD
> #define LCD_BPP LCD_COLOR8
> #define CONFIG_LCD_LOGO
> #undef LCD_TEST_PATTERN
> #define CONFIG_LCD_INFO
> #define CONFIG_LCD_INFO_BELOW_LOGO
> #define CONFIG_SYS_WHITE_ON_BLACK
> #define CONFIG_ATMEL_LCD
> #define CONFIG_ATMEL_LCD_RGB565
> #define CONFIG_SYS_CONSOLE_IS_IN_ENV
> /* board specific(not enough SRAM) */
> #define CONFIG_ICNOVA_LCD_BASE 0x73E00000
>
> #define CONFIG_BOOTDELAY 3
>
> /*
> * Command line configuration.
> */
> #include <config_cmd_default.h>
> #define CONFIG_CMD_ASKENV
> #define CONFIG_CMD_DHCP
> #define CONFIG_CMD_USB
> #define CONFIG_CMD_NAND
> #define CONFIG_CMD_MTDPARTS
> #define CONFIG_MTD_DEVICE
> #define CONFIG_MTD_PARTITIONS
> #define CONFIG_MTD_NAND_ECC_JFFS2
> //#define CONFIG_CMD_UBIFS
> #define CONFIG_CMD_PING
> #define CONFIG_CMD_JFFS2
> #define CONFIG_CMD_FLASH
> #define CONFIG_CMD_EXT2
> #define CONFIG_CMD_FAT
> #define CONFIG_CMD_MMC
> #define CONFIG_DOS_PARTITION 1
> #undef CONFIG_CMD_FPGA
>
> /* SDRAM */
> #define CONFIG_NR_DRAM_BANKS 1
> #define CONFIG_SYS_SDRAM_BASE 0x70000000
> #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
>
> /* NOR flash */
> #define CONFIG_SYS_FLASH_BASE 0x00000000
> #define CONFIG_SYS_FLASH_SIZE 0x00100000
> #define CONFIG_SYS_MAX_FLASH_BANKS 1
> #define CONFIG_SYS_FLASH_SECT 8
> #define CONFIG_SYS_MAX_FLASH_SECT (CONFIG_SYS_FLASH_SECT+1)
> #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
> #define CONFIG_SYS_FLASH_CFI 1
> #define CONFIG_FLASH_CFI_DRIVER 1
> #define CONFIG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
>
> /* NAND flash */
> #define CONFIG_JFFS2_NAND
> #define CONFIG_SYS_MAX_NAND_DEVICE 1
> #define CONFIG_SYS_NAND_MAX_CHIPS 1
> #define CONFIG_NAND_ATMEL
> #define CONFIG_SYS_NAND_BASE 0x40000000
> #define CONFIG_SYS_NAND_DBW_8
> #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our ALE is AD21 */
> #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* our CLE is AD22 */
> #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC8
> #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC11
>
> #define MTDIDS_DEFAULT "nand0=nand.0"
> #define MTDPARTS_DEFAULT "mtdparts=nand.0:2M(kernel),16M(root),-(Data)"
>
> /* MCI */
> #define CONFIG_MMC
> #define CONFIG_GENERIC_MMC
> #define CONFIG_GENERIC_ATMEL_MCI
> #define MMCI_BASE 0xFFF80000
>
> /* Ethernet */
> #define CONFIG_MACB
> #define CONFIG_NET_MULTI
>
> /* USB */
> #define CONFIG_USB_ATMEL
> #define CONFIG_USB_OHCI_NEW
> #define CONFIG_SYS_USB_OHCI_CPU_INIT
> #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91SAM9G45_UHP_OHCI_BASE */
> #define CONFIG_SYS_USB_OHCI_SLOT_NAME "adb1000"
> #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
> #define CONFIG_USB_STORAGE
>
> #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00400000) /* Allow 4MB for the kernel run-time image */
>
> #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
> #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
Testing ALL the memory, including where u-boot and stacks reside?
>
> /* bootstrap + u-boot + env in norflash */
> #define CONFIG_ENV_IS_IN_FLASH
> #define CONFIG_ENV_SIZE (CONFIG_SYS_FLASH_SIZE / CONFIG_SYS_FLASH_SECT)
> #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
>
> #define CONFIG_BAUDRATE 115200
> #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
>
> #define CONFIG_SYS_PROMPT "u-boot> "
> #define CONFIG_SYS_CBSIZE 256
> #define CONFIG_SYS_MAXARGS 16
> #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> #define CONFIG_SYS_LONGHELP
> #define CONFIG_CMDLINE_EDITING
> #define CONFIG_AUTO_COMPLETE
> #define CONFIG_SYS_HUSH_PARSER
> #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
>
> /*
> * Size of malloc() pool
> */
> #define CONFIG_SYS_MALLOC_LEN (256*1024)
>
> #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000)
This misses subtraction of generated GD size.
>
> #ifdef CONFIG_USE_IRQ
> #error CONFIG_USE_IRQ not supported
> #endif
>
> #endif
>
>
> and this is my board file:
>
> /*
> * (C) Copyright 2007-2008
> * Stelian Pop <stelian.pop@leadtechdesign.com>
> * Lead Tech Design <www.leadtechdesign.com>
> *
> * See file CREDITS for list of people who contributed to this
> * project.
> *
> * This program is free software; you can redistribute it and/or
> * modify it under the terms of the GNU General Public License as
> * published by the Free Software Foundation; either version 2 of
> * the License, or (at your option) any later version.
> *
> * This program is distributed in the hope that it will be useful,
> * but WITHOUT ANY WARRANTY; without even the implied warranty of
> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> * GNU General Public License for more details.
> *
> * You should have received a copy of the GNU General Public License
> * along with this program; if not, write to the Free Software
> * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> * MA 02111-1307 USA
> */
>
> #include <common.h>
> #include <asm/io.h>
> #include <asm/arch/at91sam9g45_matrix.h>
> #include <asm/arch/at91sam9_smc.h>
> #include <asm/arch/at91_common.h>
> #include <asm/arch/at91_pmc.h>
> #include <asm/arch/at91_rstc.h>
> #include <asm/arch/gpio.h>
> #include <asm/arch/clk.h>
> #include <lcd.h>
> #include <mmc.h>
> #include <atmel_lcdc.h>
> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
> #include <net.h>
> #endif
> #include <netdev.h>
>
> DECLARE_GLOBAL_DATA_PTR;
>
> /* ------------------------------------------------------------------------- */
> /*
> * Miscelaneous platform dependent initialisations
> */
>
> #ifdef CONFIG_CMD_NAND
> void icnova_nand_hw_init(void)
> {
> struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
> struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
> struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> unsigned long csa;
>
> /* Enable CS3 */
> csa = readl(&matrix->ebicsa);
> csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
> writel(csa, &matrix->ebicsa);
>
> /* Configure SMC CS3 for NAND/SmartMedia */
> writel(AT91_SMC_SETUP_NWE(8) | AT91_SMC_SETUP_NCS_WR(0) |
> AT91_SMC_SETUP_NRD(8) | AT91_SMC_SETUP_NCS_RD(0),
> &smc->cs[3].setup);
> writel(AT91_SMC_PULSE_NWE(28) | AT91_SMC_PULSE_NCS_WR(20) |
> AT91_SMC_PULSE_NRD(28) | AT91_SMC_PULSE_NCS_RD(20),
> &smc->cs[3].pulse);
> writel(AT91_SMC_CYCLE_NWE(36) | AT91_SMC_CYCLE_NRD(36),
> &smc->cs[3].cycle);
> writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
> AT91_SMC_MODE_EXNW_DISABLE |
> #ifdef CONFIG_SYS_NAND_DBW_16
> AT91_SMC_MODE_DBW_16 |
> #else /* CONFIG_SYS_NAND_DBW_8 */
> AT91_SMC_MODE_DBW_8 |
> #endif
> AT91_SMC_MODE_TDF_CYCLE(3),
> &smc->cs[3].mode);
>
> writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
>
> /* Configure RDY/BSY */
> at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
>
> /* Enable NandFlash */
> at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
> }
> #endif
>
> #ifdef CONFIG_CMD_USB
> static void icnova_usb_hw_init(void)
> {
> struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>
> writel(1 << ATMEL_ID_PIODE, &pmc->pcer);
>
> at91_set_gpio_output(AT91_PIN_PD1, 0);
> at91_set_gpio_output(AT91_PIN_PD3, 0);
> }
> #endif
>
> #ifdef CONFIG_MACB
> static void icnova_macb_hw_init(void)
> {
> struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>
> /*
> * Disable pull-up on:
> * RXDV (PA15) => PHY normal mode (not Test mode)
> * ERX0 (PA12) => PHY ADDR0
> * ERX1 (PA13) => PHY ADDR1
> * ERX2 (PA8) => PHY ADDR2
> * ERX3 (PA9) => PHY ADDR3
> * ECRS (PA29) => PHY ADDR4 => PHYADDR = 0x0
> * ECOL (PA30) => full MII interface
> * ERXER (PA16) => no repeater
> * ETXCLK (PA17) => no isolate
> */
> unsigned long phy_mask = 0;
> /* Reset and pdwn-pins */
> unsigned long rst = pin_to_mask(AT91_PIN_PA27);
> unsigned long pdwn = 0;
>
> phy_mask = pin_to_mask(AT91_PIN_PA15) |
> pin_to_mask(AT91_PIN_PA8) | pin_to_mask(AT91_PIN_PA9) |
> pin_to_mask(AT91_PIN_PA12) | pin_to_mask(AT91_PIN_PA13) |
> pin_to_mask(AT91_PIN_PA29) | pin_to_mask(AT91_PIN_PA30) |
> pin_to_mask(AT91_PIN_PA16) | pin_to_mask(AT91_PIN_PA17);
> rst = pin_to_mask(AT91_PIN_PA26);
> pdwn = pin_to_mask(AT91_PIN_PA25);
>
> /* Enable clock */
> writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
>
> /*
> * Set up Pins
> */
> writel(rst | pdwn | phy_mask,
> pin_to_controller(AT91_PIN_PA0) + PIO_PER);
> writel(rst | pdwn | phy_mask,
> pin_to_controller(AT91_PIN_PA0) + PIO_OER);
> writel(rst | pdwn | phy_mask,
> pin_to_controller(AT91_PIN_PA0) + PIO_CODR);
> udelay(1000);
> writel(rst,
> pin_to_controller(AT91_PIN_PA0) + PIO_SODR);
> udelay(500000);
> // phy-mask will be resetted by internal hardware
>
> /* And the pins. */
> at91_macb_hw_init();
> }
> #endif
>
> #ifdef CONFIG_LCD
>
> vidinfo_t panel_info = {
> vl_col: 800,
> vl_row: 480,
> vl_clk: 33260000,
> vl_sync: ATMEL_LCDC_INVLINE_NORMAL |
> ATMEL_LCDC_INVFRAME_NORMAL,
> vl_bpix: 3,
> vl_tft: 1,
> vl_hsync_len: 40,
> vl_left_margin: 176,
> vl_right_margin:38,
> vl_vsync_len: 2,
> vl_upper_margin:35,
> vl_lower_margin:8,
> mmio : ATMEL_BASE_LCDC,
> };
>
>
> void lcd_enable(void)
> {
> at91_set_A_periph(AT91_PIN_PE6, 1); /* power up */
> }
>
> void lcd_disable(void)
> {
> at91_set_A_periph(AT91_PIN_PE6, 0); /* power down */
> }
>
> static void icnova_lcd_hw_init(void)
> {
> struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>
> at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
> at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
> at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
> at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
> at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
>
> at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
> at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
> at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
> at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
> at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
> at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
> at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
> at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
> at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
> at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
> at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
> at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
> at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
> at91_set_B_periph(AT91_PIN_PE20, 0); /* LCDD13 */
> at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
> at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
> at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
> at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
> at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
> at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
> at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
> at91_set_B_periph(AT91_PIN_PE28, 0); /* LCDD21 */
> at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
> at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
>
> writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
>
> gd->fb_base = CONFIG_ICNOVA_LCD_BASE;
> }
>
> #ifdef CONFIG_LCD_INFO
> #include <nand.h>
> #include <version.h>
>
> void lcd_show_board_info(void)
> {
> ulong dram_size, nand_size;
> int i;
> char temp[32];
>
> lcd_printf ("%s\n", U_BOOT_VERSION);
> lcd_printf ("(C) 2008 ATMEL Corp\n");
> lcd_printf ("at91support at atmel.com\n");
> lcd_printf ("%s CPU at %s MHz\n",
> ATMEL_CPU_NAME,
> strmhz(temp, get_cpu_clk_rate()));
>
> dram_size = 0;
> for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
> dram_size += gd->bd->bi_dram[i].size;
> nand_size = 0;
> for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
> nand_size += nand_info[i].size;
> lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
> dram_size >> 20,
> nand_size >> 20 );
> }
> #endif /* CONFIG_LCD_INFO */
> #endif
>
> int board_early_init_f(void)
> {
> at91_seriald_hw_init();
> return 0;
> }
>
> #ifdef CONFIG_MMC
> static void icnova_mmc_init(void)
> {
> struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>
> at91_set_A_periph(AT91_PIN_PA0, 0);
> at91_set_A_periph(AT91_PIN_PA1, 1);
> at91_set_A_periph(AT91_PIN_PA2, 1);
> at91_set_A_periph(AT91_PIN_PA3, 1);
> at91_set_A_periph(AT91_PIN_PA4, 1);
> at91_set_A_periph(AT91_PIN_PA5, 1);
>
> writel(1 << ATMEL_ID_MCI0, &pmc->pcer);
> }
>
> int board_mmc_init(bd_t *bd) {
> icnova_mmc_init();
> return atmel_mci_init(bd);
> }
> #endif
>
> int board_init(void)
> {
> /* Enable Ctrlc */
> console_init_f();
>
> gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G45EKES;
>
> /* adress of boot parameters */
> gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>
> #ifdef CONFIG_CMD_NAND
> icnova_nand_hw_init();
> #endif
>
> #ifdef CONFIG_CMD_USB
> icnova_usb_hw_init();
> #endif
>
> #ifdef CONFIG_MACB
> icnova_macb_hw_init();
> #endif
> #ifdef CONFIG_LCD
> icnova_lcd_hw_init();
> #endif
> return 0;
> }
>
> int dram_init(void)
> {
> gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
> CONFIG_SYS_SDRAM_SIZE);
> return 0;
> }
>
> #ifdef CONFIG_RESET_PHY_R
> void reset_phy(void)
> {
> #ifdef CONFIG_MACB
> /*
> * Initialize ethernet HW addr prior to starting Linux,
> * needed for nfsroot
> */
This should not be needed anymore.
> eth_init(gd->bd);
> #endif
> }
> #endif
>
> int board_eth_init(bd_t *bis)
> {
> int rc = 0;
> #ifdef CONFIG_MACB
> rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
> #endif
> return rc;
> }
>
>
> Can you see anything that could cause the relocation problem?
No clear indications. But check what I pointed out.
>
> I would also like to get rid of the AT91Bootstrap.
Attack one problem first...
> Marcel, did you manage to include the NOR boot code into u-boot?
>
> I am using the ELDK-4.2 as toolchain, could this cause the problem?
Most likely not.
Best Regards,
Reinhard
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] relocation problem
2011-08-11 15:03 ` Reinhard Meyer
@ 2011-08-14 19:04 ` Cajus Hahn
0 siblings, 0 replies; 3+ messages in thread
From: Cajus Hahn @ 2011-08-14 19:04 UTC (permalink / raw)
To: u-boot
Dear Reinhard,
finally I found the relocation problem.
> Make sure that at91bootstrap loads the full u-boot image (u-boot
> became larger quite a bit due to relocation and other changes).
That was the solution!
I left the old at91bootstrap from in-circuit on the board. This one only
copies 256k from NOR flash to RAM,
but the actual u-boot is 350k long. Besides that I fixed all the issues
you pointed out.
Now I can see the menu from u-boot, but I spent the whole weekend
searching for the problems with the I/O.
- Ethernet won't work (TX timeout)
- SSD card access freezes u-boot (seems to be a timing issue as adding
#DEBUG to the driver will make some commands work a little more)
- USB (which I do not really need, except if SSD card is not working)
device is detected, but cannot be accessed.
- The LCD display works great (I can see the denx logo and more) which
hasn't done in the original u-boot from in-circuit
I think I will start a separate thread for reach issue, after some more
searching.
Thank You again!
Best Regards
Cajus
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2011-08-14 19:04 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-08-11 10:13 [U-Boot] relocation problem Cajus Hahn
2011-08-11 15:03 ` Reinhard Meyer
2011-08-14 19:04 ` Cajus Hahn
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