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* [PATCH] fsl-rio: Correct IECSR register clear value
@ 2011-08-08 10:13 Liu Gang
  2011-08-24  9:31 ` Liu Gang-B34182
  0 siblings, 1 reply; 4+ messages in thread
From: Liu Gang @ 2011-08-08 10:13 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: r58472, Liu Gang, r61911, Liu Gang, akpm, B11780

The RETE bit in IECSR is cleared by writing a 1 to it.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
 arch/powerpc/sysdev/fsl_rio.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index b3fd081..cdd765b 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -54,6 +54,7 @@
 #define ODSR_CLEAR		0x1c00
 #define LTLEECSR_ENABLE_ALL	0xFFC000FC
 #define ESCSR_CLEAR		0x07120204
+#define IECSR_CLEAR		0x80000000
 
 #define RIO_PORT1_EDCSR		0x0640
 #define RIO_PORT2_EDCSR		0x0680
@@ -1089,11 +1090,11 @@ static void port_error_handler(struct rio_mport *port, int offset)
 
 	if (offset == 0) {
 		out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
-		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0);
+		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);
 		out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
 	} else {
 		out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
-		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0);
+		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);
 		out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
 	}
 }
-- 
1.7.3.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* RE: [PATCH] fsl-rio: Correct IECSR register clear value
  2011-08-08 10:13 [PATCH] fsl-rio: Correct IECSR register clear value Liu Gang
@ 2011-08-24  9:31 ` Liu Gang-B34182
  2011-08-24 18:53   ` Andrew Morton
  0 siblings, 1 reply; 4+ messages in thread
From: Liu Gang-B34182 @ 2011-08-24  9:31 UTC (permalink / raw)
  To: 'akpm@linux-foundation.org',
	'linuxppc-dev@lists.ozlabs.org'
  Cc: Gala Kumar-B11780, Li Yang-R58472, Zang Roy-R61911

Hi, Andrew,

Thank you for applying the patch "[PATCH] rio: Use discovered bit to test i=
f enumeration is complete "!

So far the following patch "[PATCH] fsl-rio: Correct IECSR register clear v=
alue " has no comment or response.

So could you please apply this patch into your tree?

Thanks a lot!

Regards,

Liu Gang
-----Original Message-----
From: Liu Gang-B34182=20
Sent: Monday, August 08, 2011 6:14 PM
To: linuxppc-dev@ozlabs.org
Cc: akpm@linux-foundation.org; Li Yang-R58472; Gala Kumar-B11780; Zang Roy-=
R61911; Liu Gang-B34182; Liu Gang-B34182
Subject: [PATCH] fsl-rio: Correct IECSR register clear value

The RETE bit in IECSR is cleared by writing a 1 to it.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
 arch/powerpc/sysdev/fsl_rio.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c =
index b3fd081..cdd765b 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -54,6 +54,7 @@
 #define ODSR_CLEAR		0x1c00
 #define LTLEECSR_ENABLE_ALL	0xFFC000FC
 #define ESCSR_CLEAR		0x07120204
+#define IECSR_CLEAR		0x80000000
=20
 #define RIO_PORT1_EDCSR		0x0640
 #define RIO_PORT2_EDCSR		0x0680
@@ -1089,11 +1090,11 @@ static void port_error_handler(struct rio_mport *po=
rt, int offset)
=20
 	if (offset =3D=3D 0) {
 		out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
-		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0);
+		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);
 		out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
 	} else {
 		out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
-		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0);
+		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);
 		out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
 	}
 }
--
1.7.3.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH] fsl-rio: Correct IECSR register clear value
  2011-08-24  9:31 ` Liu Gang-B34182
@ 2011-08-24 18:53   ` Andrew Morton
  2011-08-25  3:39     ` Liu Gang-B34182
  0 siblings, 1 reply; 4+ messages in thread
From: Andrew Morton @ 2011-08-24 18:53 UTC (permalink / raw)
  To: Liu Gang-B34182
  Cc: Gala Kumar-B11780, 'linuxppc-dev@lists.ozlabs.org',
	Li Yang-R58472, Zang Roy-R61911

On Wed, 24 Aug 2011 09:31:21 +0000
Liu Gang-B34182 <B34182@freescale.com> wrote:

> Hi, Andrew,
> 
> Thank you for applying the patch "[PATCH] rio: Use discovered bit to test if enumeration is complete "!
> 
> So far the following patch "[PATCH] fsl-rio: Correct IECSR register clear value " has no comment or response.

Perhaps because you didn't tell anyone what the patch does.

> To: linuxppc-dev@ozlabs.org
> Cc: akpm@linux-foundation.org; Li Yang-R58472; Gala Kumar-B11780; Zang Roy-R61911; Liu Gang-B34182; Liu Gang-B34182
> Subject: [PATCH] fsl-rio: Correct IECSR register clear value
> 
> The RETE bit in IECSR is cleared by writing a 1 to it.
> 
> Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
> ---
>  arch/powerpc/sysdev/fsl_rio.c |    5 +++--
>  1 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index b3fd081..cdd765b 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -54,6 +54,7 @@
>  #define ODSR_CLEAR		0x1c00
>  #define LTLEECSR_ENABLE_ALL	0xFFC000FC
>  #define ESCSR_CLEAR		0x07120204
> +#define IECSR_CLEAR		0x80000000
>  
>  #define RIO_PORT1_EDCSR		0x0640
>  #define RIO_PORT2_EDCSR		0x0680
> @@ -1089,11 +1090,11 @@ static void port_error_handler(struct rio_mport *port, int offset)
>  
>  	if (offset == 0) {
>  		out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
> -		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0);
> +		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);
>  		out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
>  	} else {
>  		out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
> -		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0);
> +		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);
>  		out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
>  	}
>  }

Apparently it fixes some bug.  But because you didn't tell us what the
user-visible effects of that bug are, I am unable to determine what
kernel versions (if any) the patch should be merged into.

^ permalink raw reply	[flat|nested] 4+ messages in thread
* RE: [PATCH] fsl-rio: Correct IECSR register clear value
  2011-08-24 18:53   ` Andrew Morton
@ 2011-08-25  3:39     ` Liu Gang-B34182
  0 siblings, 0 replies; 4+ messages in thread
From: Liu Gang-B34182 @ 2011-08-25  3:39 UTC (permalink / raw)
  To: 'Andrew Morton'
  Cc: Gala Kumar-B11780, 'linuxppc-dev@lists.ozlabs.org',
	Li Yang-R58472, Zang Roy-R61911

Hi, Andrew,

Thanks for your comments.

I think you are right and a more detailed description will be better.

This bug causes the IECSR register clear failure.
In this case, the RETE (retry error threshold exceeded) interrupt will be g=
enerated and cannot be cleared.
So the related ISR may be called persistently.

Thanks again!

Regards,

Liu Gang

-----Original Message-----
From: Andrew Morton [mailto:akpm@linux-foundation.org]=20
Sent: Thursday, August 25, 2011 2:54 AM
To: Liu Gang-B34182
Cc: 'linuxppc-dev@lists.ozlabs.org'; Li Yang-R58472; Gala Kumar-B11780; Zan=
g Roy-R61911
Subject: Re: [PATCH] fsl-rio: Correct IECSR register clear value

On Wed, 24 Aug 2011 09:31:21 +0000
Liu Gang-B34182 <B34182@freescale.com> wrote:

> Hi, Andrew,
>=20
> Thank you for applying the patch "[PATCH] rio: Use discovered bit to test=
 if enumeration is complete "!
>=20
> So far the following patch "[PATCH] fsl-rio: Correct IECSR register clear=
 value " has no comment or response.

Perhaps because you didn't tell anyone what the patch does.

> To: linuxppc-dev@ozlabs.org
> Cc: akpm@linux-foundation.org; Li Yang-R58472; Gala Kumar-B11780; Zang=20
> Roy-R61911; Liu Gang-B34182; Liu Gang-B34182
> Subject: [PATCH] fsl-rio: Correct IECSR register clear value
>=20
> The RETE bit in IECSR is cleared by writing a 1 to it.
>=20
> Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
> ---
>  arch/powerpc/sysdev/fsl_rio.c |    5 +++--
>  1 files changed, 3 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_rio.c=20
> b/arch/powerpc/sysdev/fsl_rio.c index b3fd081..cdd765b 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -54,6 +54,7 @@
>  #define ODSR_CLEAR		0x1c00
>  #define LTLEECSR_ENABLE_ALL	0xFFC000FC
>  #define ESCSR_CLEAR		0x07120204
> +#define IECSR_CLEAR		0x80000000
> =20
>  #define RIO_PORT1_EDCSR		0x0640
>  #define RIO_PORT2_EDCSR		0x0680
> @@ -1089,11 +1090,11 @@ static void port_error_handler(struct=20
> rio_mport *port, int offset)
> =20
>  	if (offset =3D=3D 0) {
>  		out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
> -		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0);
> +		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);
>  		out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
>  	} else {
>  		out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
> -		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0);
> +		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);
>  		out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
>  	}
>  }

Apparently it fixes some bug.  But because you didn't tell us what the user=
-visible effects of that bug are, I am unable to determine what kernel vers=
ions (if any) the patch should be merged into.

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2011-08-25  3:40 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-08-08 10:13 [PATCH] fsl-rio: Correct IECSR register clear value Liu Gang
2011-08-24  9:31 ` Liu Gang-B34182
2011-08-24 18:53   ` Andrew Morton
2011-08-25  3:39     ` Liu Gang-B34182

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