[PATCH 0/6] TI81XX: musb support

[PATCH 0/6] TI81XX: musb support

[Ajay Kumar Gupta]

This patch set adds support for musb interface for TI81XX platforms and
are dependent on recent patch series from Hemant Pedanekar at [1] and [2].

TI81XX platform has dual musb instances, uses CPPI4.1 DMA and has built in
usb PHY. The current set of patches supports only the first interface and
in PIO mode.

[1] http://marc.info/?l=linux-omap&m=131247989220300&w=2 
[2] http://marc.info/?l=linux-omap&m=131411961308438&w=2

Ajay Kumar Gupta (1):
  omap: musb: ti81xx: Add phy power function

Ravi B (5):
  omap: musb: Adding hwmod data for ti81xx
  omap: musb: Adding support for ti816x
  ti816evm: Add support for musb interface
  ti814evm: Add support for musb interface
  usb: musb: Add support for ti81xx platform

 arch/arm/mach-omap2/board-ti8148evm.c      |   15 +
 arch/arm/mach-omap2/board-ti8168evm.c      |   15 +
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c |   74 ++++
 arch/arm/mach-omap2/omap_phy_internal.c    |   24 +
 arch/arm/mach-omap2/usb-musb.c             |    3 +
 arch/arm/plat-omap/include/plat/usb.h      |   32 ++
 drivers/usb/musb/Kconfig                   |    6 +
 drivers/usb/musb/Makefile                  |    1 +
 drivers/usb/musb/musb_core.c               |    4 +-
 drivers/usb/musb/ti81xx.c                  |  637 ++++++++++++++++++++++++++++
 10 files changed, 810 insertions(+), 1 deletions(-)
 create mode 100644 drivers/usb/musb/ti81xx.c

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[PATCH 1/6] omap: musb: Adding hwmod data for ti81xx

[Ajay Kumar Gupta]

From: Ravi B <ravibabu@ti.com>

The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
irqs and three address spaces for usbss, musb0 and musb1 respectively. Created
one hwmod with three irq and memory resources.

Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Ravi B <ravibabu@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c |   74 ++++++++++++++++++++++++++++
 1 files changed, 74 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index e73a4c6..e960d70 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod;
 static struct omap_hwmod ti81xx_timer5_hwmod;
 static struct omap_hwmod ti81xx_timer6_hwmod;
 static struct omap_hwmod ti81xx_timer7_hwmod;
+static struct omap_hwmod ti81xx_usbss_hwmod;
 
 /* L4 SLOW -> TIMER1 interface */
 static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = {
@@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = {
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
 };
 
+/* L3 SLOW -> USBSS interface */
+static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = {
+	{
+		.name		= "usbss",
+		.pa_start	= 0x47400000,
+		.pa_end		= 0x47400000 + SZ_4K - 1,
+		.flags		= ADDR_TYPE_RT
+	},
+	{
+		.name		= "musb0",
+		.pa_start	= 0x47401000,
+		.pa_end		= 0x47401000 + SZ_2K - 1,
+		.flags		= ADDR_TYPE_RT
+	},
+	{
+		.name		= "musb1",
+		.pa_start	= 0x47401800,
+		.pa_end		= 0x47401800 + SZ_2K - 1,
+		.flags		= ADDR_TYPE_RT
+	},
+	{
+	},
+};
+
+static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = {
+	.rev_offs	= 0x0,
+	.sysc_offs	= 0x10,
+	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class ti81xx_usbotg_class = {
+	.name = "usbotg",
+	.sysc = &ti81xx_usbhsotg_sysc,
+};
+
+static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = {
+	{ .name = "usbss-irq", .irq = 17, },
+	{ .name = "musb0-irq", .irq = 18, },
+	{ .name = "musb1-irq", .irq = 19, },
+	{ .irq = -1, },
+};
+
+static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = {
+	.master		= &ti81xx_l3_slow_hwmod,
+	.slave		= &ti81xx_usbss_hwmod,
+	.clk		= "usbotg_ick",
+	.addr		= ti81xx_usbss_addr_space,
+	.user		= OCP_USER_MPU,
+	.flags		= OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = {
+	&ti81xx_l3_slow__usbss,
+};
+
+static struct omap_hwmod ti81xx_usbss_hwmod = {
+	.name		= "usb_otg_hs",
+	.mpu_irqs	= ti81xx_usbss_mpu_irqs,
+	.main_clk	= "usbotg_ick",
+	.clkdm_name	= "default_usb_clkdm",
+	.prcm		= {
+		.omap4 = {
+			.clkctrl_offs = TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET,
+		},
+	},
+	.slaves		= ti81xx_usbss_slaves,
+	.slaves_cnt	= ARRAY_SIZE(ti81xx_usbss_slaves),
+	.class		= &ti81xx_usbotg_class,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
+};
 
 static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
 	&ti81xx_l3_fast_hwmod,
@@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
 	&ti81xx_timer5_hwmod,
 	&ti81xx_timer6_hwmod,
 	&ti81xx_timer7_hwmod,
+	&ti81xx_usbss_hwmod,
 	NULL,
 };
 
-- 
1.6.2.4

[PATCH 2/6] omap: musb: Adding support for ti816x

[Ajay Kumar Gupta]

From: Ravi B <ravibabu@ti.com>

Added musb support for ti816x platform which has two instances of musb
interface and uses CPPI4.1 DMA. The current patch set adds support for
single instance and in PIO mode only.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Ravi B <ravibabu@ti.com>
---
 arch/arm/mach-omap2/usb-musb.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index a65145b..911eb27 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -143,6 +143,9 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
 	if (cpu_is_omap3517() || cpu_is_omap3505()) {
 		oh_name = "am35x_otg_hs";
 		name = "musb-am35x";
+	} else if (cpu_is_ti81xx()) {
+		oh_name = "usb_otg_hs";
+		name = "ti81xx-usbss";
 	} else {
 		oh_name = "usb_otg_hs";
 		name = "musb-omap2430";
-- 
1.6.2.4

[PATCH 3/6] omap: musb: ti81xx: Add phy power function

[Ajay Kumar Gupta]

Adding ti81xx_musb_phy_power() which will be used by musb driver through
its function pointer in board_data.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Ravi B <ravibabu@ti.com>
---
 arch/arm/mach-omap2/omap_phy_internal.c |   24 +++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/usb.h   |   32 +++++++++++++++++++++++++++++++
 2 files changed, 56 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 58775e3..352b6af 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -260,3 +260,27 @@ void am35x_set_mode(u8 musb_mode)
 
 	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
 }
+
+void ti81xx_musb_phy_power(u8 on)
+{
+	u32 usbphycfg = omap_ctrl_readl(USBCTRL0);
+
+	if (on) {
+		if (cpu_is_ti816x()) {
+			usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
+			usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC;
+		} else if (cpu_is_ti814x()) {
+			usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
+				| USBPHY_DPINPUT | USBPHY_DMINPUT);
+			usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN
+				| USBPHY_DPOPBUFCTL | USBPHY_DPOPBUFCTL);
+		}
+	} else {
+		if (cpu_is_ti816x())
+			usbphycfg &= ~TI816X_USBPHY0_NORMAL_MODE;
+		else if (cpu_is_ti814x())
+			usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
+
+	}
+	omap_ctrl_writel(usbphycfg, USBCTRL0);
+}
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 17d3c93..c616385 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -114,6 +114,7 @@ extern void am35x_musb_reset(void);
 extern void am35x_musb_phy_power(u8 on);
 extern void am35x_musb_clear_irq(void);
 extern void am35x_set_mode(u8 musb_mode);
+extern void ti81xx_musb_phy_power(u8 on);
 
 /*
  * FIXME correct answer depends on hmc_mode,
@@ -273,6 +274,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
 #define CONF2_OTGPWRDN		(1 << 2)
 #define CONF2_DATPOL		(1 << 1)
 
+/* TI81XX specific definitions */
+#define USBCTRL0	0x620
+#define USBSTAT0	0x624
+
+/* TI816X PHY controls bits */
+#define TI816X_USBPHY0_NORMAL_MODE	(1 << 0)
+#define TI816X_USBPHY_REFCLK_OSC	(1 << 8)
+
+/* TI814X PHY controls bits */
+#define USBPHY_CM_PWRDN		(1 << 0)
+#define USBPHY_OTG_PWRDN	(1 << 1)
+#define USBPHY_CHGDET_DIS	(1 << 2)
+#define USBPHY_CHGDET_RSTRT	(1 << 3)
+#define USBPHY_SRCONDM		(1 << 4)
+#define USBPHY_SINKONDP		(1 << 5)
+#define USBPHY_CHGISINK_EN	(1 << 6)
+#define USBPHY_CHGVSRC_EN	(1 << 7)
+#define USBPHY_DMPULLUP		(1 << 8)
+#define USBPHY_DPPULLUP		(1 << 9)
+#define USBPHY_CDET_EXTCTL	(1 << 10)
+#define USBPHY_GPIO_MODE	(1 << 12)
+#define USBPHY_DPOPBUFCTL	(1 << 13)
+#define USBPHY_DMOPBUFCTL	(1 << 14)
+#define USBPHY_DPINPUT		(1 << 15)
+#define USBPHY_DMINPUT		(1 << 16)
+#define USBPHY_DPGPIO_PD	(1 << 17)
+#define USBPHY_DMGPIO_PD	(1 << 18)
+#define USBPHY_OTGVDET_EN	(1 << 19)
+#define USBPHY_OTGSESSEND_EN	(1 << 20)
+#define USBPHY_DATA_POLARITY	(1 << 23)
+
 #if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
 u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
 u32 omap1_usb1_init(unsigned nwires);
-- 
1.6.2.4

[PATCH 4/6] ti816evm: Add support for musb interface

[Ajay Kumar Gupta]

From: Ravi B <ravibabu@ti.com>

Adding musb support in ti816 EVM board file.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Ravi B <ravibabu@ti.com>
---
 arch/arm/mach-omap2/board-ti8168evm.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index e516a04..77200d4 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -23,6 +23,20 @@
 #include <plat/irqs.h>
 #include <plat/board.h>
 #include <plat/common.h>
+#include <plat/usb.h>
+
+static struct omap_musb_board_data musb_board_data = {
+	.set_phy_power	= ti81xx_musb_phy_power,
+	.interface_type	= MUSB_INTERFACE_ULPI,
+#ifdef CONFIG_USB_MUSB_OTG
+	.mode           = MUSB_OTG,
+#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
+	.mode           = MUSB_HOST,
+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
+	.mode           = MUSB_PERIPHERAL,
+#endif
+	.power		= 500,
+};
 
 static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
 };
@@ -38,6 +52,7 @@ static void __init ti8168_evm_init(void)
 	omap_serial_init();
 	omap_board_config = ti8168_evm_config;
 	omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
+	usb_musb_init(&musb_board_data);
 }
 
 static void __init ti8168_evm_map_io(void)
-- 
1.6.2.4

[PATCH 5/6] ti814evm: Add support for musb interface

[Ajay Kumar Gupta]

From: Ravi B <ravibabu@ti.com>

Adding musb support in ti814 EVM board file.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Ravi B <ravibabu@ti.com>
---
 arch/arm/mach-omap2/board-ti8148evm.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/board-ti8148evm.c b/arch/arm/mach-omap2/board-ti8148evm.c
index 588d6b7..d9c8505 100644
--- a/arch/arm/mach-omap2/board-ti8148evm.c
+++ b/arch/arm/mach-omap2/board-ti8148evm.c
@@ -23,6 +23,20 @@
 #include <plat/irqs.h>
 #include <plat/board.h>
 #include <plat/common.h>
+#include <plat/usb.h>
+
+static struct omap_musb_board_data musb_board_data = {
+	.set_phy_power	= ti81xx_musb_phy_power,
+	.interface_type	= MUSB_INTERFACE_ULPI,
+#ifdef CONFIG_USB_MUSB_OTG
+	.mode           = MUSB_OTG,
+#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
+	.mode           = MUSB_HOST,
+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
+	.mode           = MUSB_PERIPHERAL,
+#endif
+	.power		= 500,
+};
 
 static struct omap_board_config_kernel ti8148_evm_config[] __initdata = {
 };
@@ -38,6 +52,7 @@ static void __init ti8148_evm_init(void)
 	omap_serial_init();
 	omap_board_config = ti8148_evm_config;
 	omap_board_config_size = ARRAY_SIZE(ti8148_evm_config);
+	usb_musb_init(&musb_board_data);
 }
 
 static void __init ti8148_evm_map_io(void)
-- 
1.6.2.4

[PATCH 6/6] usb: musb: Add support for ti81xx platform

[Ajay Kumar Gupta]

From: Ravi B <ravibabu-l0cyMroinI0@public.gmane.org>

TI81XX platform has two musb interfaces and uses CPPI4.1 DMA engine.
It has builtin USB PHYs as AM35x. The current set of patches adds support
for one instance and only in PIO mode.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org>
Signed-off-by: Ravi B <ravibabu-l0cyMroinI0@public.gmane.org>
---
 drivers/usb/musb/Kconfig     |    6 +
 drivers/usb/musb/Makefile    |    1 +
 drivers/usb/musb/musb_core.c |    4 +-
 drivers/usb/musb/ti81xx.c    |  637 ++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 647 insertions(+), 1 deletions(-)
 create mode 100644 drivers/usb/musb/ti81xx.c

diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 6192b45..d6d5bed 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -11,6 +11,7 @@ config USB_MUSB_HDRC
 	depends on USB && USB_GADGET
 	depends on (ARM || (BF54x && !BF544) || (BF52x && !BF522 && !BF523))
 	select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN)
+	select NOP_USB_XCEIV if SOC_OMAPTI81XX
 	select TWL4030_USB if MACH_OMAP_3430SDP
 	select TWL6030_USB if MACH_OMAP_4430SDP || MACH_OMAP4_PANDA
 	select USB_OTG_UTILS
@@ -57,6 +58,10 @@ config USB_MUSB_AM35X
 	tristate "AM35x"
 	depends on ARCH_OMAP
 
+config USB_MUSB_TI81XX
+	bool "TI81XX"
+	depends on SOC_OMAPTI81XX
+
 config USB_MUSB_BLACKFIN
 	tristate "Blackfin"
 	depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523)
@@ -71,6 +76,7 @@ config MUSB_PIO_ONLY
 	bool 'Disable DMA (always use PIO)'
 	depends on USB_MUSB_HDRC
 	default USB_MUSB_TUSB6010 || USB_MUSB_DA8XX || USB_MUSB_AM35X
+	default SOC_OMAPTI81XX
 	help
 	  All data is copied between memory and FIFO by the CPU.
 	  DMA controllers are ignored.
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
index d8fd9d0..2df01b4 100644
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -13,6 +13,7 @@ musb_hdrc-$(CONFIG_DEBUG_FS)			+= musb_debugfs.o
 # Hardware Glue Layer
 obj-$(CONFIG_USB_MUSB_OMAP2PLUS)		+= omap2430.o
 obj-$(CONFIG_USB_MUSB_AM35X)			+= am35x.o
+obj-$(CONFIG_USB_MUSB_TI81XX)			+= ti81xx.o
 obj-$(CONFIG_USB_MUSB_TUSB6010)			+= tusb6010.o
 obj-$(CONFIG_USB_MUSB_DAVINCI)			+= davinci.o
 obj-$(CONFIG_USB_MUSB_DA8XX)			+= da8xx.o
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 20a2873..07f3faf 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1014,7 +1014,9 @@ static void musb_shutdown(struct platform_device *pdev)
 	|| defined(CONFIG_USB_MUSB_OMAP2PLUS)		\
 	|| defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)	\
 	|| defined(CONFIG_USB_MUSB_AM35X)		\
-	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)
+	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)	\
+	|| defined(CONFIG_USB_MUSB_TI81XX)		\
+	|| defined(CONFIG_USB_MUSB_TI81XX_MODULE)
 static ushort __initdata fifo_mode = 4;
 #elif defined(CONFIG_USB_MUSB_UX500)			\
 	|| defined(CONFIG_USB_MUSB_UX500_MODULE)
diff --git a/drivers/usb/musb/ti81xx.c b/drivers/usb/musb/ti81xx.c
new file mode 100644
index 0000000..f95774e
--- /dev/null
+++ b/drivers/usb/musb/ti81xx.c
@@ -0,0 +1,637 @@
+/*
+ * Texas Instruments TI81XX "glue layer"
+ *
+ * Copyright (C) 2011, by Texas Instruments
+ *
+ * Based on the am35x "glue layer" code.
+ *
+ * This file is part of the Inventra Controller Driver for Linux.
+ *
+ * The Inventra Controller Driver for Linux is free software; you
+ * can redistribute it and/or modify it under the terms of the GNU
+ * General Public License version 2 as published by the Free Software
+ * Foundation.
+ *
+ * The Inventra Controller Driver for Linux is distributed in
+ * the hope that it will be useful, but WITHOUT ANY WARRANTY;
+ * without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+ * License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with The Inventra Controller Driver for Linux ; if not,
+ * write to the Free Software Foundation, Inc., 59 Temple Place,
+ * Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/pm_runtime.h>
+
+#include <plat/usb.h>
+
+#include "musb_core.h"
+
+/**
+ * TI81XX specific definitions
+ */
+/* USB 2.0 OTG module registers */
+#define USB_REVISION_REG        0x00
+#define USB_CTRL_REG            0x14
+#define USB_STAT_REG            0x18
+#define USB_IRQ_MERGED_STATUS	0x20
+#define USB_IRQ_EOI		0x24
+#define USB_IRQ_STATUS_RAW_0	0x28
+#define USB_IRQ_STATUS_RAW_1	0x2c
+#define USB_IRQ_STATUS_0	0x30
+#define USB_IRQ_STATUS_1	0x34
+#define USB_IRQ_ENABLE_SET_0	0x38
+#define USB_IRQ_ENABLE_SET_1	0x3c
+#define USB_IRQ_ENABLE_CLR_0	0x40
+#define USB_IRQ_ENABLE_CLR_1	0x44
+
+#define USB_EP_INTR_SET_REG		USB_IRQ_ENABLE_SET_0
+#define USB_EP_INTR_CLEAR_REG		USB_IRQ_ENABLE_CLR_0
+#define USB_EP_INTR_STATUS_REG		USB_IRQ_STATUS_0
+#define USB_CORE_INTR_SET_REG		USB_IRQ_ENABLE_SET_1
+#define USB_CORE_INTR_CLEAR_REG		USB_IRQ_ENABLE_CLR_1
+#define USB_CORE_INTR_STATUS_REG	USB_IRQ_STATUS_1
+
+#define USB_SRP_FIX_TIME_REG    0xd4
+#define USB_PHY_UTMI_REG	0xe0
+#define USB_PHY_UTMI_LB_REG	0xe4
+#define USB_MODE_REG		0xe8
+
+/* PHY UTMI register bits */
+#define USB_PHY_UTMI_OTG_DISABLE	(1 << 21)
+
+/* USB MODE register bits */
+#define USB_MODE_IDDIG		(1 << 8)
+
+/* Control register bits */
+#define USB_SOFT_RESET_MASK     1
+
+/* USB interrupt register bits */
+#define USB_INTR_USB_SHIFT      0
+#define USB_INTR_USB_MASK       (0x1ff << USB_INTR_USB_SHIFT)
+#define USB_INTR_DRVVBUS        0x100
+#define USB_INTR_RX_SHIFT       16
+#define USB_INTR_TX_SHIFT       0
+#define USB_TX_EP_MASK		0xffff		/* EP0 + 15 Tx EPs */
+#define USB_RX_EP_MASK		0xfffe		/* 15 Rx EPs */
+#define USB_TX_INTR_MASK	(USB_TX_EP_MASK << USB_INTR_TX_SHIFT)
+#define USB_RX_INTR_MASK	(USB_RX_EP_MASK << USB_INTR_RX_SHIFT)
+
+#define USB_MENTOR_CORE_OFFSET  0x400
+
+/**
+ * avoid using musb_readx()/musb_writex() as glue layer should not be
+ * dependent on musb core layer symbols.
+ */
+static inline u8 ti81xx_readb(const void __iomem *addr, unsigned offset)
+	{ return __raw_readb(addr + offset); }
+
+static inline u32 ti81xx_readl(const void __iomem *addr, unsigned offset)
+	{ return __raw_readl(addr + offset); }
+
+static inline void ti81xx_writeb(void __iomem *addr, unsigned offset, u8 data)
+	{ __raw_writeb(data, addr + offset); }
+
+static inline void ti81xx_writel(void __iomem *addr, unsigned offset, u32 data)
+	{ __raw_writel(data, addr + offset); }
+
+/**
+ * TI81XX glue has one interface clock and two seperate clocks to individual
+ * PHY.
+ */
+struct ti81xx_glue {
+	struct device *dev;
+	struct clk *ick;		/* common usbss interface clk */
+	void __iomem *usbss_base;	/* ioremapped virtual address */
+	struct platform_device *musb[2];/* child musb pdevs */
+};
+
+/**
+ * ti81xx_musb_enable - enable interrupts
+ */
+static void ti81xx_musb_enable(struct musb *musb)
+{
+	void __iomem *reg_base = musb->ctrl_base;
+	u32 epmask, coremask;
+
+	/* Workaround: setup IRQs through both register sets. */
+	epmask = ((musb->epmask & USB_TX_EP_MASK) << USB_INTR_TX_SHIFT) |
+	       ((musb->epmask & USB_RX_EP_MASK) << USB_INTR_RX_SHIFT);
+	coremask = (USB_INTR_USB_MASK & ~MUSB_INTR_SOF);
+
+	ti81xx_writel(reg_base, USB_EP_INTR_SET_REG, epmask);
+	ti81xx_writel(reg_base, USB_CORE_INTR_SET_REG, coremask);
+	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
+	if (is_otg_enabled(musb))
+		ti81xx_writel(reg_base, USB_CORE_INTR_SET_REG,
+			    USB_INTR_DRVVBUS << USB_INTR_USB_SHIFT);
+}
+
+/**
+ * ti81xx_musb_disable - disable HDRC and flush interrupts
+ */
+static void ti81xx_musb_disable(struct musb *musb)
+{
+	void __iomem *reg_base = musb->ctrl_base;
+
+	ti81xx_writel(reg_base, USB_CORE_INTR_CLEAR_REG, USB_INTR_USB_MASK);
+	ti81xx_writel(reg_base, USB_EP_INTR_CLEAR_REG,
+			 USB_TX_INTR_MASK | USB_RX_INTR_MASK);
+	ti81xx_writeb(musb->mregs, MUSB_DEVCTL, 0);
+	ti81xx_writel(reg_base, USB_IRQ_EOI, 0);
+}
+
+#define portstate(stmt)	stmt
+
+#define	POLL_SECONDS	2
+
+static struct timer_list otg_workaround;
+
+static void otg_timer(unsigned long _musb)
+{
+	struct musb		*musb = (void *)_musb;
+	void __iomem		*mregs = musb->mregs;
+	u8			devctl;
+	unsigned long		flags;
+
+	/*
+	 * We poll because DaVinci's won't expose several OTG-critical
+	 * status change events (from the transceiver) otherwise.
+	 */
+	devctl = ti81xx_readb(mregs, MUSB_DEVCTL);
+	dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
+				otg_state_string(musb->xceiv->state));
+
+	spin_lock_irqsave(&musb->lock, flags);
+	switch (musb->xceiv->state) {
+	case OTG_STATE_A_WAIT_BCON:
+		devctl &= ~MUSB_DEVCTL_SESSION;
+		ti81xx_writeb(musb->mregs, MUSB_DEVCTL, devctl);
+
+		devctl = ti81xx_readb(musb->mregs, MUSB_DEVCTL);
+		if (devctl & MUSB_DEVCTL_BDEVICE) {
+			musb->xceiv->state = OTG_STATE_B_IDLE;
+			MUSB_DEV_MODE(musb);
+		} else {
+			musb->xceiv->state = OTG_STATE_A_IDLE;
+			MUSB_HST_MODE(musb);
+		}
+		break;
+	case OTG_STATE_A_WAIT_VFALL:
+		musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
+		ti81xx_writel(musb->ctrl_base, USB_CORE_INTR_SET_REG,
+			    MUSB_INTR_VBUSERROR << USB_INTR_USB_SHIFT);
+		break;
+	case OTG_STATE_B_IDLE:
+		if (!is_peripheral_enabled(musb))
+			break;
+
+		devctl = ti81xx_readb(mregs, MUSB_DEVCTL);
+		if (devctl & MUSB_DEVCTL_BDEVICE)
+			mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
+		else
+			musb->xceiv->state = OTG_STATE_A_IDLE;
+		break;
+	default:
+		break;
+	}
+	spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+static void ti81xx_musb_try_idle(struct musb *musb, unsigned long timeout)
+{
+	static unsigned long last_timer;
+
+	if (!is_otg_enabled(musb))
+		return;
+
+	if (timeout == 0)
+		timeout = jiffies + msecs_to_jiffies(3);
+
+	/* Never idle if active, or when VBUS timeout is not set as host */
+	if (musb->is_active || (musb->a_wait_bcon == 0 &&
+				musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
+		dev_dbg(musb->controller, "%s active, deleting timer\n",
+				otg_state_string(musb->xceiv->state));
+		del_timer(&otg_workaround);
+		last_timer = jiffies;
+		return;
+	}
+
+	if (time_after(last_timer, timeout) && timer_pending(&otg_workaround)) {
+		dev_dbg(musb->controller,
+			"Longer idle timer already pending, ignoring...\n");
+		return;
+	}
+	last_timer = timeout;
+
+	dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
+		otg_state_string(musb->xceiv->state),
+			jiffies_to_msecs(timeout - jiffies));
+	mod_timer(&otg_workaround, timeout);
+}
+
+static irqreturn_t ti81xx_interrupt(int irq, void *hci)
+{
+	struct musb  *musb = hci;
+	void __iomem *reg_base = musb->ctrl_base;
+	unsigned long flags;
+	irqreturn_t ret = IRQ_NONE;
+	u32 epintr, usbintr;
+
+	spin_lock_irqsave(&musb->lock, flags);
+
+	/* Get endpoint interrupts */
+	epintr = ti81xx_readl(reg_base, USB_EP_INTR_STATUS_REG);
+	musb->int_rx = (epintr & USB_RX_INTR_MASK) >> USB_INTR_RX_SHIFT;
+	musb->int_tx = (epintr & USB_TX_INTR_MASK) >> USB_INTR_TX_SHIFT;
+
+	if (epintr)
+		ti81xx_writel(reg_base, USB_EP_INTR_STATUS_REG, epintr);
+
+	/* Get usb core interrupts */
+	usbintr = ti81xx_readl(reg_base, USB_CORE_INTR_STATUS_REG);
+	if (!usbintr && !epintr)
+		goto eoi;
+
+	musb->int_usb =	(usbintr & USB_INTR_USB_MASK) >> USB_INTR_USB_SHIFT;
+	if (usbintr)
+		ti81xx_writel(reg_base, USB_CORE_INTR_STATUS_REG, usbintr);
+
+	dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
+			usbintr, epintr);
+	/*
+	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
+	 * TI81XX's missing ID change IRQ.  We need an ID change IRQ to
+	 * switch appropriately between halves of the OTG state machine.
+	 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
+	 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
+	 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
+	 */
+	if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
+		pr_info("CAUTION: musb: Babble Interrupt Occured\n");
+
+	if (usbintr & (USB_INTR_DRVVBUS << USB_INTR_USB_SHIFT)) {
+		int drvvbus = ti81xx_readl(reg_base, USB_STAT_REG);
+		void __iomem *mregs = musb->mregs;
+		u8 devctl = ti81xx_readb(mregs, MUSB_DEVCTL);
+		int err;
+
+		err = is_host_enabled(musb) && (musb->int_usb &
+						MUSB_INTR_VBUSERROR);
+		if (err) {
+			/*
+			 * The Mentor core doesn't debounce VBUS as needed
+			 * to cope with device connect current spikes. This
+			 * means it's not uncommon for bus-powered devices
+			 * to get VBUS errors during enumeration.
+			 *
+			 * This is a workaround, but newer RTL from Mentor
+			 * seems to allow a better one: "re"-starting sessions
+			 * without waiting for VBUS to stop registering in
+			 * devctl.
+			 */
+			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
+			musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
+			mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
+			WARNING("VBUS error workaround (delay coming)\n");
+		} else if (is_host_enabled(musb) && drvvbus) {
+			musb->is_active = 1;
+			MUSB_HST_MODE(musb);
+			musb->xceiv->default_a = 1;
+			musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
+			portstate(musb->port1_status |= USB_PORT_STAT_POWER);
+			del_timer(&otg_workaround);
+		} else {
+			musb->is_active = 0;
+			MUSB_DEV_MODE(musb);
+			musb->xceiv->default_a = 0;
+			musb->xceiv->state = OTG_STATE_B_IDLE;
+			portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
+		}
+
+		/* NOTE: this must complete power-on within 100 ms. */
+		dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
+				drvvbus ? "on" : "off",
+				otg_state_string(musb->xceiv->state),
+				err ? " ERROR" : "",
+				devctl);
+		ret = IRQ_HANDLED;
+	}
+
+	if (musb->int_tx || musb->int_rx || musb->int_usb)
+		ret |= musb_interrupt(musb);
+
+ eoi:
+	/* EOI needs to be written for the IRQ to be re-asserted. */
+	if (ret == IRQ_HANDLED || epintr || usbintr)
+		ti81xx_writel(reg_base, USB_IRQ_EOI, 1);
+
+	/* Poll for ID change */
+	if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
+		mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
+
+	spin_unlock_irqrestore(&musb->lock, flags);
+
+	return ret;
+}
+
+static int ti81xx_musb_init(struct musb *musb)
+{
+	struct device *dev = musb->controller;
+	struct musb_hdrc_platform_data *plat = dev->platform_data;
+	struct omap_musb_board_data *data = plat->board_data;
+	void __iomem *reg_base = musb->ctrl_base;
+	u32 rev, val;
+	int status;
+
+	/* mentor core register starts at offset of 0x400 from musb base */
+	musb->mregs += USB_MENTOR_CORE_OFFSET;
+
+	/* NOP driver needs change if supporting dual instance */
+	usb_nop_xceiv_register();
+	musb->xceiv = otg_get_transceiver();
+	if (!musb->xceiv)
+		return -ENODEV;
+
+	status = pm_runtime_get_sync(dev);
+	if (status < 0) {
+		dev_err(dev, "pm_runtime_get_sync FAILED");
+		goto err0;
+	}
+
+	/* Returns zero if e.g. not clocked */
+	rev = ti81xx_readl(reg_base, USB_REVISION_REG);
+	if (!rev) {
+		status = -ENODEV;
+		goto err0;
+	}
+
+	if (is_host_enabled(musb))
+		setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
+
+	/* Reset the musb */
+	ti81xx_writel(reg_base, USB_CTRL_REG, USB_SOFT_RESET_MASK);
+
+	/* Start the on-chip PHY and its PLL. */
+	if (data->set_phy_power)
+		data->set_phy_power(1);
+
+	musb->isr = ti81xx_interrupt;
+
+	/* reset the otgdisable bit, needed for host mode to work */
+	val = ti81xx_readl(reg_base, USB_PHY_UTMI_REG);
+	val &= ~USB_PHY_UTMI_OTG_DISABLE;
+	ti81xx_writel(musb->ctrl_base, USB_PHY_UTMI_REG, val);
+
+	/* clear level interrupt */
+	ti81xx_writel(reg_base, USB_IRQ_EOI, 0);
+
+	return 0;
+err0:
+	pm_runtime_disable(dev);
+	return status;
+}
+
+static int ti81xx_musb_exit(struct musb *musb)
+{
+	struct device *dev = musb->controller;
+	struct musb_hdrc_platform_data *plat = dev->platform_data;
+	struct omap_musb_board_data *data = plat->board_data;
+
+	if (is_host_enabled(musb))
+		del_timer_sync(&otg_workaround);
+
+	/* Shutdown the on-chip PHY and its PLL. */
+	if (data->set_phy_power)
+		data->set_phy_power(0);
+
+	/* NOP driver needs change if supporting dual instance */
+	otg_put_transceiver(musb->xceiv);
+	usb_nop_xceiv_unregister();
+
+	return 0;
+}
+
+static struct musb_platform_ops ti81xx_ops = {
+	.init		= ti81xx_musb_init,
+	.exit		= ti81xx_musb_exit,
+
+	.enable		= ti81xx_musb_enable,
+	.disable	= ti81xx_musb_disable,
+
+	.try_idle	= ti81xx_musb_try_idle,
+};
+
+static u64 musb_dmamask = DMA_BIT_MASK(32);
+
+static int __devinit ti81xx_create_musb_pdev(struct ti81xx_glue *glue, u8 id)
+{
+	struct device *dev = glue->dev;
+	struct platform_device *pdev = to_platform_device(dev);
+	struct musb_hdrc_platform_data  *pdata = dev->platform_data;
+	struct platform_device	*musb;
+	struct resource *res;
+	struct resource	resources[2];
+	char res_name[10];
+	int ret;
+
+	/* get memory resource */
+	sprintf(res_name, "musb%d", id);
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
+	if (!res) {
+		dev_err(dev, "%s get mem resource failed\n", res_name);
+		ret = -ENODEV;
+		goto err0;
+	}
+	resources[0] = *res;
+
+	/* get irq resource */
+	sprintf(res_name, "musb%d-irq", id);
+	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
+	if (!res) {
+		dev_err(dev, "%s get irq resource failed\n", res_name);
+		ret = -ENODEV;
+		goto err0;
+	}
+	strcpy((u8 *)res->name, "mc");
+	resources[1] = *res;
+
+	/* allocate the child platform device */
+	musb = platform_device_alloc("musb-hdrc", -1);
+	if (!musb) {
+		dev_err(dev, "failed to allocate musb device\n");
+		goto err0;
+	}
+
+	musb->dev.parent		= dev;
+	musb->dev.dma_mask		= &musb_dmamask;
+	musb->dev.coherent_dma_mask	= musb_dmamask;
+
+	glue->musb[id]			= musb;
+
+	pdata->platform_ops		= &ti81xx_ops;
+
+	ret = platform_device_add_resources(musb, resources, 2);
+	if (ret) {
+		dev_err(dev, "failed to add resources\n");
+		goto err1;
+	}
+
+	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
+	if (ret) {
+		dev_err(dev, "failed to add platform_data\n");
+		goto err1;
+	}
+
+	ret = platform_device_add(musb);
+	if (ret) {
+		dev_err(dev, "failed to register musb device\n");
+		goto err1;
+	}
+
+	return 0;
+
+err1:
+	platform_device_put(musb);
+err0:
+	return ret;
+}
+
+static void __devexit ti81xx_delete_musb_pdev(struct ti81xx_glue *glue, u8 id)
+{
+	platform_device_del(glue->musb[id]);
+	platform_device_put(glue->musb[id]);
+}
+
+static int __init ti81xx_probe(struct platform_device *pdev)
+{
+	struct ti81xx_glue *glue;
+	struct resource *iomem;
+	int ret;
+
+	/* allocate glue */
+	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
+	if (!glue) {
+		dev_err(&pdev->dev, "unable to allocate glue memory\n");
+		ret = -ENOMEM;
+		goto err0;
+	}
+
+	/* get memory resource */
+	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!iomem) {
+		dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
+		ret = -ENODEV;
+		goto err1;
+	}
+
+	/* iomap for usbss mem space */
+	glue->usbss_base =
+		ioremap(iomem->start, resource_size(iomem));
+	if (!glue->usbss_base) {
+		dev_err(&pdev->dev, "usbss ioremap failed\n");
+		ret = -ENOMEM;
+		goto err1;
+	}
+
+	glue->dev = &pdev->dev;
+	platform_set_drvdata(pdev, glue);
+
+	/* create the child platform device for first instances of musb */
+	ret = ti81xx_create_musb_pdev(glue, 0);
+	if (ret != 0) {
+		dev_err(&pdev->dev, "failed to create child pdev\n");
+		goto err2;
+	}
+
+	/* enable the usbss clocks */
+	pm_runtime_enable(&pdev->dev);
+
+	return 0;
+
+err2:
+	iounmap(glue->usbss_base);
+err1:
+	kfree(glue);
+err0:
+	return ret;
+}
+static int __exit ti81xx_remove(struct platform_device *pdev)
+{
+	struct ti81xx_glue *glue = platform_get_drvdata(pdev);
+
+	/* delete the child platform device for first instances of musb */
+	ti81xx_delete_musb_pdev(glue, 0);
+
+	/* iounmap */
+	iounmap(glue->usbss_base);
+
+	/* disable usbss clocks */
+	pm_runtime_put(&pdev->dev);
+	pm_runtime_disable(&pdev->dev);
+	kfree(glue);
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int ti81xx_suspend(struct device *dev)
+{
+	struct musb_hdrc_platform_data *plat = dev->platform_data;
+	struct omap_musb_board_data *data = plat->board_data;
+
+	/* Shutdown the on-chip PHY and its PLL. */
+	if (data->set_phy_power)
+		data->set_phy_power(0);
+
+	return 0;
+}
+
+static int ti81xx_resume(struct device *dev)
+{
+	struct musb_hdrc_platform_data *plat = dev->platform_data;
+	struct omap_musb_board_data *data = plat->board_data;
+
+	/* Start the on-chip PHY and its PLL. */
+	if (data->set_phy_power)
+		data->set_phy_power(1);
+
+	return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(ti81xx_pm_ops, ti81xx_suspend, ti81xx_resume);
+
+static struct platform_driver ti81xx_usbss_driver = {
+	.remove         = __exit_p(ti81xx_remove),
+	.driver         = {
+		.name   = "ti81xx-usbss",
+		.pm	= &ti81xx_pm_ops,
+	},
+};
+
+MODULE_DESCRIPTION("TI81XX MUSB Glue Layer");
+MODULE_AUTHOR("Ravi B <ravibabu-l0cyMroinI0@public.gmane.org>");
+MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org>");
+MODULE_LICENSE("GPL v2");
+
+static int __init ti81xx_init(void)
+{
+	return platform_driver_probe(&ti81xx_usbss_driver, ti81xx_probe);
+}
+subsys_initcall(ti81xx_init);
+
+static void __exit ti81xx_exit(void)
+{
+	platform_driver_unregister(&ti81xx_usbss_driver);
+}
+module_exit(ti81xx_exit);
-- 
1.6.2.4

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Re: [PATCH 4/6] ti816evm: Add support for musb interface

[Sergei Shtylyov]

Hello.

On 26-08-2011 15:11, Ajay Kumar Gupta wrote:

> From: Ravi B <ravibabu@ti.com>

> Adding musb support in ti816 EVM board file.

> Signed-off-by: Ajay Kumar Gupta<ajay.gupta@ti.com>
> Signed-off-by: Ravi B<ravibabu@ti.com>

    As far as I know, full name is required in signoff.

> ---
>   arch/arm/mach-omap2/board-ti8168evm.c |   15 +++++++++++++++
>   1 files changed, 15 insertions(+), 0 deletions(-)

> diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
> index e516a04..77200d4 100644
> --- a/arch/arm/mach-omap2/board-ti8168evm.c
> +++ b/arch/arm/mach-omap2/board-ti8168evm.c
> @@ -23,6 +23,20 @@
>  #include<plat/irqs.h>
>  #include<plat/board.h>
>  #include<plat/common.h>
> +#include<plat/usb.h>
> +
> +static struct omap_musb_board_data musb_board_data = {
> +	.set_phy_power	= ti81xx_musb_phy_power,
> +	.interface_type	= MUSB_INTERFACE_ULPI,
> +#ifdef CONFIG_USB_MUSB_OTG
> +	.mode           = MUSB_OTG,
> +#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
> +	.mode           = MUSB_HOST,
> +#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
> +	.mode           = MUSB_PERIPHERAL,
> +#endif

    This #ifdef'ery is not longer necessary afetr this patch:

http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=75a14b1434a0ca409bcc8ab9b6b2e680796c487e

WBR, Sergei

Re: [PATCH 5/6] ti814evm: Add support for musb interface

[Sergei Shtylyov]

Hello.

On 26-08-2011 15:11, Ajay Kumar Gupta wrote:

> From: Ravi B<ravibabu-l0cyMroinI0@public.gmane.org>

> Adding musb support in ti814 EVM board file.

> Signed-off-by: Ajay Kumar Gupta<ajay.gupta-l0cyMroinI0@public.gmane.org>
> Signed-off-by: Ravi B<ravibabu-l0cyMroinI0@public.gmane.org>
> ---
>   arch/arm/mach-omap2/board-ti8148evm.c |   15 +++++++++++++++
>   1 files changed, 15 insertions(+), 0 deletions(-)

> diff --git a/arch/arm/mach-omap2/board-ti8148evm.c b/arch/arm/mach-omap2/board-ti8148evm.c
> index 588d6b7..d9c8505 100644
> --- a/arch/arm/mach-omap2/board-ti8148evm.c
> +++ b/arch/arm/mach-omap2/board-ti8148evm.c
> @@ -23,6 +23,20 @@
>   #include<plat/irqs.h>
>   #include<plat/board.h>
>   #include<plat/common.h>
> +#include<plat/usb.h>
> +
> +static struct omap_musb_board_data musb_board_data = {
> +	.set_phy_power	= ti81xx_musb_phy_power,
> +	.interface_type	= MUSB_INTERFACE_ULPI,
> +#ifdef CONFIG_USB_MUSB_OTG
> +	.mode           = MUSB_OTG,
> +#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
> +	.mode           = MUSB_HOST,
> +#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
> +	.mode           = MUSB_PERIPHERAL,
> +#endif

    Same comments as in the previous patch.

WBR, Sergei
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RE: [PATCH 4/6] ti816evm: Add support for musb interface

[Gupta, Ajay Kumar]

Hi,
> 
> On 26-08-2011 15:11, Ajay Kumar Gupta wrote:
> 
> > From: Ravi B <ravibabu-l0cyMroinI0@public.gmane.org>
> 
> > Adding musb support in ti816 EVM board file.
> 
> > Signed-off-by: Ajay Kumar Gupta<ajay.gupta-l0cyMroinI0@public.gmane.org>
> > Signed-off-by: Ravi B<ravibabu-l0cyMroinI0@public.gmane.org>
> 
>     As far as I know, full name is required in signoff.

Ok.

> 
> > ---
> >   arch/arm/mach-omap2/board-ti8168evm.c |   15 +++++++++++++++
> >   1 files changed, 15 insertions(+), 0 deletions(-)
> 
> > diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-
> omap2/board-ti8168evm.c
> > index e516a04..77200d4 100644
> > --- a/arch/arm/mach-omap2/board-ti8168evm.c
> > +++ b/arch/arm/mach-omap2/board-ti8168evm.c
> > @@ -23,6 +23,20 @@
> >  #include<plat/irqs.h>
> >  #include<plat/board.h>
> >  #include<plat/common.h>
> > +#include<plat/usb.h>
> > +
> > +static struct omap_musb_board_data musb_board_data = {
> > +	.set_phy_power	= ti81xx_musb_phy_power,
> > +	.interface_type	= MUSB_INTERFACE_ULPI,
> > +#ifdef CONFIG_USB_MUSB_OTG
> > +	.mode           = MUSB_OTG,
> > +#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
> > +	.mode           = MUSB_HOST,
> > +#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
> > +	.mode           = MUSB_PERIPHERAL,
> > +#endif
> 
>     This #ifdef'ery is not longer necessary afetr this patch:
> 
> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-
> 2.6.git;a=commit;h=75a14b1434a0ca409bcc8ab9b6b2e680796c487e

Got it, so it should be only.
+	.mode	= MUSB_OTG

Due to the below patch:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=622859634a663c5e55d0e2a2cdbb55ac058d97b3

The .mode is still being passed to musb->board_mode which is used for below definitions.
#define is_peripheral_enabled(musb)     ((musb)->board_mode != MUSB_HOST)
#define is_host_enabled(musb)           ((musb)->board_mode != MUSB_PERIPHERAL)
#define is_otg_enabled(musb)            ((musb)->board_mode == MUSB_OTG)


Thanks,
Ajay
> 
> WBR, Sergei
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Re: [PATCH 6/6] usb: musb: Add support for ti81xx platform

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1299 bytes --]

Hi,

On Fri, Aug 26, 2011 at 04:41:48PM +0530, Ajay Kumar Gupta wrote:
> @@ -57,6 +58,10 @@ config USB_MUSB_AM35X
>  	tristate "AM35x"
>  	depends on ARCH_OMAP
>  
> +config USB_MUSB_TI81XX
> +	bool "TI81XX"
> +	depends on SOC_OMAPTI81XX

this *must* be tristate. I can't emphasize enough how important this is.

> diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
> index 20a2873..07f3faf 100644
> --- a/drivers/usb/musb/musb_core.c
> +++ b/drivers/usb/musb/musb_core.c
> @@ -1014,7 +1014,9 @@ static void musb_shutdown(struct platform_device *pdev)
>  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS)		\
>  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)	\
>  	|| defined(CONFIG_USB_MUSB_AM35X)		\
> -	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)
> +	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)	\
> +	|| defined(CONFIG_USB_MUSB_TI81XX)		\
> +	|| defined(CONFIG_USB_MUSB_TI81XX_MODULE)

we really need to find a better way to handle this :-(

> diff --git a/drivers/usb/musb/ti81xx.c b/drivers/usb/musb/ti81xx.c
> new file mode 100644
> index 0000000..f95774e
> --- /dev/null
> +++ b/drivers/usb/musb/ti81xx.c

I still think this should be part of am35x.c It really look like they
are very similar.

on monday I'll read the rest of the file.

-- 
balbi

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RE: [PATCH 6/6] usb: musb: Add support for ti81xx platform

[Gupta, Ajay Kumar]

Hi,
> On Fri, Aug 26, 2011 at 04:41:48PM +0530, Ajay Kumar Gupta wrote:
> > @@ -57,6 +58,10 @@ config USB_MUSB_AM35X
> >  	tristate "AM35x"
> >  	depends on ARCH_OMAP
> >
> > +config USB_MUSB_TI81XX
> > +	bool "TI81XX"
> > +	depends on SOC_OMAPTI81XX
> 
> this *must* be tristate. I can't emphasize enough how important this
> is.

Ok.
> 
> > diff --git a/drivers/usb/musb/musb_core.c
> > b/drivers/usb/musb/musb_core.c index 20a2873..07f3faf 100644
> > --- a/drivers/usb/musb/musb_core.c
> > +++ b/drivers/usb/musb/musb_core.c
> > @@ -1014,7 +1014,9 @@ static void musb_shutdown(struct
> platform_device *pdev)
> >  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS)		\
> >  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)	\
> >  	|| defined(CONFIG_USB_MUSB_AM35X)		\
> > -	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)
> > +	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)	\
> > +	|| defined(CONFIG_USB_MUSB_TI81XX)		\
> > +	|| defined(CONFIG_USB_MUSB_TI81XX_MODULE)
> 
> we really need to find a better way to handle this :-(

How about passing the mode info from musb_config (musb->config->fifo_mode),
same way as musb->config->fifo_cfg 

Infact I think, we can kill musb->config->fifo_cfg and have only
musb->config->mode as in this way all the fifo tables will be at one
place and should help in maintenance.


> 
> > diff --git a/drivers/usb/musb/ti81xx.c b/drivers/usb/musb/ti81xx.c
> new
> > file mode 100644 index 0000000..f95774e
> > --- /dev/null
> > +++ b/drivers/usb/musb/ti81xx.c
> 
> I still think this should be part of am35x.c It really look like they
> are very similar.

Wrapper registers are different but I will see on this and provide you details
On how the merged file would look like. I am afraid that we may have to use
Either #ifdef or cpu_is_xxx().

> 
> on monday I'll read the rest of the file.
Ok.

Ajay
> 
> --
> balbi

Re: [PATCH 6/6] usb: musb: Add support for ti81xx platform

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 2126 bytes --]

Hi,

On Mon, Aug 29, 2011 at 11:01:54AM +0530, Gupta, Ajay Kumar wrote:
> > > diff --git a/drivers/usb/musb/musb_core.c
> > > b/drivers/usb/musb/musb_core.c index 20a2873..07f3faf 100644
> > > --- a/drivers/usb/musb/musb_core.c
> > > +++ b/drivers/usb/musb/musb_core.c
> > > @@ -1014,7 +1014,9 @@ static void musb_shutdown(struct
> > platform_device *pdev)
> > >  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS)		\
> > >  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)	\
> > >  	|| defined(CONFIG_USB_MUSB_AM35X)		\
> > > -	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)
> > > +	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)	\
> > > +	|| defined(CONFIG_USB_MUSB_TI81XX)		\
> > > +	|| defined(CONFIG_USB_MUSB_TI81XX_MODULE)
> > 
> > we really need to find a better way to handle this :-(
> 
> How about passing the mode info from musb_config (musb->config->fifo_mode),
> same way as musb->config->fifo_cfg 

not sure... Ideally we wouldn't really need those fifo tables, but I'm
still thinking how to properly do that.

> Infact I think, we can kill musb->config->fifo_cfg and have only
> musb->config->mode as in this way all the fifo tables will be at one
> place and should help in maintenance.

The idea of musb->config->fifo_cfg was to allow boards to pass their
optimal fifo table. If a certain product, knows it will only support
mass storage, why not letting them enable only those needed endpoints in
an optimized way (with double buffering, bulk combine/split, etc).

> > > diff --git a/drivers/usb/musb/ti81xx.c b/drivers/usb/musb/ti81xx.c
> > new
> > > file mode 100644 index 0000000..f95774e
> > > --- /dev/null
> > > +++ b/drivers/usb/musb/ti81xx.c
> > 
> > I still think this should be part of am35x.c It really look like they
> > are very similar.
> 
> Wrapper registers are different but I will see on this and provide you details
> On how the merged file would look like. I am afraid that we may have to use
> Either #ifdef or cpu_is_xxx().

we can use platform_device_id to cope with the differences :-) See how
I'm using it on dwc3 driver (Greg's usb-next branch).

-- 
balbi

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RE: [PATCH 6/6] usb: musb: Add support for ti81xx platform

[Gupta, Ajay Kumar]

Hi,
> > > we really need to find a better way to handle this :-(
> >
> > How about passing the mode info from musb_config (musb->config-
> >fifo_mode),
> > same way as musb->config->fifo_cfg
> 
> not sure... Ideally we wouldn't really need those fifo tables,

Yes, if all the board files provide their own fifo_cfg.

> but I'm still thinking how to properly do that.
> 
> > Infact I think, we can kill musb->config->fifo_cfg and have only
> > musb->config->mode as in this way all the fifo tables will be at one
> > place and should help in maintenance.
> 
> The idea of musb->config->fifo_cfg was to allow boards to pass their
> optimal fifo table. If a certain product, knows it will only support
> mass storage, why not letting them enable only those needed endpoints
> in an optimized way (with double buffering, bulk combine/split, etc).

Ok fine, understood.

> > Wrapper registers are different but I will see on this and provide
> you details
> > On how the merged file would look like. I am afraid that we may have
> to use
> > Either #ifdef or cpu_is_xxx().
> 
> we can use platform_device_id to cope with the differences :-) See how
> I'm using it on dwc3 driver (Greg's usb-next branch).

Please refer the usb section in below TRMs.
da8x (aka. am1x) at http://www.ti.com/lit/ug/sprufw6b/sprufw6b.pdf
am35x at http://www.ti.com/lit/ug/sprugr0b/sprugr0b.pdf
ti81x at http://www.ti.com/lit/ug/sprugx8/sprugx8.pdf

I have compiled the differences in the register map between am35x and
ti81xx and they are listed below.

===========================================================================
Register			am35x [has one musb]	ti81xx [two musb interface]
===========================================================================
REVISION			0x00				0x0000 -> for USBSS
								0x1000 -> for musb0
								0x1800 -> for musb1

ALL USBSS registers	Not present			Available from offset
								0x0000-0x0FFC

USB_CTRL_REG		0x04				0x1014  -> for musb0
								0x1814  -> for musb1

USB_STAT_REG		0x08				0x1018  -> for musb0
								0x1818  -> for musb1

USB_EMULATION_REG		0x0c				Not present
USB_AUTOREQ_REG		0x14				Not present
USB_SRP_FIX_TIME_REG	0x18				Not present
USB_TEARDOWN_REG		0x1c				Not present

USB_IRQ_MERGED_STATUS	Present as part of		0x1020 -> for musb0
				EP_INTR_x or CORE_INTR_x	0x1820 -> for musb1
				register in am35x but	
				at different offsets			
							
USB_IRQ_EOI			Same as above		0x1024 -> for musb0
								0x1824 -> for musb1
USB_IRQ_STATUS_RAW_0	Same as above		0x1028 -> for musb0
								0x1828 -> for musb1
USB_IRQ_STATUS_RAW_1	Same as above		0x102c -> for musb0
								0x182c -> for musb1
USB_IRQ_STATUS_0		Same as above		0x1030 -> for musb0
								0x1830 -> for musb1
USB_IRQ_STATUS_1		Same as above		0x1034 -> for musb0
								0x1834 -> for musb1
USB_IRQ_ENABLE_SET_0	Same as above		0x1038 -> for musb0
								0x1838 -> for musb1
USB_IRQ_ENABLE_SET_1	Same as above		0x103c -> for musb0
								0x183c -> for musb1
USB_IRQ_ENABLE_CLR_0	Same as above		0x1040 -> for musb0
								0x1840 -> for musb1
USB_IRQ_ENABLE_CLR_1	Same as above		0x1044 -> for musb0
								0x1844 -> for musb1

EP_INTR_SRC_REG			0x20			Present as part of 
								USB_IRQ_x register in
								ti81xx but at different
								offsets
EP_INTR_SRC_SET_REG		0x24				Same as above
EP_INTR_SRC_CLEAR_REG		0x28				Same as above
EP_INTR_MASK_REG			0x2c				Same as above
EP_INTR_MASK_SET_REG		0x30				Same as above
EP_INTR_MASK_CLEAR_REG		0x34				Same as above
EP_INTR_SRC_MASKED_REG		0x38				Same as above
CORE_INTR_SRC_REG			0x40				Same as above
CORE _INTR_SRC_SET_REG		0x44				Same as above
CORE _INTR_SRC_CLEAR_REG	0x48				Same as above
CORE _INTR_MASK_REG		0x4c				Same as above
CORE _INTR_MASK_SET_REG		0x50				Same as above
CORE _INTR_MASK_CLEAR_REG	0x54				Same as above
CORE _INTR_SRC_MASKED_REG	0x58				Same as above
USB_END_OF_INTR_REG		0x60				Same as above

CPPI4.1 DMA		
REVISION 				Not present			0x2000
TEARDOWN FREE DESCRIPTOR	Not present			0x2004
EMULATION CONTROL			Not present			0x2008

TxCh0 GLOBAL_CONFIG		0x1800			0x2800
RxCh0 GLOBAL_CONFIG 		0x1808			0x2808
RxCh0 HOST_PKT_CFG_A		0x180c			0x280c
RxCh0 HOST_PKT_CFG_B		0x1810			0x2810
Similarly for all Ch till Ch #29		

INTD REVISION			0x3000			Not present
INTD EOI				0x3010			Not present
INTD EOI Interrupt vector	0x3014			Not present
INTD STATUS REG			0x3200-0x32FC		Not present
QMGR REV				0x4000			0x4000

Rest of CPPI4.1 DMA register offset are same		
============================================================================

If you compare am35x and da8x then you would find that they are mostly same
and so should be merged. They both have one musb instances.

Ti81xx has two musb interface and huge differences in register map as listed
Above so ti81xx should be in a separate file.

Apart from this, am35 and da8x is not yet runtime pm compatible but the current
patches supporting ti81x is runtime pm compliant.

I think da8x and am35x files should be merged in a separate patch once they
are tested after the merge.

Ajay
> 
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Re: [PATCH 6/6] usb: musb: Add support for ti81xx platform

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 5202 bytes --]

Hi,

On Mon, Aug 29, 2011 at 03:16:55PM +0530, Gupta, Ajay Kumar wrote:
> I have compiled the differences in the register map between am35x and
> ti81xx and they are listed below.
> 
> ===========================================================================
> Register			am35x [has one musb]	ti81xx [two musb interface]
> ===========================================================================
> REVISION			0x00				0x0000 -> for USBSS
> 								0x1000 -> for musb0
> 								0x1800 -> for musb1
> 
> ALL USBSS registers	Not present			Available from offset
> 								0x0000-0x0FFC
> 
> USB_CTRL_REG		0x04				0x1014  -> for musb0
> 								0x1814  -> for musb1
> 
> USB_STAT_REG		0x08				0x1018  -> for musb0
> 								0x1818  -> for musb1
> 
> USB_EMULATION_REG		0x0c				Not present
> USB_AUTOREQ_REG		0x14				Not present
> USB_SRP_FIX_TIME_REG	0x18				Not present
> USB_TEARDOWN_REG		0x1c				Not present
> 
> USB_IRQ_MERGED_STATUS	Present as part of		0x1020 -> for musb0
> 				EP_INTR_x or CORE_INTR_x	0x1820 -> for musb1
> 				register in am35x but
> 				at different offsets
>
> USB_IRQ_EOI			Same as above		0x1024 -> for musb0
> 								0x1824 -> for musb1
> USB_IRQ_STATUS_RAW_0	Same as above		0x1028 -> for musb0
> 								0x1828 -> for musb1
> USB_IRQ_STATUS_RAW_1	Same as above		0x102c -> for musb0
> 								0x182c -> for musb1
> USB_IRQ_STATUS_0		Same as above		0x1030 -> for musb0
> 								0x1830 -> for musb1
> USB_IRQ_STATUS_1		Same as above		0x1034 -> for musb0
> 								0x1834 -> for musb1
> USB_IRQ_ENABLE_SET_0	Same as above		0x1038 -> for musb0
> 								0x1838 -> for musb1
> USB_IRQ_ENABLE_SET_1	Same as above		0x103c -> for musb0
> 								0x183c -> for musb1
> USB_IRQ_ENABLE_CLR_0	Same as above		0x1040 -> for musb0
> 								0x1840 -> for musb1
> USB_IRQ_ENABLE_CLR_1	Same as above		0x1044 -> for musb0
> 								0x1844 -> for musb1
> 
> EP_INTR_SRC_REG			0x20			Present as part of 
> 								USB_IRQ_x register in
> 								ti81xx but at different
> 								offsets
> EP_INTR_SRC_SET_REG		0x24				Same as above
> EP_INTR_SRC_CLEAR_REG		0x28				Same as above
> EP_INTR_MASK_REG			0x2c				Same as above
> EP_INTR_MASK_SET_REG		0x30				Same as above
> EP_INTR_MASK_CLEAR_REG		0x34				Same as above
> EP_INTR_SRC_MASKED_REG		0x38				Same as above
> CORE_INTR_SRC_REG			0x40				Same as above
> CORE _INTR_SRC_SET_REG		0x44				Same as above
> CORE _INTR_SRC_CLEAR_REG	0x48				Same as above
> CORE _INTR_MASK_REG		0x4c				Same as above
> CORE _INTR_MASK_SET_REG		0x50				Same as above
> CORE _INTR_MASK_CLEAR_REG	0x54				Same as above
> CORE _INTR_SRC_MASKED_REG	0x58				Same as above
> USB_END_OF_INTR_REG		0x60				Same as above
> 
> CPPI4.1 DMA		
> REVISION 				Not present			0x2000
> TEARDOWN FREE DESCRIPTOR	Not present			0x2004
> EMULATION CONTROL			Not present			0x2008
> 
> TxCh0 GLOBAL_CONFIG		0x1800			0x2800
> RxCh0 GLOBAL_CONFIG 		0x1808			0x2808
> RxCh0 HOST_PKT_CFG_A		0x180c			0x280c
> RxCh0 HOST_PKT_CFG_B		0x1810			0x2810
> Similarly for all Ch till Ch #29		
> 
> INTD REVISION			0x3000			Not present
> INTD EOI				0x3010			Not present
> INTD EOI Interrupt vector	0x3014			Not present
> INTD STATUS REG			0x3200-0x32FC		Not present
> QMGR REV				0x4000			0x4000
> 
> Rest of CPPI4.1 DMA register offset are same		
> ============================================================================
> 
> If you compare am35x and da8x then you would find that they are mostly same
> and so should be merged. They both have one musb instances.
> 
> Ti81xx has two musb interface and huge differences in register map as listed
> Above so ti81xx should be in a separate file.
> 
> Apart from this, am35 and da8x is not yet runtime pm compatible but the current
> patches supporting ti81x is runtime pm compliant.
> 
> I think da8x and am35x files should be merged in a separate patch once they
> are tested after the merge.

Sure, let's try to merge them as soon as possible. Now, about this one.
I still think the wrapper is essentially the same, but the memory map is
different, right ? I mean, the programming model of the wrapper and its
features are the same, correct ? So, how about you abstract the memory
map by passing the address offsets via driver_data ? The thing is that
this is all duplicated code in a sense. Although the register map is
different, the HW block is the same, isn't it ? Just a few tweaks to
support multiple musb instances. In that case, I'm not very keen on
letting yet another very similar file to be added.

How about you add a very clean musb-dsps.c file (btw, at some point, I
want all glue layers to have musb- prepended to them) which, for now,
only handles this new chip, but it has memory map passed in via
driver_data ? Then it should be very simple to convert davinci, da8xx
and am35x to the new file.

You will probably need to revisit the other device's TRM to see what
needs to be abstracted or flaged somehow. What is board-specific and
what is silicon-specific and that sort of thing. But it will be a very
nice exercise and the output will be the deletion of three very similar
files.

-- 
balbi

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RE: [PATCH 6/6] usb: musb: Add support for ti81xx platform

[Gupta, Ajay Kumar]

Hi,
> > If you compare am35x and da8x then you would find that they are
> mostly
> > same and so should be merged. They both have one musb instances.
> >
> > Ti81xx has two musb interface and huge differences in register map as
> > listed Above so ti81xx should be in a separate file.
> >
> > Apart from this, am35 and da8x is not yet runtime pm compatible but
> > the current patches supporting ti81x is runtime pm compliant.
> >
> > I think da8x and am35x files should be merged in a separate patch
> > once they are tested after the merge.

> Sure, let's try to merge them as soon as possible.

Ok.

> Now, about this one.
> I still think the wrapper is essentially the same, but the memory map
> is different, right ?

Yes, except that usbss related wrappers are completely new in ti81xx and
They are not present in am35x or da8xx or davinci series platforms.

> I mean, the programming model of the wrapper and
> its features are the same, correct ?

Yes.

> So, how about you abstract the
> memory map by passing the address offsets via driver_data ?

This sounds to be a cleaner way of doing this. Let me work on this and
propose something.

> The thing
> is that this is all duplicated code in a sense. Although the register
> map is different, the HW block is the same, isn't it ?
Yes.

> Just a few tweaks to support multiple musb instances.

Except that the complete new usbss wrapper.

> In that case, I'm not very keen on letting yet another very similar
> file to be added.

Let me collect all the details and discuss further on this.

> How about you add a very clean musb-dsps.c file (btw, at some point, I
> want all glue layers to have musb- prepended to them) which, for now,
> only handles this new chip, but it has memory map passed in via
> driver_data ? Then it should be very simple to convert davinci, da8xx
> and am35x to the new file.
Ok.

> 
> You will probably need to revisit the other device's TRM to see what
> needs to be abstracted or flaged somehow. What is board-specific and
> what is silicon-specific and that sort of thing. But it will be a very
> nice exercise and the output will be the deletion of three very similar
> files.
Ok.

Thanks,
Ajay
> 
> --
> balbi
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RE: [PATCH 6/6] usb: musb: Add support for ti81xx platform

[Gupta, Ajay Kumar]

Hi,
> > diff --git a/drivers/usb/musb/musb_core.c
> > b/drivers/usb/musb/musb_core.c index 20a2873..07f3faf 100644
> > --- a/drivers/usb/musb/musb_core.c
> > +++ b/drivers/usb/musb/musb_core.c
> > @@ -1014,7 +1014,9 @@ static void musb_shutdown(struct
> platform_device *pdev)
> >  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS)		\
> >  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)	\
> >  	|| defined(CONFIG_USB_MUSB_AM35X)		\
> > -	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)
> > +	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)	\
> > +	|| defined(CONFIG_USB_MUSB_TI81XX)		\
> > +	|| defined(CONFIG_USB_MUSB_TI81XX_MODULE)
> 
> we really need to find a better way to handle this :-(

We use to have 'fifo_mode' within 'struct musb_platform_ops' so shouldn't
It be brought back to fix this?

Thanks,
Ajay

> 
> > diff --git a/drivers/usb/musb/ti81xx.c b/drivers/usb/musb/ti81xx.c
> new
> > file mode 100644 index 0000000..f95774e
> > --- /dev/null
> > +++ b/drivers/usb/musb/ti81xx.c
> 
> I still think this should be part of am35x.c It really look like they
> are very similar.
> 
> on monday I'll read the rest of the file.
> 
> --
> balbi

Re: [PATCH 6/6] usb: musb: Add support for ti81xx platform

[Felipe Balbi]

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Hi,

On Tue, Sep 06, 2011 at 12:30:15PM +0530, Gupta, Ajay Kumar wrote:
> > > diff --git a/drivers/usb/musb/musb_core.c
> > > b/drivers/usb/musb/musb_core.c index 20a2873..07f3faf 100644
> > > --- a/drivers/usb/musb/musb_core.c
> > > +++ b/drivers/usb/musb/musb_core.c
> > > @@ -1014,7 +1014,9 @@ static void musb_shutdown(struct
> > platform_device *pdev)
> > >  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS)		\
> > >  	|| defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)	\
> > >  	|| defined(CONFIG_USB_MUSB_AM35X)		\
> > > -	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)
> > > +	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)	\
> > > +	|| defined(CONFIG_USB_MUSB_TI81XX)		\
> > > +	|| defined(CONFIG_USB_MUSB_TI81XX_MODULE)
> > 
> > we really need to find a better way to handle this :-(
> 
> We use to have 'fifo_mode' within 'struct musb_platform_ops' so shouldn't
> It be brought back to fix this?

no. I don't think that's a good idea. The best way would be for gadget
to tell us about all endpoints it will use in one go. Something like
usb_ep_request_array() (to match the gpio_request_array), with that, we
could allocate FIFO space based on how many endpoints will be used, in
fact.

But that's something for the future, for now the ifdef is the only way
:-(

-- 
balbi

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