* [PATCH] hpsa: do not attempt to read from a write-only register
@ 2011-07-21 18:16 Stephen M. Cameron
2011-07-21 18:17 ` Stephen Cameron
` (2 more replies)
0 siblings, 3 replies; 33+ messages in thread
From: Stephen M. Cameron @ 2011-07-21 18:16 UTC (permalink / raw)
To: james.bottomley
Cc: linux-scsi, linux-kernel, stephenmcameron, thenzl, akpm, mikem
From: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Most smartarrays tolerate it, but a few new ones don't.
Without this change some newer Smart Arrays will lock up
and i/o will grind to a halt.
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
---
drivers/scsi/hpsa.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
index 6d8dcd4..7f53cea 100644
--- a/drivers/scsi/hpsa.h
+++ b/drivers/scsi/hpsa.h
@@ -214,7 +214,7 @@ static void SA5_submit_command(struct ctlr_info *h,
dev_dbg(&h->pdev->dev, "Sending %x, tag = %x\n", c->busaddr,
c->Header.Tag.lower);
writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
- (void) readl(h->vaddr + SA5_REQUEST_PORT_OFFSET);
+ (void) readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
h->commands_outstanding++;
if (h->commands_outstanding > h->max_outstanding)
h->max_outstanding = h->commands_outstanding;
^ permalink raw reply related [flat|nested] 33+ messages in thread
* Re: [PATCH] hpsa: do not attempt to read from a write-only register
2011-07-21 18:16 [PATCH] hpsa: do not attempt to read from a write-only register Stephen M. Cameron
@ 2011-07-21 18:17 ` Stephen Cameron
2011-07-22 22:39 ` Andrew Morton
2011-09-01 15:24 ` [BUG] scsi: hpsa: how to destroy your files Eric Dumazet
2 siblings, 0 replies; 33+ messages in thread
From: Stephen Cameron @ 2011-07-21 18:17 UTC (permalink / raw)
To: Stephen M. Cameron
Cc: james.bottomley, linux-scsi, linux-kernel, thenzl, akpm, mikem
On Thu, Jul 21, 2011 at 1:16 PM, Stephen M. Cameron
<scameron@beardog.cce.hp.com> wrote:
> From: Stephen M. Cameron <scameron@beardog.cce.hp.com>
>
> Most smartarrays tolerate it, but a few new ones don't.
> Without this change some newer Smart Arrays will lock up
> and i/o will grind to a halt.
Noticed this wasn't in Linus's git tree yet, so resent it.
-- steve
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH] hpsa: do not attempt to read from a write-only register
2011-07-21 18:16 [PATCH] hpsa: do not attempt to read from a write-only register Stephen M. Cameron
@ 2011-07-22 22:39 ` Andrew Morton
2011-07-22 22:39 ` Andrew Morton
2011-09-01 15:24 ` [BUG] scsi: hpsa: how to destroy your files Eric Dumazet
2 siblings, 0 replies; 33+ messages in thread
From: Andrew Morton @ 2011-07-22 22:39 UTC (permalink / raw)
To: Stephen M. Cameron
Cc: james.bottomley, linux-scsi, linux-kernel, stephenmcameron,
thenzl, mikem, stable
On Thu, 21 Jul 2011 13:16:05 -0500
"Stephen M. Cameron" <scameron@beardog.cce.hp.com> wrote:
> From: Stephen M. Cameron <scameron@beardog.cce.hp.com>
>
> Most smartarrays tolerate it, but a few new ones don't.
> Without this change some newer Smart Arrays will lock up
> and i/o will grind to a halt.
>
> Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Cc: <stable@kernel.org>?
> diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
> index 6d8dcd4..7f53cea 100644
> --- a/drivers/scsi/hpsa.h
> +++ b/drivers/scsi/hpsa.h
> @@ -214,7 +214,7 @@ static void SA5_submit_command(struct ctlr_info *h,
> dev_dbg(&h->pdev->dev, "Sending %x, tag = %x\n", c->busaddr,
> c->Header.Tag.lower);
> writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
> - (void) readl(h->vaddr + SA5_REQUEST_PORT_OFFSET);
> + (void) readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
> h->commands_outstanding++;
> if (h->commands_outstanding > h->max_outstanding)
> h->max_outstanding = h->commands_outstanding;
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH] hpsa: do not attempt to read from a write-only register
@ 2011-07-22 22:39 ` Andrew Morton
0 siblings, 0 replies; 33+ messages in thread
From: Andrew Morton @ 2011-07-22 22:39 UTC (permalink / raw)
To: Stephen M. Cameron
Cc: linux-scsi, linux-kernel, stable, james.bottomley,
stephenmcameron, thenzl, mikem
On Thu, 21 Jul 2011 13:16:05 -0500
"Stephen M. Cameron" <scameron@beardog.cce.hp.com> wrote:
> From: Stephen M. Cameron <scameron@beardog.cce.hp.com>
>
> Most smartarrays tolerate it, but a few new ones don't.
> Without this change some newer Smart Arrays will lock up
> and i/o will grind to a halt.
>
> Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Cc: <stable@kernel.org>?
> diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
> index 6d8dcd4..7f53cea 100644
> --- a/drivers/scsi/hpsa.h
> +++ b/drivers/scsi/hpsa.h
> @@ -214,7 +214,7 @@ static void SA5_submit_command(struct ctlr_info *h,
> dev_dbg(&h->pdev->dev, "Sending %x, tag = %x\n", c->busaddr,
> c->Header.Tag.lower);
> writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
> - (void) readl(h->vaddr + SA5_REQUEST_PORT_OFFSET);
> + (void) readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
> h->commands_outstanding++;
> if (h->commands_outstanding > h->max_outstanding)
> h->max_outstanding = h->commands_outstanding;
_______________________________________________
stable mailing list
stable@linux.kernel.org
http://linux.kernel.org/mailman/listinfo/stable
^ permalink raw reply [flat|nested] 33+ messages in thread
* [BUG] scsi: hpsa: how to destroy your files
2011-07-21 18:16 [PATCH] hpsa: do not attempt to read from a write-only register Stephen M. Cameron
2011-07-21 18:17 ` Stephen Cameron
2011-07-22 22:39 ` Andrew Morton
@ 2011-09-01 15:24 ` Eric Dumazet
2011-09-01 16:07 ` scameron
2011-09-02 5:18 ` Mike Galbraith
2 siblings, 2 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-01 15:24 UTC (permalink / raw)
To: Stephen M. Cameron
Cc: james.bottomley, linux-scsi, linux-kernel, stephenmcameron,
thenzl, akpm, mikem
Stephen,
Current linux-3.1-rc4+ is a total disaster on my BL460c G6
Few seconds after boot, I get "cmd_alloc returned NULL" messages
or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
Usually lot of files are corrupted, fsck needed, and full distro
reinstall as well.
I tested on two different machines, same result.
Relevant hardware information :
Manufacturer: HP
Product Name: ProLiant BL460c G6
Version: I24
Release Date: 05/05/2011
Intel(R) Xeon(R) CPU E5540 @ 2.53GHz (two sockets)
0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6
controllers (rev 01)
Subsystem: Hewlett-Packard Company Smart Array P410i
Flags: bus master, fast devsel, latency 0, IRQ 16
Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
I/O ports at 4000 [size=256]
[virtual] Expansion ROM at e7200000 [disabled] [size=512K]
Capabilities: [40] Power Management version 3
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Capabilities: [70] Express Endpoint, MSI 00
Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
Capabilities: [100] Advanced Error Reporting
Kernel driver in use: hpsa
# hpacucli ctrl all show config detail
Smart Array P410i in Slot 0 (Embedded)
Bus Interface: PCI
Slot: 0
Serial Number: 5001438006F44240
RAID 6 (ADG) Status: Disabled
Controller Status: OK
Chassis Slot:
Hardware Revision: Rev C
Firmware Version: 2.50
Rebuild Priority: Medium
Expand Priority: Medium
Surface Scan Delay: 15 secs
Surface Scan Mode: Idle
Wait for Cache Room: Disabled
Surface Analysis Inconsistency Notification: Disabled
Post Prompt Timeout: 0 secs
Cache Board Present: False
Drive Write Cache: Disabled
SATA NCQ Supported: True
Array: A
Interface Type: SATA
Unused Space: 0 MB
Status: OK
Logical Drive: 1
Size: 232.9 GB
Fault Tolerance: RAID 1
Heads: 255
Sectors Per Track: 32
Cylinders: 59844
Strip Size: 128 KB
Status: OK
Unique Identifier: 600508B1001030364634343234300F00
Disk Name: /dev/cciss/c0d0
Mount Points: / 9.3 GB, /home 216.0 GB
OS Status: LOCKED
Logical Drive Label: A0124E845001438006F442403033
Mirror Group 0:
physicaldrive 1I:1:1 (port 1I:box 1:bay 1, SATA, 250 GB, OK)
Mirror Group 1:
physicaldrive 1I:1:2 (port 1I:box 1:bay 2, SATA, 250 GB, OK)
physicaldrive 1I:1:1
Port: 1I
Box: 1
Bay: 1
Status: OK
Drive Type: Data Drive
Interface Type: SATA
Size: 250 GB
Firmware Revision: HPG2
Serial Number: K648T9C27M8E
Model: ATA GJ0250EAGSQ
SATA NCQ Capable: True
SATA NCQ Enabled: True
PHY Count: 1
PHY Transfer Rate: 3.0GBPS
physicaldrive 1I:1:2
Port: 1I
Box: 1
Bay: 2
Status: OK
Drive Type: Data Drive
Interface Type: SATA
Size: 250 GB
Firmware Revision: HPG2
Serial Number: K648T9C27M49
Model: ATA GJ0250EAGSQ
SATA NCQ Capable: True
SATA NCQ Enabled: True
PHY Count: 1
PHY Transfer Rate: 3.0GBPS
64 bit kernel, 4GB of memory
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 15:24 ` [BUG] scsi: hpsa: how to destroy your files Eric Dumazet
@ 2011-09-01 16:07 ` scameron
2011-09-01 16:18 ` Eric Dumazet
2011-09-01 17:40 ` Eric Dumazet
2011-09-02 5:18 ` Mike Galbraith
1 sibling, 2 replies; 33+ messages in thread
From: scameron @ 2011-09-01 16:07 UTC (permalink / raw)
To: Eric Dumazet
Cc: james.bottomley, linux-scsi, linux-kernel, stephenmcameron,
thenzl, akpm, mikem, scameron
On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> Stephen,
>
> Current linux-3.1-rc4+ is a total disaster on my BL460c G6
What kernel were you running successfully previously?
I saw similar on BL460cG7 on Friday with 3.1-rc4,
but I'm not sure the problem is in the driver.
I installed rhel6.1, then put 3.1-rc4 on. Turning off
"Virtualization" in the kernel config seemed to help
(allowed it to boot) and so I thought that must have
been the source of the issue. So, you might try that.
However, I rebooted that machine just now, and
now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
message, so that's pretty weird.
The cmd_alloc failure, I didn't see, but I may have missed it
(didn't have console directed to serial output.)
cmd_alloc failing is not generally expected, as we reserve enough
commands that the upper layers should never exhaust them all (should
honor hpsa's max request limit), so that's pretty weird that
you're seeing that.
I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
for example) and I don't think there are any hpsa changes between rc3
and rc4. (haven't tried rc4 on the dl380g7 yet).
So, I'm not sure what's going on with the BL460c yet, but I am
aware of the problem and have already seen it. I can't think of
any driver changes lately which should be causing such
changes in behavior.
-- steve
>
>
> Few seconds after boot, I get "cmd_alloc returned NULL" messages
> or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
>
> Usually lot of files are corrupted, fsck needed, and full distro
> reinstall as well.
>
> I tested on two different machines, same result.
>
> Relevant hardware information :
>
> Manufacturer: HP
> Product Name: ProLiant BL460c G6
> Version: I24
> Release Date: 05/05/2011
> Intel(R) Xeon(R) CPU E5540 @ 2.53GHz (two sockets)
>
> 0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6
> controllers (rev 01)
> Subsystem: Hewlett-Packard Company Smart Array P410i
> Flags: bus master, fast devsel, latency 0, IRQ 16
> Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
> Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
> I/O ports at 4000 [size=256]
> [virtual] Expansion ROM at e7200000 [disabled] [size=512K]
> Capabilities: [40] Power Management version 3
> Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> Capabilities: [70] Express Endpoint, MSI 00
> Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
> Capabilities: [100] Advanced Error Reporting
> Kernel driver in use: hpsa
>
> # hpacucli ctrl all show config detail
>
> Smart Array P410i in Slot 0 (Embedded)
> Bus Interface: PCI
> Slot: 0
> Serial Number: 5001438006F44240
> RAID 6 (ADG) Status: Disabled
> Controller Status: OK
> Chassis Slot:
> Hardware Revision: Rev C
> Firmware Version: 2.50
> Rebuild Priority: Medium
> Expand Priority: Medium
> Surface Scan Delay: 15 secs
> Surface Scan Mode: Idle
> Wait for Cache Room: Disabled
> Surface Analysis Inconsistency Notification: Disabled
> Post Prompt Timeout: 0 secs
> Cache Board Present: False
> Drive Write Cache: Disabled
> SATA NCQ Supported: True
>
> Array: A
> Interface Type: SATA
> Unused Space: 0 MB
> Status: OK
>
>
>
> Logical Drive: 1
> Size: 232.9 GB
> Fault Tolerance: RAID 1
> Heads: 255
> Sectors Per Track: 32
> Cylinders: 59844
> Strip Size: 128 KB
> Status: OK
> Unique Identifier: 600508B1001030364634343234300F00
> Disk Name: /dev/cciss/c0d0
> Mount Points: / 9.3 GB, /home 216.0 GB
> OS Status: LOCKED
> Logical Drive Label: A0124E845001438006F442403033
> Mirror Group 0:
> physicaldrive 1I:1:1 (port 1I:box 1:bay 1, SATA, 250 GB, OK)
> Mirror Group 1:
> physicaldrive 1I:1:2 (port 1I:box 1:bay 2, SATA, 250 GB, OK)
>
> physicaldrive 1I:1:1
> Port: 1I
> Box: 1
> Bay: 1
> Status: OK
> Drive Type: Data Drive
> Interface Type: SATA
> Size: 250 GB
> Firmware Revision: HPG2
> Serial Number: K648T9C27M8E
> Model: ATA GJ0250EAGSQ
> SATA NCQ Capable: True
> SATA NCQ Enabled: True
> PHY Count: 1
> PHY Transfer Rate: 3.0GBPS
>
> physicaldrive 1I:1:2
> Port: 1I
> Box: 1
> Bay: 2
> Status: OK
> Drive Type: Data Drive
> Interface Type: SATA
> Size: 250 GB
> Firmware Revision: HPG2
> Serial Number: K648T9C27M49
> Model: ATA GJ0250EAGSQ
> SATA NCQ Capable: True
> SATA NCQ Enabled: True
> PHY Count: 1
> PHY Transfer Rate: 3.0GBPS
>
>
>
> 64 bit kernel, 4GB of memory
>
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 16:07 ` scameron
@ 2011-09-01 16:18 ` Eric Dumazet
2011-09-01 17:40 ` Eric Dumazet
1 sibling, 0 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-01 16:18 UTC (permalink / raw)
To: scameron
Cc: james.bottomley, linux-scsi, linux-kernel, stephenmcameron,
thenzl, akpm, mikem
Le jeudi 01 septembre 2011 à 11:07 -0500, scameron@beardog.cce.hp.com a
écrit :
> On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> > Stephen,
> >
> > Current linux-3.1-rc4+ is a total disaster on my BL460c G6
>
> What kernel were you running successfully previously?
>
> I saw similar on BL460cG7 on Friday with 3.1-rc4,
> but I'm not sure the problem is in the driver.
> I installed rhel6.1, then put 3.1-rc4 on. Turning off
> "Virtualization" in the kernel config seemed to help
> (allowed it to boot) and so I thought that must have
> been the source of the issue. So, you might try that.
>
> However, I rebooted that machine just now, and
> now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> message, so that's pretty weird.
>
> The cmd_alloc failure, I didn't see, but I may have missed it
> (didn't have console directed to serial output.)
>
> cmd_alloc failing is not generally expected, as we reserve enough
> commands that the upper layers should never exhaust them all (should
> honor hpsa's max request limit), so that's pretty weird that
> you're seeing that.
>
> I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
> for example) and I don't think there are any hpsa changes between rc3
> and rc4. (haven't tried rc4 on the dl380g7 yet).
>
> So, I'm not sure what's going on with the BL460c yet, but I am
> aware of the problem and have already seen it. I can't think of
> any driver changes lately which should be causing such
> changes in behavior.
>
> -- steve
Here is my current bisection log
git bisect start
# bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge
git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
# good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
# bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch
'for-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
# good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch
'staging-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
I'll let you know if I can bisect before destroying (again) my distro
(I re-installed a fresh debian wheezy/sid)
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
@ 2011-09-01 16:18 ` Eric Dumazet
0 siblings, 0 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-01 16:18 UTC (permalink / raw)
To: scameron
Cc: james.bottomley, linux-scsi, linux-kernel, stephenmcameron,
thenzl, akpm, mikem
Le jeudi 01 septembre 2011 à 11:07 -0500, scameron@beardog.cce.hp.com a
écrit :
> On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> > Stephen,
> >
> > Current linux-3.1-rc4+ is a total disaster on my BL460c G6
>
> What kernel were you running successfully previously?
>
> I saw similar on BL460cG7 on Friday with 3.1-rc4,
> but I'm not sure the problem is in the driver.
> I installed rhel6.1, then put 3.1-rc4 on. Turning off
> "Virtualization" in the kernel config seemed to help
> (allowed it to boot) and so I thought that must have
> been the source of the issue. So, you might try that.
>
> However, I rebooted that machine just now, and
> now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> message, so that's pretty weird.
>
> The cmd_alloc failure, I didn't see, but I may have missed it
> (didn't have console directed to serial output.)
>
> cmd_alloc failing is not generally expected, as we reserve enough
> commands that the upper layers should never exhaust them all (should
> honor hpsa's max request limit), so that's pretty weird that
> you're seeing that.
>
> I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
> for example) and I don't think there are any hpsa changes between rc3
> and rc4. (haven't tried rc4 on the dl380g7 yet).
>
> So, I'm not sure what's going on with the BL460c yet, but I am
> aware of the problem and have already seen it. I can't think of
> any driver changes lately which should be causing such
> changes in behavior.
>
> -- steve
Here is my current bisection log
git bisect start
# bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge
git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
# good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
# bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch
'for-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
# good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch
'staging-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
I'll let you know if I can bisect before destroying (again) my distro
(I re-installed a fresh debian wheezy/sid)
--
To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 16:07 ` scameron
@ 2011-09-01 17:40 ` Eric Dumazet
2011-09-01 17:40 ` Eric Dumazet
1 sibling, 0 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-01 17:40 UTC (permalink / raw)
To: scameron, Jon Mason, Jesse Barnes
Cc: james.bottomley, linux-scsi, linux-kernel, stephenmcameron,
thenzl, akpm, mikem
Le jeudi 01 septembre 2011 à 11:07 -0500, scameron@beardog.cce.hp.com a
écrit :
> On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> > Stephen,
> >
> > Current linux-3.1-rc4+ is a total disaster on my BL460c G6
>
> What kernel were you running successfully previously?
>
> I saw similar on BL460cG7 on Friday with 3.1-rc4,
> but I'm not sure the problem is in the driver.
> I installed rhel6.1, then put 3.1-rc4 on. Turning off
> "Virtualization" in the kernel config seemed to help
> (allowed it to boot) and so I thought that must have
> been the source of the issue. So, you might try that.
>
> However, I rebooted that machine just now, and
> now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> message, so that's pretty weird.
>
> The cmd_alloc failure, I didn't see, but I may have missed it
> (didn't have console directed to serial output.)
>
> cmd_alloc failing is not generally expected, as we reserve enough
> commands that the upper layers should never exhaust them all (should
> honor hpsa's max request limit), so that's pretty weird that
> you're seeing that.
>
> I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
> for example) and I don't think there are any hpsa changes between rc3
> and rc4. (haven't tried rc4 on the dl380g7 yet).
>
> So, I'm not sure what's going on with the BL460c yet, but I am
> aware of the problem and have already seen it. I can't think of
> any driver changes lately which should be causing such
> changes in behavior.
>
> -- steve
>
>
OK I found the bad commit,I got lucky... I lost some files but my
machine was able to complete the bisection. CC involved people
git bisect start
# bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
# good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
# bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
# good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch 'staging-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
# good: [291b63c86aea8a571ddf913d41ab5156b8314dad] Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
git bisect good 291b63c86aea8a571ddf913d41ab5156b8314dad
# good: [aa462abe8aaf2198d6aef97da20c874ac694a39f] mm: fix __page_to_pfn for a const struct page argument
git bisect good aa462abe8aaf2198d6aef97da20c874ac694a39f
# good: [5c80c71b9a0ec518b4b58d2a61de01a04f4a4453] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
git bisect good 5c80c71b9a0ec518b4b58d2a61de01a04f4a4453
# good: [2c4ac99f983f1341b5962a16b5e8de6049bf10b5] Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
git bisect good 2c4ac99f983f1341b5962a16b5e8de6049bf10b5
# bad: [0a2daa1cf35004f5adbf4138555cc5669abf3a3e] PCI: make cardbus-bridge resources optional
git bisect bad 0a2daa1cf35004f5adbf4138555cc5669abf3a3e
# bad: [be768912a49b10b68e96fbd8fa3cab0adfbd3091] PCI: honor child buses add_size in hot plug configuration
git bisect bad be768912a49b10b68e96fbd8fa3cab0adfbd3091
# bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
git bisect bad b03e7495a862b028294f59fc87286d6d78ee7fa1
commit b03e7495a862b028294f59fc87286d6d78ee7fa1
Author: Jon Mason <mason@myri.com>
Date: Wed Jul 20 15:20:54 2011 -0500
PCI: Set PCI-E Max Payload Size on fabric
On a given PCI-E fabric, each device, bridge, and root port can have a
different PCI-E maximum payload size. There is a sizable performance
boost for having the largest possible maximum payload size on each PCI-E
device. However, if improperly configured, fatal bus errors can occur.
Thus, it is important to ensure that PCI-E payloads sends by a device
are never larger than the MPS setting of all devices on the way to the
destination.
This can be achieved two ways:
- A conservative approach is to use the smallest common denominator of
the entire tree below a root complex for every device on that fabric.
This means for example that having a 128 bytes MPS USB controller on one
leg of a switch will dramatically reduce performances of a video card or
10GE adapter on another leg of that same switch.
It also means that any hierarchy supporting hotplug slots (including
expresscard or thunderbolt I suppose, dbl check that) will have to be
entirely clamped to 128 bytes since we cannot predict what will be
plugged into those slots, and we cannot change the MPS on a "live"
system.
- A more optimal way is possible, if it falls within a couple of
constraints:
* The top-level host bridge will never generate packets larger than the
smallest TLP (or if it can be controlled independently from its MPS at
least)
* The device will never generate packets larger than MPS (which can be
configured via MRRS)
* No support of direct PCI-E <-> PCI-E transfers between devices without
some additional code to specifically deal with that case
Then we can use an approach that basically ignores downstream requests
and focuses exclusively on upstream requests. In that case, all we need
to care about is that a device MPS is no larger than its parent MPS,
which allows us to keep all switches/bridges to the max MPS supported by
their parent and eventually the PHB.
In this case, your USB controller would no longer "starve" your 10GE
Ethernet and your hotplug slots won't affect your global MPS.
Additionally, the hotplugged devices themselves can be configured to a
larger MPS up to the value configured in the hotplug bridge.
To choose between the two available options, two PCI kernel boot args
have been added to the PCI calls. "pcie_bus_safe" will provide the
former behavior, while "pcie_bus_perf" will perform the latter behavior.
By default, the latter behavior is used.
NOTE: due to the location of the enablement, each arch will need to add
calls to this function. This patch only enables x86.
This patch includes a number of changes recommended by Benjamin
Herrenschmidt.
Tested-by: Jordan_Hargrave@dell.com
Signed-off-by: Jon Mason <mason@myri.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >
> >
> > Few seconds after boot, I get "cmd_alloc returned NULL" messages
> > or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> >
> > Usually lot of files are corrupted, fsck needed, and full distro
> > reinstall as well.
> >
> > I tested on two different machines, same result.
> >
> > Relevant hardware information :
> >
> > Manufacturer: HP
> > Product Name: ProLiant BL460c G6
> > Version: I24
> > Release Date: 05/05/2011
> > Intel(R) Xeon(R) CPU E5540 @ 2.53GHz (two sockets)
> >
> > 0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6
> > controllers (rev 01)
> > Subsystem: Hewlett-Packard Company Smart Array P410i
> > Flags: bus master, fast devsel, latency 0, IRQ 16
> > Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
> > Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
> > I/O ports at 4000 [size=256]
> > [virtual] Expansion ROM at e7200000 [disabled] [size=512K]
> > Capabilities: [40] Power Management version 3
> > Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> > Capabilities: [70] Express Endpoint, MSI 00
> > Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
> > Capabilities: [100] Advanced Error Reporting
> > Kernel driver in use: hpsa
> >
> > # hpacucli ctrl all show config detail
> >
> > Smart Array P410i in Slot 0 (Embedded)
> > Bus Interface: PCI
> > Slot: 0
> > Serial Number: 5001438006F44240
> > RAID 6 (ADG) Status: Disabled
> > Controller Status: OK
> > Chassis Slot:
> > Hardware Revision: Rev C
> > Firmware Version: 2.50
> > Rebuild Priority: Medium
> > Expand Priority: Medium
> > Surface Scan Delay: 15 secs
> > Surface Scan Mode: Idle
> > Wait for Cache Room: Disabled
> > Surface Analysis Inconsistency Notification: Disabled
> > Post Prompt Timeout: 0 secs
> > Cache Board Present: False
> > Drive Write Cache: Disabled
> > SATA NCQ Supported: True
> >
> > Array: A
> > Interface Type: SATA
> > Unused Space: 0 MB
> > Status: OK
> >
> >
> >
> > Logical Drive: 1
> > Size: 232.9 GB
> > Fault Tolerance: RAID 1
> > Heads: 255
> > Sectors Per Track: 32
> > Cylinders: 59844
> > Strip Size: 128 KB
> > Status: OK
> > Unique Identifier: 600508B1001030364634343234300F00
> > Disk Name: /dev/cciss/c0d0
> > Mount Points: / 9.3 GB, /home 216.0 GB
> > OS Status: LOCKED
> > Logical Drive Label: A0124E845001438006F442403033
> > Mirror Group 0:
> > physicaldrive 1I:1:1 (port 1I:box 1:bay 1, SATA, 250 GB, OK)
> > Mirror Group 1:
> > physicaldrive 1I:1:2 (port 1I:box 1:bay 2, SATA, 250 GB, OK)
> >
> > physicaldrive 1I:1:1
> > Port: 1I
> > Box: 1
> > Bay: 1
> > Status: OK
> > Drive Type: Data Drive
> > Interface Type: SATA
> > Size: 250 GB
> > Firmware Revision: HPG2
> > Serial Number: K648T9C27M8E
> > Model: ATA GJ0250EAGSQ
> > SATA NCQ Capable: True
> > SATA NCQ Enabled: True
> > PHY Count: 1
> > PHY Transfer Rate: 3.0GBPS
> >
> > physicaldrive 1I:1:2
> > Port: 1I
> > Box: 1
> > Bay: 2
> > Status: OK
> > Drive Type: Data Drive
> > Interface Type: SATA
> > Size: 250 GB
> > Firmware Revision: HPG2
> > Serial Number: K648T9C27M49
> > Model: ATA GJ0250EAGSQ
> > SATA NCQ Capable: True
> > SATA NCQ Enabled: True
> > PHY Count: 1
> > PHY Transfer Rate: 3.0GBPS
> >
> >
> >
> > 64 bit kernel, 4GB of memory
> >
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
@ 2011-09-01 17:40 ` Eric Dumazet
0 siblings, 0 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-01 17:40 UTC (permalink / raw)
To: scameron, Jon Mason, Jesse Barnes
Cc: james.bottomley, linux-scsi, linux-kernel, stephenmcameron,
thenzl, akpm, mikem
Le jeudi 01 septembre 2011 à 11:07 -0500, scameron@beardog.cce.hp.com a
écrit :
> On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> > Stephen,
> >
> > Current linux-3.1-rc4+ is a total disaster on my BL460c G6
>
> What kernel were you running successfully previously?
>
> I saw similar on BL460cG7 on Friday with 3.1-rc4,
> but I'm not sure the problem is in the driver.
> I installed rhel6.1, then put 3.1-rc4 on. Turning off
> "Virtualization" in the kernel config seemed to help
> (allowed it to boot) and so I thought that must have
> been the source of the issue. So, you might try that.
>
> However, I rebooted that machine just now, and
> now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> message, so that's pretty weird.
>
> The cmd_alloc failure, I didn't see, but I may have missed it
> (didn't have console directed to serial output.)
>
> cmd_alloc failing is not generally expected, as we reserve enough
> commands that the upper layers should never exhaust them all (should
> honor hpsa's max request limit), so that's pretty weird that
> you're seeing that.
>
> I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
> for example) and I don't think there are any hpsa changes between rc3
> and rc4. (haven't tried rc4 on the dl380g7 yet).
>
> So, I'm not sure what's going on with the BL460c yet, but I am
> aware of the problem and have already seen it. I can't think of
> any driver changes lately which should be causing such
> changes in behavior.
>
> -- steve
>
>
OK I found the bad commit,I got lucky... I lost some files but my
machine was able to complete the bisection. CC involved people
git bisect start
# bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
# good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
# bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
# good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch 'staging-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
# good: [291b63c86aea8a571ddf913d41ab5156b8314dad] Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
git bisect good 291b63c86aea8a571ddf913d41ab5156b8314dad
# good: [aa462abe8aaf2198d6aef97da20c874ac694a39f] mm: fix __page_to_pfn for a const struct page argument
git bisect good aa462abe8aaf2198d6aef97da20c874ac694a39f
# good: [5c80c71b9a0ec518b4b58d2a61de01a04f4a4453] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
git bisect good 5c80c71b9a0ec518b4b58d2a61de01a04f4a4453
# good: [2c4ac99f983f1341b5962a16b5e8de6049bf10b5] Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
git bisect good 2c4ac99f983f1341b5962a16b5e8de6049bf10b5
# bad: [0a2daa1cf35004f5adbf4138555cc5669abf3a3e] PCI: make cardbus-bridge resources optional
git bisect bad 0a2daa1cf35004f5adbf4138555cc5669abf3a3e
# bad: [be768912a49b10b68e96fbd8fa3cab0adfbd3091] PCI: honor child buses add_size in hot plug configuration
git bisect bad be768912a49b10b68e96fbd8fa3cab0adfbd3091
# bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
git bisect bad b03e7495a862b028294f59fc87286d6d78ee7fa1
commit b03e7495a862b028294f59fc87286d6d78ee7fa1
Author: Jon Mason <mason@myri.com>
Date: Wed Jul 20 15:20:54 2011 -0500
PCI: Set PCI-E Max Payload Size on fabric
On a given PCI-E fabric, each device, bridge, and root port can have a
different PCI-E maximum payload size. There is a sizable performance
boost for having the largest possible maximum payload size on each PCI-E
device. However, if improperly configured, fatal bus errors can occur.
Thus, it is important to ensure that PCI-E payloads sends by a device
are never larger than the MPS setting of all devices on the way to the
destination.
This can be achieved two ways:
- A conservative approach is to use the smallest common denominator of
the entire tree below a root complex for every device on that fabric.
This means for example that having a 128 bytes MPS USB controller on one
leg of a switch will dramatically reduce performances of a video card or
10GE adapter on another leg of that same switch.
It also means that any hierarchy supporting hotplug slots (including
expresscard or thunderbolt I suppose, dbl check that) will have to be
entirely clamped to 128 bytes since we cannot predict what will be
plugged into those slots, and we cannot change the MPS on a "live"
system.
- A more optimal way is possible, if it falls within a couple of
constraints:
* The top-level host bridge will never generate packets larger than the
smallest TLP (or if it can be controlled independently from its MPS at
least)
* The device will never generate packets larger than MPS (which can be
configured via MRRS)
* No support of direct PCI-E <-> PCI-E transfers between devices without
some additional code to specifically deal with that case
Then we can use an approach that basically ignores downstream requests
and focuses exclusively on upstream requests. In that case, all we need
to care about is that a device MPS is no larger than its parent MPS,
which allows us to keep all switches/bridges to the max MPS supported by
their parent and eventually the PHB.
In this case, your USB controller would no longer "starve" your 10GE
Ethernet and your hotplug slots won't affect your global MPS.
Additionally, the hotplugged devices themselves can be configured to a
larger MPS up to the value configured in the hotplug bridge.
To choose between the two available options, two PCI kernel boot args
have been added to the PCI calls. "pcie_bus_safe" will provide the
former behavior, while "pcie_bus_perf" will perform the latter behavior.
By default, the latter behavior is used.
NOTE: due to the location of the enablement, each arch will need to add
calls to this function. This patch only enables x86.
This patch includes a number of changes recommended by Benjamin
Herrenschmidt.
Tested-by: Jordan_Hargrave@dell.com
Signed-off-by: Jon Mason <mason@myri.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >
> >
> > Few seconds after boot, I get "cmd_alloc returned NULL" messages
> > or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> >
> > Usually lot of files are corrupted, fsck needed, and full distro
> > reinstall as well.
> >
> > I tested on two different machines, same result.
> >
> > Relevant hardware information :
> >
> > Manufacturer: HP
> > Product Name: ProLiant BL460c G6
> > Version: I24
> > Release Date: 05/05/2011
> > Intel(R) Xeon(R) CPU E5540 @ 2.53GHz (two sockets)
> >
> > 0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6
> > controllers (rev 01)
> > Subsystem: Hewlett-Packard Company Smart Array P410i
> > Flags: bus master, fast devsel, latency 0, IRQ 16
> > Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
> > Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
> > I/O ports at 4000 [size=256]
> > [virtual] Expansion ROM at e7200000 [disabled] [size=512K]
> > Capabilities: [40] Power Management version 3
> > Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> > Capabilities: [70] Express Endpoint, MSI 00
> > Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
> > Capabilities: [100] Advanced Error Reporting
> > Kernel driver in use: hpsa
> >
> > # hpacucli ctrl all show config detail
> >
> > Smart Array P410i in Slot 0 (Embedded)
> > Bus Interface: PCI
> > Slot: 0
> > Serial Number: 5001438006F44240
> > RAID 6 (ADG) Status: Disabled
> > Controller Status: OK
> > Chassis Slot:
> > Hardware Revision: Rev C
> > Firmware Version: 2.50
> > Rebuild Priority: Medium
> > Expand Priority: Medium
> > Surface Scan Delay: 15 secs
> > Surface Scan Mode: Idle
> > Wait for Cache Room: Disabled
> > Surface Analysis Inconsistency Notification: Disabled
> > Post Prompt Timeout: 0 secs
> > Cache Board Present: False
> > Drive Write Cache: Disabled
> > SATA NCQ Supported: True
> >
> > Array: A
> > Interface Type: SATA
> > Unused Space: 0 MB
> > Status: OK
> >
> >
> >
> > Logical Drive: 1
> > Size: 232.9 GB
> > Fault Tolerance: RAID 1
> > Heads: 255
> > Sectors Per Track: 32
> > Cylinders: 59844
> > Strip Size: 128 KB
> > Status: OK
> > Unique Identifier: 600508B1001030364634343234300F00
> > Disk Name: /dev/cciss/c0d0
> > Mount Points: / 9.3 GB, /home 216.0 GB
> > OS Status: LOCKED
> > Logical Drive Label: A0124E845001438006F442403033
> > Mirror Group 0:
> > physicaldrive 1I:1:1 (port 1I:box 1:bay 1, SATA, 250 GB, OK)
> > Mirror Group 1:
> > physicaldrive 1I:1:2 (port 1I:box 1:bay 2, SATA, 250 GB, OK)
> >
> > physicaldrive 1I:1:1
> > Port: 1I
> > Box: 1
> > Bay: 1
> > Status: OK
> > Drive Type: Data Drive
> > Interface Type: SATA
> > Size: 250 GB
> > Firmware Revision: HPG2
> > Serial Number: K648T9C27M8E
> > Model: ATA GJ0250EAGSQ
> > SATA NCQ Capable: True
> > SATA NCQ Enabled: True
> > PHY Count: 1
> > PHY Transfer Rate: 3.0GBPS
> >
> > physicaldrive 1I:1:2
> > Port: 1I
> > Box: 1
> > Bay: 2
> > Status: OK
> > Drive Type: Data Drive
> > Interface Type: SATA
> > Size: 250 GB
> > Firmware Revision: HPG2
> > Serial Number: K648T9C27M49
> > Model: ATA GJ0250EAGSQ
> > SATA NCQ Capable: True
> > SATA NCQ Enabled: True
> > PHY Count: 1
> > PHY Transfer Rate: 3.0GBPS
> >
> >
> >
> > 64 bit kernel, 4GB of memory
> >
--
To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 17:40 ` Eric Dumazet
(?)
@ 2011-09-01 17:58 ` Roland Dreier
2011-09-01 18:50 ` James Bottomley
2011-09-01 19:36 ` Eric Dumazet
-1 siblings, 2 replies; 33+ messages in thread
From: Roland Dreier @ 2011-09-01 17:58 UTC (permalink / raw)
To: Eric Dumazet
Cc: scameron, Jon Mason, Jesse Barnes, james.bottomley, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem
> OK I found the bad commit,I got lucky... I lost some files but my
> machine was able to complete the bisection. CC involved people
> # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
Hi Eric,
I guess it would be useful to see "lspci -vv" output with a "good" kernel
and with that bad patch applied. Most likely we should see some difference
somewhere in the MaxPayload fields in the PCI Express capability of
some device.
Either the RAID controller or something else lies, and puts a value
in the DevCap that it can't actually support, or else the patch is
buggy and puts something out of range in a DevCtl somewhere.
- R.
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 17:40 ` Eric Dumazet
@ 2011-09-01 18:01 ` scameron
-1 siblings, 0 replies; 33+ messages in thread
From: scameron @ 2011-09-01 18:01 UTC (permalink / raw)
To: Eric Dumazet
Cc: Jon Mason, Jesse Barnes, james.bottomley, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem, scameron
On Thu, Sep 01, 2011 at 07:40:15PM +0200, Eric Dumazet wrote:
> Le jeudi 01 septembre 2011 à 11:07 -0500, scameron@beardog.cce.hp.com a
> écrit :
> > On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> > > Stephen,
> > >
> > > Current linux-3.1-rc4+ is a total disaster on my BL460c G6
> >
> > What kernel were you running successfully previously?
> >
> > I saw similar on BL460cG7 on Friday with 3.1-rc4,
> > but I'm not sure the problem is in the driver.
> > I installed rhel6.1, then put 3.1-rc4 on. Turning off
> > "Virtualization" in the kernel config seemed to help
> > (allowed it to boot) and so I thought that must have
> > been the source of the issue. So, you might try that.
> >
> > However, I rebooted that machine just now, and
> > now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> > message, so that's pretty weird.
> >
> > The cmd_alloc failure, I didn't see, but I may have missed it
> > (didn't have console directed to serial output.)
> >
> > cmd_alloc failing is not generally expected, as we reserve enough
> > commands that the upper layers should never exhaust them all (should
> > honor hpsa's max request limit), so that's pretty weird that
> > you're seeing that.
> >
> > I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
> > for example) and I don't think there are any hpsa changes between rc3
> > and rc4. (haven't tried rc4 on the dl380g7 yet).
> >
> > So, I'm not sure what's going on with the BL460c yet, but I am
> > aware of the problem and have already seen it. I can't think of
> > any driver changes lately which should be causing such
> > changes in behavior.
> >
> > -- steve
> >
> >
>
> OK I found the bad commit,I got lucky... I lost some files but my
> machine was able to complete the bisection. CC involved people
>
Thanks. I will run this information by the hardware guys here
and see if they have any bright ideas.
Would be interesting to see if the "pcie_bus_safe" option
makes a difference.
-- steve
> git bisect start
> # bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
> git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
> # good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
> git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
> # bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
> git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
> # good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch 'staging-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
> git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
> # good: [291b63c86aea8a571ddf913d41ab5156b8314dad] Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
> git bisect good 291b63c86aea8a571ddf913d41ab5156b8314dad
> # good: [aa462abe8aaf2198d6aef97da20c874ac694a39f] mm: fix __page_to_pfn for a const struct page argument
> git bisect good aa462abe8aaf2198d6aef97da20c874ac694a39f
> # good: [5c80c71b9a0ec518b4b58d2a61de01a04f4a4453] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
> git bisect good 5c80c71b9a0ec518b4b58d2a61de01a04f4a4453
> # good: [2c4ac99f983f1341b5962a16b5e8de6049bf10b5] Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
> git bisect good 2c4ac99f983f1341b5962a16b5e8de6049bf10b5
> # bad: [0a2daa1cf35004f5adbf4138555cc5669abf3a3e] PCI: make cardbus-bridge resources optional
> git bisect bad 0a2daa1cf35004f5adbf4138555cc5669abf3a3e
> # bad: [be768912a49b10b68e96fbd8fa3cab0adfbd3091] PCI: honor child buses add_size in hot plug configuration
> git bisect bad be768912a49b10b68e96fbd8fa3cab0adfbd3091
> # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> git bisect bad b03e7495a862b028294f59fc87286d6d78ee7fa1
> commit b03e7495a862b028294f59fc87286d6d78ee7fa1
> Author: Jon Mason <mason@myri.com>
> Date: Wed Jul 20 15:20:54 2011 -0500
>
> PCI: Set PCI-E Max Payload Size on fabric
>
> On a given PCI-E fabric, each device, bridge, and root port can have a
> different PCI-E maximum payload size. There is a sizable performance
> boost for having the largest possible maximum payload size on each PCI-E
> device. However, if improperly configured, fatal bus errors can occur.
> Thus, it is important to ensure that PCI-E payloads sends by a device
> are never larger than the MPS setting of all devices on the way to the
> destination.
>
> This can be achieved two ways:
>
> - A conservative approach is to use the smallest common denominator of
> the entire tree below a root complex for every device on that fabric.
>
> This means for example that having a 128 bytes MPS USB controller on one
> leg of a switch will dramatically reduce performances of a video card or
> 10GE adapter on another leg of that same switch.
>
> It also means that any hierarchy supporting hotplug slots (including
> expresscard or thunderbolt I suppose, dbl check that) will have to be
> entirely clamped to 128 bytes since we cannot predict what will be
> plugged into those slots, and we cannot change the MPS on a "live"
> system.
>
> - A more optimal way is possible, if it falls within a couple of
> constraints:
> * The top-level host bridge will never generate packets larger than the
> smallest TLP (or if it can be controlled independently from its MPS at
> least)
> * The device will never generate packets larger than MPS (which can be
> configured via MRRS)
> * No support of direct PCI-E <-> PCI-E transfers between devices without
> some additional code to specifically deal with that case
>
> Then we can use an approach that basically ignores downstream requests
> and focuses exclusively on upstream requests. In that case, all we need
> to care about is that a device MPS is no larger than its parent MPS,
> which allows us to keep all switches/bridges to the max MPS supported by
> their parent and eventually the PHB.
>
> In this case, your USB controller would no longer "starve" your 10GE
> Ethernet and your hotplug slots won't affect your global MPS.
> Additionally, the hotplugged devices themselves can be configured to a
> larger MPS up to the value configured in the hotplug bridge.
>
> To choose between the two available options, two PCI kernel boot args
> have been added to the PCI calls. "pcie_bus_safe" will provide the
> former behavior, while "pcie_bus_perf" will perform the latter behavior.
> By default, the latter behavior is used.
>
> NOTE: due to the location of the enablement, each arch will need to add
> calls to this function. This patch only enables x86.
>
> This patch includes a number of changes recommended by Benjamin
> Herrenschmidt.
>
> Tested-by: Jordan_Hargrave@dell.com
> Signed-off-by: Jon Mason <mason@myri.com>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>
>
>
> > >
> > >
> > > Few seconds after boot, I get "cmd_alloc returned NULL" messages
> > > or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> > >
> > > Usually lot of files are corrupted, fsck needed, and full distro
> > > reinstall as well.
> > >
> > > I tested on two different machines, same result.
> > >
> > > Relevant hardware information :
> > >
> > > Manufacturer: HP
> > > Product Name: ProLiant BL460c G6
> > > Version: I24
> > > Release Date: 05/05/2011
> > > Intel(R) Xeon(R) CPU E5540 @ 2.53GHz (two sockets)
> > >
> > > 0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6
> > > controllers (rev 01)
> > > Subsystem: Hewlett-Packard Company Smart Array P410i
> > > Flags: bus master, fast devsel, latency 0, IRQ 16
> > > Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
> > > Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
> > > I/O ports at 4000 [size=256]
> > > [virtual] Expansion ROM at e7200000 [disabled] [size=512K]
> > > Capabilities: [40] Power Management version 3
> > > Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> > > Capabilities: [70] Express Endpoint, MSI 00
> > > Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
> > > Capabilities: [100] Advanced Error Reporting
> > > Kernel driver in use: hpsa
> > >
> > > # hpacucli ctrl all show config detail
> > >
> > > Smart Array P410i in Slot 0 (Embedded)
> > > Bus Interface: PCI
> > > Slot: 0
> > > Serial Number: 5001438006F44240
> > > RAID 6 (ADG) Status: Disabled
> > > Controller Status: OK
> > > Chassis Slot:
> > > Hardware Revision: Rev C
> > > Firmware Version: 2.50
> > > Rebuild Priority: Medium
> > > Expand Priority: Medium
> > > Surface Scan Delay: 15 secs
> > > Surface Scan Mode: Idle
> > > Wait for Cache Room: Disabled
> > > Surface Analysis Inconsistency Notification: Disabled
> > > Post Prompt Timeout: 0 secs
> > > Cache Board Present: False
> > > Drive Write Cache: Disabled
> > > SATA NCQ Supported: True
> > >
> > > Array: A
> > > Interface Type: SATA
> > > Unused Space: 0 MB
> > > Status: OK
> > >
> > >
> > >
> > > Logical Drive: 1
> > > Size: 232.9 GB
> > > Fault Tolerance: RAID 1
> > > Heads: 255
> > > Sectors Per Track: 32
> > > Cylinders: 59844
> > > Strip Size: 128 KB
> > > Status: OK
> > > Unique Identifier: 600508B1001030364634343234300F00
> > > Disk Name: /dev/cciss/c0d0
> > > Mount Points: / 9.3 GB, /home 216.0 GB
> > > OS Status: LOCKED
> > > Logical Drive Label: A0124E845001438006F442403033
> > > Mirror Group 0:
> > > physicaldrive 1I:1:1 (port 1I:box 1:bay 1, SATA, 250 GB, OK)
> > > Mirror Group 1:
> > > physicaldrive 1I:1:2 (port 1I:box 1:bay 2, SATA, 250 GB, OK)
> > >
> > > physicaldrive 1I:1:1
> > > Port: 1I
> > > Box: 1
> > > Bay: 1
> > > Status: OK
> > > Drive Type: Data Drive
> > > Interface Type: SATA
> > > Size: 250 GB
> > > Firmware Revision: HPG2
> > > Serial Number: K648T9C27M8E
> > > Model: ATA GJ0250EAGSQ
> > > SATA NCQ Capable: True
> > > SATA NCQ Enabled: True
> > > PHY Count: 1
> > > PHY Transfer Rate: 3.0GBPS
> > >
> > > physicaldrive 1I:1:2
> > > Port: 1I
> > > Box: 1
> > > Bay: 2
> > > Status: OK
> > > Drive Type: Data Drive
> > > Interface Type: SATA
> > > Size: 250 GB
> > > Firmware Revision: HPG2
> > > Serial Number: K648T9C27M49
> > > Model: ATA GJ0250EAGSQ
> > > SATA NCQ Capable: True
> > > SATA NCQ Enabled: True
> > > PHY Count: 1
> > > PHY Transfer Rate: 3.0GBPS
> > >
> > >
> > >
> > > 64 bit kernel, 4GB of memory
> > >
>
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
@ 2011-09-01 18:01 ` scameron
0 siblings, 0 replies; 33+ messages in thread
From: scameron @ 2011-09-01 18:01 UTC (permalink / raw)
To: Eric Dumazet
Cc: Jon Mason, Jesse Barnes, james.bottomley, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem, scameron
On Thu, Sep 01, 2011 at 07:40:15PM +0200, Eric Dumazet wrote:
> Le jeudi 01 septembre 2011 à 11:07 -0500, scameron@beardog.cce.hp.com a
> écrit :
> > On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> > > Stephen,
> > >
> > > Current linux-3.1-rc4+ is a total disaster on my BL460c G6
> >
> > What kernel were you running successfully previously?
> >
> > I saw similar on BL460cG7 on Friday with 3.1-rc4,
> > but I'm not sure the problem is in the driver.
> > I installed rhel6.1, then put 3.1-rc4 on. Turning off
> > "Virtualization" in the kernel config seemed to help
> > (allowed it to boot) and so I thought that must have
> > been the source of the issue. So, you might try that.
> >
> > However, I rebooted that machine just now, and
> > now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> > message, so that's pretty weird.
> >
> > The cmd_alloc failure, I didn't see, but I may have missed it
> > (didn't have console directed to serial output.)
> >
> > cmd_alloc failing is not generally expected, as we reserve enough
> > commands that the upper layers should never exhaust them all (should
> > honor hpsa's max request limit), so that's pretty weird that
> > you're seeing that.
> >
> > I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
> > for example) and I don't think there are any hpsa changes between rc3
> > and rc4. (haven't tried rc4 on the dl380g7 yet).
> >
> > So, I'm not sure what's going on with the BL460c yet, but I am
> > aware of the problem and have already seen it. I can't think of
> > any driver changes lately which should be causing such
> > changes in behavior.
> >
> > -- steve
> >
> >
>
> OK I found the bad commit,I got lucky... I lost some files but my
> machine was able to complete the bisection. CC involved people
>
Thanks. I will run this information by the hardware guys here
and see if they have any bright ideas.
Would be interesting to see if the "pcie_bus_safe" option
makes a difference.
-- steve
> git bisect start
> # bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
> git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
> # good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
> git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
> # bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
> git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
> # good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch 'staging-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
> git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
> # good: [291b63c86aea8a571ddf913d41ab5156b8314dad] Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
> git bisect good 291b63c86aea8a571ddf913d41ab5156b8314dad
> # good: [aa462abe8aaf2198d6aef97da20c874ac694a39f] mm: fix __page_to_pfn for a const struct page argument
> git bisect good aa462abe8aaf2198d6aef97da20c874ac694a39f
> # good: [5c80c71b9a0ec518b4b58d2a61de01a04f4a4453] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
> git bisect good 5c80c71b9a0ec518b4b58d2a61de01a04f4a4453
> # good: [2c4ac99f983f1341b5962a16b5e8de6049bf10b5] Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
> git bisect good 2c4ac99f983f1341b5962a16b5e8de6049bf10b5
> # bad: [0a2daa1cf35004f5adbf4138555cc5669abf3a3e] PCI: make cardbus-bridge resources optional
> git bisect bad 0a2daa1cf35004f5adbf4138555cc5669abf3a3e
> # bad: [be768912a49b10b68e96fbd8fa3cab0adfbd3091] PCI: honor child buses add_size in hot plug configuration
> git bisect bad be768912a49b10b68e96fbd8fa3cab0adfbd3091
> # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> git bisect bad b03e7495a862b028294f59fc87286d6d78ee7fa1
> commit b03e7495a862b028294f59fc87286d6d78ee7fa1
> Author: Jon Mason <mason@myri.com>
> Date: Wed Jul 20 15:20:54 2011 -0500
>
> PCI: Set PCI-E Max Payload Size on fabric
>
> On a given PCI-E fabric, each device, bridge, and root port can have a
> different PCI-E maximum payload size. There is a sizable performance
> boost for having the largest possible maximum payload size on each PCI-E
> device. However, if improperly configured, fatal bus errors can occur.
> Thus, it is important to ensure that PCI-E payloads sends by a device
> are never larger than the MPS setting of all devices on the way to the
> destination.
>
> This can be achieved two ways:
>
> - A conservative approach is to use the smallest common denominator of
> the entire tree below a root complex for every device on that fabric.
>
> This means for example that having a 128 bytes MPS USB controller on one
> leg of a switch will dramatically reduce performances of a video card or
> 10GE adapter on another leg of that same switch.
>
> It also means that any hierarchy supporting hotplug slots (including
> expresscard or thunderbolt I suppose, dbl check that) will have to be
> entirely clamped to 128 bytes since we cannot predict what will be
> plugged into those slots, and we cannot change the MPS on a "live"
> system.
>
> - A more optimal way is possible, if it falls within a couple of
> constraints:
> * The top-level host bridge will never generate packets larger than the
> smallest TLP (or if it can be controlled independently from its MPS at
> least)
> * The device will never generate packets larger than MPS (which can be
> configured via MRRS)
> * No support of direct PCI-E <-> PCI-E transfers between devices without
> some additional code to specifically deal with that case
>
> Then we can use an approach that basically ignores downstream requests
> and focuses exclusively on upstream requests. In that case, all we need
> to care about is that a device MPS is no larger than its parent MPS,
> which allows us to keep all switches/bridges to the max MPS supported by
> their parent and eventually the PHB.
>
> In this case, your USB controller would no longer "starve" your 10GE
> Ethernet and your hotplug slots won't affect your global MPS.
> Additionally, the hotplugged devices themselves can be configured to a
> larger MPS up to the value configured in the hotplug bridge.
>
> To choose between the two available options, two PCI kernel boot args
> have been added to the PCI calls. "pcie_bus_safe" will provide the
> former behavior, while "pcie_bus_perf" will perform the latter behavior.
> By default, the latter behavior is used.
>
> NOTE: due to the location of the enablement, each arch will need to add
> calls to this function. This patch only enables x86.
>
> This patch includes a number of changes recommended by Benjamin
> Herrenschmidt.
>
> Tested-by: Jordan_Hargrave@dell.com
> Signed-off-by: Jon Mason <mason@myri.com>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>
>
>
> > >
> > >
> > > Few seconds after boot, I get "cmd_alloc returned NULL" messages
> > > or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> > >
> > > Usually lot of files are corrupted, fsck needed, and full distro
> > > reinstall as well.
> > >
> > > I tested on two different machines, same result.
> > >
> > > Relevant hardware information :
> > >
> > > Manufacturer: HP
> > > Product Name: ProLiant BL460c G6
> > > Version: I24
> > > Release Date: 05/05/2011
> > > Intel(R) Xeon(R) CPU E5540 @ 2.53GHz (two sockets)
> > >
> > > 0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6
> > > controllers (rev 01)
> > > Subsystem: Hewlett-Packard Company Smart Array P410i
> > > Flags: bus master, fast devsel, latency 0, IRQ 16
> > > Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
> > > Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
> > > I/O ports at 4000 [size=256]
> > > [virtual] Expansion ROM at e7200000 [disabled] [size=512K]
> > > Capabilities: [40] Power Management version 3
> > > Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> > > Capabilities: [70] Express Endpoint, MSI 00
> > > Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
> > > Capabilities: [100] Advanced Error Reporting
> > > Kernel driver in use: hpsa
> > >
> > > # hpacucli ctrl all show config detail
> > >
> > > Smart Array P410i in Slot 0 (Embedded)
> > > Bus Interface: PCI
> > > Slot: 0
> > > Serial Number: 5001438006F44240
> > > RAID 6 (ADG) Status: Disabled
> > > Controller Status: OK
> > > Chassis Slot:
> > > Hardware Revision: Rev C
> > > Firmware Version: 2.50
> > > Rebuild Priority: Medium
> > > Expand Priority: Medium
> > > Surface Scan Delay: 15 secs
> > > Surface Scan Mode: Idle
> > > Wait for Cache Room: Disabled
> > > Surface Analysis Inconsistency Notification: Disabled
> > > Post Prompt Timeout: 0 secs
> > > Cache Board Present: False
> > > Drive Write Cache: Disabled
> > > SATA NCQ Supported: True
> > >
> > > Array: A
> > > Interface Type: SATA
> > > Unused Space: 0 MB
> > > Status: OK
> > >
> > >
> > >
> > > Logical Drive: 1
> > > Size: 232.9 GB
> > > Fault Tolerance: RAID 1
> > > Heads: 255
> > > Sectors Per Track: 32
> > > Cylinders: 59844
> > > Strip Size: 128 KB
> > > Status: OK
> > > Unique Identifier: 600508B1001030364634343234300F00
> > > Disk Name: /dev/cciss/c0d0
> > > Mount Points: / 9.3 GB, /home 216.0 GB
> > > OS Status: LOCKED
> > > Logical Drive Label: A0124E845001438006F442403033
> > > Mirror Group 0:
> > > physicaldrive 1I:1:1 (port 1I:box 1:bay 1, SATA, 250 GB, OK)
> > > Mirror Group 1:
> > > physicaldrive 1I:1:2 (port 1I:box 1:bay 2, SATA, 250 GB, OK)
> > >
> > > physicaldrive 1I:1:1
> > > Port: 1I
> > > Box: 1
> > > Bay: 1
> > > Status: OK
> > > Drive Type: Data Drive
> > > Interface Type: SATA
> > > Size: 250 GB
> > > Firmware Revision: HPG2
> > > Serial Number: K648T9C27M8E
> > > Model: ATA GJ0250EAGSQ
> > > SATA NCQ Capable: True
> > > SATA NCQ Enabled: True
> > > PHY Count: 1
> > > PHY Transfer Rate: 3.0GBPS
> > >
> > > physicaldrive 1I:1:2
> > > Port: 1I
> > > Box: 1
> > > Bay: 2
> > > Status: OK
> > > Drive Type: Data Drive
> > > Interface Type: SATA
> > > Size: 250 GB
> > > Firmware Revision: HPG2
> > > Serial Number: K648T9C27M49
> > > Model: ATA GJ0250EAGSQ
> > > SATA NCQ Capable: True
> > > SATA NCQ Enabled: True
> > > PHY Count: 1
> > > PHY Transfer Rate: 3.0GBPS
> > >
> > >
> > >
> > > 64 bit kernel, 4GB of memory
> > >
>
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^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 17:58 ` Roland Dreier
@ 2011-09-01 18:50 ` James Bottomley
2011-09-01 18:58 ` Jesse Barnes
2011-09-01 19:59 ` Jesse Barnes
2011-09-01 19:36 ` Eric Dumazet
1 sibling, 2 replies; 33+ messages in thread
From: James Bottomley @ 2011-09-01 18:50 UTC (permalink / raw)
To: Roland Dreier
Cc: Eric Dumazet, scameron, Jon Mason, Jesse Barnes, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem
On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> > OK I found the bad commit,I got lucky... I lost some files but my
> > machine was able to complete the bisection. CC involved people
>
> > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
>
> Hi Eric,
>
> I guess it would be useful to see "lspci -vv" output with a "good" kernel
> and with that bad patch applied. Most likely we should see some difference
> somewhere in the MaxPayload fields in the PCI Express capability of
> some device.
>
> Either the RAID controller or something else lies, and puts a value
> in the DevCap that it can't actually support, or else the patch is
> buggy and puts something out of range in a DevCtl somewhere.
While we investigate, I think the problems produced by the patch (data
corruption) are serious enough to warrant reverting it, please Jesse.
Thanks,
James
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 18:50 ` James Bottomley
@ 2011-09-01 18:58 ` Jesse Barnes
2011-09-01 19:59 ` Jesse Barnes
1 sibling, 0 replies; 33+ messages in thread
From: Jesse Barnes @ 2011-09-01 18:58 UTC (permalink / raw)
To: James Bottomley
Cc: Roland Dreier, Eric Dumazet, scameron, Jon Mason, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem
On Thu, 01 Sep 2011 11:50:38 -0700
James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> > > OK I found the bad commit,I got lucky... I lost some files but my
> > > machine was able to complete the bisection. CC involved people
> >
> > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> >
> > Hi Eric,
> >
> > I guess it would be useful to see "lspci -vv" output with a "good" kernel
> > and with that bad patch applied. Most likely we should see some difference
> > somewhere in the MaxPayload fields in the PCI Express capability of
> > some device.
> >
> > Either the RAID controller or something else lies, and puts a value
> > in the DevCap that it can't actually support, or else the patch is
> > buggy and puts something out of range in a DevCtl somewhere.
>
>
> While we investigate, I think the problems produced by the patch (data
> corruption) are serious enough to warrant reverting it, please Jesse.
Yep, I just got another report about it today too, I'll queue the
revert.
--
Jesse Barnes, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 18:01 ` scameron
@ 2011-09-01 19:03 ` scameron
-1 siblings, 0 replies; 33+ messages in thread
From: scameron @ 2011-09-01 19:03 UTC (permalink / raw)
To: Eric Dumazet
Cc: Jon Mason, Jesse Barnes, james.bottomley, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem, scameron
On Thu, Sep 01, 2011 at 01:01:38PM -0500, scameron@beardog.cce.hp.com wrote:
> On Thu, Sep 01, 2011 at 07:40:15PM +0200, Eric Dumazet wrote:
> > Le jeudi 01 septembre 2011 à 11:07 -0500, scameron@beardog.cce.hp.com a
> > écrit :
> > > On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> > > > Stephen,
> > > >
> > > > Current linux-3.1-rc4+ is a total disaster on my BL460c G6
> > >
> > > What kernel were you running successfully previously?
> > >
> > > I saw similar on BL460cG7 on Friday with 3.1-rc4,
> > > but I'm not sure the problem is in the driver.
> > > I installed rhel6.1, then put 3.1-rc4 on. Turning off
> > > "Virtualization" in the kernel config seemed to help
> > > (allowed it to boot) and so I thought that must have
> > > been the source of the issue. So, you might try that.
> > >
> > > However, I rebooted that machine just now, and
> > > now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> > > message, so that's pretty weird.
> > >
> > > The cmd_alloc failure, I didn't see, but I may have missed it
> > > (didn't have console directed to serial output.)
> > >
> > > cmd_alloc failing is not generally expected, as we reserve enough
> > > commands that the upper layers should never exhaust them all (should
> > > honor hpsa's max request limit), so that's pretty weird that
> > > you're seeing that.
> > >
> > > I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
> > > for example) and I don't think there are any hpsa changes between rc3
> > > and rc4. (haven't tried rc4 on the dl380g7 yet).
> > >
> > > So, I'm not sure what's going on with the BL460c yet, but I am
> > > aware of the problem and have already seen it. I can't think of
> > > any driver changes lately which should be causing such
> > > changes in behavior.
> > >
> > > -- steve
> > >
> > >
> >
> > OK I found the bad commit,I got lucky... I lost some files but my
> > machine was able to complete the bisection. CC involved people
> >
>
> Thanks. I will run this information by the hardware guys here
> and see if they have any bright ideas.
>
> Would be interesting to see if the "pcie_bus_safe" option
> makes a difference.
FWIW, this option does not help (though it does change the
behavior). I get hpsa complaining about bad tags returned
from the hardware, which is to say, this code from hpsa.c
fires:
static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
u32 raw_tag)
{
if (unlikely(tag_index >= h->nr_cmds)) {
dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
return 1;
}
return 0;
}
I had added "pcie_bus_safe" and "pci.pcie_bus_safe" to the command
line parameters. (Was hard to tell how it was supposed to be used
as there is nothing in Documentation directory that mentions
pcie_bus_safe.)
-- steve
>
> -- steve
>
> > git bisect start
> > # bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
> > git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
> > # good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
> > git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
> > # bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
> > git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
> > # good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch 'staging-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
> > git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
> > # good: [291b63c86aea8a571ddf913d41ab5156b8314dad] Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
> > git bisect good 291b63c86aea8a571ddf913d41ab5156b8314dad
> > # good: [aa462abe8aaf2198d6aef97da20c874ac694a39f] mm: fix __page_to_pfn for a const struct page argument
> > git bisect good aa462abe8aaf2198d6aef97da20c874ac694a39f
> > # good: [5c80c71b9a0ec518b4b58d2a61de01a04f4a4453] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
> > git bisect good 5c80c71b9a0ec518b4b58d2a61de01a04f4a4453
> > # good: [2c4ac99f983f1341b5962a16b5e8de6049bf10b5] Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
> > git bisect good 2c4ac99f983f1341b5962a16b5e8de6049bf10b5
> > # bad: [0a2daa1cf35004f5adbf4138555cc5669abf3a3e] PCI: make cardbus-bridge resources optional
> > git bisect bad 0a2daa1cf35004f5adbf4138555cc5669abf3a3e
> > # bad: [be768912a49b10b68e96fbd8fa3cab0adfbd3091] PCI: honor child buses add_size in hot plug configuration
> > git bisect bad be768912a49b10b68e96fbd8fa3cab0adfbd3091
> > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> > git bisect bad b03e7495a862b028294f59fc87286d6d78ee7fa1
> > commit b03e7495a862b028294f59fc87286d6d78ee7fa1
> > Author: Jon Mason <mason@myri.com>
> > Date: Wed Jul 20 15:20:54 2011 -0500
> >
> > PCI: Set PCI-E Max Payload Size on fabric
> >
> > On a given PCI-E fabric, each device, bridge, and root port can have a
> > different PCI-E maximum payload size. There is a sizable performance
> > boost for having the largest possible maximum payload size on each PCI-E
> > device. However, if improperly configured, fatal bus errors can occur.
> > Thus, it is important to ensure that PCI-E payloads sends by a device
> > are never larger than the MPS setting of all devices on the way to the
> > destination.
> >
> > This can be achieved two ways:
> >
> > - A conservative approach is to use the smallest common denominator of
> > the entire tree below a root complex for every device on that fabric.
> >
> > This means for example that having a 128 bytes MPS USB controller on one
> > leg of a switch will dramatically reduce performances of a video card or
> > 10GE adapter on another leg of that same switch.
> >
> > It also means that any hierarchy supporting hotplug slots (including
> > expresscard or thunderbolt I suppose, dbl check that) will have to be
> > entirely clamped to 128 bytes since we cannot predict what will be
> > plugged into those slots, and we cannot change the MPS on a "live"
> > system.
> >
> > - A more optimal way is possible, if it falls within a couple of
> > constraints:
> > * The top-level host bridge will never generate packets larger than the
> > smallest TLP (or if it can be controlled independently from its MPS at
> > least)
> > * The device will never generate packets larger than MPS (which can be
> > configured via MRRS)
> > * No support of direct PCI-E <-> PCI-E transfers between devices without
> > some additional code to specifically deal with that case
> >
> > Then we can use an approach that basically ignores downstream requests
> > and focuses exclusively on upstream requests. In that case, all we need
> > to care about is that a device MPS is no larger than its parent MPS,
> > which allows us to keep all switches/bridges to the max MPS supported by
> > their parent and eventually the PHB.
> >
> > In this case, your USB controller would no longer "starve" your 10GE
> > Ethernet and your hotplug slots won't affect your global MPS.
> > Additionally, the hotplugged devices themselves can be configured to a
> > larger MPS up to the value configured in the hotplug bridge.
> >
> > To choose between the two available options, two PCI kernel boot args
> > have been added to the PCI calls. "pcie_bus_safe" will provide the
> > former behavior, while "pcie_bus_perf" will perform the latter behavior.
> > By default, the latter behavior is used.
> >
> > NOTE: due to the location of the enablement, each arch will need to add
> > calls to this function. This patch only enables x86.
> >
> > This patch includes a number of changes recommended by Benjamin
> > Herrenschmidt.
> >
> > Tested-by: Jordan_Hargrave@dell.com
> > Signed-off-by: Jon Mason <mason@myri.com>
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >
> >
> >
> > > >
> > > >
> > > > Few seconds after boot, I get "cmd_alloc returned NULL" messages
> > > > or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> > > >
> > > > Usually lot of files are corrupted, fsck needed, and full distro
> > > > reinstall as well.
> > > >
> > > > I tested on two different machines, same result.
> > > >
> > > > Relevant hardware information :
> > > >
> > > > Manufacturer: HP
> > > > Product Name: ProLiant BL460c G6
> > > > Version: I24
> > > > Release Date: 05/05/2011
> > > > Intel(R) Xeon(R) CPU E5540 @ 2.53GHz (two sockets)
> > > >
> > > > 0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6
> > > > controllers (rev 01)
> > > > Subsystem: Hewlett-Packard Company Smart Array P410i
> > > > Flags: bus master, fast devsel, latency 0, IRQ 16
> > > > Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
> > > > Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
> > > > I/O ports at 4000 [size=256]
> > > > [virtual] Expansion ROM at e7200000 [disabled] [size=512K]
> > > > Capabilities: [40] Power Management version 3
> > > > Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> > > > Capabilities: [70] Express Endpoint, MSI 00
> > > > Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
> > > > Capabilities: [100] Advanced Error Reporting
> > > > Kernel driver in use: hpsa
> > > >
> > > > # hpacucli ctrl all show config detail
> > > >
> > > > Smart Array P410i in Slot 0 (Embedded)
> > > > Bus Interface: PCI
> > > > Slot: 0
> > > > Serial Number: 5001438006F44240
> > > > RAID 6 (ADG) Status: Disabled
> > > > Controller Status: OK
> > > > Chassis Slot:
> > > > Hardware Revision: Rev C
> > > > Firmware Version: 2.50
> > > > Rebuild Priority: Medium
> > > > Expand Priority: Medium
> > > > Surface Scan Delay: 15 secs
> > > > Surface Scan Mode: Idle
> > > > Wait for Cache Room: Disabled
> > > > Surface Analysis Inconsistency Notification: Disabled
> > > > Post Prompt Timeout: 0 secs
> > > > Cache Board Present: False
> > > > Drive Write Cache: Disabled
> > > > SATA NCQ Supported: True
> > > >
> > > > Array: A
> > > > Interface Type: SATA
> > > > Unused Space: 0 MB
> > > > Status: OK
> > > >
> > > >
> > > >
> > > > Logical Drive: 1
> > > > Size: 232.9 GB
> > > > Fault Tolerance: RAID 1
> > > > Heads: 255
> > > > Sectors Per Track: 32
> > > > Cylinders: 59844
> > > > Strip Size: 128 KB
> > > > Status: OK
> > > > Unique Identifier: 600508B1001030364634343234300F00
> > > > Disk Name: /dev/cciss/c0d0
> > > > Mount Points: / 9.3 GB, /home 216.0 GB
> > > > OS Status: LOCKED
> > > > Logical Drive Label: A0124E845001438006F442403033
> > > > Mirror Group 0:
> > > > physicaldrive 1I:1:1 (port 1I:box 1:bay 1, SATA, 250 GB, OK)
> > > > Mirror Group 1:
> > > > physicaldrive 1I:1:2 (port 1I:box 1:bay 2, SATA, 250 GB, OK)
> > > >
> > > > physicaldrive 1I:1:1
> > > > Port: 1I
> > > > Box: 1
> > > > Bay: 1
> > > > Status: OK
> > > > Drive Type: Data Drive
> > > > Interface Type: SATA
> > > > Size: 250 GB
> > > > Firmware Revision: HPG2
> > > > Serial Number: K648T9C27M8E
> > > > Model: ATA GJ0250EAGSQ
> > > > SATA NCQ Capable: True
> > > > SATA NCQ Enabled: True
> > > > PHY Count: 1
> > > > PHY Transfer Rate: 3.0GBPS
> > > >
> > > > physicaldrive 1I:1:2
> > > > Port: 1I
> > > > Box: 1
> > > > Bay: 2
> > > > Status: OK
> > > > Drive Type: Data Drive
> > > > Interface Type: SATA
> > > > Size: 250 GB
> > > > Firmware Revision: HPG2
> > > > Serial Number: K648T9C27M49
> > > > Model: ATA GJ0250EAGSQ
> > > > SATA NCQ Capable: True
> > > > SATA NCQ Enabled: True
> > > > PHY Count: 1
> > > > PHY Transfer Rate: 3.0GBPS
> > > >
> > > >
> > > >
> > > > 64 bit kernel, 4GB of memory
> > > >
> >
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
@ 2011-09-01 19:03 ` scameron
0 siblings, 0 replies; 33+ messages in thread
From: scameron @ 2011-09-01 19:03 UTC (permalink / raw)
To: Eric Dumazet
Cc: Jon Mason, Jesse Barnes, james.bottomley, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem, scameron
On Thu, Sep 01, 2011 at 01:01:38PM -0500, scameron@beardog.cce.hp.com wrote:
> On Thu, Sep 01, 2011 at 07:40:15PM +0200, Eric Dumazet wrote:
> > Le jeudi 01 septembre 2011 à 11:07 -0500, scameron@beardog.cce.hp.com a
> > écrit :
> > > On Thu, Sep 01, 2011 at 05:24:02PM +0200, Eric Dumazet wrote:
> > > > Stephen,
> > > >
> > > > Current linux-3.1-rc4+ is a total disaster on my BL460c G6
> > >
> > > What kernel were you running successfully previously?
> > >
> > > I saw similar on BL460cG7 on Friday with 3.1-rc4,
> > > but I'm not sure the problem is in the driver.
> > > I installed rhel6.1, then put 3.1-rc4 on. Turning off
> > > "Virtualization" in the kernel config seemed to help
> > > (allowed it to boot) and so I thought that must have
> > > been the source of the issue. So, you might try that.
> > >
> > > However, I rebooted that machine just now, and
> > > now I am getting the similar "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> > > message, so that's pretty weird.
> > >
> > > The cmd_alloc failure, I didn't see, but I may have missed it
> > > (didn't have console directed to serial output.)
> > >
> > > cmd_alloc failing is not generally expected, as we reserve enough
> > > commands that the upper layers should never exhaust them all (should
> > > honor hpsa's max request limit), so that's pretty weird that
> > > you're seeing that.
> > >
> > > I am able to run 3.1-rc3 on rhel6 just fine on other systems (DL380g7,
> > > for example) and I don't think there are any hpsa changes between rc3
> > > and rc4. (haven't tried rc4 on the dl380g7 yet).
> > >
> > > So, I'm not sure what's going on with the BL460c yet, but I am
> > > aware of the problem and have already seen it. I can't think of
> > > any driver changes lately which should be causing such
> > > changes in behavior.
> > >
> > > -- steve
> > >
> > >
> >
> > OK I found the bad commit,I got lucky... I lost some files but my
> > machine was able to complete the bisection. CC involved people
> >
>
> Thanks. I will run this information by the hardware guys here
> and see if they have any bright ideas.
>
> Would be interesting to see if the "pcie_bus_safe" option
> makes a difference.
FWIW, this option does not help (though it does change the
behavior). I get hpsa complaining about bad tags returned
from the hardware, which is to say, this code from hpsa.c
fires:
static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
u32 raw_tag)
{
if (unlikely(tag_index >= h->nr_cmds)) {
dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
return 1;
}
return 0;
}
I had added "pcie_bus_safe" and "pci.pcie_bus_safe" to the command
line parameters. (Was hard to tell how it was supposed to be used
as there is nothing in Documentation directory that mentions
pcie_bus_safe.)
-- steve
>
> -- steve
>
> > git bisect start
> > # bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
> > git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
> > # good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
> > git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
> > # bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
> > git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
> > # good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch 'staging-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
> > git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
> > # good: [291b63c86aea8a571ddf913d41ab5156b8314dad] Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
> > git bisect good 291b63c86aea8a571ddf913d41ab5156b8314dad
> > # good: [aa462abe8aaf2198d6aef97da20c874ac694a39f] mm: fix __page_to_pfn for a const struct page argument
> > git bisect good aa462abe8aaf2198d6aef97da20c874ac694a39f
> > # good: [5c80c71b9a0ec518b4b58d2a61de01a04f4a4453] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
> > git bisect good 5c80c71b9a0ec518b4b58d2a61de01a04f4a4453
> > # good: [2c4ac99f983f1341b5962a16b5e8de6049bf10b5] Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
> > git bisect good 2c4ac99f983f1341b5962a16b5e8de6049bf10b5
> > # bad: [0a2daa1cf35004f5adbf4138555cc5669abf3a3e] PCI: make cardbus-bridge resources optional
> > git bisect bad 0a2daa1cf35004f5adbf4138555cc5669abf3a3e
> > # bad: [be768912a49b10b68e96fbd8fa3cab0adfbd3091] PCI: honor child buses add_size in hot plug configuration
> > git bisect bad be768912a49b10b68e96fbd8fa3cab0adfbd3091
> > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> > git bisect bad b03e7495a862b028294f59fc87286d6d78ee7fa1
> > commit b03e7495a862b028294f59fc87286d6d78ee7fa1
> > Author: Jon Mason <mason@myri.com>
> > Date: Wed Jul 20 15:20:54 2011 -0500
> >
> > PCI: Set PCI-E Max Payload Size on fabric
> >
> > On a given PCI-E fabric, each device, bridge, and root port can have a
> > different PCI-E maximum payload size. There is a sizable performance
> > boost for having the largest possible maximum payload size on each PCI-E
> > device. However, if improperly configured, fatal bus errors can occur.
> > Thus, it is important to ensure that PCI-E payloads sends by a device
> > are never larger than the MPS setting of all devices on the way to the
> > destination.
> >
> > This can be achieved two ways:
> >
> > - A conservative approach is to use the smallest common denominator of
> > the entire tree below a root complex for every device on that fabric.
> >
> > This means for example that having a 128 bytes MPS USB controller on one
> > leg of a switch will dramatically reduce performances of a video card or
> > 10GE adapter on another leg of that same switch.
> >
> > It also means that any hierarchy supporting hotplug slots (including
> > expresscard or thunderbolt I suppose, dbl check that) will have to be
> > entirely clamped to 128 bytes since we cannot predict what will be
> > plugged into those slots, and we cannot change the MPS on a "live"
> > system.
> >
> > - A more optimal way is possible, if it falls within a couple of
> > constraints:
> > * The top-level host bridge will never generate packets larger than the
> > smallest TLP (or if it can be controlled independently from its MPS at
> > least)
> > * The device will never generate packets larger than MPS (which can be
> > configured via MRRS)
> > * No support of direct PCI-E <-> PCI-E transfers between devices without
> > some additional code to specifically deal with that case
> >
> > Then we can use an approach that basically ignores downstream requests
> > and focuses exclusively on upstream requests. In that case, all we need
> > to care about is that a device MPS is no larger than its parent MPS,
> > which allows us to keep all switches/bridges to the max MPS supported by
> > their parent and eventually the PHB.
> >
> > In this case, your USB controller would no longer "starve" your 10GE
> > Ethernet and your hotplug slots won't affect your global MPS.
> > Additionally, the hotplugged devices themselves can be configured to a
> > larger MPS up to the value configured in the hotplug bridge.
> >
> > To choose between the two available options, two PCI kernel boot args
> > have been added to the PCI calls. "pcie_bus_safe" will provide the
> > former behavior, while "pcie_bus_perf" will perform the latter behavior.
> > By default, the latter behavior is used.
> >
> > NOTE: due to the location of the enablement, each arch will need to add
> > calls to this function. This patch only enables x86.
> >
> > This patch includes a number of changes recommended by Benjamin
> > Herrenschmidt.
> >
> > Tested-by: Jordan_Hargrave@dell.com
> > Signed-off-by: Jon Mason <mason@myri.com>
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >
> >
> >
> > > >
> > > >
> > > > Few seconds after boot, I get "cmd_alloc returned NULL" messages
> > > > or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
> > > >
> > > > Usually lot of files are corrupted, fsck needed, and full distro
> > > > reinstall as well.
> > > >
> > > > I tested on two different machines, same result.
> > > >
> > > > Relevant hardware information :
> > > >
> > > > Manufacturer: HP
> > > > Product Name: ProLiant BL460c G6
> > > > Version: I24
> > > > Release Date: 05/05/2011
> > > > Intel(R) Xeon(R) CPU E5540 @ 2.53GHz (two sockets)
> > > >
> > > > 0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6
> > > > controllers (rev 01)
> > > > Subsystem: Hewlett-Packard Company Smart Array P410i
> > > > Flags: bus master, fast devsel, latency 0, IRQ 16
> > > > Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
> > > > Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
> > > > I/O ports at 4000 [size=256]
> > > > [virtual] Expansion ROM at e7200000 [disabled] [size=512K]
> > > > Capabilities: [40] Power Management version 3
> > > > Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> > > > Capabilities: [70] Express Endpoint, MSI 00
> > > > Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
> > > > Capabilities: [100] Advanced Error Reporting
> > > > Kernel driver in use: hpsa
> > > >
> > > > # hpacucli ctrl all show config detail
> > > >
> > > > Smart Array P410i in Slot 0 (Embedded)
> > > > Bus Interface: PCI
> > > > Slot: 0
> > > > Serial Number: 5001438006F44240
> > > > RAID 6 (ADG) Status: Disabled
> > > > Controller Status: OK
> > > > Chassis Slot:
> > > > Hardware Revision: Rev C
> > > > Firmware Version: 2.50
> > > > Rebuild Priority: Medium
> > > > Expand Priority: Medium
> > > > Surface Scan Delay: 15 secs
> > > > Surface Scan Mode: Idle
> > > > Wait for Cache Room: Disabled
> > > > Surface Analysis Inconsistency Notification: Disabled
> > > > Post Prompt Timeout: 0 secs
> > > > Cache Board Present: False
> > > > Drive Write Cache: Disabled
> > > > SATA NCQ Supported: True
> > > >
> > > > Array: A
> > > > Interface Type: SATA
> > > > Unused Space: 0 MB
> > > > Status: OK
> > > >
> > > >
> > > >
> > > > Logical Drive: 1
> > > > Size: 232.9 GB
> > > > Fault Tolerance: RAID 1
> > > > Heads: 255
> > > > Sectors Per Track: 32
> > > > Cylinders: 59844
> > > > Strip Size: 128 KB
> > > > Status: OK
> > > > Unique Identifier: 600508B1001030364634343234300F00
> > > > Disk Name: /dev/cciss/c0d0
> > > > Mount Points: / 9.3 GB, /home 216.0 GB
> > > > OS Status: LOCKED
> > > > Logical Drive Label: A0124E845001438006F442403033
> > > > Mirror Group 0:
> > > > physicaldrive 1I:1:1 (port 1I:box 1:bay 1, SATA, 250 GB, OK)
> > > > Mirror Group 1:
> > > > physicaldrive 1I:1:2 (port 1I:box 1:bay 2, SATA, 250 GB, OK)
> > > >
> > > > physicaldrive 1I:1:1
> > > > Port: 1I
> > > > Box: 1
> > > > Bay: 1
> > > > Status: OK
> > > > Drive Type: Data Drive
> > > > Interface Type: SATA
> > > > Size: 250 GB
> > > > Firmware Revision: HPG2
> > > > Serial Number: K648T9C27M8E
> > > > Model: ATA GJ0250EAGSQ
> > > > SATA NCQ Capable: True
> > > > SATA NCQ Enabled: True
> > > > PHY Count: 1
> > > > PHY Transfer Rate: 3.0GBPS
> > > >
> > > > physicaldrive 1I:1:2
> > > > Port: 1I
> > > > Box: 1
> > > > Bay: 2
> > > > Status: OK
> > > > Drive Type: Data Drive
> > > > Interface Type: SATA
> > > > Size: 250 GB
> > > > Firmware Revision: HPG2
> > > > Serial Number: K648T9C27M49
> > > > Model: ATA GJ0250EAGSQ
> > > > SATA NCQ Capable: True
> > > > SATA NCQ Enabled: True
> > > > PHY Count: 1
> > > > PHY Transfer Rate: 3.0GBPS
> > > >
> > > >
> > > >
> > > > 64 bit kernel, 4GB of memory
> > > >
> >
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^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 17:58 ` Roland Dreier
2011-09-01 18:50 ` James Bottomley
@ 2011-09-01 19:36 ` Eric Dumazet
1 sibling, 0 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-01 19:36 UTC (permalink / raw)
To: Roland Dreier
Cc: scameron, Jon Mason, Jesse Barnes, james.bottomley, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem
Le jeudi 01 septembre 2011 à 10:58 -0700, Roland Dreier a écrit :
> > OK I found the bad commit,I got lucky... I lost some files but my
> > machine was able to complete the bisection. CC involved people
>
> > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
>
> Hi Eric,
>
> I guess it would be useful to see "lspci -vv" output with a "good" kernel
> and with that bad patch applied. Most likely we should see some difference
> somewhere in the MaxPayload fields in the PCI Express capability of
> some device.
>
> Either the RAID controller or something else lies, and puts a value
> in the DevCap that it can't actually support, or else the patch is
> buggy and puts something out of range in a DevCtl somewhere.
>
Sorry, I cant provide a "lspci -vv" on a bad kernel, my machine locks
hard before I can type anything.
Here is the output on a "good" kernel
(debian sid kernel 3.0.0-1-amd64 #1 SMP Sat Aug 27 16:21:11 UTC 2011 x86_64 GNU/Linux)
00:00.0 Host bridge: Intel Corporation 5500 I/O Hub to ESI Port (rev 13)
Subsystem: Hewlett-Packard Company Device 330b
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
Capabilities: [160 v0] Vendor Specific Information: ID=0002 Rev=0 Len=00c <?>
00:01.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 1 (rev 13) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
Memory behind bridge: f3800000-fb7fffff
Prefetchable memory behind bridge: 00000000e7000000-00000000e70fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Hewlett-Packard Company Device 330b
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
Capabilities: [160 v0] Vendor Specific Information: ID=0002 Rev=0 Len=00c <?>
Kernel driver in use: pcieport
00:02.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 2 (rev 13) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=0d, subordinate=0d, sec-latency=0
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Hewlett-Packard Company Device 330b
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
Kernel driver in use: pcieport
00:03.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 3 (rev 13) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=03, subordinate=05, sec-latency=0
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Hewlett-Packard Company Device 330b
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled+ Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
Capabilities: [160 v0] Vendor Specific Information: ID=0002 Rev=0 Len=00c <?>
Kernel driver in use: pcieport
00:07.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 7 (rev 13) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=06, subordinate=08, sec-latency=0
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Hewlett-Packard Company Device 330b
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
Capabilities: [160 v0] Vendor Specific Information: ID=0002 Rev=0 Len=00c <?>
Kernel driver in use: pcieport
00:08.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 8 (rev 13) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=11, subordinate=11, sec-latency=0
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Hewlett-Packard Company Device 330b
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
Kernel driver in use: pcieport
00:09.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 9 (rev 13) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=09, subordinate=0b, sec-latency=0
Memory behind bridge: fba00000-fbafffff
Prefetchable memory behind bridge: 00000000e7100000-00000000e71fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Hewlett-Packard Company Device 330b
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
Kernel driver in use: pcieport
00:0a.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 10 (rev 13) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=12, subordinate=12, sec-latency=0
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Hewlett-Packard Company Device 330b
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
Kernel driver in use: pcieport
00:0d.0 Host bridge: Intel Corporation Device 343a (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
Capabilities: [100 v0] Vendor Specific Information: ID=0001 Rev=0 Len=0b8 <?>
Capabilities: [800 v0] Vendor Specific Information: ID=0001 Rev=0 Len=0b8 <?>
00:0d.1 Host bridge: Intel Corporation Device 343b (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
Capabilities: [100 v0] Vendor Specific Information: ID=0001 Rev=0 Len=0b8 <?>
Capabilities: [800 v0] Vendor Specific Information: ID=0001 Rev=0 Len=0b8 <?>
00:0d.2 Host bridge: Intel Corporation Device 343c (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
00:0d.3 Host bridge: Intel Corporation Device 343d (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
Capabilities: [100 v0] Vendor Specific Information: ID=0001 Rev=0 Len=0b8 <?>
00:0d.4 Host bridge: Intel Corporation 5520/5500/X58 Physical Layer Port 0 (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
00:0d.5 Host bridge: Intel Corporation 5520/5500 Physical Layer Port 1 (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
00:0d.6 Host bridge: Intel Corporation Device 341a (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
00:0e.0 Host bridge: Intel Corporation Device 341c (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
Capabilities: [100 v0] Vendor Specific Information: ID=0001 Rev=0 Len=0b8 <?>
00:0e.1 Host bridge: Intel Corporation Device 341d (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
00:0e.2 Host bridge: Intel Corporation Device 341e (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
00:0e.3 Host bridge: Intel Corporation Device 341f (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range BCD, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [60] #00 [0000]
00:0e.4 Host bridge: Intel Corporation Device 3439 (rev 13)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
00:14.0 PIC: Intel Corporation 5520/5500/X58 I/O Hub System Management Registers (rev 13) (prog-if 00 [8259])
Subsystem: Device 003c:000b
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Kernel driver in use: i7core_edac
00:14.1 PIC: Intel Corporation 5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers (rev 13) (prog-if 00 [8259])
Subsystem: Device 003c:000b
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
00:14.2 PIC: Intel Corporation 5520/5500/X58 I/O Hub Control Status and RAS Registers (rev 13) (prog-if 00 [8259])
Subsystem: Device 003c:000b
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
00:1c.0 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 1 (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=0c, subordinate=0c, sec-latency=0
I/O behind bridge: 00004000-00004fff
Memory behind bridge: fbb00000-fbffffff
Prefetchable memory behind bridge: 00000000e7200000-00000000e72fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x4, ASPM L0s L1, Latency L0 <1us, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal+ ErrFatal+ PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00278 Data: 0000
Capabilities: [90] Subsystem: Hewlett-Packard Company Device 330d
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed+ WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [180 v1] Root Complex Link
Desc: PortNumber=01 ComponentID=02 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+
Addr: 00000000fed1c000
Kernel driver in use: pcieport
00:1d.0 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 (prog-if 00 [UHCI])
Subsystem: Hewlett-Packard Company Device 330d
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 20
Region 4: I/O ports at 1000 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.1 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 (prog-if 00 [UHCI])
Subsystem: Hewlett-Packard Company Device 330d
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 23
Region 4: I/O ports at 1020 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.2 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 (prog-if 00 [UHCI])
Subsystem: Hewlett-Packard Company Device 330d
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 22
Region 4: I/O ports at 1040 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.3 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 (prog-if 00 [UHCI])
Subsystem: Hewlett-Packard Company Device 330d
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin D routed to IRQ 23
Region 4: I/O ports at 1060 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 (prog-if 20 [EHCI])
Subsystem: Hewlett-Packard Company Device 330d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 20
Region 0: Memory at f35f0000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ehci_hcd
00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90) (prog-if 01 [Subtractive decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
I/O behind bridge: 00002000-00003fff
Memory behind bridge: f3600000-f37fffff
Prefetchable memory behind bridge: 00000000e8000000-00000000efffffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Subsystem: Hewlett-Packard Company Device 330d
00:1f.0 ISA bridge: Intel Corporation 82801JIB (ICH10) LPC Interface Controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information: Len=0c <?>
01:03.0 VGA compatible controller: ATI Technologies Inc ES1000 (rev 02) (prog-if 00 [VGA controller])
Subsystem: Hewlett-Packard Company Device 31fb
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (2000ns min), Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 23
Region 0: Memory at e8000000 (32-bit, prefetchable) [size=128M]
Region 1: I/O ports at 3000 [size=256]
Region 2: Memory at f37f0000 (32-bit, non-prefetchable) [size=64K]
[virtual] Expansion ROM at f3600000 [disabled] [size=128K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: radeon
01:04.0 System peripheral: Compaq Computer Corporation Integrated Lights Out Controller (rev 03)
Subsystem: Hewlett-Packard Company Device 3305
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 21
Region 0: I/O ports at 2800 [size=256]
Region 1: Memory at f37e0000 (32-bit, non-prefetchable) [size=512]
Capabilities: [f0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: hpwdt
01:04.2 System peripheral: Compaq Computer Corporation Integrated Lights Out Processor (rev 03)
Subsystem: Hewlett-Packard Company Device 3305
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64, Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 22
BIST result: 00
Region 0: I/O ports at 3400 [size=256]
Region 1: Memory at f37d0000 (32-bit, non-prefetchable) [size=2K]
Region 2: Memory at f37c0000 (32-bit, non-prefetchable) [size=16K]
Region 3: Memory at f3700000 (32-bit, non-prefetchable) [size=512K]
[virtual] Expansion ROM at f3620000 [disabled] [size=64K]
Capabilities: [f0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: hpilo
01:04.4 USB Controller: Hewlett-Packard Company Integrated Lights-Out Standard Virtual USB Controller (prog-if 00 [UHCI])
Subsystem: Hewlett-Packard Company iLO2
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Interrupt: pin B routed to IRQ 22
Region 4: I/O ports at 3800 [size=32]
Capabilities: [f0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: uhci_hcd
01:04.6 IPMI SMIC interface: Hewlett-Packard Company Integrated Lights-Out Standard KCS Interface (prog-if 01)
Subsystem: Hewlett-Packard Company iLO2
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 21
Region 0: Memory at f36f0000 (32-bit, non-prefetchable) [size=256]
Capabilities: [f0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: ipmi_si
02:00.0 Ethernet controller: Broadcom Corporation NetXtreme II BCM57711E 10-Gigabit PCIe
Subsystem: Hewlett-Packard Company NC532i Dual Port 10GbE Multifunction BL-C Adapter
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 28
Region 0: Memory at fb000000 (64-bit, non-prefetchable) [size=8M]
Region 2: Memory at fa800000 (64-bit, non-prefetchable) [size=8M]
[virtual] Expansion ROM at e7000000 [disabled] [size=64K]
Capabilities: [48] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [50] Vital Product Data
Product Name: HP_NC532i_DP_10GbE_Multifunction_BL-c_Adapter
Read-only fields:
[PN] Part number: N/A
[EC] Engineering changes: N/A
[SN] Serial number: 0123456789
[MN] Manufacture ID: 31 34 65 34
[RV] Reserved: checksum good, 39 byte(s) reserved
End
Capabilities: [58] MSI: Enable- Count=1/8 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [a0] MSI-X: Enable+ Count=17 Masked-
Vector table: BAR=0 offset=00440000
PBA: BAR=0 offset=00441800
Capabilities: [ac] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <1us, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr+ NoSnoop+
MaxPayload 256 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s L1, Latency L0 <4us, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [100 v1] Device Serial Number f4-ce-46-ff-fe-bb-32-d0
Capabilities: [110 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [150 v1] Power Budgeting <?>
Capabilities: [160 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Kernel driver in use: bnx2x
02:00.1 Ethernet controller: Broadcom Corporation NetXtreme II BCM57711E 10-Gigabit PCIe
Subsystem: Hewlett-Packard Company NC532i Dual Port 10GbE Multifunction BL-C Adapter
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin D routed to IRQ 47
Region 0: Memory at fa000000 (64-bit, non-prefetchable) [size=8M]
Region 2: Memory at f9800000 (64-bit, non-prefetchable) [size=8M]
[virtual] Expansion ROM at e7010000 [disabled] [size=64K]
Capabilities: [48] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [50] Vital Product Data
Product Name: HP_NC532i_DP_10GbE_Multifunction_BL-c_Adapter
Read-only fields:
[PN] Part number: N/A
[EC] Engineering changes: N/A
[SN] Serial number: 0123456789
[MN] Manufacture ID: 31 34 65 34
[RV] Reserved: checksum good, 39 byte(s) reserved
End
Capabilities: [58] MSI: Enable- Count=1/8 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [a0] MSI-X: Enable+ Count=17 Masked-
Vector table: BAR=0 offset=00442000
PBA: BAR=0 offset=00443800
Capabilities: [ac] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <1us, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr+ NoSnoop+
MaxPayload 256 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s L1, Latency L0 <4us, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [100 v1] Device Serial Number f4-ce-46-ff-fe-bb-32-d4
Capabilities: [110 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [150 v1] Power Budgeting <?>
Capabilities: [160 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Kernel driver in use: bnx2x
09:00.0 PCI bridge: Broadcom EPB PCI-Express to PCI-X Bridge (rev b5) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=09, secondary=0a, subordinate=0a, sec-latency=64
Memory behind bridge: fba00000-fbafffff
Prefetchable memory behind bridge: 00000000e7100000-00000000e71fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [60] Express (v1) PCI/PCI-X Bridge, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <16us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- BrConfRtry-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s L1, Latency L0 <4us, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [90] PCI-X bridge device
Secondary Status: 64bit+ 133MHz+ SCD- USC- SCO- SRD- Freq=133MHz
Status: Dev=09:00.0 64bit- 133MHz- SCD- USC- SCO- SRD-
Upstream: Capacity=0 CommitmentLimit=0
Downstream: Capacity=0 CommitmentLimit=0
Capabilities: [b0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 04, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [14c v1] Power Budgeting <?>
0a:04.0 Ethernet controller: Broadcom Corporation NetXtreme BCM5715S Gigabit Ethernet (rev a3)
Subsystem: Hewlett-Packard Company NC326m PCIe Dual Port Adapter
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (16000ns min), Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 32
Region 0: Memory at fbaf0000 (64-bit, non-prefetchable) [size=64K]
Region 2: Memory at fbae0000 (64-bit, non-prefetchable) [size=64K]
[virtual] Expansion ROM at e7100000 [disabled] [size=128K]
Capabilities: [40] PCI-X non-bridge device
Command: DPERE- ERO+ RBC=512 OST=1
Status: Dev=0a:04.0 64bit+ 133MHz+ SCD- USC- DC=simple DMMRBC=2048 DMOST=1 DMCRS=16 RSCEM- 266MHz- 533MHz-
Capabilities: [48] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [50] Vital Product Data
Product Name: HP NC326m Dual Port PCI-E Gigabit Adapter
Read-only fields:
[PN] Part number: N/A
[EC] Engineering changes: A0
[SN] Serial number: 0123456789
[MN] Manufacture ID: 31 30 33 43
[RV] Reserved: checksum good, 45 byte(s) reserved
Read/write fields:
[YA] Asset tag: XYZ01234567
[RW] Read-write area: 107 byte(s) free
End
Capabilities: [58] MSI: Enable- Count=1/8 Maskable- 64bit+
Address: 00000000fee004d8 Data: 0000
Kernel driver in use: tg3
0a:04.1 Ethernet controller: Broadcom Corporation NetXtreme BCM5715S Gigabit Ethernet (rev a3)
Subsystem: Hewlett-Packard Company NC326m PCIe Dual Port Adapter
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (16000ns min), Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 42
Region 0: Memory at fbad0000 (64-bit, non-prefetchable) [size=64K]
Region 2: Memory at fbac0000 (64-bit, non-prefetchable) [size=64K]
[virtual] Expansion ROM at e7120000 [disabled] [size=128K]
Capabilities: [40] PCI-X non-bridge device
Command: DPERE- ERO+ RBC=512 OST=1
Status: Dev=0a:04.1 64bit+ 133MHz+ SCD- USC- DC=simple DMMRBC=2048 DMOST=1 DMCRS=16 RSCEM- 266MHz- 533MHz-
Capabilities: [48] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [50] Vital Product Data
Product Name: HP NC326m Dual Port PCI-E Gigabit Adapter
Read-only fields:
[PN] Part number: N/A
[EC] Engineering changes: A0
[SN] Serial number: 0123456789
[MN] Manufacture ID: 31 30 33 43
[RV] Reserved: checksum good, 45 byte(s) reserved
Read/write fields:
[YA] Asset tag: XYZ01234567
[RW] Read-write area: 107 byte(s) free
End
Capabilities: [58] MSI: Enable- Count=1/8 Maskable- 64bit+
Address: 00000000fee004d8 Data: 0000
Kernel driver in use: tg3
0c:00.0 RAID bus controller: Hewlett-Packard Company Smart Array G6 controllers (rev 01)
Subsystem: Hewlett-Packard Company Smart Array P410i
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 16
Region 0: Memory at fbc00000 (64-bit, non-prefetchable) [size=4M]
Region 2: Memory at fbbf0000 (64-bit, non-prefetchable) [size=4K]
Region 4: I/O ports at 4000 [size=256]
[virtual] Expansion ROM at e7200000 [disabled] [size=512K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <1us, L1 <8us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Latency L0 <512ns, L1 <64us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB
Capabilities: [ac] MSI-X: Enable+ Count=16 Masked-
Vector table: BAR=0 offset=001c2000
PBA: BAR=0 offset=001c4000
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Kernel driver in use: hpsa
3e:00.0 Host bridge: Intel Corporation Xeon 5500/Core i7 QuickPath Architecture Generic Non-Core Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:00.1 Host bridge: Intel Corporation Xeon 5500/Core i7 QuickPath Architecture System Address Decoder (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:02.0 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Link 0 (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:02.1 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Physical 0 (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:02.4 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Link 1 (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:02.5 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Physical 1 (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:03.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:03.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Target Address Decoder (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:03.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller RAS Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:03.4 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Test Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:04.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:04.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Address Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:04.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Rank Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:04.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Thermal Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:05.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:05.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Address Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:05.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Rank Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:05.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Thermal Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:06.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:06.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Address Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:06.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Rank Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3e:06.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Thermal Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:00.0 Host bridge: Intel Corporation Xeon 5500/Core i7 QuickPath Architecture Generic Non-Core Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:00.1 Host bridge: Intel Corporation Xeon 5500/Core i7 QuickPath Architecture System Address Decoder (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:02.0 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Link 0 (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:02.1 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Physical 0 (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:02.4 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Link 1 (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:02.5 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Physical 1 (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:03.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:03.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Target Address Decoder (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:03.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller RAS Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:03.4 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Test Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:04.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:04.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Address Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:04.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Rank Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:04.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Thermal Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:05.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:05.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Address Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:05.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Rank Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:05.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Thermal Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:06.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:06.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Address Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:06.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Rank Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
3f:06.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Thermal Control Registers (rev 05)
Subsystem: Hewlett-Packard Company Device 330c
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 18:50 ` James Bottomley
2011-09-01 18:58 ` Jesse Barnes
@ 2011-09-01 19:59 ` Jesse Barnes
[not found] ` <20110901200349.GO9189@beardog.cce.hp.com>
1 sibling, 1 reply; 33+ messages in thread
From: Jesse Barnes @ 2011-09-01 19:59 UTC (permalink / raw)
To: James Bottomley
Cc: Roland Dreier, Eric Dumazet, scameron, Jon Mason, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem
On Thu, 01 Sep 2011 11:50:38 -0700
James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> > > OK I found the bad commit,I got lucky... I lost some files but my
> > > machine was able to complete the bisection. CC involved people
> >
> > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> >
> > Hi Eric,
> >
> > I guess it would be useful to see "lspci -vv" output with a "good" kernel
> > and with that bad patch applied. Most likely we should see some difference
> > somewhere in the MaxPayload fields in the PCI Express capability of
> > some device.
> >
> > Either the RAID controller or something else lies, and puts a value
> > in the DevCap that it can't actually support, or else the patch is
> > buggy and puts something out of range in a DevCtl somewhere.
>
>
> While we investigate, I think the problems produced by the patch (data
> corruption) are serious enough to warrant reverting it, please Jesse.
Hm I haven't been paying attention to the compromise thread; how should
I share these changes? Is master.kernel.org down indefinitely? Is
there a new server at kernel.org I can use?
--
Jesse Barnes, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
[not found] ` <20110901200349.GO9189@beardog.cce.hp.com>
@ 2011-09-01 20:09 ` Jesse Barnes
0 siblings, 0 replies; 33+ messages in thread
From: Jesse Barnes @ 2011-09-01 20:09 UTC (permalink / raw)
To: scameron
Cc: Eric Dumazet, scameron, Jon Mason, Jesse Barnes, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem, linux-pci,
Roland Dreier, James Bottomley
[-- Attachment #1: Type: text/plain, Size: 1773 bytes --]
On Thu, 1 Sep 2011 15:03:49 -0500
scameron@beardog.cce.hp.com wrote:
> On Thu, Sep 01, 2011 at 12:59:38PM -0700, Jesse Barnes wrote:
> > On Thu, 01 Sep 2011 11:50:38 -0700
> > James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> >
> > > On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> > > > > OK I found the bad commit,I got lucky... I lost some files but my
> > > > > machine was able to complete the bisection. CC involved people
> > > >
> > > > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> > > >
> > > > Hi Eric,
> > > >
> > > > I guess it would be useful to see "lspci -vv" output with a "good" kernel
> > > > and with that bad patch applied. Most likely we should see some difference
> > > > somewhere in the MaxPayload fields in the PCI Express capability of
> > > > some device.
> > > >
> > > > Either the RAID controller or something else lies, and puts a value
> > > > in the DevCap that it can't actually support, or else the patch is
> > > > buggy and puts something out of range in a DevCtl somewhere.
> > >
> > >
> > > While we investigate, I think the problems produced by the patch (data
> > > corruption) are serious enough to warrant reverting it, please Jesse.
> >
> > Hm I haven't been paying attention to the compromise thread; how should
> > I share these changes? Is master.kernel.org down indefinitely? Is
> > there a new server at kernel.org I can use?
>
> I can't answer that question, but I would like a copy of your revert
> patch(es) to test (as a simple patch --reverse of the original commit on the 3.1-rc4
> tree didn't go in cleanly).
Attached is the series. Applies on top of my for-linus branch.
--
Jesse Barnes, Intel Open Source Technology Center
[-- Attachment #2: 0003-Revert-PCI-Set-PCI-E-Max-Payload-Size-on-fabric.patch --]
[-- Type: text/x-patch, Size: 12920 bytes --]
>From 1679df1a7dfdc880133c0c118d33a52db2108bba Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu, 1 Sep 2011 12:36:25 -0700
Subject: [PATCH 3/3] Revert "PCI: Set PCI-E Max Payload Size on fabric"
This reverts commit b03e7495a862b028294f59fc87286d6d78ee7fa1. This
patch has caused GPU hangs on radeon and data corruption in some SCSI
configurations, so revert it until we understand the problems and have a
fix.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
arch/x86/pci/acpi.c | 9 ---
drivers/pci/hotplug/pcihp_slot.c | 45 ++++++++++++-
drivers/pci/pci.c | 67 -----------------
drivers/pci/probe.c | 145 --------------------------------------
include/linux/pci.h | 15 +----
5 files changed, 45 insertions(+), 236 deletions(-)
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index c953302..ae3cb23 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -360,15 +360,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
}
}
- /* After the PCI-E bus has been walked and all devices discovered,
- * configure any settings of the fabric that might be necessary.
- */
- if (bus) {
- struct pci_bus *child;
- list_for_each_entry(child, &bus->children, node)
- pcie_bus_configure_settings(child, child->self->pcie_mpss);
- }
-
if (!bus)
kfree(sd);
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
index 753b21a..749fdf0 100644
--- a/drivers/pci/hotplug/pcihp_slot.c
+++ b/drivers/pci/hotplug/pcihp_slot.c
@@ -158,6 +158,47 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
*/
}
+/* Program PCIE MaxPayload setting on device: ensure parent maxpayload <= device */
+static int pci_set_payload(struct pci_dev *dev)
+{
+ int pos, ppos;
+ u16 pctl, psz;
+ u16 dctl, dsz, dcap, dmax;
+ struct pci_dev *parent;
+
+ parent = dev->bus->self;
+ pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+ if (!pos)
+ return 0;
+
+ /* Read Device MaxPayload capability and setting */
+ pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &dctl);
+ pci_read_config_word(dev, pos + PCI_EXP_DEVCAP, &dcap);
+ dsz = (dctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
+ dmax = (dcap & PCI_EXP_DEVCAP_PAYLOAD);
+
+ /* Read Parent MaxPayload setting */
+ ppos = pci_find_capability(parent, PCI_CAP_ID_EXP);
+ if (!ppos)
+ return 0;
+ pci_read_config_word(parent, ppos + PCI_EXP_DEVCTL, &pctl);
+ psz = (pctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
+
+ /* If parent payload > device max payload -> error
+ * If parent payload > device payload -> set speed
+ * If parent payload <= device payload -> do nothing
+ */
+ if (psz > dmax)
+ return -1;
+ else if (psz > dsz) {
+ dev_info(&dev->dev, "Setting MaxPayload to %d\n", 128 << psz);
+ pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
+ (dctl & ~PCI_EXP_DEVCTL_PAYLOAD) +
+ (psz << 5));
+ }
+ return 0;
+}
+
void pci_configure_slot(struct pci_dev *dev)
{
struct pci_dev *cdev;
@@ -169,7 +210,9 @@ void pci_configure_slot(struct pci_dev *dev)
(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
return;
- pcie_bus_configure_settings(dev->bus, dev->bus->self->pcie_mpss);
+ ret = pci_set_payload(dev);
+ if (ret)
+ dev_warn(&dev->dev, "could not set device max payload\n");
memset(&hpp, 0, sizeof(hpp));
ret = pci_get_hp_params(dev, &hpp);
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 466fad6..08a95b3 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -77,8 +77,6 @@ unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE;
unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE;
unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE;
-enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_PERFORMANCE;
-
/*
* The default CLS is used if arch didn't set CLS explicitly and not
* all pci devices agree on the same value. Arch can override either
@@ -3225,67 +3223,6 @@ out:
EXPORT_SYMBOL(pcie_set_readrq);
/**
- * pcie_get_mps - get PCI Express maximum payload size
- * @dev: PCI device to query
- *
- * Returns maximum payload size in bytes
- * or appropriate error value.
- */
-int pcie_get_mps(struct pci_dev *dev)
-{
- int ret, cap;
- u16 ctl;
-
- cap = pci_pcie_cap(dev);
- if (!cap)
- return -EINVAL;
-
- ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
- if (!ret)
- ret = 128 << ((ctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
-
- return ret;
-}
-
-/**
- * pcie_set_mps - set PCI Express maximum payload size
- * @dev: PCI device to query
- * @rq: maximum payload size in bytes
- * valid values are 128, 256, 512, 1024, 2048, 4096
- *
- * If possible sets maximum payload size
- */
-int pcie_set_mps(struct pci_dev *dev, int mps)
-{
- int cap, err = -EINVAL;
- u16 ctl, v;
-
- if (mps < 128 || mps > 4096 || !is_power_of_2(mps))
- goto out;
-
- v = ffs(mps) - 8;
- if (v > dev->pcie_mpss)
- goto out;
- v <<= 5;
-
- cap = pci_pcie_cap(dev);
- if (!cap)
- goto out;
-
- err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
- if (err)
- goto out;
-
- if ((ctl & PCI_EXP_DEVCTL_PAYLOAD) != v) {
- ctl &= ~PCI_EXP_DEVCTL_PAYLOAD;
- ctl |= v;
- err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, ctl);
- }
-out:
- return err;
-}
-
-/**
* pci_select_bars - Make BAR mask from the type of resource
* @dev: the PCI device for which BAR mask is made
* @flags: resource type mask to be selected
@@ -3568,10 +3505,6 @@ static int __init pci_setup(char *str)
pci_hotplug_io_size = memparse(str + 9, &str);
} else if (!strncmp(str, "hpmemsize=", 10)) {
pci_hotplug_mem_size = memparse(str + 10, &str);
- } else if (!strncmp(str, "pcie_bus_safe", 13)) {
- pcie_bus_config = PCIE_BUS_SAFE;
- } else if (!strncmp(str, "pcie_bus_perf", 13)) {
- pcie_bus_config = PCIE_BUS_PERFORMANCE;
} else {
printk(KERN_ERR "PCI: Unknown option `%s'\n",
str);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 5becf7c..795c902 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -856,8 +856,6 @@ void set_pcie_port_type(struct pci_dev *pdev)
pdev->pcie_cap = pos;
pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, ®16);
pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
- pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, ®16);
- pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
}
void set_pcie_hotplug_bridge(struct pci_dev *pdev)
@@ -1328,149 +1326,6 @@ int pci_scan_slot(struct pci_bus *bus, int devfn)
return nr;
}
-static int pcie_find_smpss(struct pci_dev *dev, void *data)
-{
- u8 *smpss = data;
-
- if (!pci_is_pcie(dev))
- return 0;
-
- /* For PCIE hotplug enabled slots not connected directly to a
- * PCI-E root port, there can be problems when hotplugging
- * devices. This is due to the possibility of hotplugging a
- * device into the fabric with a smaller MPS that the devices
- * currently running have configured. Modifying the MPS on the
- * running devices could cause a fatal bus error due to an
- * incoming frame being larger than the newly configured MPS.
- * To work around this, the MPS for the entire fabric must be
- * set to the minimum size. Any devices hotplugged into this
- * fabric will have the minimum MPS set. If the PCI hotplug
- * slot is directly connected to the root port and there are not
- * other devices on the fabric (which seems to be the most
- * common case), then this is not an issue and MPS discovery
- * will occur as normal.
- */
- if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) ||
- dev->bus->self->pcie_type != PCI_EXP_TYPE_ROOT_PORT))
- *smpss = 0;
-
- if (*smpss > dev->pcie_mpss)
- *smpss = dev->pcie_mpss;
-
- return 0;
-}
-
-static void pcie_write_mps(struct pci_dev *dev, int mps)
-{
- int rc, dev_mpss;
-
- dev_mpss = 128 << dev->pcie_mpss;
-
- if (pcie_bus_config == PCIE_BUS_PERFORMANCE) {
- if (dev->bus->self) {
- dev_dbg(&dev->bus->dev, "Bus MPSS %d\n",
- 128 << dev->bus->self->pcie_mpss);
-
- /* For "MPS Force Max", the assumption is made that
- * downstream communication will never be larger than
- * the MRRS. So, the MPS only needs to be configured
- * for the upstream communication. This being the case,
- * walk from the top down and set the MPS of the child
- * to that of the parent bus.
- */
- mps = 128 << dev->bus->self->pcie_mpss;
- if (mps > dev_mpss)
- dev_warn(&dev->dev, "MPS configured higher than"
- " maximum supported by the device. If"
- " a bus issue occurs, try running with"
- " pci=pcie_bus_safe.\n");
- }
-
- dev->pcie_mpss = ffs(mps) - 8;
- }
-
- rc = pcie_set_mps(dev, mps);
- if (rc)
- dev_err(&dev->dev, "Failed attempting to set the MPS\n");
-}
-
-static void pcie_write_mrrs(struct pci_dev *dev, int mps)
-{
- int rc, mrrs;
-
- if (pcie_bus_config == PCIE_BUS_PERFORMANCE) {
- int dev_mpss = 128 << dev->pcie_mpss;
-
- /* For Max performance, the MRRS must be set to the largest
- * supported value. However, it cannot be configured larger
- * than the MPS the device or the bus can support. This assumes
- * that the largest MRRS available on the device cannot be
- * smaller than the device MPSS.
- */
- mrrs = mps < dev_mpss ? mps : dev_mpss;
- } else
- /* In the "safe" case, configure the MRRS for fairness on the
- * bus by making all devices have the same size
- */
- mrrs = mps;
-
-
- /* MRRS is a R/W register. Invalid values can be written, but a
- * subsiquent read will verify if the value is acceptable or not.
- * If the MRRS value provided is not acceptable (e.g., too large),
- * shrink the value until it is acceptable to the HW.
- */
- while (mrrs != pcie_get_readrq(dev) && mrrs >= 128) {
- rc = pcie_set_readrq(dev, mrrs);
- if (rc)
- dev_err(&dev->dev, "Failed attempting to set the MRRS\n");
-
- mrrs /= 2;
- }
-}
-
-static int pcie_bus_configure_set(struct pci_dev *dev, void *data)
-{
- int mps = 128 << *(u8 *)data;
-
- if (!pci_is_pcie(dev))
- return 0;
-
- dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n",
- pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev));
-
- pcie_write_mps(dev, mps);
- pcie_write_mrrs(dev, mps);
-
- dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n",
- pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev));
-
- return 0;
-}
-
-/* pcie_bus_configure_mps requires that pci_walk_bus work in a top-down,
- * parents then children fashion. If this changes, then this code will not
- * work as designed.
- */
-void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss)
-{
- u8 smpss = mpss;
-
- if (!bus->self)
- return;
-
- if (!pci_is_pcie(bus->self))
- return;
-
- if (pcie_bus_config == PCIE_BUS_SAFE) {
- pcie_find_smpss(bus->self, &smpss);
- pci_walk_bus(bus, pcie_find_smpss, &smpss);
- }
-
- pcie_bus_configure_set(bus->self, &smpss);
- pci_walk_bus(bus, pcie_bus_configure_set, &smpss);
-}
-
unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
{
unsigned int devfn, pass, max = bus->secondary;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 8c230cb..7968f9d 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -251,8 +251,7 @@ struct pci_dev {
u8 revision; /* PCI revision, low byte of class word */
u8 hdr_type; /* PCI header type (`multi' flag masked out) */
u8 pcie_cap; /* PCI-E capability offset */
- u8 pcie_type:4; /* PCI-E device/port type */
- u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */
+ u8 pcie_type; /* PCI-E device/port type */
u8 rom_base_reg; /* which config register controls the ROM */
u8 pin; /* which interrupt pin this device uses */
@@ -618,16 +617,6 @@ struct pci_driver {
/* these external functions are only available when PCI support is enabled */
#ifdef CONFIG_PCI
-extern void pcie_bus_configure_settings(struct pci_bus *bus, u8 smpss);
-
-enum pcie_bus_config_types {
- PCIE_BUS_PERFORMANCE,
- PCIE_BUS_SAFE,
- PCIE_BUS_PEER2PEER,
-};
-
-extern enum pcie_bus_config_types pcie_bus_config;
-
extern struct bus_type pci_bus_type;
/* Do NOT directly access these two variables, unless you are arch specific pci
@@ -807,8 +796,6 @@ int pcix_get_mmrbc(struct pci_dev *dev);
int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
int pcie_get_readrq(struct pci_dev *dev);
int pcie_set_readrq(struct pci_dev *dev, int rq);
-int pcie_get_mps(struct pci_dev *dev);
-int pcie_set_mps(struct pci_dev *dev, int mps);
int __pci_reset_function(struct pci_dev *dev);
int pci_reset_function(struct pci_dev *dev);
void pci_update_resource(struct pci_dev *dev, int resno);
--
1.7.1
[-- Attachment #3: 0002-PCI-Revert-PCI-export-pcie_bus_configure_settings-sy.patch --]
[-- Type: text/x-patch, Size: 930 bytes --]
>From 00defdce8227eb5734367727003d725c012e92c8 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu, 1 Sep 2011 12:35:43 -0700
Subject: [PATCH 2/3] PCI: Revert "PCI: export pcie_bus_configure_settings symbol"
This reverts commit debc3b778508f59696ff188f0feca271dcbfa7d9, a fixup for
the next reverted patch.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/pci/probe.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 8473727..5becf7c 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1470,7 +1470,6 @@ void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss)
pcie_bus_configure_set(bus->self, &smpss);
pci_walk_bus(bus, pcie_bus_configure_set, &smpss);
}
-EXPORT_SYMBOL_GPL(pcie_bus_configure_settings);
unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
{
--
1.7.1
[-- Attachment #4: 0001-PCI-Revert-pci-fix-new-kernel-doc-warning-in-pci.c.patch --]
[-- Type: text/x-patch, Size: 944 bytes --]
>From 7ec72e08c43fbf698e62eac1d509cfe8238c0b25 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu, 1 Sep 2011 12:32:55 -0700
Subject: [PATCH 1/3] PCI: Revert "pci: fix new kernel-doc warning in pci.c"
This reverts commit 47c08f3107270e5a439bc0106a308f7c48c9621d, a comment
fix up for the next revert.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/pci/pci.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0ce6742..466fad6 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3250,7 +3250,7 @@ int pcie_get_mps(struct pci_dev *dev)
/**
* pcie_set_mps - set PCI Express maximum payload size
* @dev: PCI device to query
- * @mps: maximum payload size in bytes
+ * @rq: maximum payload size in bytes
* valid values are 128, 256, 512, 1024, 2048, 4096
*
* If possible sets maximum payload size
--
1.7.1
^ permalink raw reply related [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
@ 2011-09-01 20:09 ` Jesse Barnes
0 siblings, 0 replies; 33+ messages in thread
From: Jesse Barnes @ 2011-09-01 20:09 UTC (permalink / raw)
Cc: Eric Dumazet, scameron, Jon Mason, Jesse Barnes, linux-scsi,
linux-kernel, stephenmcameron, thenzl, akpm, mikem, linux-pci,
Roland Dreier, James Bottomley
[-- Attachment #1: Type: text/plain, Size: 1773 bytes --]
On Thu, 1 Sep 2011 15:03:49 -0500
scameron@beardog.cce.hp.com wrote:
> On Thu, Sep 01, 2011 at 12:59:38PM -0700, Jesse Barnes wrote:
> > On Thu, 01 Sep 2011 11:50:38 -0700
> > James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> >
> > > On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> > > > > OK I found the bad commit,I got lucky... I lost some files but my
> > > > > machine was able to complete the bisection. CC involved people
> > > >
> > > > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> > > >
> > > > Hi Eric,
> > > >
> > > > I guess it would be useful to see "lspci -vv" output with a "good" kernel
> > > > and with that bad patch applied. Most likely we should see some difference
> > > > somewhere in the MaxPayload fields in the PCI Express capability of
> > > > some device.
> > > >
> > > > Either the RAID controller or something else lies, and puts a value
> > > > in the DevCap that it can't actually support, or else the patch is
> > > > buggy and puts something out of range in a DevCtl somewhere.
> > >
> > >
> > > While we investigate, I think the problems produced by the patch (data
> > > corruption) are serious enough to warrant reverting it, please Jesse.
> >
> > Hm I haven't been paying attention to the compromise thread; how should
> > I share these changes? Is master.kernel.org down indefinitely? Is
> > there a new server at kernel.org I can use?
>
> I can't answer that question, but I would like a copy of your revert
> patch(es) to test (as a simple patch --reverse of the original commit on the 3.1-rc4
> tree didn't go in cleanly).
Attached is the series. Applies on top of my for-linus branch.
--
Jesse Barnes, Intel Open Source Technology Center
[-- Attachment #2: 0003-Revert-PCI-Set-PCI-E-Max-Payload-Size-on-fabric.patch --]
[-- Type: text/x-patch, Size: 12920 bytes --]
>From 1679df1a7dfdc880133c0c118d33a52db2108bba Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu, 1 Sep 2011 12:36:25 -0700
Subject: [PATCH 3/3] Revert "PCI: Set PCI-E Max Payload Size on fabric"
This reverts commit b03e7495a862b028294f59fc87286d6d78ee7fa1. This
patch has caused GPU hangs on radeon and data corruption in some SCSI
configurations, so revert it until we understand the problems and have a
fix.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
arch/x86/pci/acpi.c | 9 ---
drivers/pci/hotplug/pcihp_slot.c | 45 ++++++++++++-
drivers/pci/pci.c | 67 -----------------
drivers/pci/probe.c | 145 --------------------------------------
include/linux/pci.h | 15 +----
5 files changed, 45 insertions(+), 236 deletions(-)
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index c953302..ae3cb23 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -360,15 +360,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
}
}
- /* After the PCI-E bus has been walked and all devices discovered,
- * configure any settings of the fabric that might be necessary.
- */
- if (bus) {
- struct pci_bus *child;
- list_for_each_entry(child, &bus->children, node)
- pcie_bus_configure_settings(child, child->self->pcie_mpss);
- }
-
if (!bus)
kfree(sd);
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
index 753b21a..749fdf0 100644
--- a/drivers/pci/hotplug/pcihp_slot.c
+++ b/drivers/pci/hotplug/pcihp_slot.c
@@ -158,6 +158,47 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
*/
}
+/* Program PCIE MaxPayload setting on device: ensure parent maxpayload <= device */
+static int pci_set_payload(struct pci_dev *dev)
+{
+ int pos, ppos;
+ u16 pctl, psz;
+ u16 dctl, dsz, dcap, dmax;
+ struct pci_dev *parent;
+
+ parent = dev->bus->self;
+ pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+ if (!pos)
+ return 0;
+
+ /* Read Device MaxPayload capability and setting */
+ pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &dctl);
+ pci_read_config_word(dev, pos + PCI_EXP_DEVCAP, &dcap);
+ dsz = (dctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
+ dmax = (dcap & PCI_EXP_DEVCAP_PAYLOAD);
+
+ /* Read Parent MaxPayload setting */
+ ppos = pci_find_capability(parent, PCI_CAP_ID_EXP);
+ if (!ppos)
+ return 0;
+ pci_read_config_word(parent, ppos + PCI_EXP_DEVCTL, &pctl);
+ psz = (pctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
+
+ /* If parent payload > device max payload -> error
+ * If parent payload > device payload -> set speed
+ * If parent payload <= device payload -> do nothing
+ */
+ if (psz > dmax)
+ return -1;
+ else if (psz > dsz) {
+ dev_info(&dev->dev, "Setting MaxPayload to %d\n", 128 << psz);
+ pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
+ (dctl & ~PCI_EXP_DEVCTL_PAYLOAD) +
+ (psz << 5));
+ }
+ return 0;
+}
+
void pci_configure_slot(struct pci_dev *dev)
{
struct pci_dev *cdev;
@@ -169,7 +210,9 @@ void pci_configure_slot(struct pci_dev *dev)
(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
return;
- pcie_bus_configure_settings(dev->bus, dev->bus->self->pcie_mpss);
+ ret = pci_set_payload(dev);
+ if (ret)
+ dev_warn(&dev->dev, "could not set device max payload\n");
memset(&hpp, 0, sizeof(hpp));
ret = pci_get_hp_params(dev, &hpp);
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 466fad6..08a95b3 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -77,8 +77,6 @@ unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE;
unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE;
unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE;
-enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_PERFORMANCE;
-
/*
* The default CLS is used if arch didn't set CLS explicitly and not
* all pci devices agree on the same value. Arch can override either
@@ -3225,67 +3223,6 @@ out:
EXPORT_SYMBOL(pcie_set_readrq);
/**
- * pcie_get_mps - get PCI Express maximum payload size
- * @dev: PCI device to query
- *
- * Returns maximum payload size in bytes
- * or appropriate error value.
- */
-int pcie_get_mps(struct pci_dev *dev)
-{
- int ret, cap;
- u16 ctl;
-
- cap = pci_pcie_cap(dev);
- if (!cap)
- return -EINVAL;
-
- ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
- if (!ret)
- ret = 128 << ((ctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
-
- return ret;
-}
-
-/**
- * pcie_set_mps - set PCI Express maximum payload size
- * @dev: PCI device to query
- * @rq: maximum payload size in bytes
- * valid values are 128, 256, 512, 1024, 2048, 4096
- *
- * If possible sets maximum payload size
- */
-int pcie_set_mps(struct pci_dev *dev, int mps)
-{
- int cap, err = -EINVAL;
- u16 ctl, v;
-
- if (mps < 128 || mps > 4096 || !is_power_of_2(mps))
- goto out;
-
- v = ffs(mps) - 8;
- if (v > dev->pcie_mpss)
- goto out;
- v <<= 5;
-
- cap = pci_pcie_cap(dev);
- if (!cap)
- goto out;
-
- err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
- if (err)
- goto out;
-
- if ((ctl & PCI_EXP_DEVCTL_PAYLOAD) != v) {
- ctl &= ~PCI_EXP_DEVCTL_PAYLOAD;
- ctl |= v;
- err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, ctl);
- }
-out:
- return err;
-}
-
-/**
* pci_select_bars - Make BAR mask from the type of resource
* @dev: the PCI device for which BAR mask is made
* @flags: resource type mask to be selected
@@ -3568,10 +3505,6 @@ static int __init pci_setup(char *str)
pci_hotplug_io_size = memparse(str + 9, &str);
} else if (!strncmp(str, "hpmemsize=", 10)) {
pci_hotplug_mem_size = memparse(str + 10, &str);
- } else if (!strncmp(str, "pcie_bus_safe", 13)) {
- pcie_bus_config = PCIE_BUS_SAFE;
- } else if (!strncmp(str, "pcie_bus_perf", 13)) {
- pcie_bus_config = PCIE_BUS_PERFORMANCE;
} else {
printk(KERN_ERR "PCI: Unknown option `%s'\n",
str);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 5becf7c..795c902 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -856,8 +856,6 @@ void set_pcie_port_type(struct pci_dev *pdev)
pdev->pcie_cap = pos;
pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, ®16);
pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
- pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, ®16);
- pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
}
void set_pcie_hotplug_bridge(struct pci_dev *pdev)
@@ -1328,149 +1326,6 @@ int pci_scan_slot(struct pci_bus *bus, int devfn)
return nr;
}
-static int pcie_find_smpss(struct pci_dev *dev, void *data)
-{
- u8 *smpss = data;
-
- if (!pci_is_pcie(dev))
- return 0;
-
- /* For PCIE hotplug enabled slots not connected directly to a
- * PCI-E root port, there can be problems when hotplugging
- * devices. This is due to the possibility of hotplugging a
- * device into the fabric with a smaller MPS that the devices
- * currently running have configured. Modifying the MPS on the
- * running devices could cause a fatal bus error due to an
- * incoming frame being larger than the newly configured MPS.
- * To work around this, the MPS for the entire fabric must be
- * set to the minimum size. Any devices hotplugged into this
- * fabric will have the minimum MPS set. If the PCI hotplug
- * slot is directly connected to the root port and there are not
- * other devices on the fabric (which seems to be the most
- * common case), then this is not an issue and MPS discovery
- * will occur as normal.
- */
- if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) ||
- dev->bus->self->pcie_type != PCI_EXP_TYPE_ROOT_PORT))
- *smpss = 0;
-
- if (*smpss > dev->pcie_mpss)
- *smpss = dev->pcie_mpss;
-
- return 0;
-}
-
-static void pcie_write_mps(struct pci_dev *dev, int mps)
-{
- int rc, dev_mpss;
-
- dev_mpss = 128 << dev->pcie_mpss;
-
- if (pcie_bus_config == PCIE_BUS_PERFORMANCE) {
- if (dev->bus->self) {
- dev_dbg(&dev->bus->dev, "Bus MPSS %d\n",
- 128 << dev->bus->self->pcie_mpss);
-
- /* For "MPS Force Max", the assumption is made that
- * downstream communication will never be larger than
- * the MRRS. So, the MPS only needs to be configured
- * for the upstream communication. This being the case,
- * walk from the top down and set the MPS of the child
- * to that of the parent bus.
- */
- mps = 128 << dev->bus->self->pcie_mpss;
- if (mps > dev_mpss)
- dev_warn(&dev->dev, "MPS configured higher than"
- " maximum supported by the device. If"
- " a bus issue occurs, try running with"
- " pci=pcie_bus_safe.\n");
- }
-
- dev->pcie_mpss = ffs(mps) - 8;
- }
-
- rc = pcie_set_mps(dev, mps);
- if (rc)
- dev_err(&dev->dev, "Failed attempting to set the MPS\n");
-}
-
-static void pcie_write_mrrs(struct pci_dev *dev, int mps)
-{
- int rc, mrrs;
-
- if (pcie_bus_config == PCIE_BUS_PERFORMANCE) {
- int dev_mpss = 128 << dev->pcie_mpss;
-
- /* For Max performance, the MRRS must be set to the largest
- * supported value. However, it cannot be configured larger
- * than the MPS the device or the bus can support. This assumes
- * that the largest MRRS available on the device cannot be
- * smaller than the device MPSS.
- */
- mrrs = mps < dev_mpss ? mps : dev_mpss;
- } else
- /* In the "safe" case, configure the MRRS for fairness on the
- * bus by making all devices have the same size
- */
- mrrs = mps;
-
-
- /* MRRS is a R/W register. Invalid values can be written, but a
- * subsiquent read will verify if the value is acceptable or not.
- * If the MRRS value provided is not acceptable (e.g., too large),
- * shrink the value until it is acceptable to the HW.
- */
- while (mrrs != pcie_get_readrq(dev) && mrrs >= 128) {
- rc = pcie_set_readrq(dev, mrrs);
- if (rc)
- dev_err(&dev->dev, "Failed attempting to set the MRRS\n");
-
- mrrs /= 2;
- }
-}
-
-static int pcie_bus_configure_set(struct pci_dev *dev, void *data)
-{
- int mps = 128 << *(u8 *)data;
-
- if (!pci_is_pcie(dev))
- return 0;
-
- dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n",
- pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev));
-
- pcie_write_mps(dev, mps);
- pcie_write_mrrs(dev, mps);
-
- dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n",
- pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev));
-
- return 0;
-}
-
-/* pcie_bus_configure_mps requires that pci_walk_bus work in a top-down,
- * parents then children fashion. If this changes, then this code will not
- * work as designed.
- */
-void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss)
-{
- u8 smpss = mpss;
-
- if (!bus->self)
- return;
-
- if (!pci_is_pcie(bus->self))
- return;
-
- if (pcie_bus_config == PCIE_BUS_SAFE) {
- pcie_find_smpss(bus->self, &smpss);
- pci_walk_bus(bus, pcie_find_smpss, &smpss);
- }
-
- pcie_bus_configure_set(bus->self, &smpss);
- pci_walk_bus(bus, pcie_bus_configure_set, &smpss);
-}
-
unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
{
unsigned int devfn, pass, max = bus->secondary;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 8c230cb..7968f9d 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -251,8 +251,7 @@ struct pci_dev {
u8 revision; /* PCI revision, low byte of class word */
u8 hdr_type; /* PCI header type (`multi' flag masked out) */
u8 pcie_cap; /* PCI-E capability offset */
- u8 pcie_type:4; /* PCI-E device/port type */
- u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */
+ u8 pcie_type; /* PCI-E device/port type */
u8 rom_base_reg; /* which config register controls the ROM */
u8 pin; /* which interrupt pin this device uses */
@@ -618,16 +617,6 @@ struct pci_driver {
/* these external functions are only available when PCI support is enabled */
#ifdef CONFIG_PCI
-extern void pcie_bus_configure_settings(struct pci_bus *bus, u8 smpss);
-
-enum pcie_bus_config_types {
- PCIE_BUS_PERFORMANCE,
- PCIE_BUS_SAFE,
- PCIE_BUS_PEER2PEER,
-};
-
-extern enum pcie_bus_config_types pcie_bus_config;
-
extern struct bus_type pci_bus_type;
/* Do NOT directly access these two variables, unless you are arch specific pci
@@ -807,8 +796,6 @@ int pcix_get_mmrbc(struct pci_dev *dev);
int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
int pcie_get_readrq(struct pci_dev *dev);
int pcie_set_readrq(struct pci_dev *dev, int rq);
-int pcie_get_mps(struct pci_dev *dev);
-int pcie_set_mps(struct pci_dev *dev, int mps);
int __pci_reset_function(struct pci_dev *dev);
int pci_reset_function(struct pci_dev *dev);
void pci_update_resource(struct pci_dev *dev, int resno);
--
1.7.1
[-- Attachment #3: 0002-PCI-Revert-PCI-export-pcie_bus_configure_settings-sy.patch --]
[-- Type: text/x-patch, Size: 930 bytes --]
>From 00defdce8227eb5734367727003d725c012e92c8 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu, 1 Sep 2011 12:35:43 -0700
Subject: [PATCH 2/3] PCI: Revert "PCI: export pcie_bus_configure_settings symbol"
This reverts commit debc3b778508f59696ff188f0feca271dcbfa7d9, a fixup for
the next reverted patch.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/pci/probe.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 8473727..5becf7c 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1470,7 +1470,6 @@ void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss)
pcie_bus_configure_set(bus->self, &smpss);
pci_walk_bus(bus, pcie_bus_configure_set, &smpss);
}
-EXPORT_SYMBOL_GPL(pcie_bus_configure_settings);
unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
{
--
1.7.1
[-- Attachment #4: 0001-PCI-Revert-pci-fix-new-kernel-doc-warning-in-pci.c.patch --]
[-- Type: text/x-patch, Size: 944 bytes --]
>From 7ec72e08c43fbf698e62eac1d509cfe8238c0b25 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu, 1 Sep 2011 12:32:55 -0700
Subject: [PATCH 1/3] PCI: Revert "pci: fix new kernel-doc warning in pci.c"
This reverts commit 47c08f3107270e5a439bc0106a308f7c48c9621d, a comment
fix up for the next revert.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/pci/pci.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0ce6742..466fad6 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3250,7 +3250,7 @@ int pcie_get_mps(struct pci_dev *dev)
/**
* pcie_set_mps - set PCI Express maximum payload size
* @dev: PCI device to query
- * @mps: maximum payload size in bytes
+ * @rq: maximum payload size in bytes
* valid values are 128, 256, 512, 1024, 2048, 4096
*
* If possible sets maximum payload size
--
1.7.1
^ permalink raw reply related [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 20:09 ` Jesse Barnes
(?)
@ 2011-09-01 20:44 ` scameron
2011-09-01 21:50 ` Jon Mason
-1 siblings, 1 reply; 33+ messages in thread
From: scameron @ 2011-09-01 20:44 UTC (permalink / raw)
To: Jesse Barnes
Cc: Eric Dumazet, Jon Mason, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley, scameron
On Thu, Sep 01, 2011 at 01:09:30PM -0700, Jesse Barnes wrote:
> On Thu, 1 Sep 2011 15:03:49 -0500
> scameron@beardog.cce.hp.com wrote:
>
> > On Thu, Sep 01, 2011 at 12:59:38PM -0700, Jesse Barnes wrote:
> > > On Thu, 01 Sep 2011 11:50:38 -0700
> > > James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> > >
> > > > On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> > > > > > OK I found the bad commit,I got lucky... I lost some files but my
> > > > > > machine was able to complete the bisection. CC involved people
> > > > >
> > > > > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> > > > >
> > > > > Hi Eric,
> > > > >
> > > > > I guess it would be useful to see "lspci -vv" output with a "good" kernel
> > > > > and with that bad patch applied. Most likely we should see some difference
> > > > > somewhere in the MaxPayload fields in the PCI Express capability of
> > > > > some device.
> > > > >
> > > > > Either the RAID controller or something else lies, and puts a value
> > > > > in the DevCap that it can't actually support, or else the patch is
> > > > > buggy and puts something out of range in a DevCtl somewhere.
> > > >
> > > >
> > > > While we investigate, I think the problems produced by the patch (data
> > > > corruption) are serious enough to warrant reverting it, please Jesse.
> > >
> > > Hm I haven't been paying attention to the compromise thread; how should
> > > I share these changes? Is master.kernel.org down indefinitely? Is
> > > there a new server at kernel.org I can use?
> >
> > I can't answer that question, but I would like a copy of your revert
> > patch(es) to test (as a simple patch --reverse of the original commit on the 3.1-rc4
> > tree didn't go in cleanly).
>
> Attached is the series. Applies on top of my for-linus branch.
Thanks. I tried them out vs. 3.1-rc4, and they applied cleanly and
make things work on my BL460g7.
-- steve
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 20:44 ` scameron
@ 2011-09-01 21:50 ` Jon Mason
2011-09-01 22:01 ` Eric Dumazet
` (2 more replies)
0 siblings, 3 replies; 33+ messages in thread
From: Jon Mason @ 2011-09-01 21:50 UTC (permalink / raw)
To: scameron
Cc: Jesse Barnes, Eric Dumazet, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley
[-- Attachment #1: Type: text/plain, Size: 2295 bytes --]
On Thu, Sep 1, 2011 at 3:44 PM, <scameron@beardog.cce.hp.com> wrote:
> On Thu, Sep 01, 2011 at 01:09:30PM -0700, Jesse Barnes wrote:
>> On Thu, 1 Sep 2011 15:03:49 -0500
>> scameron@beardog.cce.hp.com wrote:
>>
>> > On Thu, Sep 01, 2011 at 12:59:38PM -0700, Jesse Barnes wrote:
>> > > On Thu, 01 Sep 2011 11:50:38 -0700
>> > > James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
>> > >
>> > > > On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
>> > > > > > OK I found the bad commit,I got lucky... I lost some files but my
>> > > > > > machine was able to complete the bisection. CC involved people
>> > > > >
>> > > > > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
>> > > > >
>> > > > > Hi Eric,
>> > > > >
>> > > > > I guess it would be useful to see "lspci -vv" output with a "good" kernel
>> > > > > and with that bad patch applied. Most likely we should see some difference
>> > > > > somewhere in the MaxPayload fields in the PCI Express capability of
>> > > > > some device.
>> > > > >
>> > > > > Either the RAID controller or something else lies, and puts a value
>> > > > > in the DevCap that it can't actually support, or else the patch is
>> > > > > buggy and puts something out of range in a DevCtl somewhere.
>> > > >
>> > > >
>> > > > While we investigate, I think the problems produced by the patch (data
>> > > > corruption) are serious enough to warrant reverting it, please Jesse.
>> > >
>> > > Hm I haven't been paying attention to the compromise thread; how should
>> > > I share these changes? Is master.kernel.org down indefinitely? Is
>> > > there a new server at kernel.org I can use?
>> >
>> > I can't answer that question, but I would like a copy of your revert
>> > patch(es) to test (as a simple patch --reverse of the original commit on the 3.1-rc4
>> > tree didn't go in cleanly).
>>
>> Attached is the series. Applies on top of my for-linus branch.
>
> Thanks. I tried them out vs. 3.1-rc4, and they applied cleanly and
> make things work on my BL460g7.
I believe modifying the MRRS values is what is causing the issues.
Can you try the attached patch and verify that it also resolves the
issue?
Thanks,
Jon
> -- steve
>
>
>
>
>
>
[-- Attachment #2: mrrs_removal.patch --]
[-- Type: text/x-patch, Size: 1848 bytes --]
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 8473727..d896c5e 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1394,41 +1394,6 @@ static void pcie_write_mps(struct pci_dev *dev, int mps)
dev_err(&dev->dev, "Failed attempting to set the MPS\n");
}
-static void pcie_write_mrrs(struct pci_dev *dev, int mps)
-{
- int rc, mrrs;
-
- if (pcie_bus_config == PCIE_BUS_PERFORMANCE) {
- int dev_mpss = 128 << dev->pcie_mpss;
-
- /* For Max performance, the MRRS must be set to the largest
- * supported value. However, it cannot be configured larger
- * than the MPS the device or the bus can support. This assumes
- * that the largest MRRS available on the device cannot be
- * smaller than the device MPSS.
- */
- mrrs = mps < dev_mpss ? mps : dev_mpss;
- } else
- /* In the "safe" case, configure the MRRS for fairness on the
- * bus by making all devices have the same size
- */
- mrrs = mps;
-
-
- /* MRRS is a R/W register. Invalid values can be written, but a
- * subsiquent read will verify if the value is acceptable or not.
- * If the MRRS value provided is not acceptable (e.g., too large),
- * shrink the value until it is acceptable to the HW.
- */
- while (mrrs != pcie_get_readrq(dev) && mrrs >= 128) {
- rc = pcie_set_readrq(dev, mrrs);
- if (rc)
- dev_err(&dev->dev, "Failed attempting to set the MRRS\n");
-
- mrrs /= 2;
- }
-}
-
static int pcie_bus_configure_set(struct pci_dev *dev, void *data)
{
int mps = 128 << *(u8 *)data;
@@ -1440,7 +1405,6 @@ static int pcie_bus_configure_set(struct pci_dev *dev, void *data)
pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev));
pcie_write_mps(dev, mps);
- pcie_write_mrrs(dev, mps);
dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n",
pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev));
^ permalink raw reply related [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 21:50 ` Jon Mason
@ 2011-09-01 22:01 ` Eric Dumazet
2011-09-01 22:16 ` scameron
2011-09-02 9:39 ` Eric Dumazet
2 siblings, 0 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-01 22:01 UTC (permalink / raw)
To: Jon Mason
Cc: scameron, Jesse Barnes, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley
Le jeudi 01 septembre 2011 à 16:50 -0500, Jon Mason a écrit :
> I believe modifying the MRRS values is what is causing the issues.
> Can you try the attached patch and verify that it also resolves the
> issue?
>
Its midnight here, I'll try this in ~7 hours
Thanks
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 21:50 ` Jon Mason
2011-09-01 22:01 ` Eric Dumazet
@ 2011-09-01 22:16 ` scameron
2011-09-02 5:32 ` Eric Dumazet
2011-09-02 9:39 ` Eric Dumazet
2 siblings, 1 reply; 33+ messages in thread
From: scameron @ 2011-09-01 22:16 UTC (permalink / raw)
To: Jon Mason
Cc: Jesse Barnes, Eric Dumazet, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley, scameron
On Thu, Sep 01, 2011 at 04:50:45PM -0500, Jon Mason wrote:
> On Thu, Sep 1, 2011 at 3:44 PM, <scameron@beardog.cce.hp.com> wrote:
> > On Thu, Sep 01, 2011 at 01:09:30PM -0700, Jesse Barnes wrote:
> >> On Thu, 1 Sep 2011 15:03:49 -0500
> >> scameron@beardog.cce.hp.com wrote:
> >>
> >> > On Thu, Sep 01, 2011 at 12:59:38PM -0700, Jesse Barnes wrote:
> >> > > On Thu, 01 Sep 2011 11:50:38 -0700
> >> > > James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> >> > >
> >> > > > On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> >> > > > > > OK I found the bad commit,I got lucky... I lost some files but my
> >> > > > > > machine was able to complete the bisection. CC involved people
> >> > > > >
> >> > > > > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> >> > > > >
> >> > > > > Hi Eric,
> >> > > > >
> >> > > > > I guess it would be useful to see "lspci -vv" output with a "good" kernel
> >> > > > > and with that bad patch applied. Most likely we should see some difference
> >> > > > > somewhere in the MaxPayload fields in the PCI Express capability of
> >> > > > > some device.
> >> > > > >
> >> > > > > Either the RAID controller or something else lies, and puts a value
> >> > > > > in the DevCap that it can't actually support, or else the patch is
> >> > > > > buggy and puts something out of range in a DevCtl somewhere.
> >> > > >
> >> > > >
> >> > > > While we investigate, I think the problems produced by the patch (data
> >> > > > corruption) are serious enough to warrant reverting it, please Jesse.
> >> > >
> >> > > Hm I haven't been paying attention to the compromise thread; how should
> >> > > I share these changes? Is master.kernel.org down indefinitely? Is
> >> > > there a new server at kernel.org I can use?
> >> >
> >> > I can't answer that question, but I would like a copy of your revert
> >> > patch(es) to test (as a simple patch --reverse of the original commit on the 3.1-rc4
> >> > tree didn't go in cleanly).
> >>
> >> Attached is the series. Applies on top of my for-linus branch.
> >
> > Thanks. I tried them out vs. 3.1-rc4, and they applied cleanly and
> > make things work on my BL460g7.
>
> I believe modifying the MRRS values is what is causing the issues.
> Can you try the attached patch and verify that it also resolves the
> issue?
Ok, just tried it.
The mrrs_removal patch does also appear to resolve the issue.
Thanks.
-- steve
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 15:24 ` [BUG] scsi: hpsa: how to destroy your files Eric Dumazet
2011-09-01 16:07 ` scameron
@ 2011-09-02 5:18 ` Mike Galbraith
1 sibling, 0 replies; 33+ messages in thread
From: Mike Galbraith @ 2011-09-02 5:18 UTC (permalink / raw)
To: Eric Dumazet
Cc: Stephen M. Cameron, james.bottomley, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem
On Thu, 2011-09-01 at 17:24 +0200, Eric Dumazet wrote:
> Stephen,
>
> Current linux-3.1-rc4+ is a total disaster on my BL460c G6
>
>
> Few seconds after boot, I get "cmd_alloc returned NULL" messages
> or "hpsa 0000:0c:00.0: resetting device 0:0:0:0"
Bingo.
> Usually lot of files are corrupted, fsck needed, and full distro
> reinstall as well.
(I put tip-rt11 on a DL980 three times.. munched fs each time)
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 22:16 ` scameron
@ 2011-09-02 5:32 ` Eric Dumazet
0 siblings, 0 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-02 5:32 UTC (permalink / raw)
To: scameron
Cc: Jon Mason, Jesse Barnes, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley
Le jeudi 01 septembre 2011 à 17:16 -0500, scameron@beardog.cce.hp.com a
écrit :
> On Thu, Sep 01, 2011 at 04:50:45PM -0500, Jon Mason wrote:
> > On Thu, Sep 1, 2011 at 3:44 PM, <scameron@beardog.cce.hp.com> wrote:
> > > On Thu, Sep 01, 2011 at 01:09:30PM -0700, Jesse Barnes wrote:
> > >> On Thu, 1 Sep 2011 15:03:49 -0500
> > >> scameron@beardog.cce.hp.com wrote:
> > >>
> > >> > On Thu, Sep 01, 2011 at 12:59:38PM -0700, Jesse Barnes wrote:
> > >> > > On Thu, 01 Sep 2011 11:50:38 -0700
> > >> > > James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> > >> > >
> > >> > > > On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> > >> > > > > > OK I found the bad commit,I got lucky... I lost some files but my
> > >> > > > > > machine was able to complete the bisection. CC involved people
> > >> > > > >
> > >> > > > > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> > >> > > > >
> > >> > > > > Hi Eric,
> > >> > > > >
> > >> > > > > I guess it would be useful to see "lspci -vv" output with a "good" kernel
> > >> > > > > and with that bad patch applied. Most likely we should see some difference
> > >> > > > > somewhere in the MaxPayload fields in the PCI Express capability of
> > >> > > > > some device.
> > >> > > > >
> > >> > > > > Either the RAID controller or something else lies, and puts a value
> > >> > > > > in the DevCap that it can't actually support, or else the patch is
> > >> > > > > buggy and puts something out of range in a DevCtl somewhere.
> > >> > > >
> > >> > > >
> > >> > > > While we investigate, I think the problems produced by the patch (data
> > >> > > > corruption) are serious enough to warrant reverting it, please Jesse.
> > >> > >
> > >> > > Hm I haven't been paying attention to the compromise thread; how should
> > >> > > I share these changes? Is master.kernel.org down indefinitely? Is
> > >> > > there a new server at kernel.org I can use?
> > >> >
> > >> > I can't answer that question, but I would like a copy of your revert
> > >> > patch(es) to test (as a simple patch --reverse of the original commit on the 3.1-rc4
> > >> > tree didn't go in cleanly).
> > >>
> > >> Attached is the series. Applies on top of my for-linus branch.
> > >
> > > Thanks. I tried them out vs. 3.1-rc4, and they applied cleanly and
> > > make things work on my BL460g7.
> >
> > I believe modifying the MRRS values is what is causing the issues.
> > Can you try the attached patch and verify that it also resolves the
> > issue?
>
> Ok, just tried it.
>
> The mrrs_removal patch does also appear to resolve the issue.
>
I cannot say that right now, as it appears the last "bad" kernel
destroyed my distro enough that I cannot test this patch without a full
reinstall. (/root partition is busted, even after several fsck -f -y)
[ 42.501569] EXT3-fs error (device cciss/c0d0p1): ext3_free_inode: bit already cleared for inode 424649
[ 42.501721] Aborting journal on device cciss/c0d0p1.
[ 42.516101] Remounting filesystem read-only
[ 42.529563] EXT3-fs error (device cciss/c0d0p1) in ext3_delete_inode: IO failure
I'll have to do this reinstall when I am at the office, in a couple of
hours.
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
@ 2011-09-02 5:32 ` Eric Dumazet
0 siblings, 0 replies; 33+ messages in thread
From: Eric Dumazet @ 2011-09-02 5:32 UTC (permalink / raw)
To: scameron
Cc: Jon Mason, Jesse Barnes, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley
Le jeudi 01 septembre 2011 à 17:16 -0500, scameron@beardog.cce.hp.com a
écrit :
> On Thu, Sep 01, 2011 at 04:50:45PM -0500, Jon Mason wrote:
> > On Thu, Sep 1, 2011 at 3:44 PM, <scameron@beardog.cce.hp.com> wrote:
> > > On Thu, Sep 01, 2011 at 01:09:30PM -0700, Jesse Barnes wrote:
> > >> On Thu, 1 Sep 2011 15:03:49 -0500
> > >> scameron@beardog.cce.hp.com wrote:
> > >>
> > >> > On Thu, Sep 01, 2011 at 12:59:38PM -0700, Jesse Barnes wrote:
> > >> > > On Thu, 01 Sep 2011 11:50:38 -0700
> > >> > > James Bottomley <James.Bottomley@HansenPartnership.com> wrote:
> > >> > >
> > >> > > > On Thu, 2011-09-01 at 10:58 -0700, Roland Dreier wrote:
> > >> > > > > > OK I found the bad commit,I got lucky... I lost some files but my
> > >> > > > > > machine was able to complete the bisection. CC involved people
> > >> > > > >
> > >> > > > > > # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> > >> > > > >
> > >> > > > > Hi Eric,
> > >> > > > >
> > >> > > > > I guess it would be useful to see "lspci -vv" output with a "good" kernel
> > >> > > > > and with that bad patch applied. Most likely we should see some difference
> > >> > > > > somewhere in the MaxPayload fields in the PCI Express capability of
> > >> > > > > some device.
> > >> > > > >
> > >> > > > > Either the RAID controller or something else lies, and puts a value
> > >> > > > > in the DevCap that it can't actually support, or else the patch is
> > >> > > > > buggy and puts something out of range in a DevCtl somewhere.
> > >> > > >
> > >> > > >
> > >> > > > While we investigate, I think the problems produced by the patch (data
> > >> > > > corruption) are serious enough to warrant reverting it, please Jesse.
> > >> > >
> > >> > > Hm I haven't been paying attention to the compromise thread; how should
> > >> > > I share these changes? Is master.kernel.org down indefinitely? Is
> > >> > > there a new server at kernel.org I can use?
> > >> >
> > >> > I can't answer that question, but I would like a copy of your revert
> > >> > patch(es) to test (as a simple patch --reverse of the original commit on the 3.1-rc4
> > >> > tree didn't go in cleanly).
> > >>
> > >> Attached is the series. Applies on top of my for-linus branch.
> > >
> > > Thanks. I tried them out vs. 3.1-rc4, and they applied cleanly and
> > > make things work on my BL460g7.
> >
> > I believe modifying the MRRS values is what is causing the issues.
> > Can you try the attached patch and verify that it also resolves the
> > issue?
>
> Ok, just tried it.
>
> The mrrs_removal patch does also appear to resolve the issue.
>
I cannot say that right now, as it appears the last "bad" kernel
destroyed my distro enough that I cannot test this patch without a full
reinstall. (/root partition is busted, even after several fsck -f -y)
[ 42.501569] EXT3-fs error (device cciss/c0d0p1): ext3_free_inode: bit already cleared for inode 424649
[ 42.501721] Aborting journal on device cciss/c0d0p1.
[ 42.516101] Remounting filesystem read-only
[ 42.529563] EXT3-fs error (device cciss/c0d0p1) in ext3_delete_inode: IO failure
I'll have to do this reinstall when I am at the office, in a couple of
hours.
--
To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 21:50 ` Jon Mason
2011-09-01 22:01 ` Eric Dumazet
2011-09-01 22:16 ` scameron
@ 2011-09-02 9:39 ` Eric Dumazet
2011-09-02 10:08 ` Eric Dumazet
2 siblings, 1 reply; 33+ messages in thread
From: Eric Dumazet @ 2011-09-02 9:39 UTC (permalink / raw)
To: Jon Mason
Cc: scameron, Jesse Barnes, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley
Le jeudi 01 septembre 2011 à 16:50 -0500, Jon Mason a écrit :
> I believe modifying the MRRS values is what is causing the issues.
> Can you try the attached patch and verify that it also resolves the
> issue?
I tested this patch and can confirm this solves the corruption problem.
But my disk is _much_ slower than before
# hdparm -t /dev/sda1
Before :
Timing buffered disk reads: 254 MB in 3.02 seconds = 84.16 MB/sec
After :
Timing buffered disk reads: 120 MB in 3.04 seconds = 39.42 MB/sec
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-02 9:39 ` Eric Dumazet
@ 2011-09-02 10:08 ` Eric Dumazet
2011-09-02 15:03 ` scameron
0 siblings, 1 reply; 33+ messages in thread
From: Eric Dumazet @ 2011-09-02 10:08 UTC (permalink / raw)
To: Jon Mason
Cc: scameron, Jesse Barnes, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley
Le vendredi 02 septembre 2011 à 11:39 +0200, Eric Dumazet a écrit :
> Le jeudi 01 septembre 2011 à 16:50 -0500, Jon Mason a écrit :
>
> > I believe modifying the MRRS values is what is causing the issues.
> > Can you try the attached patch and verify that it also resolves the
> > issue?
>
> I tested this patch and can confirm this solves the corruption problem.
>
> But my disk is _much_ slower than before
>
> # hdparm -t /dev/sda1
>
> Before :
>
> Timing buffered disk reads: 254 MB in 3.02 seconds = 84.16 MB/sec
>
> After :
>
> Timing buffered disk reads: 120 MB in 3.04 seconds = 39.42 MB/sec
Hmm, this speed regression is probably old : the 84MB/s was with the
standard debian 6.0.2 kernel (2.6.32-5-amd64)
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-02 10:08 ` Eric Dumazet
@ 2011-09-02 15:03 ` scameron
0 siblings, 0 replies; 33+ messages in thread
From: scameron @ 2011-09-02 15:03 UTC (permalink / raw)
To: Eric Dumazet
Cc: Jon Mason, Jesse Barnes, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley
On Fri, Sep 02, 2011 at 12:08:53PM +0200, Eric Dumazet wrote:
> Le vendredi 02 septembre 2011 à 11:39 +0200, Eric Dumazet a écrit :
> > Le jeudi 01 septembre 2011 à 16:50 -0500, Jon Mason a écrit :
> >
> > > I believe modifying the MRRS values is what is causing the issues.
> > > Can you try the attached patch and verify that it also resolves the
> > > issue?
> >
> > I tested this patch and can confirm this solves the corruption problem.
> >
> > But my disk is _much_ slower than before
> >
> > # hdparm -t /dev/sda1
> >
> > Before :
> >
> > Timing buffered disk reads: 254 MB in 3.02 seconds = 84.16 MB/sec
> >
> > After :
> >
> > Timing buffered disk reads: 120 MB in 3.04 seconds = 39.42 MB/sec
>
> Hmm, this speed regression is probably old : the 84MB/s was with the
> standard debian 6.0.2 kernel (2.6.32-5-amd64)
>
This regression might be due to these two patches:
d0be5ec8693944c2e2fc0de70fda9dbc1b93bd7d
[SCSI] hpsa: do readl after writel in main i/o path to ensure commands don't get lost.
Apparently we've been doin it rong for a decade, but only lately do we
run into problems.
and
fec62c368b9c8b05d5124ca6c3b8336b537f26f3
[SCSI] hpsa: do not attempt to read from a write-only register
Most smartarrays tolerate it, but a few new ones don't.
Without this change some newer Smart Arrays will lock up
and i/o will grind to a halt.
with the second patch being a correction to the first.
It seems like the readl after the writel should not be needed,
and wasn't needed for a very long time, but there is some very
hard to trigger and not yet well understood problem in which very
occasionally a command would get lost and the driver thinks a
command is out, but controller firmware thinks all commands are
completed -- a circumstance which tends to make things grind to
a halt.
Those two patches avoid that problem.
-- steve
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
@ 2011-09-02 15:03 ` scameron
0 siblings, 0 replies; 33+ messages in thread
From: scameron @ 2011-09-02 15:03 UTC (permalink / raw)
To: Eric Dumazet
Cc: Jon Mason, Jesse Barnes, linux-scsi, linux-kernel,
stephenmcameron, thenzl, akpm, mikem, linux-pci, Roland Dreier,
James Bottomley
On Fri, Sep 02, 2011 at 12:08:53PM +0200, Eric Dumazet wrote:
> Le vendredi 02 septembre 2011 à 11:39 +0200, Eric Dumazet a écrit :
> > Le jeudi 01 septembre 2011 à 16:50 -0500, Jon Mason a écrit :
> >
> > > I believe modifying the MRRS values is what is causing the issues.
> > > Can you try the attached patch and verify that it also resolves the
> > > issue?
> >
> > I tested this patch and can confirm this solves the corruption problem.
> >
> > But my disk is _much_ slower than before
> >
> > # hdparm -t /dev/sda1
> >
> > Before :
> >
> > Timing buffered disk reads: 254 MB in 3.02 seconds = 84.16 MB/sec
> >
> > After :
> >
> > Timing buffered disk reads: 120 MB in 3.04 seconds = 39.42 MB/sec
>
> Hmm, this speed regression is probably old : the 84MB/s was with the
> standard debian 6.0.2 kernel (2.6.32-5-amd64)
>
This regression might be due to these two patches:
d0be5ec8693944c2e2fc0de70fda9dbc1b93bd7d
[SCSI] hpsa: do readl after writel in main i/o path to ensure commands don't get lost.
Apparently we've been doin it rong for a decade, but only lately do we
run into problems.
and
fec62c368b9c8b05d5124ca6c3b8336b537f26f3
[SCSI] hpsa: do not attempt to read from a write-only register
Most smartarrays tolerate it, but a few new ones don't.
Without this change some newer Smart Arrays will lock up
and i/o will grind to a halt.
with the second patch being a correction to the first.
It seems like the readl after the writel should not be needed,
and wasn't needed for a very long time, but there is some very
hard to trigger and not yet well understood problem in which very
occasionally a command would get lost and the driver thinks a
command is out, but controller firmware thinks all commands are
completed -- a circumstance which tends to make things grind to
a halt.
Those two patches avoid that problem.
-- steve
--
To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
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More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [BUG] scsi: hpsa: how to destroy your files
2011-09-01 17:40 ` Eric Dumazet
` (2 preceding siblings ...)
(?)
@ 2011-09-02 23:13 ` Andrew Morton
-1 siblings, 0 replies; 33+ messages in thread
From: Andrew Morton @ 2011-09-02 23:13 UTC (permalink / raw)
To: Eric Dumazet
Cc: scameron, Jon Mason, Jesse Barnes, james.bottomley, linux-scsi,
linux-kernel, stephenmcameron, thenzl, mikem, Alex Deucher
On Thu, 01 Sep 2011 19:40:15 +0200
Eric Dumazet <eric.dumazet@gmail.com> wrote:
> OK I found the bad commit,I got lucky... I lost some files but my
> machine was able to complete the bisection. CC involved people
>
> git bisect start
> # bad: [9e79e3e9dd9672b37ac9412e9a926714306551fe] Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
> git bisect bad 9e79e3e9dd9672b37ac9412e9a926714306551fe
> # good: [322a8b034003c0d46d39af85bf24fee27b902f48] Linux 3.1-rc1
> git bisect good 322a8b034003c0d46d39af85bf24fee27b902f48
> # bad: [0c3bef612881ee6216a36952ffaabfc35b83545c] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
> git bisect bad 0c3bef612881ee6216a36952ffaabfc35b83545c
> # good: [8c70aac04e01a08b7eca204312946206d1c1baac] Merge branch 'staging-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
> git bisect good 8c70aac04e01a08b7eca204312946206d1c1baac
> # good: [291b63c86aea8a571ddf913d41ab5156b8314dad] Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
> git bisect good 291b63c86aea8a571ddf913d41ab5156b8314dad
> # good: [aa462abe8aaf2198d6aef97da20c874ac694a39f] mm: fix __page_to_pfn for a const struct page argument
> git bisect good aa462abe8aaf2198d6aef97da20c874ac694a39f
> # good: [5c80c71b9a0ec518b4b58d2a61de01a04f4a4453] Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
> git bisect good 5c80c71b9a0ec518b4b58d2a61de01a04f4a4453
> # good: [2c4ac99f983f1341b5962a16b5e8de6049bf10b5] Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
> git bisect good 2c4ac99f983f1341b5962a16b5e8de6049bf10b5
> # bad: [0a2daa1cf35004f5adbf4138555cc5669abf3a3e] PCI: make cardbus-bridge resources optional
> git bisect bad 0a2daa1cf35004f5adbf4138555cc5669abf3a3e
> # bad: [be768912a49b10b68e96fbd8fa3cab0adfbd3091] PCI: honor child buses add_size in hot plug configuration
> git bisect bad be768912a49b10b68e96fbd8fa3cab0adfbd3091
> # bad: [b03e7495a862b028294f59fc87286d6d78ee7fa1] PCI: Set PCI-E Max Payload Size on fabric
> git bisect bad b03e7495a862b028294f59fc87286d6d78ee7fa1
> commit b03e7495a862b028294f59fc87286d6d78ee7fa1
> Author: Jon Mason <mason@myri.com>
> Date: Wed Jul 20 15:20:54 2011 -0500
>
> PCI: Set PCI-E Max Payload Size on fabric
fyi, this patch also broke drivers/gpu/drm/radeon
(https://bugzilla.kernel.org/show_bug.cgi?id=42162). Alex has a
workaround (https://bugzilla.kernel.org/attachment.cgi?id=71182).
^ permalink raw reply [flat|nested] 33+ messages in thread
end of thread, other threads:[~2011-09-02 23:14 UTC | newest]
Thread overview: 33+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-07-21 18:16 [PATCH] hpsa: do not attempt to read from a write-only register Stephen M. Cameron
2011-07-21 18:17 ` Stephen Cameron
2011-07-22 22:39 ` Andrew Morton
2011-07-22 22:39 ` Andrew Morton
2011-09-01 15:24 ` [BUG] scsi: hpsa: how to destroy your files Eric Dumazet
2011-09-01 16:07 ` scameron
2011-09-01 16:18 ` Eric Dumazet
2011-09-01 16:18 ` Eric Dumazet
2011-09-01 17:40 ` Eric Dumazet
2011-09-01 17:40 ` Eric Dumazet
2011-09-01 17:58 ` Roland Dreier
2011-09-01 18:50 ` James Bottomley
2011-09-01 18:58 ` Jesse Barnes
2011-09-01 19:59 ` Jesse Barnes
[not found] ` <20110901200349.GO9189@beardog.cce.hp.com>
2011-09-01 20:09 ` Jesse Barnes
2011-09-01 20:09 ` Jesse Barnes
2011-09-01 20:44 ` scameron
2011-09-01 21:50 ` Jon Mason
2011-09-01 22:01 ` Eric Dumazet
2011-09-01 22:16 ` scameron
2011-09-02 5:32 ` Eric Dumazet
2011-09-02 5:32 ` Eric Dumazet
2011-09-02 9:39 ` Eric Dumazet
2011-09-02 10:08 ` Eric Dumazet
2011-09-02 15:03 ` scameron
2011-09-02 15:03 ` scameron
2011-09-01 19:36 ` Eric Dumazet
2011-09-01 18:01 ` scameron
2011-09-01 18:01 ` scameron
2011-09-01 19:03 ` scameron
2011-09-01 19:03 ` scameron
2011-09-02 23:13 ` Andrew Morton
2011-09-02 5:18 ` Mike Galbraith
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