[PATCH 0/6 v2] usb: musb: Adding support for ti81xx

[PATCH 0/6 v2] usb: musb: Adding support for ti81xx

[Ajay Kumar Gupta]

This patch set adds support for musb interface for TI81XX platforms and
are dependent on recent patch series from Hemant Pedanekar at [1] and [2].

TI81XX platform has dual musb instances, uses CPPI4.1 DMA and has built in
usb PHY. The current set of patches supports only the first interface and
in PIO mode.

[1] http://marc.info/?l=linux-omap&m=131247989220300&w=2 
[2] http://marc.info/?l=linux-omap&m=131411961308438&w=2

Changes from v1:
	- cleaned up #ifdefs of CONFIG_USB_MUSB_HDRC_HCD
	  and CONFIG_USB_GADGET_MUSB_HDRC
	- Fixed the full name of author
	- Renamed ti81xx.c to musb_dsps.c
	- Used platform_device_id table
	- created dsps_glue_wrapper structure and used the same

Ajay Kumar Gupta (1):
  omap: musb: ti81xx: Add phy power function

Ravi Babu (5):
  omap: musb: Adding hwmod data for ti81xx
  omap: musb: Adding support for ti81xx
  ti816evm: Add support for musb interface
  ti814evm: Add support for musb interface
  usb: musb: Add support for ti81xx platform

 arch/arm/mach-omap2/board-ti8148evm.c      |    9 +
 arch/arm/mach-omap2/board-ti8168evm.c      |    9 +
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c |   74 +++
 arch/arm/mach-omap2/omap_phy_internal.c    |   24 +
 arch/arm/mach-omap2/usb-musb.c             |    3 +
 arch/arm/plat-omap/include/plat/usb.h      |   32 ++
 drivers/usb/musb/Kconfig                   |    6 +
 drivers/usb/musb/Makefile                  |    1 +
 drivers/usb/musb/musb_core.c               |    4 +-
 drivers/usb/musb/musb_dsps.c               |  684 ++++++++++++++++++++++++++++
 10 files changed, 845 insertions(+), 1 deletions(-)
 create mode 100644 drivers/usb/musb/musb_dsps.c

[PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx

[Ajay Kumar Gupta]

From: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>

The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
irqs and three address spaces for usbss, musb0 and musb1 respectively. Created
one hwmod with three irq and memory resources.

Cc: Benoit Cousson <b-cousson-l0cyMroinI0@public.gmane.org>
Cc: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org>
Signed-off-by: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c |   74 ++++++++++++++++++++++++++++
 1 files changed, 74 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index e73a4c6..e960d70 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod;
 static struct omap_hwmod ti81xx_timer5_hwmod;
 static struct omap_hwmod ti81xx_timer6_hwmod;
 static struct omap_hwmod ti81xx_timer7_hwmod;
+static struct omap_hwmod ti81xx_usbss_hwmod;
 
 /* L4 SLOW -> TIMER1 interface */
 static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = {
@@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = {
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
 };
 
+/* L3 SLOW -> USBSS interface */
+static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = {
+	{
+		.name		= "usbss",
+		.pa_start	= 0x47400000,
+		.pa_end		= 0x47400000 + SZ_4K - 1,
+		.flags		= ADDR_TYPE_RT
+	},
+	{
+		.name		= "musb0",
+		.pa_start	= 0x47401000,
+		.pa_end		= 0x47401000 + SZ_2K - 1,
+		.flags		= ADDR_TYPE_RT
+	},
+	{
+		.name		= "musb1",
+		.pa_start	= 0x47401800,
+		.pa_end		= 0x47401800 + SZ_2K - 1,
+		.flags		= ADDR_TYPE_RT
+	},
+	{
+	},
+};
+
+static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = {
+	.rev_offs	= 0x0,
+	.sysc_offs	= 0x10,
+	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class ti81xx_usbotg_class = {
+	.name = "usbotg",
+	.sysc = &ti81xx_usbhsotg_sysc,
+};
+
+static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = {
+	{ .name = "usbss-irq", .irq = 17, },
+	{ .name = "musb0-irq", .irq = 18, },
+	{ .name = "musb1-irq", .irq = 19, },
+	{ .irq = -1, },
+};
+
+static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = {
+	.master		= &ti81xx_l3_slow_hwmod,
+	.slave		= &ti81xx_usbss_hwmod,
+	.clk		= "usbotg_ick",
+	.addr		= ti81xx_usbss_addr_space,
+	.user		= OCP_USER_MPU,
+	.flags		= OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = {
+	&ti81xx_l3_slow__usbss,
+};
+
+static struct omap_hwmod ti81xx_usbss_hwmod = {
+	.name		= "usb_otg_hs",
+	.mpu_irqs	= ti81xx_usbss_mpu_irqs,
+	.main_clk	= "usbotg_ick",
+	.clkdm_name	= "default_usb_clkdm",
+	.prcm		= {
+		.omap4 = {
+			.clkctrl_offs = TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET,
+		},
+	},
+	.slaves		= ti81xx_usbss_slaves,
+	.slaves_cnt	= ARRAY_SIZE(ti81xx_usbss_slaves),
+	.class		= &ti81xx_usbotg_class,
+	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
+};
 
 static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
 	&ti81xx_l3_fast_hwmod,
@@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
 	&ti81xx_timer5_hwmod,
 	&ti81xx_timer6_hwmod,
 	&ti81xx_timer7_hwmod,
+	&ti81xx_usbss_hwmod,
 	NULL,
 };
 
-- 
1.6.2.4

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[PATCH 2/6 v2] omap: musb: Adding support for ti81xx

[Ajay Kumar Gupta]

From: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>

Added musb support for ti81xx platform which has two instances of musb
interface and uses CPPI4.1 DMA. The current patch set adds support for
single instance and in PIO mode only.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org>
Signed-off-by: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-omap2/usb-musb.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index a65145b..8bceeca 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -143,6 +143,9 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
 	if (cpu_is_omap3517() || cpu_is_omap3505()) {
 		oh_name = "am35x_otg_hs";
 		name = "musb-am35x";
+	} else if (cpu_is_ti81xx()) {
+		oh_name = "usb_otg_hs";
+		name = "musb-ti81xx";
 	} else {
 		oh_name = "usb_otg_hs";
 		name = "musb-omap2430";
-- 
1.6.2.4

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[PATCH 3/6 v2] omap: musb: ti81xx: Add phy power function

[Ajay Kumar Gupta]

Adding ti81xx_musb_phy_power() which will be used by musb driver through
its function pointer in board_data.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
---
 arch/arm/mach-omap2/omap_phy_internal.c |   24 +++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/usb.h   |   32 +++++++++++++++++++++++++++++++
 2 files changed, 56 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 58775e3..352b6af 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -260,3 +260,27 @@ void am35x_set_mode(u8 musb_mode)
 
 	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
 }
+
+void ti81xx_musb_phy_power(u8 on)
+{
+	u32 usbphycfg = omap_ctrl_readl(USBCTRL0);
+
+	if (on) {
+		if (cpu_is_ti816x()) {
+			usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
+			usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC;
+		} else if (cpu_is_ti814x()) {
+			usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
+				| USBPHY_DPINPUT | USBPHY_DMINPUT);
+			usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN
+				| USBPHY_DPOPBUFCTL | USBPHY_DPOPBUFCTL);
+		}
+	} else {
+		if (cpu_is_ti816x())
+			usbphycfg &= ~TI816X_USBPHY0_NORMAL_MODE;
+		else if (cpu_is_ti814x())
+			usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
+
+	}
+	omap_ctrl_writel(usbphycfg, USBCTRL0);
+}
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 17d3c93..c616385 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -114,6 +114,7 @@ extern void am35x_musb_reset(void);
 extern void am35x_musb_phy_power(u8 on);
 extern void am35x_musb_clear_irq(void);
 extern void am35x_set_mode(u8 musb_mode);
+extern void ti81xx_musb_phy_power(u8 on);
 
 /*
  * FIXME correct answer depends on hmc_mode,
@@ -273,6 +274,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
 #define CONF2_OTGPWRDN		(1 << 2)
 #define CONF2_DATPOL		(1 << 1)
 
+/* TI81XX specific definitions */
+#define USBCTRL0	0x620
+#define USBSTAT0	0x624
+
+/* TI816X PHY controls bits */
+#define TI816X_USBPHY0_NORMAL_MODE	(1 << 0)
+#define TI816X_USBPHY_REFCLK_OSC	(1 << 8)
+
+/* TI814X PHY controls bits */
+#define USBPHY_CM_PWRDN		(1 << 0)
+#define USBPHY_OTG_PWRDN	(1 << 1)
+#define USBPHY_CHGDET_DIS	(1 << 2)
+#define USBPHY_CHGDET_RSTRT	(1 << 3)
+#define USBPHY_SRCONDM		(1 << 4)
+#define USBPHY_SINKONDP		(1 << 5)
+#define USBPHY_CHGISINK_EN	(1 << 6)
+#define USBPHY_CHGVSRC_EN	(1 << 7)
+#define USBPHY_DMPULLUP		(1 << 8)
+#define USBPHY_DPPULLUP		(1 << 9)
+#define USBPHY_CDET_EXTCTL	(1 << 10)
+#define USBPHY_GPIO_MODE	(1 << 12)
+#define USBPHY_DPOPBUFCTL	(1 << 13)
+#define USBPHY_DMOPBUFCTL	(1 << 14)
+#define USBPHY_DPINPUT		(1 << 15)
+#define USBPHY_DMINPUT		(1 << 16)
+#define USBPHY_DPGPIO_PD	(1 << 17)
+#define USBPHY_DMGPIO_PD	(1 << 18)
+#define USBPHY_OTGVDET_EN	(1 << 19)
+#define USBPHY_OTGSESSEND_EN	(1 << 20)
+#define USBPHY_DATA_POLARITY	(1 << 23)
+
 #if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
 u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
 u32 omap1_usb1_init(unsigned nwires);
-- 
1.6.2.4

[PATCH 4/6 v2] ti816evm: Add support for musb interface

[Ajay Kumar Gupta]

From: Ravi Babu <ravibabu@ti.com>

Adding musb support in ti816 EVM board file.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
---
 arch/arm/mach-omap2/board-ti8168evm.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index e516a04..5a4a6c8 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -23,6 +23,14 @@
 #include <plat/irqs.h>
 #include <plat/board.h>
 #include <plat/common.h>
+#include <plat/usb.h>
+
+static struct omap_musb_board_data musb_board_data = {
+	.set_phy_power	= ti81xx_musb_phy_power,
+	.interface_type	= MUSB_INTERFACE_ULPI,
+	.mode           = MUSB_OTG,
+	.power		= 500,
+};
 
 static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
 };
@@ -38,6 +46,7 @@ static void __init ti8168_evm_init(void)
 	omap_serial_init();
 	omap_board_config = ti8168_evm_config;
 	omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
+	usb_musb_init(&musb_board_data);
 }
 
 static void __init ti8168_evm_map_io(void)
-- 
1.6.2.4

[PATCH 5/6 v2] ti814evm: Add support for musb interface

[Ajay Kumar Gupta]

From: Ravi Babu <ravibabu@ti.com>

Adding musb support in ti814 EVM board file.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
---
 arch/arm/mach-omap2/board-ti8148evm.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/board-ti8148evm.c b/arch/arm/mach-omap2/board-ti8148evm.c
index 588d6b7..7dbf115 100644
--- a/arch/arm/mach-omap2/board-ti8148evm.c
+++ b/arch/arm/mach-omap2/board-ti8148evm.c
@@ -23,6 +23,14 @@
 #include <plat/irqs.h>
 #include <plat/board.h>
 #include <plat/common.h>
+#include <plat/usb.h>
+
+static struct omap_musb_board_data musb_board_data = {
+	.set_phy_power	= ti81xx_musb_phy_power,
+	.interface_type	= MUSB_INTERFACE_ULPI,
+	.mode           = MUSB_OTG,
+	.power		= 500,
+};
 
 static struct omap_board_config_kernel ti8148_evm_config[] __initdata = {
 };
@@ -38,6 +46,7 @@ static void __init ti8148_evm_init(void)
 	omap_serial_init();
 	omap_board_config = ti8148_evm_config;
 	omap_board_config_size = ARRAY_SIZE(ti8148_evm_config);
+	usb_musb_init(&musb_board_data);
 }
 
 static void __init ti8148_evm_map_io(void)
-- 
1.6.2.4

[PATCH 6/6 v2] usb: musb: Add support for ti81xx platform

[Ajay Kumar Gupta]

From: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>

TI81XX platform has two musb interfaces and uses CPPI4.1 DMA engine.
It has builtin USB PHYs as AM35x. The current set of patches adds support
for one instance and only in PIO mode.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org>
Signed-off-by: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>
---
 drivers/usb/musb/Kconfig     |    6 +
 drivers/usb/musb/Makefile    |    1 +
 drivers/usb/musb/musb_core.c |    4 +-
 drivers/usb/musb/musb_dsps.c |  684 ++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 694 insertions(+), 1 deletions(-)
 create mode 100644 drivers/usb/musb/musb_dsps.c

diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 6192b45..444d106 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -11,6 +11,7 @@ config USB_MUSB_HDRC
 	depends on USB && USB_GADGET
 	depends on (ARM || (BF54x && !BF544) || (BF52x && !BF522 && !BF523))
 	select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN)
+	select NOP_USB_XCEIV if SOC_OMAPTI81XX
 	select TWL4030_USB if MACH_OMAP_3430SDP
 	select TWL6030_USB if MACH_OMAP_4430SDP || MACH_OMAP4_PANDA
 	select USB_OTG_UTILS
@@ -57,6 +58,10 @@ config USB_MUSB_AM35X
 	tristate "AM35x"
 	depends on ARCH_OMAP
 
+config USB_MUSB_DSPS
+	tristate "TI DSPS platforms"
+	depends on SOC_OMAPTI81XX
+
 config USB_MUSB_BLACKFIN
 	tristate "Blackfin"
 	depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523)
@@ -71,6 +76,7 @@ config MUSB_PIO_ONLY
 	bool 'Disable DMA (always use PIO)'
 	depends on USB_MUSB_HDRC
 	default USB_MUSB_TUSB6010 || USB_MUSB_DA8XX || USB_MUSB_AM35X
+	default SOC_OMAPTI81XX
 	help
 	  All data is copied between memory and FIFO by the CPU.
 	  DMA controllers are ignored.
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
index d8fd9d0..d92d110 100644
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -13,6 +13,7 @@ musb_hdrc-$(CONFIG_DEBUG_FS)			+= musb_debugfs.o
 # Hardware Glue Layer
 obj-$(CONFIG_USB_MUSB_OMAP2PLUS)		+= omap2430.o
 obj-$(CONFIG_USB_MUSB_AM35X)			+= am35x.o
+obj-$(CONFIG_USB_MUSB_DSPS)			+= musb_dsps.o
 obj-$(CONFIG_USB_MUSB_TUSB6010)			+= tusb6010.o
 obj-$(CONFIG_USB_MUSB_DAVINCI)			+= davinci.o
 obj-$(CONFIG_USB_MUSB_DA8XX)			+= da8xx.o
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 20a2873..b04790d 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1014,7 +1014,9 @@ static void musb_shutdown(struct platform_device *pdev)
 	|| defined(CONFIG_USB_MUSB_OMAP2PLUS)		\
 	|| defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)	\
 	|| defined(CONFIG_USB_MUSB_AM35X)		\
-	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)
+	|| defined(CONFIG_USB_MUSB_AM35X_MODULE)	\
+	|| defined(CONFIG_USB_MUSB_DSPS)		\
+	|| defined(CONFIG_USB_MUSB_DSPS_MODULE)
 static ushort __initdata fifo_mode = 4;
 #elif defined(CONFIG_USB_MUSB_UX500)			\
 	|| defined(CONFIG_USB_MUSB_UX500_MODULE)
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
new file mode 100644
index 0000000..6a3fa52
--- /dev/null
+++ b/drivers/usb/musb/musb_dsps.c
@@ -0,0 +1,684 @@
+/*
+ * Texas Instruments DSPS platforms "glue layer"
+ *
+ * Copyright (C) 2011, by Texas Instruments
+ *
+ * Based on the am35x "glue layer" code.
+ *
+ * This file is part of the Inventra Controller Driver for Linux.
+ *
+ * The Inventra Controller Driver for Linux is free software; you
+ * can redistribute it and/or modify it under the terms of the GNU
+ * General Public License version 2 as published by the Free Software
+ * Foundation.
+ *
+ * The Inventra Controller Driver for Linux is distributed in
+ * the hope that it will be useful, but WITHOUT ANY WARRANTY;
+ * without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+ * License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with The Inventra Controller Driver for Linux ; if not,
+ * write to the Free Software Foundation, Inc., 59 Temple Place,
+ * Suite 330, Boston, MA  02111-1307  USA
+ *
+ * musb_dsps.c will be a common file for all the TI DSPS platforms
+ * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
+ * For now only ti81x is using this and in future davinci.c, am35x.c
+ * da8xx.c would be merged to this file after testing.
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/pm_runtime.h>
+
+#include <plat/usb.h>
+
+#include "musb_core.h"
+
+/**
+ * avoid using musb_readx()/musb_writex() as glue layer should not be
+ * dependent on musb core layer symbols.
+ */
+static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
+	{ return __raw_readb(addr + offset); }
+
+static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
+	{ return __raw_readl(addr + offset); }
+
+static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
+	{ __raw_writeb(data, addr + offset); }
+
+static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
+	{ __raw_writel(data, addr + offset); }
+
+/**
+ * DSPS musb wrapper register offset.
+ * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
+ * musb ips.
+ */
+struct dsps_musb_wrapper {
+	u16	revision;
+	u16	control;
+	u16	status;
+	u16	eoi;
+	u16	epintr_set;
+	u16	epintr_clear;
+	u16	epintr_status;
+	u16	coreintr_set;
+	u16	coreintr_clear;
+	u16	coreintr_status;
+	u16	phy_utmi;
+	u16	mode;
+
+	/* bit positions for control */
+	unsigned	reset:5;
+
+	/* bit positions for interrupt */
+	unsigned	usb_shift:5;
+	u32		usb_mask;
+	u32		usb_bitmap;
+	unsigned	drvvbus:5;
+
+	unsigned	txep_shift:5;
+	u32		txep_mask;
+	u32		txep_bitmap;
+
+	unsigned	rxep_shift:5;
+	u32		rxep_mask;
+	u32		rxep_bitmap;
+
+	/* bit positions for phy_utmi */
+	unsigned	otg_disable:5;
+
+	/* bit positions for mode */
+	unsigned	iddig:5;
+	/* miscellaneous stuff */
+	u32		musb_core_offset;
+	u8		poll_seconds;
+};
+
+/**
+ * DSPS glue structure.
+ */
+struct dsps_glue {
+	struct device *dev;
+	struct platform_device *musb;	/* child musb pdev */
+	const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
+	struct timer_list timer;	/* otg_workaround timer */
+};
+
+/**
+ * dsps_musb_enable - enable interrupts
+ */
+static void dsps_musb_enable(struct musb *musb)
+{
+	struct device *dev = musb->controller;
+	struct platform_device *pdev = to_platform_device(dev->parent);
+	struct dsps_glue *glue = platform_get_drvdata(pdev);
+	const struct dsps_musb_wrapper *wrp = glue->wrp;
+	void __iomem *reg_base = musb->ctrl_base;
+	u32 epmask, coremask;
+
+	/* Workaround: setup IRQs through both register sets. */
+	epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
+	       ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
+	coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
+
+	dsps_writel(reg_base, wrp->epintr_set, epmask);
+	dsps_writel(reg_base, wrp->coreintr_set, coremask);
+	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
+	if (is_otg_enabled(musb))
+		dsps_writel(reg_base, wrp->coreintr_set,
+			    (1 << wrp->drvvbus) << wrp->usb_shift);
+}
+
+/**
+ * dsps_musb_disable - disable HDRC and flush interrupts
+ */
+static void dsps_musb_disable(struct musb *musb)
+{
+	struct device *dev = musb->controller;
+	struct platform_device *pdev = to_platform_device(dev->parent);
+	struct dsps_glue *glue = platform_get_drvdata(pdev);
+	const struct dsps_musb_wrapper *wrp = glue->wrp;
+	void __iomem *reg_base = musb->ctrl_base;
+
+	dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
+	dsps_writel(reg_base, wrp->epintr_clear,
+			 wrp->txep_bitmap | wrp->rxep_bitmap);
+	dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
+	dsps_writel(reg_base, wrp->eoi, 0);
+}
+
+static void otg_timer(unsigned long _musb)
+{
+	struct musb *musb = (void *)_musb;
+	void __iomem *mregs = musb->mregs;
+	struct device *dev = musb->controller;
+	struct platform_device *pdev = to_platform_device(dev->parent);
+	struct dsps_glue *glue = platform_get_drvdata(pdev);
+	const struct dsps_musb_wrapper *wrp = glue->wrp;
+	u8 devctl;
+	unsigned long flags;
+
+	/*
+	 * We poll because DSPS IP's won't expose several OTG-critical
+	 * status change events (from the transceiver) otherwise.
+	 */
+	devctl = dsps_readb(mregs, MUSB_DEVCTL);
+	dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
+				otg_state_string(musb->xceiv->state));
+
+	spin_lock_irqsave(&musb->lock, flags);
+	switch (musb->xceiv->state) {
+	case OTG_STATE_A_WAIT_BCON:
+		devctl &= ~MUSB_DEVCTL_SESSION;
+		dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
+
+		devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
+		if (devctl & MUSB_DEVCTL_BDEVICE) {
+			musb->xceiv->state = OTG_STATE_B_IDLE;
+			MUSB_DEV_MODE(musb);
+		} else {
+			musb->xceiv->state = OTG_STATE_A_IDLE;
+			MUSB_HST_MODE(musb);
+		}
+		break;
+	case OTG_STATE_A_WAIT_VFALL:
+		musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
+		dsps_writel(musb->ctrl_base, wrp->coreintr_set,
+			    MUSB_INTR_VBUSERROR << wrp->usb_shift);
+		break;
+	case OTG_STATE_B_IDLE:
+		if (!is_peripheral_enabled(musb))
+			break;
+
+		devctl = dsps_readb(mregs, MUSB_DEVCTL);
+		if (devctl & MUSB_DEVCTL_BDEVICE)
+			mod_timer(&glue->timer,
+					jiffies + wrp->poll_seconds * HZ);
+		else
+			musb->xceiv->state = OTG_STATE_A_IDLE;
+		break;
+	default:
+		break;
+	}
+	spin_unlock_irqrestore(&musb->lock, flags);
+}
+
+static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
+{
+	struct device *dev = musb->controller;
+	struct platform_device *pdev = to_platform_device(dev->parent);
+	struct dsps_glue *glue = platform_get_drvdata(pdev);
+	static unsigned long last_timer;
+
+	if (!is_otg_enabled(musb))
+		return;
+
+	if (timeout == 0)
+		timeout = jiffies + msecs_to_jiffies(3);
+
+	/* Never idle if active, or when VBUS timeout is not set as host */
+	if (musb->is_active || (musb->a_wait_bcon == 0 &&
+				musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
+		dev_dbg(musb->controller, "%s active, deleting timer\n",
+				otg_state_string(musb->xceiv->state));
+		del_timer(&glue->timer);
+		last_timer = jiffies;
+		return;
+	}
+
+	if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
+		dev_dbg(musb->controller,
+			"Longer idle timer already pending, ignoring...\n");
+		return;
+	}
+	last_timer = timeout;
+
+	dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
+		otg_state_string(musb->xceiv->state),
+			jiffies_to_msecs(timeout - jiffies));
+	mod_timer(&glue->timer, timeout);
+}
+
+static irqreturn_t dsps_interrupt(int irq, void *hci)
+{
+	struct musb  *musb = hci;
+	void __iomem *reg_base = musb->ctrl_base;
+	struct device *dev = musb->controller;
+	struct platform_device *pdev = to_platform_device(dev->parent);
+	struct dsps_glue *glue = platform_get_drvdata(pdev);
+	const struct dsps_musb_wrapper *wrp = glue->wrp;
+	unsigned long flags;
+	irqreturn_t ret = IRQ_NONE;
+	u32 epintr, usbintr;
+
+	spin_lock_irqsave(&musb->lock, flags);
+
+	/* Get endpoint interrupts */
+	epintr = dsps_readl(reg_base, wrp->epintr_status);
+	musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
+	musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
+
+	if (epintr)
+		dsps_writel(reg_base, wrp->epintr_status, epintr);
+
+	/* Get usb core interrupts */
+	usbintr = dsps_readl(reg_base, wrp->coreintr_status);
+	if (!usbintr && !epintr)
+		goto eoi;
+
+	musb->int_usb =	(usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
+	if (usbintr)
+		dsps_writel(reg_base, wrp->coreintr_status, usbintr);
+
+	dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
+			usbintr, epintr);
+	/*
+	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
+	 * DSPS IP's missing ID change IRQ.  We need an ID change IRQ to
+	 * switch appropriately between halves of the OTG state machine.
+	 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
+	 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
+	 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
+	 */
+	if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
+		pr_info("CAUTION: musb: Babble Interrupt Occured\n");
+
+	if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
+		int drvvbus = dsps_readl(reg_base, wrp->status);
+		void __iomem *mregs = musb->mregs;
+		u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
+		int err;
+
+		err = is_host_enabled(musb) && (musb->int_usb &
+						MUSB_INTR_VBUSERROR);
+		if (err) {
+			/*
+			 * The Mentor core doesn't debounce VBUS as needed
+			 * to cope with device connect current spikes. This
+			 * means it's not uncommon for bus-powered devices
+			 * to get VBUS errors during enumeration.
+			 *
+			 * This is a workaround, but newer RTL from Mentor
+			 * seems to allow a better one: "re"-starting sessions
+			 * without waiting for VBUS to stop registering in
+			 * devctl.
+			 */
+			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
+			musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
+			mod_timer(&glue->timer,
+					jiffies + wrp->poll_seconds * HZ);
+			WARNING("VBUS error workaround (delay coming)\n");
+		} else if (is_host_enabled(musb) && drvvbus) {
+			musb->is_active = 1;
+			MUSB_HST_MODE(musb);
+			musb->xceiv->default_a = 1;
+			musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
+			del_timer(&glue->timer);
+		} else {
+			musb->is_active = 0;
+			MUSB_DEV_MODE(musb);
+			musb->xceiv->default_a = 0;
+			musb->xceiv->state = OTG_STATE_B_IDLE;
+		}
+
+		/* NOTE: this must complete power-on within 100 ms. */
+		dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
+				drvvbus ? "on" : "off",
+				otg_state_string(musb->xceiv->state),
+				err ? " ERROR" : "",
+				devctl);
+		ret = IRQ_HANDLED;
+	}
+
+	if (musb->int_tx || musb->int_rx || musb->int_usb)
+		ret |= musb_interrupt(musb);
+
+ eoi:
+	/* EOI needs to be written for the IRQ to be re-asserted. */
+	if (ret == IRQ_HANDLED || epintr || usbintr)
+		dsps_writel(reg_base, wrp->eoi, 1);
+
+	/* Poll for ID change */
+	if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
+		mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
+
+	spin_unlock_irqrestore(&musb->lock, flags);
+
+	return ret;
+}
+
+static int dsps_musb_init(struct musb *musb)
+{
+	struct device *dev = musb->controller;
+	struct musb_hdrc_platform_data *plat = dev->platform_data;
+	struct platform_device *pdev = to_platform_device(dev->parent);
+	struct dsps_glue *glue = platform_get_drvdata(pdev);
+	const struct dsps_musb_wrapper *wrp = glue->wrp;
+	struct omap_musb_board_data *data = plat->board_data;
+	void __iomem *reg_base = musb->ctrl_base;
+	u32 rev, val;
+	int status;
+
+	/* mentor core register starts at offset of 0x400 from musb base */
+	musb->mregs += wrp->musb_core_offset;
+
+	/* NOP driver needs change if supporting dual instance */
+	usb_nop_xceiv_register();
+	musb->xceiv = otg_get_transceiver();
+	if (!musb->xceiv)
+		return -ENODEV;
+
+	status = pm_runtime_get_sync(dev);
+	if (status < 0) {
+		dev_err(dev, "pm_runtime_get_sync FAILED");
+		goto err0;
+	}
+
+	/* Returns zero if e.g. not clocked */
+	rev = dsps_readl(reg_base, wrp->revision);
+	if (!rev) {
+		status = -ENODEV;
+		goto err0;
+	}
+
+	if (is_host_enabled(musb))
+		setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
+
+	/* Reset the musb */
+	dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
+
+	/* Start the on-chip PHY and its PLL. */
+	if (data->set_phy_power)
+		data->set_phy_power(1);
+
+	musb->isr = dsps_interrupt;
+
+	/* reset the otgdisable bit, needed for host mode to work */
+	val = dsps_readl(reg_base, wrp->phy_utmi);
+	val &= ~(1 << wrp->otg_disable);
+	dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
+
+	/* clear level interrupt */
+	dsps_writel(reg_base, wrp->eoi, 0);
+
+	return 0;
+err0:
+	pm_runtime_disable(dev);
+	return status;
+}
+
+static int dsps_musb_exit(struct musb *musb)
+{
+	struct device *dev = musb->controller;
+	struct musb_hdrc_platform_data *plat = dev->platform_data;
+	struct omap_musb_board_data *data = plat->board_data;
+	struct platform_device *pdev = to_platform_device(dev->parent);
+	struct dsps_glue *glue = platform_get_drvdata(pdev);
+
+	if (is_host_enabled(musb))
+		del_timer_sync(&glue->timer);
+
+	/* Shutdown the on-chip PHY and its PLL. */
+	if (data->set_phy_power)
+		data->set_phy_power(0);
+
+	/* NOP driver needs change if supporting dual instance */
+	otg_put_transceiver(musb->xceiv);
+	usb_nop_xceiv_unregister();
+
+	return 0;
+}
+
+static struct musb_platform_ops dsps_ops = {
+	.init		= dsps_musb_init,
+	.exit		= dsps_musb_exit,
+
+	.enable		= dsps_musb_enable,
+	.disable	= dsps_musb_disable,
+
+	.try_idle	= dsps_musb_try_idle,
+};
+
+static u64 musb_dmamask = DMA_BIT_MASK(32);
+
+static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
+{
+	struct device *dev = glue->dev;
+	struct platform_device *pdev = to_platform_device(dev);
+	struct musb_hdrc_platform_data  *pdata = dev->platform_data;
+	struct platform_device	*musb;
+	struct resource *res;
+	struct resource	resources[2];
+	char res_name[10];
+	int ret;
+
+	/* get memory resource */
+	sprintf(res_name, "musb%d", id);
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
+	if (!res) {
+		dev_err(dev, "%s get mem resource failed\n", res_name);
+		ret = -ENODEV;
+		goto err0;
+	}
+	res->parent = NULL;
+	resources[0] = *res;
+
+	/* get irq resource */
+	sprintf(res_name, "musb%d-irq", id);
+	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
+	if (!res) {
+		dev_err(dev, "%s get irq resource failed\n", res_name);
+		ret = -ENODEV;
+		goto err0;
+	}
+	strcpy((u8 *)res->name, "mc");
+	res->parent = NULL;
+	resources[1] = *res;
+
+	/* allocate the child platform device */
+	musb = platform_device_alloc("musb-hdrc", -1);
+	if (!musb) {
+		dev_err(dev, "failed to allocate musb device\n");
+		goto err0;
+	}
+
+	musb->dev.parent		= dev;
+	musb->dev.dma_mask		= &musb_dmamask;
+	musb->dev.coherent_dma_mask	= musb_dmamask;
+
+	glue->musb			= musb;
+
+	pdata->platform_ops		= &dsps_ops;
+
+	ret = platform_device_add_resources(musb, resources, 2);
+	if (ret) {
+		dev_err(dev, "failed to add resources\n");
+		goto err1;
+	}
+
+	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
+	if (ret) {
+		dev_err(dev, "failed to add platform_data\n");
+		goto err1;
+	}
+
+	ret = platform_device_add(musb);
+	if (ret) {
+		dev_err(dev, "failed to register musb device\n");
+		goto err1;
+	}
+
+	return 0;
+
+err1:
+	platform_device_put(musb);
+err0:
+	return ret;
+}
+
+static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
+{
+	platform_device_del(glue->musb);
+	platform_device_put(glue->musb);
+}
+
+static int __devinit dsps_probe(struct platform_device *pdev)
+{
+	const struct platform_device_id *id = platform_get_device_id(pdev);
+	const struct dsps_musb_wrapper *wrp =
+				(struct dsps_musb_wrapper *)id->driver_data;
+	struct dsps_glue *glue;
+	struct resource *iomem;
+	int ret;
+
+	/* allocate glue */
+	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
+	if (!glue) {
+		dev_err(&pdev->dev, "unable to allocate glue memory\n");
+		ret = -ENOMEM;
+		goto err0;
+	}
+
+	/* get memory resource */
+	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!iomem) {
+		dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
+		ret = -ENODEV;
+		goto err1;
+	}
+
+	glue->dev = &pdev->dev;
+	glue->wrp = wrp;
+	platform_set_drvdata(pdev, glue);
+
+	/* create the child platform device for first instances of musb */
+	ret = dsps_create_musb_pdev(glue, 0);
+	if (ret != 0) {
+		dev_err(&pdev->dev, "failed to create child pdev\n");
+		goto err1;
+	}
+
+	/* enable the usbss clocks */
+	pm_runtime_enable(&pdev->dev);
+
+	return 0;
+
+err1:
+	kfree(glue);
+err0:
+	return ret;
+}
+static int __devexit dsps_remove(struct platform_device *pdev)
+{
+	struct dsps_glue *glue = platform_get_drvdata(pdev);
+
+	/* delete the child platform device */
+	dsps_delete_musb_pdev(glue);
+
+	/* disable usbss clocks */
+	pm_runtime_put(&pdev->dev);
+	pm_runtime_disable(&pdev->dev);
+	kfree(glue);
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int dsps_suspend(struct device *dev)
+{
+	struct musb_hdrc_platform_data *plat = dev->platform_data;
+	struct omap_musb_board_data *data = plat->board_data;
+
+	/* Shutdown the on-chip PHY and its PLL. */
+	if (data->set_phy_power)
+		data->set_phy_power(0);
+
+	return 0;
+}
+
+static int dsps_resume(struct device *dev)
+{
+	struct musb_hdrc_platform_data *plat = dev->platform_data;
+	struct omap_musb_board_data *data = plat->board_data;
+
+	/* Start the on-chip PHY and its PLL. */
+	if (data->set_phy_power)
+		data->set_phy_power(1);
+
+	return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
+
+static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
+	.revision		= 0x00,
+	.control		= 0x14,
+	.status			= 0x18,
+	.eoi			= 0x24,
+	.epintr_set		= 0x38,
+	.epintr_clear		= 0x40,
+	.epintr_status		= 0x30,
+	.coreintr_set		= 0x3c,
+	.coreintr_clear		= 0x44,
+	.coreintr_status	= 0x34,
+	.phy_utmi		= 0xe0,
+	.mode			= 0xe8,
+	.reset			= 0,
+	.otg_disable		= 21,
+	.iddig			= 8,
+	.usb_shift		= 0,
+	.usb_mask		= 0x1ff,
+	.usb_bitmap		= (0x1ff << 0),
+	.drvvbus		= 8,
+	.txep_shift		= 0,
+	.txep_mask		= 0xffff,
+	.txep_bitmap		= (0xffff << 0),
+	.rxep_shift		= 16,
+	.rxep_mask		= 0xfffe,
+	.rxep_bitmap		= (0xfffe << 16),
+	.musb_core_offset	= 0x400,
+	.poll_seconds		= 2,
+};
+
+static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
+	{
+		.name	= "musb-ti81xx",
+		.driver_data	= (kernel_ulong_t) &ti81xx_driver_data,
+	},
+	{  },	/* Terminating Entry */
+};
+MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
+
+static struct platform_driver dsps_usbss_driver = {
+	.probe		= dsps_probe,
+	.remove         = __devexit_p(dsps_remove),
+	.driver         = {
+		.name   = "musb-dsps",
+		.pm	= &dsps_pm_ops,
+	},
+	.id_table	= musb_dsps_id_table,
+};
+
+MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
+MODULE_AUTHOR("Ravi B <ravibabu-l0cyMroinI0@public.gmane.org>");
+MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org>");
+MODULE_LICENSE("GPL v2");
+
+static int __init dsps_init(void)
+{
+	return platform_driver_register(&dsps_usbss_driver);
+}
+subsys_initcall(dsps_init);
+
+static void __exit dsps_exit(void)
+{
+	platform_driver_unregister(&dsps_usbss_driver);
+}
+module_exit(dsps_exit);
-- 
1.6.2.4

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Re: [PATCH 6/6 v2] usb: musb: Add support for ti81xx platform

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 990 bytes --]

Hi,

On Wed, Sep 07, 2011 at 10:32:25PM +0530, Ajay Kumar Gupta wrote:
> +static int __devinit dsps_probe(struct platform_device *pdev)
> +{
> +	const struct platform_device_id *id = platform_get_device_id(pdev);
> +	const struct dsps_musb_wrapper *wrp =
> +				(struct dsps_musb_wrapper *)id->driver_data;
> +	struct dsps_glue *glue;
> +	struct resource *iomem;
> +	int ret;
> +
> +	/* allocate glue */
> +	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
> +	if (!glue) {
> +		dev_err(&pdev->dev, "unable to allocate glue memory\n");
> +		ret = -ENOMEM;
> +		goto err0;
> +	}
> +
> +	/* get memory resource */
> +	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	if (!iomem) {
> +		dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
> +		ret = -ENODEV;
> +		goto err1;
> +	}
> +
> +	glue->dev = &pdev->dev;
> +	glue->wrp = wrp;

wrp is marked __devinitconst, so I guess you need to copy it here,
instead of just pointing to it.

-- 
balbi

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Re: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx

[Munegowda, Keshava]

On Wed, Sep 7, 2011 at 10:32 PM, Ajay Kumar Gupta <ajay.gupta@ti.com> wrote:
> From: Ravi Babu <ravibabu@ti.com>
>
> The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
> irqs and three address spaces for usbss, musb0 and musb1 respectively. Created
> one hwmod with three irq and memory resources.
>
> Cc: Benoit Cousson <b-cousson@ti.com>
> Cc: Keshava Munegowda <keshava_mgowda@ti.com>
> Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
> Signed-off-by: Ravi Babu <ravibabu@ti.com>
> ---
>  arch/arm/mach-omap2/omap_hwmod_81xx_data.c |   74 ++++++++++++++++++++++++++++
>  1 files changed, 74 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
> index e73a4c6..e960d70 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
> @@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod;
>  static struct omap_hwmod ti81xx_timer5_hwmod;
>  static struct omap_hwmod ti81xx_timer6_hwmod;
>  static struct omap_hwmod ti81xx_timer7_hwmod;
> +static struct omap_hwmod ti81xx_usbss_hwmod;
>
>  /* L4 SLOW -> TIMER1 interface */
>  static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = {
> @@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = {
>        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
>  };
>
> +/* L3 SLOW -> USBSS interface */
> +static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = {
> +       {
> +               .name           = "usbss",
> +               .pa_start       = 0x47400000,
> +               .pa_end         = 0x47400000 + SZ_4K - 1,
> +               .flags          = ADDR_TYPE_RT
> +       },
> +       {
> +               .name           = "musb0",
> +               .pa_start       = 0x47401000,
> +               .pa_end         = 0x47401000 + SZ_2K - 1,
> +               .flags          = ADDR_TYPE_RT
> +       },
> +       {
> +               .name           = "musb1",
> +               .pa_start       = 0x47401800,
> +               .pa_end         = 0x47401800 + SZ_2K - 1,
> +               .flags          = ADDR_TYPE_RT
> +       },
> +       {
> +       },
> +};
> +
> +static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = {
> +       .rev_offs       = 0x0,
> +       .sysc_offs      = 0x10,
> +       .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
> +       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> +       .sysc_fields    = &omap_hwmod_sysc_type2,
> +};
> +
> +static struct omap_hwmod_class ti81xx_usbotg_class = {
> +       .name = "usbotg",
> +       .sysc = &ti81xx_usbhsotg_sysc,
> +};
> +
> +static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = {
> +       { .name = "usbss-irq", .irq = 17, },
> +       { .name = "musb0-irq", .irq = 18, },
> +       { .name = "musb1-irq", .irq = 19, },
> +       { .irq = -1, },
> +};
> +
> +static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = {
> +       .master         = &ti81xx_l3_slow_hwmod,
> +       .slave          = &ti81xx_usbss_hwmod,
> +       .clk            = "usbotg_ick",
> +       .addr           = ti81xx_usbss_addr_space,
> +       .user           = OCP_USER_MPU,
> +       .flags          = OCPIF_SWSUP_IDLE,
> +};
> +
> +static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = {
> +       &ti81xx_l3_slow__usbss,
> +};
> +
> +static struct omap_hwmod ti81xx_usbss_hwmod = {
> +       .name           = "usb_otg_hs",
> +       .mpu_irqs       = ti81xx_usbss_mpu_irqs,
> +       .main_clk       = "usbotg_ick",
> +       .clkdm_name     = "default_usb_clkdm",
> +       .prcm           = {
> +               .omap4 = {
> +                       .clkctrl_offs = TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET,
> +               },
> +       },
> +       .slaves         = ti81xx_usbss_slaves,
> +       .slaves_cnt     = ARRAY_SIZE(ti81xx_usbss_slaves),
> +       .class          = &ti81xx_usbotg_class,
> +       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
> +};
>
>  static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
>        &ti81xx_l3_fast_hwmod,
> @@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
>        &ti81xx_timer5_hwmod,
>        &ti81xx_timer6_hwmod,
>        &ti81xx_timer7_hwmod,
> +       &ti81xx_usbss_hwmod,
>        NULL,
>  };
>
> --
> 1.6.2.4

looks good to me.

keshava
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Re: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 5046 bytes --]

Hi,

On Thu, Sep 08, 2011 at 11:56:25AM +0530, Munegowda, Keshava wrote:
> On Wed, Sep 7, 2011 at 10:32 PM, Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org> wrote:
> > From: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>
> >
> > The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
> > irqs and three address spaces for usbss, musb0 and musb1 respectively. Created
> > one hwmod with three irq and memory resources.
> >
> > Cc: Benoit Cousson <b-cousson-l0cyMroinI0@public.gmane.org>
> > Cc: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
> > Signed-off-by: Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org>
> > Signed-off-by: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>
> > ---
> >  arch/arm/mach-omap2/omap_hwmod_81xx_data.c |   74 ++++++++++++++++++++++++++++
> >  1 files changed, 74 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
> > index e73a4c6..e960d70 100644
> > --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
> > +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
> > @@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod;
> >  static struct omap_hwmod ti81xx_timer5_hwmod;
> >  static struct omap_hwmod ti81xx_timer6_hwmod;
> >  static struct omap_hwmod ti81xx_timer7_hwmod;
> > +static struct omap_hwmod ti81xx_usbss_hwmod;
> >
> >  /* L4 SLOW -> TIMER1 interface */
> >  static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = {
> > @@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = {
> >        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
> >  };
> >
> > +/* L3 SLOW -> USBSS interface */
> > +static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = {
> > +       {
> > +               .name           = "usbss",
> > +               .pa_start       = 0x47400000,
> > +               .pa_end         = 0x47400000 + SZ_4K - 1,
> > +               .flags          = ADDR_TYPE_RT
> > +       },
> > +       {
> > +               .name           = "musb0",
> > +               .pa_start       = 0x47401000,
> > +               .pa_end         = 0x47401000 + SZ_2K - 1,
> > +               .flags          = ADDR_TYPE_RT
> > +       },
> > +       {
> > +               .name           = "musb1",
> > +               .pa_start       = 0x47401800,
> > +               .pa_end         = 0x47401800 + SZ_2K - 1,
> > +               .flags          = ADDR_TYPE_RT
> > +       },
> > +       {
> > +       },
> > +};
> > +
> > +static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = {
> > +       .rev_offs       = 0x0,
> > +       .sysc_offs      = 0x10,
> > +       .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
> > +       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> > +       .sysc_fields    = &omap_hwmod_sysc_type2,
> > +};
> > +
> > +static struct omap_hwmod_class ti81xx_usbotg_class = {
> > +       .name = "usbotg",
> > +       .sysc = &ti81xx_usbhsotg_sysc,
> > +};
> > +
> > +static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = {
> > +       { .name = "usbss-irq", .irq = 17, },
> > +       { .name = "musb0-irq", .irq = 18, },
> > +       { .name = "musb1-irq", .irq = 19, },
> > +       { .irq = -1, },
> > +};
> > +
> > +static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = {
> > +       .master         = &ti81xx_l3_slow_hwmod,
> > +       .slave          = &ti81xx_usbss_hwmod,
> > +       .clk            = "usbotg_ick",
> > +       .addr           = ti81xx_usbss_addr_space,
> > +       .user           = OCP_USER_MPU,
> > +       .flags          = OCPIF_SWSUP_IDLE,
> > +};
> > +
> > +static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = {
> > +       &ti81xx_l3_slow__usbss,
> > +};
> > +
> > +static struct omap_hwmod ti81xx_usbss_hwmod = {
> > +       .name           = "usb_otg_hs",
> > +       .mpu_irqs       = ti81xx_usbss_mpu_irqs,
> > +       .main_clk       = "usbotg_ick",
> > +       .clkdm_name     = "default_usb_clkdm",
> > +       .prcm           = {
> > +               .omap4 = {
> > +                       .clkctrl_offs = TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET,
> > +               },
> > +       },
> > +       .slaves         = ti81xx_usbss_slaves,
> > +       .slaves_cnt     = ARRAY_SIZE(ti81xx_usbss_slaves),
> > +       .class          = &ti81xx_usbotg_class,
> > +       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
> > +};
> >
> >  static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
> >        &ti81xx_l3_fast_hwmod,
> > @@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
> >        &ti81xx_timer5_hwmod,
> >        &ti81xx_timer6_hwmod,
> >        &ti81xx_timer7_hwmod,
> > +       &ti81xx_usbss_hwmod,
> >        NULL,
> >  };
> >
> > --
> > 1.6.2.4
> 
> looks good to me.

how about you reply with your Acked-by then ?

-- 
balbi

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Re: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx

[Munegowda, Keshava]

On Thu, Sep 8, 2011 at 1:30 PM, Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org> wrote:
> Hi,
>
> On Thu, Sep 08, 2011 at 11:56:25AM +0530, Munegowda, Keshava wrote:
>> On Wed, Sep 7, 2011 at 10:32 PM, Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org> wrote:
>> > From: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>
>> >
>> > The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
>> > irqs and three address spaces for usbss, musb0 and musb1 respectively. Created
>> > one hwmod with three irq and memory resources.
>> >
>> > Cc: Benoit Cousson <b-cousson-l0cyMroinI0@public.gmane.org>
>> > Cc: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
>> > Signed-off-by: Ajay Kumar Gupta <ajay.gupta-l0cyMroinI0@public.gmane.org>
>> > Signed-off-by: Ravi Babu <ravibabu-l0cyMroinI0@public.gmane.org>
>> > ---
>> >  arch/arm/mach-omap2/omap_hwmod_81xx_data.c |   74 ++++++++++++++++++++++++++++
>> >  1 files changed, 74 insertions(+), 0 deletions(-)
>> >
>> > diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
>> > index e73a4c6..e960d70 100644
>> > --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
>> > +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
>> > @@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod;
>> >  static struct omap_hwmod ti81xx_timer5_hwmod;
>> >  static struct omap_hwmod ti81xx_timer6_hwmod;
>> >  static struct omap_hwmod ti81xx_timer7_hwmod;
>> > +static struct omap_hwmod ti81xx_usbss_hwmod;
>> >
>> >  /* L4 SLOW -> TIMER1 interface */
>> >  static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = {
>> > @@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = {
>> >        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
>> >  };
>> >
>> > +/* L3 SLOW -> USBSS interface */
>> > +static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = {
>> > +       {
>> > +               .name           = "usbss",
>> > +               .pa_start       = 0x47400000,
>> > +               .pa_end         = 0x47400000 + SZ_4K - 1,
>> > +               .flags          = ADDR_TYPE_RT
>> > +       },
>> > +       {
>> > +               .name           = "musb0",
>> > +               .pa_start       = 0x47401000,
>> > +               .pa_end         = 0x47401000 + SZ_2K - 1,
>> > +               .flags          = ADDR_TYPE_RT
>> > +       },
>> > +       {
>> > +               .name           = "musb1",
>> > +               .pa_start       = 0x47401800,
>> > +               .pa_end         = 0x47401800 + SZ_2K - 1,
>> > +               .flags          = ADDR_TYPE_RT
>> > +       },
>> > +       {
>> > +       },
>> > +};
>> > +
>> > +static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = {
>> > +       .rev_offs       = 0x0,
>> > +       .sysc_offs      = 0x10,
>> > +       .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
>> > +       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
>> > +       .sysc_fields    = &omap_hwmod_sysc_type2,
>> > +};
>> > +
>> > +static struct omap_hwmod_class ti81xx_usbotg_class = {
>> > +       .name = "usbotg",
>> > +       .sysc = &ti81xx_usbhsotg_sysc,
>> > +};
>> > +
>> > +static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = {
>> > +       { .name = "usbss-irq", .irq = 17, },
>> > +       { .name = "musb0-irq", .irq = 18, },
>> > +       { .name = "musb1-irq", .irq = 19, },
>> > +       { .irq = -1, },
>> > +};
>> > +
>> > +static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = {
>> > +       .master         = &ti81xx_l3_slow_hwmod,
>> > +       .slave          = &ti81xx_usbss_hwmod,
>> > +       .clk            = "usbotg_ick",
>> > +       .addr           = ti81xx_usbss_addr_space,
>> > +       .user           = OCP_USER_MPU,
>> > +       .flags          = OCPIF_SWSUP_IDLE,
>> > +};
>> > +
>> > +static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = {
>> > +       &ti81xx_l3_slow__usbss,
>> > +};
>> > +
>> > +static struct omap_hwmod ti81xx_usbss_hwmod = {
>> > +       .name           = "usb_otg_hs",
>> > +       .mpu_irqs       = ti81xx_usbss_mpu_irqs,
>> > +       .main_clk       = "usbotg_ick",
>> > +       .clkdm_name     = "default_usb_clkdm",
>> > +       .prcm           = {
>> > +               .omap4 = {
>> > +                       .clkctrl_offs = TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET,
>> > +               },
>> > +       },
>> > +       .slaves         = ti81xx_usbss_slaves,
>> > +       .slaves_cnt     = ARRAY_SIZE(ti81xx_usbss_slaves),
>> > +       .class          = &ti81xx_usbotg_class,
>> > +       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
>> > +};
>> >
>> >  static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
>> >        &ti81xx_l3_fast_hwmod,
>> > @@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
>> >        &ti81xx_timer5_hwmod,
>> >        &ti81xx_timer6_hwmod,
>> >        &ti81xx_timer7_hwmod,
>> > +       &ti81xx_usbss_hwmod,
>> >        NULL,
>> >  };
>> >
>> > --
>> > 1.6.2.4
>>
>> looks good to me.
>
> how about you reply with your Acked-by then ?
>
> --
> balbi

yes balbi,
     here it is

Acked-By: Keshava Munegowda <keshava_mgowda-l0cyMroinI0@public.gmane.org>
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Re: [PATCH 3/6 v2] omap: musb: ti81xx: Add phy power function

[Sergei Shtylyov]

Hello.

On 07-09-2011 21:02, Ajay Kumar Gupta wrote:

> Adding ti81xx_musb_phy_power() which will be used by musb driver through
> its function pointer in board_data.

> Signed-off-by: Ajay Kumar Gupta<ajay.gupta@ti.com>
> Signed-off-by: Ravi Babu<ravibabu@ti.com>
> ---
>   arch/arm/mach-omap2/omap_phy_internal.c |   24 +++++++++++++++++++++++
>   arch/arm/plat-omap/include/plat/usb.h   |   32 +++++++++++++++++++++++++++++++
>   2 files changed, 56 insertions(+), 0 deletions(-)

> diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
> index 58775e3..352b6af 100644
> --- a/arch/arm/mach-omap2/omap_phy_internal.c
> +++ b/arch/arm/mach-omap2/omap_phy_internal.c
> @@ -260,3 +260,27 @@ void am35x_set_mode(u8 musb_mode)
>
>   	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
>   }
> +
> +void ti81xx_musb_phy_power(u8 on)
> +{
> +	u32 usbphycfg = omap_ctrl_readl(USBCTRL0);
> +
> +	if (on) {
> +		if (cpu_is_ti816x()) {
> +			usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
> +			usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC;
> +		} else if (cpu_is_ti814x()) {
> +			usbphycfg&= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
> +				| USBPHY_DPINPUT | USBPHY_DMINPUT);
> +			usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN
> +				| USBPHY_DPOPBUFCTL | USBPHY_DPOPBUFCTL);

    Same #define repeated twice?

WBR, Sergei

RE: [PATCH 3/6 v2] omap: musb: ti81xx: Add phy power function

[Gupta, Ajay Kumar]

Hi,

> On 07-09-2011 21:02, Ajay Kumar Gupta wrote:
> 
> > Adding ti81xx_musb_phy_power() which will be used by musb driver
> through
> > its function pointer in board_data.
> 
> > Signed-off-by: Ajay Kumar Gupta<ajay.gupta-l0cyMroinI0@public.gmane.org>
> > Signed-off-by: Ravi Babu<ravibabu-l0cyMroinI0@public.gmane.org>
> > ---
> >   arch/arm/mach-omap2/omap_phy_internal.c |   24
> +++++++++++++++++++++++
> >   arch/arm/plat-omap/include/plat/usb.h   |   32
> +++++++++++++++++++++++++++++++
> >   2 files changed, 56 insertions(+), 0 deletions(-)
> 
> > diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-
> omap2/omap_phy_internal.c
> > index 58775e3..352b6af 100644
> > --- a/arch/arm/mach-omap2/omap_phy_internal.c
> > +++ b/arch/arm/mach-omap2/omap_phy_internal.c
> > @@ -260,3 +260,27 @@ void am35x_set_mode(u8 musb_mode)
> >
> >   	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
> >   }
> > +
> > +void ti81xx_musb_phy_power(u8 on)
> > +{
> > +	u32 usbphycfg = omap_ctrl_readl(USBCTRL0);
> > +
> > +	if (on) {
> > +		if (cpu_is_ti816x()) {
> > +			usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
> > +			usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC;
> > +		} else if (cpu_is_ti814x()) {
> > +			usbphycfg&= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
> > +				| USBPHY_DPINPUT | USBPHY_DMINPUT);
> > +			usbphycfg |= (USBPHY_OTGVDET_EN |
> USBPHY_OTGSESSEND_EN
> > +				| USBPHY_DPOPBUFCTL | USBPHY_DPOPBUFCTL);
> 
>     Same #define repeated twice?

Good catch.. thanks. One of them should be USBPHY_DMOPBUFCTL, will fix in v3.

Ajay
> 
> WBR, Sergei
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RE: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx

[Gupta, Ajay Kumar]

Hi,
> <ajay.gupta@ti.com> wrote:
[...]
> >> >
> >> > --
> >> > 1.6.2.4
> >>
> >> looks good to me.
> >
> > how about you reply with your Acked-by then ?
> >
> > --
> > balbi
> 
> yes balbi,
>      here it is
> 
> Acked-By: Keshava Munegowda <keshava_mgowda@ti.com>

Tony and Benoit,

Please review this patch and provide your input on this.

Thanks,
Ajay

RE: [PATCH 6/6 v2] usb: musb: Add support for ti81xx platform

[Gupta, Ajay Kumar]

Hi,
> > +static int __devinit dsps_probe(struct platform_device *pdev) {
> > +	const struct platform_device_id *id =
> platform_get_device_id(pdev);
> > +	const struct dsps_musb_wrapper *wrp =
> > +				(struct dsps_musb_wrapper *)id->driver_data;
> > +	struct dsps_glue *glue;
> > +	struct resource *iomem;
> > +	int ret;
> > +
> > +	/* allocate glue */
> > +	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
> > +	if (!glue) {
> > +		dev_err(&pdev->dev, "unable to allocate glue memory\n");
> > +		ret = -ENOMEM;
> > +		goto err0;
> > +	}
> > +
> > +	/* get memory resource */
> > +	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	if (!iomem) {
> > +		dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
> > +		ret = -ENODEV;
> > +		goto err1;
> > +	}
> > +
> > +	glue->dev = &pdev->dev;
> > +	glue->wrp = wrp;
> 
> wrp is marked __devinitconst, so I guess you need to copy it here,
> instead of just pointing to it.

Will fix in v3.

Thanks,
Ajay
> 
> --
> balbi