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From: Jamie Iles <jamie@jamieiles.com>
To: Rob Herring <robherring2@gmail.com>
Cc: Jamie Iles <jamie@jamieiles.com>,
	linux-arm-kernel@lists.infradead.org,
	devicetree-discuss@lists.ozlabs.org,
	linux-kernel@vger.kernel.org, grant.likely@secretlab.ca,
	marc.zyngier@arm.com, thomas.abraham@linaro.org,
	b-cousson@ti.com, shawn.guo@linaro.org, dave.martin@linaro.org,
	linux@arm.linux.org.uk, Rob Herring <rob.herring@calxeda.com>
Subject: Re: [PATCH 3/3] ARM: gic: add OF based initialization
Date: Mon, 26 Sep 2011 22:11:27 +0100	[thread overview]
Message-ID: <20110926211127.GE9194@gallagher> (raw)
In-Reply-To: <4E80E547.2080004@gmail.com>

On Mon, Sep 26, 2011 at 03:49:11PM -0500, Rob Herring wrote:
> On 09/26/2011 02:57 PM, Jamie Iles wrote:
> > Hi Rob,
> > 
> > On Tue, Sep 20, 2011 at 03:24:04PM -0500, Rob Herring wrote:
> > [...]
> >> +int __init gic_of_init(struct device_node *node, struct device_node *parent)
> >> +{
> >> +	void __iomem *cpu_base;
> >> +	void __iomem *dist_base;
> >> +	int irq;
> >> +	struct irq_domain *domain = &gic_data[gic_cnt].domain;
> >> +
> >> +	if (WARN_ON(!node))
> >> +		return -ENODEV;
> >> +
> >> +	dist_base = of_iomap(node, 0);
> >> +	WARN(!dist_base, "unable to map gic dist registers\n");
> >> +
> >> +	cpu_base = of_iomap(node, 1);
> >> +	WARN(!cpu_base, "unable to map gic cpu registers\n");
> >> +
> >> +	domain->nr_irq = gic_irq_count(dist_base);
> >> +	/* subtract off SGIs. Also subtract off PPIs for secondary GICs */
> >> +	if (parent)
> >> +		domain->nr_irq -= 32;
> >> +	else
> >> +		domain->nr_irq -= 16;
> >> +
> >> +	domain->irq_base = irq_alloc_descs(-1, 16, domain->nr_irq, numa_node_id());
> > 
> > The way I understand irq_alloc_descs() (probably not very well) is that 
> > having the irq parameter < 0 and the from parameter 16 means that it 
> > needs to find domain->nr_irq descs starting from at least 16.  But if 
> > the base is greater than 16, does this still work with the gic entry 
> > macros as they are?
> 
> No, but that would only happen if a platform calls irq_alloc_descs prior
> to this code. The root controller must be initialized first (for other
> reasons as well). There are no calls to irq_alloc_descs in arch/arm.
> 
> With the MULTI_IRQ GIC support Marc Z is working on, we could make the
> GIC irq mapping be completely dynamic. Although, there's probably not
> much reason to do so for the root controller.

OK, that makes sense.  I think that if you were to do 
irq_alloc_descs(16, 16, domain->nr_irqs, num_node_id()) then that will 
guarantee the descriptors start from 16 (if they are available) which is 
probably nicer.

Jamie

WARNING: multiple messages have this Message-ID (diff)
From: Jamie Iles <jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>
To: Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: dave.martin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org,
	devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 3/3] ARM: gic: add OF based initialization
Date: Mon, 26 Sep 2011 22:11:27 +0100	[thread overview]
Message-ID: <20110926211127.GE9194@gallagher> (raw)
In-Reply-To: <4E80E547.2080004-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

On Mon, Sep 26, 2011 at 03:49:11PM -0500, Rob Herring wrote:
> On 09/26/2011 02:57 PM, Jamie Iles wrote:
> > Hi Rob,
> > 
> > On Tue, Sep 20, 2011 at 03:24:04PM -0500, Rob Herring wrote:
> > [...]
> >> +int __init gic_of_init(struct device_node *node, struct device_node *parent)
> >> +{
> >> +	void __iomem *cpu_base;
> >> +	void __iomem *dist_base;
> >> +	int irq;
> >> +	struct irq_domain *domain = &gic_data[gic_cnt].domain;
> >> +
> >> +	if (WARN_ON(!node))
> >> +		return -ENODEV;
> >> +
> >> +	dist_base = of_iomap(node, 0);
> >> +	WARN(!dist_base, "unable to map gic dist registers\n");
> >> +
> >> +	cpu_base = of_iomap(node, 1);
> >> +	WARN(!cpu_base, "unable to map gic cpu registers\n");
> >> +
> >> +	domain->nr_irq = gic_irq_count(dist_base);
> >> +	/* subtract off SGIs. Also subtract off PPIs for secondary GICs */
> >> +	if (parent)
> >> +		domain->nr_irq -= 32;
> >> +	else
> >> +		domain->nr_irq -= 16;
> >> +
> >> +	domain->irq_base = irq_alloc_descs(-1, 16, domain->nr_irq, numa_node_id());
> > 
> > The way I understand irq_alloc_descs() (probably not very well) is that 
> > having the irq parameter < 0 and the from parameter 16 means that it 
> > needs to find domain->nr_irq descs starting from at least 16.  But if 
> > the base is greater than 16, does this still work with the gic entry 
> > macros as they are?
> 
> No, but that would only happen if a platform calls irq_alloc_descs prior
> to this code. The root controller must be initialized first (for other
> reasons as well). There are no calls to irq_alloc_descs in arch/arm.
> 
> With the MULTI_IRQ GIC support Marc Z is working on, we could make the
> GIC irq mapping be completely dynamic. Although, there's probably not
> much reason to do so for the root controller.

OK, that makes sense.  I think that if you were to do 
irq_alloc_descs(16, 16, domain->nr_irqs, num_node_id()) then that will 
guarantee the descriptors start from 16 (if they are available) which is 
probably nicer.

Jamie

WARNING: multiple messages have this Message-ID (diff)
From: jamie@jamieiles.com (Jamie Iles)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] ARM: gic: add OF based initialization
Date: Mon, 26 Sep 2011 22:11:27 +0100	[thread overview]
Message-ID: <20110926211127.GE9194@gallagher> (raw)
In-Reply-To: <4E80E547.2080004@gmail.com>

On Mon, Sep 26, 2011 at 03:49:11PM -0500, Rob Herring wrote:
> On 09/26/2011 02:57 PM, Jamie Iles wrote:
> > Hi Rob,
> > 
> > On Tue, Sep 20, 2011 at 03:24:04PM -0500, Rob Herring wrote:
> > [...]
> >> +int __init gic_of_init(struct device_node *node, struct device_node *parent)
> >> +{
> >> +	void __iomem *cpu_base;
> >> +	void __iomem *dist_base;
> >> +	int irq;
> >> +	struct irq_domain *domain = &gic_data[gic_cnt].domain;
> >> +
> >> +	if (WARN_ON(!node))
> >> +		return -ENODEV;
> >> +
> >> +	dist_base = of_iomap(node, 0);
> >> +	WARN(!dist_base, "unable to map gic dist registers\n");
> >> +
> >> +	cpu_base = of_iomap(node, 1);
> >> +	WARN(!cpu_base, "unable to map gic cpu registers\n");
> >> +
> >> +	domain->nr_irq = gic_irq_count(dist_base);
> >> +	/* subtract off SGIs. Also subtract off PPIs for secondary GICs */
> >> +	if (parent)
> >> +		domain->nr_irq -= 32;
> >> +	else
> >> +		domain->nr_irq -= 16;
> >> +
> >> +	domain->irq_base = irq_alloc_descs(-1, 16, domain->nr_irq, numa_node_id());
> > 
> > The way I understand irq_alloc_descs() (probably not very well) is that 
> > having the irq parameter < 0 and the from parameter 16 means that it 
> > needs to find domain->nr_irq descs starting from at least 16.  But if 
> > the base is greater than 16, does this still work with the gic entry 
> > macros as they are?
> 
> No, but that would only happen if a platform calls irq_alloc_descs prior
> to this code. The root controller must be initialized first (for other
> reasons as well). There are no calls to irq_alloc_descs in arch/arm.
> 
> With the MULTI_IRQ GIC support Marc Z is working on, we could make the
> GIC irq mapping be completely dynamic. Although, there's probably not
> much reason to do so for the root controller.

OK, that makes sense.  I think that if you were to do 
irq_alloc_descs(16, 16, domain->nr_irqs, num_node_id()) then that will 
guarantee the descriptors start from 16 (if they are available) which is 
probably nicer.

Jamie

  reply	other threads:[~2011-09-26 21:11 UTC|newest]

Thread overview: 97+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-20 20:24 [PATCH 0/3] GIC OF bindings Rob Herring
2011-09-20 20:24 ` Rob Herring
2011-09-20 20:24 ` Rob Herring
2011-09-20 20:24 ` [PATCH 1/3] of/irq: of_irq_find_parent: check for parent equal to child Rob Herring
2011-09-20 20:24   ` Rob Herring
2011-09-20 20:24   ` Rob Herring
2011-09-20 21:01   ` Grant Likely
2011-09-20 21:01     ` Grant Likely
2011-09-20 21:01     ` Grant Likely
2011-09-20 20:24 ` [PATCH 2/3] of/irq: introduce of_irq_init Rob Herring
2011-09-20 20:24   ` Rob Herring
2011-09-20 20:24   ` Rob Herring
2011-09-20 23:00   ` Grant Likely
2011-09-20 23:00     ` Grant Likely
2011-09-21 10:01   ` Jamie Iles
2011-09-21 10:01     ` Jamie Iles
2011-09-21 10:01     ` Jamie Iles
2011-09-23  2:21   ` [PATCH v3] " Rob Herring
2011-09-23  2:21     ` Rob Herring
2011-09-23  2:21     ` Rob Herring
2011-09-23  5:14     ` Grant Likely
2011-09-23  5:14       ` Grant Likely
2011-09-23  5:14       ` Grant Likely
2011-09-26 19:24     ` [PATCH v4] " Rob Herring
2011-09-26 19:24       ` Rob Herring
2011-09-26 19:24       ` Rob Herring
2011-09-27  1:53       ` Grant Likely
2011-09-27  1:53         ` Grant Likely
2011-09-27  1:53         ` Grant Likely
2011-09-27 13:03         ` Rob Herring
2011-09-27 13:03           ` Rob Herring
2011-09-27 13:03           ` Rob Herring
2011-09-27 21:24           ` Grant Likely
2011-09-27 21:24             ` Grant Likely
2011-09-20 20:24 ` [PATCH 3/3] ARM: gic: add OF based initialization Rob Herring
2011-09-20 20:24   ` Rob Herring
2011-09-20 20:24   ` Rob Herring
2011-09-20 23:08   ` Grant Likely
2011-09-20 23:08     ` Grant Likely
2011-09-20 23:08     ` Grant Likely
2011-09-21  1:54     ` Rob Herring
2011-09-21  1:54       ` Rob Herring
2011-09-21  1:54       ` Rob Herring
2011-09-21 17:15   ` Cousson, Benoit
2011-09-21 17:15     ` Cousson, Benoit
2011-09-21 17:15     ` Cousson, Benoit
2011-09-21 17:55     ` Rob Herring
2011-09-21 17:55       ` Rob Herring
2011-09-21 17:55       ` Rob Herring
2011-09-21 19:28       ` Cousson, Benoit
2011-09-21 19:28         ` Cousson, Benoit
2011-09-21 19:28         ` Cousson, Benoit
2011-09-21 20:27         ` Cousson, Benoit
2011-09-21 20:27           ` Cousson, Benoit
2011-09-21 20:27           ` Cousson, Benoit
2011-09-26 19:57   ` Jamie Iles
2011-09-26 19:57     ` Jamie Iles
2011-09-26 19:57     ` Jamie Iles
2011-09-26 20:49     ` Rob Herring
2011-09-26 20:49       ` Rob Herring
2011-09-26 20:49       ` Rob Herring
2011-09-26 21:11       ` Jamie Iles [this message]
2011-09-26 21:11         ` Jamie Iles
2011-09-26 21:11         ` Jamie Iles
2011-09-26 21:32         ` Rob Herring
2011-09-26 21:32           ` Rob Herring
2011-09-26 21:32           ` Rob Herring
2011-09-26 22:00           ` Jamie Iles
2011-09-26 22:00             ` Jamie Iles
2011-09-26 22:29   ` Jamie Iles
2011-09-26 22:29     ` Jamie Iles
2011-09-26 22:29     ` Jamie Iles
2011-09-21  2:49 ` [PATCH 0/3] GIC OF bindings David Miller
2011-09-21  2:49   ` David Miller
2011-09-21  2:49   ` David Miller
2011-09-21  4:14   ` Grant Likely
2011-09-21  4:14     ` Grant Likely
2011-09-21  4:58     ` Mitch Bradley
2011-09-21  4:58       ` Mitch Bradley
2011-09-21  4:58       ` Mitch Bradley
2011-09-21  5:21       ` David Miller
2011-09-21  5:21         ` David Miller
2011-09-21  5:21         ` David Miller
2011-09-21  7:11         ` Mitch Bradley
2011-09-21  7:11           ` Mitch Bradley
2011-09-21  7:11           ` Mitch Bradley
2011-09-21  5:16   ` Segher Boessenkool
2011-09-21  5:16     ` Segher Boessenkool
2011-09-21  5:16     ` Segher Boessenkool
2011-09-21  9:43 ` Shawn Guo
2011-09-21  9:43   ` Shawn Guo
2011-09-21  9:43   ` Shawn Guo
2011-09-30 19:27 Rob Herring
2011-09-30 19:28 ` [PATCH 3/3] ARM: gic: add OF based initialization Rob Herring
2011-09-30 19:28   ` Rob Herring
2011-09-30 19:28   ` Rob Herring
2011-10-04 23:44   ` Grant Likely
2011-10-04 23:44     ` Grant Likely

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