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* [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup
@ 2011-10-28 21:47 Myron Stowe
  2011-10-28 21:47 ` [PATCH -v2 01/16] PCI: add declaration for pcibios_set_master() to pci core Myron Stowe
                   ` (17 more replies)
  0 siblings, 18 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:47 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

The 'latency timer' of PCI devices, both Type 0 and Type 1,
is setup in architecture-specific code [see: pcibios_set_master()].
There are two approaches being taken by all the architectures - check
if the 'latency timer' is currently set between 16 and 255 and if not
bring it within bounds, or, do nothing (and then there is the
gratuitously different parisc implementation).

There is nothing architecture-specific about PCI's 'latency timer' so
this patch pulls the setup functionality up into the PCI core by
creating a generic 'pcibios_set_master()' function using the '__weak'
attribute which can be used by all architectures as a default which,
if necessary, can then be over-ridden by architecture-specific code.


The series starts out by converting architecture-specific inlined
versions of 'pcibios_set_master()' - all of which are no-ops - into
non-inlined equivalents.  This is necessary to allow a subsequent
patch to create a generic version using the '__weak' attribute and is
done for the following architectures: arm, blackfin*, h8300*, ia64,
microblaze, powerpc, sparc, tile, unicore32, and xtensa.

Without the conversions, the compiler sees the architecture-
specific version, defined as a static inline function typically in
<asm/pci.h>, and will have no knowledge about the __weak version
once it is introduced, which leads to compile failures as in:
  drivers/pci/pci.c: 2605: error: redefinition of 'pcibios_set_master'
  arch/powerpc/include/asm/pci.h: 49: note: previous definition of
    'pcibios_set_master' was here

Next the generic 'pcibios_set_master()' function is introduced in
PCI's core.  With the generic 'pcibios_set_master()' function in place
the series removes the now redundant function from the following
architectures: frv, mips, mn10300, sh, and x86.

It would be nice to have all architectures follow suit and end up
using only the single, generic, 'pcibios_set_master()' function.

-v2:
 - In the original series I tried to not touch any of the architectures
   that were not going to end up using the generic 'pcibios_set_master()'
   function but this just created compile problems for those so I had to
   generate a number of pre-cursor patches to the series as noted above.
 - * blackfin and h8300 architectures do not seem to support PCI (no
   root bus scanning etc. exists within them) but they do have PCI header
   files.  I removed the inline definitions for each of these within
   the patch that introduces the generic 'pcibios_set_master()' function
   so that the __weak version would satisfy any necessary references.

I have only tested x86 although I was able to compile test powerpc in
addition this time.
---

Myron Stowe (16):
      PCI: latency timer doesn't apply to PCIe
      PCI: x86: use generic pcibios_set_master()
      PCI: sh: use generic pcibios_set_master()
      PCI: mn10300: use generic pcibios_set_master()
      PCI: MIPS: use generic pcibios_set_master()
      PCI: frv: use generic pcibios_set_master()
      PCI: Pull PCI 'latency timer' setup up into the core
      PCI: Xtensa: convert pcibios_set_master() to a non-inlined function
      PCI: UniCore: convert pcibios_set_master() to a non-inlined function
      PCI: TILE: convert pcibios_set_master() to a non-inlined function
      PCI: SPARC: convert pcibios_set_master() to a non-inlined function
      PCI: PowerPC: convert pcibios_set_master() to a non-inlined function
      PCI: MicroBlaze: convert pcibios_set_master() to a non-inlined function
      PCI: IA64: convert pcibios_set_master() to a non-inlined function
      PCI: ARM: convert pcibios_set_master() to a non-inlined function
      PCI: add declaration for pcibios_set_master() to pci core


 arch/arm/common/it8152.c                |    3 +++
 arch/arm/include/asm/pci.h              |   12 -----------
 arch/arm/kernel/bios32.c                |    7 +++++++
 arch/blackfin/include/asm/pci.h         |    4 ----
 arch/frv/mb93090-mb00/pci-frv.c         |   20 -------------------
 arch/frv/mb93090-mb00/pci-frv.h         |    2 --
 arch/h8300/include/asm/pci.h            |    5 -----
 arch/ia64/include/asm/pci.h             |    6 ------
 arch/ia64/pci/pci.c                     |    5 +++++
 arch/microblaze/include/asm/pci.h       |    5 -----
 arch/microblaze/pci/pci-common.c        |    5 +++++
 arch/mips/pci/pci.c                     |   21 --------------------
 arch/mn10300/unit-asb2305/pci-asb2305.c |   22 ---------------------
 arch/mn10300/unit-asb2305/pci-asb2305.h |    2 --
 arch/powerpc/include/asm/pci.h          |    5 -----
 arch/powerpc/kernel/pci-common.c        |    5 +++++
 arch/sh/drivers/pci/pci.c               |   21 --------------------
 arch/sparc/include/asm/pci_32.h         |    5 -----
 arch/sparc/include/asm/pci_64.h         |    5 -----
 arch/sparc/kernel/pci.c                 |    5 +++++
 arch/tile/include/asm/pci.h             |    7 -------
 arch/tile/kernel/pci.c                  |    5 +++++
 arch/unicore32/include/asm/pci.h        |    5 -----
 arch/unicore32/kernel/pci.c             |    5 +++++
 arch/x86/include/asm/pci_x86.h          |    2 --
 arch/x86/pci/i386.c                     |   20 -------------------
 arch/xtensa/include/asm/pci.h           |    5 -----
 arch/xtensa/kernel/pci.c                |    5 +++++
 drivers/pci/pci.c                       |   33 +++++++++++++++++++++++++++++++
 include/linux/pci.h                     |    5 +++++
 30 files changed, 83 insertions(+), 174 deletions(-)

-- 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH -v2 01/16] PCI: add declaration for pcibios_set_master() to pci core
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
@ 2011-10-28 21:47 ` Myron Stowe
  2011-12-05 19:06   ` Jesse Barnes
  2011-10-28 21:47 ` [PATCH -v2 02/16] PCI: ARM: convert pcibios_set_master() to a non-inlined function Myron Stowe
                   ` (16 subsequent siblings)
  17 siblings, 1 reply; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:47 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

Currently, pcibios_set_master() is implemented in architecture-
specific code.  There is nothing architecture-specific about PCI's
'latency timer'.

This patch adds a declaration for pcibios_set_master() to PCI's core
in preperation for pulling the function itself up into the core.
Without the addition of this declaration, subsequent patches that
remove inline definitions of pcibios_set_master() would be removing
the only declaration of such.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 include/linux/pci.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/linux/pci.h b/include/linux/pci.h
index 8c230cb..abbd8b6 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1440,8 +1440,10 @@ extern u8 pci_cache_line_size;
 extern unsigned long pci_hotplug_io_size;
 extern unsigned long pci_hotplug_mem_size;
 
+/* Architecture specific versions may override these (weak) */
 int pcibios_add_platform_entries(struct pci_dev *dev);
 void pcibios_disable_device(struct pci_dev *dev);
+void pcibios_set_master(struct pci_dev *dev);
 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
 				 enum pcie_reset_state state);
 


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 02/16] PCI: ARM: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
  2011-10-28 21:47 ` [PATCH -v2 01/16] PCI: add declaration for pcibios_set_master() to pci core Myron Stowe
@ 2011-10-28 21:47 ` Myron Stowe
  2011-10-28 21:47 ` [PATCH -v2 03/16] PCI: IA64: " Myron Stowe
                   ` (15 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:47 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch converts ARM's architecture-specific inlined
'pcibios_set_master()' routine to a non-inlined function.  This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will allow
ARM's 'pcibios_set_master()' implementation to remain architecture-
specific after the generic version is introduced and thus, not change
current behavior.

Note that ARM also has a non-inlined 'pcibios_set_master()' that is
used if CONFIG_PCI_HOST_ITE8152 is defined.  This patch does not
change any behavior here either.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/arm/common/it8152.c   |    3 +++
 arch/arm/include/asm/pci.h |   12 ------------
 arch/arm/kernel/bios32.c   |    7 +++++++
 3 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index a7934ba..b892432 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -326,6 +326,9 @@ err0:
  */
 unsigned int pcibios_max_latency = 255;
 
+/* ITE bridge requires setting latency timer to avoid early bus access
+   termination by PCI bus master devices
+*/
 void pcibios_set_master(struct pci_dev *dev)
 {
 	u8 lat;
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 2b1f245..da337ba 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -31,18 +31,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 }
 #endif /* CONFIG_PCI_DOMAINS */
 
-#ifdef CONFIG_PCI_HOST_ITE8152
-/* ITE bridge requires setting latency timer to avoid early bus access
-   termination by PIC bus mater devices
-*/
-extern void pcibios_set_master(struct pci_dev *dev);
-#else
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-#endif
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index d6df359..d8457c6 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -572,6 +572,13 @@ void __init pci_common_init(struct hw_pci *hw)
 	}
 }
 
+#ifndef CONFIG_PCI_HOST_ITE8152
+void pcibios_set_master(struct pci_dev *dev)
+{
+	/* No special bus mastering setup handling */
+}
+#endif
+
 char * __init pcibios_setup(char *str)
 {
 	if (!strcmp(str, "debug")) {


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 03/16] PCI: IA64: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
  2011-10-28 21:47 ` [PATCH -v2 01/16] PCI: add declaration for pcibios_set_master() to pci core Myron Stowe
  2011-10-28 21:47 ` [PATCH -v2 02/16] PCI: ARM: convert pcibios_set_master() to a non-inlined function Myron Stowe
@ 2011-10-28 21:47 ` Myron Stowe
  2011-10-28 21:47 ` [PATCH -v2 04/16] PCI: MicroBlaze: " Myron Stowe
                   ` (14 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:47 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch converts IA64's architecture-specific 'pcibios_set_master()'
routine to a non-inlined function.  This will allow follow on
patches to create a generic 'pcibios_set_master()' function using the
'__weak' attribute which can be used by all architectures as a default
which, if necessary, can then be over-ridden by architecture-
specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will allow
IA64's 'pcibios_set_master()' implementation to remain architecture-
specific after the generic version is introduced and thus, not change
current behavior.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/ia64/include/asm/pci.h |    6 ------
 arch/ia64/pci/pci.c         |    5 +++++
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 73b5f78..6e3d91e 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -43,12 +43,6 @@ extern unsigned long ia64_max_iommu_merge_mask;
 #define PCI_DMA_BUS_IS_PHYS	(ia64_max_iommu_merge_mask == ~0UL)
 
 static inline void
-pcibios_set_master (struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-
-static inline void
 pcibios_penalize_isa_irq (int irq, int active)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index aa2533a..8273acb 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -513,6 +513,11 @@ pcibios_fixup_bus (struct pci_bus *b)
 	return;
 }
 
+void pcibios_set_master (struct pci_dev *dev)
+{
+	/* No special bus mastering setup handling */
+}
+
 void __devinit
 pcibios_update_irq (struct pci_dev *dev, int irq)
 {


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 04/16] PCI: MicroBlaze: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (2 preceding siblings ...)
  2011-10-28 21:47 ` [PATCH -v2 03/16] PCI: IA64: " Myron Stowe
@ 2011-10-28 21:47 ` Myron Stowe
  2011-10-28 21:48 ` [PATCH -v2 05/16] PCI: PowerPC: " Myron Stowe
                   ` (13 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:47 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch converts MicroBlaze's architecture-specific
'pcibios_set_master()' routine to a non-inlined function.  This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will
allow MicroBlaze's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and thus,
not change current behavior.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/microblaze/include/asm/pci.h |    5 -----
 arch/microblaze/pci/pci-common.c  |    5 +++++
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 1dd9d6b..0331376 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -42,11 +42,6 @@ struct pci_dev;
  */
 #define pcibios_assign_all_busses()	0
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 4cfae20..1a500c5 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -189,6 +189,11 @@ int pcibios_add_platform_entries(struct pci_dev *pdev)
 	return device_create_file(&pdev->dev, &dev_attr_devspec);
 }
 
+void pcibios_set_master(struct pci_dev *dev)
+{
+	/* No special bus mastering setup handling */
+}
+
 char __devinit *pcibios_setup(char *str)
 {
 	return str;


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 05/16] PCI: PowerPC: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (3 preceding siblings ...)
  2011-10-28 21:47 ` [PATCH -v2 04/16] PCI: MicroBlaze: " Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-28 21:48 ` [PATCH -v2 06/16] PCI: SPARC: " Myron Stowe
                   ` (12 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch converts PowerPC's architecture-specific
'pcibios_set_master()' routine to a non-inlined function.  This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will
allow PowerPC's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/powerpc/include/asm/pci.h   |    5 -----
 arch/powerpc/kernel/pci-common.c |    5 +++++
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 49c3de5..9284fe8 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -46,11 +46,6 @@ struct pci_dev;
 #define pcibios_assign_all_busses() \
 	(pci_has_flag(PCI_REASSIGN_ALL_BUS))
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 32656f1..dd68684 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1117,6 +1117,11 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
 	}
 }
 
+void pcibios_set_master(struct pci_dev *dev)
+{
+	/* No special bus mastering setup handling */
+}
+
 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
 	/* When called from the generic PCI probe, read PCI<->PCI bridge


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 06/16] PCI: SPARC: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (4 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 05/16] PCI: PowerPC: " Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-28 21:48 ` [PATCH -v2 07/16] PCI: TILE: " Myron Stowe
                   ` (11 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch converts SPARC's architecture-specific
'pcibios_set_master()' routine to a non-inlined function.  This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will
allow SPARC's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/sparc/include/asm/pci_32.h |    5 -----
 arch/sparc/include/asm/pci_64.h |    5 -----
 arch/sparc/kernel/pci.c         |    5 +++++
 3 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index 02939ab..6de7f7b 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -16,11 +16,6 @@
 
 #define PCI_IRQ_NONE		0xffffffff
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index 2614d96..755a4bb 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -16,11 +16,6 @@
 
 #define PCI_IRQ_NONE		0xffffffff
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index 1e94f94..269c011 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -1082,6 +1082,11 @@ void pci_resource_to_user(const struct pci_dev *pdev, int bar,
 	*end = rp->end - offset;
 }
 
+void pcibios_set_master(struct pci_dev *dev)
+{
+	/* No special bus mastering setup handling */
+}
+
 static int __init pcibios_init(void)
 {
 	pci_dfl_cache_line_size = 64 >> 2;


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 07/16] PCI: TILE: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (5 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 06/16] PCI: SPARC: " Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-31 15:27   ` Chris Metcalf
  2011-10-28 21:48 ` [PATCH -v2 08/16] PCI: UniCore: " Myron Stowe
                   ` (10 subsequent siblings)
  17 siblings, 1 reply; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch converts TILE's architecture-specific 'pcibios_set_master()'
routine to a non-inlined function.  This will allow follow on patches
to create a generic 'pcibios_set_master()' function using the '__weak'
attribute which can be used by all architectures as a default which,
if necessary, can then be over-ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will
allow TILE's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/tile/include/asm/pci.h |    7 -------
 arch/tile/kernel/pci.c      |    5 +++++
 2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index 7f03cef..2a2abc7 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -76,13 +76,6 @@ static inline int pcibios_assign_all_busses(void)
 	return 1;
 }
 
-/*
- * No special bus mastering setup handling.
- */
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-}
-
 #define PCIBIOS_MIN_MEM		0
 #define PCIBIOS_MIN_IO		0
 
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index 2a8014c..08b8943 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -394,6 +394,11 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 	/* Nothing needs to be done. */
 }
 
+void pcibios_set_master(struct pci_dev *dev)
+{
+	/* No special bus mastering setup handling. */
+}
+
 /*
  * This can be called from the generic PCI layer, but doesn't need to
  * do anything.


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 08/16] PCI: UniCore: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (6 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 07/16] PCI: TILE: " Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-28 21:48 ` [PATCH -v2 09/16] PCI: Xtensa: " Myron Stowe
                   ` (9 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch converts UniCore's architecture-specific
'pcibios_set_master()' routine to a non-inlined function.  This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will
allow UniCore's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/unicore32/include/asm/pci.h |    5 -----
 arch/unicore32/kernel/pci.c      |    5 +++++
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/unicore32/include/asm/pci.h b/arch/unicore32/include/asm/pci.h
index c5b28b4..dd38677 100644
--- a/arch/unicore32/include/asm/pci.h
+++ b/arch/unicore32/include/asm/pci.h
@@ -17,11 +17,6 @@
 #include <asm-generic/pci.h>
 #include <mach/hardware.h> /* for PCIBIOS_MIN_* */
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 4892fbb..a8f07fe 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -309,6 +309,11 @@ char * __devinit pcibios_setup(char *str)
 	return str;
 }
 
+void pcibios_set_master(struct pci_dev *dev)
+{
+	/* No special bus mastering setup handling */
+}
+
 /*
  * From arch/i386/kernel/pci-i386.c:
  *


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 09/16] PCI: Xtensa: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (7 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 08/16] PCI: UniCore: " Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-28 21:48 ` [PATCH -v2 10/16] PCI: Pull PCI 'latency timer' setup up into the core Myron Stowe
                   ` (8 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch converts Xtensa's architecture-specific
'pcibios_set_master()' routine to a non-inlined function.  This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will
allow Xtensa's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/xtensa/include/asm/pci.h |    5 -----
 arch/xtensa/kernel/pci.c      |    5 +++++
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h
index 4609b0f..05244f0 100644
--- a/arch/xtensa/include/asm/pci.h
+++ b/arch/xtensa/include/asm/pci.h
@@ -22,11 +22,6 @@
 
 extern struct pci_controller* pcibios_alloc_controller(void);
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-
 static inline void pcibios_penalize_isa_irq(int irq)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index cd10269..644b2d4 100644
--- a/arch/xtensa/kernel/pci.c
+++ b/arch/xtensa/kernel/pci.c
@@ -227,6 +227,11 @@ char __init *pcibios_setup(char *str)
 	return str;
 }
 
+void pcibios_set_master(struct pci_dev *dev)
+{
+	/* No special bus mastering setup handling */
+}
+
 /* the next one is stolen from the alpha port... */
 
 void __init


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 10/16] PCI: Pull PCI 'latency timer' setup up into the core
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (8 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 09/16] PCI: Xtensa: " Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-28 21:48 ` [PATCH -v2 11/16] PCI: frv: use generic pcibios_set_master() Myron Stowe
                   ` (7 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

The 'latency timer' of PCI devices, both Type 0 and Type 1,
is setup in architecture-specific code [see: 'pcibios_set_master()'].
There are two approaches being taken by all the architectures - check
if the 'latency timer' is currently set between 16 and 255 and if not
bring it within bounds, or, do nothing (and then there is the
gratuitously different PA-RISC implementation).

There is nothing architecture-specific about PCI's 'latency timer' so
this patch pulls its setup functionality up into the PCI core by
creating a generic 'pcibios_set_master()' function using the '__weak'
attribute which can be used by all architectures as a default which,
if necessary, can then be over-ridden by architecture-specific code.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/blackfin/include/asm/pci.h         |    4 ----
 arch/frv/mb93090-mb00/pci-frv.c         |    6 ------
 arch/frv/mb93090-mb00/pci-frv.h         |    2 --
 arch/h8300/include/asm/pci.h            |    5 -----
 arch/mips/pci/pci.c                     |    6 ------
 arch/mn10300/unit-asb2305/pci-asb2305.c |    6 ------
 arch/mn10300/unit-asb2305/pci-asb2305.h |    2 --
 arch/sh/drivers/pci/pci.c               |    6 ------
 arch/x86/include/asm/pci_x86.h          |    2 --
 arch/x86/pci/i386.c                     |    6 ------
 drivers/pci/pci.c                       |   29 +++++++++++++++++++++++++++++
 include/linux/pci.h                     |    3 +++
 12 files changed, 32 insertions(+), 45 deletions(-)

diff --git a/arch/blackfin/include/asm/pci.h b/arch/blackfin/include/asm/pci.h
index 99cae2e..74352c4 100644
--- a/arch/blackfin/include/asm/pci.h
+++ b/arch/blackfin/include/asm/pci.h
@@ -10,10 +10,6 @@
 #define PCIBIOS_MIN_IO 0x00001000
 #define PCIBIOS_MIN_MEM 0x10000000
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c
index 6b4fb28..6a0cd64 100644
--- a/arch/frv/mb93090-mb00/pci-frv.c
+++ b/arch/frv/mb93090-mb00/pci-frv.c
@@ -195,12 +195,6 @@ void __init pcibios_resource_survey(void)
 	pcibios_assign_resources();
 }
 
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-unsigned int pcibios_max_latency = 255;
-
 void pcibios_set_master(struct pci_dev *dev)
 {
 	u8 lat;
diff --git a/arch/frv/mb93090-mb00/pci-frv.h b/arch/frv/mb93090-mb00/pci-frv.h
index f3fe559..089eeba 100644
--- a/arch/frv/mb93090-mb00/pci-frv.h
+++ b/arch/frv/mb93090-mb00/pci-frv.h
@@ -26,8 +26,6 @@ extern unsigned int __nongpreldata pci_probe;
 
 /* pci-frv.c */
 
-extern unsigned int pcibios_max_latency;
-
 void pcibios_resource_survey(void);
 
 /* pci-vdk.c */
diff --git a/arch/h8300/include/asm/pci.h b/arch/h8300/include/asm/pci.h
index cc97620..0b2acaa 100644
--- a/arch/h8300/include/asm/pci.h
+++ b/arch/h8300/include/asm/pci.h
@@ -9,11 +9,6 @@
 
 #define pcibios_assign_all_busses()	0
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-	/* No special bus mastering setup handling */
-}
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
 	/* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 33bba7b..a6de9b8 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -204,12 +204,6 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask)
 	return 0;
 }
 
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-static unsigned int pcibios_max_latency = 255;
-
 void pcibios_set_master(struct pci_dev *dev)
 {
 	u8 lat;
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c
index 8e6763e..2b299c4 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.c
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.c
@@ -213,12 +213,6 @@ void __init pcibios_resource_survey(void)
 	pcibios_allocate_resources(1);
 }
 
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-unsigned int pcibios_max_latency = 255;
-
 void pcibios_set_master(struct pci_dev *dev)
 {
 	u8 lat;
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.h b/arch/mn10300/unit-asb2305/pci-asb2305.h
index c3fa294..1194fe4 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.h
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.h
@@ -31,8 +31,6 @@ extern unsigned int pci_probe;
 
 /* pci-asb2305.c */
 
-extern unsigned int pcibios_max_latency;
-
 extern void pcibios_resource_survey(void);
 
 /* pci.c */
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 194231c..a0c92fd 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -242,12 +242,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
 	return pci_enable_resources(dev, mask);
 }
 
-/*
- *  If we set up a device for bus mastering, we need to check and set
- *  the latency timer as it may not be properly set.
- */
-static unsigned int pcibios_max_latency = 255;
-
 void pcibios_set_master(struct pci_dev *dev)
 {
 	u8 lat;
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index 7045267..497c8a3 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -44,8 +44,6 @@ enum pci_bf_sort_state {
 
 /* pci-i386.c */
 
-extern unsigned int pcibios_max_latency;
-
 void pcibios_resource_survey(void);
 void pcibios_set_cache_line_size(void);
 
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 494f2e7..5663bc2 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -253,12 +253,6 @@ void __init pcibios_resource_survey(void)
  */
 fs_initcall(pcibios_assign_resources);
 
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-unsigned int pcibios_max_latency = 255;
-
 void pcibios_set_master(struct pci_dev *dev)
 {
 	u8 lat;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 466fad6..a50e643 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -88,6 +88,12 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_PERFORMANCE;
 u8 pci_dfl_cache_line_size __devinitdata = L1_CACHE_BYTES >> 2;
 u8 pci_cache_line_size;
 
+/*
+ * If we set up a device for bus mastering, we need to check the latency
+ * timer as certain BIOSes forget to set it properly.
+ */
+unsigned int pcibios_max_latency = 255;
+
 /**
  * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children
  * @bus: pointer to PCI bus structure to search
@@ -2590,6 +2596,29 @@ static void __pci_set_master(struct pci_dev *dev, bool enable)
 }
 
 /**
+ * pcibios_set_master - enable PCI bus-mastering for device dev
+ * @dev: the PCI device to enable
+ *
+ * Enables PCI bus-mastering for the device.  This is the default
+ * implementation.  Architecture specific implementations can override
+ * this if necessary.
+ */
+void __weak pcibios_set_master(struct pci_dev *dev)
+{
+	u8 lat;
+
+	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
+	if (lat < 16)
+		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
+	else if (lat > pcibios_max_latency)
+		lat = pcibios_max_latency;
+	else
+		return;
+	dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat);
+	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
+}
+
+/**
  * pci_set_master - enables bus-mastering for device dev
  * @dev: the PCI device to enable
  *
diff --git a/include/linux/pci.h b/include/linux/pci.h
index abbd8b6..182b93d 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -790,8 +790,11 @@ static inline int pci_is_managed(struct pci_dev *pdev)
 }
 
 void pci_disable_device(struct pci_dev *dev);
+
+extern unsigned int pcibios_max_latency;
 void pci_set_master(struct pci_dev *dev);
 void pci_clear_master(struct pci_dev *dev);
+
 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
 int pci_set_cacheline_size(struct pci_dev *dev);
 #define HAVE_PCI_SET_MWI


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 11/16] PCI: frv: use generic pcibios_set_master()
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (9 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 10/16] PCI: Pull PCI 'latency timer' setup up into the core Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-28 21:48 ` [PATCH -v2 12/16] PCI: MIPS: " Myron Stowe
                   ` (6 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch removes frv's architecture-specific 'pcibios_set_master()'
routine and lets the default PCI core based implementation handle PCI
device 'latency timer' setup.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/frv/mb93090-mb00/pci-frv.c |   14 --------------
 1 files changed, 0 insertions(+), 14 deletions(-)

diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c
index 6a0cd64..c281217 100644
--- a/arch/frv/mb93090-mb00/pci-frv.c
+++ b/arch/frv/mb93090-mb00/pci-frv.c
@@ -194,17 +194,3 @@ void __init pcibios_resource_survey(void)
 	pcibios_allocate_resources(1);
 	pcibios_assign_resources();
 }
-
-void pcibios_set_master(struct pci_dev *dev)
-{
-	u8 lat;
-	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-	if (lat < 16)
-		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-	else if (lat > pcibios_max_latency)
-		lat = pcibios_max_latency;
-	else
-		return;
-	printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
-	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 12/16] PCI: MIPS: use generic pcibios_set_master()
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (10 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 11/16] PCI: frv: use generic pcibios_set_master() Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-28 21:48 ` [PATCH -v2 13/16] PCI: mn10300: " Myron Stowe
                   ` (5 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch removes mip's architecture-specific 'pcibios_set_master()'
routine and lets the default PCI core based implementation handle PCI
device 'latency timer' setup.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/mips/pci/pci.c |   15 ---------------
 1 files changed, 0 insertions(+), 15 deletions(-)

diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index a6de9b8..19cce25 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -204,21 +204,6 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask)
 	return 0;
 }
 
-void pcibios_set_master(struct pci_dev *dev)
-{
-	u8 lat;
-	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-	if (lat < 16)
-		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-	else if (lat > pcibios_max_latency)
-		lat = pcibios_max_latency;
-	else
-		return;
-	printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",
-	       pci_name(dev), lat);
-	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
-
 unsigned int pcibios_assign_all_busses(void)
 {
 	return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 13/16] PCI: mn10300: use generic pcibios_set_master()
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (11 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 12/16] PCI: MIPS: " Myron Stowe
@ 2011-10-28 21:48 ` Myron Stowe
  2011-10-28 21:49 ` [PATCH -v2 14/16] PCI: sh: " Myron Stowe
                   ` (4 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:48 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch removes mn10300's architecture-specific 'pcibios_set_master()'
routine for ASB2305 and lets the default PCI core based implementation
handle PCI device 'latency timer' setup.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/mn10300/unit-asb2305/pci-asb2305.c |   16 ----------------
 1 files changed, 0 insertions(+), 16 deletions(-)

diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c
index 2b299c4..c4e2e79 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.c
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.c
@@ -213,22 +213,6 @@ void __init pcibios_resource_survey(void)
 	pcibios_allocate_resources(1);
 }
 
-void pcibios_set_master(struct pci_dev *dev)
-{
-	u8 lat;
-
-	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-
-	if (lat < 16)
-		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-	else if (lat > pcibios_max_latency)
-		lat = pcibios_max_latency;
-	else
-		return;
-
-	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
-
 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 			enum pci_mmap_state mmap_state, int write_combine)
 {


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 14/16] PCI: sh: use generic pcibios_set_master()
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (12 preceding siblings ...)
  2011-10-28 21:48 ` [PATCH -v2 13/16] PCI: mn10300: " Myron Stowe
@ 2011-10-28 21:49 ` Myron Stowe
  2011-10-28 21:49 ` [PATCH -v2 15/16] PCI: x86: " Myron Stowe
                   ` (3 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:49 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch removes sh's architecture-specific 'pcibios_set_master()'
routine and lets the default PCI core based implementation handle PCI
device 'latency timer' setup.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/sh/drivers/pci/pci.c |   15 ---------------
 1 files changed, 0 insertions(+), 15 deletions(-)

diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index a0c92fd..280e2a1 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -242,21 +242,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
 	return pci_enable_resources(dev, mask);
 }
 
-void pcibios_set_master(struct pci_dev *dev)
-{
-	u8 lat;
-	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-	if (lat < 16)
-		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-	else if (lat > pcibios_max_latency)
-		lat = pcibios_max_latency;
-	else
-		return;
-	printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
-	       pci_name(dev), lat);
-	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
-
 void __init pcibios_update_irq(struct pci_dev *dev, int irq)
 {
 	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 15/16] PCI: x86: use generic pcibios_set_master()
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (13 preceding siblings ...)
  2011-10-28 21:49 ` [PATCH -v2 14/16] PCI: sh: " Myron Stowe
@ 2011-10-28 21:49 ` Myron Stowe
  2011-10-28 21:49 ` [PATCH -v2 16/16] PCI: latency timer doesn't apply to PCIe Myron Stowe
                   ` (2 subsequent siblings)
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:49 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

This patch removes x86's architecture-specific 'pcibios_set_master()'
routine and lets the default PCI core based implementation handle PCI
device 'latency timer' setup.

No functional change.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 arch/x86/pci/i386.c |   14 --------------
 1 files changed, 0 insertions(+), 14 deletions(-)

diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 5663bc2..463c247 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -253,20 +253,6 @@ void __init pcibios_resource_survey(void)
  */
 fs_initcall(pcibios_assign_resources);
 
-void pcibios_set_master(struct pci_dev *dev)
-{
-	u8 lat;
-	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-	if (lat < 16)
-		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-	else if (lat > pcibios_max_latency)
-		lat = pcibios_max_latency;
-	else
-		return;
-	dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat);
-	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
-
 static const struct vm_operations_struct pci_mmap_ops = {
 	.access = generic_access_phys,
 };


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH -v2 16/16] PCI: latency timer doesn't apply to PCIe
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (14 preceding siblings ...)
  2011-10-28 21:49 ` [PATCH -v2 15/16] PCI: x86: " Myron Stowe
@ 2011-10-28 21:49 ` Myron Stowe
  2011-10-29  0:46 ` [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Mike Frysinger
  2011-11-11 17:59 ` Jesse Barnes
  17 siblings, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-28 21:49 UTC (permalink / raw)
  To: jbarnes
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

From: Myron Stowe <mstowe@redhat.com>

The latency timer is read-only and hardwired to zero for all PCIe
devices, both Type 0 and Type 1, so don't bother trying to update it
and cluttering the dmesg log with meaningless "setting latency timer
to 64" messages.

Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
---

 drivers/pci/pci.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a50e643..a20c01a 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2607,6 +2607,10 @@ void __weak pcibios_set_master(struct pci_dev *dev)
 {
 	u8 lat;
 
+	/* The latency timer doesn't apply to PCIe (either Type 0 or Type 1) */
+	if (pci_is_pcie(dev))
+		return;
+
 	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
 	if (lat < 16)
 		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* Re: [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (15 preceding siblings ...)
  2011-10-28 21:49 ` [PATCH -v2 16/16] PCI: latency timer doesn't apply to PCIe Myron Stowe
@ 2011-10-29  0:46 ` Mike Frysinger
  2011-10-31 16:08   ` Myron Stowe
  2011-10-31 23:14   ` Myron Stowe
  2011-11-11 17:59 ` Jesse Barnes
  17 siblings, 2 replies; 25+ messages in thread
From: Mike Frysinger @ 2011-10-29  0:46 UTC (permalink / raw)
  To: Myron Stowe
  Cc: jbarnes, linux-pci, linux, dhowells, ysato, tony.luck,
	fenghua.yu, monstr, ralf, benh, paulus, lethal, davem, cmetcalf,
	gxt, tglx, mingo, chris, linux-kernel

On Fri, Oct 28, 2011 at 23:47, Myron Stowe wrote:
>  - * blackfin and h8300 architectures do not seem to support PCI (no
>   root bus scanning etc. exists within them) but they do have PCI header
>   files.

correct, all Blackfin parts in current mainline lack any sort of PCI
support.  the header existence (iirc) is two fold:
 - a lot of drivers like to use the pci/dma interface to manage memory
instead of a pure dma interface
 - BF535 has pci support, but we don't support that, and have largely
dropped anything related to it

so if this compile passes for Blackfin, it should be fine.  however,
i'm lazy, so i don't suppose you've got a branch somewhere for me to
pull to quickly compile test ?  if not, simply putting it into a
branch that gets into linux-next should be sufficient as i think
Stephen had Blackfin coverage in there ...
-mike

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH -v2 07/16] PCI: TILE: convert pcibios_set_master() to a non-inlined function
  2011-10-28 21:48 ` [PATCH -v2 07/16] PCI: TILE: " Myron Stowe
@ 2011-10-31 15:27   ` Chris Metcalf
  0 siblings, 0 replies; 25+ messages in thread
From: Chris Metcalf @ 2011-10-31 15:27 UTC (permalink / raw)
  To: Myron Stowe
  Cc: jbarnes, linux-pci, linux, vapier, dhowells, ysato, tony.luck,
	fenghua.yu, monstr, ralf, benh, paulus, lethal, davem, gxt, tglx,
	mingo, chris, linux-kernel

On 10/28/2011 5:48 PM, Myron Stowe wrote:
> From: Myron Stowe <mstowe@redhat.com>
>
> This patch converts TILE's architecture-specific 'pcibios_set_master()'
> routine to a non-inlined function.  This will allow follow on patches
> to create a generic 'pcibios_set_master()' function using the '__weak'
> attribute which can be used by all architectures as a default which,
> if necessary, can then be over-ridden by architecture-specific code.
>
> Converting 'pci_bios_set_master()' to a non-inlined function will
> allow TILE's 'pcibios_set_master()' implementation to remain
> architecture-specific after the generic version is introduced and
> thus, not change current behavior.
>
> No functional change.
>
> Signed-off-by: Myron Stowe <myron.stowe@redhat.com>

Acked-by: Chris Metcalf <cmetcalf@tilera.com>

-- 
Chris Metcalf, Tilera Corp.
http://www.tilera.com


^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup
  2011-10-29  0:46 ` [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Mike Frysinger
@ 2011-10-31 16:08   ` Myron Stowe
  2011-10-31 23:14   ` Myron Stowe
  1 sibling, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-31 16:08 UTC (permalink / raw)
  To: Mike Frysinger
  Cc: Myron Stowe, jbarnes, linux-pci, linux, dhowells, ysato,
	tony.luck, fenghua.yu, monstr, ralf, benh, paulus, lethal, davem,
	cmetcalf, gxt, tglx, mingo, chris, linux-kernel

On Fri, Oct 28, 2011 at 6:46 PM, Mike Frysinger <vapier@gentoo.org> wrote:
> On Fri, Oct 28, 2011 at 23:47, Myron Stowe wrote:
>>  - * blackfin and h8300 architectures do not seem to support PCI (no
>>   root bus scanning etc. exists within them) but they do have PCI header
>>   files.
>
> correct, all Blackfin parts in current mainline lack any sort of PCI
> support.  the header existence (iirc) is two fold:
>  - a lot of drivers like to use the pci/dma interface to manage memory
> instead of a pure dma interface
>  - BF535 has pci support, but we don't support that, and have largely
> dropped anything related to it
>
> so if this compile passes for Blackfin, it should be fine.  however,
> i'm lazy, so i don't suppose you've got a branch somewhere for me to
> pull to quickly compile test ?  if not, simply putting it into a
> branch that gets into linux-next should be sufficient as i think
> Stephen had Blackfin coverage in there ...

Hi Mike,

Don't blame you for being lazy, maintainership is not a fun task.  I do not
have a cross compile environment so could not compile test Blackfin so
I really would be interested in such.  I don't want to rely on linux-next if at
all possible as I already tried that once - unsuccessfully.

The three architectures I would really like to get compile tested and feedback
from the maintainers are: ARM, Blackfin, and H3/800.  To compile test
Blackfin would only require pulling in patches 01/16 and 10/16 (which would
be the same for H3/800) so if that wouldn't be too much of a pain I would really
appreciate it.  I do not have a branch from which you could pull but I
am willing
to look into such and give it a try.

Myron


> -mike
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup
  2011-10-29  0:46 ` [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Mike Frysinger
  2011-10-31 16:08   ` Myron Stowe
@ 2011-10-31 23:14   ` Myron Stowe
  1 sibling, 0 replies; 25+ messages in thread
From: Myron Stowe @ 2011-10-31 23:14 UTC (permalink / raw)
  To: Mike Frysinger
  Cc: Myron Stowe, jbarnes, linux-pci, linux, dhowells, ysato,
	tony.luck, fenghua.yu, monstr, ralf, benh, paulus, lethal, davem,
	cmetcalf, gxt, tglx, mingo, chris, linux-kernel

On Fri, Oct 28, 2011 at 6:46 PM, Mike Frysinger <vapier@gentoo.org> wrote:
> On Fri, Oct 28, 2011 at 23:47, Myron Stowe wrote:
>>  - * blackfin and h8300 architectures do not seem to support PCI (no
>>   root bus scanning etc. exists within them) but they do have PCI header
>>   files.
>
> correct, all Blackfin parts in current mainline lack any sort of PCI
> support.  the header existence (iirc) is two fold:
>  - a lot of drivers like to use the pci/dma interface to manage memory
> instead of a pure dma interface
>  - BF535 has pci support, but we don't support that, and have largely
> dropped anything related to it
>
> so if this compile passes for Blackfin, it should be fine.  however,
> i'm lazy, so i don't suppose you've got a branch somewhere for me to
> pull to quickly compile test ?

I created a 'pci-latency-v2' branch at git://github.com/myron-stowe/linux.git
that maintainers of the various architectures can use to pull from for a compile
test of this patch series.

Myron

>  if not, simply putting it into a
> branch that gets into linux-next should be sufficient as i think
> Stephen had Blackfin coverage in there ...
> -mike
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup
  2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
                   ` (16 preceding siblings ...)
  2011-10-29  0:46 ` [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Mike Frysinger
@ 2011-11-11 17:59 ` Jesse Barnes
  2011-11-15 22:43   ` Benjamin Herrenschmidt
  17 siblings, 1 reply; 25+ messages in thread
From: Jesse Barnes @ 2011-11-11 17:59 UTC (permalink / raw)
  To: Myron Stowe
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 1041 bytes --]

On Fri, 28 Oct 2011 15:47:26 -0600
Myron Stowe <myron.stowe@redhat.com> wrote:

> The 'latency timer' of PCI devices, both Type 0 and Type 1,
> is setup in architecture-specific code [see: pcibios_set_master()].
> There are two approaches being taken by all the architectures - check
> if the 'latency timer' is currently set between 16 and 255 and if not
> bring it within bounds, or, do nothing (and then there is the
> gratuitously different parisc implementation).
> 
> There is nothing architecture-specific about PCI's 'latency timer' so
> this patch pulls the setup functionality up into the PCI core by
> creating a generic 'pcibios_set_master()' function using the '__weak'
> attribute which can be used by all architectures as a default which,
> if necessary, can then be over-ridden by architecture-specific code.

I have acks from Chris, Ralf, and Mike.  Any other arch maintainers
want to ack or nack this before it goes into my -next branch?

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup
  2011-11-11 17:59 ` Jesse Barnes
@ 2011-11-15 22:43   ` Benjamin Herrenschmidt
  0 siblings, 0 replies; 25+ messages in thread
From: Benjamin Herrenschmidt @ 2011-11-15 22:43 UTC (permalink / raw)
  To: Jesse Barnes
  Cc: Myron Stowe, linux-pci, linux, vapier, dhowells, ysato,
	tony.luck, fenghua.yu, monstr, ralf, paulus, lethal, davem,
	cmetcalf, gxt, tglx, mingo, chris, linux-kernel

On Fri, 2011-11-11 at 09:59 -0800, Jesse Barnes wrote:
> On Fri, 28 Oct 2011 15:47:26 -0600
> Myron Stowe <myron.stowe@redhat.com> wrote:
> 
> > The 'latency timer' of PCI devices, both Type 0 and Type 1,
> > is setup in architecture-specific code [see: pcibios_set_master()].
> > There are two approaches being taken by all the architectures - check
> > if the 'latency timer' is currently set between 16 and 255 and if not
> > bring it within bounds, or, do nothing (and then there is the
> > gratuitously different parisc implementation).
> > 
> > There is nothing architecture-specific about PCI's 'latency timer' so
> > this patch pulls the setup functionality up into the PCI core by
> > creating a generic 'pcibios_set_master()' function using the '__weak'
> > attribute which can be used by all architectures as a default which,
> > if necessary, can then be over-ridden by architecture-specific code.
> 
> I have acks from Chris, Ralf, and Mike.  Any other arch maintainers
> want to ack or nack this before it goes into my -next branch?

I somewhat missed the original patch. As long as it's a nop for ppc, I
don't care tho :-)

Cheers,
Ben.



^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH -v2 01/16] PCI: add declaration for pcibios_set_master() to pci core
  2011-10-28 21:47 ` [PATCH -v2 01/16] PCI: add declaration for pcibios_set_master() to pci core Myron Stowe
@ 2011-12-05 19:06   ` Jesse Barnes
  2011-12-05 20:32     ` Benjamin Herrenschmidt
  0 siblings, 1 reply; 25+ messages in thread
From: Jesse Barnes @ 2011-12-05 19:06 UTC (permalink / raw)
  To: Myron Stowe
  Cc: linux-pci, linux, vapier, dhowells, ysato, tony.luck, fenghua.yu,
	monstr, ralf, benh, paulus, lethal, davem, cmetcalf, gxt, tglx,
	mingo, chris, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 832 bytes --]

On Fri, 28 Oct 2011 15:47:35 -0600
Myron Stowe <myron.stowe@redhat.com> wrote:

> From: Myron Stowe <mstowe@redhat.com>
> 
> Currently, pcibios_set_master() is implemented in architecture-
> specific code.  There is nothing architecture-specific about PCI's
> 'latency timer'.
> 
> This patch adds a declaration for pcibios_set_master() to PCI's core
> in preperation for pulling the function itself up into the core.
> Without the addition of this declaration, subsequent patches that
> remove inline definitions of pcibios_set_master() would be removing
> the only declaration of such.
> 
> No functional change.
> 
> Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
> ---

Ok this series is in -next.  Let's see what breaks this time. :)

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH -v2 01/16] PCI: add declaration for pcibios_set_master() to pci core
  2011-12-05 19:06   ` Jesse Barnes
@ 2011-12-05 20:32     ` Benjamin Herrenschmidt
  0 siblings, 0 replies; 25+ messages in thread
From: Benjamin Herrenschmidt @ 2011-12-05 20:32 UTC (permalink / raw)
  To: Jesse Barnes
  Cc: Myron Stowe, linux-pci, linux, vapier, dhowells, ysato,
	tony.luck, fenghua.yu, monstr, ralf, paulus, lethal, davem,
	cmetcalf, gxt, tglx, mingo, chris, linux-kernel

On Mon, 2011-12-05 at 11:06 -0800, Jesse Barnes wrote:
> On Fri, 28 Oct 2011 15:47:35 -0600
> Myron Stowe <myron.stowe@redhat.com> wrote:
> 
> > From: Myron Stowe <mstowe@redhat.com>
> > 
> > Currently, pcibios_set_master() is implemented in architecture-
> > specific code.  There is nothing architecture-specific about PCI's
> > 'latency timer'.
> > 
> > This patch adds a declaration for pcibios_set_master() to PCI's core
> > in preperation for pulling the function itself up into the core.
> > Without the addition of this declaration, subsequent patches that
> > remove inline definitions of pcibios_set_master() would be removing
> > the only declaration of such.
> > 
> > No functional change.
> > 
> > Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
> > ---
> 
> Ok this series is in -next.  Let's see what breaks this time. :)

On the other hand...

One thing that annoys the sh*it out of me is that I cannot use
pcibios_set_master() to establish the DMA/iommu resources for a device,
because set_dma_mask() will be called -after- set_master(), thus I need
to provision every device with 32-bit DMA resources (which can be quite
scarse) just in case the driver doesn't later call set_dma_mask(64-bit).

If only we could reverse the call order... lots of drivers to fix
unfortunately.

In which case I -would- hook into pcibios_set_master()...

Cheers,
Ben.



^ permalink raw reply	[flat|nested] 25+ messages in thread

end of thread, other threads:[~2011-12-05 20:33 UTC | newest]

Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-10-28 21:47 [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Myron Stowe
2011-10-28 21:47 ` [PATCH -v2 01/16] PCI: add declaration for pcibios_set_master() to pci core Myron Stowe
2011-12-05 19:06   ` Jesse Barnes
2011-12-05 20:32     ` Benjamin Herrenschmidt
2011-10-28 21:47 ` [PATCH -v2 02/16] PCI: ARM: convert pcibios_set_master() to a non-inlined function Myron Stowe
2011-10-28 21:47 ` [PATCH -v2 03/16] PCI: IA64: " Myron Stowe
2011-10-28 21:47 ` [PATCH -v2 04/16] PCI: MicroBlaze: " Myron Stowe
2011-10-28 21:48 ` [PATCH -v2 05/16] PCI: PowerPC: " Myron Stowe
2011-10-28 21:48 ` [PATCH -v2 06/16] PCI: SPARC: " Myron Stowe
2011-10-28 21:48 ` [PATCH -v2 07/16] PCI: TILE: " Myron Stowe
2011-10-31 15:27   ` Chris Metcalf
2011-10-28 21:48 ` [PATCH -v2 08/16] PCI: UniCore: " Myron Stowe
2011-10-28 21:48 ` [PATCH -v2 09/16] PCI: Xtensa: " Myron Stowe
2011-10-28 21:48 ` [PATCH -v2 10/16] PCI: Pull PCI 'latency timer' setup up into the core Myron Stowe
2011-10-28 21:48 ` [PATCH -v2 11/16] PCI: frv: use generic pcibios_set_master() Myron Stowe
2011-10-28 21:48 ` [PATCH -v2 12/16] PCI: MIPS: " Myron Stowe
2011-10-28 21:48 ` [PATCH -v2 13/16] PCI: mn10300: " Myron Stowe
2011-10-28 21:49 ` [PATCH -v2 14/16] PCI: sh: " Myron Stowe
2011-10-28 21:49 ` [PATCH -v2 15/16] PCI: x86: " Myron Stowe
2011-10-28 21:49 ` [PATCH -v2 16/16] PCI: latency timer doesn't apply to PCIe Myron Stowe
2011-10-29  0:46 ` [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup Mike Frysinger
2011-10-31 16:08   ` Myron Stowe
2011-10-31 23:14   ` Myron Stowe
2011-11-11 17:59 ` Jesse Barnes
2011-11-15 22:43   ` Benjamin Herrenschmidt

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