[PATCH] ARM: mach-shmobile: sh7372 generic suspend/resume support

[PATCH] ARM: mach-shmobile: sh7372 generic suspend/resume support

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Convert the sh7372 Core Standby code to make use
of the new generic ARM cpu suspend/resume code.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 Depends on code in the suspend branch of linux-2.6-arm git.

 arch/arm/mach-shmobile/include/mach/common.h |    3 
 arch/arm/mach-shmobile/pm-sh7372.c           |   38 +---
 arch/arm/mach-shmobile/sleep-sh7372.S        |  230 --------------------------
 3 files changed, 24 insertions(+), 247 deletions(-)

--- 0001/arch/arm/mach-shmobile/include/mach/common.h
+++ work/arch/arm/mach-shmobile/include/mach/common.h	2011-07-06 18:11:38.000000000 +0900
@@ -35,8 +35,7 @@ extern void sh7372_add_standard_devices(
 extern void sh7372_clock_init(void);
 extern void sh7372_pinmux_init(void);
 extern void sh7372_pm_init(void);
-extern void sh7372_cpu_suspend(void);
-extern void sh7372_cpu_resume(void);
+extern void sh7372_resume_core_standby(void);
 extern struct clk sh7372_extal1_clk;
 extern struct clk sh7372_extal2_clk;
 
--- 0001/arch/arm/mach-shmobile/pm-sh7372.c
+++ work/arch/arm/mach-shmobile/pm-sh7372.c	2011-07-06 18:34:40.000000000 +0900
@@ -18,6 +18,7 @@
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/tlbflush.h>
+#include <asm/suspend.h>
 #include <mach/common.h>
 
 #define SMFRAM 0xe6a70000
@@ -25,30 +26,25 @@
 #define SBAR 0xe6180020
 #define APARMBAREA 0xe6f10020
 
-static void sh7372_enter_core_standby(void)
+static int sh7372_do_idle_core_standby(unsigned long unused)
 {
-	void __iomem *smfram = (void __iomem *)SMFRAM;
-
-	__raw_writel(0, APARMBAREA); /* translate 4k */
-	__raw_writel(__pa(sh7372_cpu_resume), SBAR); /* set reset vector */
-	__raw_writel(0x10, SYSTBCR); /* enable core standby */
-
-	__raw_writel(0, smfram + 0x3c); /* clear page table address */
-
-	sh7372_cpu_suspend();
-	cpu_init();
-
-	/* if page table address is non-NULL then we have been powered down */
-	if (__raw_readl(smfram + 0x3c)) {
-		__raw_writel(__raw_readl(smfram + 0x40),
-			     __va(__raw_readl(smfram + 0x3c)));
+	cpu_do_idle(); /* WFI when SYSTBCR = 0x10 -> Core Standby */
+	return 0;
+}
 
-		flush_tlb_all();
-		set_cr(__raw_readl(smfram + 0x38));
-	}
+static void sh7372_enter_core_standby(void)
+{
+	/* set reset vector, translate 4k */
+	__raw_writel(__pa(sh7372_resume_core_standby), SBAR);
+	__raw_writel(0, APARMBAREA);
+
+	/* enter sleep mode with SYSTBCR to 0x10 */
+	__raw_writel(0x10, SYSTBCR);
+	cpu_suspend(0, sh7372_do_idle_core_standby);
+	__raw_writel(0, SYSTBCR);
 
-	__raw_writel(0, SYSTBCR); /* disable core standby */
-	__raw_writel(0, SBAR); /* disable reset vector translation */
+	 /* disable reset vector translation */
+	__raw_writel(0, SBAR);
 }
 
 #ifdef CONFIG_CPU_IDLE
--- 0001/arch/arm/mach-shmobile/sleep-sh7372.S
+++ work/arch/arm/mach-shmobile/sleep-sh7372.S	2011-07-06 18:32:44.000000000 +0900
@@ -30,231 +30,13 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/memory.h>
 #include <asm/assembler.h>
 
-#define SMFRAM 0xe6a70000
-
-	.align
-kernel_flush:
-	.word	v7_flush_dcache_all
-
-	.align	3
-ENTRY(sh7372_cpu_suspend)
-	stmfd	sp!, {r0-r12, lr}	@ save registers on stack
-
-	ldr	r8, =SMFRAM
-
-	mov	r4, sp			@ Store sp
-	mrs	r5, spsr		@ Store spsr
-	mov	r6, lr			@ Store lr
-	stmia	r8!, {r4-r6}
-
-	mrc	p15, 0, r4, c1, c0, 2	@ Coprocessor access control register
-	mrc	p15, 0, r5, c2, c0, 0	@ TTBR0
-	mrc	p15, 0, r6, c2, c0, 1	@ TTBR1
-	mrc	p15, 0, r7, c2, c0, 2	@ TTBCR
-	stmia	r8!, {r4-r7}
-
-	mrc	p15, 0, r4, c3, c0, 0	@ Domain access Control Register
-	mrc	p15, 0, r5, c10, c2, 0	@ PRRR
-	mrc	p15, 0, r6, c10, c2, 1	@ NMRR
-	stmia	r8!,{r4-r6}
-
-	mrc	p15, 0, r4, c13, c0, 1	@ Context ID
-	mrc	p15, 0, r5, c13, c0, 2	@ User r/w thread and process ID
-	mrc	p15, 0, r6, c12, c0, 0	@ Secure or NS vector base address
-	mrs	r7, cpsr		@ Store current cpsr
-	stmia	r8!, {r4-r7}
-
-	mrc	p15, 0, r4, c1, c0, 0	@ save control register
-	stmia	r8!, {r4}
-
-	/*
-	 * jump out to kernel flush routine
-	 *  - reuse that code is better
-	 *  - it executes in a cached space so is faster than refetch per-block
-	 *  - should be faster and will change with kernel
-	 *  - 'might' have to copy address, load and jump to it
-	 * Flush all data from the L1 data cache before disabling
-	 * SCTLR.C bit.
-	 */
-	ldr	r1, kernel_flush
-	mov	lr, pc
-	bx	r1
-
-	/*
-	 * Clear the SCTLR.C bit to prevent further data cache
-	 * allocation. Clearing SCTLR.C would make all the data accesses
-	 * strongly ordered and would not hit the cache.
-	 */
-	mrc	p15, 0, r0, c1, c0, 0
-	bic	r0, r0, #(1 << 2)	@ Disable the C bit
-	mcr	p15, 0, r0, c1, c0, 0
-	isb
-
-	/*
-	 * Invalidate L1 data cache. Even though only invalidate is
-	 * necessary exported flush API is used here. Doing clean
-	 * on already clean cache would be almost NOP.
-	 */
-	ldr	r1, kernel_flush
-	blx	r1
-	/*
-	 * The kernel doesn't interwork: v7_flush_dcache_all in particluar will
-	 * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled.
-	 * This sequence switches back to ARM.  Note that .align may insert a
-	 * nop: bx pc needs to be word-aligned in order to work.
-	 */
- THUMB(	.thumb		)
- THUMB(	.align		)
- THUMB(	bx	pc	)
- THUMB(	nop		)
-	.arm
-
-	/* Data memory barrier and Data sync barrier */
-	dsb
-	dmb
-
-/*
- * =================- * = WFI instruction => Enter idle =
- * =================- */
-	wfi				@ wait for interrupt
-
-/*
- * =================- * = Resume path for non-OFF modes =
- * =================- */
-	mrc	p15, 0, r0, c1, c0, 0
-	tst	r0, #(1 << 2)		@ Check C bit enabled?
-	orreq	r0, r0, #(1 << 2)	@ Enable the C bit if cleared
-	mcreq	p15, 0, r0, c1, c0, 0
-	isb
-
-/*
- * =================- * = Exit point from non-OFF modes =
- * =================- */
-	ldmfd	sp!, {r0-r12, pc}	@ restore regs and return
-
-	.pool
-
 	.align	12
 	.text
-	.global	sh7372_cpu_resume
-sh7372_cpu_resume:
-
-	mov	r1, #0
-	/*
-	 * Invalidate all instruction caches to PoU
-	 * and flush branch target cache
-	 */
-	mcr	p15, 0, r1, c7, c5, 0
-
-	ldr	r3, =SMFRAM
-
-	ldmia	r3!, {r4-r6}
-	mov	sp, r4			@ Restore sp
-	msr	spsr_cxsf, r5		@ Restore spsr
-	mov	lr, r6			@ Restore lr
-
-	ldmia	r3!, {r4-r7}
-	mcr	p15, 0, r4, c1, c0, 2	@ Coprocessor access Control Register
-	mcr	p15, 0, r5, c2, c0, 0	@ TTBR0
-	mcr	p15, 0, r6, c2, c0, 1	@ TTBR1
-	mcr	p15, 0, r7, c2, c0, 2	@ TTBCR
-
-	ldmia	r3!,{r4-r6}
-	mcr	p15, 0, r4, c3, c0, 0	@ Domain access Control Register
-	mcr	p15, 0, r5, c10, c2, 0	@ PRRR
-	mcr	p15, 0, r6, c10, c2, 1	@ NMRR
-
-	ldmia	r3!,{r4-r7}
-	mcr	p15, 0, r4, c13, c0, 1	@ Context ID
-	mcr	p15, 0, r5, c13, c0, 2	@ User r/w thread and process ID
-	mrc	p15, 0, r6, c12, c0, 0	@ Secure or NS vector base address
-	msr	cpsr, r7		@ store cpsr
-
-	/* Starting to enable MMU here */
-	mrc	p15, 0, r7, c2, c0, 2 	@ Read TTBRControl
-	/* Extract N (0:2) bits and decide whether to use TTBR0 or TTBR1 */
-	and	r7, #0x7
-	cmp	r7, #0x0
-	beq	usettbr0
-ttbr_error:
-	/*
-	 * More work needs to be done to support N[0:2] value other than 0
-	 * So looping here so that the error can be detected
-	 */
-	b	ttbr_error
-
-	.align
-cache_pred_disable_mask:
-	.word	0xFFFFE7FB
-ttbrbit_mask:
-	.word	0xFFFFC000
-table_index_mask:
-	.word	0xFFF00000
-table_entry:
-	.word	0x00000C02
-usettbr0:
-
-	mrc	p15, 0, r2, c2, c0, 0
-	ldr	r5, ttbrbit_mask
-	and	r2, r5
-	mov	r4, pc
-	ldr	r5, table_index_mask
-	and	r4, r5			@ r4 = 31 to 20 bits of pc
-	/* Extract the value to be written to table entry */
-	ldr	r6, table_entry
-	/* r6 has the value to be written to table entry */
-	add	r6, r6, r4
-	/* Getting the address of table entry to modify */
-	lsr	r4, #18
-	/* r2 has the location which needs to be modified */
-	add	r2, r4
-	ldr	r4, [r2]
-	str	r6, [r2] /* modify the table entry */
-
-	mov	r7, r6
-	mov	r5, r2
-	mov	r6, r4
-	/* r5 = original page table address */
-	/* r6 = original page table data */
-
-	mov	r0, #0
-	mcr	p15, 0, r0, c7, c5, 4	@ Flush prefetch buffer
-	mcr	p15, 0, r0, c7, c5, 6	@ Invalidate branch predictor array
-	mcr	p15, 0, r0, c8, c5, 0	@ Invalidate instruction TLB
-	mcr	p15, 0, r0, c8, c6, 0	@ Invalidate data TLB
-
-	/*
-	 * Restore control register. This enables the MMU.
-	 * The caches and prediction are not enabled here, they
-	 * will be enabled after restoring the MMU table entry.
-	 */
-	ldmia	r3!, {r4}
-	stmia	r3!, {r5} /* save original page table address */
-	stmia	r3!, {r6} /* save original page table data */
-	stmia	r3!, {r7} /* save modified page table data */
-
-	ldr	r2, cache_pred_disable_mask
-	and	r4, r2
-	mcr	p15, 0, r4, c1, c0, 0
-	dsb
-	isb
-
-	ldr     r0, =restoremmu_on
-	bx      r0
-
-/*
- * ===============
- * = Exit point from OFF mode =
- * ===============
- */
-restoremmu_on:
-
-	ldmfd	sp!, {r0-r12, pc}	@ restore regs and return
+	.global sh7372_resume_core_standby
+sh7372_resume_core_standby:
+	ldr     pc, 1f
+1:	.long   cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET

Re: [PATCH] ARM: mach-shmobile: sh7372 generic suspend/resume

[Russell King - ARM Linux]

On Thu, Jul 07, 2011 at 10:48:13PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm@opensource.se>
> 
> Convert the sh7372 Core Standby code to make use
> of the new generic ARM cpu suspend/resume code.

Thanks.  Only thing which stands out is:

> +	.global sh7372_resume_core_standby
> +sh7372_resume_core_standby:
> +	ldr     pc, 1f
> +1:	.long   cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET

Is this because sh7372_resume_core_standby must be ARM stuff, but
cpu_resume may be Thumb?

I suspect we should make cpu_resume always be ARM instructions because I'd
imagine a lot of firmware won't cope with Thumb entry.

Re: [PATCH] ARM: mach-shmobile: sh7372 generic suspend/resume support

[Magnus Damm]

On Thu, Jul 7, 2011 at 10:50 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Thu, Jul 07, 2011 at 10:48:13PM +0900, Magnus Damm wrote:
>> From: Magnus Damm <damm@opensource.se>
>>
>> Convert the sh7372 Core Standby code to make use
>> of the new generic ARM cpu suspend/resume code.
>
> Thanks.  Only thing which stands out is:
>
>> +     .global sh7372_resume_core_standby
>> +sh7372_resume_core_standby:
>> +     ldr     pc, 1f
>> +1:   .long   cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET
>
> Is this because sh7372_resume_core_standby must be ARM stuff, but
> cpu_resume may be Thumb?

That may have something to do with it, but I suspect not. Perhaps you
wonder why I'm not pointing the reset vector directly to cpu_resume()
- that's because we need the reset vector to be aligned to 4k.

> I suspect we should make cpu_resume always be ARM instructions because I'd
> imagine a lot of firmware won't cope with Thumb entry.

So I can't guarantee this is 100% true, but I strongly suspect that
the code above is what runs directly out of reset. No firmware
involved.

I simply nicked the PA->VA conversion code from the SMP entry code in headsmp.S:

	.align  12
ENTRY(shmobile_secondary_vector)
	ldr     pc, 1f
1:	.long   secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET

Any suggestions?

Thanks for your help!

/ magnus

Re: [PATCH] ARM: mach-shmobile: sh7372 generic suspend/resume

[Russell King - ARM Linux]

On Wed, Jul 13, 2011 at 08:05:04PM +0900, Magnus Damm wrote:
> On Thu, Jul 7, 2011 at 10:50 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > On Thu, Jul 07, 2011 at 10:48:13PM +0900, Magnus Damm wrote:
> >> From: Magnus Damm <damm@opensource.se>
> >>
> >> Convert the sh7372 Core Standby code to make use
> >> of the new generic ARM cpu suspend/resume code.
> >
> > Thanks.  Only thing which stands out is:
> >
> >> +     .global sh7372_resume_core_standby
> >> +sh7372_resume_core_standby:
> >> +     ldr     pc, 1f
> >> +1:   .long   cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET
> >
> > Is this because sh7372_resume_core_standby must be ARM stuff, but
> > cpu_resume may be Thumb?
> 
> That may have something to do with it, but I suspect not. Perhaps you
> wonder why I'm not pointing the reset vector directly to cpu_resume()
> - that's because we need the reset vector to be aligned to 4k.

Wouldn't a simple branch instruction do here?  Branches are relative
(within 24-bit) so you wouldn't need any games with v:p stuff.  You
may have to put that in .data so that it can reach cpu_resume if
you're using a large initramfs image.

> I simply nicked the PA->VA conversion code from the SMP entry code in headsmp.S:
> 
> 	.align  12
> ENTRY(shmobile_secondary_vector)
> 	ldr     pc, 1f
> 1:	.long   secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET
> 
> Any suggestions?

Again, a simple branch instruction should avoid the need to reference
PLAT_PHYS_OFFSET or virtual addresses.

Re: [PATCH] ARM: mach-shmobile: sh7372 generic suspend/resume support

[Magnus Damm]

On Wed, Jul 13, 2011 at 9:34 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Wed, Jul 13, 2011 at 08:05:04PM +0900, Magnus Damm wrote:
>> On Thu, Jul 7, 2011 at 10:50 PM, Russell King - ARM Linux
>> <linux@arm.linux.org.uk> wrote:
>> > On Thu, Jul 07, 2011 at 10:48:13PM +0900, Magnus Damm wrote:
>> >> From: Magnus Damm <damm@opensource.se>
>> >>
>> >> Convert the sh7372 Core Standby code to make use
>> >> of the new generic ARM cpu suspend/resume code.
>> >
>> > Thanks.  Only thing which stands out is:
>> >
>> >> +     .global sh7372_resume_core_standby
>> >> +sh7372_resume_core_standby:
>> >> +     ldr     pc, 1f
>> >> +1:   .long   cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET
>> >
>> > Is this because sh7372_resume_core_standby must be ARM stuff, but
>> > cpu_resume may be Thumb?
>>
>> That may have something to do with it, but I suspect not. Perhaps you
>> wonder why I'm not pointing the reset vector directly to cpu_resume()
>> - that's because we need the reset vector to be aligned to 4k.
>
> Wouldn't a simple branch instruction do here?  Branches are relative
> (within 24-bit) so you wouldn't need any games with v:p stuff.  You
> may have to put that in .data so that it can reach cpu_resume if
> you're using a large initramfs image.

Thanks, your suggestion certainly makes sense. I vaguely recall that i
actually tried a regular branch instruction before by myself, but
giving up since I couldn't get it to work for some unknown reason.

So after spending a few more minutes digging deeper this time it seems
that the PC value is not setup properly. Not what I expected - the CPU
starts executing at the specified reset vector but if I read out the
PC value with the first instruction i get this:

pc = 0x00000008

I expect it to be 0x404d2008 which is the reset vector 0x404d2000 plus 8.

No wonder the relative jump doesn't work.

I know that there is some magic remapping hardware that implements the
reset translation logic. Perhaps the CPU core itself still believes it
executes starting from 0 but some bus logic converts that to whatever
is specified in the reset vector register. That theory makes sense
since the hardware also allows you to specify the size of the
translated area.

So with that in mind I'd prefer to keep the code as-is. Unless you
have any suggestion how to deal with this in a better way... =)

Thanks,

/ magnus

[PATCH] ARM: mach-shmobile: sh7372 generic board support via DT V2

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Add generic DT board support for the sh7372 SoC V2.

SCIF serial ports and timers are kept as regular
platform devices. Other on-chip and on-board devices
should be configured via the device tree.

Tested on the mackerel board via kexec using a zImage
kernel with an appended dtb.

At this point there is no interrupt controller support
in place but such code will be added over time when
proper IRQ domain support has been added to INTC.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 Changes since V2:
 - added sh7372.dtsi
 - make use of of_platform_populate
 - set ->nr_irqs to NR_IRQS_LEGACY

 Depends on the recently posted series:
 "[PATCH 00/06] mach-shmobile device tree preparation patches"

 arch/arm/boot/dts/sh7372.dtsi         |   21 ++++++++++++++
 arch/arm/mach-shmobile/setup-sh7372.c |   48 +++++++++++++++++++++++++++++++++
 2 files changed, 69 insertions(+)

--- /dev/null
+++ work/arch/arm/boot/dts/sh7372.dtsi	2012-03-28 15:44:09.000000000 +0900
@@ -0,0 +1,21 @@
+/*
+ * Device Tree Source for the sh7372 SoC
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "renesas,sh7372";
+
+	cpus {
+		cpu@0 {
+			compatible = "arm,cortex-a8";
+		};
+	};
+};
--- 0001/arch/arm/mach-shmobile/setup-sh7372.c
+++ work/arch/arm/mach-shmobile/setup-sh7372.c	2012-03-28 10:44:37.000000000 +0900
@@ -22,6 +22,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/platform_device.h>
+#include <linux/of_platform.h>
 #include <linux/uio_driver.h>
 #include <linux/delay.h>
 #include <linux/input.h>
@@ -1082,3 +1083,50 @@ void __init sh7372_add_early_devices(voi
 	/* override timer setup with soc-specific code */
 	shmobile_timer.init = sh7372_earlytimer_init;
 }
+
+#ifdef CONFIG_USE_OF
+
+void __init sh7372_add_early_devices_dt(void)
+{
+	shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
+
+	early_platform_add_devices(sh7372_early_devices,
+				   ARRAY_SIZE(sh7372_early_devices));
+
+	/* setup early console here as well */
+	shmobile_setup_console();
+}
+
+static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {
+	{ }
+};
+
+void __init sh7372_add_standard_devices_dt(void)
+{
+	/* clocks are setup late during boot in the case of DT */
+	sh7372_clock_init();
+
+	platform_add_devices(sh7372_early_devices,
+			    ARRAY_SIZE(sh7372_early_devices));
+
+	of_platform_populate(NULL, of_default_bus_match_table,
+			     sh7372_auxdata_lookup, NULL);
+}
+
+static const char *sh7372_boards_compat_dt[] __initdata = {
+	"renesas,sh7372",
+	NULL,
+};
+
+DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
+	.map_io		= sh7372_map_io,
+	.init_early	= sh7372_add_early_devices_dt,
+	.nr_irqs	= NR_IRQS_LEGACY,
+	.init_irq	= sh7372_init_irq,
+	.handle_irq	= shmobile_handle_irq_intc,
+	.init_machine	= sh7372_add_standard_devices_dt,
+	.timer		= &shmobile_timer,
+	.dt_compat	= sh7372_boards_compat_dt,
+MACHINE_END
+
+#endif /* CONFIG_USE_OF */

Re: [PATCH] ARM: mach-shmobile: sh7372 generic board support via DT V2

[Rafael J. Wysocki]

Hi,

On Wednesday, March 28, 2012, Magnus Damm wrote:
> From: Magnus Damm <damm@opensource.se>
> 
> Add generic DT board support for the sh7372 SoC V2.
> 
> SCIF serial ports and timers are kept as regular
> platform devices. Other on-chip and on-board devices
> should be configured via the device tree.
> 
> Tested on the mackerel board via kexec using a zImage
> kernel with an appended dtb.
> 
> At this point there is no interrupt controller support
> in place but such code will be added over time when
> proper IRQ domain support has been added to INTC.
> 
> Signed-off-by: Magnus Damm <damm@opensource.se>

My understanding is that this patch along with the
"[PATCH 00/06] mach-shmobile device tree preparation patches V2" series is
sufficient for preliminary support of device trees on sh7372.  For this
reason, I have put those patches into the dt branch at:

git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas.git

However, the branch is based on v3.3 final, so I've had to rebase two patches
on top of it.  Magnus, can you please double check if the commits look good?

Arnd, if Magnus confirms that the commits are correct, would you mind if I sent
a pull request to you with that material during the present merge window?

Rafael


> ---
> 
>  Changes since V2:
>  - added sh7372.dtsi
>  - make use of of_platform_populate
>  - set ->nr_irqs to NR_IRQS_LEGACY
> 
>  Depends on the recently posted series:
>  "[PATCH 00/06] mach-shmobile device tree preparation patches"
> 
>  arch/arm/boot/dts/sh7372.dtsi         |   21 ++++++++++++++
>  arch/arm/mach-shmobile/setup-sh7372.c |   48 +++++++++++++++++++++++++++++++++
>  2 files changed, 69 insertions(+)
> 
> --- /dev/null
> +++ work/arch/arm/boot/dts/sh7372.dtsi	2012-03-28 15:44:09.000000000 +0900
> @@ -0,0 +1,21 @@
> +/*
> + * Device Tree Source for the sh7372 SoC
> + *
> + * Copyright (C) 2012 Renesas Solutions Corp.
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2.  This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	compatible = "renesas,sh7372";
> +
> +	cpus {
> +		cpu@0 {
> +			compatible = "arm,cortex-a8";
> +		};
> +	};
> +};
> --- 0001/arch/arm/mach-shmobile/setup-sh7372.c
> +++ work/arch/arm/mach-shmobile/setup-sh7372.c	2012-03-28 10:44:37.000000000 +0900
> @@ -22,6 +22,7 @@
>  #include <linux/interrupt.h>
>  #include <linux/irq.h>
>  #include <linux/platform_device.h>
> +#include <linux/of_platform.h>
>  #include <linux/uio_driver.h>
>  #include <linux/delay.h>
>  #include <linux/input.h>
> @@ -1082,3 +1083,50 @@ void __init sh7372_add_early_devices(voi
>  	/* override timer setup with soc-specific code */
>  	shmobile_timer.init = sh7372_earlytimer_init;
>  }
> +
> +#ifdef CONFIG_USE_OF
> +
> +void __init sh7372_add_early_devices_dt(void)
> +{
> +	shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
> +
> +	early_platform_add_devices(sh7372_early_devices,
> +				   ARRAY_SIZE(sh7372_early_devices));
> +
> +	/* setup early console here as well */
> +	shmobile_setup_console();
> +}
> +
> +static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {
> +	{ }
> +};
> +
> +void __init sh7372_add_standard_devices_dt(void)
> +{
> +	/* clocks are setup late during boot in the case of DT */
> +	sh7372_clock_init();
> +
> +	platform_add_devices(sh7372_early_devices,
> +			    ARRAY_SIZE(sh7372_early_devices));
> +
> +	of_platform_populate(NULL, of_default_bus_match_table,
> +			     sh7372_auxdata_lookup, NULL);
> +}
> +
> +static const char *sh7372_boards_compat_dt[] __initdata = {
> +	"renesas,sh7372",
> +	NULL,
> +};
> +
> +DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
> +	.map_io		= sh7372_map_io,
> +	.init_early	= sh7372_add_early_devices_dt,
> +	.nr_irqs	= NR_IRQS_LEGACY,
> +	.init_irq	= sh7372_init_irq,
> +	.handle_irq	= shmobile_handle_irq_intc,
> +	.init_machine	= sh7372_add_standard_devices_dt,
> +	.timer		= &shmobile_timer,
> +	.dt_compat	= sh7372_boards_compat_dt,
> +MACHINE_END
> +
> +#endif /* CONFIG_USE_OF */
> 
> 

Re: [PATCH] ARM: mach-shmobile: sh7372 generic board support via DT V2

[Magnus Damm]

Hello Rafael,

2012/3/29 Rafael J. Wysocki <rjw@sisk.pl>:
> Hi,
>
> On Wednesday, March 28, 2012, Magnus Damm wrote:
>> From: Magnus Damm <damm@opensource.se>
>>
>> Add generic DT board support for the sh7372 SoC V2.
>>
>> SCIF serial ports and timers are kept as regular
>> platform devices. Other on-chip and on-board devices
>> should be configured via the device tree.
>>
>> Tested on the mackerel board via kexec using a zImage
>> kernel with an appended dtb.
>>
>> At this point there is no interrupt controller support
>> in place but such code will be added over time when
>> proper IRQ domain support has been added to INTC.
>>
>> Signed-off-by: Magnus Damm <damm@opensource.se>
>
> My understanding is that this patch along with the
> "[PATCH 00/06] mach-shmobile device tree preparation patches V2" series is
> sufficient for preliminary support of device trees on sh7372.  For this
> reason, I have put those patches into the dt branch at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas.git

Great, thanks for your help!

> However, the branch is based on v3.3 final, so I've had to rebase two patches
> on top of it.  Magnus, can you please double check if the commits look good?

Sorry, it does not seem ok. This patch and the earlier series "[PATCH
00/06] mach-shmobile device tree preparation patches V2" were built on
top of the renesas git tree commit
a6e24019468009a21b674e392d74283a90f415dd (origin/master at the
moment). Using v3.3 final will not work due to missing patches.

The following log shows the first 3 commits in origin/master and
origin/dt for arch/arm/mach-shmobile/setup-sh7372.c:

damm@w520 ~/git/renesas $ git log --oneline origin/master
arch/arm/mach-shmobile/setup-sh7372.c | head -n 3
17254bf ARM: mach-shmobile: sh7372, AP4EVB and Mackerel timer rework
5d7220ec ARM: mach-shmobile: sh7372 map_io and init_early update
c8ddf03 ARM: mach-shmobile: both USB DMAC instances on sh7372 are slave-only
damm@w520 ~/git/renesas $ git log --oneline origin/dt
arch/arm/mach-shmobile/setup-sh7372.c | head -n 3
71f5ef5 ARM: mach-shmobile: sh7372 generic board support via DT V2
c8ddf03 ARM: mach-shmobile: both USB DMAC instances on sh7372 are slave-only
57f2685 Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
damm@w520 ~/git/renesas $

The patches "ARM: mach-shmobile: sh7372, AP4EVB and Mackerel timer
rework" and "ARM: mach-shmobile: sh7372 map_io and init_early update"
and all their dependencies are needed, so please base on your current
origin/master to avoid the following errors:

arch/arm/mach-shmobile/setup-sh7372.c: In function
'sh7372_add_early_devices_dt':
arch/arm/mach-shmobile/setup-sh7372.c:1059:2: error: implicit
declaration of function 'shmobile_setup_delay'
arch/arm/mach-shmobile/setup-sh7372.c:1065:2: error: implicit
declaration of function 'shmobile_setup_console'
arch/arm/mach-shmobile/setup-sh7372.c: In function
'sh7372_add_standard_devices_dt':
arch/arm/mach-shmobile/setup-sh7372.c:1075:2: error: implicit
declaration of function 'sh7372_clock_init'
arch/arm/mach-shmobile/setup-sh7372.c: At top level:
arch/arm/mach-shmobile/setup-sh7372.c:1090:12: error: 'sh7372_map_io'
undeclared here (not in a function)
arch/arm/mach-shmobile/setup-sh7372.c:1093:14: error:
'sh7372_init_irq' undeclared here (not in a function)
arch/arm/mach-shmobile/setup-sh7372.c:1094:16: error:
'shmobile_handle_irq_intc' undeclared here (not in a function)
arch/arm/mach-shmobile/setup-sh7372.c:1096:12: error: 'shmobile_timer'
undeclared here (not in a function)
make[1]: *** [arch/arm/mach-shmobile/setup-sh7372.o] Error 1
make: *** [arch/arm/mach-shmobile] Error 2

Thanks,

/ magnus

Re: [PATCH] ARM: mach-shmobile: sh7372 generic board support via DT V2

[Rafael J. Wysocki]

On Thursday, March 29, 2012, Magnus Damm wrote:
> Hello Rafael,
> 
> 2012/3/29 Rafael J. Wysocki <rjw@sisk.pl>:
> > Hi,
> >
> > On Wednesday, March 28, 2012, Magnus Damm wrote:
> >> From: Magnus Damm <damm@opensource.se>
> >>
> >> Add generic DT board support for the sh7372 SoC V2.
> >>
> >> SCIF serial ports and timers are kept as regular
> >> platform devices. Other on-chip and on-board devices
> >> should be configured via the device tree.
> >>
> >> Tested on the mackerel board via kexec using a zImage
> >> kernel with an appended dtb.
> >>
> >> At this point there is no interrupt controller support
> >> in place but such code will be added over time when
> >> proper IRQ domain support has been added to INTC.
> >>
> >> Signed-off-by: Magnus Damm <damm@opensource.se>
> >
> > My understanding is that this patch along with the
> > "[PATCH 00/06] mach-shmobile device tree preparation patches V2" series is
> > sufficient for preliminary support of device trees on sh7372.  For this
> > reason, I have put those patches into the dt branch at:
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas.git
> 
> Great, thanks for your help!
> 
> > However, the branch is based on v3.3 final, so I've had to rebase two patches
> > on top of it.  Magnus, can you please double check if the commits look good?
> 
> Sorry, it does not seem ok. This patch and the earlier series "[PATCH
> 00/06] mach-shmobile device tree preparation patches V2" were built on
> top of the renesas git tree commit
> a6e24019468009a21b674e392d74283a90f415dd (origin/master at the
> moment). Using v3.3 final will not work due to missing patches.
> 
> The following log shows the first 3 commits in origin/master and
> origin/dt for arch/arm/mach-shmobile/setup-sh7372.c:
> 
> damm@w520 ~/git/renesas $ git log --oneline origin/master
> arch/arm/mach-shmobile/setup-sh7372.c | head -n 3
> 17254bf ARM: mach-shmobile: sh7372, AP4EVB and Mackerel timer rework
> 5d7220ec ARM: mach-shmobile: sh7372 map_io and init_early update
> c8ddf03 ARM: mach-shmobile: both USB DMAC instances on sh7372 are slave-only
> damm@w520 ~/git/renesas $ git log --oneline origin/dt
> arch/arm/mach-shmobile/setup-sh7372.c | head -n 3
> 71f5ef5 ARM: mach-shmobile: sh7372 generic board support via DT V2
> c8ddf03 ARM: mach-shmobile: both USB DMAC instances on sh7372 are slave-only
> 57f2685 Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
> damm@w520 ~/git/renesas $
> 
> The patches "ARM: mach-shmobile: sh7372, AP4EVB and Mackerel timer
> rework" and "ARM: mach-shmobile: sh7372 map_io and init_early update"
> and all their dependencies are needed, so please base on your current
> origin/master to avoid the following errors:
> 
> arch/arm/mach-shmobile/setup-sh7372.c: In function
> 'sh7372_add_early_devices_dt':
> arch/arm/mach-shmobile/setup-sh7372.c:1059:2: error: implicit
> declaration of function 'shmobile_setup_delay'
> arch/arm/mach-shmobile/setup-sh7372.c:1065:2: error: implicit
> declaration of function 'shmobile_setup_console'
> arch/arm/mach-shmobile/setup-sh7372.c: In function
> 'sh7372_add_standard_devices_dt':
> arch/arm/mach-shmobile/setup-sh7372.c:1075:2: error: implicit
> declaration of function 'sh7372_clock_init'
> arch/arm/mach-shmobile/setup-sh7372.c: At top level:
> arch/arm/mach-shmobile/setup-sh7372.c:1090:12: error: 'sh7372_map_io'
> undeclared here (not in a function)
> arch/arm/mach-shmobile/setup-sh7372.c:1093:14: error:
> 'sh7372_init_irq' undeclared here (not in a function)
> arch/arm/mach-shmobile/setup-sh7372.c:1094:16: error:
> 'shmobile_handle_irq_intc' undeclared here (not in a function)
> arch/arm/mach-shmobile/setup-sh7372.c:1096:12: error: 'shmobile_timer'
> undeclared here (not in a function)
> make[1]: *** [arch/arm/mach-shmobile/setup-sh7372.o] Error 1
> make: *** [arch/arm/mach-shmobile] Error 2

OK

So I'll need to rebase the dt branch on top of 3.4-rc1 when it is out.
I think that should resolve the problems, is that correct?

Rafael

Re: [PATCH] ARM: mach-shmobile: sh7372 generic board support via DT V2

[Magnus Damm]

On Fri, Mar 30, 2012 at 5:40 AM, Rafael J. Wysocki <rjw@sisk.pl> wrote:
> On Thursday, March 29, 2012, Magnus Damm wrote:
>> Hello Rafael,
>>
>> 2012/3/29 Rafael J. Wysocki <rjw@sisk.pl>:
>> > Hi,
>> >
>> > On Wednesday, March 28, 2012, Magnus Damm wrote:
>> >> From: Magnus Damm <damm@opensource.se>
>> >>
>> >> Add generic DT board support for the sh7372 SoC V2.
>> >>
>> >> SCIF serial ports and timers are kept as regular
>> >> platform devices. Other on-chip and on-board devices
>> >> should be configured via the device tree.
>> >>
>> >> Tested on the mackerel board via kexec using a zImage
>> >> kernel with an appended dtb.
>> >>
>> >> At this point there is no interrupt controller support
>> >> in place but such code will be added over time when
>> >> proper IRQ domain support has been added to INTC.
>> >>
>> >> Signed-off-by: Magnus Damm <damm@opensource.se>
>> >
>> > My understanding is that this patch along with the
>> > "[PATCH 00/06] mach-shmobile device tree preparation patches V2" series is
>> > sufficient for preliminary support of device trees on sh7372.  For this
>> > reason, I have put those patches into the dt branch at:
>> >
>> > git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas.git
>>
>> Great, thanks for your help!
>>
>> > However, the branch is based on v3.3 final, so I've had to rebase two patches
>> > on top of it.  Magnus, can you please double check if the commits look good?
>>
>> Sorry, it does not seem ok. This patch and the earlier series "[PATCH
>> 00/06] mach-shmobile device tree preparation patches V2" were built on
>> top of the renesas git tree commit
>> a6e24019468009a21b674e392d74283a90f415dd (origin/master at the
>> moment). Using v3.3 final will not work due to missing patches.
>>
>> The following log shows the first 3 commits in origin/master and
>> origin/dt for arch/arm/mach-shmobile/setup-sh7372.c:
>>
>> damm@w520 ~/git/renesas $ git log --oneline origin/master
>> arch/arm/mach-shmobile/setup-sh7372.c | head -n 3
>> 17254bf ARM: mach-shmobile: sh7372, AP4EVB and Mackerel timer rework
>> 5d7220ec ARM: mach-shmobile: sh7372 map_io and init_early update
>> c8ddf03 ARM: mach-shmobile: both USB DMAC instances on sh7372 are slave-only
>> damm@w520 ~/git/renesas $ git log --oneline origin/dt
>> arch/arm/mach-shmobile/setup-sh7372.c | head -n 3
>> 71f5ef5 ARM: mach-shmobile: sh7372 generic board support via DT V2
>> c8ddf03 ARM: mach-shmobile: both USB DMAC instances on sh7372 are slave-only
>> 57f2685 Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
>> damm@w520 ~/git/renesas $
>>
>> The patches "ARM: mach-shmobile: sh7372, AP4EVB and Mackerel timer
>> rework" and "ARM: mach-shmobile: sh7372 map_io and init_early update"
>> and all their dependencies are needed, so please base on your current
>> origin/master to avoid the following errors:
>>
>> arch/arm/mach-shmobile/setup-sh7372.c: In function
>> 'sh7372_add_early_devices_dt':
>> arch/arm/mach-shmobile/setup-sh7372.c:1059:2: error: implicit
>> declaration of function 'shmobile_setup_delay'
>> arch/arm/mach-shmobile/setup-sh7372.c:1065:2: error: implicit
>> declaration of function 'shmobile_setup_console'
>> arch/arm/mach-shmobile/setup-sh7372.c: In function
>> 'sh7372_add_standard_devices_dt':
>> arch/arm/mach-shmobile/setup-sh7372.c:1075:2: error: implicit
>> declaration of function 'sh7372_clock_init'
>> arch/arm/mach-shmobile/setup-sh7372.c: At top level:
>> arch/arm/mach-shmobile/setup-sh7372.c:1090:12: error: 'sh7372_map_io'
>> undeclared here (not in a function)
>> arch/arm/mach-shmobile/setup-sh7372.c:1093:14: error:
>> 'sh7372_init_irq' undeclared here (not in a function)
>> arch/arm/mach-shmobile/setup-sh7372.c:1094:16: error:
>> 'shmobile_handle_irq_intc' undeclared here (not in a function)
>> arch/arm/mach-shmobile/setup-sh7372.c:1096:12: error: 'shmobile_timer'
>> undeclared here (not in a function)
>> make[1]: *** [arch/arm/mach-shmobile/setup-sh7372.o] Error 1
>> make: *** [arch/arm/mach-shmobile] Error 2
>
> OK
>
> So I'll need to rebase the dt branch on top of 3.4-rc1 when it is out.
> I think that should resolve the problems, is that correct?

Yes, since the dependencies are fulfilled at this moment I believe
that they also will be ok by then. =)

Thanks!

/ magnus