* [U-Boot] [PATCH 00/11] MIPS: fixes and updates
@ 2011-11-24 13:57 Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean Daniel Schwierzeck
` (11 more replies)
0 siblings, 12 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
This series contains bugfixes and coding style cleanups.
Furthermore it contains some extensions for MIPS24k and MIPS34k cores
as preparation for merging the support for various Lantiq SoCs.
Daniel Schwierzeck (11):
MIPS: board.c: make checkpatch.pl clean
MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined
MIPS: board.c: fix init of flash data in bd_info
MIPS: add register definition for EBase register
MIPS: add sleep handler for slave CPUs in multi-processor systems
MIPS: make cache operation mode configurable in dcache_enable()
MIPS: extend cache initialization for MIPS24K and MIPS34K cores
MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores
MIPS: add header file for generic GPIO API
MIPS: add init hook for CPU specific initialization
MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
MAKEALL | 11 +---
arch/mips/cpu/mips32/cache.S | 24 ++++++-
arch/mips/cpu/mips32/start.S | 37 ++++++++++-
arch/mips/include/asm/gpio.h | 13 ++++
arch/mips/include/asm/mipsregs.h | 20 ++++++
arch/mips/lib/board.c | 139 +++++++++++++++++++++-----------------
6 files changed, 171 insertions(+), 73 deletions(-)
create mode 100644 arch/mips/include/asm/gpio.h
--
1.7.7.2
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:38 ` Marek Vasut
` (2 more replies)
2011-11-24 13:57 ` [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined Daniel Schwierzeck
` (10 subsequent siblings)
11 siblings, 3 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
WARNING: line over 80 characters
WARNING: space prohibited between function name and open parenthesis '('
WARNING: braces {} are not necessary for single statement blocks
ERROR: return is not a function, parentheses are not required
ERROR: do not use assignment in if condition
ERROR: trailing statements should be on next line
ERROR: "foo * bar" should be "foo *bar"
ERROR: spaces required around that ':' (ctx:WxV)
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/lib/board.c | 119 +++++++++++++++++++++++++------------------------
1 files changed, 61 insertions(+), 58 deletions(-)
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index 1274d63..9585db7 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -64,42 +64,43 @@ int __board_early_init_f(void)
*/
return 0;
}
-int board_early_init_f(void) __attribute__((weak, alias("__board_early_init_f")));
+int board_early_init_f(void)
+ __attribute__((weak, alias("__board_early_init_f")));
-static int init_func_ram (void)
+static int init_func_ram(void)
{
#ifdef CONFIG_BOARD_TYPES
int board_type = gd->board_type;
#else
int board_type = 0; /* use dummy arg */
#endif
- puts ("DRAM: ");
+ puts("DRAM: ");
- if ((gd->ram_size = initdram (board_type)) > 0) {
- print_size (gd->ram_size, "\n");
- return (0);
+ gd->ram_size = initdram(board_type);
+ if (gd->ram_size) {
+ print_size(gd->ram_size, "\n");
+ return 0;
}
- puts (failed);
- return (1);
+ puts(failed);
+ return 1;
}
static int display_banner(void)
{
-
- printf ("\n\n%s\n\n", version_string);
- return (0);
+ printf("\n\n%s\n\n", version_string);
+ return 0;
}
#ifndef CONFIG_SYS_NO_FLASH
static void display_flash_config(ulong size)
{
- puts ("Flash: ");
- print_size (size, "\n");
+ puts("Flash: ");
+ print_size(size, "\n");
}
#endif
-static int init_baudrate (void)
+static int init_baudrate(void)
{
gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
return 0;
@@ -133,7 +134,8 @@ init_fnc_t *init_sequence[] = {
timer_init,
env_init, /* initialize environment */
#ifdef CONFIG_INCA_IP
- incaip_set_cpuclk, /* set cpu clock according to environment variable */
+ /* set cpu clock according to environment variable */
+ incaip_set_cpuclk,
#endif
init_baudrate, /* initialze baudrate settings */
serial_init, /* serial communications setup */
@@ -153,18 +155,19 @@ void board_init_f(ulong bootflag)
ulong addr, addr_sp, len = (ulong)&uboot_end - CONFIG_SYS_MONITOR_BASE;
ulong *s;
- /* Pointer is writable since we allocated a register for it.
+ /*
+ * Pointer is writable since we allocated a register for it.
*/
gd = &gd_data;
+
/* compiler optimization barrier needed for GCC >= 3.4 */
- __asm__ __volatile__("": : :"memory");
+ __asm__ __volatile__("" : : : "memory");
- memset ((void *)gd, 0, sizeof (gd_t));
+ memset((void *)gd, 0, sizeof(gd_t));
for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
- if ((*init_fnc_ptr)() != 0) {
- hang ();
- }
+ if ((*init_fnc_ptr)() != 0)
+ hang();
}
/*
@@ -179,7 +182,7 @@ void board_init_f(ulong bootflag)
/* round down to next 4 kB limit.
*/
addr &= ~(4096 - 1);
- debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
+ debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
/* Reserve memory for U-Boot code, data & bss
* round down to next 16 kB limit
@@ -187,12 +190,12 @@ void board_init_f(ulong bootflag)
addr -= len;
addr &= ~(16 * 1024 - 1);
- debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
+ debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
/* Reserve memory for malloc() arena.
*/
addr_sp = addr - TOTAL_MALLOC_LEN;
- debug ("Reserving %dk for malloc() at: %08lx\n",
+ debug("Reserving %dk for malloc() at: %08lx\n",
TOTAL_MALLOC_LEN >> 10, addr_sp);
/*
@@ -202,19 +205,19 @@ void board_init_f(ulong bootflag)
addr_sp -= sizeof(bd_t);
bd = (bd_t *)addr_sp;
gd->bd = bd;
- debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
+ debug("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof(bd_t), addr_sp);
addr_sp -= sizeof(gd_t);
id = (gd_t *)addr_sp;
- debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
- sizeof (gd_t), addr_sp);
+ debug("Reserving %zu Bytes for Global Data at: %08lx\n",
+ sizeof(gd_t), addr_sp);
/* Reserve memory for boot params.
*/
addr_sp -= CONFIG_SYS_BOOTPARAMS_LEN;
bd->bi_boot_params = addr_sp;
- debug ("Reserving %dk for boot params() at: %08lx\n",
+ debug("Reserving %dk for boot params() at: %08lx\n",
CONFIG_SYS_BOOTPARAMS_LEN >> 10, addr_sp);
/*
@@ -229,18 +232,18 @@ void board_init_f(ulong bootflag)
*s-- = 0;
*s-- = 0;
addr_sp = (ulong)s;
- debug ("Stack Pointer at: %08lx\n", addr_sp);
+ debug("Stack Pointer at: %08lx\n", addr_sp);
/*
* Save local variables to board info struct
*/
- bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */
- bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
- bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
+ bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */
+ bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
+ bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
- memcpy (id, (void *)gd, sizeof (gd_t));
+ memcpy(id, (void *)gd, sizeof(gd_t));
- relocate_code (addr_sp, id, addr);
+ relocate_code(addr_sp, id, addr);
/* NOTREACHED - relocate_code() does not return */
}
@@ -254,14 +257,14 @@ void board_init_f(ulong bootflag)
************************************************************************
*/
-void board_init_r (gd_t *id, ulong dest_addr)
+void board_init_r(gd_t *id, ulong dest_addr)
{
#ifndef CONFIG_SYS_NO_FLASH
ulong size;
#endif
- extern void malloc_bin_reloc (void);
+ extern void malloc_bin_reloc(void);
#ifndef CONFIG_ENV_IS_NOWHERE
- extern char * env_name_spec;
+ extern char *env_name_spec;
#endif
char *s;
bd_t *bd;
@@ -269,7 +272,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
gd = id;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
- debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
+ debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
gd->reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE;
@@ -298,7 +301,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
#ifndef CONFIG_SYS_NO_FLASH
/* configure available FLASH banks */
size = flash_init();
- display_flash_config (size);
+ display_flash_config(size);
bd->bi_flashsize = size;
#endif
@@ -310,8 +313,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
#endif
#ifdef CONFIG_CMD_NAND
- puts ("NAND: ");
- nand_init (); /* go init the NAND */
+ puts("NAND: ");
+ nand_init(); /* go init the NAND */
#endif
#if defined(CONFIG_CMD_ONENAND)
@@ -333,51 +336,51 @@ void board_init_r (gd_t *id, ulong dest_addr)
/** leave this here (after malloc(), environment and PCI are working) **/
/* Initialize stdio devices */
- stdio_init ();
+ stdio_init();
- jumptable_init ();
+ jumptable_init();
/* Initialize the console (after the relocation and devices init) */
- console_init_r ();
+ console_init_r();
/** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** **/
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
#if defined(CONFIG_CMD_NET)
- if ((s = getenv ("bootfile")) != NULL) {
- copy_filename (BootFile, s, sizeof (BootFile));
- }
+ s = getenv("bootfile");
+ if (s)
+ copy_filename(BootFile, s, sizeof(BootFile));
#endif
#ifdef CONFIG_CMD_SPI
- puts ("SPI: ");
- spi_init (); /* go init the SPI */
- puts ("ready\n");
+ puts("SPI: ");
+ spi_init(); /* go init the SPI */
+ puts("ready\n");
#endif
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
- misc_init_r ();
+ misc_init_r();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
- puts ("Net: ");
+ puts("Net: ");
eth_initialize(gd->bd);
#endif
/* main_loop() can return to retry autoboot, if so just run it again. */
- for (;;) {
- main_loop ();
- }
+ for (;;)
+ main_loop();
/* NOTREACHED - no way out of command loop except booting */
}
-void hang (void)
+void hang(void)
{
- puts ("### ERROR ### Please RESET the board ###\n");
- for (;;);
+ puts("### ERROR ### Please RESET the board ###\n");
+ for (;;)
+ ;
}
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:39 ` Marek Vasut
2011-12-09 9:50 ` Wolfgang Denk
2011-11-24 13:57 ` [U-Boot] [PATCH 03/11] MIPS: board.c: fix init of flash data in bd_info Daniel Schwierzeck
` (9 subsequent siblings)
11 siblings, 2 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
board.c: In function 'board_init_r':
board.c:280:8: warning: unused variable 's'
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/lib/board.c | 3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index 9585db7..aac7690 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -266,7 +266,6 @@ void board_init_r(gd_t *id, ulong dest_addr)
#ifndef CONFIG_ENV_IS_NOWHERE
extern char *env_name_spec;
#endif
- char *s;
bd_t *bd;
gd = id;
@@ -347,7 +346,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
#if defined(CONFIG_CMD_NET)
- s = getenv("bootfile");
+ const char *s = getenv("bootfile");
if (s)
copy_filename(BootFile, s, sizeof(BootFile));
#endif
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 03/11] MIPS: board.c: fix init of flash data in bd_info
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:40 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 04/11] MIPS: add register definition for EBase register Daniel Schwierzeck
` (8 subsequent siblings)
11 siblings, 1 reply; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
Boards with CONFIG_SYS_NO_FLASH should not forced to define
CONFIG_SYS_FLASH_BASE. In this case the flash data in bd_info
should be initialized with 0 like the other archs do.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/lib/board.c | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index aac7690..bcf12c5 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -301,15 +301,19 @@ void board_init_r(gd_t *id, ulong dest_addr)
/* configure available FLASH banks */
size = flash_init();
display_flash_config(size);
+ bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
bd->bi_flashsize = size;
-#endif
- bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
#if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for U-Boot */
#else
bd->bi_flashoffset = 0;
#endif
+#else
+ bd->bi_flashstart = 0;
+ bd->bi_flashsize = 0;
+ bd->bi_flashoffset = 0;
+#endif
#ifdef CONFIG_CMD_NAND
puts("NAND: ");
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 04/11] MIPS: add register definition for EBase register
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (2 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 03/11] MIPS: board.c: fix init of flash data in bd_info Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:43 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems Daniel Schwierzeck
` (7 subsequent siblings)
11 siblings, 1 reply; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
The CPUNum field in the Ebase register contains an unique identifier
for each CPU. This helps to distinguish between CPU cores in
multi-processor systems.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/include/asm/mipsregs.h | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index be7e5c6..15a9fd5 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -89,6 +89,13 @@
#define CP0_DWATCH $19
/*
+ * Additional Coprocessor 0 register names.
+ * These registers are listed for completeness and are intended
+ * for usage in assembly code.
+ */
+#define CP0_EBASE $15,1
+
+/*
* Coprocessor 0 Set 1 register names
*/
#define CP0_S1_DERRADDR0 $26
@@ -395,6 +402,12 @@
#define CAUSEF_BD (_ULCAST_(1) << 31)
/*
+ * Bits in the coprocessor 0 EBase register.
+ */
+#define EBASEB_CPUNUM 0
+#define EBASEF_CPUNUM (_ULCAST_(1023))
+
+/*
* Bits in the coprocessor 0 config register.
*/
/* Generic bits. */
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (3 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 04/11] MIPS: add register definition for EBase register Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:44 ` Marek Vasut
2011-11-28 16:24 ` Shinya Kuribayashi
2011-11-24 13:57 ` [U-Boot] [PATCH 06/11] MIPS: make cache operation mode configurable in dcache_enable() Daniel Schwierzeck
` (6 subsequent siblings)
11 siblings, 2 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
This handler can be activated on multi-processor systems to boot only
the master CPU. All slave CPUs are halted by executing the WAIT
instruction. This is also useful to reduce the power consumption at
boot time.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/cpu/mips32/start.S | 16 ++++++++++++++++
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 9c1b2f7..b6cb4be 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -224,6 +224,14 @@ reset:
setup_c0_status_reset
+ /* Set all slave CPUs in sleep mode */
+#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
+ mfc0 k0, CP0_EBASE
+ and k0, EBASEF_CPUNUM
+ bne k0, zero, slave_cpu_sleep
+ nop
+#endif
+
/* Init Timer */
mtc0 zero, CP0_COUNT
mtc0 zero, CP0_COMPARE
@@ -383,3 +391,11 @@ romReserved:
romExcHandle:
b romExcHandle
+
+ /* Additional handlers */
+#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
+slave_cpu_sleep:
+ wait
+ b slave_cpu_sleep
+ nop
+#endif
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 06/11] MIPS: make cache operation mode configurable in dcache_enable()
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (4 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:45 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores Daniel Schwierzeck
` (5 subsequent siblings)
11 siblings, 1 reply; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
Commit ab2a98b11716364bc5a8c43cdfa7fee176cda1d8 missed to
use the new config option in dcache_enable().
Fix this to avoid inconsistencies if someone wants to disable
and enable D-caches.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/cpu/mips32/cache.S | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index 5ce0ec4..e683e8b 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -30,6 +30,10 @@
#include <asm/addrspace.h>
#include <asm/cacheops.h>
+#ifndef CONFIG_SYS_MIPS_CACHE_MODE
+#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
+#endif
+
#define RA t8
/*
@@ -224,7 +228,7 @@ LEAF(dcache_enable)
mfc0 t0, CP0_CONFIG
ori t0, CONF_CM_CMASK
xori t0, CONF_CM_CMASK
- ori t0, CONF_CM_CACHABLE_NONCOHERENT
+ ori t0, CONFIG_SYS_MIPS_CACHE_MODE
mtc0 t0, CP0_CONFIG
jr ra
END(dcache_enable)
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (5 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 06/11] MIPS: make cache operation mode configurable in dcache_enable() Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:46 ` Marek Vasut
2011-11-30 12:39 ` [U-Boot] [PATCH v2 07/10] MIPS: extend cache initialization for recent MIPS CPU cores Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores Daniel Schwierzeck
` (4 subsequent siblings)
11 siblings, 2 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/cpu/mips32/cache.S | 18 ++++++++++++++++++
arch/mips/include/asm/mipsregs.h | 9 ++++++++-
2 files changed, 26 insertions(+), 1 deletions(-)
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index e683e8b..4801511 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -34,6 +34,14 @@
#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
#endif
+#ifdef CONFIG_SYS_CPU_MIPS24K
+#define CONFIG_SYS_MIPS_CACHE_EXT_INIT
+#endif
+
+#ifdef CONFIG_SYS_CPU_MIPS34K
+#define CONFIG_SYS_MIPS_CACHE_EXT_INIT
+#endif
+
#define RA t8
/*
@@ -81,7 +89,12 @@
*/
LEAF(mips_init_icache)
blez a1, 9f
+#ifdef CONFIG_SYS_MIPS_CACHE_EXT_INIT
+ mtc0 zero, CP0_ITAGLO
+ mtc0 zero, CP0_IDATALO
+#else
mtc0 zero, CP0_TAGLO
+#endif
/* clear tag to invalidate */
PTR_LI t0, INDEX_BASE
PTR_ADDU t1, t0, a1
@@ -106,7 +119,12 @@ LEAF(mips_init_icache)
*/
LEAF(mips_init_dcache)
blez a1, 9f
+#ifdef CONFIG_SYS_MIPS_CACHE_EXT_INIT
+ mtc0 zero, CP0_DTAGLO
+ mtc0 zero, CP0_DDATALO
+#else
mtc0 zero, CP0_TAGLO
+#endif
/* clear all tags */
PTR_LI t0, INDEX_BASE
PTR_ADDU t1, t0, a1
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 15a9fd5..07a3cf6 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -93,7 +93,14 @@
* These registers are listed for completeness and are intended
* for usage in assembly code.
*/
-#define CP0_EBASE $15,1
+#define CP0_EBASE $15,1
+/* L1 I-Cache */
+#define CP0_ITAGLO $28
+#define CP0_IDATALO $28,1
+#define CP0_IDATAHI $29,1
+/* L1 D-Cache */
+#define CP0_DTAGLO $28,2
+#define CP0_DDATALO $28,3
/*
* Coprocessor 0 Set 1 register names
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (6 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:47 ` Marek Vasut
` (2 more replies)
2011-11-24 13:57 ` [U-Boot] [PATCH 09/11] MIPS: add header file for generic GPIO API Daniel Schwierzeck
` (3 subsequent siblings)
11 siblings, 3 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/cpu/mips32/start.S | 21 +++++++++++++++++++--
1 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index b6cb4be..03cfd5a 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -206,11 +206,28 @@ _start:
RVECENT(romReserved,125)
RVECENT(romReserved,126)
RVECENT(romReserved,127)
+ XVECENT(romExcHandle,0x400);
+ RVECENT(romReserved,129);
+ RVECENT(romReserved,130);
+ RVECENT(romReserved,131);
+ RVECENT(romReserved,132);
+ RVECENT(romReserved,133);
+ RVECENT(romReserved,134);
+ RVECENT(romReserved,135);
+ RVECENT(romReserved,136);
+ RVECENT(romReserved,137);
+ RVECENT(romReserved,138);
+ RVECENT(romReserved,139);
+ RVECENT(romReserved,140);
+ RVECENT(romReserved,141);
+ RVECENT(romReserved,142);
+ RVECENT(romReserved,143);
+ XVECENT(romExcHandle,0x480); # bfc00480: EJTAG debug exception
/*
* We hope there are no more reserved vectors!
- * 128 * 8 == 1024 == 0x400
- * so this is address R_VEC+0x400 == 0xbfc00400
+ * 144 * 8 == 1152 == 0x480
+ * so this is address R_VEC+0x480 == 0xbfc00480
*/
.align 4
reset:
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 09/11] MIPS: add header file for generic GPIO API
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (7 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:48 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 10/11] MIPS: add init hook for CPU specific initialization Daniel Schwierzeck
` (2 subsequent siblings)
11 siblings, 1 reply; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/include/asm/gpio.h | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/include/asm/gpio.h
diff --git a/arch/mips/include/asm/gpio.h b/arch/mips/include/asm/gpio.h
new file mode 100644
index 0000000..04a98ad
--- /dev/null
+++ b/arch/mips/include/asm/gpio.h
@@ -0,0 +1,13 @@
+/*
+ * This file is released under the terms of GPL v2 and any later version.
+ * See the file COPYING in the root directory of the source tree for details.
+ *
+ * Copyright (C) 2011 Daniel Schwierzeck, daniel.schwierzeck at googlemail.com
+ */
+
+#ifndef __ASM_MIPS_GPIO_H__
+#define __ASM_MIPS_GPIO_H__
+
+#include <asm/arch/gpio.h>
+
+#endif /* __ASM_MIPS_GPIO_H__ */
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 10/11] MIPS: add init hook for CPU specific initialization
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (8 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 09/11] MIPS: add header file for generic GPIO API Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-25 8:49 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards Daniel Schwierzeck
2012-03-31 20:49 ` [U-Boot] [PATCH 00/11] MIPS: fixes and updates Marek Vasut
11 siblings, 1 reply; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
arch/mips/lib/board.c | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index bcf12c5..27c2cfe 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -57,6 +57,16 @@ static char *failed = "*** failed ***\n";
*/
unsigned long mips_io_port_base = -1;
+int __arch_cpu_init(void)
+{
+ /*
+ * Nothing to do in this dummy implementation
+ */
+ return 0;
+}
+int arch_cpu_init(void)
+ __attribute__((weak, alias("__arch_cpu_init")));
+
int __board_early_init_f(void)
{
/*
@@ -130,6 +140,7 @@ static int init_baudrate(void)
typedef int (init_fnc_t) (void);
init_fnc_t *init_sequence[] = {
+ arch_cpu_init,
board_early_init_f,
timer_init,
env_init, /* initialize environment */
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (9 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 10/11] MIPS: add init hook for CPU specific initialization Daniel Schwierzeck
@ 2011-11-24 13:57 ` Daniel Schwierzeck
2011-11-24 17:41 ` Mike Frysinger
2011-12-09 9:53 ` Wolfgang Denk
2012-03-31 20:49 ` [U-Boot] [PATCH 00/11] MIPS: fixes and updates Marek Vasut
11 siblings, 2 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-24 13:57 UTC (permalink / raw)
To: u-boot
Build dbau1550_el only in LIST_au1xx0_el and LIST_mips_el.
Also remove obsolete lists for mips5kc.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Thomas Lange <thomas@corelatus.se>
---
MAKEALL | 11 ++---------
1 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index 95b7cd3..ff761e6 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -379,14 +379,11 @@ LIST_mips4kc=" \
vct_premium_onenand_small \
"
-LIST_mips5kc=""
-
LIST_au1xx0=" \
dbau1000 \
dbau1100 \
dbau1500 \
dbau1550 \
- dbau1550_el \
gth2 \
"
@@ -400,20 +397,16 @@ LIST_mips=" \
## MIPS Systems (little endian)
#########################################################################
-LIST_mips4kc_el=" \
+LIST_xburst_el=" \
qi_lb60 \
"
-LIST_mips5kc_el=""
-
LIST_au1xx0_el=" \
dbau1550_el \
pb1000 \
"
-
LIST_mips_el=" \
- ${LIST_mips4kc_el} \
- ${LIST_mips5kc_el} \
+ ${LIST_xburst_el} \
${LIST_au1xx0_el} \
"
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
2011-11-24 13:57 ` [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards Daniel Schwierzeck
@ 2011-11-24 17:41 ` Mike Frysinger
2011-11-25 8:49 ` Marek Vasut
2011-12-09 9:53 ` Wolfgang Denk
1 sibling, 1 reply; 50+ messages in thread
From: Mike Frysinger @ 2011-11-24 17:41 UTC (permalink / raw)
To: u-boot
On Thursday 24 November 2011 08:57:56 Daniel Schwierzeck wrote:
> Build dbau1550_el only in LIST_au1xx0_el and LIST_mips_el.
> Also remove obsolete lists for mips5kc.
if possible, i'd really like to kill off all the specialized mips lists and do
selection purely based on fields in boards.cfg.
-mike
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^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean
2011-11-24 13:57 ` [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean Daniel Schwierzeck
@ 2011-11-25 8:38 ` Marek Vasut
2011-11-30 12:39 ` [U-Boot] [PATCH v2 " Daniel Schwierzeck
2011-12-09 9:52 ` [U-Boot] [PATCH " Wolfgang Denk
2 siblings, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:38 UTC (permalink / raw)
To: u-boot
> WARNING: line over 80 characters
> WARNING: space prohibited between function name and open parenthesis '('
> WARNING: braces {} are not necessary for single statement blocks
> ERROR: return is not a function, parentheses are not required
> ERROR: do not use assignment in if condition
> ERROR: trailing statements should be on next line
> ERROR: "foo * bar" should be "foo *bar"
> ERROR: spaces required around that ':' (ctx:WxV)
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/lib/board.c | 119
> +++++++++++++++++++++++++------------------------ 1 files changed, 61
> insertions(+), 58 deletions(-)
>
> diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
> index 1274d63..9585db7 100644
> --- a/arch/mips/lib/board.c
> +++ b/arch/mips/lib/board.c
> @@ -64,42 +64,43 @@ int __board_early_init_f(void)
> */
> return 0;
> }
> -int board_early_init_f(void) __attribute__((weak,
> alias("__board_early_init_f"))); +int board_early_init_f(void)
> + __attribute__((weak, alias("__board_early_init_f")));
>
>
> -static int init_func_ram (void)
> +static int init_func_ram(void)
> {
> #ifdef CONFIG_BOARD_TYPES
> int board_type = gd->board_type;
> #else
> int board_type = 0; /* use dummy arg */
> #endif
> - puts ("DRAM: ");
> + puts("DRAM: ");
>
> - if ((gd->ram_size = initdram (board_type)) > 0) {
> - print_size (gd->ram_size, "\n");
> - return (0);
> + gd->ram_size = initdram(board_type);
> + if (gd->ram_size) {
> + print_size(gd->ram_size, "\n");
> + return 0;
> }
> - puts (failed);
> - return (1);
> + puts(failed);
> + return 1;
> }
>
> static int display_banner(void)
> {
> -
> - printf ("\n\n%s\n\n", version_string);
> - return (0);
> + printf("\n\n%s\n\n", version_string);
> + return 0;
> }
>
> #ifndef CONFIG_SYS_NO_FLASH
> static void display_flash_config(ulong size)
> {
> - puts ("Flash: ");
> - print_size (size, "\n");
> + puts("Flash: ");
> + print_size(size, "\n");
> }
> #endif
>
> -static int init_baudrate (void)
> +static int init_baudrate(void)
> {
> gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
> return 0;
> @@ -133,7 +134,8 @@ init_fnc_t *init_sequence[] = {
> timer_init,
> env_init, /* initialize environment */
> #ifdef CONFIG_INCA_IP
> - incaip_set_cpuclk, /* set cpu clock according to environment
variable */
> + /* set cpu clock according to environment variable */
> + incaip_set_cpuclk,
> #endif
> init_baudrate, /* initialze baudrate settings */
> serial_init, /* serial communications setup */
> @@ -153,18 +155,19 @@ void board_init_f(ulong bootflag)
> ulong addr, addr_sp, len = (ulong)&uboot_end - CONFIG_SYS_MONITOR_BASE;
> ulong *s;
>
> - /* Pointer is writable since we allocated a register for it.
You can use single-line comment here /* comment */ ?
> + /*
> + * Pointer is writable since we allocated a register for it.
> */
> gd = &gd_data;
> +
> /* compiler optimization barrier needed for GCC >= 3.4 */
> - __asm__ __volatile__("": : :"memory");
> + __asm__ __volatile__("" : : : "memory");
>
> - memset ((void *)gd, 0, sizeof (gd_t));
> + memset((void *)gd, 0, sizeof(gd_t));
>
> for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
> - if ((*init_fnc_ptr)() != 0) {
> - hang ();
> - }
> + if ((*init_fnc_ptr)() != 0)
> + hang();
> }
>
> /*
> @@ -179,7 +182,7 @@ void board_init_f(ulong bootflag)
> /* round down to next 4 kB limit.
> */
> addr &= ~(4096 - 1);
> - debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
> + debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
>
> /* Reserve memory for U-Boot code, data & bss
> * round down to next 16 kB limit
> @@ -187,12 +190,12 @@ void board_init_f(ulong bootflag)
> addr -= len;
> addr &= ~(16 * 1024 - 1);
>
> - debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
> + debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
>
> /* Reserve memory for malloc() arena.
> */
> addr_sp = addr - TOTAL_MALLOC_LEN;
> - debug ("Reserving %dk for malloc() at: %08lx\n",
> + debug("Reserving %dk for malloc() at: %08lx\n",
> TOTAL_MALLOC_LEN >> 10, addr_sp);
>
> /*
> @@ -202,19 +205,19 @@ void board_init_f(ulong bootflag)
> addr_sp -= sizeof(bd_t);
> bd = (bd_t *)addr_sp;
> gd->bd = bd;
> - debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
> + debug("Reserving %zu Bytes for Board Info at: %08lx\n",
> sizeof(bd_t), addr_sp);
>
> addr_sp -= sizeof(gd_t);
> id = (gd_t *)addr_sp;
> - debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
> - sizeof (gd_t), addr_sp);
> + debug("Reserving %zu Bytes for Global Data at: %08lx\n",
> + sizeof(gd_t), addr_sp);
>
> /* Reserve memory for boot params.
> */
> addr_sp -= CONFIG_SYS_BOOTPARAMS_LEN;
> bd->bi_boot_params = addr_sp;
> - debug ("Reserving %dk for boot params() at: %08lx\n",
> + debug("Reserving %dk for boot params() at: %08lx\n",
> CONFIG_SYS_BOOTPARAMS_LEN >> 10, addr_sp);
>
> /*
> @@ -229,18 +232,18 @@ void board_init_f(ulong bootflag)
> *s-- = 0;
> *s-- = 0;
> addr_sp = (ulong)s;
> - debug ("Stack Pointer at: %08lx\n", addr_sp);
> + debug("Stack Pointer at: %08lx\n", addr_sp);
>
> /*
> * Save local variables to board info struct
> */
> - bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory
*/
> - bd->bi_memsize = gd->ram_size; /* size of DRAM memory in
bytes */
> - bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
> + bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */
> + bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
> + bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
>
> - memcpy (id, (void *)gd, sizeof (gd_t));
> + memcpy(id, (void *)gd, sizeof(gd_t));
>
> - relocate_code (addr_sp, id, addr);
> + relocate_code(addr_sp, id, addr);
>
> /* NOTREACHED - relocate_code() does not return */
> }
> @@ -254,14 +257,14 @@ void board_init_f(ulong bootflag)
> ************************************************************************
> */
>
> -void board_init_r (gd_t *id, ulong dest_addr)
> +void board_init_r(gd_t *id, ulong dest_addr)
> {
> #ifndef CONFIG_SYS_NO_FLASH
> ulong size;
> #endif
> - extern void malloc_bin_reloc (void);
> + extern void malloc_bin_reloc(void);
> #ifndef CONFIG_ENV_IS_NOWHERE
> - extern char * env_name_spec;
> + extern char *env_name_spec;
> #endif
> char *s;
> bd_t *bd;
> @@ -269,7 +272,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
> gd = id;
> gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
>
> - debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
> + debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
>
> gd->reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE;
>
> @@ -298,7 +301,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
> #ifndef CONFIG_SYS_NO_FLASH
> /* configure available FLASH banks */
> size = flash_init();
> - display_flash_config (size);
> + display_flash_config(size);
> bd->bi_flashsize = size;
> #endif
>
> @@ -310,8 +313,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
> #endif
>
> #ifdef CONFIG_CMD_NAND
> - puts ("NAND: ");
> - nand_init (); /* go init the NAND */
> + puts("NAND: ");
> + nand_init(); /* go init the NAND */
> #endif
>
> #if defined(CONFIG_CMD_ONENAND)
> @@ -333,51 +336,51 @@ void board_init_r (gd_t *id, ulong dest_addr)
>
> /** leave this here (after malloc(), environment and PCI are working) **/
> /* Initialize stdio devices */
> - stdio_init ();
> + stdio_init();
>
> - jumptable_init ();
> + jumptable_init();
>
> /* Initialize the console (after the relocation and devices init) */
> - console_init_r ();
> + console_init_r();
> /** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** **/
>
> /* Initialize from environment */
> load_addr = getenv_ulong("loadaddr", 16, load_addr);
> #if defined(CONFIG_CMD_NET)
> - if ((s = getenv ("bootfile")) != NULL) {
> - copy_filename (BootFile, s, sizeof (BootFile));
> - }
> + s = getenv("bootfile");
> + if (s)
> + copy_filename(BootFile, s, sizeof(BootFile));
> #endif
>
> #ifdef CONFIG_CMD_SPI
> - puts ("SPI: ");
> - spi_init (); /* go init the SPI */
> - puts ("ready\n");
> + puts("SPI: ");
> + spi_init(); /* go init the SPI */
> + puts("ready\n");
> #endif
>
> #if defined(CONFIG_MISC_INIT_R)
> /* miscellaneous platform dependent initialisations */
> - misc_init_r ();
> + misc_init_r();
> #endif
>
> #ifdef CONFIG_BITBANGMII
> bb_miiphy_init();
> #endif
> #if defined(CONFIG_CMD_NET)
> - puts ("Net: ");
> + puts("Net: ");
> eth_initialize(gd->bd);
> #endif
>
> /* main_loop() can return to retry autoboot, if so just run it again. */
> - for (;;) {
> - main_loop ();
> - }
> + for (;;)
> + main_loop();
>
> /* NOTREACHED - no way out of command loop except booting */
> }
>
> -void hang (void)
> +void hang(void)
> {
> - puts ("### ERROR ### Please RESET the board ###\n");
> - for (;;);
> + puts("### ERROR ### Please RESET the board ###\n");
> + for (;;)
> + ;
> }
Other than the minor comment thing,
Acked-by: Marek Vasut <marek.vasut@gmail.com>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined
2011-11-24 13:57 ` [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined Daniel Schwierzeck
@ 2011-11-25 8:39 ` Marek Vasut
2011-11-25 12:37 ` Daniel Schwierzeck
2011-12-09 9:50 ` Wolfgang Denk
1 sibling, 1 reply; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:39 UTC (permalink / raw)
To: u-boot
> board.c: In function 'board_init_r':
> board.c:280:8: warning: unused variable 's'
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/lib/board.c | 3 +--
> 1 files changed, 1 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
> index 9585db7..aac7690 100644
> --- a/arch/mips/lib/board.c
> +++ b/arch/mips/lib/board.c
> @@ -266,7 +266,6 @@ void board_init_r(gd_t *id, ulong dest_addr)
> #ifndef CONFIG_ENV_IS_NOWHERE
> extern char *env_name_spec;
> #endif
> - char *s;
> bd_t *bd;
>
> gd = id;
> @@ -347,7 +346,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
> /* Initialize from environment */
> load_addr = getenv_ulong("loadaddr", 16, load_addr);
> #if defined(CONFIG_CMD_NET)
> - s = getenv("bootfile");
> + const char *s = getenv("bootfile");
> if (s)
> copy_filename(BootFile, s, sizeof(BootFile));
> #endif
Are you sure about this "const" thing? Also, try compiling the stuff with
gcc4.6, it'll reveal more errors.
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 03/11] MIPS: board.c: fix init of flash data in bd_info
2011-11-24 13:57 ` [U-Boot] [PATCH 03/11] MIPS: board.c: fix init of flash data in bd_info Daniel Schwierzeck
@ 2011-11-25 8:40 ` Marek Vasut
0 siblings, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:40 UTC (permalink / raw)
To: u-boot
> Boards with CONFIG_SYS_NO_FLASH should not forced to define
> CONFIG_SYS_FLASH_BASE. In this case the flash data in bd_info
> should be initialized with 0 like the other archs do.
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/lib/board.c | 8 ++++++--
> 1 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
> index aac7690..bcf12c5 100644
> --- a/arch/mips/lib/board.c
> +++ b/arch/mips/lib/board.c
> @@ -301,15 +301,19 @@ void board_init_r(gd_t *id, ulong dest_addr)
> /* configure available FLASH banks */
> size = flash_init();
> display_flash_config(size);
> + bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
> bd->bi_flashsize = size;
> -#endif
>
> - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
> #if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
> bd->bi_flashoffset = monitor_flash_len; /* reserved area for U-Boot */
> #else
> bd->bi_flashoffset = 0;
> #endif
> +#else
> + bd->bi_flashstart = 0;
> + bd->bi_flashsize = 0;
> + bd->bi_flashoffset = 0;
> +#endif
>
> #ifdef CONFIG_CMD_NAND
> puts("NAND: ");
Acked-by: Marek Vasut <marek.vasut@gmail.com>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 04/11] MIPS: add register definition for EBase register
2011-11-24 13:57 ` [U-Boot] [PATCH 04/11] MIPS: add register definition for EBase register Daniel Schwierzeck
@ 2011-11-25 8:43 ` Marek Vasut
2011-11-25 12:10 ` Daniel Schwierzeck
0 siblings, 1 reply; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:43 UTC (permalink / raw)
To: u-boot
> The CPUNum field in the Ebase register contains an unique identifier
> for each CPU. This helps to distinguish between CPU cores in
> multi-processor systems.
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/include/asm/mipsregs.h | 13 +++++++++++++
> 1 files changed, 13 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/include/asm/mipsregs.h
> b/arch/mips/include/asm/mipsregs.h index be7e5c6..15a9fd5 100644
> --- a/arch/mips/include/asm/mipsregs.h
> +++ b/arch/mips/include/asm/mipsregs.h
> @@ -89,6 +89,13 @@
> #define CP0_DWATCH $19
>
> /*
> + * Additional Coprocessor 0 register names.
> + * These registers are listed for completeness and are intended
> + * for usage in assembly code.
> + */
> +#define CP0_EBASE $15,1
> +
> +/*
> * Coprocessor 0 Set 1 register names
> */
> #define CP0_S1_DERRADDR0 $26
> @@ -395,6 +402,12 @@
> #define CAUSEF_BD (_ULCAST_(1) << 31)
>
> /*
> + * Bits in the coprocessor 0 EBase register.
> + */
> +#define EBASEB_CPUNUM 0
> +#define EBASEF_CPUNUM (_ULCAST_(1023))
What's this? Isn't the maximum CPU number on MIPS 32 CPUs? Or maybe that's only
4kc limit?
> +
> +/*
> * Bits in the coprocessor 0 config register.
> */
> /* Generic bits. */
M
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
2011-11-24 13:57 ` [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems Daniel Schwierzeck
@ 2011-11-25 8:44 ` Marek Vasut
2011-11-25 12:19 ` Daniel Schwierzeck
2011-11-25 15:35 ` Andrew Dyer
2011-11-28 16:24 ` Shinya Kuribayashi
1 sibling, 2 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:44 UTC (permalink / raw)
To: u-boot
> This handler can be activated on multi-processor systems to boot only
> the master CPU. All slave CPUs are halted by executing the WAIT
> instruction. This is also useful to reduce the power consumption at
> boot time.
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/cpu/mips32/start.S | 16 ++++++++++++++++
> 1 files changed, 16 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
> index 9c1b2f7..b6cb4be 100644
> --- a/arch/mips/cpu/mips32/start.S
> +++ b/arch/mips/cpu/mips32/start.S
> @@ -224,6 +224,14 @@ reset:
>
> setup_c0_status_reset
>
> + /* Set all slave CPUs in sleep mode */
> +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
> + mfc0 k0, CP0_EBASE
> + and k0, EBASEF_CPUNUM
> + bne k0, zero, slave_cpu_sleep
> + nop
> +#endif
> +
> /* Init Timer */
> mtc0 zero, CP0_COUNT
> mtc0 zero, CP0_COMPARE
> @@ -383,3 +391,11 @@ romReserved:
>
> romExcHandle:
> b romExcHandle
> +
> + /* Additional handlers */
> +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
> +slave_cpu_sleep:
> + wait
> + b slave_cpu_sleep
> + nop
> +#endif
Can't you stall the CPU instead of letting it run in an empty loop? If not:
Acked-by: Marek Vasut <marek.vasut@gmail.com>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 06/11] MIPS: make cache operation mode configurable in dcache_enable()
2011-11-24 13:57 ` [U-Boot] [PATCH 06/11] MIPS: make cache operation mode configurable in dcache_enable() Daniel Schwierzeck
@ 2011-11-25 8:45 ` Marek Vasut
0 siblings, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:45 UTC (permalink / raw)
To: u-boot
> Commit ab2a98b11716364bc5a8c43cdfa7fee176cda1d8 missed to
> use the new config option in dcache_enable().
>
> Fix this to avoid inconsistencies if someone wants to disable
> and enable D-caches.
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/cpu/mips32/cache.S | 6 +++++-
> 1 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
> index 5ce0ec4..e683e8b 100644
> --- a/arch/mips/cpu/mips32/cache.S
> +++ b/arch/mips/cpu/mips32/cache.S
> @@ -30,6 +30,10 @@
> #include <asm/addrspace.h>
> #include <asm/cacheops.h>
>
> +#ifndef CONFIG_SYS_MIPS_CACHE_MODE
> +#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
> +#endif
> +
> #define RA t8
>
> /*
> @@ -224,7 +228,7 @@ LEAF(dcache_enable)
> mfc0 t0, CP0_CONFIG
> ori t0, CONF_CM_CMASK
> xori t0, CONF_CM_CMASK
> - ori t0, CONF_CM_CACHABLE_NONCOHERENT
> + ori t0, CONFIG_SYS_MIPS_CACHE_MODE
> mtc0 t0, CP0_CONFIG
> jr ra
> END(dcache_enable)
Acked-by: Marek Vasut <marek.vasut@gmail.com>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores
2011-11-24 13:57 ` [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores Daniel Schwierzeck
@ 2011-11-25 8:46 ` Marek Vasut
2011-11-30 12:39 ` [U-Boot] [PATCH v2 07/10] MIPS: extend cache initialization for recent MIPS CPU cores Daniel Schwierzeck
1 sibling, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:46 UTC (permalink / raw)
To: u-boot
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/cpu/mips32/cache.S | 18 ++++++++++++++++++
> arch/mips/include/asm/mipsregs.h | 9 ++++++++-
> 2 files changed, 26 insertions(+), 1 deletions(-)
>
> diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
> index e683e8b..4801511 100644
> --- a/arch/mips/cpu/mips32/cache.S
> +++ b/arch/mips/cpu/mips32/cache.S
> @@ -34,6 +34,14 @@
> #define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
> #endif
>
> +#ifdef CONFIG_SYS_CPU_MIPS24K
#if defined(...) || defined(...) maybe?
> +#define CONFIG_SYS_MIPS_CACHE_EXT_INIT
> +#endif
> +
> +#ifdef CONFIG_SYS_CPU_MIPS34K
> +#define CONFIG_SYS_MIPS_CACHE_EXT_INIT
> +#endif
> +
> #define RA t8
>
> /*
> @@ -81,7 +89,12 @@
> */
> LEAF(mips_init_icache)
> blez a1, 9f
> +#ifdef CONFIG_SYS_MIPS_CACHE_EXT_INIT
> + mtc0 zero, CP0_ITAGLO
> + mtc0 zero, CP0_IDATALO
> +#else
> mtc0 zero, CP0_TAGLO
> +#endif
> /* clear tag to invalidate */
> PTR_LI t0, INDEX_BASE
> PTR_ADDU t1, t0, a1
> @@ -106,7 +119,12 @@ LEAF(mips_init_icache)
> */
> LEAF(mips_init_dcache)
> blez a1, 9f
> +#ifdef CONFIG_SYS_MIPS_CACHE_EXT_INIT
> + mtc0 zero, CP0_DTAGLO
> + mtc0 zero, CP0_DDATALO
> +#else
> mtc0 zero, CP0_TAGLO
> +#endif
> /* clear all tags */
> PTR_LI t0, INDEX_BASE
> PTR_ADDU t1, t0, a1
> diff --git a/arch/mips/include/asm/mipsregs.h
> b/arch/mips/include/asm/mipsregs.h index 15a9fd5..07a3cf6 100644
> --- a/arch/mips/include/asm/mipsregs.h
> +++ b/arch/mips/include/asm/mipsregs.h
> @@ -93,7 +93,14 @@
> * These registers are listed for completeness and are intended
> * for usage in assembly code.
> */
> -#define CP0_EBASE $15,1
> +#define CP0_EBASE $15,1
> +/* L1 I-Cache */
> +#define CP0_ITAGLO $28
> +#define CP0_IDATALO $28,1
> +#define CP0_IDATAHI $29,1
> +/* L1 D-Cache */
> +#define CP0_DTAGLO $28,2
> +#define CP0_DDATALO $28,3
>
> /*
> * Coprocessor 0 Set 1 register names
Otherwise, this looks good:
Acked-by: Marek Vasut <marek.vasut@gmail.com>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores
2011-11-24 13:57 ` [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores Daniel Schwierzeck
@ 2011-11-25 8:47 ` Marek Vasut
2011-11-28 16:48 ` Shinya Kuribayashi
2011-11-30 12:39 ` [U-Boot] [PATCH v2 08/10] MIPS: start.S: refactor reset and exception vector setup Daniel Schwierzeck
2 siblings, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:47 UTC (permalink / raw)
To: u-boot
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/cpu/mips32/start.S | 21 +++++++++++++++++++--
> 1 files changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
> index b6cb4be..03cfd5a 100644
> --- a/arch/mips/cpu/mips32/start.S
> +++ b/arch/mips/cpu/mips32/start.S
> @@ -206,11 +206,28 @@ _start:
> RVECENT(romReserved,125)
> RVECENT(romReserved,126)
> RVECENT(romReserved,127)
> + XVECENT(romExcHandle,0x400);
> + RVECENT(romReserved,129);
> + RVECENT(romReserved,130);
> + RVECENT(romReserved,131);
> + RVECENT(romReserved,132);
> + RVECENT(romReserved,133);
> + RVECENT(romReserved,134);
> + RVECENT(romReserved,135);
> + RVECENT(romReserved,136);
> + RVECENT(romReserved,137);
> + RVECENT(romReserved,138);
> + RVECENT(romReserved,139);
> + RVECENT(romReserved,140);
> + RVECENT(romReserved,141);
> + RVECENT(romReserved,142);
> + RVECENT(romReserved,143);
> + XVECENT(romExcHandle,0x480); # bfc00480: EJTAG debug exception
Use .rept maybe to avoid this copy-paste?
>
> /*
> * We hope there are no more reserved vectors!
> - * 128 * 8 == 1024 == 0x400
> - * so this is address R_VEC+0x400 == 0xbfc00400
> + * 144 * 8 == 1152 == 0x480
> + * so this is address R_VEC+0x480 == 0xbfc00480
> */
> .align 4
> reset:
M
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 09/11] MIPS: add header file for generic GPIO API
2011-11-24 13:57 ` [U-Boot] [PATCH 09/11] MIPS: add header file for generic GPIO API Daniel Schwierzeck
@ 2011-11-25 8:48 ` Marek Vasut
0 siblings, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:48 UTC (permalink / raw)
To: u-boot
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/include/asm/gpio.h | 13 +++++++++++++
> 1 files changed, 13 insertions(+), 0 deletions(-)
> create mode 100644 arch/mips/include/asm/gpio.h
>
> diff --git a/arch/mips/include/asm/gpio.h b/arch/mips/include/asm/gpio.h
> new file mode 100644
> index 0000000..04a98ad
> --- /dev/null
> +++ b/arch/mips/include/asm/gpio.h
> @@ -0,0 +1,13 @@
> +/*
> + * This file is released under the terms of GPL v2 and any later version.
> + * See the file COPYING in the root directory of the source tree for
> details. + *
> + * Copyright (C) 2011 Daniel Schwierzeck,
> daniel.schwierzeck at googlemail.com + */
> +
> +#ifndef __ASM_MIPS_GPIO_H__
> +#define __ASM_MIPS_GPIO_H__
> +
> +#include <asm/arch/gpio.h>
> +
> +#endif /* __ASM_MIPS_GPIO_H__ */
I see why you need this:
Acked-by: Marek Vasut <marek.vasut@gmail.com>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 10/11] MIPS: add init hook for CPU specific initialization
2011-11-24 13:57 ` [U-Boot] [PATCH 10/11] MIPS: add init hook for CPU specific initialization Daniel Schwierzeck
@ 2011-11-25 8:49 ` Marek Vasut
2012-03-31 20:53 ` Marek Vasut
0 siblings, 1 reply; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:49 UTC (permalink / raw)
To: u-boot
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/lib/board.c | 11 +++++++++++
> 1 files changed, 11 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
> index bcf12c5..27c2cfe 100644
> --- a/arch/mips/lib/board.c
> +++ b/arch/mips/lib/board.c
> @@ -57,6 +57,16 @@ static char *failed = "*** failed ***\n";
> */
> unsigned long mips_io_port_base = -1;
>
> +int __arch_cpu_init(void)
> +{
> + /*
> + * Nothing to do in this dummy implementation
> + */
> + return 0;
> +}
> +int arch_cpu_init(void)
> + __attribute__((weak, alias("__arch_cpu_init")));
> +
> int __board_early_init_f(void)
> {
> /*
> @@ -130,6 +140,7 @@ static int init_baudrate(void)
> typedef int (init_fnc_t) (void);
>
> init_fnc_t *init_sequence[] = {
> + arch_cpu_init,
> board_early_init_f,
> timer_init,
> env_init, /* initialize environment */
Maybe do it the same way it's done on ARM.
M
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
2011-11-24 17:41 ` Mike Frysinger
@ 2011-11-25 8:49 ` Marek Vasut
2011-11-25 12:29 ` Daniel Schwierzeck
0 siblings, 1 reply; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 8:49 UTC (permalink / raw)
To: u-boot
> On Thursday 24 November 2011 08:57:56 Daniel Schwierzeck wrote:
> > Build dbau1550_el only in LIST_au1xx0_el and LIST_mips_el.
> > Also remove obsolete lists for mips5kc.
>
> if possible, i'd really like to kill off all the specialized mips lists and
> do selection purely based on fields in boards.cfg.
> -mike
I have to agree here.
M
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 04/11] MIPS: add register definition for EBase register
2011-11-25 8:43 ` Marek Vasut
@ 2011-11-25 12:10 ` Daniel Schwierzeck
0 siblings, 0 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-25 12:10 UTC (permalink / raw)
To: u-boot
On Fri, Nov 25, 2011 at 9:43 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
>> The CPUNum field in the Ebase register contains an unique identifier
>> for each CPU. This helps to distinguish between CPU cores in
>> multi-processor systems.
>>
>> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
>> ---
>> ?arch/mips/include/asm/mipsregs.h | ? 13 +++++++++++++
>> ?1 files changed, 13 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/mips/include/asm/mipsregs.h
>> b/arch/mips/include/asm/mipsregs.h index be7e5c6..15a9fd5 100644
>> --- a/arch/mips/include/asm/mipsregs.h
>> +++ b/arch/mips/include/asm/mipsregs.h
>> @@ -89,6 +89,13 @@
>> ?#define CP0_DWATCH $19
>>
>> ?/*
>> + * Additional Coprocessor 0 register names.
>> + * These registers are listed for completeness and are intended
>> + * for usage in assembly code.
>> + */
>> +#define CP0_EBASE $15,1
>> +
>> +/*
>> ? * Coprocessor 0 Set 1 register names
>> ? */
>> ?#define CP0_S1_DERRADDR0 ?$26
>> @@ -395,6 +402,12 @@
>> ?#define ?CAUSEF_BD ? ? ? ? ? (_ULCAST_(1) ? << 31)
>>
>> ?/*
>> + * Bits in the coprocessor 0 EBase register.
>> + */
>> +#define EBASEB_CPUNUM ? ? ? ? ? ? ? ?0
>> +#define EBASEF_CPUNUM ? ? ? ? ? ? ? ?(_ULCAST_(1023))
>
> What's this? Isn't the maximum CPU number on MIPS 32 CPUs? Or maybe that's only
> 4kc limit?
>
that is only the bit shift and bit mask for the CPUNum[9:0] field in
the EBase Register.
CPUNum = (EBASE & EBASEF_CPUNUM) >> EBASEB_CPUNUM
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
2011-11-25 8:44 ` Marek Vasut
@ 2011-11-25 12:19 ` Daniel Schwierzeck
2011-11-25 13:40 ` Marek Vasut
2011-11-25 15:35 ` Andrew Dyer
1 sibling, 1 reply; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-25 12:19 UTC (permalink / raw)
To: u-boot
On Fri, Nov 25, 2011 at 9:44 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
>> This handler can be activated on multi-processor systems to boot only
>> the master CPU. All slave CPUs are halted by executing the WAIT
>> instruction. This is also useful to reduce the power consumption at
>> boot time.
>>
>> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
>> ---
>> ?arch/mips/cpu/mips32/start.S | ? 16 ++++++++++++++++
>> ?1 files changed, 16 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
>> index 9c1b2f7..b6cb4be 100644
>> --- a/arch/mips/cpu/mips32/start.S
>> +++ b/arch/mips/cpu/mips32/start.S
>> @@ -224,6 +224,14 @@ reset:
>>
>> ? ? ? setup_c0_status_reset
>>
>> + ? ? /* Set all slave CPUs in sleep mode */
>> +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
>> + ? ? mfc0 ? ?k0, CP0_EBASE
>> + ? ? and ? ? k0, EBASEF_CPUNUM
>> + ? ? bne ? ? k0, zero, slave_cpu_sleep
>> + ? ? ?nop
>> +#endif
>> +
>> ? ? ? /* Init Timer */
>> ? ? ? mtc0 ? ?zero, CP0_COUNT
>> ? ? ? mtc0 ? ?zero, CP0_COMPARE
>> @@ -383,3 +391,11 @@ romReserved:
>>
>> ?romExcHandle:
>> ? ? ? b ? ? ? romExcHandle
>> +
>> + ? ? /* Additional handlers */
>> +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
>> +slave_cpu_sleep:
>> + ? ? wait
>> + ? ? b ? ? ? slave_cpu_sleep
>> + ? ? ?nop
>> +#endif
>
> Can't you stall the CPU instead of letting it run in an empty loop? If not:
>
> Acked-by: Marek Vasut <marek.vasut@gmail.com>
>
the CPU is stalled with the wait instruction. The loop is actually paranoia ;)
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
2011-11-25 8:49 ` Marek Vasut
@ 2011-11-25 12:29 ` Daniel Schwierzeck
2011-11-25 15:21 ` thomas.langer at lantiq.com
2011-11-25 19:52 ` Mike Frysinger
0 siblings, 2 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-25 12:29 UTC (permalink / raw)
To: u-boot
On Fri, Nov 25, 2011 at 9:49 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
>> On Thursday 24 November 2011 08:57:56 Daniel Schwierzeck wrote:
>> > Build dbau1550_el only in LIST_au1xx0_el and LIST_mips_el.
>> > Also remove obsolete lists for mips5kc.
>>
>> if possible, i'd really like to kill off all the specialized mips lists and
>> do selection purely based on fields in boards.cfg.
>> -mike
>
> I have to agree here.
> M
>
that is currently not possible because -EB and -EL are not properly
handled in CFLAGS and LDFLAGS.
Until this is fixed we have to run MAKEALL twice with mips and mipsel
and different toolchains.
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined
2011-11-25 8:39 ` Marek Vasut
@ 2011-11-25 12:37 ` Daniel Schwierzeck
2011-11-25 13:41 ` Marek Vasut
0 siblings, 1 reply; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-25 12:37 UTC (permalink / raw)
To: u-boot
On Fri, Nov 25, 2011 at 9:39 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
>> board.c: In function 'board_init_r':
>> board.c:280:8: warning: unused variable 's'
>>
>> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
>> ---
>> ?arch/mips/lib/board.c | ? ?3 +--
>> ?1 files changed, 1 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
>> index 9585db7..aac7690 100644
>> --- a/arch/mips/lib/board.c
>> +++ b/arch/mips/lib/board.c
>> @@ -266,7 +266,6 @@ void board_init_r(gd_t *id, ulong dest_addr)
>> ?#ifndef CONFIG_ENV_IS_NOWHERE
>> ? ? ? extern char *env_name_spec;
>> ?#endif
>> - ? ? char *s;
>> ? ? ? bd_t *bd;
>>
>> ? ? ? gd = id;
>> @@ -347,7 +346,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
>> ? ? ? /* Initialize from environment */
>> ? ? ? load_addr = getenv_ulong("loadaddr", 16, load_addr);
>> ?#if defined(CONFIG_CMD_NET)
>> - ? ? s = getenv("bootfile");
>> + ? ? const char *s = getenv("bootfile");
>> ? ? ? if (s)
>> ? ? ? ? ? ? ? copy_filename(BootFile, s, sizeof(BootFile));
>> ?#endif
>
> Are you sure about this "const" thing? Also, try compiling the stuff with
> gcc4.6, it'll reveal more errors.
>
yes, s is only used in the if and as parameter for copy_filename. The
function signature
also have const:
extern void copy_filename (char *dst, const char *src, int size);
And gcc-4.6.2 compiles that part without warnings.
--
Best regards,
Daniel
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
2011-11-25 12:19 ` Daniel Schwierzeck
@ 2011-11-25 13:40 ` Marek Vasut
0 siblings, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 13:40 UTC (permalink / raw)
To: u-boot
> On Fri, Nov 25, 2011 at 9:44 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
> >> This handler can be activated on multi-processor systems to boot only
> >> the master CPU. All slave CPUs are halted by executing the WAIT
> >> instruction. This is also useful to reduce the power consumption at
> >> boot time.
> >>
> >> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> >> ---
> >> arch/mips/cpu/mips32/start.S | 16 ++++++++++++++++
> >> 1 files changed, 16 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
> >> index 9c1b2f7..b6cb4be 100644
> >> --- a/arch/mips/cpu/mips32/start.S
> >> +++ b/arch/mips/cpu/mips32/start.S
> >> @@ -224,6 +224,14 @@ reset:
> >>
> >> setup_c0_status_reset
> >>
> >> + /* Set all slave CPUs in sleep mode */
> >> +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
> >> + mfc0 k0, CP0_EBASE
> >> + and k0, EBASEF_CPUNUM
> >> + bne k0, zero, slave_cpu_sleep
> >> + nop
> >> +#endif
> >> +
> >> /* Init Timer */
> >> mtc0 zero, CP0_COUNT
> >> mtc0 zero, CP0_COMPARE
> >> @@ -383,3 +391,11 @@ romReserved:
> >>
> >> romExcHandle:
> >> b romExcHandle
> >> +
> >> + /* Additional handlers */
> >> +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
> >> +slave_cpu_sleep:
> >> + wait
> >> + b slave_cpu_sleep
> >> + nop
> >> +#endif
> >
> > Can't you stall the CPU instead of letting it run in an empty loop? If
> > not:
> >
> > Acked-by: Marek Vasut <marek.vasut@gmail.com>
>
> the CPU is stalled with the wait instruction. The loop is actually paranoia
> ;)
>
> From MIPS32 24KE Processor Core Family Software User's Manual:
>
> The WAIT instruction forces the core into low power mode. The pipeline
> is stalled and when all external requests are
> completed, the processor?s main clock is stopped. The processor will
> restart when reset (SI_Reset) is signaled, or a
> non-masked interrupt is taken (SI_NMI, SI_Int, or EJ_DINT). Note that
> the core does not use the code field in this
> instruction.
Oh yea, this kind of stuff I remember like I hacked on it yesterday :)
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined
2011-11-25 12:37 ` Daniel Schwierzeck
@ 2011-11-25 13:41 ` Marek Vasut
0 siblings, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2011-11-25 13:41 UTC (permalink / raw)
To: u-boot
> On Fri, Nov 25, 2011 at 9:39 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
> >> board.c: In function 'board_init_r':
> >> board.c:280:8: warning: unused variable 's'
> >>
> >> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> >> ---
> >> arch/mips/lib/board.c | 3 +--
> >> 1 files changed, 1 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
> >> index 9585db7..aac7690 100644
> >> --- a/arch/mips/lib/board.c
> >> +++ b/arch/mips/lib/board.c
> >> @@ -266,7 +266,6 @@ void board_init_r(gd_t *id, ulong dest_addr)
> >> #ifndef CONFIG_ENV_IS_NOWHERE
> >> extern char *env_name_spec;
> >> #endif
> >> - char *s;
> >> bd_t *bd;
> >>
> >> gd = id;
> >> @@ -347,7 +346,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
> >> /* Initialize from environment */
> >> load_addr = getenv_ulong("loadaddr", 16, load_addr);
> >> #if defined(CONFIG_CMD_NET)
> >> - s = getenv("bootfile");
> >> + const char *s = getenv("bootfile");
> >> if (s)
> >> copy_filename(BootFile, s, sizeof(BootFile));
> >> #endif
> >
> > Are you sure about this "const" thing? Also, try compiling the stuff with
> > gcc4.6, it'll reveal more errors.
>
> yes, s is only used in the if and as parameter for copy_filename. The
> function signature
> also have const:
>
> extern void copy_filename (char *dst, const char *src, int size);
>
> And gcc-4.6.2 compiles that part without warnings.
Ok, that's good then! :)
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
2011-11-25 12:29 ` Daniel Schwierzeck
@ 2011-11-25 15:21 ` thomas.langer at lantiq.com
2011-11-25 19:52 ` Mike Frysinger
1 sibling, 0 replies; 50+ messages in thread
From: thomas.langer at lantiq.com @ 2011-11-25 15:21 UTC (permalink / raw)
To: u-boot
Hello Daniel,
Daniel Schwierzeck wrote on 2011-11-25:
> On Fri, Nov 25, 2011 at 9:49 AM, Marek Vasut <marek.vasut@gmail.com>
> wrote:
>>> On Thursday 24 November 2011 08:57:56 Daniel Schwierzeck wrote:
>>>> Build dbau1550_el only in LIST_au1xx0_el and LIST_mips_el.
>>>> Also remove obsolete lists for mips5kc.
>>>
>>> if possible, i'd really like to kill off all the specialized mips
>>> lists and do selection purely based on fields in boards.cfg. -mike
>>
>> I have to agree here.
>> M
>>
>
> that is currently not possible because -EB and -EL are not properly
> handled in CFLAGS and LDFLAGS.
> Until this is fixed we have to run MAKEALL twice with mips and mipsel
> and different toolchains.
I have seen that barebox[1] has got support for MIPS some releases ago.
They define the endianess in the config, so it is easier to handle in the
build process.
Also the handling of compiler and linker options is more optimized[2].
Maybe we should take advantage of it and port some of this over to u-boot?
I think the current handling of -EB and -EL is still from Wolfgangs first
port of a MIPS board.
Best Regards,
Thomas
PS: Sorry for sending multiple times, I have problem to suppress base64 encoding.
I hope it is okay now.
[1] http://www.barebox.org/
[2] http://git.pengutronix.de/?p=barebox.git;a=blob;f=arch/mips/Makefile;hb=HEAD
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
2011-11-25 8:44 ` Marek Vasut
2011-11-25 12:19 ` Daniel Schwierzeck
@ 2011-11-25 15:35 ` Andrew Dyer
1 sibling, 0 replies; 50+ messages in thread
From: Andrew Dyer @ 2011-11-25 15:35 UTC (permalink / raw)
To: u-boot
On Fri, Nov 25, 2011 at 02:44, Marek Vasut <marek.vasut@gmail.com> wrote:
> > This handler can be activated on multi-processor systems to boot only
> > the master CPU. All slave CPUs are halted by executing the WAIT
> > instruction. This is also useful to reduce the power consumption at
> > boot time.
> >
> > Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> > ---
> > arch/mips/cpu/mips32/start.S | 16 ++++++++++++++++
> > 1 files changed, 16 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
> > index 9c1b2f7..b6cb4be 100644
> > --- a/arch/mips/cpu/mips32/start.S
> > +++ b/arch/mips/cpu/mips32/start.S
> > @@ -224,6 +224,14 @@ reset:
> >
> > setup_c0_status_reset
> >
> > + /* Set all slave CPUs in sleep mode */
> > +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
>
shouldn't this be CONFIG_SYS_MIPS_SLAVE_CPU_SLEEP? (s/MPS/MIPS/)
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
2011-11-25 12:29 ` Daniel Schwierzeck
2011-11-25 15:21 ` thomas.langer at lantiq.com
@ 2011-11-25 19:52 ` Mike Frysinger
1 sibling, 0 replies; 50+ messages in thread
From: Mike Frysinger @ 2011-11-25 19:52 UTC (permalink / raw)
To: u-boot
On Friday 25 November 2011 07:29:57 Daniel Schwierzeck wrote:
> On Fri, Nov 25, 2011 at 9:49 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
> >> On Thursday 24 November 2011 08:57:56 Daniel Schwierzeck wrote:
> >> > Build dbau1550_el only in LIST_au1xx0_el and LIST_mips_el.
> >> > Also remove obsolete lists for mips5kc.
> >>
> >> if possible, i'd really like to kill off all the specialized mips lists
> >> and do selection purely based on fields in boards.cfg.
> >
> > I have to agree here.
>
> that is currently not possible because -EB and -EL are not properly
> handled in CFLAGS and LDFLAGS.
can we get this fixed ? it makes running MAKEALL a pain (i've hit this a few
times).
are there any mips cores which can run in either endian ? if so, we should
add a config option to control this which the top level Makefile can key off of.
otherwise, should be easy to tweak the subdirs in arch/mips/ to add -EB/-EL as
needed.
the top level option would be useful for arm boards though as they do have
processors that can run in either endian ...
-mike
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^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
2011-11-24 13:57 ` [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems Daniel Schwierzeck
2011-11-25 8:44 ` Marek Vasut
@ 2011-11-28 16:24 ` Shinya Kuribayashi
2011-11-29 15:54 ` Daniel Schwierzeck
1 sibling, 1 reply; 50+ messages in thread
From: Shinya Kuribayashi @ 2011-11-28 16:24 UTC (permalink / raw)
To: u-boot
On 11/24/11 10:57 PM, Daniel Schwierzeck wrote:
> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
> index 9c1b2f7..b6cb4be 100644
> --- a/arch/mips/cpu/mips32/start.S
> +++ b/arch/mips/cpu/mips32/start.S
> @@ -224,6 +224,14 @@ reset:
>
> setup_c0_status_reset
>
> + /* Set all slave CPUs in sleep mode */
> +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
> + mfc0 k0, CP0_EBASE
> + and k0, EBASEF_CPUNUM
> + bne k0, zero, slave_cpu_sleep
> + nop
> +#endif
> +
> /* Init Timer */
> mtc0 zero, CP0_COUNT
> mtc0 zero, CP0_COMPARE
Just wondered, why is this conditionally selected? To save text size,
or other reason?
The change looks Ok with s/MPS/MIPS/ typo fixed as pointed by Andrew.
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores
2011-11-24 13:57 ` [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores Daniel Schwierzeck
2011-11-25 8:47 ` Marek Vasut
@ 2011-11-28 16:48 ` Shinya Kuribayashi
2011-11-29 15:44 ` Daniel Schwierzeck
2011-11-30 12:39 ` [U-Boot] [PATCH v2 08/10] MIPS: start.S: refactor reset and exception vector setup Daniel Schwierzeck
2 siblings, 1 reply; 50+ messages in thread
From: Shinya Kuribayashi @ 2011-11-28 16:48 UTC (permalink / raw)
To: u-boot
On 11/24/11 10:57 PM, Daniel Schwierzeck wrote:
> @@ -206,11 +206,28 @@ _start:
> RVECENT(romReserved,125)
> RVECENT(romReserved,126)
> RVECENT(romReserved,127)
> + XVECENT(romExcHandle,0x400);
> + RVECENT(romReserved,129);
> + RVECENT(romReserved,130);
> + RVECENT(romReserved,131);
> + RVECENT(romReserved,132);
> + RVECENT(romReserved,133);
> + RVECENT(romReserved,134);
> + RVECENT(romReserved,135);
> + RVECENT(romReserved,136);
> + RVECENT(romReserved,137);
> + RVECENT(romReserved,138);
> + RVECENT(romReserved,139);
> + RVECENT(romReserved,140);
> + RVECENT(romReserved,141);
> + RVECENT(romReserved,142);
> + RVECENT(romReserved,143);
> + XVECENT(romExcHandle,0x480); # bfc00480: EJTAG debug exception
>
> /*
> * We hope there are no more reserved vectors!
> - * 128 * 8 == 1024 == 0x400
> - * so this is address R_VEC+0x400 == 0xbfc00400
> + * 144 * 8 == 1152 == 0x480
> + * so this is address R_VEC+0x480 == 0xbfc00480
> */
> .align 4
> reset:
IIUC those exception vectors of +0x400/+0x480 have nothing to do with
24K processor core nor 34K either.
The change itself is Ok, and any other version taking Marek's comment
into account is also welcome.
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores
2011-11-28 16:48 ` Shinya Kuribayashi
@ 2011-11-29 15:44 ` Daniel Schwierzeck
0 siblings, 0 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-29 15:44 UTC (permalink / raw)
To: u-boot
On Mon, Nov 28, 2011 at 5:48 PM, Shinya Kuribayashi <skuribay@pobox.com> wrote:
> On 11/24/11 10:57 PM, Daniel Schwierzeck wrote:
>>
>> @@ -206,11 +206,28 @@ _start:
>> ? ? ? ?RVECENT(romReserved,125)
>> ? ? ? ?RVECENT(romReserved,126)
>> ? ? ? ?RVECENT(romReserved,127)
>> + ? ? ? XVECENT(romExcHandle,0x400);
>> + ? ? ? RVECENT(romReserved,129);
>> + ? ? ? RVECENT(romReserved,130);
>> + ? ? ? RVECENT(romReserved,131);
>> + ? ? ? RVECENT(romReserved,132);
>> + ? ? ? RVECENT(romReserved,133);
>> + ? ? ? RVECENT(romReserved,134);
>> + ? ? ? RVECENT(romReserved,135);
>> + ? ? ? RVECENT(romReserved,136);
>> + ? ? ? RVECENT(romReserved,137);
>> + ? ? ? RVECENT(romReserved,138);
>> + ? ? ? RVECENT(romReserved,139);
>> + ? ? ? RVECENT(romReserved,140);
>> + ? ? ? RVECENT(romReserved,141);
>> + ? ? ? RVECENT(romReserved,142);
>> + ? ? ? RVECENT(romReserved,143);
>> + ? ? ? XVECENT(romExcHandle,0x480); ? ?# bfc00480: EJTAG debug exception
>>
>> ? ? ? ?/*
>> ? ? ? ? * We hope there are no more reserved vectors!
>> - ? ? ? ?* 128 * 8 == 1024 == 0x400
>> - ? ? ? ?* so this is address R_VEC+0x400 == 0xbfc00400
>> + ? ? ? ?* 144 * 8 == 1152 == 0x480
>> + ? ? ? ?* so this is address R_VEC+0x480 == 0xbfc00480
>> ? ? ? ? */
>> ? ? ? ?.align 4
>> ?reset:
>
> IIUC those exception vectors of +0x400/+0x480 have nothing to do with
> 24K processor core nor 34K either.
yes you're right. The 4K core (and others) also have an EJTAG
exception vector at 0x480.
I'll rename the patch subject.
>
> The change itself is Ok, and any other version taking Marek's comment
> into account is also welcome.
>
>
ok then I'll rewrite the RVECENT and XVECENT macros and the complete
exception vector setup to get rid
of the already existing copy&paste code.
--
Best regards,
Daniel
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
2011-11-28 16:24 ` Shinya Kuribayashi
@ 2011-11-29 15:54 ` Daniel Schwierzeck
0 siblings, 0 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-29 15:54 UTC (permalink / raw)
To: u-boot
On Mon, Nov 28, 2011 at 5:24 PM, Shinya Kuribayashi <skuribay@pobox.com> wrote:
> On 11/24/11 10:57 PM, Daniel Schwierzeck wrote:
>>
>> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
>> index 9c1b2f7..b6cb4be 100644
>> --- a/arch/mips/cpu/mips32/start.S
>> +++ b/arch/mips/cpu/mips32/start.S
>> @@ -224,6 +224,14 @@ reset:
>>
>> ? ? ? ?setup_c0_status_reset
>>
>> + ? ? ? /* Set all slave CPUs in sleep mode */
>> +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
>> + ? ? ? mfc0 ? ?k0, CP0_EBASE
>> + ? ? ? and ? ? k0, EBASEF_CPUNUM
>> + ? ? ? bne ? ? k0, zero, slave_cpu_sleep
>> + ? ? ? ?nop
>> +#endif
>> +
>> ? ? ? ?/* Init Timer */
>> ? ? ? ?mtc0 ? ?zero, CP0_COUNT
>> ? ? ? ?mtc0 ? ?zero, CP0_COMPARE
>
> Just wondered, why is this conditionally selected? ?To save text size,
> or other reason?
>
> The change looks Ok with s/MPS/MIPS/ typo fixed as pointed by Andrew.
>
the patch is relevant only for Lantiq XWAY Danube SoCs which have two 24KC cores
and is ported from Lantiq BSPs.
Actually the internal BootROM already handles the second CPU core.
This code is only
executed, if the board boots from parallel NOR flash without involving
the BootROM. This
is selectable by pin-strapping. But in this mode the second CPU needs
some additonal handling.
So please ignore this patch for the current series. I'll send another
one in the upcoming
Danube SoC support series. Thanks.
--
Best regards,
Daniel
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH v2 01/11] MIPS: board.c: make checkpatch.pl clean
2011-11-24 13:57 ` [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean Daniel Schwierzeck
2011-11-25 8:38 ` Marek Vasut
@ 2011-11-30 12:39 ` Daniel Schwierzeck
2011-12-09 9:52 ` [U-Boot] [PATCH " Wolfgang Denk
2 siblings, 0 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-30 12:39 UTC (permalink / raw)
To: u-boot
WARNING: line over 80 characters
WARNING: space prohibited between function name and open parenthesis '('
WARNING: braces {} are not necessary for single statement blocks
ERROR: return is not a function, parentheses are not required
ERROR: do not use assignment in if condition
ERROR: trailing statements should be on next line
ERROR: "foo * bar" should be "foo *bar"
ERROR: spaces required around that ':' (ctx:WxV)
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
Changes for v2:
- fixed additional single line and multi line comments
arch/mips/lib/board.c | 146 +++++++++++++++++++++++--------------------------
1 files changed, 69 insertions(+), 77 deletions(-)
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index 1274d63..cd7e942 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -64,42 +64,43 @@ int __board_early_init_f(void)
*/
return 0;
}
-int board_early_init_f(void) __attribute__((weak, alias("__board_early_init_f")));
+int board_early_init_f(void)
+ __attribute__((weak, alias("__board_early_init_f")));
-static int init_func_ram (void)
+static int init_func_ram(void)
{
#ifdef CONFIG_BOARD_TYPES
int board_type = gd->board_type;
#else
int board_type = 0; /* use dummy arg */
#endif
- puts ("DRAM: ");
+ puts("DRAM: ");
- if ((gd->ram_size = initdram (board_type)) > 0) {
- print_size (gd->ram_size, "\n");
- return (0);
+ gd->ram_size = initdram(board_type);
+ if (gd->ram_size) {
+ print_size(gd->ram_size, "\n");
+ return 0;
}
- puts (failed);
- return (1);
+ puts(failed);
+ return 1;
}
static int display_banner(void)
{
-
- printf ("\n\n%s\n\n", version_string);
- return (0);
+ printf("\n\n%s\n\n", version_string);
+ return 0;
}
#ifndef CONFIG_SYS_NO_FLASH
static void display_flash_config(ulong size)
{
- puts ("Flash: ");
- print_size (size, "\n");
+ puts("Flash: ");
+ print_size(size, "\n");
}
#endif
-static int init_baudrate (void)
+static int init_baudrate(void)
{
gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
return 0;
@@ -133,7 +134,8 @@ init_fnc_t *init_sequence[] = {
timer_init,
env_init, /* initialize environment */
#ifdef CONFIG_INCA_IP
- incaip_set_cpuclk, /* set cpu clock according to environment variable */
+ /* set cpu clock according to environment variable */
+ incaip_set_cpuclk,
#endif
init_baudrate, /* initialze baudrate settings */
serial_init, /* serial communications setup */
@@ -153,18 +155,17 @@ void board_init_f(ulong bootflag)
ulong addr, addr_sp, len = (ulong)&uboot_end - CONFIG_SYS_MONITOR_BASE;
ulong *s;
- /* Pointer is writable since we allocated a register for it.
- */
+ /* Pointer is writable since we allocated a register for it. */
gd = &gd_data;
+
/* compiler optimization barrier needed for GCC >= 3.4 */
- __asm__ __volatile__("": : :"memory");
+ __asm__ __volatile__("" : : : "memory");
- memset ((void *)gd, 0, sizeof (gd_t));
+ memset((void *)gd, 0, sizeof(gd_t));
for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
- if ((*init_fnc_ptr)() != 0) {
- hang ();
- }
+ if ((*init_fnc_ptr)() != 0)
+ hang();
}
/*
@@ -173,26 +174,24 @@ void board_init_f(ulong bootflag)
*/
addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
- /* We can reserve some RAM "on top" here.
- */
+ /* We can reserve some RAM "on top" here. */
- /* round down to next 4 kB limit.
- */
+ /* round down to next 4 kB limit. */
addr &= ~(4096 - 1);
- debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
+ debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
- /* Reserve memory for U-Boot code, data & bss
+ /*
+ * Reserve memory for U-Boot code, data & bss
* round down to next 16 kB limit
*/
addr -= len;
addr &= ~(16 * 1024 - 1);
- debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
+ debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
- /* Reserve memory for malloc() arena.
- */
+ /* Reserve memory for malloc() arena. */
addr_sp = addr - TOTAL_MALLOC_LEN;
- debug ("Reserving %dk for malloc() at: %08lx\n",
+ debug("Reserving %dk for malloc() at: %08lx\n",
TOTAL_MALLOC_LEN >> 10, addr_sp);
/*
@@ -202,19 +201,18 @@ void board_init_f(ulong bootflag)
addr_sp -= sizeof(bd_t);
bd = (bd_t *)addr_sp;
gd->bd = bd;
- debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
+ debug("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof(bd_t), addr_sp);
addr_sp -= sizeof(gd_t);
id = (gd_t *)addr_sp;
- debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
- sizeof (gd_t), addr_sp);
+ debug("Reserving %zu Bytes for Global Data at: %08lx\n",
+ sizeof(gd_t), addr_sp);
- /* Reserve memory for boot params.
- */
+ /* Reserve memory for boot params. */
addr_sp -= CONFIG_SYS_BOOTPARAMS_LEN;
bd->bi_boot_params = addr_sp;
- debug ("Reserving %dk for boot params() at: %08lx\n",
+ debug("Reserving %dk for boot params() at: %08lx\n",
CONFIG_SYS_BOOTPARAMS_LEN >> 10, addr_sp);
/*
@@ -229,18 +227,16 @@ void board_init_f(ulong bootflag)
*s-- = 0;
*s-- = 0;
addr_sp = (ulong)s;
- debug ("Stack Pointer at: %08lx\n", addr_sp);
+ debug("Stack Pointer at: %08lx\n", addr_sp);
- /*
- * Save local variables to board info struct
- */
- bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */
- bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
- bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
+ /* Save local variables to board info struct */
+ bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */
+ bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
+ bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
- memcpy (id, (void *)gd, sizeof (gd_t));
+ memcpy(id, (void *)gd, sizeof(gd_t));
- relocate_code (addr_sp, id, addr);
+ relocate_code(addr_sp, id, addr);
/* NOTREACHED - relocate_code() does not return */
}
@@ -254,14 +250,14 @@ void board_init_f(ulong bootflag)
************************************************************************
*/
-void board_init_r (gd_t *id, ulong dest_addr)
+void board_init_r(gd_t *id, ulong dest_addr)
{
#ifndef CONFIG_SYS_NO_FLASH
ulong size;
#endif
- extern void malloc_bin_reloc (void);
+ extern void malloc_bin_reloc(void);
#ifndef CONFIG_ENV_IS_NOWHERE
- extern char * env_name_spec;
+ extern char *env_name_spec;
#endif
char *s;
bd_t *bd;
@@ -269,16 +265,14 @@ void board_init_r (gd_t *id, ulong dest_addr)
gd = id;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
- debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
+ debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
gd->reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE;
monitor_flash_len = (ulong)&uboot_end_data - dest_addr;
#if defined(CONFIG_NEEDS_MANUAL_RELOC)
- /*
- * We have to relocate the command table manually
- */
+ /* We have to relocate the command table manually */
fixup_cmdtable(&__u_boot_cmd_start,
(ulong)(&__u_boot_cmd_end - &__u_boot_cmd_start));
#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */
@@ -298,7 +292,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
#ifndef CONFIG_SYS_NO_FLASH
/* configure available FLASH banks */
size = flash_init();
- display_flash_config (size);
+ display_flash_config(size);
bd->bi_flashsize = size;
#endif
@@ -310,8 +304,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
#endif
#ifdef CONFIG_CMD_NAND
- puts ("NAND: ");
- nand_init (); /* go init the NAND */
+ puts("NAND: ");
+ nand_init(); /* go init the NAND */
#endif
#if defined(CONFIG_CMD_ONENAND)
@@ -325,59 +319,57 @@ void board_init_r (gd_t *id, ulong dest_addr)
bd->bi_ip_addr = getenv_IPaddr("ipaddr");
#if defined(CONFIG_PCI)
- /*
- * Do pci configuration
- */
+ /* Do pci configuration */
pci_init();
#endif
/** leave this here (after malloc(), environment and PCI are working) **/
/* Initialize stdio devices */
- stdio_init ();
+ stdio_init();
- jumptable_init ();
+ jumptable_init();
/* Initialize the console (after the relocation and devices init) */
- console_init_r ();
+ console_init_r();
/** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** **/
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
#if defined(CONFIG_CMD_NET)
- if ((s = getenv ("bootfile")) != NULL) {
- copy_filename (BootFile, s, sizeof (BootFile));
- }
+ s = getenv("bootfile");
+ if (s)
+ copy_filename(BootFile, s, sizeof(BootFile));
#endif
#ifdef CONFIG_CMD_SPI
- puts ("SPI: ");
- spi_init (); /* go init the SPI */
- puts ("ready\n");
+ puts("SPI: ");
+ spi_init(); /* go init the SPI */
+ puts("ready\n");
#endif
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
- misc_init_r ();
+ misc_init_r();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
- puts ("Net: ");
+ puts("Net: ");
eth_initialize(gd->bd);
#endif
/* main_loop() can return to retry autoboot, if so just run it again. */
- for (;;) {
- main_loop ();
- }
+ for (;;)
+ main_loop();
/* NOTREACHED - no way out of command loop except booting */
}
-void hang (void)
+void hang(void)
{
- puts ("### ERROR ### Please RESET the board ###\n");
- for (;;);
+ puts("### ERROR ### Please RESET the board ###\n");
+ for (;;)
+ ;
}
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH v2 07/10] MIPS: extend cache initialization for recent MIPS CPU cores
2011-11-24 13:57 ` [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores Daniel Schwierzeck
2011-11-25 8:46 ` Marek Vasut
@ 2011-11-30 12:39 ` Daniel Schwierzeck
1 sibling, 0 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-30 12:39 UTC (permalink / raw)
To: u-boot
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
Changes for v2:
- updated patch subject
- removed CPU specific #ifdefs
- added description for config option CONFIG_SYS_MIPS_CACHE_EXT_INIT
to README
README | 5 +++++
arch/mips/cpu/mips32/cache.S | 10 ++++++++++
arch/mips/include/asm/mipsregs.h | 9 ++++++++-
3 files changed, 23 insertions(+), 1 deletions(-)
diff --git a/README b/README
index 07f1d11..834dd45 100644
--- a/README
+++ b/README
@@ -409,6 +409,11 @@ The following options need to be configured:
CONF_CM_CACHABLE_CUW
CONF_CM_CACHABLE_ACCELERATED
+ CONFIG_SYS_MIPS_CACHE_EXT_INIT
+
+ Enable this to use extended cache initialization for recent
+ MIPS CPU cores.
+
CONFIG_SYS_XWAY_EBU_BOOTCFG
Special option for Lantiq XWAY SoCs for booting from NOR flash.
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index e683e8b..316e961 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -81,7 +81,12 @@
*/
LEAF(mips_init_icache)
blez a1, 9f
+#ifdef CONFIG_SYS_MIPS_CACHE_EXT_INIT
+ mtc0 zero, CP0_ITAGLO
+ mtc0 zero, CP0_IDATALO
+#else
mtc0 zero, CP0_TAGLO
+#endif
/* clear tag to invalidate */
PTR_LI t0, INDEX_BASE
PTR_ADDU t1, t0, a1
@@ -106,7 +111,12 @@ LEAF(mips_init_icache)
*/
LEAF(mips_init_dcache)
blez a1, 9f
+#ifdef CONFIG_SYS_MIPS_CACHE_EXT_INIT
+ mtc0 zero, CP0_DTAGLO
+ mtc0 zero, CP0_DDATALO
+#else
mtc0 zero, CP0_TAGLO
+#endif
/* clear all tags */
PTR_LI t0, INDEX_BASE
PTR_ADDU t1, t0, a1
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 15a9fd5..07a3cf6 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -93,7 +93,14 @@
* These registers are listed for completeness and are intended
* for usage in assembly code.
*/
-#define CP0_EBASE $15,1
+#define CP0_EBASE $15,1
+/* L1 I-Cache */
+#define CP0_ITAGLO $28
+#define CP0_IDATALO $28,1
+#define CP0_IDATAHI $29,1
+/* L1 D-Cache */
+#define CP0_DTAGLO $28,2
+#define CP0_DDATALO $28,3
/*
* Coprocessor 0 Set 1 register names
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH v2 08/10] MIPS: start.S: refactor reset and exception vector setup
2011-11-24 13:57 ` [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores Daniel Schwierzeck
2011-11-25 8:47 ` Marek Vasut
2011-11-28 16:48 ` Shinya Kuribayashi
@ 2011-11-30 12:39 ` Daniel Schwierzeck
2 siblings, 0 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-11-30 12:39 UTC (permalink / raw)
To: u-boot
Use assembler macros for vector and handler setup.
Only implement the specific vectors offsets and let the
assembler fill the gap with zeroes.
Add missing exception vectors and handlers for Interrupt, CauseIV and
EJTAG debug.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
Changes for v2:
- updated patch subject
- refactored reset and exception vector setup
arch/mips/cpu/mips32/start.S | 204 +++++++++++-------------------------------
1 files changed, 53 insertions(+), 151 deletions(-)
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 9c1b2f7..2b2bebf 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -55,163 +55,61 @@
#endif
.endm
-#define RVECENT(f,n) \
- b f; nop
-#define XVECENT(f,bev) \
- b f ; \
- li k0,bev
-
- .set noreorder
-
- .globl _start
- .text
-_start:
- RVECENT(reset,0) # U-boot entry point
- RVECENT(reset,1) # software reboot
-#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
/*
* Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
* access external NOR flashes. If the board boots from NOR flash the
* internal BootROM does a blind read at address 0xB0000010 to read the
* initial configuration for that EBU in order to access the flash
* device with correct parameters. This config option is board-specific.
+ * Default to 0 if this option is not set.
*/
- .word CONFIG_SYS_XWAY_EBU_BOOTCFG
- .word 0x00000000
+ .macro lantiq_soc_bootcfg
+ .set push
+ .set noreorder
+ .org 0x10
+#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
+ .word CONFIG_SYS_XWAY_EBU_BOOTCFG
#else
- RVECENT(romReserved,2)
+ .word 0
#endif
- RVECENT(romReserved,3)
- RVECENT(romReserved,4)
- RVECENT(romReserved,5)
- RVECENT(romReserved,6)
- RVECENT(romReserved,7)
- RVECENT(romReserved,8)
- RVECENT(romReserved,9)
- RVECENT(romReserved,10)
- RVECENT(romReserved,11)
- RVECENT(romReserved,12)
- RVECENT(romReserved,13)
- RVECENT(romReserved,14)
- RVECENT(romReserved,15)
- RVECENT(romReserved,16)
- RVECENT(romReserved,17)
- RVECENT(romReserved,18)
- RVECENT(romReserved,19)
- RVECENT(romReserved,20)
- RVECENT(romReserved,21)
- RVECENT(romReserved,22)
- RVECENT(romReserved,23)
- RVECENT(romReserved,24)
- RVECENT(romReserved,25)
- RVECENT(romReserved,26)
- RVECENT(romReserved,27)
- RVECENT(romReserved,28)
- RVECENT(romReserved,29)
- RVECENT(romReserved,30)
- RVECENT(romReserved,31)
- RVECENT(romReserved,32)
- RVECENT(romReserved,33)
- RVECENT(romReserved,34)
- RVECENT(romReserved,35)
- RVECENT(romReserved,36)
- RVECENT(romReserved,37)
- RVECENT(romReserved,38)
- RVECENT(romReserved,39)
- RVECENT(romReserved,40)
- RVECENT(romReserved,41)
- RVECENT(romReserved,42)
- RVECENT(romReserved,43)
- RVECENT(romReserved,44)
- RVECENT(romReserved,45)
- RVECENT(romReserved,46)
- RVECENT(romReserved,47)
- RVECENT(romReserved,48)
- RVECENT(romReserved,49)
- RVECENT(romReserved,50)
- RVECENT(romReserved,51)
- RVECENT(romReserved,52)
- RVECENT(romReserved,53)
- RVECENT(romReserved,54)
- RVECENT(romReserved,55)
- RVECENT(romReserved,56)
- RVECENT(romReserved,57)
- RVECENT(romReserved,58)
- RVECENT(romReserved,59)
- RVECENT(romReserved,60)
- RVECENT(romReserved,61)
- RVECENT(romReserved,62)
- RVECENT(romReserved,63)
- XVECENT(romExcHandle,0x200) # bfc00200: R4000 tlbmiss vector
- RVECENT(romReserved,65)
- RVECENT(romReserved,66)
- RVECENT(romReserved,67)
- RVECENT(romReserved,68)
- RVECENT(romReserved,69)
- RVECENT(romReserved,70)
- RVECENT(romReserved,71)
- RVECENT(romReserved,72)
- RVECENT(romReserved,73)
- RVECENT(romReserved,74)
- RVECENT(romReserved,75)
- RVECENT(romReserved,76)
- RVECENT(romReserved,77)
- RVECENT(romReserved,78)
- RVECENT(romReserved,79)
- XVECENT(romExcHandle,0x280) # bfc00280: R4000 xtlbmiss vector
- RVECENT(romReserved,81)
- RVECENT(romReserved,82)
- RVECENT(romReserved,83)
- RVECENT(romReserved,84)
- RVECENT(romReserved,85)
- RVECENT(romReserved,86)
- RVECENT(romReserved,87)
- RVECENT(romReserved,88)
- RVECENT(romReserved,89)
- RVECENT(romReserved,90)
- RVECENT(romReserved,91)
- RVECENT(romReserved,92)
- RVECENT(romReserved,93)
- RVECENT(romReserved,94)
- RVECENT(romReserved,95)
- XVECENT(romExcHandle,0x300) # bfc00300: R4000 cache vector
- RVECENT(romReserved,97)
- RVECENT(romReserved,98)
- RVECENT(romReserved,99)
- RVECENT(romReserved,100)
- RVECENT(romReserved,101)
- RVECENT(romReserved,102)
- RVECENT(romReserved,103)
- RVECENT(romReserved,104)
- RVECENT(romReserved,105)
- RVECENT(romReserved,106)
- RVECENT(romReserved,107)
- RVECENT(romReserved,108)
- RVECENT(romReserved,109)
- RVECENT(romReserved,110)
- RVECENT(romReserved,111)
- XVECENT(romExcHandle,0x380) # bfc00380: R4000 general vector
- RVECENT(romReserved,113)
- RVECENT(romReserved,114)
- RVECENT(romReserved,115)
- RVECENT(romReserved,116)
- RVECENT(romReserved,116)
- RVECENT(romReserved,118)
- RVECENT(romReserved,119)
- RVECENT(romReserved,120)
- RVECENT(romReserved,121)
- RVECENT(romReserved,122)
- RVECENT(romReserved,123)
- RVECENT(romReserved,124)
- RVECENT(romReserved,125)
- RVECENT(romReserved,126)
- RVECENT(romReserved,127)
+ .word 0
+ .set pop
+ .endm
+
+ .macro reset_vector branch
+ .set push
+ .set noreorder
+ b \branch
+ nop
+ .set pop
+ .endm
+
+ .macro exception_vector offset branch
+ .set push
+ .set noreorder
+ .org \offset
+ b \branch
+ li k0, \offset
+ .set pop
+ .endm
+
+ .set noreorder
+
+ .globl _start
+ .text
+_start:
+ reset_vector reset # U-boot entry point
+ reset_vector reset # software reboot
+
+ lantiq_soc_bootcfg # Lantiq SoC Boot config word
+
+ exception_vector 0x200, halt # TLB miss
+ exception_vector 0x280, halt # XTLB miss
+ exception_vector 0x300, halt # Cache error
+ exception_vector 0x380, halt # General
+ exception_vector 0x400, halt # Interrupt, CauseIV
+ exception_vector 0x480, ejtag_exception # EJTAG debug
- /*
- * We hope there are no more reserved vectors!
- * 128 * 8 == 1024 == 0x400
- * so this is address R_VEC+0x400 == 0xbfc00400
- */
.align 4
reset:
@@ -378,8 +276,12 @@ in_ram:
.end relocate_code
/* Exception handlers */
-romReserved:
- b romReserved
+ejtag_exception:
+ /* Set DEPC to halt and exit debug mode */
+ la k1, halt
+ mtc0 k1, CP0_DEPC
+ deret
+ nop
-romExcHandle:
- b romExcHandle
+halt:
+ b halt
--
1.7.7.2
^ permalink raw reply related [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined
2011-11-24 13:57 ` [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined Daniel Schwierzeck
2011-11-25 8:39 ` Marek Vasut
@ 2011-12-09 9:50 ` Wolfgang Denk
2011-12-09 12:34 ` Daniel Schwierzeck
1 sibling, 1 reply; 50+ messages in thread
From: Wolfgang Denk @ 2011-12-09 9:50 UTC (permalink / raw)
To: u-boot
Dear Daniel Schwierzeck,
In message <1322143076-20349-3-git-send-email-daniel.schwierzeck@googlemail.com> you wrote:
> board.c: In function 'board_init_r':
> board.c:280:8: warning: unused variable 's'
...
> /* Initialize from environment */
> load_addr = getenv_ulong("loadaddr", 16, load_addr);
> #if defined(CONFIG_CMD_NET)
> - s = getenv("bootfile");
> + const char *s = getenv("bootfile");
> if (s)
> copy_filename(BootFile, s, sizeof(BootFile));
We don't allow declarations in the middle of the code.
[This issue has also been fixed since, so no further actiuvity needed.]
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
I was playing poker the other night... with Tarot cards. I got a full
house and 4 people died. - Steven Wright
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean
2011-11-24 13:57 ` [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean Daniel Schwierzeck
2011-11-25 8:38 ` Marek Vasut
2011-11-30 12:39 ` [U-Boot] [PATCH v2 " Daniel Schwierzeck
@ 2011-12-09 9:52 ` Wolfgang Denk
2 siblings, 0 replies; 50+ messages in thread
From: Wolfgang Denk @ 2011-12-09 9:52 UTC (permalink / raw)
To: u-boot
Dear Daniel Schwierzeck,
In message <1322143076-20349-2-git-send-email-daniel.schwierzeck@googlemail.com> you wrote:
> WARNING: line over 80 characters
> WARNING: space prohibited between function name and open parenthesis '('
> WARNING: braces {} are not necessary for single statement blocks
> ERROR: return is not a function, parentheses are not required
> ERROR: do not use assignment in if condition
> ERROR: trailing statements should be on next line
> ERROR: "foo * bar" should be "foo *bar"
> ERROR: spaces required around that ':' (ctx:WxV)
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> ---
> arch/mips/lib/board.c | 119 +++++++++++++++++++++++++------------------------
> 1 files changed, 61 insertions(+), 58 deletions(-)
Argh. I missed your patch, and redid this work. Stupid me :-(
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
To the systems programmer, users and applications serve only to
provide a test load.
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
2011-11-24 13:57 ` [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards Daniel Schwierzeck
2011-11-24 17:41 ` Mike Frysinger
@ 2011-12-09 9:53 ` Wolfgang Denk
1 sibling, 0 replies; 50+ messages in thread
From: Wolfgang Denk @ 2011-12-09 9:53 UTC (permalink / raw)
To: u-boot
Dear Daniel Schwierzeck,
In message <1322143076-20349-12-git-send-email-daniel.schwierzeck@googlemail.com> you wrote:
> Build dbau1550_el only in LIST_au1xx0_el and LIST_mips_el.
> Also remove obsolete lists for mips5kc.
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> Cc: Thomas Lange <thomas@corelatus.se>
> ---
> MAKEALL | 11 ++---------
> 1 files changed, 2 insertions(+), 9 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"More software projects have gone awry for lack of calendar time than
for all other causes combined."
- Fred Brooks, Jr., _The Mythical Man Month_
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined
2011-12-09 9:50 ` Wolfgang Denk
@ 2011-12-09 12:34 ` Daniel Schwierzeck
0 siblings, 0 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2011-12-09 12:34 UTC (permalink / raw)
To: u-boot
Hi Wolfgang,
On Fri, Dec 9, 2011 at 10:50 AM, Wolfgang Denk <wd@denx.de> wrote:
> Dear Daniel Schwierzeck,
>
> In message <1322143076-20349-3-git-send-email-daniel.schwierzeck@googlemail.com> you wrote:
>> board.c: In function 'board_init_r':
>> board.c:280:8: warning: unused variable 's'
> ...
>> ? ? ? /* Initialize from environment */
>> ? ? ? load_addr = getenv_ulong("loadaddr", 16, load_addr);
>> ?#if defined(CONFIG_CMD_NET)
>> - ? ? s = getenv("bootfile");
>> + ? ? const char *s = getenv("bootfile");
>> ? ? ? if (s)
>> ? ? ? ? ? ? ? copy_filename(BootFile, s, sizeof(BootFile));
>
> We don't allow declarations in the middle of the code.
>
> [This issue has also been fixed since, so no further actiuvity needed.]
ok, I marked my patch in patchwork as superseded.
--
Thanks and regards,
Daniel
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 00/11] MIPS: fixes and updates
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
` (10 preceding siblings ...)
2011-11-24 13:57 ` [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards Daniel Schwierzeck
@ 2012-03-31 20:49 ` Marek Vasut
2012-04-02 11:54 ` Daniel Schwierzeck
11 siblings, 1 reply; 50+ messages in thread
From: Marek Vasut @ 2012-03-31 20:49 UTC (permalink / raw)
To: u-boot
Dear Daniel Schwierzeck,
> This series contains bugfixes and coding style cleanups.
> Furthermore it contains some extensions for MIPS24k and MIPS34k cores
> as preparation for merging the support for various Lantiq SoCs.
>
> Daniel Schwierzeck (11):
> MIPS: board.c: make checkpatch.pl clean
> MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined
> MIPS: board.c: fix init of flash data in bd_info
> MIPS: add register definition for EBase register
> MIPS: add sleep handler for slave CPUs in multi-processor systems
> MIPS: make cache operation mode configurable in dcache_enable()
> MIPS: extend cache initialization for MIPS24K and MIPS34K cores
> MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores
> MIPS: add header file for generic GPIO API
> MIPS: add init hook for CPU specific initialization
> MIPS: MAKEALL: fix lists for MIPSel and MIPS boards
>
> MAKEALL | 11 +---
> arch/mips/cpu/mips32/cache.S | 24 ++++++-
> arch/mips/cpu/mips32/start.S | 37 ++++++++++-
> arch/mips/include/asm/gpio.h | 13 ++++
> arch/mips/include/asm/mipsregs.h | 20 ++++++
> arch/mips/lib/board.c | 139
> +++++++++++++++++++++----------------- 6 files changed, 171 insertions(+),
> 73 deletions(-)
> create mode 100644 arch/mips/include/asm/gpio.h
My apologies for picking the rest of this series so late. Looks like the MIPS
maintainer is n/a so I'll pull these through my staging tree once we'll fix some
issues.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 10/11] MIPS: add init hook for CPU specific initialization
2011-11-25 8:49 ` Marek Vasut
@ 2012-03-31 20:53 ` Marek Vasut
0 siblings, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2012-03-31 20:53 UTC (permalink / raw)
To: u-boot
Dear Marek Vasut,
> > Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
> > ---
> >
> > arch/mips/lib/board.c | 11 +++++++++++
> > 1 files changed, 11 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
> > index bcf12c5..27c2cfe 100644
> > --- a/arch/mips/lib/board.c
> > +++ b/arch/mips/lib/board.c
> > @@ -57,6 +57,16 @@ static char *failed = "*** failed ***\n";
> >
> > */
> >
> > unsigned long mips_io_port_base = -1;
> >
> > +int __arch_cpu_init(void)
> > +{
> > + /*
> > + * Nothing to do in this dummy implementation
> > + */
> > + return 0;
> > +}
> > +int arch_cpu_init(void)
> > + __attribute__((weak, alias("__arch_cpu_init")));
> > +
> >
> > int __board_early_init_f(void)
> > {
> >
> > /*
> >
> > @@ -130,6 +140,7 @@ static int init_baudrate(void)
> >
> > typedef int (init_fnc_t) (void);
> >
> > init_fnc_t *init_sequence[] = {
> >
> > + arch_cpu_init,
> >
> > board_early_init_f,
> > timer_init,
> > env_init, /* initialize environment */
>
> Maybe do it the same way it's done on ARM.
>
> M
Can you please rebase this on u-boot-staging/marex at denx.de ? It doesn't apply :(
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 00/11] MIPS: fixes and updates
2012-03-31 20:49 ` [U-Boot] [PATCH 00/11] MIPS: fixes and updates Marek Vasut
@ 2012-04-02 11:54 ` Daniel Schwierzeck
2012-04-02 12:01 ` Anatolij Gustschin
2012-04-02 13:35 ` Marek Vasut
0 siblings, 2 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2012-04-02 11:54 UTC (permalink / raw)
To: u-boot
Hi Marek,
Am 31.03.2012 22:49, schrieb Marek Vasut:
<snip>
>
> My apologies for picking the rest of this series so late. Looks like the MIPS
> maintainer is n/a so I'll pull these through my staging tree once we'll fix some
> issues.
>
> Best regards,
> Marek Vasut
thanks for looking into this but parts of this series are either obsolete or
already applied by Wolfgang.
I'll resend a new series with bugfixes only as soon as MAKEALL is working again.
Currently the MIPS tree is completely broken. All boards fail with:
cmd_bootm.c: In function 'do_bootm_subcommand':
cmd_bootm.c:518:23: error: 'bootm_headers_t' has no member named 'lmb'
cmd_bootm.c: In function 'do_bootm':
cmd_bootm.c:665:21: error: 'bootm_headers_t' has no member named 'lmb'
git bisect says:
44f074c771c4b70d250b0d7ed2f7513488c678bb is the first bad commit
commit 44f074c771c4b70d250b0d7ed2f7513488c678bb
Author: Marek Vasut <marek.vasut@gmail.com>
Date: Wed Mar 14 21:52:45 2012 +0000
BOOT: Add "bootz" command to boot Linux zImage on ARM
This command boots Linux zImage from where the zImage is loaded to. Passing
initrd and fdt is supported.
Tested on i.MX28 based DENX M28EVK
Tested on PXA270 based Voipac PXA270.
NOTE: This currently only supports ARM, but other architectures
can be easily
added by defining bootz_setup().
I'll try to find a suitable fix.
--
Best regards,
Daniel
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 00/11] MIPS: fixes and updates
2012-04-02 11:54 ` Daniel Schwierzeck
@ 2012-04-02 12:01 ` Anatolij Gustschin
2012-04-02 12:20 ` Daniel Schwierzeck
2012-04-02 13:35 ` Marek Vasut
1 sibling, 1 reply; 50+ messages in thread
From: Anatolij Gustschin @ 2012-04-02 12:01 UTC (permalink / raw)
To: u-boot
Hi Daniel,
On Mon, 2 Apr 2012 13:54:18 +0200
Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> wrote:
> Hi Marek,
>
> Am 31.03.2012 22:49, schrieb Marek Vasut:
> <snip>
> >
> > My apologies for picking the rest of this series so late. Looks like the MIPS
> > maintainer is n/a so I'll pull these through my staging tree once we'll fix some
> > issues.
> >
> > Best regards,
> > Marek Vasut
>
> thanks for looking into this but parts of this series are either obsolete or
> already applied by Wolfgang.
>
> I'll resend a new series with bugfixes only as soon as MAKEALL is working again.
> Currently the MIPS tree is completely broken. All boards fail with:
>
> cmd_bootm.c: In function 'do_bootm_subcommand':
> cmd_bootm.c:518:23: error: 'bootm_headers_t' has no member named 'lmb'
> cmd_bootm.c: In function 'do_bootm':
> cmd_bootm.c:665:21: error: 'bootm_headers_t' has no member named 'lmb'
...
> I'll try to find a suitable fix.
This is already fixed by http://patchwork.ozlabs.org/patch/149924/
I think.
Thanks,
Anatolij
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 00/11] MIPS: fixes and updates
2012-04-02 12:01 ` Anatolij Gustschin
@ 2012-04-02 12:20 ` Daniel Schwierzeck
0 siblings, 0 replies; 50+ messages in thread
From: Daniel Schwierzeck @ 2012-04-02 12:20 UTC (permalink / raw)
To: u-boot
Hi Anatolij,
On Mon, Apr 2, 2012 at 2:01 PM, Anatolij Gustschin <agust@denx.de> wrote:
> Hi Daniel,
>
> On Mon, 2 Apr 2012 13:54:18 +0200
> Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> wrote:
>
...
>> I'll resend a new series with bugfixes only as soon as MAKEALL is working again.
>> Currently the MIPS tree is completely broken. All boards fail with:
>>
>> cmd_bootm.c: In function 'do_bootm_subcommand':
>> cmd_bootm.c:518:23: error: 'bootm_headers_t' has no member named 'lmb'
>> cmd_bootm.c: In function 'do_bootm':
>> cmd_bootm.c:665:21: error: 'bootm_headers_t' has no member named 'lmb'
> ...
>> I'll try to find a suitable fix.
>
> This is already fixed by http://patchwork.ozlabs.org/patch/149924/
> I think.
>
yes this patch works
--
Best regards,
Daniel
^ permalink raw reply [flat|nested] 50+ messages in thread
* [U-Boot] [PATCH 00/11] MIPS: fixes and updates
2012-04-02 11:54 ` Daniel Schwierzeck
2012-04-02 12:01 ` Anatolij Gustschin
@ 2012-04-02 13:35 ` Marek Vasut
1 sibling, 0 replies; 50+ messages in thread
From: Marek Vasut @ 2012-04-02 13:35 UTC (permalink / raw)
To: u-boot
Dear Daniel Schwierzeck,
> Hi Marek,
>
> Am 31.03.2012 22:49, schrieb Marek Vasut:
> <snip>
>
> > My apologies for picking the rest of this series so late. Looks like the
> > MIPS maintainer is n/a so I'll pull these through my staging tree once
> > we'll fix some issues.
> >
> > Best regards,
> > Marek Vasut
>
> thanks for looking into this but parts of this series are either obsolete
> or already applied by Wolfgang.
>
> I'll resend a new series with bugfixes only as soon as MAKEALL is working
> again. Currently the MIPS tree is completely broken. All boards fail with:
>
> cmd_bootm.c: In function 'do_bootm_subcommand':
> cmd_bootm.c:518:23: error: 'bootm_headers_t' has no member named 'lmb'
> cmd_bootm.c: In function 'do_bootm':
> cmd_bootm.c:665:21: error: 'bootm_headers_t' has no member named 'lmb'
>
>
> git bisect says:
Git bisect says I screwed up, sorry. Fix is already in the ML.
> 44f074c771c4b70d250b0d7ed2f7513488c678bb is the first bad commit
> commit 44f074c771c4b70d250b0d7ed2f7513488c678bb
> Author: Marek Vasut <marek.vasut@gmail.com>
> Date: Wed Mar 14 21:52:45 2012 +0000
>
> BOOT: Add "bootz" command to boot Linux zImage on ARM
>
> This command boots Linux zImage from where the zImage is loaded to.
> Passing initrd and fdt is supported.
>
> Tested on i.MX28 based DENX M28EVK
> Tested on PXA270 based Voipac PXA270.
>
> NOTE: This currently only supports ARM, but other architectures
> can be easily
> added by defining bootz_setup().
>
> I'll try to find a suitable fix.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 50+ messages in thread
end of thread, other threads:[~2012-04-02 13:35 UTC | newest]
Thread overview: 50+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-11-24 13:57 [U-Boot] [PATCH 00/11] MIPS: fixes and updates Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 01/11] MIPS: board.c: make checkpatch.pl clean Daniel Schwierzeck
2011-11-25 8:38 ` Marek Vasut
2011-11-30 12:39 ` [U-Boot] [PATCH v2 " Daniel Schwierzeck
2011-12-09 9:52 ` [U-Boot] [PATCH " Wolfgang Denk
2011-11-24 13:57 ` [U-Boot] [PATCH 02/11] MIPS: board.c: fix warning if CONFIG_CMD_NET is not defined Daniel Schwierzeck
2011-11-25 8:39 ` Marek Vasut
2011-11-25 12:37 ` Daniel Schwierzeck
2011-11-25 13:41 ` Marek Vasut
2011-12-09 9:50 ` Wolfgang Denk
2011-12-09 12:34 ` Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 03/11] MIPS: board.c: fix init of flash data in bd_info Daniel Schwierzeck
2011-11-25 8:40 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 04/11] MIPS: add register definition for EBase register Daniel Schwierzeck
2011-11-25 8:43 ` Marek Vasut
2011-11-25 12:10 ` Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems Daniel Schwierzeck
2011-11-25 8:44 ` Marek Vasut
2011-11-25 12:19 ` Daniel Schwierzeck
2011-11-25 13:40 ` Marek Vasut
2011-11-25 15:35 ` Andrew Dyer
2011-11-28 16:24 ` Shinya Kuribayashi
2011-11-29 15:54 ` Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 06/11] MIPS: make cache operation mode configurable in dcache_enable() Daniel Schwierzeck
2011-11-25 8:45 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 07/11] MIPS: extend cache initialization for MIPS24K and MIPS34K cores Daniel Schwierzeck
2011-11-25 8:46 ` Marek Vasut
2011-11-30 12:39 ` [U-Boot] [PATCH v2 07/10] MIPS: extend cache initialization for recent MIPS CPU cores Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores Daniel Schwierzeck
2011-11-25 8:47 ` Marek Vasut
2011-11-28 16:48 ` Shinya Kuribayashi
2011-11-29 15:44 ` Daniel Schwierzeck
2011-11-30 12:39 ` [U-Boot] [PATCH v2 08/10] MIPS: start.S: refactor reset and exception vector setup Daniel Schwierzeck
2011-11-24 13:57 ` [U-Boot] [PATCH 09/11] MIPS: add header file for generic GPIO API Daniel Schwierzeck
2011-11-25 8:48 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 10/11] MIPS: add init hook for CPU specific initialization Daniel Schwierzeck
2011-11-25 8:49 ` Marek Vasut
2012-03-31 20:53 ` Marek Vasut
2011-11-24 13:57 ` [U-Boot] [PATCH 11/11] MIPS: MAKEALL: fix lists for MIPSel and MIPS boards Daniel Schwierzeck
2011-11-24 17:41 ` Mike Frysinger
2011-11-25 8:49 ` Marek Vasut
2011-11-25 12:29 ` Daniel Schwierzeck
2011-11-25 15:21 ` thomas.langer at lantiq.com
2011-11-25 19:52 ` Mike Frysinger
2011-12-09 9:53 ` Wolfgang Denk
2012-03-31 20:49 ` [U-Boot] [PATCH 00/11] MIPS: fixes and updates Marek Vasut
2012-04-02 11:54 ` Daniel Schwierzeck
2012-04-02 12:01 ` Anatolij Gustschin
2012-04-02 12:20 ` Daniel Schwierzeck
2012-04-02 13:35 ` Marek Vasut
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