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* [Buildroot] [PATCH] Clarify MIPS ABIs support
@ 2012-07-24 20:47 Thomas Petazzoni
  2012-07-25 16:29 ` Thomas Petazzoni
  2012-07-25 17:32 ` Arnout Vandecappelle
  0 siblings, 2 replies; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-24 20:47 UTC (permalink / raw)
  To: buildroot

Practically speaking, MIPS has three useful ABIs:

 * o32 is for 32-bits CPUs, or 64-bit CPUs running only a 32-bit subset
   of the instruction set.
 * n32 is for 64-bits CPUs only. It has 32-bits pointers and long
   integers.
 * n64 is for 64-bits CPUs only. It has 64-bits pointers and long
   integers.

See http://www.linux-mips.org/wiki/MIPS_ABI_History and
http://www.linux-mips.org/wiki/WhatsWrongWithO32N32N64 for more
details.

So, this commit reworks the Buildroot MIPS support by:

 * Renaming the n32 ABI option to BR2_MIPS_NABI32, for consistency
   with BR2_MIPS_OABI32.

 * Renaming the n64 ABI option to BR2_MIPS_NABI64, for consistency
   with BR2_MIPS_OABI32.

 * Make the n32 and n64 ABI selections select the BR2_ARCH_IS_64,
   since those ABIs are valid on 64-bits CPUs only.

 * Removing the o64 ABI, which is practicaly never used.

 * Removing the "none" ABI, which really doesn't make sense.

 * Introduce the mips64 and mips64el architecture names when a 64-bits
   MIPS ABI is choosen. This will fix build issue like
   http://autobuild.buildroot.org/results/9b8c5ea86c953a89e85e7b67e9221de41773f652/build-end.log
   where gmp was confused by the fact of having a 32 bits architecture
   (detected by the mips- architecture part of the tuple) but 64 bits
   integer size when compiling.

 * Adjust the uclibc.mk logic to support the new mips64/mips64el
   architecture names, and take into account the renaming of the ABI
   options.

This has been build tested by generating Buildroot toolchains and
compiling a few packages for MIPS o32, MIPS n32 and MIPS n64.

This work is originally based on prior work done by Gustavo Zacarias.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 package/Makefile.in        |    2 +-
 target/Config.in.arch      |   28 +++++++++++-----------------
 toolchain/uClibc/uclibc.mk |    9 ++++++---
 3 files changed, 18 insertions(+), 21 deletions(-)

diff --git a/package/Makefile.in b/package/Makefile.in
index 6fad224..21b8634 100644
--- a/package/Makefile.in
+++ b/package/Makefile.in
@@ -87,7 +87,7 @@ endif
 
 TARGET_CFLAGS=$(TARGET_ABI) $(TARGET_OPTIMIZATION) $(TARGET_DEBUGGING)
 
-ifeq ($(findstring yy,$(BR2_mips)$(BR2_MIPS_ABI64)),yy)
+ifeq ($(findstring yy,$(BR2_mips)$(BR2_MIPS_NABI64)),yy)
 TARGET_CFLAGS+=-fno-pic -mno-abicalls
 endif
 
diff --git a/target/Config.in.arch b/target/Config.in.arch
index e7aec56..0ef59ef 100644
--- a/target/Config.in.arch
+++ b/target/Config.in.arch
@@ -271,26 +271,20 @@ choice
 	prompt "Target ABI"
 	depends on BR2_mips || BR2_mipsel
 	default BR2_MIPS_OABI32 if BR_mips_32 || BR_mips_32r2
-	default BR2_MIPS_ABI32 if BR_mips_64 || BR_mips_64r2
+	default BR2_MIPS_NABI32 if BR_mips_64 || BR_mips_64r2
 	help
 	  Application Binary Interface to use
 
 config BR2_MIPS_OABI32
 	bool "o32"
-config BR2_MIPS_ABI32
+config BR2_MIPS_NABI32
 	bool "n32"
+	select BR2_ARCH_IS_64
 	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
-config BR2_MIPS_ABI64
+config BR2_MIPS_NABI64
 	bool "n64"
+	select BR2_ARCH_IS_64
 	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
-config BR2_MIPS_OABI64
-	bool "o64"
-	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
-config BR2_MIPS_ABI_none
-	bool "unspecified"
-	depends on BR2_mips_16
-	help
-	  Unspecified ABI leaves ABI selection blank.
 endchoice
 
 choice
@@ -688,8 +682,10 @@ config BR2_ARCH
 	default "i686"		if BR2_x86_athlon_4
 	default "m68k"		if BR2_m68k
 	default "microblaze"	if BR2_microblaze
-	default "mips"		if BR2_mips
-	default "mipsel"	if BR2_mipsel
+	default "mips"		if BR2_mips && !BR2_ARCH_IS_64
+	default "mipsel"	if BR2_mipsel && !BR2_ARCH_IS_64
+	default "mips64"	if BR2_mips && BR2_ARCH_IS_64
+	default "mips64el"	if BR2_mipsel && BR2_ARCH_IS_64
 	default "powerpc"	if BR2_powerpc
 	default "sh2"		if BR2_sh2
 	default "sh2a"		if BR2_sh2a
@@ -904,10 +900,8 @@ config BR2_GCC_TARGET_ABI
 	default aapcs		if BR2_arm_dunno
 	default aapcs-linux	if BR2_ARM_EABI
 	default 32		if BR2_MIPS_OABI32
-	default n32		if BR2_MIPS_ABI32
-	default eabi		if BR2_MIPS_EABI
-	default o64		if BR2_MIPS_OABI64
-	default 64		if BR2_MIPS_ABI64
+	default n32		if BR2_MIPS_NABI32
+	default 64		if BR2_MIPS_NABI64
 	default mmixware	if BR2_mmix && BR2_MMIX_ABI_native
 	default gnu		if BR2_mmix && !BR2_MMIX_ABI_native
 	default altivec		if BR2_powerpc && BR2_PPC_ABI_altivec
diff --git a/toolchain/uClibc/uclibc.mk b/toolchain/uClibc/uclibc.mk
index 9d0b6db..aff0a60 100644
--- a/toolchain/uClibc/uclibc.mk
+++ b/toolchain/uClibc/uclibc.mk
@@ -38,6 +38,7 @@ UCLIBC_TARGET_ARCH:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
 		-e 's/sh[234].*/sh/' \
 		-e 's/mips.*/mips/' \
 		-e 's/mipsel.*/mips/' \
+		-e 's/mips64el.*/mips/' \
 		-e 's/cris.*/cris/' \
 		-e 's/xtensa.*/xtensa/' \
 ")
@@ -45,6 +46,8 @@ UCLIBC_TARGET_ARCH:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
 UCLIBC_TARGET_ENDIAN:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
 		-e 's/armeb/BIG/' \
 		-e 's/arm/LITTLE/' \
+		-e 's/mips64el/LITTLE/' \
+		-e 's/mips64/BIG/' \
 		-e 's/mipsel/LITTLE/' \
 		-e 's/mips/BIG/' \
 		-e 's/sh.*eb/BIG/' \
@@ -155,13 +158,13 @@ ifeq ($(UCLIBC_TARGET_ARCH),mips)
 	 /bin/echo "# CONFIG_MIPS_ISA_MIPS32R2 is not set"; \
 	 /bin/echo "# CONFIG_MIPS_ISA_MIPS64 is not set"; \
 	) >> $(UCLIBC_DIR)/.oldconfig
-ifeq ($(BR2_MIPS_OABI),y)
+ifeq ($(BR2_MIPS_OABI32),y)
 	$(SED) 's/.*\(CONFIG_MIPS_O32_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
 endif
-ifeq ($(BR2_MIPS_ABI32),y)
+ifeq ($(BR2_MIPS_NABI32),y)
 	$(SED) 's/.*\(CONFIG_MIPS_N32_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
 endif
-ifeq ($(BR2_MIPS_ABI64),y)
+ifeq ($(BR2_MIPS_NABI64),y)
 	$(SED) 's/.*\(CONFIG_MIPS_N64_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
 endif
 ifeq ($(BR2_mips_1),y)
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-24 20:47 [Buildroot] [PATCH] Clarify MIPS ABIs support Thomas Petazzoni
@ 2012-07-25 16:29 ` Thomas Petazzoni
  2012-07-25 17:32 ` Arnout Vandecappelle
  1 sibling, 0 replies; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-25 16:29 UTC (permalink / raw)
  To: buildroot

Hello Gustavo,

If you could have a look at the below patch, and provide your comments
or Acked-by, it would be great.

Thanks a lot!

Thomas

Le Tue, 24 Jul 2012 22:47:08 +0200,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> a ?crit :

> Practically speaking, MIPS has three useful ABIs:
> 
>  * o32 is for 32-bits CPUs, or 64-bit CPUs running only a 32-bit subset
>    of the instruction set.
>  * n32 is for 64-bits CPUs only. It has 32-bits pointers and long
>    integers.
>  * n64 is for 64-bits CPUs only. It has 64-bits pointers and long
>    integers.
> 
> See http://www.linux-mips.org/wiki/MIPS_ABI_History and
> http://www.linux-mips.org/wiki/WhatsWrongWithO32N32N64 for more
> details.
> 
> So, this commit reworks the Buildroot MIPS support by:
> 
>  * Renaming the n32 ABI option to BR2_MIPS_NABI32, for consistency
>    with BR2_MIPS_OABI32.
> 
>  * Renaming the n64 ABI option to BR2_MIPS_NABI64, for consistency
>    with BR2_MIPS_OABI32.
> 
>  * Make the n32 and n64 ABI selections select the BR2_ARCH_IS_64,
>    since those ABIs are valid on 64-bits CPUs only.
> 
>  * Removing the o64 ABI, which is practicaly never used.
> 
>  * Removing the "none" ABI, which really doesn't make sense.
> 
>  * Introduce the mips64 and mips64el architecture names when a 64-bits
>    MIPS ABI is choosen. This will fix build issue like
>    http://autobuild.buildroot.org/results/9b8c5ea86c953a89e85e7b67e9221de41773f652/build-end.log
>    where gmp was confused by the fact of having a 32 bits architecture
>    (detected by the mips- architecture part of the tuple) but 64 bits
>    integer size when compiling.
> 
>  * Adjust the uclibc.mk logic to support the new mips64/mips64el
>    architecture names, and take into account the renaming of the ABI
>    options.
> 
> This has been build tested by generating Buildroot toolchains and
> compiling a few packages for MIPS o32, MIPS n32 and MIPS n64.
> 
> This work is originally based on prior work done by Gustavo Zacarias.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> ---
>  package/Makefile.in        |    2 +-
>  target/Config.in.arch      |   28 +++++++++++-----------------
>  toolchain/uClibc/uclibc.mk |    9 ++++++---
>  3 files changed, 18 insertions(+), 21 deletions(-)
> 
> diff --git a/package/Makefile.in b/package/Makefile.in
> index 6fad224..21b8634 100644
> --- a/package/Makefile.in
> +++ b/package/Makefile.in
> @@ -87,7 +87,7 @@ endif
>  
>  TARGET_CFLAGS=$(TARGET_ABI) $(TARGET_OPTIMIZATION) $(TARGET_DEBUGGING)
>  
> -ifeq ($(findstring yy,$(BR2_mips)$(BR2_MIPS_ABI64)),yy)
> +ifeq ($(findstring yy,$(BR2_mips)$(BR2_MIPS_NABI64)),yy)
>  TARGET_CFLAGS+=-fno-pic -mno-abicalls
>  endif
>  
> diff --git a/target/Config.in.arch b/target/Config.in.arch
> index e7aec56..0ef59ef 100644
> --- a/target/Config.in.arch
> +++ b/target/Config.in.arch
> @@ -271,26 +271,20 @@ choice
>  	prompt "Target ABI"
>  	depends on BR2_mips || BR2_mipsel
>  	default BR2_MIPS_OABI32 if BR_mips_32 || BR_mips_32r2
> -	default BR2_MIPS_ABI32 if BR_mips_64 || BR_mips_64r2
> +	default BR2_MIPS_NABI32 if BR_mips_64 || BR_mips_64r2
>  	help
>  	  Application Binary Interface to use
>  
>  config BR2_MIPS_OABI32
>  	bool "o32"
> -config BR2_MIPS_ABI32
> +config BR2_MIPS_NABI32
>  	bool "n32"
> +	select BR2_ARCH_IS_64
>  	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
> -config BR2_MIPS_ABI64
> +config BR2_MIPS_NABI64
>  	bool "n64"
> +	select BR2_ARCH_IS_64
>  	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
> -config BR2_MIPS_OABI64
> -	bool "o64"
> -	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
> -config BR2_MIPS_ABI_none
> -	bool "unspecified"
> -	depends on BR2_mips_16
> -	help
> -	  Unspecified ABI leaves ABI selection blank.
>  endchoice
>  
>  choice
> @@ -688,8 +682,10 @@ config BR2_ARCH
>  	default "i686"		if BR2_x86_athlon_4
>  	default "m68k"		if BR2_m68k
>  	default "microblaze"	if BR2_microblaze
> -	default "mips"		if BR2_mips
> -	default "mipsel"	if BR2_mipsel
> +	default "mips"		if BR2_mips && !BR2_ARCH_IS_64
> +	default "mipsel"	if BR2_mipsel && !BR2_ARCH_IS_64
> +	default "mips64"	if BR2_mips && BR2_ARCH_IS_64
> +	default "mips64el"	if BR2_mipsel && BR2_ARCH_IS_64
>  	default "powerpc"	if BR2_powerpc
>  	default "sh2"		if BR2_sh2
>  	default "sh2a"		if BR2_sh2a
> @@ -904,10 +900,8 @@ config BR2_GCC_TARGET_ABI
>  	default aapcs		if BR2_arm_dunno
>  	default aapcs-linux	if BR2_ARM_EABI
>  	default 32		if BR2_MIPS_OABI32
> -	default n32		if BR2_MIPS_ABI32
> -	default eabi		if BR2_MIPS_EABI
> -	default o64		if BR2_MIPS_OABI64
> -	default 64		if BR2_MIPS_ABI64
> +	default n32		if BR2_MIPS_NABI32
> +	default 64		if BR2_MIPS_NABI64
>  	default mmixware	if BR2_mmix && BR2_MMIX_ABI_native
>  	default gnu		if BR2_mmix && !BR2_MMIX_ABI_native
>  	default altivec		if BR2_powerpc && BR2_PPC_ABI_altivec
> diff --git a/toolchain/uClibc/uclibc.mk b/toolchain/uClibc/uclibc.mk
> index 9d0b6db..aff0a60 100644
> --- a/toolchain/uClibc/uclibc.mk
> +++ b/toolchain/uClibc/uclibc.mk
> @@ -38,6 +38,7 @@ UCLIBC_TARGET_ARCH:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
>  		-e 's/sh[234].*/sh/' \
>  		-e 's/mips.*/mips/' \
>  		-e 's/mipsel.*/mips/' \
> +		-e 's/mips64el.*/mips/' \
>  		-e 's/cris.*/cris/' \
>  		-e 's/xtensa.*/xtensa/' \
>  ")
> @@ -45,6 +46,8 @@ UCLIBC_TARGET_ARCH:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
>  UCLIBC_TARGET_ENDIAN:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
>  		-e 's/armeb/BIG/' \
>  		-e 's/arm/LITTLE/' \
> +		-e 's/mips64el/LITTLE/' \
> +		-e 's/mips64/BIG/' \
>  		-e 's/mipsel/LITTLE/' \
>  		-e 's/mips/BIG/' \
>  		-e 's/sh.*eb/BIG/' \
> @@ -155,13 +158,13 @@ ifeq ($(UCLIBC_TARGET_ARCH),mips)
>  	 /bin/echo "# CONFIG_MIPS_ISA_MIPS32R2 is not set"; \
>  	 /bin/echo "# CONFIG_MIPS_ISA_MIPS64 is not set"; \
>  	) >> $(UCLIBC_DIR)/.oldconfig
> -ifeq ($(BR2_MIPS_OABI),y)
> +ifeq ($(BR2_MIPS_OABI32),y)
>  	$(SED) 's/.*\(CONFIG_MIPS_O32_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
>  endif
> -ifeq ($(BR2_MIPS_ABI32),y)
> +ifeq ($(BR2_MIPS_NABI32),y)
>  	$(SED) 's/.*\(CONFIG_MIPS_N32_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
>  endif
> -ifeq ($(BR2_MIPS_ABI64),y)
> +ifeq ($(BR2_MIPS_NABI64),y)
>  	$(SED) 's/.*\(CONFIG_MIPS_N64_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
>  endif
>  ifeq ($(BR2_mips_1),y)



-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-24 20:47 [Buildroot] [PATCH] Clarify MIPS ABIs support Thomas Petazzoni
  2012-07-25 16:29 ` Thomas Petazzoni
@ 2012-07-25 17:32 ` Arnout Vandecappelle
  2012-07-25 18:25   ` Thomas Petazzoni
  1 sibling, 1 reply; 14+ messages in thread
From: Arnout Vandecappelle @ 2012-07-25 17:32 UTC (permalink / raw)
  To: buildroot

On 07/24/12 22:47, Thomas Petazzoni wrote:
> So, this commit reworks the Buildroot MIPS support by:
>
>   * Renaming the n32 ABI option to BR2_MIPS_NABI32, for consistency
>     with BR2_MIPS_OABI32.
>
>   * Renaming the n64 ABI option to BR2_MIPS_NABI64, for consistency
>     with BR2_MIPS_OABI32.
>
>   * Make the n32 and n64 ABI selections select the BR2_ARCH_IS_64,
>     since those ABIs are valid on 64-bits CPUs only.

  As far as I understand, the situation is a bit similar to PCs, where
i386 and x86_64 are in fact quite different even at instruction set
level.  So wouldn't it make more sense to distinguish mips and mips64
at the 'Target Architecture' level?  Then mips would always select
o32, and the ABI choice would only exist for mips64.  And there
would be a 1-to-1 mapping between BR2_ARCH and the user choice,
which makes more sense to me.

  It would require a bit of research to find out which sub-architectures
are 64-bit, of course.


>   * Removing the o64 ABI, which is practicaly never used.
>
>   * Removing the "none" ABI, which really doesn't make sense.
>
>   * Introduce the mips64 and mips64el architecture names when a 64-bits
>     MIPS ABI is choosen. This will fix build issue like
>     http://autobuild.buildroot.org/results/9b8c5ea86c953a89e85e7b67e9221de41773f652/build-end.log
>     where gmp was confused by the fact of having a 32 bits architecture
>     (detected by the mips- architecture part of the tuple) but 64 bits
>     integer size when compiling.
>
>   * Adjust the uclibc.mk logic to support the new mips64/mips64el
>     architecture names, and take into account the renaming of the ABI
>     options.
>
> This has been build tested by generating Buildroot toolchains and
> compiling a few packages for MIPS o32, MIPS n32 and MIPS n64.
>
> This work is originally based on prior work done by Gustavo Zacarias.
>
> Signed-off-by: Thomas Petazzoni<thomas.petazzoni@free-electrons.com>
> ---
>   package/Makefile.in        |    2 +-
>   target/Config.in.arch      |   28 +++++++++++-----------------
>   toolchain/uClibc/uclibc.mk |    9 ++++++---
>   3 files changed, 18 insertions(+), 21 deletions(-)
>
> diff --git a/package/Makefile.in b/package/Makefile.in
> index 6fad224..21b8634 100644
> --- a/package/Makefile.in
> +++ b/package/Makefile.in
> @@ -87,7 +87,7 @@ endif
>
>   TARGET_CFLAGS=$(TARGET_ABI) $(TARGET_OPTIMIZATION) $(TARGET_DEBUGGING)
>
> -ifeq ($(findstring yy,$(BR2_mips)$(BR2_MIPS_ABI64)),yy)
> +ifeq ($(findstring yy,$(BR2_mips)$(BR2_MIPS_NABI64)),yy)

  Any reason why this isn't just

ifeq ($(BR2_MIPS_NABI64),y)

>   TARGET_CFLAGS+=-fno-pic -mno-abicalls
>   endif
>
> diff --git a/target/Config.in.arch b/target/Config.in.arch
> index e7aec56..0ef59ef 100644
> --- a/target/Config.in.arch
> +++ b/target/Config.in.arch
> @@ -271,26 +271,20 @@ choice
>   	prompt "Target ABI"
>   	depends on BR2_mips || BR2_mipsel
>   	default BR2_MIPS_OABI32 if BR_mips_32 || BR_mips_32r2
> -	default BR2_MIPS_ABI32 if BR_mips_64 || BR_mips_64r2
> +	default BR2_MIPS_NABI32 if BR_mips_64 || BR_mips_64r2
>   	help
>   	  Application Binary Interface to use
>
>   config BR2_MIPS_OABI32
>   	bool "o32"
> -config BR2_MIPS_ABI32
> +config BR2_MIPS_NABI32
>   	bool "n32"
> +	select BR2_ARCH_IS_64
>   	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
> -config BR2_MIPS_ABI64
> +config BR2_MIPS_NABI64
>   	bool "n64"
> +	select BR2_ARCH_IS_64
>   	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
> -config BR2_MIPS_OABI64
> -	bool "o64"
> -	depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
> -config BR2_MIPS_ABI_none
> -	bool "unspecified"
> -	depends on BR2_mips_16
> -	help
> -	  Unspecified ABI leaves ABI selection blank.
>   endchoice
>
>   choice
> @@ -688,8 +682,10 @@ config BR2_ARCH
>   	default "i686"		if BR2_x86_athlon_4
>   	default "m68k"		if BR2_m68k
>   	default "microblaze"	if BR2_microblaze
> -	default "mips"		if BR2_mips
> -	default "mipsel"	if BR2_mipsel
> +	default "mips"		if BR2_mips&&  !BR2_ARCH_IS_64
> +	default "mipsel"	if BR2_mipsel&&  !BR2_ARCH_IS_64
> +	default "mips64"	if BR2_mips&&  BR2_ARCH_IS_64
> +	default "mips64el"	if BR2_mipsel&&  BR2_ARCH_IS_64
>   	default "powerpc"	if BR2_powerpc
>   	default "sh2"		if BR2_sh2
>   	default "sh2a"		if BR2_sh2a
> @@ -904,10 +900,8 @@ config BR2_GCC_TARGET_ABI
>   	default aapcs		if BR2_arm_dunno
>   	default aapcs-linux	if BR2_ARM_EABI
>   	default 32		if BR2_MIPS_OABI32
> -	default n32		if BR2_MIPS_ABI32
> -	default eabi		if BR2_MIPS_EABI
> -	default o64		if BR2_MIPS_OABI64
> -	default 64		if BR2_MIPS_ABI64
> +	default n32		if BR2_MIPS_NABI32
> +	default 64		if BR2_MIPS_NABI64
>   	default mmixware	if BR2_mmix &&  BR2_MMIX_ABI_native
>   	default gnu		if BR2_mmix &&  !BR2_MMIX_ABI_native

  Unrelated, but what is this BR2_mmix?

>   	default altivec		if BR2_powerpc&&  BR2_PPC_ABI_altivec
> diff --git a/toolchain/uClibc/uclibc.mk b/toolchain/uClibc/uclibc.mk
> index 9d0b6db..aff0a60 100644
> --- a/toolchain/uClibc/uclibc.mk
> +++ b/toolchain/uClibc/uclibc.mk
> @@ -38,6 +38,7 @@ UCLIBC_TARGET_ARCH:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
>   		-e 's/sh[234].*/sh/' \
>   		-e 's/mips.*/mips/' \
>   		-e 's/mipsel.*/mips/' \
> +		-e 's/mips64el.*/mips/' \

  This one is already covered by the mips.* expression.  Actually,
so is the mipsel.* one.


  Regards,
  Arnout


>   		-e 's/cris.*/cris/' \
>   		-e 's/xtensa.*/xtensa/' \
>   ")
> @@ -45,6 +46,8 @@ UCLIBC_TARGET_ARCH:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
>   UCLIBC_TARGET_ENDIAN:=$(shell $(SHELL) -c "echo $(ARCH) | sed \
>   		-e 's/armeb/BIG/' \
>   		-e 's/arm/LITTLE/' \
> +		-e 's/mips64el/LITTLE/' \
> +		-e 's/mips64/BIG/' \
>   		-e 's/mipsel/LITTLE/' \
>   		-e 's/mips/BIG/' \
>   		-e 's/sh.*eb/BIG/' \
> @@ -155,13 +158,13 @@ ifeq ($(UCLIBC_TARGET_ARCH),mips)
>   	 /bin/echo "# CONFIG_MIPS_ISA_MIPS32R2 is not set"; \
>   	 /bin/echo "# CONFIG_MIPS_ISA_MIPS64 is not set"; \
>   	)>>  $(UCLIBC_DIR)/.oldconfig
> -ifeq ($(BR2_MIPS_OABI),y)
> +ifeq ($(BR2_MIPS_OABI32),y)
>   	$(SED) 's/.*\(CONFIG_MIPS_O32_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
>   endif
> -ifeq ($(BR2_MIPS_ABI32),y)
> +ifeq ($(BR2_MIPS_NABI32),y)
>   	$(SED) 's/.*\(CONFIG_MIPS_N32_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
>   endif
> -ifeq ($(BR2_MIPS_ABI64),y)
> +ifeq ($(BR2_MIPS_NABI64),y)
>   	$(SED) 's/.*\(CONFIG_MIPS_N64_ABI\).*/\1=y/' $(UCLIBC_DIR)/.oldconfig
>   endif
>   ifeq ($(BR2_mips_1),y)

-- 
Arnout Vandecappelle                               arnout at mind be
Senior Embedded Software Architect                 +32-16-286540
Essensium/Mind                                     http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium                BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-25 17:32 ` Arnout Vandecappelle
@ 2012-07-25 18:25   ` Thomas Petazzoni
  2012-07-25 18:31     ` Thomas Petazzoni
  2012-07-25 20:25     ` Gustavo Zacarias
  0 siblings, 2 replies; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-25 18:25 UTC (permalink / raw)
  To: buildroot

Le Wed, 25 Jul 2012 19:32:26 +0200,
Arnout Vandecappelle <arnout@mind.be> a ?crit :

>   As far as I understand, the situation is a bit similar to PCs, where
> i386 and x86_64 are in fact quite different even at instruction set
> level.  So wouldn't it make more sense to distinguish mips and mips64
> at the 'Target Architecture' level?  Then mips would always select
> o32, and the ABI choice would only exist for mips64.  And there
> would be a 1-to-1 mapping between BR2_ARCH and the user choice,
> which makes more sense to me.

Makes sense. Gustavo, what do you think?

>   It would require a bit of research to find out which sub-architectures
> are 64-bit, of course.

Right, but it should be doable. The linux-mips.org Wiki has some info,
and I know someone who has quite a bit of experience with MIPS stuff,
so I could ask.

> > -ifeq ($(findstring yy,$(BR2_mips)$(BR2_MIPS_ABI64)),yy)
> > +ifeq ($(findstring yy,$(BR2_mips)$(BR2_MIPS_NABI64)),yy)
> 
>   Any reason why this isn't just
> 
> ifeq ($(BR2_MIPS_NABI64),y)

No, it could be this way. The bigger question is:

> >   TARGET_CFLAGS+=-fno-pic -mno-abicalls

Why are those special CFLAGS needed from the beginning?

> >   	default mmixware	if BR2_mmix &&  BR2_MMIX_ABI_native
> >   	default gnu		if BR2_mmix &&  !BR2_MMIX_ABI_native
> 
>   Unrelated, but what is this BR2_mmix?

It seems like the BR2_mmix option never existed in Buildroot. But from
a quick Google search, MMIX appears to be the fake architecture created
by Donald Knuth, which is the descendant of the MIX architecture he
created to illustrate the Art of Computer Programming. See
http://www-cs-faculty.stanford.edu/~uno/mmix.html. I don't think we
really want to support this architecture.

>   This one is already covered by the mips.* expression.  Actually,
> so is the mipsel.* one.

Right.

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-25 18:25   ` Thomas Petazzoni
@ 2012-07-25 18:31     ` Thomas Petazzoni
  2012-07-25 19:15       ` Thomas Petazzoni
  2012-07-25 20:25     ` Gustavo Zacarias
  1 sibling, 1 reply; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-25 18:31 UTC (permalink / raw)
  To: buildroot

Le Wed, 25 Jul 2012 20:25:03 +0200,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> a ?crit :

> Le Wed, 25 Jul 2012 19:32:26 +0200,
> Arnout Vandecappelle <arnout@mind.be> a ?crit :
> 
> >   As far as I understand, the situation is a bit similar to PCs, where
> > i386 and x86_64 are in fact quite different even at instruction set
> > level.  So wouldn't it make more sense to distinguish mips and mips64
> > at the 'Target Architecture' level?  Then mips would always select
> > o32, and the ABI choice would only exist for mips64.  And there
> > would be a 1-to-1 mapping between BR2_ARCH and the user choice,
> > which makes more sense to me.
> 
> Makes sense. Gustavo, what do you think?
> 
> >   It would require a bit of research to find out which sub-architectures
> > are 64-bit, of course.
> 
> Right, but it should be doable. The linux-mips.org Wiki has some info,
> and I know someone who has quite a bit of experience with MIPS stuff,
> so I could ask.

Thinking more about this, the way we do things for i386 vs. x86_64 is
not optimal: there are two complete distinct sets of entries for the
processor types. One for i386, one for x86_64. However, there should
normally be a big overlap between the two, since all x86_64 processors
support the i386 architecture. So maybe we should have a single list,
with certain processor not being visible in the i386. This would ensure
consistency between the list of processors available on i386 and x86_64.

Thoughts?

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-25 18:31     ` Thomas Petazzoni
@ 2012-07-25 19:15       ` Thomas Petazzoni
  2012-07-26 16:38         ` Arnout Vandecappelle
  2012-07-26 19:01         ` Thomas Petazzoni
  0 siblings, 2 replies; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-25 19:15 UTC (permalink / raw)
  To: buildroot

Le Wed, 25 Jul 2012 20:31:09 +0200,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> a ?crit :

> Thinking more about this, the way we do things for i386 vs. x86_64 is
> not optimal: there are two complete distinct sets of entries for the
> processor types. One for i386, one for x86_64. However, there should
> normally be a big overlap between the two, since all x86_64 processors
> support the i386 architecture. So maybe we should have a single list,
> with certain processor not being visible in the i386. This would ensure
> consistency between the list of processors available on i386 and x86_64.

In other words, something like:

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-25 18:25   ` Thomas Petazzoni
  2012-07-25 18:31     ` Thomas Petazzoni
@ 2012-07-25 20:25     ` Gustavo Zacarias
  2012-07-25 20:38       ` Thomas Petazzoni
  1 sibling, 1 reply; 14+ messages in thread
From: Gustavo Zacarias @ 2012-07-25 20:25 UTC (permalink / raw)
  To: buildroot

On 07/25/12 15:25, Thomas Petazzoni wrote:

> Le Wed, 25 Jul 2012 19:32:26 +0200,
> Arnout Vandecappelle <arnout@mind.be> a ?crit :
> 
>>   As far as I understand, the situation is a bit similar to PCs, where
>> i386 and x86_64 are in fact quite different even at instruction set
>> level.  So wouldn't it make more sense to distinguish mips and mips64
>> at the 'Target Architecture' level?  Then mips would always select
>> o32, and the ABI choice would only exist for mips64.  And there
>> would be a 1-to-1 mapping between BR2_ARCH and the user choice,
>> which makes more sense to me.
> 
> Makes sense. Gustavo, what do you think?

Yes, it's the best option since we'll have the same dilemma sooner or
latter with powerpc(64) for example.

> No, it could be this way. The bigger question is:
> 
>>>   TARGET_CFLAGS+=-fno-pic -mno-abicalls
> 
> Why are those special CFLAGS needed from the beginning?

From what i could unearth it basically breaks dynamic linking though it
makes for smaller binaries.
I've tried removing it in my tests to get uClibc dynamic linking working
but something else is wrong, seemingly in the uClibc side.
For starters the loader is wrong, ld-linux in the target vs. ld64-linux
wanted by ELF files. And it seems there's something funky in the uClibc
Makefile about that (wants mips64 arch to build it, but they're using
unified ARCH as the kernel, so...)
Regards.

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-25 20:25     ` Gustavo Zacarias
@ 2012-07-25 20:38       ` Thomas Petazzoni
  0 siblings, 0 replies; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-25 20:38 UTC (permalink / raw)
  To: buildroot

Le Wed, 25 Jul 2012 17:25:11 -0300,
Gustavo Zacarias <gustavo@zacarias.com.ar> a ?crit :

> > Makes sense. Gustavo, what do you think?
> 
> Yes, it's the best option since we'll have the same dilemma sooner or
> latter with powerpc(64) for example.

Ok.

> > No, it could be this way. The bigger question is:
> > 
> >>>   TARGET_CFLAGS+=-fno-pic -mno-abicalls
> > 
> > Why are those special CFLAGS needed from the beginning?
> 
> From what i could unearth it basically breaks dynamic linking though it
> makes for smaller binaries.
> I've tried removing it in my tests to get uClibc dynamic linking working
> but something else is wrong, seemingly in the uClibc side.
> For starters the loader is wrong, ld-linux in the target vs. ld64-linux
> wanted by ELF files. And it seems there's something funky in the uClibc
> Makefile about that (wants mips64 arch to build it, but they're using
> unified ARCH as the kernel, so...)

Do you have a working mips64 kernel under Qemu? I vaguely remember that
you said that it was working with statically linked binary, but not
dynamically linked ones. Is this correct?

If you have a working mips64 kernel under Qemu, I'm interested by the
kernel config and Qemu config.

Thanks,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-25 19:15       ` Thomas Petazzoni
@ 2012-07-26 16:38         ` Arnout Vandecappelle
  2012-07-27  6:31           ` Thomas Petazzoni
  2012-07-26 19:01         ` Thomas Petazzoni
  1 sibling, 1 reply; 14+ messages in thread
From: Arnout Vandecappelle @ 2012-07-26 16:38 UTC (permalink / raw)
  To: buildroot

On 07/25/12 21:15, Thomas Petazzoni wrote:
> Le Wed, 25 Jul 2012 20:31:09 +0200,
> Thomas Petazzoni<thomas.petazzoni@free-electrons.com>  a ?crit :
>
>> >  Thinking more about this, the way we do things for i386 vs. x86_64 is
>> >  not optimal: there are two complete distinct sets of entries for the
>> >  processor types. One for i386, one for x86_64. However, there should
>> >  normally be a big overlap between the two, since all x86_64 processors
>> >  support the i386 architecture. So maybe we should have a single list,
>> >  with certain processor not being visible in the i386. This would ensure
>> >  consistency between the list of processors available on i386 and x86_64.
> In other words, something like:
>
>  From d8b0cd864463dedb8a934d1b2181d1ce074f525f Mon Sep 17 00:00:00 2001
> From: Thomas Petazzoni<thomas.petazzoni@free-electrons.com>
> Date: Wed, 25 Jul 2012 21:12:59 +0200
> Subject: [PATCH] Simplify x86 target architecture variant handling


  I haven't tested it, but looks good at first sight.

  That said, you still agree with a separate BR2_mips and BR2_mips64, right?

  Regards,
  Arnout
-- 
Arnout Vandecappelle                               arnout at mind be
Senior Embedded Software Architect                 +32-16-286540
Essensium/Mind                                     http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium                BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-25 19:15       ` Thomas Petazzoni
  2012-07-26 16:38         ` Arnout Vandecappelle
@ 2012-07-26 19:01         ` Thomas Petazzoni
  2012-07-26 19:38           ` Gustavo Zacarias
  1 sibling, 1 reply; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-26 19:01 UTC (permalink / raw)
  To: buildroot

Le Wed, 25 Jul 2012 21:15:14 +0200,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> a ?crit :

> In other words, something like:
> 
> From d8b0cd864463dedb8a934d1b2181d1ce074f525f Mon Sep 17 00:00:00 2001
> From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Date: Wed, 25 Jul 2012 21:12:59 +0200
> Subject: [PATCH] Simplify x86 target architecture variant handling
> 
> Instead of having two separate list of choices for select the target
> architecture variant for i386 and x86_64, with many CPU choices
> duplicated (because all modern x86 CPUs can be both used as i386 or
> x86_64), merge them into a single list. In the x86_64 case, all the
> x86 CPUs that do not support the 64 bits instruction set are hidden.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

What do you think of this proposal (see below).

Thanks!

Thomas

> ---
>  target/Config.in.arch   |  111 ++++++++++++++---------------------------------
>  toolchain/gcc/Config.in |    4 +-
>  2 files changed, 35 insertions(+), 80 deletions(-)
> 
> diff --git a/target/Config.in.arch b/target/Config.in.arch
> index 75c5499..34a12bc 100644
> --- a/target/Config.in.arch
> +++ b/target/Config.in.arch
> @@ -337,44 +337,58 @@ config BR2_X86_CPU_HAS_SSSE3
>  
>  choice
>  	prompt "Target Architecture Variant"
> -	depends on BR2_i386
> -	default BR2_x86_i586
> +	depends on BR2_i386 || BR2_x86_64
> +	default BR2_x86_i586 if BR2_i386
> +	default BR2_x86_generic if BR2_x86_64
>  	help
>  	  Specific CPU variant to use
>  
> +config BR2_x86_generic
> +	bool "generic"
>  config BR2_x86_i386
>  	bool "i386"
> +	depends on !BR2_x86_64
>  config BR2_x86_i486
>  	bool "i486"
> +	depends on !BR2_x86_64
>  config BR2_x86_i586
>  	bool "i586"
> +	depends on !BR2_x86_64
>  config BR2_x86_i686
>  	bool "i686"
> +	depends on !BR2_x86_64
>  config BR2_x86_pentiumpro
>  	bool "pentium pro"
> +	depends on !BR2_x86_64
>  config BR2_x86_pentium_mmx
>  	bool "pentium MMX"
>  	select BR2_X86_CPU_HAS_MMX
> +	depends on !BR2_x86_64
>  config BR2_x86_pentium_m
>  	bool "pentium mobile"
> +	depends on !BR2_x86_64
>  config BR2_x86_pentium2
>  	bool "pentium2"
>  	select BR2_X86_CPU_HAS_MMX
> +	depends on !BR2_x86_64
>  config BR2_x86_pentium3
>  	bool "pentium3"
>  	select BR2_X86_CPU_HAS_MMX
>  	select BR2_X86_CPU_HAS_SSE
> +	depends on !BR2_x86_64
>  config BR2_x86_pentium4
>  	bool "pentium4"
>  	select BR2_X86_CPU_HAS_MMX
>  	select BR2_X86_CPU_HAS_SSE
>  	select BR2_X86_CPU_HAS_SSE2
> +	depends on !BR2_x86_64
>  config BR2_x86_prescott
>  	bool "prescott"
>  	select BR2_X86_CPU_HAS_MMX
>  	select BR2_X86_CPU_HAS_SSE
>  	select BR2_X86_CPU_HAS_SSE2
>  	select BR2_X86_CPU_HAS_SSE3
> +	depends on !BR2_x86_64
>  config BR2_x86_nocona
>  	bool "nocona"
>  	select BR2_X86_CPU_HAS_MMX
> @@ -398,16 +412,20 @@ config BR2_x86_atom
>  config BR2_x86_k6
>  	bool "k6"
>  	select BR2_X86_CPU_HAS_MMX
> +	depends on !BR2_x86_64
>  config BR2_x86_k6_2
>  	bool "k6-2"
>  	select BR2_X86_CPU_HAS_MMX
> +	depends on !BR2_x86_64
>  config BR2_x86_athlon
>  	bool "athlon"
>  	select BR2_X86_CPU_HAS_MMX
> +	depends on !BR2_x86_64
>  config BR2_x86_athlon_4
>  	bool "athlon-4"
>  	select BR2_X86_CPU_HAS_MMX
>  	select BR2_X86_CPU_HAS_SSE
> +	depends on !BR2_x86_64
>  config BR2_x86_opteron
>  	bool "opteron"
>  	select BR2_X86_CPU_HAS_MMX
> @@ -430,68 +448,24 @@ config BR2_x86_geode
>  	# Don't include MMX support because there several variant of geode
>  	# processor, some with MMX support, some without.
>  	# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
> +	depends on !BR2_x86_64
>  config BR2_x86_c3
>  	bool "Via/Cyrix C3 (Samuel/Ezra cores)"
>  	select BR2_X86_CPU_HAS_MMX
> +	depends on !BR2_x86_64
>  config BR2_x86_c32
>  	bool "Via C3-2 (Nehemiah cores)"
>  	select BR2_X86_CPU_HAS_MMX
>  	select BR2_X86_CPU_HAS_SSE
> +	depends on !BR2_x86_64
>  config BR2_x86_winchip_c6
>  	bool "IDT Winchip C6"
>  	select BR2_X86_CPU_HAS_MMX
> +	depends on !BR2_x86_64
>  config BR2_x86_winchip2
>  	bool "IDT Winchip 2"
>  	select BR2_X86_CPU_HAS_MMX
> -endchoice
> -
> -choice
> -	prompt "Target Architecture Variant"
> -	depends on BR2_x86_64
> -	default BR2_x86_64_generic
> -	help
> -	  Specific CPU variant to use
> -
> -config BR2_x86_64_generic
> -	bool "generic"
> -config BR2_x86_64_barcelona
> -	bool "barcelona"
> -	select BR2_X86_CPU_HAS_MMX
> -	select BR2_X86_CPU_HAS_3DNOW
> -	select BR2_X86_CPU_HAS_SSE
> -	select BR2_X86_CPU_HAS_SSE2
> -	select BR2_X86_CPU_HAS_SSE3
> -config BR2_x86_64_opteron_sse3
> -	bool "opteron w/ sse3"
> -	select BR2_X86_CPU_HAS_MMX
> -	select BR2_X86_CPU_HAS_SSE
> -	select BR2_X86_CPU_HAS_SSE2
> -	select BR2_X86_CPU_HAS_SSE3
> -config BR2_x86_64_opteron
> -	bool "opteron"
> -	select BR2_X86_CPU_HAS_MMX
> -	select BR2_X86_CPU_HAS_SSE
> -	select BR2_X86_CPU_HAS_SSE2
> -config BR2_x86_64_nocona
> -	bool "nocona"
> -	select BR2_X86_CPU_HAS_MMX
> -	select BR2_X86_CPU_HAS_SSE
> -	select BR2_X86_CPU_HAS_SSE2
> -	select BR2_X86_CPU_HAS_SSE3
> -config BR2_x86_64_core2
> -	bool "core2"
> -	select BR2_X86_CPU_HAS_MMX
> -	select BR2_X86_CPU_HAS_SSE
> -	select BR2_X86_CPU_HAS_SSE2
> -	select BR2_X86_CPU_HAS_SSE3
> -	select BR2_X86_CPU_HAS_SSSE3
> -config BR2_x86_64_atom
> -	bool "atom"
> -	select BR2_X86_CPU_HAS_MMX
> -	select BR2_X86_CPU_HAS_SSE
> -	select BR2_X86_CPU_HAS_SSE2
> -	select BR2_X86_CPU_HAS_SSE3
> -	select BR2_X86_CPU_HAS_SSSE3
> +	depends on !BR2_x86_64
>  endchoice
>  
>  choice
> @@ -676,16 +650,17 @@ config BR2_ARCH
>  	default "i686"		if BR2_x86_pentium_m
>  	default "i686"		if BR2_x86_pentiumpro
>  	default "i686"		if BR2_x86_prescott
> -	default "i686"		if BR2_x86_nocona
> -	default "i686"		if BR2_x86_core2
> -	default "i686"		if BR2_x86_atom
> -	default "i686"		if BR2_x86_opteron
> -	default "i686"		if BR2_x86_opteron_sse3
> -	default "i686"		if BR2_x86_barcelona
> +	default "i686"		if BR2_x86_nocona && BR2_i386
> +	default "i686"		if BR2_x86_core2 && BR2_i386
> +	default "i686"		if BR2_x86_atom && BR2_i386
> +	default "i686"		if BR2_x86_opteron && BR2_i386
> +	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
> +	default "i686"		if BR2_x86_barcelona && BR2_i386
>  	default "i686"		if BR2_x86_k6
>  	default "i686"		if BR2_x86_k6_2
>  	default "i686"		if BR2_x86_athlon
>  	default "i686"		if BR2_x86_athlon_4
> +	default "x86_64"	if BR2_x86_64
>  	default "m68k"		if BR2_m68k
>  	default "microblaze"	if BR2_microblaze
>  	default "mips"		if BR2_mips
> @@ -701,14 +676,6 @@ config BR2_ARCH
>  	default "sh4aeb"	if BR2_sh4aeb
>  	default "sh64"		if BR2_sh64
>  	default "sparc"		if BR2_sparc
> -	default "x86_64"	if BR2_x86_64
> -	default "x86_64"	if BR2_x86_64_generic
> -	default "x86_64"	if BR2_x86_64_nocona
> -	default "x86_64"	if BR2_x86_64_core2
> -	default "x86_64"	if BR2_x86_64_atom
> -	default "x86_64"	if BR2_x86_64_opteron
> -	default "x86_64"	if BR2_x86_64_opteron_sse3
> -	default "x86_64"	if BR2_x86_64_barcelona
>  	default "xtensa"	if BR2_xtensa
>  
>  
> @@ -750,13 +717,7 @@ config BR2_GCC_TARGET_TUNE
>  	default c3		if BR2_x86_c3
>  	default c3-2		if BR2_x86_c32
>  	default geode		if BR2_x86_geode
> -	default generic		if BR2_x86_64_generic
> -	default nocona		if BR2_x86_64_nocona
> -	default core2		if BR2_x86_64_core2
> -	default atom		if BR2_x86_64_atom
> -	default k8		if BR2_x86_64_opteron
> -	default k8-sse3		if BR2_x86_64_opteron_sse3
> -	default barcelona	if BR2_x86_64_barcelona
> +	default generic		if BR2_x86_generic
>  	default arm600		if BR2_arm600
>  	default arm610		if BR2_arm610
>  	default arm620		if BR2_arm620
> @@ -864,12 +825,6 @@ config BR2_GCC_TARGET_ARCH
>  	default athlon-4	if BR2_x86_athlon_4
>  	default winchip-c6	if BR2_x86_winchip_c6
>  	default winchip2	if BR2_x86_winchip2
> -	default nocona		if BR2_x86_64_nocona
> -	default core2		if BR2_x86_64_core2
> -	default atom		if BR2_x86_64_atom
> -	default k8		if BR2_x86_64_opteron
> -	default k8-sse3		if BR2_x86_64_opteron_sse3
> -	default barcelona	if BR2_x86_64_barcelona
>  	default c3		if BR2_x86_c3
>  	default c3-2		if BR2_x86_c32
>  	default geode		if BR2_x86_geode
> diff --git a/toolchain/gcc/Config.in b/toolchain/gcc/Config.in
> index fa526bb..d08efbc 100644
> --- a/toolchain/gcc/Config.in
> +++ b/toolchain/gcc/Config.in
> @@ -15,11 +15,11 @@ choice
>  	       bool "gcc 4.2.2-avr32-2.1.5"
>  
>  	config BR2_GCC_VERSION_4_3_X
> -		depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_x86_atom && !BR2_x86_64_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc
> +		depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc
>  		bool "gcc 4.3.x"
>  
>  	config BR2_GCC_VERSION_4_4_X
> -		depends on !BR2_avr32 && !BR2_x86_atom && !BR2_x86_64_atom
> +		depends on !BR2_avr32 && !BR2_x86_atom
>  		bool "gcc 4.4.x"
>  
>  	config BR2_GCC_VERSION_4_5_X



-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-26 19:01         ` Thomas Petazzoni
@ 2012-07-26 19:38           ` Gustavo Zacarias
  2012-07-27  6:56             ` Thomas Petazzoni
  0 siblings, 1 reply; 14+ messages in thread
From: Gustavo Zacarias @ 2012-07-26 19:38 UTC (permalink / raw)
  To: buildroot

On 07/26/12 16:01, Thomas Petazzoni wrote:

> Le Wed, 25 Jul 2012 21:15:14 +0200,
> Thomas Petazzoni <thomas.petazzoni@free-electrons.com> a ?crit :
> 
>> In other words, something like:
>>
>> From d8b0cd864463dedb8a934d1b2181d1ce074f525f Mon Sep 17 00:00:00 2001
>> From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>> Date: Wed, 25 Jul 2012 21:12:59 +0200
>> Subject: [PATCH] Simplify x86 target architecture variant handling
>>
>> Instead of having two separate list of choices for select the target
>> architecture variant for i386 and x86_64, with many CPU choices
>> duplicated (because all modern x86 CPUs can be both used as i386 or
>> x86_64), merge them into a single list. In the x86_64 case, all the
>> x86 CPUs that do not support the 64 bits instruction set are hidden.
>>
>> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> 
> What do you think of this proposal (see below).
> 
> Thanks!
> 
> Thomas

Looks good in principle.
A small addition...

config BR2_x86_pentium_m
        bool "pentium mobile"
+	select BR2_X86_CPU_HAS_MMX
+	select BR2_X86_CPU_HAS_SSE
        depends on !BR2_x86_64

Also i'd go for a more generic naming for the opterons, i.e. k8,
k8-sse3, amdfam10 (instead of barcelona) but they're just details that
can be addressed later with a few additions for newer gcc versions in
another patch.
Regards.

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-26 16:38         ` Arnout Vandecappelle
@ 2012-07-27  6:31           ` Thomas Petazzoni
  0 siblings, 0 replies; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-27  6:31 UTC (permalink / raw)
  To: buildroot

Le Thu, 26 Jul 2012 18:38:12 +0200,
Arnout Vandecappelle <arnout@mind.be> a ?crit :

>   I haven't tested it, but looks good at first sight.
> 
>   That said, you still agree with a separate BR2_mips and BR2_mips64, right?

Yes: just like x86/x86-64. Separate architecture options, but a single
"Target Architecture Variant" choice, with the relevant "if" conditions
to show/hide the right processors depending on whether they are 64 bits
capable or not.

Best regards,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-26 19:38           ` Gustavo Zacarias
@ 2012-07-27  6:56             ` Thomas Petazzoni
  2012-07-27 10:17               ` Gustavo Zacarias
  0 siblings, 1 reply; 14+ messages in thread
From: Thomas Petazzoni @ 2012-07-27  6:56 UTC (permalink / raw)
  To: buildroot

Le Thu, 26 Jul 2012 16:38:40 -0300,
Gustavo Zacarias <gustavo@zacarias.com.ar> a ?crit :

> Looks good in principle.

Ok, thanks.

> A small addition...
> 
> config BR2_x86_pentium_m
>         bool "pentium mobile"
> +	select BR2_X86_CPU_HAS_MMX
> +	select BR2_X86_CPU_HAS_SSE
>         depends on !BR2_x86_64

Ok.

> Also i'd go for a more generic naming for the opterons, i.e. k8,
> k8-sse3, amdfam10 (instead of barcelona) but they're just details that
> can be addressed later with a few additions for newer gcc versions in
> another patch.

Yes, you'll send a patch later for this. My knowledge of the x86
variants is somewhat rusty :-)

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [Buildroot] [PATCH] Clarify MIPS ABIs support
  2012-07-27  6:56             ` Thomas Petazzoni
@ 2012-07-27 10:17               ` Gustavo Zacarias
  0 siblings, 0 replies; 14+ messages in thread
From: Gustavo Zacarias @ 2012-07-27 10:17 UTC (permalink / raw)
  To: buildroot

On 07/27/12 03:56, Thomas Petazzoni wrote:

> Yes, you'll send a patch later for this. My knowledge of the x86
> variants is somewhat rusty :-)
> 
> Thomas

"man gcc" does wonders :)
Regards.

^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2012-07-27 10:17 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-07-24 20:47 [Buildroot] [PATCH] Clarify MIPS ABIs support Thomas Petazzoni
2012-07-25 16:29 ` Thomas Petazzoni
2012-07-25 17:32 ` Arnout Vandecappelle
2012-07-25 18:25   ` Thomas Petazzoni
2012-07-25 18:31     ` Thomas Petazzoni
2012-07-25 19:15       ` Thomas Petazzoni
2012-07-26 16:38         ` Arnout Vandecappelle
2012-07-27  6:31           ` Thomas Petazzoni
2012-07-26 19:01         ` Thomas Petazzoni
2012-07-26 19:38           ` Gustavo Zacarias
2012-07-27  6:56             ` Thomas Petazzoni
2012-07-27 10:17               ` Gustavo Zacarias
2012-07-25 20:25     ` Gustavo Zacarias
2012-07-25 20:38       ` Thomas Petazzoni

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