[PATCH 0/2] ARM: imx: change building of SSI FIQ support for i.MX processors

[PATCH 0/2] ARM: imx: change building of SSI FIQ support for i.MX processors

[Matt Sealey]

Patches to fix Thumb2 kernel building and change the dependency for SSI FIQ
support to a more specific option to prevent it from being needlessly built
in the first place on more frugal kernel configurations.

A better solution might be to rewrite the function in Thumb-compatible assembly
but the target processors do not support Thumb2 kernels anyway, and the last
time it was suggested the updated code was nacked by Russell. Since its built
as a side-effect on ARMv6/v7 i.MX processors, these could be considered somewhat
Needful Things(tm) by people wanting Thumb2 kernels based on imx_v6_v7_defconfig
or wanting to remove certain boards from their configs.

Matt Sealey (2):
  ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL
    build breakage
  ARM: only build ssi-fiq.S et al if CONFIG_SND_IMX_SOC_PCM_FIQ is
    selected

 arch/arm/plat-mxc/Makefile  |    2 +-
 arch/arm/plat-mxc/ssi-fiq.S |    1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

-- 
1.7.9.5

[PATCH 0/2] ARM: imx: change building of SSI FIQ support for i.MX processors

[Matt Sealey]

Patches to fix Thumb2 kernel building and change the dependency for SSI FIQ
support to a more specific option to prevent it from being needlessly built
in the first place on more frugal kernel configurations.

A better solution might be to rewrite the function in Thumb-compatible assembly
but the target processors do not support Thumb2 kernels anyway, and the last
time it was suggested the updated code was nacked by Russell. Since its built
as a side-effect on ARMv6/v7 i.MX processors, these could be considered somewhat
Needful Things(tm) by people wanting Thumb2 kernels based on imx_v6_v7_defconfig
or wanting to remove certain boards from their configs.

Matt Sealey (2):
  ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL
    build breakage
  ARM: only build ssi-fiq.S et al if CONFIG_SND_IMX_SOC_PCM_FIQ is
    selected

 arch/arm/plat-mxc/Makefile  |    2 +-
 arch/arm/plat-mxc/ssi-fiq.S |    1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

-- 
1.7.9.5

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Matt Sealey]

If i.MX SSI FIQ support is enabled then it is impossible to build a Thumb2
kernel image due to the code not being written with Thumb2 in mind (over-use
of registers). In order not to break Thumb2 kernels, compile this as ARM. All
the processors which require this support will run ARM code so there is no
problem at runtime in doing this, even if it does produce a strange mix of
code that may not be desired.

In theory this should only be needed on configs based on imx_v4_v5_defconfig
where CONFIG_THUMB2_KERNEL cannot be selected anyway since these SoCs do not
have ARM cores capable of running Thumb2 code. This also makes rewriting the
code as Thumb-compatible kind of redundant. But since one Eukrea board audio
driver needs it, and there is an i.MX51 CPU module for this board, it gets
pulled in for imx_v6_v7_defconfig too, making this a necessity.

Signed-off-by: Matt Sealey <matt@genesi-usa.com>
---
 arch/arm/plat-mxc/ssi-fiq.S |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
index 8397a2d..ac09af8 100644
--- a/arch/arm/plat-mxc/ssi-fiq.S
+++ b/arch/arm/plat-mxc/ssi-fiq.S
@@ -28,6 +28,7 @@
 #define SSI_SIER_RFF0_EN	(1 << 2)
 
 		.text
+		.arm
 		.global	imx_ssi_fiq_start
 		.global	imx_ssi_fiq_end
 		.global imx_ssi_fiq_base
-- 
1.7.9.5

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Matt Sealey]

If i.MX SSI FIQ support is enabled then it is impossible to build a Thumb2
kernel image due to the code not being written with Thumb2 in mind (over-use
of registers). In order not to break Thumb2 kernels, compile this as ARM. All
the processors which require this support will run ARM code so there is no
problem at runtime in doing this, even if it does produce a strange mix of
code that may not be desired.

In theory this should only be needed on configs based on imx_v4_v5_defconfig
where CONFIG_THUMB2_KERNEL cannot be selected anyway since these SoCs do not
have ARM cores capable of running Thumb2 code. This also makes rewriting the
code as Thumb-compatible kind of redundant. But since one Eukrea board audio
driver needs it, and there is an i.MX51 CPU module for this board, it gets
pulled in for imx_v6_v7_defconfig too, making this a necessity.

Signed-off-by: Matt Sealey <matt@genesi-usa.com>
---
 arch/arm/plat-mxc/ssi-fiq.S |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
index 8397a2d..ac09af8 100644
--- a/arch/arm/plat-mxc/ssi-fiq.S
+++ b/arch/arm/plat-mxc/ssi-fiq.S
@@ -28,6 +28,7 @@
 #define SSI_SIER_RFF0_EN	(1 << 2)
 
 		.text
+		.arm
 		.global	imx_ssi_fiq_start
 		.global	imx_ssi_fiq_end
 		.global imx_ssi_fiq_base
-- 
1.7.9.5

[PATCH 2/2] ARM: only build ssi-fiq.S et al if CONFIG_SND_IMX_SOC_PCM_FIQ is selected

[Matt Sealey]

Further to the previous patch, a custom configuration may be used based on the
imx_v6_v7_defconfig which removes the board depending on the audio driver pulling
this support code. However, since it is built dependent on CONFIG_SND_IMX_SOC
it is enabled in the build for all i.MX processors which enable any audio drivers.

Correct this by only building the SSI FIQ support code when the more specific
CONFIG_SND_IMX_SOC_PCM_FIQ is enabled. Since it's enabled in the imx_v6_v7_defconfig
anyway by the Eukrea board, nothing changes using the defconfig, so this is just
a convenience for people reconfiguring their kernels more sparsely than the default.

Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/plat-mxc/Makefile |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 6ac7200..89927f5 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_MXC_USE_EPIT) += epit.o
 obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
 obj-$(CONFIG_CPU_FREQ_IMX)    += cpufreq.o
 obj-$(CONFIG_CPU_IDLE) += cpuidle.o
-ifdef CONFIG_SND_IMX_SOC
+ifdef CONFIG_SND_IMX_SOC_PCM_FIQ
 obj-y += ssi-fiq.o
 obj-y += ssi-fiq-ksym.o
 endif
-- 
1.7.9.5

[PATCH 2/2] ARM: only build ssi-fiq.S et al if CONFIG_SND_IMX_SOC_PCM_FIQ is selected

[Matt Sealey]

Further to the previous patch, a custom configuration may be used based on the
imx_v6_v7_defconfig which removes the board depending on the audio driver pulling
this support code. However, since it is built dependent on CONFIG_SND_IMX_SOC
it is enabled in the build for all i.MX processors which enable any audio drivers.

Correct this by only building the SSI FIQ support code when the more specific
CONFIG_SND_IMX_SOC_PCM_FIQ is enabled. Since it's enabled in the imx_v6_v7_defconfig
anyway by the Eukrea board, nothing changes using the defconfig, so this is just
a convenience for people reconfiguring their kernels more sparsely than the default.

Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/plat-mxc/Makefile |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 6ac7200..89927f5 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_MXC_USE_EPIT) += epit.o
 obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
 obj-$(CONFIG_CPU_FREQ_IMX)    += cpufreq.o
 obj-$(CONFIG_CPU_IDLE) += cpuidle.o
-ifdef CONFIG_SND_IMX_SOC
+ifdef CONFIG_SND_IMX_SOC_PCM_FIQ
 obj-y += ssi-fiq.o
 obj-y += ssi-fiq-ksym.o
 endif
-- 
1.7.9.5

Re: [PATCH 2/2] ARM: only build ssi-fiq.S et al if CONFIG_SND_IMX_SOC_PCM_FIQ is selected

[Sascha Hauer]

On Tue, Aug 07, 2012 at 05:45:14PM -0500, Matt Sealey wrote:
> Further to the previous patch, a custom configuration may be used based on the
> imx_v6_v7_defconfig which removes the board depending on the audio driver pulling
> this support code. However, since it is built dependent on CONFIG_SND_IMX_SOC
> it is enabled in the build for all i.MX processors which enable any audio drivers.
> 
> Correct this by only building the SSI FIQ support code when the more specific
> CONFIG_SND_IMX_SOC_PCM_FIQ is enabled. Since it's enabled in the imx_v6_v7_defconfig
> anyway by the Eukrea board, nothing changes using the defconfig, so this is just
> a convenience for people reconfiguring their kernels more sparsely than the default.
> 
> Signed-off-by: Matt Sealey <matt@genesi-usa.com>
> Acked-by: Shawn Guo <shawn.guo@linaro.org>
> ---
>  arch/arm/plat-mxc/Makefile |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
> index 6ac7200..89927f5 100644
> --- a/arch/arm/plat-mxc/Makefile
> +++ b/arch/arm/plat-mxc/Makefile
> @@ -16,7 +16,7 @@ obj-$(CONFIG_MXC_USE_EPIT) += epit.o
>  obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
>  obj-$(CONFIG_CPU_FREQ_IMX)    += cpufreq.o
>  obj-$(CONFIG_CPU_IDLE) += cpuidle.o
> -ifdef CONFIG_SND_IMX_SOC
> +ifdef CONFIG_SND_IMX_SOC_PCM_FIQ
>  obj-y += ssi-fiq.o
>  obj-y += ssi-fiq-ksym.o
>  endif

Since you are here already, better do:

obj-$(CONFIG_SND_IMX_SOC_PCM_FIQ) +) += ssi-fiq.o ssi-fiq-ksym.o

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 2/2] ARM: only build ssi-fiq.S et al if CONFIG_SND_IMX_SOC_PCM_FIQ is selected

[Sascha Hauer]

On Tue, Aug 07, 2012 at 05:45:14PM -0500, Matt Sealey wrote:
> Further to the previous patch, a custom configuration may be used based on the
> imx_v6_v7_defconfig which removes the board depending on the audio driver pulling
> this support code. However, since it is built dependent on CONFIG_SND_IMX_SOC
> it is enabled in the build for all i.MX processors which enable any audio drivers.
> 
> Correct this by only building the SSI FIQ support code when the more specific
> CONFIG_SND_IMX_SOC_PCM_FIQ is enabled. Since it's enabled in the imx_v6_v7_defconfig
> anyway by the Eukrea board, nothing changes using the defconfig, so this is just
> a convenience for people reconfiguring their kernels more sparsely than the default.
> 
> Signed-off-by: Matt Sealey <matt@genesi-usa.com>
> Acked-by: Shawn Guo <shawn.guo@linaro.org>
> ---
>  arch/arm/plat-mxc/Makefile |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
> index 6ac7200..89927f5 100644
> --- a/arch/arm/plat-mxc/Makefile
> +++ b/arch/arm/plat-mxc/Makefile
> @@ -16,7 +16,7 @@ obj-$(CONFIG_MXC_USE_EPIT) += epit.o
>  obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
>  obj-$(CONFIG_CPU_FREQ_IMX)    += cpufreq.o
>  obj-$(CONFIG_CPU_IDLE) += cpuidle.o
> -ifdef CONFIG_SND_IMX_SOC
> +ifdef CONFIG_SND_IMX_SOC_PCM_FIQ
>  obj-y += ssi-fiq.o
>  obj-y += ssi-fiq-ksym.o
>  endif

Since you are here already, better do:

obj-$(CONFIG_SND_IMX_SOC_PCM_FIQ) +) += ssi-fiq.o ssi-fiq-ksym.o

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Sascha Hauer]

On Tue, Aug 07, 2012 at 05:45:13PM -0500, Matt Sealey wrote:
> If i.MX SSI FIQ support is enabled then it is impossible to build a Thumb2
> kernel image due to the code not being written with Thumb2 in mind (over-use
> of registers). In order not to break Thumb2 kernels, compile this as ARM. All
> the processors which require this support will run ARM code so there is no
> problem at runtime in doing this, even if it does produce a strange mix of
> code that may not be desired.
> 
> In theory this should only be needed on configs based on imx_v4_v5_defconfig
> where CONFIG_THUMB2_KERNEL cannot be selected anyway since these SoCs do not
> have ARM cores capable of running Thumb2 code. This also makes rewriting the
> code as Thumb-compatible kind of redundant. But since one Eukrea board audio
> driver needs it, and there is an i.MX51 CPU module for this board, it gets
> pulled in for imx_v6_v7_defconfig too, making this a necessity.
> 
> Signed-off-by: Matt Sealey <matt@genesi-usa.com>
> ---
>  arch/arm/plat-mxc/ssi-fiq.S |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
> index 8397a2d..ac09af8 100644
> --- a/arch/arm/plat-mxc/ssi-fiq.S
> +++ b/arch/arm/plat-mxc/ssi-fiq.S
> @@ -28,6 +28,7 @@
>  #define SSI_SIER_RFF0_EN	(1 << 2)
>  
>  		.text
> +		.arm
>  		.global	imx_ssi_fiq_start
>  		.global	imx_ssi_fiq_end
>  		.global imx_ssi_fiq_base

I think it would be better to add a depends on !THUMB2_KERNEL to
SND_IMX_SOC_PCM_FIQ. The above may result in broken code in a thumb2
kernel, so I'd rather keep the compile error instead.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Sascha Hauer]

On Tue, Aug 07, 2012 at 05:45:13PM -0500, Matt Sealey wrote:
> If i.MX SSI FIQ support is enabled then it is impossible to build a Thumb2
> kernel image due to the code not being written with Thumb2 in mind (over-use
> of registers). In order not to break Thumb2 kernels, compile this as ARM. All
> the processors which require this support will run ARM code so there is no
> problem at runtime in doing this, even if it does produce a strange mix of
> code that may not be desired.
> 
> In theory this should only be needed on configs based on imx_v4_v5_defconfig
> where CONFIG_THUMB2_KERNEL cannot be selected anyway since these SoCs do not
> have ARM cores capable of running Thumb2 code. This also makes rewriting the
> code as Thumb-compatible kind of redundant. But since one Eukrea board audio
> driver needs it, and there is an i.MX51 CPU module for this board, it gets
> pulled in for imx_v6_v7_defconfig too, making this a necessity.
> 
> Signed-off-by: Matt Sealey <matt@genesi-usa.com>
> ---
>  arch/arm/plat-mxc/ssi-fiq.S |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
> index 8397a2d..ac09af8 100644
> --- a/arch/arm/plat-mxc/ssi-fiq.S
> +++ b/arch/arm/plat-mxc/ssi-fiq.S
> @@ -28,6 +28,7 @@
>  #define SSI_SIER_RFF0_EN	(1 << 2)
>  
>  		.text
> +		.arm
>  		.global	imx_ssi_fiq_start
>  		.global	imx_ssi_fiq_end
>  		.global imx_ssi_fiq_base

I think it would be better to add a depends on !THUMB2_KERNEL to
SND_IMX_SOC_PCM_FIQ. The above may result in broken code in a thumb2
kernel, so I'd rather keep the compile error instead.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Matt Sealey]

On Wed, Aug 8, 2012 at 1:55 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
>>               .text
>> +             .arm
>>               .global imx_ssi_fiq_start
>>               .global imx_ssi_fiq_end
>>               .global imx_ssi_fiq_base
>
> I think it would be better to add a depends on !THUMB2_KERNEL to
> SND_IMX_SOC_PCM_FIQ. The above may result in broken code in a thumb2
> kernel, so I'd rather keep the compile error instead.

I'm curious as to how/why would it result in broken code? It's not
possible that the processors relying on
the imx_ssi_fiq_* stuff cannot run ARM code (unless Freescale shipped
a weird version) so it should
magically enter and exit. I wonder if it needs some thumb-interworking
stuff wrapped around it though.
You'd know better than me..

I'm a little worried that making it !CONFIG_THUMB2_KERNEL would
basically make more than
one of the boards in imx_v6_v7_defconfig suddenly lose audio support
for no other reason.. I don't
like things just disappearing from the kernel by dependency magic.
That said, a crash would be worse.

I guess the eukrea tlv320 audio support should also be split, or
looked at. This is the snippet that
confuses me the most;

config SND_SOC_EUKREA_TLV320
        tristate "Eukrea TLV320"
        depends on MACH_EUKREA_MBIMX27_BASEBOARD \
                || MACH_EUKREA_MBIMXSD25_BASEBOARD \
                || MACH_EUKREA_MBIMXSD35_BASEBOARD \
                || MACH_EUKREA_MBIMXSD51_BASEBOARD
        depends on I2C
        select SND_SOC_TLV320AIC23
        select SND_SOC_IMX_PCM_FIQ
        select SND_SOC_IMX_AUDMUX
        select SND_SOC_IMX_SSI
        help
          Enable I2S based access to the TLV320AIC23B codec attached
          to the SSI interface

.. Since you said I2S support doesn't require it, only AC97, this alone seems
redundant, but since I wasn't the one to write it, test it, have no
access to this
board I have no idea. Mark's assertion that it's just not required now DMA works
properly, could be true and this can be ditched, but I don't want to
patch something
I can't actually test.. my primary concern was fixing the build breakage.

If that gets fixed, then the only dependencies are the WM1131_EV1 board
which isn't in imx_v6_v7_defconfig, and the phyCORE support which needs it
for AC97. That's one of your customers, right? I wouldn't want to disable a
board, but I can justify to myself disabling the audio for *one* board based if
it's just a caveat of a Thumb2 kernel.

I'm going to do a trapse through and find where Russell nacked Dave's
thumb-aware
rewrite.. would you mind if you have any of these boards seeing if it
really DOES
cause broken code? The moment we noticed this was broken we quit designing
with AC97 codecs, so there's no Genesi board of similar pedigree
around that ever
got to a PCB..

-- 
Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Matt Sealey]

On Wed, Aug 8, 2012 at 1:55 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
>>               .text
>> +             .arm
>>               .global imx_ssi_fiq_start
>>               .global imx_ssi_fiq_end
>>               .global imx_ssi_fiq_base
>
> I think it would be better to add a depends on !THUMB2_KERNEL to
> SND_IMX_SOC_PCM_FIQ. The above may result in broken code in a thumb2
> kernel, so I'd rather keep the compile error instead.

I'm curious as to how/why would it result in broken code? It's not
possible that the processors relying on
the imx_ssi_fiq_* stuff cannot run ARM code (unless Freescale shipped
a weird version) so it should
magically enter and exit. I wonder if it needs some thumb-interworking
stuff wrapped around it though.
You'd know better than me..

I'm a little worried that making it !CONFIG_THUMB2_KERNEL would
basically make more than
one of the boards in imx_v6_v7_defconfig suddenly lose audio support
for no other reason.. I don't
like things just disappearing from the kernel by dependency magic.
That said, a crash would be worse.

I guess the eukrea tlv320 audio support should also be split, or
looked at. This is the snippet that
confuses me the most;

config SND_SOC_EUKREA_TLV320
        tristate "Eukrea TLV320"
        depends on MACH_EUKREA_MBIMX27_BASEBOARD \
                || MACH_EUKREA_MBIMXSD25_BASEBOARD \
                || MACH_EUKREA_MBIMXSD35_BASEBOARD \
                || MACH_EUKREA_MBIMXSD51_BASEBOARD
        depends on I2C
        select SND_SOC_TLV320AIC23
        select SND_SOC_IMX_PCM_FIQ
        select SND_SOC_IMX_AUDMUX
        select SND_SOC_IMX_SSI
        help
          Enable I2S based access to the TLV320AIC23B codec attached
          to the SSI interface

.. Since you said I2S support doesn't require it, only AC97, this alone seems
redundant, but since I wasn't the one to write it, test it, have no
access to this
board I have no idea. Mark's assertion that it's just not required now DMA works
properly, could be true and this can be ditched, but I don't want to
patch something
I can't actually test.. my primary concern was fixing the build breakage.

If that gets fixed, then the only dependencies are the WM1131_EV1 board
which isn't in imx_v6_v7_defconfig, and the phyCORE support which needs it
for AC97. That's one of your customers, right? I wouldn't want to disable a
board, but I can justify to myself disabling the audio for *one* board based if
it's just a caveat of a Thumb2 kernel.

I'm going to do a trapse through and find where Russell nacked Dave's
thumb-aware
rewrite.. would you mind if you have any of these boards seeing if it
really DOES
cause broken code? The moment we noticed this was broken we quit designing
with AC97 codecs, so there's no Genesi board of similar pedigree
around that ever
got to a PCB..

-- 
Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.

Re: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Sascha Hauer]

On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
> On Wed, Aug 8, 2012 at 1:55 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> >>               .text
> >> +             .arm
> >>               .global imx_ssi_fiq_start
> >>               .global imx_ssi_fiq_end
> >>               .global imx_ssi_fiq_base
> >
> > I think it would be better to add a depends on !THUMB2_KERNEL to
> > SND_IMX_SOC_PCM_FIQ. The above may result in broken code in a thumb2
> > kernel, so I'd rather keep the compile error instead.
> 
> I'm curious as to how/why would it result in broken code? It's not
> possible that the processors relying on
> the imx_ssi_fiq_* stuff cannot run ARM code (unless Freescale shipped
> a weird version) so it should
> magically enter and exit. I wonder if it needs some thumb-interworking
> stuff wrapped around it though.
> You'd know better than me..

Currently I don't know if the code compiled in arm mode on an otherwise
thumb2 kernel does work and I do not have a thumb2 capacle hardware with
sound support to test this.

> 
> I'm a little worried that making it !CONFIG_THUMB2_KERNEL would
> basically make more than
> one of the boards in imx_v6_v7_defconfig suddenly lose audio support
> for no other reason..

Obviously no v6_v7 board does use this code as it is, because it does
not compile. So there's no risk of breaking something if we just disable
FIQ support in thumb2 mode.

Better disable an unused feature than add some untested code.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Sascha Hauer]

On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
> On Wed, Aug 8, 2012 at 1:55 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> >>               .text
> >> +             .arm
> >>               .global imx_ssi_fiq_start
> >>               .global imx_ssi_fiq_end
> >>               .global imx_ssi_fiq_base
> >
> > I think it would be better to add a depends on !THUMB2_KERNEL to
> > SND_IMX_SOC_PCM_FIQ. The above may result in broken code in a thumb2
> > kernel, so I'd rather keep the compile error instead.
> 
> I'm curious as to how/why would it result in broken code? It's not
> possible that the processors relying on
> the imx_ssi_fiq_* stuff cannot run ARM code (unless Freescale shipped
> a weird version) so it should
> magically enter and exit. I wonder if it needs some thumb-interworking
> stuff wrapped around it though.
> You'd know better than me..

Currently I don't know if the code compiled in arm mode on an otherwise
thumb2 kernel does work and I do not have a thumb2 capacle hardware with
sound support to test this.

> 
> I'm a little worried that making it !CONFIG_THUMB2_KERNEL would
> basically make more than
> one of the boards in imx_v6_v7_defconfig suddenly lose audio support
> for no other reason..

Obviously no v6_v7 board does use this code as it is, because it does
not compile. So there's no risk of breaking something if we just disable
FIQ support in thumb2 mode.

Better disable an unused feature than add some untested code.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Dave Martin]

On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:

[...]
 
> I'm going to do a trapse through and find where Russell nacked Dave's
> thumb-aware
> rewrite.. would you mind if you have any of these boards seeing if it
> really DOES

There was no NAK because I didn't get as far as posting the patch,
mostly because of the doubt about whether this code is ever relevant
on Thumb2-capable hardware.

If somebody with some old imx hardware that definitely relies on this
wants to pick it up and test it, it might still be useful.

I don't know whether I still have the original patch, but I think the
only think I did was to swap the roles of r13 and r12.  In the original
code r12 is only used as a base register, which is permissible usage
for r13 in Thumb-2.  Those two registers appear private to the fiq
handler, so I don't think the change will break anything, but I'd be
more confident is somebody is able to test it.

Cheers
---Dave

diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
index 8397a2d..3589afb 100644
--- a/arch/arm/plat-mxc/ssi-fiq.S
+++ b/arch/arm/plat-mxc/ssi-fiq.S
@@ -35,19 +35,19 @@
 		.global imx_ssi_fiq_tx_buffer
 
 imx_ssi_fiq_start:
-		ldr r12, imx_ssi_fiq_base
+		ldr r13, imx_ssi_fiq_base
 
 		/* TX */
 		ldr r11, imx_ssi_fiq_tx_buffer
 
 		/* shall we send? */
-		ldr r13, [r12, #SSI_SIER]
-		tst r13, #SSI_SIER_TFE0_EN
+		ldr r12, [r13, #SSI_SIER]
+		tst r12, #SSI_SIER_TFE0_EN
 		beq 1f
 
 		/* TX FIFO empty? */
-		ldr r13, [r12, #SSI_SISR]
-		tst r13, #SSI_SISR_TFE0
+		ldr r12, [r13, #SSI_SISR]
+		tst r12, #SSI_SISR_TFE0
 		beq 1f
 
 		mov r10, #0x10000
@@ -56,34 +56,34 @@ imx_ssi_fiq_start:
 
 		add r11, r11, r10
 
-		ldrh r13, [r11]
-		strh r13, [r12, #SSI_STX0]
+		ldrh r12, [r11]
+		strh r12, [r13, #SSI_STX0]
 
-		ldrh r13, [r11, #2]
-		strh r13, [r12, #SSI_STX0]
+		ldrh r12, [r11, #2]
+		strh r12, [r13, #SSI_STX0]
 
-		ldrh r13, [r11, #4]
-		strh r13, [r12, #SSI_STX0]
+		ldrh r12, [r11, #4]
+		strh r12, [r13, #SSI_STX0]
 
-		ldrh r13, [r11, #6]
-		strh r13, [r12, #SSI_STX0]
+		ldrh r12, [r11, #6]
+		strh r12, [r13, #SSI_STX0]
 
 		add r10, #8
-		lsr r13, r8, #16	/* r13: buffer size */
-		cmp r10, r13
-		lslgt r8, r13, #16
+		lsr r12, r8, #16	/* r12: buffer size */
+		cmp r10, r12
+		lslgt r8, r12, #16
 		addle r8, #8
 1:
 		/* RX */
 
 		/* shall we receive? */
-		ldr r13, [r12, #SSI_SIER]
-		tst r13, #SSI_SIER_RFF0_EN
+		ldr r12, [r13, #SSI_SIER]
+		tst r12, #SSI_SIER_RFF0_EN
 		beq 1f
 
 		/* RX FIFO full? */
-		ldr r13, [r12, #SSI_SISR]
-		tst r13, #SSI_SISR_RFF0
+		ldr r12, [r13, #SSI_SISR]
+		tst r12, #SSI_SISR_RFF0
 		beq 1f
 
 		ldr r11, imx_ssi_fiq_rx_buffer
@@ -94,31 +94,31 @@ imx_ssi_fiq_start:
 
 		add r11, r11, r10
 
-		ldr r13, [r12, #SSI_SACNT]
-		tst r13, #SSI_SACNT_AC97EN
+		ldr r12, [r13, #SSI_SACNT]
+		tst r12, #SSI_SACNT_AC97EN
 
-		ldr r13, [r12, #SSI_SRX0]
-		strh r13, [r11]
+		ldr r12, [r13, #SSI_SRX0]
+		strh r12, [r11]
 
-		ldr r13, [r12, #SSI_SRX0]
-		strh r13, [r11, #2]
+		ldr r12, [r13, #SSI_SRX0]
+		strh r12, [r11, #2]
 
 		/* dummy read to skip slot 12 */
-		ldrne r13, [r12, #SSI_SRX0]
+		ldrne r12, [r13, #SSI_SRX0]
 
-		ldr r13, [r12, #SSI_SRX0]
-		strh r13, [r11, #4]
+		ldr r12, [r13, #SSI_SRX0]
+		strh r12, [r11, #4]
 
-		ldr r13, [r12, #SSI_SRX0]
-		strh r13, [r11, #6]
+		ldr r12, [r13, #SSI_SRX0]
+		strh r12, [r11, #6]
 
 		/* dummy read to skip slot 12 */
-		ldrne r13, [r12, #SSI_SRX0]
+		ldrne r12, [r13, #SSI_SRX0]
 
 		add r10, #8
-		lsr r13, r9, #16	/* r13: buffer size */
-		cmp r10, r13
-		lslgt r9, r13, #16
+		lsr r12, r9, #16	/* r12: buffer size */
+		cmp r10, r12
+		lslgt r9, r12, #16
 		addle r9, #8
 
 1:

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Dave Martin]

On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:

[...]
 
> I'm going to do a trapse through and find where Russell nacked Dave's
> thumb-aware
> rewrite.. would you mind if you have any of these boards seeing if it
> really DOES

There was no NAK because I didn't get as far as posting the patch,
mostly because of the doubt about whether this code is ever relevant
on Thumb2-capable hardware.

If somebody with some old imx hardware that definitely relies on this
wants to pick it up and test it, it might still be useful.

I don't know whether I still have the original patch, but I think the
only think I did was to swap the roles of r13 and r12.  In the original
code r12 is only used as a base register, which is permissible usage
for r13 in Thumb-2.  Those two registers appear private to the fiq
handler, so I don't think the change will break anything, but I'd be
more confident is somebody is able to test it.

Cheers
---Dave

diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
index 8397a2d..3589afb 100644
--- a/arch/arm/plat-mxc/ssi-fiq.S
+++ b/arch/arm/plat-mxc/ssi-fiq.S
@@ -35,19 +35,19 @@
 		.global imx_ssi_fiq_tx_buffer
 
 imx_ssi_fiq_start:
-		ldr r12, imx_ssi_fiq_base
+		ldr r13, imx_ssi_fiq_base
 
 		/* TX */
 		ldr r11, imx_ssi_fiq_tx_buffer
 
 		/* shall we send? */
-		ldr r13, [r12, #SSI_SIER]
-		tst r13, #SSI_SIER_TFE0_EN
+		ldr r12, [r13, #SSI_SIER]
+		tst r12, #SSI_SIER_TFE0_EN
 		beq 1f
 
 		/* TX FIFO empty? */
-		ldr r13, [r12, #SSI_SISR]
-		tst r13, #SSI_SISR_TFE0
+		ldr r12, [r13, #SSI_SISR]
+		tst r12, #SSI_SISR_TFE0
 		beq 1f
 
 		mov r10, #0x10000
@@ -56,34 +56,34 @@ imx_ssi_fiq_start:
 
 		add r11, r11, r10
 
-		ldrh r13, [r11]
-		strh r13, [r12, #SSI_STX0]
+		ldrh r12, [r11]
+		strh r12, [r13, #SSI_STX0]
 
-		ldrh r13, [r11, #2]
-		strh r13, [r12, #SSI_STX0]
+		ldrh r12, [r11, #2]
+		strh r12, [r13, #SSI_STX0]
 
-		ldrh r13, [r11, #4]
-		strh r13, [r12, #SSI_STX0]
+		ldrh r12, [r11, #4]
+		strh r12, [r13, #SSI_STX0]
 
-		ldrh r13, [r11, #6]
-		strh r13, [r12, #SSI_STX0]
+		ldrh r12, [r11, #6]
+		strh r12, [r13, #SSI_STX0]
 
 		add r10, #8
-		lsr r13, r8, #16	/* r13: buffer size */
-		cmp r10, r13
-		lslgt r8, r13, #16
+		lsr r12, r8, #16	/* r12: buffer size */
+		cmp r10, r12
+		lslgt r8, r12, #16
 		addle r8, #8
 1:
 		/* RX */
 
 		/* shall we receive? */
-		ldr r13, [r12, #SSI_SIER]
-		tst r13, #SSI_SIER_RFF0_EN
+		ldr r12, [r13, #SSI_SIER]
+		tst r12, #SSI_SIER_RFF0_EN
 		beq 1f
 
 		/* RX FIFO full? */
-		ldr r13, [r12, #SSI_SISR]
-		tst r13, #SSI_SISR_RFF0
+		ldr r12, [r13, #SSI_SISR]
+		tst r12, #SSI_SISR_RFF0
 		beq 1f
 
 		ldr r11, imx_ssi_fiq_rx_buffer
@@ -94,31 +94,31 @@ imx_ssi_fiq_start:
 
 		add r11, r11, r10
 
-		ldr r13, [r12, #SSI_SACNT]
-		tst r13, #SSI_SACNT_AC97EN
+		ldr r12, [r13, #SSI_SACNT]
+		tst r12, #SSI_SACNT_AC97EN
 
-		ldr r13, [r12, #SSI_SRX0]
-		strh r13, [r11]
+		ldr r12, [r13, #SSI_SRX0]
+		strh r12, [r11]
 
-		ldr r13, [r12, #SSI_SRX0]
-		strh r13, [r11, #2]
+		ldr r12, [r13, #SSI_SRX0]
+		strh r12, [r11, #2]
 
 		/* dummy read to skip slot 12 */
-		ldrne r13, [r12, #SSI_SRX0]
+		ldrne r12, [r13, #SSI_SRX0]
 
-		ldr r13, [r12, #SSI_SRX0]
-		strh r13, [r11, #4]
+		ldr r12, [r13, #SSI_SRX0]
+		strh r12, [r11, #4]
 
-		ldr r13, [r12, #SSI_SRX0]
-		strh r13, [r11, #6]
+		ldr r12, [r13, #SSI_SRX0]
+		strh r12, [r11, #6]
 
 		/* dummy read to skip slot 12 */
-		ldrne r13, [r12, #SSI_SRX0]
+		ldrne r12, [r13, #SSI_SRX0]
 
 		add r10, #8
-		lsr r13, r9, #16	/* r13: buffer size */
-		cmp r10, r13
-		lslgt r9, r13, #16
+		lsr r12, r9, #16	/* r12: buffer size */
+		cmp r10, r12
+		lslgt r9, r12, #16
 		addle r9, #8
 
 1:

Re: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Matt Sealey]

Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.


On Thu, Aug 9, 2012 at 5:24 AM, Dave Martin <dave.martin@linaro.org> wrote:
> On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
>
> [...]
>
>> I'm going to do a trapse through and find where Russell nacked Dave's
>> thumb-aware
>> rewrite.. would you mind if you have any of these boards seeing if it
>> really DOES
>
> There was no NAK because I didn't get as far as posting the patch,

http://lists.arm.linux.org.uk/lurker/message/20111202.133911.393b6e28.en.html

You did, twice :)

> mostly because of the doubt about whether this code is ever relevant
> on Thumb2-capable hardware.

It's not, but it does break the build, and without disabling phyCORE boards for
Thumb2 it will always break the build..

> If somebody with some old imx hardware that definitely relies on this
> wants to pick it up and test it, it might still be useful.
>
> I don't know whether I still have the original patch, but I think the
> only think I did was to swap the roles of r13 and r12.  In the original
> code r12 is only used as a base register, which is permissible usage
> for r13 in Thumb-2.  Those two registers appear private to the fiq
> handler, so I don't think the change will break anything, but I'd be
> more confident is somebody is able to test it.
>
> Cheers
> ---Dave
>
> diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
> index 8397a2d..3589afb 100644
> --- a/arch/arm/plat-mxc/ssi-fiq.S
> +++ b/arch/arm/plat-mxc/ssi-fiq.S
> @@ -35,19 +35,19 @@
>                 .global imx_ssi_fiq_tx_buffer
>
>  imx_ssi_fiq_start:
> -               ldr r12, imx_ssi_fiq_base
> +               ldr r13, imx_ssi_fiq_base
>
>                 /* TX */
>                 ldr r11, imx_ssi_fiq_tx_buffer
>
>                 /* shall we send? */
> -               ldr r13, [r12, #SSI_SIER]
> -               tst r13, #SSI_SIER_TFE0_EN
> +               ldr r12, [r13, #SSI_SIER]
> +               tst r12, #SSI_SIER_TFE0_EN
>                 beq 1f
>
>                 /* TX FIFO empty? */
> -               ldr r13, [r12, #SSI_SISR]
> -               tst r13, #SSI_SISR_TFE0
> +               ldr r12, [r13, #SSI_SISR]
> +               tst r12, #SSI_SISR_TFE0
>                 beq 1f
>
>                 mov r10, #0x10000
> @@ -56,34 +56,34 @@ imx_ssi_fiq_start:
>
>                 add r11, r11, r10
>
> -               ldrh r13, [r11]
> -               strh r13, [r12, #SSI_STX0]
> +               ldrh r12, [r11]
> +               strh r12, [r13, #SSI_STX0]
>
> -               ldrh r13, [r11, #2]
> -               strh r13, [r12, #SSI_STX0]
> +               ldrh r12, [r11, #2]
> +               strh r12, [r13, #SSI_STX0]
>
> -               ldrh r13, [r11, #4]
> -               strh r13, [r12, #SSI_STX0]
> +               ldrh r12, [r11, #4]
> +               strh r12, [r13, #SSI_STX0]
>
> -               ldrh r13, [r11, #6]
> -               strh r13, [r12, #SSI_STX0]
> +               ldrh r12, [r11, #6]
> +               strh r12, [r13, #SSI_STX0]
>
>                 add r10, #8
> -               lsr r13, r8, #16        /* r13: buffer size */
> -               cmp r10, r13
> -               lslgt r8, r13, #16
> +               lsr r12, r8, #16        /* r12: buffer size */
> +               cmp r10, r12
> +               lslgt r8, r12, #16
>                 addle r8, #8
>  1:
>                 /* RX */
>
>                 /* shall we receive? */
> -               ldr r13, [r12, #SSI_SIER]
> -               tst r13, #SSI_SIER_RFF0_EN
> +               ldr r12, [r13, #SSI_SIER]
> +               tst r12, #SSI_SIER_RFF0_EN
>                 beq 1f
>
>                 /* RX FIFO full? */
> -               ldr r13, [r12, #SSI_SISR]
> -               tst r13, #SSI_SISR_RFF0
> +               ldr r12, [r13, #SSI_SISR]
> +               tst r12, #SSI_SISR_RFF0
>                 beq 1f
>
>                 ldr r11, imx_ssi_fiq_rx_buffer
> @@ -94,31 +94,31 @@ imx_ssi_fiq_start:
>
>                 add r11, r11, r10
>
> -               ldr r13, [r12, #SSI_SACNT]
> -               tst r13, #SSI_SACNT_AC97EN
> +               ldr r12, [r13, #SSI_SACNT]
> +               tst r12, #SSI_SACNT_AC97EN
>
> -               ldr r13, [r12, #SSI_SRX0]
> -               strh r13, [r11]
> +               ldr r12, [r13, #SSI_SRX0]
> +               strh r12, [r11]
>
> -               ldr r13, [r12, #SSI_SRX0]
> -               strh r13, [r11, #2]
> +               ldr r12, [r13, #SSI_SRX0]
> +               strh r12, [r11, #2]
>
>                 /* dummy read to skip slot 12 */
> -               ldrne r13, [r12, #SSI_SRX0]
> +               ldrne r12, [r13, #SSI_SRX0]
>
> -               ldr r13, [r12, #SSI_SRX0]
> -               strh r13, [r11, #4]
> +               ldr r12, [r13, #SSI_SRX0]
> +               strh r12, [r11, #4]
>
> -               ldr r13, [r12, #SSI_SRX0]
> -               strh r13, [r11, #6]
> +               ldr r12, [r13, #SSI_SRX0]
> +               strh r12, [r11, #6]
>
>                 /* dummy read to skip slot 12 */
> -               ldrne r13, [r12, #SSI_SRX0]
> +               ldrne r12, [r13, #SSI_SRX0]
>
>                 add r10, #8
> -               lsr r13, r9, #16        /* r13: buffer size */
> -               cmp r10, r13
> -               lslgt r9, r13, #16
> +               lsr r12, r9, #16        /* r12: buffer size */
> +               cmp r10, r12
> +               lslgt r9, r12, #16
>                 addle r9, #8
>
>  1:
>

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Matt Sealey]

Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.


On Thu, Aug 9, 2012 at 5:24 AM, Dave Martin <dave.martin@linaro.org> wrote:
> On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
>
> [...]
>
>> I'm going to do a trapse through and find where Russell nacked Dave's
>> thumb-aware
>> rewrite.. would you mind if you have any of these boards seeing if it
>> really DOES
>
> There was no NAK because I didn't get as far as posting the patch,

http://lists.arm.linux.org.uk/lurker/message/20111202.133911.393b6e28.en.html

You did, twice :)

> mostly because of the doubt about whether this code is ever relevant
> on Thumb2-capable hardware.

It's not, but it does break the build, and without disabling phyCORE boards for
Thumb2 it will always break the build..

> If somebody with some old imx hardware that definitely relies on this
> wants to pick it up and test it, it might still be useful.
>
> I don't know whether I still have the original patch, but I think the
> only think I did was to swap the roles of r13 and r12.  In the original
> code r12 is only used as a base register, which is permissible usage
> for r13 in Thumb-2.  Those two registers appear private to the fiq
> handler, so I don't think the change will break anything, but I'd be
> more confident is somebody is able to test it.
>
> Cheers
> ---Dave
>
> diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S
> index 8397a2d..3589afb 100644
> --- a/arch/arm/plat-mxc/ssi-fiq.S
> +++ b/arch/arm/plat-mxc/ssi-fiq.S
> @@ -35,19 +35,19 @@
>                 .global imx_ssi_fiq_tx_buffer
>
>  imx_ssi_fiq_start:
> -               ldr r12, imx_ssi_fiq_base
> +               ldr r13, imx_ssi_fiq_base
>
>                 /* TX */
>                 ldr r11, imx_ssi_fiq_tx_buffer
>
>                 /* shall we send? */
> -               ldr r13, [r12, #SSI_SIER]
> -               tst r13, #SSI_SIER_TFE0_EN
> +               ldr r12, [r13, #SSI_SIER]
> +               tst r12, #SSI_SIER_TFE0_EN
>                 beq 1f
>
>                 /* TX FIFO empty? */
> -               ldr r13, [r12, #SSI_SISR]
> -               tst r13, #SSI_SISR_TFE0
> +               ldr r12, [r13, #SSI_SISR]
> +               tst r12, #SSI_SISR_TFE0
>                 beq 1f
>
>                 mov r10, #0x10000
> @@ -56,34 +56,34 @@ imx_ssi_fiq_start:
>
>                 add r11, r11, r10
>
> -               ldrh r13, [r11]
> -               strh r13, [r12, #SSI_STX0]
> +               ldrh r12, [r11]
> +               strh r12, [r13, #SSI_STX0]
>
> -               ldrh r13, [r11, #2]
> -               strh r13, [r12, #SSI_STX0]
> +               ldrh r12, [r11, #2]
> +               strh r12, [r13, #SSI_STX0]
>
> -               ldrh r13, [r11, #4]
> -               strh r13, [r12, #SSI_STX0]
> +               ldrh r12, [r11, #4]
> +               strh r12, [r13, #SSI_STX0]
>
> -               ldrh r13, [r11, #6]
> -               strh r13, [r12, #SSI_STX0]
> +               ldrh r12, [r11, #6]
> +               strh r12, [r13, #SSI_STX0]
>
>                 add r10, #8
> -               lsr r13, r8, #16        /* r13: buffer size */
> -               cmp r10, r13
> -               lslgt r8, r13, #16
> +               lsr r12, r8, #16        /* r12: buffer size */
> +               cmp r10, r12
> +               lslgt r8, r12, #16
>                 addle r8, #8
>  1:
>                 /* RX */
>
>                 /* shall we receive? */
> -               ldr r13, [r12, #SSI_SIER]
> -               tst r13, #SSI_SIER_RFF0_EN
> +               ldr r12, [r13, #SSI_SIER]
> +               tst r12, #SSI_SIER_RFF0_EN
>                 beq 1f
>
>                 /* RX FIFO full? */
> -               ldr r13, [r12, #SSI_SISR]
> -               tst r13, #SSI_SISR_RFF0
> +               ldr r12, [r13, #SSI_SISR]
> +               tst r12, #SSI_SISR_RFF0
>                 beq 1f
>
>                 ldr r11, imx_ssi_fiq_rx_buffer
> @@ -94,31 +94,31 @@ imx_ssi_fiq_start:
>
>                 add r11, r11, r10
>
> -               ldr r13, [r12, #SSI_SACNT]
> -               tst r13, #SSI_SACNT_AC97EN
> +               ldr r12, [r13, #SSI_SACNT]
> +               tst r12, #SSI_SACNT_AC97EN
>
> -               ldr r13, [r12, #SSI_SRX0]
> -               strh r13, [r11]
> +               ldr r12, [r13, #SSI_SRX0]
> +               strh r12, [r11]
>
> -               ldr r13, [r12, #SSI_SRX0]
> -               strh r13, [r11, #2]
> +               ldr r12, [r13, #SSI_SRX0]
> +               strh r12, [r11, #2]
>
>                 /* dummy read to skip slot 12 */
> -               ldrne r13, [r12, #SSI_SRX0]
> +               ldrne r12, [r13, #SSI_SRX0]
>
> -               ldr r13, [r12, #SSI_SRX0]
> -               strh r13, [r11, #4]
> +               ldr r12, [r13, #SSI_SRX0]
> +               strh r12, [r11, #4]
>
> -               ldr r13, [r12, #SSI_SRX0]
> -               strh r13, [r11, #6]
> +               ldr r12, [r13, #SSI_SRX0]
> +               strh r12, [r11, #6]
>
>                 /* dummy read to skip slot 12 */
> -               ldrne r13, [r12, #SSI_SRX0]
> +               ldrne r12, [r13, #SSI_SRX0]
>
>                 add r10, #8
> -               lsr r13, r9, #16        /* r13: buffer size */
> -               cmp r10, r13
> -               lslgt r9, r13, #16
> +               lsr r12, r9, #16        /* r12: buffer size */
> +               cmp r10, r12
> +               lslgt r9, r12, #16
>                 addle r9, #8
>
>  1:
>

Re: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Dave Martin]

On Thu, Aug 09, 2012 at 09:32:59AM -0500, Matt Sealey wrote:
> Matt Sealey <matt@genesi-usa.com>
> Product Development Analyst, Genesi USA, Inc.
> 
> 
> On Thu, Aug 9, 2012 at 5:24 AM, Dave Martin <dave.martin@linaro.org> wrote:
> > On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
> >
> > [...]
> >
> >> I'm going to do a trapse through and find where Russell nacked Dave's
> >> thumb-aware
> >> rewrite.. would you mind if you have any of these boards seeing if it
> >> really DOES
> >
> > There was no NAK because I didn't get as far as posting the patch,
> 
> http://lists.arm.linux.org.uk/lurker/message/20111202.133911.393b6e28.en.html
> 
> You did, twice :)

Well, I meant that I had not posted it as a stand-alone patch for
inclusion; I only posted it when commenting on other threads.

> > mostly because of the doubt about whether this code is ever relevant
> > on Thumb2-capable hardware.
> 
> It's not, but it does break the build, and without disabling phyCORE boards for
> Thumb2 it will always break the build..

If you want me to push it, let me know.  I don't think this should get
merged without some Tested-bys for hardware where the FIQ stuff actually
gets used.

The older post would be the one to use, since that at least got a
reasonable level of build testing.

Cheers
---Dave

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Dave Martin]

On Thu, Aug 09, 2012 at 09:32:59AM -0500, Matt Sealey wrote:
> Matt Sealey <matt@genesi-usa.com>
> Product Development Analyst, Genesi USA, Inc.
> 
> 
> On Thu, Aug 9, 2012 at 5:24 AM, Dave Martin <dave.martin@linaro.org> wrote:
> > On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
> >
> > [...]
> >
> >> I'm going to do a trapse through and find where Russell nacked Dave's
> >> thumb-aware
> >> rewrite.. would you mind if you have any of these boards seeing if it
> >> really DOES
> >
> > There was no NAK because I didn't get as far as posting the patch,
> 
> http://lists.arm.linux.org.uk/lurker/message/20111202.133911.393b6e28.en.html
> 
> You did, twice :)

Well, I meant that I had not posted it as a stand-alone patch for
inclusion; I only posted it when commenting on other threads.

> > mostly because of the doubt about whether this code is ever relevant
> > on Thumb2-capable hardware.
> 
> It's not, but it does break the build, and without disabling phyCORE boards for
> Thumb2 it will always break the build..

If you want me to push it, let me know.  I don't think this should get
merged without some Tested-bys for hardware where the FIQ stuff actually
gets used.

The older post would be the one to use, since that at least got a
reasonable level of build testing.

Cheers
---Dave

Re: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Matt Sealey]

On Thu, Aug 9, 2012 at 9:50 AM, Dave Martin <dave.martin@linaro.org> wrote:
> On Thu, Aug 09, 2012 at 09:32:59AM -0500, Matt Sealey wrote:
>> Matt Sealey <matt@genesi-usa.com>
>> Product Development Analyst, Genesi USA, Inc.
>>
>>
>> On Thu, Aug 9, 2012 at 5:24 AM, Dave Martin <dave.martin@linaro.org> wrote:
>> > On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
>> >
>> > [...]
>> >
>> >> I'm going to do a trapse through and find where Russell nacked Dave's
>> >> thumb-aware
>> >> rewrite.. would you mind if you have any of these boards seeing if it
>> >> really DOES
>> >
>> > There was no NAK because I didn't get as far as posting the patch,
>>
>> http://lists.arm.linux.org.uk/lurker/message/20111202.133911.393b6e28.en.html
>>
>> You did, twice :)
>
> Well, I meant that I had not posted it as a stand-alone patch for
> inclusion; I only posted it when commenting on other threads.
>
>> > mostly because of the doubt about whether this code is ever relevant
>> > on Thumb2-capable hardware.
>>
>> It's not, but it does break the build, and without disabling phyCORE boards for
>> Thumb2 it will always break the build..
>
> If you want me to push it, let me know.  I don't think this should get
> merged without some Tested-bys for hardware where the FIQ stuff actually
> gets used.

Please, then all the Tested-by's should flood in, right? :)

> The older post would be the one to use, since that at least got a
> reasonable level of build testing.

-- 
Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Matt Sealey]

On Thu, Aug 9, 2012 at 9:50 AM, Dave Martin <dave.martin@linaro.org> wrote:
> On Thu, Aug 09, 2012 at 09:32:59AM -0500, Matt Sealey wrote:
>> Matt Sealey <matt@genesi-usa.com>
>> Product Development Analyst, Genesi USA, Inc.
>>
>>
>> On Thu, Aug 9, 2012 at 5:24 AM, Dave Martin <dave.martin@linaro.org> wrote:
>> > On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
>> >
>> > [...]
>> >
>> >> I'm going to do a trapse through and find where Russell nacked Dave's
>> >> thumb-aware
>> >> rewrite.. would you mind if you have any of these boards seeing if it
>> >> really DOES
>> >
>> > There was no NAK because I didn't get as far as posting the patch,
>>
>> http://lists.arm.linux.org.uk/lurker/message/20111202.133911.393b6e28.en.html
>>
>> You did, twice :)
>
> Well, I meant that I had not posted it as a stand-alone patch for
> inclusion; I only posted it when commenting on other threads.
>
>> > mostly because of the doubt about whether this code is ever relevant
>> > on Thumb2-capable hardware.
>>
>> It's not, but it does break the build, and without disabling phyCORE boards for
>> Thumb2 it will always break the build..
>
> If you want me to push it, let me know.  I don't think this should get
> merged without some Tested-bys for hardware where the FIQ stuff actually
> gets used.

Please, then all the Tested-by's should flood in, right? :)

> The older post would be the one to use, since that at least got a
> reasonable level of build testing.

-- 
Matt Sealey <matt@genesi-usa.com>
Product Development Analyst, Genesi USA, Inc.

Re: [PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Dave Martin]

On Thu, Aug 09, 2012 at 11:05:47AM -0500, Matt Sealey wrote:
> On Thu, Aug 9, 2012 at 9:50 AM, Dave Martin <dave.martin@linaro.org> wrote:
> > On Thu, Aug 09, 2012 at 09:32:59AM -0500, Matt Sealey wrote:
> >> Matt Sealey <matt@genesi-usa.com>
> >> Product Development Analyst, Genesi USA, Inc.
> >>
> >>
> >> On Thu, Aug 9, 2012 at 5:24 AM, Dave Martin <dave.martin@linaro.org> wrote:
> >> > On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
> >> >
> >> > [...]
> >> >
> >> >> I'm going to do a trapse through and find where Russell nacked Dave's
> >> >> thumb-aware
> >> >> rewrite.. would you mind if you have any of these boards seeing if it
> >> >> really DOES
> >> >
> >> > There was no NAK because I didn't get as far as posting the patch,
> >>
> >> http://lists.arm.linux.org.uk/lurker/message/20111202.133911.393b6e28.en.html
> >>
> >> You did, twice :)
> >
> > Well, I meant that I had not posted it as a stand-alone patch for
> > inclusion; I only posted it when commenting on other threads.
> >
> >> > mostly because of the doubt about whether this code is ever relevant
> >> > on Thumb2-capable hardware.
> >>
> >> It's not, but it does break the build, and without disabling phyCORE boards for
> >> Thumb2 it will always break the build..
> >
> > If you want me to push it, let me know.  I don't think this should get
> > merged without some Tested-bys for hardware where the FIQ stuff actually
> > gets used.
> 
> Please, then all the Tested-by's should flood in, right? :)

Do you have any suggestions for who I should CC to speed things up?

Cheers
---Dave

[PATCH 1/2] ARM: build ssi-fiq.S in ARM mode to prevent CONFIG_THUMB2_KERNEL build breakage

[Dave Martin]

On Thu, Aug 09, 2012 at 11:05:47AM -0500, Matt Sealey wrote:
> On Thu, Aug 9, 2012 at 9:50 AM, Dave Martin <dave.martin@linaro.org> wrote:
> > On Thu, Aug 09, 2012 at 09:32:59AM -0500, Matt Sealey wrote:
> >> Matt Sealey <matt@genesi-usa.com>
> >> Product Development Analyst, Genesi USA, Inc.
> >>
> >>
> >> On Thu, Aug 9, 2012 at 5:24 AM, Dave Martin <dave.martin@linaro.org> wrote:
> >> > On Wed, Aug 08, 2012 at 12:32:39PM -0500, Matt Sealey wrote:
> >> >
> >> > [...]
> >> >
> >> >> I'm going to do a trapse through and find where Russell nacked Dave's
> >> >> thumb-aware
> >> >> rewrite.. would you mind if you have any of these boards seeing if it
> >> >> really DOES
> >> >
> >> > There was no NAK because I didn't get as far as posting the patch,
> >>
> >> http://lists.arm.linux.org.uk/lurker/message/20111202.133911.393b6e28.en.html
> >>
> >> You did, twice :)
> >
> > Well, I meant that I had not posted it as a stand-alone patch for
> > inclusion; I only posted it when commenting on other threads.
> >
> >> > mostly because of the doubt about whether this code is ever relevant
> >> > on Thumb2-capable hardware.
> >>
> >> It's not, but it does break the build, and without disabling phyCORE boards for
> >> Thumb2 it will always break the build..
> >
> > If you want me to push it, let me know.  I don't think this should get
> > merged without some Tested-bys for hardware where the FIQ stuff actually
> > gets used.
> 
> Please, then all the Tested-by's should flood in, right? :)

Do you have any suggestions for who I should CC to speed things up?

Cheers
---Dave