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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Russell King - ARM Linux <linux@arm.linux.org.uk>,
	Grant Likely <grant.likely@linaro.org>,
	Rob Herring <rob.herring@calxeda.com>,
	Rob Landley <rob@landley.net>, Arnd Bergmann <arnd@arndb.de>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Gregory Clement <gregory.clement@free-electrons.com>,
	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
	Maxime Ripard <maxime.ripard@free-electrons.com>,
	Jean-Francois Moine <moinejf@free.fr>,
	Gerlando Falauto <gerlando.falauto@keymile.com>,
	devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Lennert Buytenhek <kernel@wantstofly.org>,
	Simon Guinot <simon@sequanux.org>,
	Joey Oravec <joravec@drewtech.com>,
	Ben Dooks <ben-linux@fluff.org>, Nicolas Pitre <nico@fluxnic.net>,
	Holger Brunck <Holger.Brunck@keymile.com>
Subject: [RFC patch 3/8] genirq: generic chip: Handle separate mask registers
Date: Fri, 03 May 2013 21:50:48 -0000	[thread overview]
Message-ID: <20130503214629.536981253@linutronix.de> (raw)
In-Reply-To: 20130503212258.385818955@linutronix.de

[-- Attachment #1: genirq-handle-separate-mask-registers.patch --]
[-- Type: text/plain, Size: 2745 bytes --]

From: Gerlando Falauto <gerlando.falauto@keymile.com>

There are cases where all irq_chip_type instances have separate mask
registers, making a shared mask register cache unsuitable for the
purpose.

Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per
chip mask pointer to the per chip private mask cache instead.

[ tglx: Simplified code, renamed flag and massaged changelog ]

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Cc: Simon Guinot <simon@sequanux.org>
Cc: Joey Oravec <joravec@drewtech.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Holger Brunck <Holger.Brunck@keymile.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 include/linux/irq.h       |    2 ++
 kernel/irq/generic-chip.c |   17 ++++++++++-------
 2 files changed, 12 insertions(+), 7 deletions(-)

Index: linux-2.6/include/linux/irq.h
===================================================================
--- linux-2.6.orig/include/linux/irq.h
+++ linux-2.6/include/linux/irq.h
@@ -704,10 +704,12 @@ struct irq_chip_generic {
  * @IRQ_GC_INIT_NESTED_LOCK:	Set the lock class of the irqs to nested for
  *				irq chips which need to call irq_set_wake() on
  *				the parent irq. Usually GPIO implementations
+ * @IRQ_GC_MASK_CACHE_PER_TYPE:	Mask cache is chip type private
  */
 enum irq_gc_flags {
 	IRQ_GC_INIT_MASK_CACHE		= 1 << 0,
 	IRQ_GC_INIT_NESTED_LOCK		= 1 << 1,
+	IRQ_GC_MASK_CACHE_PER_TYPE	= 1 << 2,
 };
 
 /* Generic chip callback functions */
Index: linux-2.6/kernel/irq/generic-chip.c
===================================================================
--- linux-2.6.orig/kernel/irq/generic-chip.c
+++ linux-2.6/kernel/irq/generic-chip.c
@@ -241,18 +241,21 @@ void irq_setup_generic_chip(struct irq_c
 {
 	struct irq_chip_type *ct = gc->chip_types;
 	unsigned int i;
+	u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask;
 
 	raw_spin_lock(&gc_lock);
 	list_add_tail(&gc->list, &gc_list);
 	raw_spin_unlock(&gc_lock);
 
-	/* Init mask cache ? */
-	if (flags & IRQ_GC_INIT_MASK_CACHE)
-		gc->mask_cache = irq_reg_readl(gc->reg_base + ct->regs.mask);
-
-	/* Initialize mask cache pointer */
-	for (i = 0; i < gc->num_ct; i++)
-		ct[i].mask_cache = &gc->mask_cache;
+	for (i = 0; i < gc->num_ct; i++) {
+		if (flags & IRQ_GC_MASK_CACHE_PER_TYPE) {
+			mskptr = &ct[i].mask_cache_priv;
+			mskreg = ct[i].regs.mask;
+		}
+		ct[i].mask_cache = mskptr;
+		if (flags & IRQ_GC_INIT_MASK_CACHE)
+			*mskptr = irq_reg_readl(gc->reg_base + mskreg);
+	}
 
 	for (i = gc->irq_base; msk; msk >>= 1, i++) {
 		if (!(msk & 0x01))



WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
To: LKML <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Cc: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>,
	linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Joey Oravec <joravec-Vf0cVmJFnCtWk0Htik3J/w@public.gmane.org>,
	Lennert Buytenhek
	<kernel-OLH4Qvv75CYX/NnBR394Jw@public.gmane.org>,
	Russell King - ARM Linux
	<linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
	Jason Gunthorpe
	<jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>,
	Holger Brunck
	<Holger.Brunck-SkAbAL50j+5BDgjK7y7TUQ@public.gmane.org>,
	Grant Likely
	<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Sebastian Hesselbarth
	<sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
	devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
	Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>,
	Simon Guinot <simon-jKBdWWKqtFpg9hUCZPvPmw@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>,
	Gerlando Falauto
	<gerlando.falauto-SkAbAL50j+5BDgjK7y7TUQ@public.gmane.org>
Subject: [RFC patch 3/8] genirq: generic chip: Handle separate mask registers
Date: Fri, 03 May 2013 21:50:48 -0000	[thread overview]
Message-ID: <20130503214629.536981253@linutronix.de> (raw)
In-Reply-To: 20130503212258.385818955@linutronix.de

[-- Attachment #1: genirq-handle-separate-mask-registers.patch --]
[-- Type: text/plain, Size: 3066 bytes --]

From: Gerlando Falauto <gerlando.falauto-SkAbAL50j+5BDgjK7y7TUQ@public.gmane.org>

There are cases where all irq_chip_type instances have separate mask
registers, making a shared mask register cache unsuitable for the
purpose.

Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per
chip mask pointer to the per chip private mask cache instead.

[ tglx: Simplified code, renamed flag and massaged changelog ]

Signed-off-by: Gerlando Falauto <gerlando.falauto-SkAbAL50j+5BDgjK7y7TUQ@public.gmane.org>
Cc: Lennert Buytenhek <kernel-OLH4Qvv75CYX/NnBR394Jw@public.gmane.org>
Cc: Simon Guinot <simon-jKBdWWKqtFpg9hUCZPvPmw@public.gmane.org>
Cc: Joey Oravec <joravec-Vf0cVmJFnCtWk0Htik3J/w@public.gmane.org>
Cc: Ben Dooks <ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>
Cc: Nicolas Pitre <nico-vtqb6HGKxmzR7s880joybQ@public.gmane.org>
Cc: Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>
Cc: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
Cc: Holger Brunck <Holger.Brunck-SkAbAL50j+5BDgjK7y7TUQ@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Signed-off-by: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
---
 include/linux/irq.h       |    2 ++
 kernel/irq/generic-chip.c |   17 ++++++++++-------
 2 files changed, 12 insertions(+), 7 deletions(-)

Index: linux-2.6/include/linux/irq.h
===================================================================
--- linux-2.6.orig/include/linux/irq.h
+++ linux-2.6/include/linux/irq.h
@@ -704,10 +704,12 @@ struct irq_chip_generic {
  * @IRQ_GC_INIT_NESTED_LOCK:	Set the lock class of the irqs to nested for
  *				irq chips which need to call irq_set_wake() on
  *				the parent irq. Usually GPIO implementations
+ * @IRQ_GC_MASK_CACHE_PER_TYPE:	Mask cache is chip type private
  */
 enum irq_gc_flags {
 	IRQ_GC_INIT_MASK_CACHE		= 1 << 0,
 	IRQ_GC_INIT_NESTED_LOCK		= 1 << 1,
+	IRQ_GC_MASK_CACHE_PER_TYPE	= 1 << 2,
 };
 
 /* Generic chip callback functions */
Index: linux-2.6/kernel/irq/generic-chip.c
===================================================================
--- linux-2.6.orig/kernel/irq/generic-chip.c
+++ linux-2.6/kernel/irq/generic-chip.c
@@ -241,18 +241,21 @@ void irq_setup_generic_chip(struct irq_c
 {
 	struct irq_chip_type *ct = gc->chip_types;
 	unsigned int i;
+	u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask;
 
 	raw_spin_lock(&gc_lock);
 	list_add_tail(&gc->list, &gc_list);
 	raw_spin_unlock(&gc_lock);
 
-	/* Init mask cache ? */
-	if (flags & IRQ_GC_INIT_MASK_CACHE)
-		gc->mask_cache = irq_reg_readl(gc->reg_base + ct->regs.mask);
-
-	/* Initialize mask cache pointer */
-	for (i = 0; i < gc->num_ct; i++)
-		ct[i].mask_cache = &gc->mask_cache;
+	for (i = 0; i < gc->num_ct; i++) {
+		if (flags & IRQ_GC_MASK_CACHE_PER_TYPE) {
+			mskptr = &ct[i].mask_cache_priv;
+			mskreg = ct[i].regs.mask;
+		}
+		ct[i].mask_cache = mskptr;
+		if (flags & IRQ_GC_INIT_MASK_CACHE)
+			*mskptr = irq_reg_readl(gc->reg_base + mskreg);
+	}
 
 	for (i = gc->irq_base; msk; msk >>= 1, i++) {
 		if (!(msk & 0x01))

WARNING: multiple messages have this Message-ID (diff)
From: tglx@linutronix.de (Thomas Gleixner)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC patch 3/8] genirq: generic chip: Handle separate mask registers
Date: Fri, 03 May 2013 21:50:48 -0000	[thread overview]
Message-ID: <20130503214629.536981253@linutronix.de> (raw)
In-Reply-To: 20130503212258.385818955@linutronix.de

An embedded and charset-unspecified text was scrubbed...
Name: genirq-handle-separate-mask-registers.patch
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130503/3e593862/attachment.ksh>

  parent reply	other threads:[~2013-05-03 21:52 UTC|newest]

Thread overview: 178+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-02 18:25 [PATCH] irqchip: add support for Marvell Orion SoCs Sebastian Hesselbarth
2013-05-02 18:25 ` Sebastian Hesselbarth
2013-05-02 18:25 ` Sebastian Hesselbarth
2013-05-02 18:33 ` Sebastian Hesselbarth
2013-05-02 18:33   ` Sebastian Hesselbarth
2013-05-02 18:33   ` Sebastian Hesselbarth
2013-05-02 18:45   ` Russell King - ARM Linux
2013-05-02 18:45     ` Russell King - ARM Linux
2013-05-02 18:54     ` Sebastian Hesselbarth
2013-05-02 18:54       ` Sebastian Hesselbarth
2013-05-02 18:56       ` Russell King - ARM Linux
2013-05-02 18:56         ` Russell King - ARM Linux
2013-05-02 19:04         ` Sebastian Hesselbarth
2013-05-02 19:04           ` Sebastian Hesselbarth
2013-05-02 18:53 ` Jason Gunthorpe
2013-05-02 18:53   ` Jason Gunthorpe
2013-05-02 18:53   ` Jason Gunthorpe
2013-05-02 19:05   ` Sebastian Hesselbarth
2013-05-02 19:05     ` Sebastian Hesselbarth
2013-05-02 19:35     ` Jason Gunthorpe
2013-05-02 19:35       ` Jason Gunthorpe
2013-05-02 19:48       ` Sebastian Hesselbarth
2013-05-02 19:48         ` Sebastian Hesselbarth
2013-05-02 20:02         ` Andrew Lunn
2013-05-02 20:02           ` Andrew Lunn
2013-05-02 20:08           ` Gregory CLEMENT
2013-05-02 20:08             ` Gregory CLEMENT
2013-05-04 17:58         ` Jason Cooper
2013-05-04 17:58           ` Jason Cooper
2013-05-04 17:58           ` Jason Cooper
2013-05-02 19:11   ` Arnd Bergmann
2013-05-02 19:11     ` Arnd Bergmann
2013-05-02 19:34     ` Sebastian Hesselbarth
2013-05-02 19:34       ` Sebastian Hesselbarth
2013-05-02 19:37       ` Jason Gunthorpe
2013-05-02 19:37         ` Jason Gunthorpe
2013-05-02 19:39       ` Sebastian Hesselbarth
2013-05-02 19:39         ` Sebastian Hesselbarth
2013-05-02 19:22 ` Jason Cooper
2013-05-02 19:22   ` Jason Cooper
2013-05-02 19:22   ` Jason Cooper
2013-05-02 21:34 ` Thomas Gleixner
2013-05-02 21:34   ` Thomas Gleixner
2013-05-02 21:56   ` Sebastian Hesselbarth
2013-05-02 21:56     ` Sebastian Hesselbarth
2013-05-02 22:09     ` Arnd Bergmann
2013-05-02 22:09       ` Arnd Bergmann
2013-05-02 22:37       ` Sebastian Hesselbarth
2013-05-02 22:37         ` Sebastian Hesselbarth
2013-05-04 18:12         ` Jason Cooper
2013-05-04 18:12           ` Jason Cooper
2013-05-04 18:12           ` Jason Cooper
2013-05-02 23:48 ` [PATCH v2 0/5] ARM: orion: add orion irqchip driver Sebastian Hesselbarth
2013-05-02 23:48   ` Sebastian Hesselbarth
2013-05-02 23:48   ` Sebastian Hesselbarth
2013-05-02 23:48   ` [PATCH v2 1/5] irqchip: add support for Marvell Orion SoCs Sebastian Hesselbarth
2013-05-02 23:48     ` Sebastian Hesselbarth
2013-05-02 23:48     ` Sebastian Hesselbarth
2013-05-03 12:55     ` Russell King - ARM Linux
2013-05-03 12:55       ` Russell King - ARM Linux
2013-05-03 13:13       ` Sebastian Hesselbarth
2013-05-03 13:13         ` Sebastian Hesselbarth
2013-05-03 14:09         ` Thomas Gleixner
2013-05-03 14:09           ` Thomas Gleixner
2013-05-03 21:50           ` [RFC patch 0/8] genirq: Support for irq domains in generic irq chip Thomas Gleixner
2013-05-03 21:50             ` Thomas Gleixner
2013-05-03 21:50             ` [RFC patch 1/8] genirq: generic chip: Remove the local cur_regs() function Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
     [not found]               ` <20130503214629.397359626-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2013-05-27 13:38                 ` Grant Likely
2013-05-27 13:38                   ` Grant Likely
2013-05-03 21:50             ` [RFC patch 2/8] genirq: generic chip: Add support for per chip type mask cache Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-03 21:50             ` Thomas Gleixner [this message]
2013-05-03 21:50               ` [RFC patch 3/8] genirq: generic chip: Handle separate mask registers Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-03 21:50             ` [RFC patch 4/8] genirq: generic chip: Cache per irq bit mask Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-03 22:24               ` Russell King - ARM Linux
2013-05-03 22:24                 ` Russell King - ARM Linux
2013-05-03 22:39                 ` Thomas Gleixner
2013-05-03 22:39                   ` Thomas Gleixner
2013-05-03 21:50             ` [RFC patch 5/8] genirq: Add a mask calculation function Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-03 21:50             ` [RFC patch 6/8] genirq: Split out code in generic chip Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-27 13:45               ` Grant Likely
2013-05-27 13:45                 ` Grant Likely
2013-05-27 13:45                 ` Grant Likely
2013-05-03 21:50             ` [RFC patch 7/8] genirq: generic chip: Add linear irq domain support Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-03 22:23               ` Russell King - ARM Linux
2013-05-03 22:23                 ` Russell King - ARM Linux
2013-05-03 22:38                 ` Thomas Gleixner
2013-05-03 22:38                   ` Thomas Gleixner
2013-05-04  2:30               ` Sebastian Hesselbarth
2013-05-04  2:30                 ` Sebastian Hesselbarth
2013-05-04  8:04                 ` Thomas Gleixner
2013-05-04  8:04                   ` Thomas Gleixner
2013-05-06 12:32               ` [RFC patch 7/8] fixup 1/2: " Sebastian Hesselbarth
2013-05-06 12:32                 ` Sebastian Hesselbarth
2013-05-06 12:32                 ` [RFC patch 7/8] fixup 2/2: " Sebastian Hesselbarth
2013-05-06 12:32                   ` Sebastian Hesselbarth
2013-05-06 13:31                   ` Thomas Gleixner
2013-05-06 13:31                     ` Thomas Gleixner
2013-05-06 13:25                 ` [RFC patch 7/8] fixup 1/2: " Thomas Gleixner
2013-05-06 13:25                   ` Thomas Gleixner
2013-05-03 21:50             ` [RFC patch 8/8] irqchip: sun4i: Convert to generic irq chip Thomas Gleixner
2013-05-03 21:50               ` Thomas Gleixner
2013-05-04  2:37               ` Sebastian Hesselbarth
2013-05-04  2:37                 ` Sebastian Hesselbarth
2013-05-06  9:48             ` [RFC patch 0/8] genirq: Support for irq domains in " Uwe Kleine-König
2013-05-06  9:48               ` Uwe Kleine-König
2013-05-06 14:30             ` [patch 0/8] genirq: Support for irq domains in generic irq chip - V2 Thomas Gleixner
2013-05-06 14:30               ` Thomas Gleixner
2013-05-06 14:30               ` Thomas Gleixner
2013-05-06 14:30               ` [patch 1/8] genirq: generic chip: Remove the local cur_regs() function Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-29  9:14                 ` [tip:irq/core] genirq: Generic " tip-bot for Gerlando Falauto
2013-05-06 14:30               ` [patch 2/8] genirq: generic chip: Add support for per chip type mask cache Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-29  9:16                 ` [tip:irq/core] genirq: Generic " tip-bot for Gerlando Falauto
2013-05-06 14:30               ` [patch 3/8] genirq: generic chip: Handle separate mask registers Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-29  9:17                 ` [tip:irq/core] genirq: Generic " tip-bot for Gerlando Falauto
2013-05-06 14:30               ` [patch 4/8] genirq: generic chip: Cache per irq bit mask Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-29  9:18                 ` [tip:irq/core] genirq: Generic " tip-bot for Thomas Gleixner
2013-05-06 14:30               ` [patch 5/8] genirq: Add a mask calculation function Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-29  9:19                 ` [tip:irq/core] genirq: irqchip: " tip-bot for Thomas Gleixner
2013-05-06 14:30               ` [patch 6/8] genirq: Split out code in generic chip Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-29  9:21                 ` [tip:irq/core] genirq: Generic chip: Split out code into separate functions tip-bot for Thomas Gleixner
2013-05-06 14:30               ` [patch 7/8] genirq: generic chip: Add linear irq domain support Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-29  2:22                 ` Grant Likely
2013-05-29  2:22                   ` Grant Likely
2013-05-29  8:23                   ` Thomas Gleixner
2013-05-29  8:23                     ` Thomas Gleixner
2013-05-29  9:22                 ` [tip:irq/core] genirq: Generic " tip-bot for Thomas Gleixner
2013-05-06 14:30               ` [patch 8/8] irqchip: sun4i: Convert to generic irq chip Thomas Gleixner
2013-05-06 14:30                 ` Thomas Gleixner
2013-05-06 15:18                 ` Rob Herring
2013-05-06 15:18                   ` Rob Herring
2013-05-12 14:05                 ` [PATCH] irq-sun4i: Fix trivial build errors Maxime Ripard
2013-05-12 14:05                   ` Maxime Ripard
2013-05-12 14:08                 ` [patch 8/8] irqchip: sun4i: Convert to generic irq chip Maxime Ripard
2013-05-12 14:08                   ` Maxime Ripard
2013-05-12 14:14                   ` Maxime Ripard
2013-05-12 14:14                     ` Maxime Ripard
2013-05-13 10:57               ` [patch 0/8] genirq: Support for irq domains in generic irq chip - V2 Gerlando Falauto
2013-05-13 12:01                 ` Thomas Gleixner
2013-10-01 15:27               ` Gerlando Falauto
2013-10-01 15:27                 ` Gerlando Falauto
2013-05-02 23:48   ` [PATCH v2 2/5] ARM: dove: add DT parsing for legacy mv643xx_eth Sebastian Hesselbarth
2013-05-02 23:48     ` Sebastian Hesselbarth
2013-05-02 23:48     ` Sebastian Hesselbarth
2013-05-03  5:06     ` Andrew Lunn
2013-05-03  5:06       ` Andrew Lunn
2013-05-03  5:06       ` Andrew Lunn
2013-05-03  9:58       ` Sebastian Hesselbarth
2013-05-03  9:58         ` Sebastian Hesselbarth
2013-05-04 18:29       ` Jason Cooper
2013-05-04 18:29         ` Jason Cooper
2013-05-04 18:29         ` Jason Cooper
     [not found]         ` <20130504182935.GO31290-u4khhh1J0LxI1Ri9qeTfzeTW4wlIGRCZ@public.gmane.org>
2013-05-04 19:37           ` Florian Fainelli
2013-05-02 23:48   ` [PATCH v2 3/5] ARM: dove: add DT parsing for legacy timer Sebastian Hesselbarth
2013-05-02 23:48     ` Sebastian Hesselbarth
2013-05-02 23:48     ` Sebastian Hesselbarth
2013-05-02 23:48   ` [PATCH v2 4/5] ARM: dove: move DT boards to orion irqchip driver Sebastian Hesselbarth
2013-05-02 23:48     ` Sebastian Hesselbarth
2013-05-02 23:48   ` [PATCH v2 5/5] ARM: dove: add DT nodes for irqchip conversion Sebastian Hesselbarth
2013-05-02 23:48     ` Sebastian Hesselbarth

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