From: Peter Zijlstra <peterz@infradead.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Ingo Molnar <mingo@kernel.org>, Max Filippov <jcmvbkbc@gmail.com>,
Vineet Gupta <Vineet.Gupta1@synopsys.com>,
KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>,
"linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
linux-mm <linux-mm@kvack.org>, Ralf Baechle <ralf@linux-mips.org>,
Chris Zankel <chris@zankel.net>,
Marc Gauthier <Marc.Gauthier@tensilica.com>,
linux-xtensa@linux-xtensa.org, Hugh Dickins <hughd@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>
Subject: Re: TLB and PTE coherency during munmap
Date: Mon, 3 Jun 2013 12:04:44 +0200 [thread overview]
Message-ID: <20130603100444.GB8923@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <CAHkRjk7D=PAMgaqjGQ0t3e5Ftob2Z248uexvKGb0tWpycEMK6Q@mail.gmail.com>
On Mon, Jun 03, 2013 at 11:01:39AM +0100, Catalin Marinas wrote:
> On ARM there is a lot of ongoing work on single zImage for multiple
> SoCs and this implies SMP kernels. There is an SMP_ON_UP feature which
> does run-time code patching to optimise the UP case in a few places.
>
> Regarding tlb_fast_mode(), the ARM-specific implementation is always 0
> on ARMv7 even if UP because of speculative TLB loads (the MMU could
> pretty much act as a separate processor).
Oh right.. I should really refresh the mmu_gather unification patches so
all archs are using the generic code.
/me ups on todo list.
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WARNING: multiple messages have this Message-ID (diff)
From: Peter Zijlstra <peterz@infradead.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Ingo Molnar <mingo@kernel.org>, Max Filippov <jcmvbkbc@gmail.com>,
Vineet Gupta <Vineet.Gupta1@synopsys.com>,
KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>,
"linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
linux-mm <linux-mm@kvack.org>, Ralf Baechle <ralf@linux-mips.org>,
Chris Zankel <chris@zankel.net>,
Marc Gauthier <Marc.Gauthier@tensilica.com>,
linux-xtensa@linux-xtensa.org, Hugh Dickins <hughd@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>
Subject: Re: TLB and PTE coherency during munmap
Date: Mon, 3 Jun 2013 12:04:44 +0200 [thread overview]
Message-ID: <20130603100444.GB8923@twins.programming.kicks-ass.net> (raw)
Message-ID: <20130603100444.smWU5miDybtU56irgKFJIcR5iOzx67yUJ7L9ZonhuPU@z> (raw)
In-Reply-To: <CAHkRjk7D=PAMgaqjGQ0t3e5Ftob2Z248uexvKGb0tWpycEMK6Q@mail.gmail.com>
On Mon, Jun 03, 2013 at 11:01:39AM +0100, Catalin Marinas wrote:
> On ARM there is a lot of ongoing work on single zImage for multiple
> SoCs and this implies SMP kernels. There is an SMP_ON_UP feature which
> does run-time code patching to optimise the UP case in a few places.
>
> Regarding tlb_fast_mode(), the ARM-specific implementation is always 0
> on ARMv7 even if UP because of speculative TLB loads (the MMU could
> pretty much act as a separate processor).
Oh right.. I should really refresh the mmu_gather unification patches so
all archs are using the generic code.
/me ups on todo list.
next prev parent reply other threads:[~2013-06-03 10:04 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-26 2:42 TLB and PTE coherency during munmap Max Filippov
2013-05-26 2:50 ` Max Filippov
2013-05-26 2:50 ` Max Filippov
2013-05-28 7:10 ` Max Filippov
2013-05-28 7:10 ` Max Filippov
2013-05-29 12:27 ` Peter Zijlstra
2013-05-29 12:27 ` Peter Zijlstra
2013-05-29 12:42 ` Vineet Gupta
2013-05-29 12:42 ` Vineet Gupta
2013-05-29 12:47 ` Peter Zijlstra
2013-05-29 12:47 ` Peter Zijlstra
2013-05-29 17:51 ` Peter Zijlstra
2013-05-29 17:51 ` Peter Zijlstra
2013-05-29 22:04 ` Catalin Marinas
2013-05-29 22:04 ` Catalin Marinas
2013-05-30 6:48 ` Peter Zijlstra
2013-05-30 6:48 ` Peter Zijlstra
2013-05-30 5:04 ` Vineet Gupta
2013-05-30 5:04 ` Vineet Gupta
2013-05-30 6:56 ` Peter Zijlstra
2013-05-30 6:56 ` Peter Zijlstra
2013-05-30 7:00 ` Vineet Gupta
2013-05-30 7:00 ` Vineet Gupta
2013-05-30 11:03 ` Peter Zijlstra
2013-05-30 11:03 ` Peter Zijlstra
2013-05-31 4:09 ` Max Filippov
2013-05-31 4:09 ` Max Filippov
2013-05-31 7:55 ` Peter Zijlstra
2013-05-31 7:55 ` Peter Zijlstra
2013-06-03 9:05 ` Peter Zijlstra
2013-06-03 9:05 ` Peter Zijlstra
2013-06-03 9:16 ` Ingo Molnar
2013-06-03 9:16 ` Ingo Molnar
2013-06-03 10:01 ` Catalin Marinas
2013-06-03 10:01 ` Catalin Marinas
2013-06-03 10:04 ` Peter Zijlstra [this message]
2013-06-03 10:04 ` Peter Zijlstra
2013-06-03 10:09 ` Catalin Marinas
2013-06-03 10:09 ` Catalin Marinas
2013-06-04 9:52 ` Peter Zijlstra
2013-06-04 9:52 ` Peter Zijlstra
2013-06-05 0:05 ` Linus Torvalds
2013-06-05 0:05 ` Linus Torvalds
2013-06-05 10:26 ` [PATCH] arch, mm: Remove tlb_fast_mode() Peter Zijlstra
2013-06-05 10:26 ` Peter Zijlstra
2013-05-31 1:40 ` TLB and PTE coherency during munmap Max Filippov
2013-05-31 1:40 ` Max Filippov
2013-05-28 14:34 ` Konrad Rzeszutek Wilk
2013-05-28 14:34 ` Konrad Rzeszutek Wilk
2013-05-29 3:23 ` Max Filippov
2013-05-29 3:23 ` Max Filippov
2013-05-28 15:16 ` Michal Hocko
2013-05-28 15:16 ` Michal Hocko
2013-05-28 15:23 ` Catalin Marinas
2013-05-28 15:23 ` Catalin Marinas
2013-05-28 14:35 ` Catalin Marinas
2013-05-29 4:15 ` Max Filippov
2013-05-29 4:15 ` Max Filippov
2013-05-29 10:15 ` Catalin Marinas
2013-05-29 10:15 ` Catalin Marinas
2013-05-31 1:26 ` Max Filippov
2013-05-31 1:26 ` Max Filippov
2013-05-31 9:06 ` Catalin Marinas
2013-05-31 9:06 ` Catalin Marinas
2013-06-03 9:16 ` Max Filippov
2013-06-03 9:16 ` Max Filippov
2013-05-29 11:53 ` Vineet Gupta
2013-05-29 12:00 ` Vineet Gupta
2013-05-29 12:00 ` Vineet Gupta
2013-06-07 2:21 George Spelvin
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