* [PATCH] drm/i915: Only clear write-domains after a successful wait-seqno
@ 2013-06-28 15:54 Chris Wilson
2013-06-28 16:30 ` Daniel Vetter
0 siblings, 1 reply; 3+ messages in thread
From: Chris Wilson @ 2013-06-28 15:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson, stable
In the introduction of the non-blocking wait, I cut'n'pasted the wait
completion code from normal locked path. Unfortunately, this neglected
that the normal path returned early if the wait returned early. The
result is that read-only waits may return whilst the GPU is still
writing to the bo.
Fixes regression from
commit 3236f57a0162391f84b93f39fc1882c49a8998c7 [v3.7]
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Fri Aug 24 09:35:09 2012 +0100
drm/i915: Use a non-blocking wait for set-to-domain ioctl
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66163
Cc: stable@vger.kernel.org
---
drivers/gpu/drm/i915/i915_gem.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 75ab0cb..777c8b9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1160,7 +1160,8 @@ i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
/* Manually manage the write flush as we may have not yet
* retired the buffer.
*/
- if (obj->last_write_seqno &&
+ if (ret == 0 &&
+ obj->last_write_seqno &&
i915_seqno_passed(seqno, obj->last_write_seqno)) {
obj->last_write_seqno = 0;
obj->base.write_domain &= ~I915_GEM_GPU_DOMAINS;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] drm/i915: Only clear write-domains after a successful wait-seqno
2013-06-28 15:54 [PATCH] drm/i915: Only clear write-domains after a successful wait-seqno Chris Wilson
@ 2013-06-28 16:30 ` Daniel Vetter
2013-06-29 16:10 ` Chris Wilson
0 siblings, 1 reply; 3+ messages in thread
From: Daniel Vetter @ 2013-06-28 16:30 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, stable
On Fri, Jun 28, 2013 at 04:54:08PM +0100, Chris Wilson wrote:
> In the introduction of the non-blocking wait, I cut'n'pasted the wait
> completion code from normal locked path. Unfortunately, this neglected
> that the normal path returned early if the wait returned early. The
> result is that read-only waits may return whilst the GPU is still
> writing to the bo.
>
> Fixes regression from
> commit 3236f57a0162391f84b93f39fc1882c49a8998c7 [v3.7]
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date: Fri Aug 24 09:35:09 2012 +0100
>
> drm/i915: Use a non-blocking wait for set-to-domain ioctl
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66163
> Cc: stable@vger.kernel.org
Queued for -next, thanks for the patch. And do we have an igt for this?
The usual combinaition of some blt busy work with the drmtest interrupt
should be fairly effective I guess ...
-Daniel
> ---
> drivers/gpu/drm/i915/i915_gem.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 75ab0cb..777c8b9 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1160,7 +1160,8 @@ i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
> /* Manually manage the write flush as we may have not yet
> * retired the buffer.
> */
> - if (obj->last_write_seqno &&
> + if (ret == 0 &&
> + obj->last_write_seqno &&
> i915_seqno_passed(seqno, obj->last_write_seqno)) {
> obj->last_write_seqno = 0;
> obj->base.write_domain &= ~I915_GEM_GPU_DOMAINS;
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] drm/i915: Only clear write-domains after a successful wait-seqno
2013-06-28 16:30 ` Daniel Vetter
@ 2013-06-29 16:10 ` Chris Wilson
0 siblings, 0 replies; 3+ messages in thread
From: Chris Wilson @ 2013-06-29 16:10 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx, stable
On Fri, Jun 28, 2013 at 06:30:39PM +0200, Daniel Vetter wrote:
> On Fri, Jun 28, 2013 at 04:54:08PM +0100, Chris Wilson wrote:
> > In the introduction of the non-blocking wait, I cut'n'pasted the wait
> > completion code from normal locked path. Unfortunately, this neglected
> > that the normal path returned early if the wait returned early. The
> > result is that read-only waits may return whilst the GPU is still
> > writing to the bo.
> >
> > Fixes regression from
> > commit 3236f57a0162391f84b93f39fc1882c49a8998c7 [v3.7]
> > Author: Chris Wilson <chris@chris-wilson.co.uk>
> > Date: Fri Aug 24 09:35:09 2012 +0100
> >
> > drm/i915: Use a non-blocking wait for set-to-domain ioctl
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66163
> > Cc: stable@vger.kernel.org
>
> Queued for -next, thanks for the patch. And do we have an igt for this?
> The usual combinaition of some blt busy work with the drmtest interrupt
> should be fairly effective I guess ...
On the third attempt, I seem to have successfully reproduced the bug
using the gem_cpu_concurrent_blit and gem_gtt_concurrent_blit tests.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 3+ messages in thread
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2013-06-28 15:54 [PATCH] drm/i915: Only clear write-domains after a successful wait-seqno Chris Wilson
2013-06-28 16:30 ` Daniel Vetter
2013-06-29 16:10 ` Chris Wilson
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