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* [PATCH] KVM: nVMX: Set segment infomation of L1 when L2 exits
@ 2013-07-11  9:06 Arthur Chunqi Li
  2013-07-11  9:43 ` Gleb Natapov
  0 siblings, 1 reply; 3+ messages in thread
From: Arthur Chunqi Li @ 2013-07-11  9:06 UTC (permalink / raw)
  To: kvm; +Cc: gleb, pbonzini, jan.kiszka, Arthur Chunqi Li

When L2 exits to L1, segment infomations of L1 are not set correctly.
According to Intel SDM 27.5.2(Loading Host Segment and Descriptor
Table Registers), segment base/limit/access right of L1 should be
set to some designed value when L2 exits to L1. This patch fixes
this.

Signed-off-by: Arthur Chunqi Li <yzt356@gmail.com>
---
 arch/x86/kvm/vmx.c |   26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 1200e4e..3cf702b 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -8028,6 +8028,32 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
 	vmcs_write16(GUEST_GS_SELECTOR, vmcs12->host_gs_selector);
 	vmcs_write16(GUEST_TR_SELECTOR, vmcs12->host_tr_selector);
 
+	/* Set L1 segment info according to Intel SDM
+	    27.5.2 Loading Host Segment and Descriptor-Table Registers */
+	vmcs_writel(GUEST_CS_BASE, 0x0);
+	vmcs_writel(GUEST_SS_BASE, 0x0);
+	vmcs_writel(GUEST_DS_BASE, 0x0);
+	vmcs_writel(GUEST_ES_BASE, 0x0);
+	vmcs_write32(GUEST_CS_LIMIT, 0xFFFFFFFF);
+	vmcs_write32(GUEST_SS_LIMIT, 0xFFFFFFFF);
+	vmcs_write32(GUEST_DS_LIMIT, 0xFFFFFFFF);
+	vmcs_write32(GUEST_ES_LIMIT, 0xFFFFFFFF);
+	vmcs_write32(GUEST_FS_LIMIT, 0xFFFFFFFF);
+	vmcs_write32(GUEST_GS_LIMIT, 0xFFFFFFFF);
+	vmcs_write32(GUEST_TR_LIMIT, 0x67);
+	vmcs_write32(GUEST_ES_AR_BYTES, 0xc093);
+	if (vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE)
+		vmcs_write32(GUEST_CS_AR_BYTES, 0xa09b);
+	else
+		vmcs_write32(GUEST_CS_AR_BYTES, 0xc09b);
+	vmcs_write32(GUEST_SS_AR_BYTES, 0xc093);
+	vmcs_write32(GUEST_DS_AR_BYTES, 0xc093);
+	vmcs_write32(GUEST_FS_AR_BYTES, 0xc093);
+	vmcs_write32(GUEST_GS_AR_BYTES, 0xc093);
+	vmcs_write32(GUEST_TR_AR_BYTES, 0x8b);
+	vmcs_writel(GUEST_RFLAGS, 0x2);
+
+
 	if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PAT)
 		vmcs_write64(GUEST_IA32_PAT, vmcs12->host_ia32_pat);
 	if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH] KVM: nVMX: Set segment infomation of L1 when L2 exits
  2013-07-11  9:06 [PATCH] KVM: nVMX: Set segment infomation of L1 when L2 exits Arthur Chunqi Li
@ 2013-07-11  9:43 ` Gleb Natapov
  2013-07-11 10:15   ` Arthur Chunqi Li
  0 siblings, 1 reply; 3+ messages in thread
From: Gleb Natapov @ 2013-07-11  9:43 UTC (permalink / raw)
  To: Arthur Chunqi Li; +Cc: kvm, pbonzini, jan.kiszka

On Thu, Jul 11, 2013 at 05:06:04PM +0800, Arthur Chunqi Li wrote:
> When L2 exits to L1, segment infomations of L1 are not set correctly.
> According to Intel SDM 27.5.2(Loading Host Segment and Descriptor
> Table Registers), segment base/limit/access right of L1 should be
> set to some designed value when L2 exits to L1. This patch fixes
> this.
> 
Does this fix your test case?

> Signed-off-by: Arthur Chunqi Li <yzt356@gmail.com>
> ---
>  arch/x86/kvm/vmx.c |   26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 1200e4e..3cf702b 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -8028,6 +8028,32 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
>  	vmcs_write16(GUEST_GS_SELECTOR, vmcs12->host_gs_selector);
>  	vmcs_write16(GUEST_TR_SELECTOR, vmcs12->host_tr_selector);
>  
> +	/* Set L1 segment info according to Intel SDM
> +	    27.5.2 Loading Host Segment and Descriptor-Table Registers */
> +	vmcs_writel(GUEST_CS_BASE, 0x0);
> +	vmcs_writel(GUEST_SS_BASE, 0x0);
> +	vmcs_writel(GUEST_DS_BASE, 0x0);
> +	vmcs_writel(GUEST_ES_BASE, 0x0);
> +	vmcs_write32(GUEST_CS_LIMIT, 0xFFFFFFFF);
> +	vmcs_write32(GUEST_SS_LIMIT, 0xFFFFFFFF);
> +	vmcs_write32(GUEST_DS_LIMIT, 0xFFFFFFFF);
> +	vmcs_write32(GUEST_ES_LIMIT, 0xFFFFFFFF);
> +	vmcs_write32(GUEST_FS_LIMIT, 0xFFFFFFFF);
> +	vmcs_write32(GUEST_GS_LIMIT, 0xFFFFFFFF);
> +	vmcs_write32(GUEST_TR_LIMIT, 0x67);
> +	vmcs_write32(GUEST_ES_AR_BYTES, 0xc093);
> +	if (vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE)
> +		vmcs_write32(GUEST_CS_AR_BYTES, 0xa09b);
> +	else
> +		vmcs_write32(GUEST_CS_AR_BYTES, 0xc09b);
> +	vmcs_write32(GUEST_SS_AR_BYTES, 0xc093);
> +	vmcs_write32(GUEST_DS_AR_BYTES, 0xc093);
> +	vmcs_write32(GUEST_FS_AR_BYTES, 0xc093);
> +	vmcs_write32(GUEST_GS_AR_BYTES, 0xc093);
> +	vmcs_write32(GUEST_TR_AR_BYTES, 0x8b);
Please use AR_ defines for AR_BYTES fields (AR_S_MASK etc).

> +	vmcs_writel(GUEST_RFLAGS, 0x2);
> +
> +
>  	if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PAT)
>  		vmcs_write64(GUEST_IA32_PAT, vmcs12->host_ia32_pat);
>  	if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)
> -- 
> 1.7.9.5

--
			Gleb.

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [PATCH] KVM: nVMX: Set segment infomation of L1 when L2 exits
  2013-07-11  9:43 ` Gleb Natapov
@ 2013-07-11 10:15   ` Arthur Chunqi Li
  0 siblings, 0 replies; 3+ messages in thread
From: Arthur Chunqi Li @ 2013-07-11 10:15 UTC (permalink / raw)
  To: Gleb Natapov; +Cc: kvm, Paolo Bonzini, Jan Kiszka

On Thu, Jul 11, 2013 at 5:43 PM, Gleb Natapov <gleb@redhat.com> wrote:
> On Thu, Jul 11, 2013 at 05:06:04PM +0800, Arthur Chunqi Li wrote:
>> When L2 exits to L1, segment infomations of L1 are not set correctly.
>> According to Intel SDM 27.5.2(Loading Host Segment and Descriptor
>> Table Registers), segment base/limit/access right of L1 should be
>> set to some designed value when L2 exits to L1. This patch fixes
>> this.
>>
> Does this fix your test case?
Besides this bug, there are also some bugs in my test case. Now all
things run well.
>
>> Signed-off-by: Arthur Chunqi Li <yzt356@gmail.com>
>> ---
>>  arch/x86/kvm/vmx.c |   26 ++++++++++++++++++++++++++
>>  1 file changed, 26 insertions(+)
>>
>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>> index 1200e4e..3cf702b 100644
>> --- a/arch/x86/kvm/vmx.c
>> +++ b/arch/x86/kvm/vmx.c
>> @@ -8028,6 +8028,32 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
>>       vmcs_write16(GUEST_GS_SELECTOR, vmcs12->host_gs_selector);
>>       vmcs_write16(GUEST_TR_SELECTOR, vmcs12->host_tr_selector);
>>
>> +     /* Set L1 segment info according to Intel SDM
>> +         27.5.2 Loading Host Segment and Descriptor-Table Registers */
>> +     vmcs_writel(GUEST_CS_BASE, 0x0);
>> +     vmcs_writel(GUEST_SS_BASE, 0x0);
>> +     vmcs_writel(GUEST_DS_BASE, 0x0);
>> +     vmcs_writel(GUEST_ES_BASE, 0x0);
>> +     vmcs_write32(GUEST_CS_LIMIT, 0xFFFFFFFF);
>> +     vmcs_write32(GUEST_SS_LIMIT, 0xFFFFFFFF);
>> +     vmcs_write32(GUEST_DS_LIMIT, 0xFFFFFFFF);
>> +     vmcs_write32(GUEST_ES_LIMIT, 0xFFFFFFFF);
>> +     vmcs_write32(GUEST_FS_LIMIT, 0xFFFFFFFF);
>> +     vmcs_write32(GUEST_GS_LIMIT, 0xFFFFFFFF);
>> +     vmcs_write32(GUEST_TR_LIMIT, 0x67);
>> +     vmcs_write32(GUEST_ES_AR_BYTES, 0xc093);
>> +     if (vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE)
>> +             vmcs_write32(GUEST_CS_AR_BYTES, 0xa09b);
>> +     else
>> +             vmcs_write32(GUEST_CS_AR_BYTES, 0xc09b);
>> +     vmcs_write32(GUEST_SS_AR_BYTES, 0xc093);
>> +     vmcs_write32(GUEST_DS_AR_BYTES, 0xc093);
>> +     vmcs_write32(GUEST_FS_AR_BYTES, 0xc093);
>> +     vmcs_write32(GUEST_GS_AR_BYTES, 0xc093);
>> +     vmcs_write32(GUEST_TR_AR_BYTES, 0x8b);
> Please use AR_ defines for AR_BYTES fields (AR_S_MASK etc).
>
>> +     vmcs_writel(GUEST_RFLAGS, 0x2);
>> +
>> +
>>       if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PAT)
>>               vmcs_write64(GUEST_IA32_PAT, vmcs12->host_ia32_pat);
>>       if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)
>> --
>> 1.7.9.5
>
> --
>                         Gleb.



--
Arthur Chunqi Li
Department of Computer Science
School of EECS
Peking University
Beijing, China

^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-07-11 10:15 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2013-07-11  9:06 [PATCH] KVM: nVMX: Set segment infomation of L1 when L2 exits Arthur Chunqi Li
2013-07-11  9:43 ` Gleb Natapov
2013-07-11 10:15   ` Arthur Chunqi Li

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