* Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
@ 2013-07-23 22:34 Gordan Bobic
2013-07-24 14:08 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-23 22:34 UTC (permalink / raw)
To: xen-devel
[-- Attachment #1: Type: text/plain, Size: 470 bytes --]
I just built 4.3.0 in order to get > 2GB of RAM in domU with GPU
passthrough without crashes. Unfortunately, the same crashes still
happen. Massive frame buffer corruption on domU before it locks up
solid. It seems the PCI memory stomp is still happening.
I am using qemu-dm, as I did on Xen 4.2.x.
So whatever fix for this went into 4.3.0 didn't fix it for me.
Passing less than 2GB of RAM to domU till works fine.
I have attached:
qemu-dm log for domU
xl dmesg
[-- Attachment #2: qemu-dm-edi.log --]
[-- Type: text/plain, Size: 7705 bytes --]
domid: 1
Using file /dev/zvol/ssd/edi in read-write mode
Watching /local/domain/0/device-model/1/logdirty/cmd
Watching /local/domain/0/device-model/1/command
Watching /local/domain/1/cpu
char device redirected to /dev/pts/3
qemu_map_cache_init nr_buckets = 10000 size 4194304
shared page at pfn feffd
buffered io page at pfn feffb
Guest uuid = a57e6840-e9f5-4a14-a822-b2cc662c177f
populating video RAM at ff000000
mapping video RAM from ff000000
Register xen platform.
Done register platform.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
xs_read(/local/domain/0/device-model/1/xen_extended_power_mgmt): read error
xs_read(): vncpasswd get error. /vm/a57e6840-e9f5-4a14-a822-b2cc662c177f/vncpasswd.
Log-dirty: no command yet.
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
vcpu-set: watch node error.
[xenstore_process_vcpu_set_event]: /local/domain/1/cpu has no CPU!
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
xs_read(/local/domain/1/log-throttling): read error
qemu: ignoring not-understood drive `/local/domain/1/log-throttling'
medium change watch on `/local/domain/1/log-throttling' - unknown device, ignored
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 00:1a.1 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x0:0x1a.0x1
pt_register_regions: IO region registered (size=0x00000020 base_addr=0x00009a01)
pci_intx: intx=2
register_real_device: Real physical device 00:1a.1 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 0d:00.0 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0xd:0x0.0x0
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xd7efc000)
pci_intx: intx=1
register_real_device: Real physical device 0d:00.0 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.0 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x0
pt_register_regions: IO region registered (size=0x02000000 base_addr=0xf8000000)
pt_register_regions: IO region registered (size=0x08000000 base_addr=0xb800000c)
pt_register_regions: IO region registered (size=0x04000000 base_addr=0xb400000c)
pt_register_regions: IO region registered (size=0x00000080 base_addr=0x0000df81)
pt_register_regions: Expansion ROM registered (size=0x00080000 base_addr=0xfbd00000)
pt_msi_setup: msi mapped with pirq 4f
pci_intx: intx=1
register_real_device: Real physical device 08:00.0 registered successfuly!
IRQ type = MSI-INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.1 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x1
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xfbdfc000)
pt_msi_setup: msi mapped with pirq 4e
pci_intx: intx=2
register_real_device: Real physical device 08:00.1 registered successfuly!
IRQ type = MSI-INTx
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=1
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=1
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=1
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=1
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=1
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=1
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=1
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro state.
Unknown PV product 2 loaded in guest
PV driver build 1
region type 0 at [ef880000,ef8a0000).
squash iomem [ef880000, ef8a0000).
region type 1 at [c180,c1c0).
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
pt_pci_write_config: [00:05:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:06:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:08:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=0
[-- Attachment #3: xldmesg.log --]
[-- Type: text/plain, Size: 7040 bytes --]
__ __ _ _ _____ ___ _ _ __
\ \/ /___ _ __ | || | |___ / / _ \ / | ___| |/ /_
\ // _ \ '_ \ | || |_ |_ \| | | |__| | / _ \ | '_ \
/ \ __/ | | | |__ _| ___) | |_| |__| || __/ | (_) |
/_/\_\___|_| |_| |_|(_)____(_)___/ |_(_)___|_|\___/
(XEN) Xen version 4.3.0 (root@shatteredsilicon.net) (gcc (GCC) 4.4.5 20110214 (Red Hat 4.4.5-6)) debug=n Tue Jul 23 14:28:40 BST 2013
(XEN) Latest ChangeSet:
(XEN) Bootloader: GNU GRUB 0.97
(XEN) Command line: noreboot dom0_vcpus_pin
(XEN) Video information:
(XEN) VGA is text mode 80x25, font 8x16
(XEN) VBE/DDC methods: V2; EDID transfer time: 1 seconds
(XEN) Disc information:
(XEN) Found 4 MBR signatures
(XEN) Found 4 EDD information structures
(XEN) Xen-e820 RAM map:
(XEN) 0000000000000000 - 000000000009d400 (usable)
(XEN) 000000000009d400 - 00000000000a0000 (reserved)
(XEN) 00000000000e0000 - 0000000000100000 (reserved)
(XEN) 0000000000100000 - 000000003f790000 (usable)
(XEN) 000000003f790000 - 000000003f79e000 (ACPI data)
(XEN) 000000003f79e000 - 000000003f7d0000 (ACPI NVS)
(XEN) 000000003f7d0000 - 000000003f7e0000 (reserved)
(XEN) 000000003f7e7000 - 0000000040000000 (reserved)
(XEN) 00000000fee00000 - 00000000fee01000 (reserved)
(XEN) 00000000ffc00000 - 0000000100000000 (reserved)
(XEN) 0000000100000000 - 0000000cc0000000 (usable)
(XEN) ACPI: RSDP 000F9F70, 0024 (r2 ACPIAM)
(XEN) ACPI: XSDT 3F790100, 0064 (r1 042413 XSDT1438 20130424 MSFT 97)
(XEN) ACPI: FACP 3F790290, 00F4 (r4 042413 FACP1438 20130424 MSFT 97)
(XEN) ACPI: DSDT 3F7904F0, 58A3 (r2 1W555 1W555A58 A58 INTL 20051117)
(XEN) ACPI: FACS 3F79E000, 0040
(XEN) ACPI: APIC 3F790390, 0118 (r2 042413 APIC1438 20130424 MSFT 97)
(XEN) ACPI: MCFG 3F7904B0, 003C (r1 042413 OEMMCFG 20130424 MSFT 97)
(XEN) ACPI: OEMB 3F79E040, 0082 (r1 042413 OEMB1438 20130424 MSFT 97)
(XEN) ACPI: SRAT 3F79A4F0, 0250 (r2 042413 OEMSRAT 1 INTL 1)
(XEN) ACPI: HPET 3F79A740, 0038 (r1 042413 OEMHPET 20130424 MSFT 97)
(XEN) ACPI: DMAR 3F79E0D0, 0120 (r1 AMI OEMDMAR 1 MSFT 97)
(XEN) ACPI: SSDT 3F7A4C70, 0363 (r1 DpgPmm CpuPm 12 INTL 20051117)
(XEN) System RAM: 49143MB (50322612kB)
(XEN) Domain heap initialised DMA width 32 bits
(XEN) Processor #0 6:12 APIC version 21
(XEN) Processor #2 6:12 APIC version 21
(XEN) Processor #4 6:12 APIC version 21
(XEN) Processor #16 6:12 APIC version 21
(XEN) Processor #18 6:12 APIC version 21
(XEN) Processor #20 6:12 APIC version 21
(XEN) Processor #32 6:12 APIC version 21
(XEN) Processor #34 6:12 APIC version 21
(XEN) Processor #36 6:12 APIC version 21
(XEN) Processor #48 6:12 APIC version 21
(XEN) Processor #50 6:12 APIC version 21
(XEN) Processor #52 6:12 APIC version 21
(XEN) Processor #1 6:12 APIC version 21
(XEN) Processor #3 6:12 APIC version 21
(XEN) Processor #5 6:12 APIC version 21
(XEN) Processor #17 6:12 APIC version 21
(XEN) Processor #19 6:12 APIC version 21
(XEN) Processor #21 6:12 APIC version 21
(XEN) Processor #33 6:12 APIC version 21
(XEN) Processor #35 6:12 APIC version 21
(XEN) Processor #37 6:12 APIC version 21
(XEN) Processor #49 6:12 APIC version 21
(XEN) Processor #51 6:12 APIC version 21
(XEN) Processor #53 6:12 APIC version 21
(XEN) IOAPIC[0]: apic_id 6, version 32, address 0xfec00000, GSI 0-23
(XEN) IOAPIC[1]: apic_id 7, version 32, address 0xfec8a000, GSI 24-47
(XEN) Enabling APIC mode: Phys. Using 2 I/O APICs
(XEN) Using scheduler: SMP Credit Scheduler (credit)
(XEN) Detected 3321.755 MHz processor.
(XEN) Initing memory sharing.
(XEN) PCI: Not using MCFG for segment 0000 bus 00-ff
(XEN) Intel VT-d iommu 0 supported page sizes: 4kB.
(XEN) Intel VT-d Snoop Control enabled.
(XEN) Intel VT-d Dom0 DMA Passthrough not enabled.
(XEN) Intel VT-d Queued Invalidation enabled.
(XEN) Intel VT-d Interrupt Remapping not enabled.
(XEN) Intel VT-d Shared EPT tables not enabled.
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping disabled
(XEN) Enabled directed EOI with ioapic_ack_old on!
(XEN) ENABLING IO-APIC IRQs
(XEN) -> Using old ACK method
(XEN) Platform timer is 14.318MHz HPET
(XEN) Allocated console ring of 64 KiB.
(XEN) VMX: Supported advanced features:
(XEN) - APIC MMIO access virtualisation
(XEN) - APIC TPR shadow
(XEN) - Extended Page Tables (EPT)
(XEN) - Virtual-Processor Identifiers (VPID)
(XEN) - Virtual NMI
(XEN) - MSR direct-access bitmap
(XEN) - Unrestricted Guest
(XEN) HVM: ASIDs enabled.
(XEN) HVM: VMX enabled
(XEN) HVM: Hardware Assisted Paging (HAP) detected
(XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
(XEN) Brought up 24 CPUs
(XEN) verify_tsc_reliability: TSC warp detected, disabling TSC_RELIABLE
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Xen kernel: 64-bit, lsb, compat32
(XEN) Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x1f70000
(XEN) PHYSICAL MEMORY ARRANGEMENT:
(XEN) Dom0 alloc.: 0000000420000000->0000000430000000 (12302085 pages to be allocated)
(XEN) Init. ramdisk: 0000000cbbdc3000->0000000cbffff400
(XEN) VIRTUAL MEMORY ARRANGEMENT:
(XEN) Loaded kernel: ffffffff81000000->ffffffff81f70000
(XEN) Init. ramdisk: ffffffff81f70000->ffffffff861ac400
(XEN) Phys-Mach map: ffffffff861ad000->ffffffff8c029a10
(XEN) Start info: ffffffff8c02a000->ffffffff8c02a4b4
(XEN) Page tables: ffffffff8c02b000->ffffffff8c090000
(XEN) Boot stack: ffffffff8c090000->ffffffff8c091000
(XEN) TOTAL: ffffffff80000000->ffffffff8c400000
(XEN) ENTRY ADDRESS: ffffffff818091e0
(XEN) Dom0 has maximum 24 VCPUs
(XEN) Scrubbing Free RAM: .done.
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: Errors and warnings
(XEN) Guest Loglevel: Nothing (Rate-limited: Errors and warnings)
(XEN) Xen is relinquishing VGA console.
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 272kB init memory.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
[-- Attachment #4: Type: text/plain, Size: 126 bytes --]
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^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-23 22:34 Bug: Limitation of <=2GB RAM in domU persists with 4.3.0 Gordan Bobic
@ 2013-07-24 14:08 ` Konrad Rzeszutek Wilk
2013-07-24 14:17 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-07-24 14:08 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Tue, Jul 23, 2013 at 11:34:00PM +0100, Gordan Bobic wrote:
> I just built 4.3.0 in order to get > 2GB of RAM in domU with GPU
> passthrough without crashes. Unfortunately, the same crashes still
> happen. Massive frame buffer corruption on domU before it locks up
> solid. It seems the PCI memory stomp is still happening.
>
If you boot Xen with guest_loglvl=all
and then run the guest the consoel (xl dmesg) should also have
the output from QEMU - that will help in seeing how it constructs
the E820 (which was the problem last time).
Are you also able to get the serial log from the guest? (IF this is
Linux?) I usually have this in my guest config:
serial='pty'
and when Linux boots up I add 'console=ttyS0,115200 loglevel=8 debug'
which will output everything to the 'xl console <guest> | tee /tmp/log'.
> I am using qemu-dm, as I did on Xen 4.2.x.
>
> So whatever fix for this went into 4.3.0 didn't fix it for me.
> Passing less than 2GB of RAM to domU till works fine.
>
> I have attached:
>
> qemu-dm log for domU
> xl dmesg
> domid: 1
> Using file /dev/zvol/ssd/edi in read-write mode
> Watching /local/domain/0/device-model/1/logdirty/cmd
> Watching /local/domain/0/device-model/1/command
> Watching /local/domain/1/cpu
> char device redirected to /dev/pts/3
> qemu_map_cache_init nr_buckets = 10000 size 4194304
> shared page at pfn feffd
> buffered io page at pfn feffb
> Guest uuid = a57e6840-e9f5-4a14-a822-b2cc662c177f
> populating video RAM at ff000000
> mapping video RAM from ff000000
> Register xen platform.
> Done register platform.
> platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
> xs_read(/local/domain/0/device-model/1/xen_extended_power_mgmt): read error
> xs_read(): vncpasswd get error. /vm/a57e6840-e9f5-4a14-a822-b2cc662c177f/vncpasswd.
> Log-dirty: no command yet.
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> vcpu-set: watch node error.
> [xenstore_process_vcpu_set_event]: /local/domain/1/cpu has no CPU!
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> xs_read(/local/domain/1/log-throttling): read error
> qemu: ignoring not-understood drive `/local/domain/1/log-throttling'
> medium change watch on `/local/domain/1/log-throttling' - unknown device, ignored
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> dm-command: hot insert pass-through pci dev
> register_real_device: Assigning real physical device 00:1a.1 ...
> register_real_device: Enable MSI translation via per device option
> register_real_device: Disable power management
> pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x0:0x1a.0x1
> pt_register_regions: IO region registered (size=0x00000020 base_addr=0x00009a01)
> pci_intx: intx=2
> register_real_device: Real physical device 00:1a.1 registered successfuly!
> IRQ type = INTx
> dm-command: hot insert pass-through pci dev
> register_real_device: Assigning real physical device 0d:00.0 ...
> register_real_device: Enable MSI translation via per device option
> register_real_device: Disable power management
> pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0xd:0x0.0x0
> pt_register_regions: IO region registered (size=0x00004000 base_addr=0xd7efc000)
> pci_intx: intx=1
> register_real_device: Real physical device 0d:00.0 registered successfuly!
> IRQ type = INTx
> dm-command: hot insert pass-through pci dev
> register_real_device: Assigning real physical device 08:00.0 ...
> register_real_device: Enable MSI translation via per device option
> register_real_device: Disable power management
> pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x0
> pt_register_regions: IO region registered (size=0x02000000 base_addr=0xf8000000)
> pt_register_regions: IO region registered (size=0x08000000 base_addr=0xb800000c)
> pt_register_regions: IO region registered (size=0x04000000 base_addr=0xb400000c)
> pt_register_regions: IO region registered (size=0x00000080 base_addr=0x0000df81)
> pt_register_regions: Expansion ROM registered (size=0x00080000 base_addr=0xfbd00000)
> pt_msi_setup: msi mapped with pirq 4f
> pci_intx: intx=1
> register_real_device: Real physical device 08:00.0 registered successfuly!
> IRQ type = MSI-INTx
> dm-command: hot insert pass-through pci dev
> register_real_device: Assigning real physical device 08:00.1 ...
> register_real_device: Enable MSI translation via per device option
> register_real_device: Disable power management
> pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x1
> pt_register_regions: IO region registered (size=0x00004000 base_addr=0xfbdfc000)
> pt_msi_setup: msi mapped with pirq 4e
> pci_intx: intx=2
> register_real_device: Real physical device 08:00.1 registered successfuly!
> IRQ type = MSI-INTx
> pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=1
> pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=1
> pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=1
> vga s->lfb_addr = ef000000 s->lfb_end = ef800000
> pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=1
> pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=1
> pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=1
> pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=1
> platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
> platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro state.
> Unknown PV product 2 loaded in guest
> PV driver build 1
> region type 0 at [ef880000,ef8a0000).
> squash iomem [ef880000, ef8a0000).
> region type 1 at [c180,c1c0).
> vga s->lfb_addr = ef000000 s->lfb_end = ef800000
> pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
> pt_pci_write_config: [00:05:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
> pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_pci_write_config: [00:06:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
> pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
> pt_ioport_map: e_phys=ffff pio_base=df80 len=128 index=5 first_map=0
> pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
> pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
> pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
> pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
> pt_pci_write_config: [00:08:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
> pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
> pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
> pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
> pt_ioport_map: e_phys=ffff pio_base=df80 len=128 index=5 first_map=0
> pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
> pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
> pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
> pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=0
> __ __ _ _ _____ ___ _ _ __
> \ \/ /___ _ __ | || | |___ / / _ \ / | ___| |/ /_
> \ // _ \ '_ \ | || |_ |_ \| | | |__| | / _ \ | '_ \
> / \ __/ | | | |__ _| ___) | |_| |__| || __/ | (_) |
> /_/\_\___|_| |_| |_|(_)____(_)___/ |_(_)___|_|\___/
>
> (XEN) Xen version 4.3.0 (root@shatteredsilicon.net) (gcc (GCC) 4.4.5 20110214 (Red Hat 4.4.5-6)) debug=n Tue Jul 23 14:28:40 BST 2013
> (XEN) Latest ChangeSet:
> (XEN) Bootloader: GNU GRUB 0.97
> (XEN) Command line: noreboot dom0_vcpus_pin
> (XEN) Video information:
> (XEN) VGA is text mode 80x25, font 8x16
> (XEN) VBE/DDC methods: V2; EDID transfer time: 1 seconds
> (XEN) Disc information:
> (XEN) Found 4 MBR signatures
> (XEN) Found 4 EDD information structures
> (XEN) Xen-e820 RAM map:
> (XEN) 0000000000000000 - 000000000009d400 (usable)
> (XEN) 000000000009d400 - 00000000000a0000 (reserved)
> (XEN) 00000000000e0000 - 0000000000100000 (reserved)
> (XEN) 0000000000100000 - 000000003f790000 (usable)
> (XEN) 000000003f790000 - 000000003f79e000 (ACPI data)
> (XEN) 000000003f79e000 - 000000003f7d0000 (ACPI NVS)
> (XEN) 000000003f7d0000 - 000000003f7e0000 (reserved)
> (XEN) 000000003f7e7000 - 0000000040000000 (reserved)
> (XEN) 00000000fee00000 - 00000000fee01000 (reserved)
> (XEN) 00000000ffc00000 - 0000000100000000 (reserved)
> (XEN) 0000000100000000 - 0000000cc0000000 (usable)
> (XEN) ACPI: RSDP 000F9F70, 0024 (r2 ACPIAM)
> (XEN) ACPI: XSDT 3F790100, 0064 (r1 042413 XSDT1438 20130424 MSFT 97)
> (XEN) ACPI: FACP 3F790290, 00F4 (r4 042413 FACP1438 20130424 MSFT 97)
> (XEN) ACPI: DSDT 3F7904F0, 58A3 (r2 1W555 1W555A58 A58 INTL 20051117)
> (XEN) ACPI: FACS 3F79E000, 0040
> (XEN) ACPI: APIC 3F790390, 0118 (r2 042413 APIC1438 20130424 MSFT 97)
> (XEN) ACPI: MCFG 3F7904B0, 003C (r1 042413 OEMMCFG 20130424 MSFT 97)
> (XEN) ACPI: OEMB 3F79E040, 0082 (r1 042413 OEMB1438 20130424 MSFT 97)
> (XEN) ACPI: SRAT 3F79A4F0, 0250 (r2 042413 OEMSRAT 1 INTL 1)
> (XEN) ACPI: HPET 3F79A740, 0038 (r1 042413 OEMHPET 20130424 MSFT 97)
> (XEN) ACPI: DMAR 3F79E0D0, 0120 (r1 AMI OEMDMAR 1 MSFT 97)
> (XEN) ACPI: SSDT 3F7A4C70, 0363 (r1 DpgPmm CpuPm 12 INTL 20051117)
> (XEN) System RAM: 49143MB (50322612kB)
> (XEN) Domain heap initialised DMA width 32 bits
> (XEN) Processor #0 6:12 APIC version 21
> (XEN) Processor #2 6:12 APIC version 21
> (XEN) Processor #4 6:12 APIC version 21
> (XEN) Processor #16 6:12 APIC version 21
> (XEN) Processor #18 6:12 APIC version 21
> (XEN) Processor #20 6:12 APIC version 21
> (XEN) Processor #32 6:12 APIC version 21
> (XEN) Processor #34 6:12 APIC version 21
> (XEN) Processor #36 6:12 APIC version 21
> (XEN) Processor #48 6:12 APIC version 21
> (XEN) Processor #50 6:12 APIC version 21
> (XEN) Processor #52 6:12 APIC version 21
> (XEN) Processor #1 6:12 APIC version 21
> (XEN) Processor #3 6:12 APIC version 21
> (XEN) Processor #5 6:12 APIC version 21
> (XEN) Processor #17 6:12 APIC version 21
> (XEN) Processor #19 6:12 APIC version 21
> (XEN) Processor #21 6:12 APIC version 21
> (XEN) Processor #33 6:12 APIC version 21
> (XEN) Processor #35 6:12 APIC version 21
> (XEN) Processor #37 6:12 APIC version 21
> (XEN) Processor #49 6:12 APIC version 21
> (XEN) Processor #51 6:12 APIC version 21
> (XEN) Processor #53 6:12 APIC version 21
> (XEN) IOAPIC[0]: apic_id 6, version 32, address 0xfec00000, GSI 0-23
> (XEN) IOAPIC[1]: apic_id 7, version 32, address 0xfec8a000, GSI 24-47
> (XEN) Enabling APIC mode: Phys. Using 2 I/O APICs
> (XEN) Using scheduler: SMP Credit Scheduler (credit)
> (XEN) Detected 3321.755 MHz processor.
> (XEN) Initing memory sharing.
> (XEN) PCI: Not using MCFG for segment 0000 bus 00-ff
> (XEN) Intel VT-d iommu 0 supported page sizes: 4kB.
> (XEN) Intel VT-d Snoop Control enabled.
> (XEN) Intel VT-d Dom0 DMA Passthrough not enabled.
> (XEN) Intel VT-d Queued Invalidation enabled.
> (XEN) Intel VT-d Interrupt Remapping not enabled.
> (XEN) Intel VT-d Shared EPT tables not enabled.
> (XEN) I/O virtualisation enabled
> (XEN) - Dom0 mode: Relaxed
> (XEN) Interrupt remapping disabled
> (XEN) Enabled directed EOI with ioapic_ack_old on!
> (XEN) ENABLING IO-APIC IRQs
> (XEN) -> Using old ACK method
> (XEN) Platform timer is 14.318MHz HPET
> (XEN) Allocated console ring of 64 KiB.
> (XEN) VMX: Supported advanced features:
> (XEN) - APIC MMIO access virtualisation
> (XEN) - APIC TPR shadow
> (XEN) - Extended Page Tables (EPT)
> (XEN) - Virtual-Processor Identifiers (VPID)
> (XEN) - Virtual NMI
> (XEN) - MSR direct-access bitmap
> (XEN) - Unrestricted Guest
> (XEN) HVM: ASIDs enabled.
> (XEN) HVM: VMX enabled
> (XEN) HVM: Hardware Assisted Paging (HAP) detected
> (XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
> (XEN) Brought up 24 CPUs
> (XEN) verify_tsc_reliability: TSC warp detected, disabling TSC_RELIABLE
> (XEN) *** LOADING DOMAIN 0 ***
> (XEN) Xen kernel: 64-bit, lsb, compat32
> (XEN) Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x1f70000
> (XEN) PHYSICAL MEMORY ARRANGEMENT:
> (XEN) Dom0 alloc.: 0000000420000000->0000000430000000 (12302085 pages to be allocated)
> (XEN) Init. ramdisk: 0000000cbbdc3000->0000000cbffff400
> (XEN) VIRTUAL MEMORY ARRANGEMENT:
> (XEN) Loaded kernel: ffffffff81000000->ffffffff81f70000
> (XEN) Init. ramdisk: ffffffff81f70000->ffffffff861ac400
> (XEN) Phys-Mach map: ffffffff861ad000->ffffffff8c029a10
> (XEN) Start info: ffffffff8c02a000->ffffffff8c02a4b4
> (XEN) Page tables: ffffffff8c02b000->ffffffff8c090000
> (XEN) Boot stack: ffffffff8c090000->ffffffff8c091000
> (XEN) TOTAL: ffffffff80000000->ffffffff8c400000
> (XEN) ENTRY ADDRESS: ffffffff818091e0
> (XEN) Dom0 has maximum 24 VCPUs
> (XEN) Scrubbing Free RAM: .done.
> (XEN) Initial low memory virq threshold set at 0x4000 pages.
> (XEN) Std. Loglevel: Errors and warnings
> (XEN) Guest Loglevel: Nothing (Rate-limited: Errors and warnings)
> (XEN) Xen is relinquishing VGA console.
> (XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
> (XEN) Freed 272kB init memory.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> (XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-24 14:08 ` Konrad Rzeszutek Wilk
@ 2013-07-24 14:17 ` Gordan Bobic
2013-07-24 16:06 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-24 14:17 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Wed, 24 Jul 2013 10:08:13 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> On Tue, Jul 23, 2013 at 11:34:00PM +0100, Gordan Bobic wrote:
>> I just built 4.3.0 in order to get > 2GB of RAM in domU with GPU
>> passthrough without crashes. Unfortunately, the same crashes still
>> happen. Massive frame buffer corruption on domU before it locks up
>> solid. It seems the PCI memory stomp is still happening.
>>
>
> If you boot Xen with guest_loglvl=all
>
> and then run the guest the consoel (xl dmesg) should also have
> the output from QEMU - that will help in seeing how it constructs
> the E820 (which was the problem last time).
I will gather this tonight - apologies, I forgot that I removed
the loglvl=all options from my boot config.
> Are you also able to get the serial log from the guest? (IF this is
> Linux?) I usually have this in my guest config:
>
> serial='pty'
>
> and when Linux boots up I add 'console=ttyS0,115200 loglevel=8 debug'
> which will output everything to the 'xl console <guest> | tee
> /tmp/log'.
The intended guest is XP64. I will, however, get a Linux guest up
and running with the exact same domU config (apart from the disk
volume) for debugging this.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-24 14:17 ` Gordan Bobic
@ 2013-07-24 16:06 ` Konrad Rzeszutek Wilk
2013-07-24 16:14 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-07-24 16:06 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Wed, Jul 24, 2013 at 03:17:50PM +0100, Gordan Bobic wrote:
> On Wed, 24 Jul 2013 10:08:13 -0400, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
> >On Tue, Jul 23, 2013 at 11:34:00PM +0100, Gordan Bobic wrote:
> >>I just built 4.3.0 in order to get > 2GB of RAM in domU with GPU
> >>passthrough without crashes. Unfortunately, the same crashes still
> >>happen. Massive frame buffer corruption on domU before it locks up
> >>solid. It seems the PCI memory stomp is still happening.
> >>
> >
> >If you boot Xen with guest_loglvl=all
> >
> >and then run the guest the consoel (xl dmesg) should also have
> >the output from QEMU - that will help in seeing how it constructs
> >the E820 (which was the problem last time).
>
> I will gather this tonight - apologies, I forgot that I removed
> the loglvl=all options from my boot config.
Take your time.
>
> >Are you also able to get the serial log from the guest? (IF this is
> >Linux?) I usually have this in my guest config:
> >
> >serial='pty'
> >
> >and when Linux boots up I add 'console=ttyS0,115200 loglevel=8 debug'
> >which will output everything to the 'xl console <guest> | tee
> >/tmp/log'.
>
> The intended guest is XP64. I will, however, get a Linux guest up
Ah, I am not actually sure how Linux will work. I hadn't had a chance
to test that recently :-(
> and running with the exact same domU config (apart from the disk
> volume) for debugging this.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-24 16:06 ` Konrad Rzeszutek Wilk
@ 2013-07-24 16:14 ` Gordan Bobic
2013-07-24 16:31 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-24 16:14 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Wed, 24 Jul 2013 12:06:39 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
>> >Are you also able to get the serial log from the guest? (IF this is
>> >Linux?) I usually have this in my guest config:
>> >
>> >serial='pty'
>> >
>> >and when Linux boots up I add 'console=ttyS0,115200 loglevel=8
>> debug'
>> >which will output everything to the 'xl console <guest> | tee
>> >/tmp/log'.
>>
>> The intended guest is XP64. I will, however, get a Linux guest up
>
> Ah, I am not actually sure how Linux will work. I hadn't had a chance
> to test that recently :-(
As long as it brings up the serial console, that should be
sufficient, but working VNC to text console login would be
convenient. The main thing I want to find on it is the
BAR mapping addresses from lspci and compare that to the
e820 map from dmesg.
I wouldn't expect the memory map provided by SeaBIOS and
the BAR mappings configured by qemu-dm to differ
depending on the domU OS. Or am I wrong here?
If there is any overlap, the problem should be obvious.
If there is no overlap, then something even more
bizzare is going on, but we can worry about that
later. :)
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-24 16:14 ` Gordan Bobic
@ 2013-07-24 16:31 ` Konrad Rzeszutek Wilk
2013-07-24 17:26 ` Gordan Bobic
` (2 more replies)
0 siblings, 3 replies; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-07-24 16:31 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Wed, Jul 24, 2013 at 05:14:32PM +0100, Gordan Bobic wrote:
> On Wed, 24 Jul 2013 12:06:39 -0400, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
>
> >>>Are you also able to get the serial log from the guest? (IF this is
> >>>Linux?) I usually have this in my guest config:
> >>>
> >>>serial='pty'
> >>>
> >>>and when Linux boots up I add 'console=ttyS0,115200 loglevel=8
> >>debug'
> >>>which will output everything to the 'xl console <guest> | tee
> >>>/tmp/log'.
> >>
> >>The intended guest is XP64. I will, however, get a Linux guest up
> >
> >Ah, I am not actually sure how Linux will work. I hadn't had a chance
> >to test that recently :-(
>
> As long as it brings up the serial console, that should be
> sufficient, but working VNC to text console login would be
> convenient. The main thing I want to find on it is the
> BAR mapping addresses from lspci and compare that to the
> e820 map from dmesg.
I see. That should work for you.
>
> I wouldn't expect the memory map provided by SeaBIOS and
> the BAR mappings configured by qemu-dm to differ
> depending on the domU OS. Or am I wrong here?
They might. The patches to fix the 2GB limit went in qemu-xen-traditional
meaning you have to use:
device_model_version = 'qemu-xen-traditional'
in your guest config (which I think you are already doing).
I don't recall what the situation is with upstream SeaBIOS.
>
> If there is any overlap, the problem should be obvious.
> If there is no overlap, then something even more
> bizzare is going on, but we can worry about that
> later. :)
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-24 16:31 ` Konrad Rzeszutek Wilk
@ 2013-07-24 17:26 ` Gordan Bobic
2013-07-24 22:15 ` Gordan Bobic
2013-07-25 21:26 ` Bug: Limitation of <=2GB RAM in domU persists with 4.3.0 Gordan Bobic
2 siblings, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-07-24 17:26 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On 07/24/2013 05:31 PM, Konrad Rzeszutek Wilk wrote:
>> I wouldn't expect the memory map provided by SeaBIOS and
>> the BAR mappings configured by qemu-dm to differ
>> depending on the domU OS. Or am I wrong here?
>
> They might. The patches to fix the 2GB limit went in qemu-xen-traditional
> meaning you have to use:
>
> device_model_version = 'qemu-xen-traditional'
>
> in your guest config (which I think you are already doing).
Yes and no. I am using a self-built 4.3.0 rpm based fairly closely on
the CRC 4.2.x rpms for EL6. This includes a patch to only build qemu-dm
and make it the default, which, presumably, means that I don't have to
explicitly specify device_model_version. But maybe I'm wrong. I'll try
specifying it explicitly and see if that helps.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-24 16:31 ` Konrad Rzeszutek Wilk
2013-07-24 17:26 ` Gordan Bobic
@ 2013-07-24 22:15 ` Gordan Bobic
2013-07-25 19:18 ` George Dunlap
2013-07-25 21:26 ` Bug: Limitation of <=2GB RAM in domU persists with 4.3.0 Gordan Bobic
2 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-24 22:15 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
[-- Attachment #1: Type: text/plain, Size: 388 bytes --]
Attached are the logs (loglvl=all) and configs for 2GB (working) and 8GB
(screen corruption + domU crash + sometimes dom0 crashing with it).
I can see in the xl-dmesg log in 8GB case that there is memory remapping
going on to allow for the lowmem MMIO hole, but it doesn't seem to help.
I will get a Linux VM up and running tomorrow and get a comparison of
domU BARs vs. e820 map.
[-- Attachment #2: dmesg.log.2GB --]
[-- Type: text/plain, Size: 77202 bytes --]
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Linux version 3.9.9-2.el6xen.x86_64 (root@normandy) (gcc version 4.4.5 20110214 (Red Hat 4.4.5-6) (GCC) ) #1 SMP Tue Jul 16 15:52:11 BST 2013
Command line: ro root=UUID=ea61c60b-8e91-4cc3-ab17-f6b5097f1e87 rd_MD_UUID=26fb9899:f3adb40f:b22e37a7:5f2db70a rd_MD_UUID=fbf20e02:97089c2c:1d0e1847:9e192fe8 rd_NO_LUKS rd_NO_LVM rd_NO_DM LANG=en_US.UTF-8 SYSFONT=latarcyrheb-sun16 KEYBOARDTYPE=pc KEYTABLE=uk selinux=0 elevator=deadline intel_iommu=on elevator=deadline iomem=relaxed video=DVI-I-1:edid/1920x2400 video=DVI-I-2:1920x2400 video=DIN-1:d
Freeing 9d-100 pfn range: 99 pages freed
1-1 mapping on 9d->100
Freeing 3f790-100000 pfn range: 788592 pages freed
1-1 mapping on 3f790->100000
Released 788691 pages of unused memory
Set 788691 page(s) to 1-1 mapping
Populating bcf90e-c901e1 pfn range: 788691 pages added
e820: BIOS-provided physical RAM map:
Xen: [mem 0x0000000000000000-0x000000000009cfff] usable
Xen: [mem 0x000000000009d400-0x00000000000fffff] reserved
Xen: [mem 0x0000000000100000-0x000000003f78ffff] usable
Xen: [mem 0x000000003f790000-0x000000003f79dfff] ACPI data
Xen: [mem 0x000000003f79e000-0x000000003f7cffff] ACPI NVS
Xen: [mem 0x000000003f7d0000-0x000000003f7dffff] reserved
Xen: [mem 0x000000003f7e7000-0x000000003fffffff] reserved
Xen: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
Xen: [mem 0x00000000ffc00000-0x00000000ffffffff] reserved
Xen: [mem 0x0000000100000000-0x0000000cbfffffff] usable
NX (Execute Disable) protection: active
SMBIOS 2.6 present.
DMI: To Be Filled By O.E.M. To Be Filled By O.E.M./EVGA Classified SR-2, BIOS 080016 04/24/2013
e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
e820: remove [mem 0x000a0000-0x000fffff] usable
No AGP bridge found
e820: last_pfn = 0xcc0000 max_arch_pfn = 0x400000000
e820: last_pfn = 0x3f790 max_arch_pfn = 0x400000000
Base memory trampoline at [ffff880000096000] 96000 size 28672
init_memory_mapping: [mem 0x00000000-0x000fffff]
[mem 0x00000000-0x000fffff] page 4k
init_memory_mapping: [mem 0xc8fe00000-0xc8fffffff]
[mem 0xc8fe00000-0xc8fffffff] page 4k
BRK [0x01bc0000, 0x01bc0fff] PGTABLE
BRK [0x01bc1000, 0x01bc1fff] PGTABLE
init_memory_mapping: [mem 0xc8c000000-0xc8fdfffff]
[mem 0xc8c000000-0xc8fdfffff] page 4k
BRK [0x01bc2000, 0x01bc2fff] PGTABLE
BRK [0x01bc3000, 0x01bc3fff] PGTABLE
BRK [0x01bc4000, 0x01bc4fff] PGTABLE
init_memory_mapping: [mem 0xc80000000-0xc8bffffff]
[mem 0xc80000000-0xc8bffffff] page 4k
init_memory_mapping: [mem 0x00100000-0x3f78ffff]
[mem 0x00100000-0x3f78ffff] page 4k
init_memory_mapping: [mem 0x100000000-0xc7fffffff]
[mem 0x100000000-0xc7fffffff] page 4k
init_memory_mapping: [mem 0xc90000000-0xcbfffffff]
[mem 0xc90000000-0xcbfffffff] page 4k
RAMDISK: [mem 0x01f70000-0x061acfff]
ACPI: RSDP 00000000000f9f70 00024 (v02 ACPIAM)
ACPI: XSDT 000000003f790100 00064 (v01 042413 XSDT1438 20130424 MSFT 00000097)
ACPI: FACP 000000003f790290 000F4 (v04 042413 FACP1438 20130424 MSFT 00000097)
ACPI: DSDT 000000003f7904f0 058A3 (v02 1W555 1W555A58 00000A58 INTL 20051117)
ACPI: FACS 000000003f79e000 00040
ACPI: APIC 000000003f790390 00118 (v02 042413 APIC1438 20130424 MSFT 00000097)
ACPI: MCFG 000000003f7904b0 0003C (v01 042413 OEMMCFG 20130424 MSFT 00000097)
ACPI: OEMB 000000003f79e040 00082 (v01 042413 OEMB1438 20130424 MSFT 00000097)
ACPI: SRAT 000000003f79a4f0 00250 (v02 042413 OEMSRAT 00000001 INTL 00000001)
ACPI: HPET 000000003f79a740 00038 (v01 042413 OEMHPET 20130424 MSFT 00000097)
ACPI: XMAR 000000003f79e0d0 00120 (v01 AMI OEMDMAR 00000001 MSFT 00000097)
ACPI: SSDT 000000003f7a4c70 00363 (v01 DpgPmm CpuPm 00000012 INTL 20051117)
ACPI: Local APIC address 0xfee00000
NUMA turned off
Faking a node at [mem 0x0000000000000000-0x0000000cbfffffff]
Initmem setup node 0 [mem 0x00000000-0xcbfffffff]
NODE_DATA [mem 0xc901ba000-0xc901e0fff]
Zone ranges:
DMA [mem 0x00001000-0x00ffffff]
DMA32 [mem 0x01000000-0xffffffff]
Normal [mem 0x100000000-0xcbfffffff]
Movable zone start for each node
Early memory node ranges
node 0: [mem 0x00001000-0x0009cfff]
node 0: [mem 0x00100000-0x3f78ffff]
node 0: [mem 0x100000000-0xcbfffffff]
On node 0 totalpages: 12580652
DMA zone: 56 pages used for memmap
DMA zone: 22 pages reserved
DMA zone: 3996 pages, LIFO batch:0
DMA32 zone: 3499 pages used for memmap
DMA32 zone: 255888 pages, LIFO batch:31
Normal zone: 168448 pages used for memmap
Normal zone: 12320768 pages, LIFO batch:31
ACPI: PM-Timer IO Port: 0x808
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)
ACPI: LAPIC (acpi_id[0x04] lapic_id[0x10] enabled)
ACPI: LAPIC (acpi_id[0x05] lapic_id[0x12] enabled)
ACPI: LAPIC (acpi_id[0x06] lapic_id[0x14] enabled)
ACPI: LAPIC (acpi_id[0x07] lapic_id[0x20] enabled)
ACPI: LAPIC (acpi_id[0x08] lapic_id[0x22] enabled)
ACPI: LAPIC (acpi_id[0x09] lapic_id[0x24] enabled)
ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x30] enabled)
ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x32] enabled)
ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x34] enabled)
ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x01] enabled)
ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x03] enabled)
ACPI: LAPIC (acpi_id[0x0f] lapic_id[0x05] enabled)
ACPI: LAPIC (acpi_id[0x10] lapic_id[0x11] enabled)
ACPI: LAPIC (acpi_id[0x11] lapic_id[0x13] enabled)
ACPI: LAPIC (acpi_id[0x12] lapic_id[0x15] enabled)
ACPI: LAPIC (acpi_id[0x13] lapic_id[0x21] enabled)
ACPI: LAPIC (acpi_id[0x14] lapic_id[0x23] enabled)
ACPI: LAPIC (acpi_id[0x15] lapic_id[0x25] enabled)
ACPI: LAPIC (acpi_id[0x16] lapic_id[0x31] enabled)
ACPI: LAPIC (acpi_id[0x17] lapic_id[0x33] enabled)
ACPI: LAPIC (acpi_id[0x18] lapic_id[0x35] enabled)
ACPI: IOAPIC (id[0x06] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 6, version 32, address 0xfec00000, GSI 0-23
ACPI: IOAPIC (id[0x07] address[0xfec8a000] gsi_base[24])
IOAPIC[1]: apic_id 7, version 32, address 0xfec8a000, GSI 24-47
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ9 used by override.
Using ACPI (MADT) for SMP configuration information
ACPI: HPET id: 0xffffffff base: 0xfed00000
smpboot: Allowing 24 CPUs, 0 hotplug CPUs
nr_irqs_gsi: 64
PM: Registered nosave memory: 000000000009d000 - 000000000009e000
PM: Registered nosave memory: 000000000009e000 - 0000000000100000
PM: Registered nosave memory: 000000003f790000 - 000000003f79e000
PM: Registered nosave memory: 000000003f79e000 - 000000003f7d0000
PM: Registered nosave memory: 000000003f7d0000 - 000000003f7e0000
PM: Registered nosave memory: 000000003f7e0000 - 000000003f7e7000
PM: Registered nosave memory: 000000003f7e7000 - 0000000040000000
PM: Registered nosave memory: 0000000040000000 - 00000000fee00000
PM: Registered nosave memory: 00000000fee00000 - 00000000fee01000
PM: Registered nosave memory: 00000000fee01000 - 00000000ffc00000
PM: Registered nosave memory: 00000000ffc00000 - 0000000100000000
e820: [mem 0x40000000-0xfedfffff] available for PCI devices
Booting paravirtualized kernel on Xen
Xen version: 4.3.0 (preserve-AD)
setup_percpu: NR_CPUS:32 nr_cpumask_bits:32 nr_cpu_ids:24 nr_node_ids:1
PERCPU: Embedded 28 pages/cpu @ffff880c83c00000 s84032 r8192 d22464 u131072
pcpu-alloc: s84032 r8192 d22464 u131072 alloc=1*2097152
pcpu-alloc: [0] 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
pcpu-alloc: [0] 16 17 18 19 20 21 22 23 -- -- -- -- -- -- -- --
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 12408627
Policy zone: Normal
Kernel command line: ro root=UUID=ea61c60b-8e91-4cc3-ab17-f6b5097f1e87 rd_MD_UUID=26fb9899:f3adb40f:b22e37a7:5f2db70a rd_MD_UUID=fbf20e02:97089c2c:1d0e1847:9e192fe8 rd_NO_LUKS rd_NO_LVM rd_NO_DM LANG=en_US.UTF-8 SYSFONT=latarcyrheb-sun16 KEYBOARDTYPE=pc KEYTABLE=uk selinux=0 elevator=deadline intel_iommu=on elevator=deadline iomem=relaxed video=DVI-I-1:edid/1920x2400 video=DVI-I-2:1920x2400 video=DIN-1:d
Intel-IOMMU: enabled
PID hash table entries: 4096 (order: 3, 32768 bytes)
__ex_table already sorted, skipping sort
software IO TLB [mem 0xc55800000-0xc59800000] (64MB) mapped at [ffff880c55800000-ffff880c597fffff]
Memory: 48504264k/53477376k available (5525k kernel code, 3154768k absent, 1818344k reserved, 2610k data, 1732k init)
Hierarchical RCU implementation.
RCU restricting CPUs from NR_CPUS=32 to nr_cpu_ids=24.
NR_IRQS:4352 nr_irqs:1280 16
xen: sci override: global_irq=20 trigger=0 polarity=1
xen: registering gsi 20 triggering 0 polarity 1
xen: --> pirq=20 -> irq=9 (gsi=9)
xen: acpi sci 9
xen: --> pirq=1 -> irq=1 (gsi=1)
xen: --> pirq=2 -> irq=2 (gsi=2)
xen: --> pirq=3 -> irq=3 (gsi=3)
xen: --> pirq=4 -> irq=4 (gsi=4)
xen: --> pirq=5 -> irq=5 (gsi=5)
xen: --> pirq=6 -> irq=6 (gsi=6)
xen: --> pirq=7 -> irq=7 (gsi=7)
xen: --> pirq=8 -> irq=8 (gsi=8)
xen: --> pirq=10 -> irq=10 (gsi=10)
xen: --> pirq=11 -> irq=11 (gsi=11)
xen: --> pirq=12 -> irq=12 (gsi=12)
xen: --> pirq=13 -> irq=13 (gsi=13)
xen: --> pirq=14 -> irq=14 (gsi=14)
xen: --> pirq=15 -> irq=15 (gsi=15)
Console: colour VGA+ 80x25
console [tty0] enabled
Xen: using vcpuop timer interface
installing Xen timer for CPU 0
tsc: Detected 3321.722 MHz processor
Calibrating delay loop (skipped), value calculated using timer frequency.. 6643.44 BogoMIPS (lpj=3321722)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux: Disabled at boot.
Dentry cache hash table entries: 8388608 (order: 14, 67108864 bytes)
Inode-cache hash table entries: 4194304 (order: 13, 33554432 bytes)
Mount-cache hash table entries: 256
Initializing cgroup subsys cpuacct
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
Initializing cgroup subsys net_cls
Initializing cgroup subsys blkio
Initializing cgroup subsys perf_event
Initializing cgroup subsys net_prio
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
mce: CPU supports 2 MCE banks
Last level iTLB entries: 4KB 512, 2MB 7, 4MB 7
Last level dTLB entries: 4KB 512, 2MB 32, 4MB 32
tlb_flushall_shift: 6
Freeing SMP alternatives: 20k freed
ACPI: Core revision 20130117
ACPI: All ACPI Tables successfully acquired
ftrace: allocating 21258 entries in 84 pages
Performance Events: unsupported p6 CPU model 44 no PMU driver, software events only.
installing Xen timer for CPU 1
installing Xen timer for CPU 2
installing Xen timer for CPU 3
installing Xen timer for CPU 4
installing Xen timer for CPU 5
installing Xen timer for CPU 6
installing Xen timer for CPU 7
installing Xen timer for CPU 8
installing Xen timer for CPU 9
installing Xen timer for CPU 10
installing Xen timer for CPU 11
installing Xen timer for CPU 12
installing Xen timer for CPU 13
installing Xen timer for CPU 14
installing Xen timer for CPU 15
installing Xen timer for CPU 16
installing Xen timer for CPU 17
installing Xen timer for CPU 18
installing Xen timer for CPU 19
installing Xen timer for CPU 20
installing Xen timer for CPU 21
installing Xen timer for CPU 22
installing Xen timer for CPU 23
Brought up 24 CPUs
devtmpfs: initialized
PM: Registering ACPI NVS region [mem 0x3f79e000-0x3f7cffff] (204800 bytes)
Grant tables using version 2 layout.
Grant table initialized
regulator-dummy: no parameters
NET: Registered protocol family 16
ACPI: bus type PCI registered
PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
PCI: not using MMCONFIG
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: Added _OSI(Module Device)
ACPI: Added _OSI(Processor Device)
ACPI: Added _OSI(3.0 _SCP Extensions)
ACPI: Added _OSI(Processor Aggregator Device)
ACPI: EC: Look up EC in DSDT
ACPI: Executed 1 blocks of module-level executable AML code
ACPI: SSDT 000000003f79e1f0 053DC (v01 DpgPmm P001Ist 00000011 INTL 20051117)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT (null) 053DC (v01 DpgPmm P001Ist 00000011 INTL 20051117)
ACPI: SSDT 000000003f7a35d0 00C88 (v01 PmRef P001Cst 00003001 INTL 20051117)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT (null) 00C88 (v01 PmRef P001Cst 00003001 INTL 20051117)
ACPI: SSDT 000000003f7a4260 00A0A (v01 PmRef Cpu0Tst 00003000 INTL 20051117)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT (null) 00A0A (v01 PmRef Cpu0Tst 00003000 INTL 20051117)
ACPI: Interpreter enabled
ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20130117/hwxface-568)
ACPI: (supports S0 S1 S3 S4 S5)
ACPI: Using IOAPIC for interrupt routing
PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in ACPI motherboard resources
PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [bus 00-ff]
pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7]
pci_bus 0000:00: root bus resource [io 0x0d00-0xffff]
pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000dffff]
pci_bus 0000:00: root bus resource [mem 0x40000000-0xdfffffff]
pci_bus 0000:00: root bus resource [mem 0xf0000000-0xfed8ffff]
pci 0000:00:00.0: [8086:3406] type 00 class 0x060000
pci 0000:00:00.0: PME# supported from D0 D3hot D3cold
pci 0000:00:02.0: [8086:3409] type 01 class 0x060400
pci 0000:00:02.0: PME# supported from D0 D3hot D3cold
pci 0000:00:02.0: System wakeup disabled by ACPI
pci 0000:00:03.0: [8086:340a] type 01 class 0x060400
pci 0000:00:03.0: PME# supported from D0 D3hot D3cold
pci 0000:00:03.0: System wakeup disabled by ACPI
pci 0000:00:07.0: [8086:340e] type 01 class 0x060400
pci 0000:00:07.0: PME# supported from D0 D3hot D3cold
pci 0000:00:07.0: System wakeup disabled by ACPI
pci 0000:00:13.0: [8086:342d] type 00 class 0x080020
pci 0000:00:13.0: reg 10: [mem 0xfec8a000-0xfec8afff]
pci 0000:00:13.0: PME# supported from D0 D3hot D3cold
pci 0000:00:14.0: [8086:342e] type 00 class 0x080000
pci 0000:00:14.1: [8086:3422] type 00 class 0x080000
pci 0000:00:14.2: [8086:3423] type 00 class 0x080000
pci 0000:00:14.3: [8086:3438] type 00 class 0x080000
pci 0000:00:1a.0: [8086:3a37] type 00 class 0x0c0300
pci 0000:00:1a.0: reg 20: [io 0x9980-0x999f]
pci 0000:00:1a.0: System wakeup disabled by ACPI
pci 0000:00:1a.1: [8086:3a38] type 00 class 0x0c0300
pci 0000:00:1a.1: reg 20: [io 0x9a00-0x9a1f]
pci 0000:00:1a.1: System wakeup disabled by ACPI
pci 0000:00:1a.2: [8086:3a39] type 00 class 0x0c0300
pci 0000:00:1a.2: reg 20: [io 0x9a80-0x9a9f]
pci 0000:00:1a.2: System wakeup disabled by ACPI
pci 0000:00:1a.7: [8086:3a3c] type 00 class 0x0c0320
pci 0000:00:1a.7: reg 10: [mem 0xf3df8000-0xf3df83ff]
pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1a.7: System wakeup disabled by ACPI
pci 0000:00:1b.0: [8086:3a3e] type 00 class 0x040300
pci 0000:00:1b.0: reg 10: [mem 0xf3df4000-0xf3df7fff 64bit]
pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.0: [8086:3a40] type 01 class 0x060400
pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.0: System wakeup disabled by ACPI
pci 0000:00:1c.2: [8086:3a44] type 01 class 0x060400
pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.2: System wakeup disabled by ACPI
pci 0000:00:1c.4: [8086:3a48] type 01 class 0x060400
pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.4: System wakeup disabled by ACPI
pci 0000:00:1d.0: [8086:3a34] type 00 class 0x0c0300
pci 0000:00:1d.0: reg 20: [io 0x9b00-0x9b1f]
pci 0000:00:1d.0: System wakeup disabled by ACPI
pci 0000:00:1d.1: [8086:3a35] type 00 class 0x0c0300
pci 0000:00:1d.1: reg 20: [io 0x9b80-0x9b9f]
pci 0000:00:1d.1: System wakeup disabled by ACPI
pci 0000:00:1d.2: [8086:3a36] type 00 class 0x0c0300
pci 0000:00:1d.2: reg 20: [io 0x9c00-0x9c1f]
pci 0000:00:1d.2: System wakeup disabled by ACPI
pci 0000:00:1d.7: [8086:3a3a] type 00 class 0x0c0320
pci 0000:00:1d.7: reg 10: [mem 0xf3dfa000-0xf3dfa3ff]
pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1d.7: System wakeup disabled by ACPI
pci 0000:00:1e.0: [8086:244e] type 01 class 0x060401
pci 0000:00:1e.0: System wakeup disabled by ACPI
pci 0000:00:1f.0: [8086:3a16] type 00 class 0x060100
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 0a00 (mask 00ff)
pci 0000:00:1f.2: [8086:3a22] type 00 class 0x010601
pci 0000:00:1f.2: reg 10: [io 0x9d00-0x9d07]
pci 0000:00:1f.2: reg 14: [io 0x9f00-0x9f03]
pci 0000:00:1f.2: reg 18: [io 0x9e80-0x9e87]
pci 0000:00:1f.2: reg 1c: [io 0x9e00-0x9e03]
pci 0000:00:1f.2: reg 20: [io 0x9d80-0x9d9f]
pci 0000:00:1f.2: reg 24: [mem 0xf3dfc000-0xf3dfc7ff]
pci 0000:00:1f.2: PME# supported from D3hot
pci 0000:00:1f.3: [8086:3a30] type 00 class 0x0c0500
pci 0000:00:1f.3: reg 10: [mem 0xf3dfe000-0xf3dfe0ff 64bit]
pci 0000:00:1f.3: reg 20: [io 0x0400-0x041f]
pci 0000:0f:00.0: [1033:0194] type 00 class 0x0c0330
pci 0000:0f:00.0: reg 10: [mem 0xfbefe000-0xfbefffff 64bit]
pci 0000:0f:00.0: PME# supported from D0 D3hot
pci 0000:00:02.0: PCI bridge to [bus 0f]
pci 0000:00:02.0: bridge window [mem 0xfbe00000-0xfbefffff]
pci 0000:09:00.0: [10de:05b1] type 01 class 0x060400
pci 0000:09:00.0: PME# supported from D0 D3hot D3cold
pci 0000:00:03.0: PCI bridge to [bus 09-0e]
pci 0000:00:03.0: bridge window [io 0xe000-0xefff]
pci 0000:00:03.0: bridge window [mem 0xd7e00000-0xdfffffff]
pci 0000:00:03.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0a:00.0: [10de:05b1] type 01 class 0x060400
pci 0000:0a:00.0: PME# supported from D0 D3hot D3cold
pci 0000:0a:01.0: [10de:05b1] type 01 class 0x060400
pci 0000:0a:01.0: PME# supported from D0 D3hot D3cold
pci 0000:0a:02.0: [10de:05b1] type 01 class 0x060400
pci 0000:0a:02.0: PME# supported from D0 D3hot D3cold
pci 0000:09:00.0: PCI bridge to [bus 0a-0e]
pci 0000:09:00.0: bridge window [io 0xe000-0xefff]
pci 0000:09:00.0: bridge window [mem 0xd7e00000-0xdfffffff]
pci 0000:09:00.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0e:00.0: [1002:9442] type 00 class 0x030000
pci 0000:0e:00.0: reg 10: [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0e:00.0: reg 18: [mem 0xd8000000-0xd800ffff 64bit]
pci 0000:0e:00.0: reg 20: [io 0xe000-0xe0ff]
pci 0000:0e:00.0: reg 30: [mem 0xd7fe0000-0xd7ffffff pref]
pci 0000:0e:00.0: supports D1 D2
pci 0000:0e:00.1: [1002:aa30] type 00 class 0x040300
pci 0000:0e:00.1: reg 10: [mem 0xdc000000-0xdc003fff 64bit]
pci 0000:0e:00.1: supports D1 D2
pci 0000:0a:00.0: PCI bridge to [bus 0e]
pci 0000:0a:00.0: bridge window [io 0xe000-0xefff]
pci 0000:0a:00.0: bridge window [mem 0xd7f00000-0xdfffffff]
pci 0000:0a:00.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0c:00.0: [1102:7006] type 01 class 0x060400
pci 0000:0c:00.0: supports D1 D2
pci 0000:0c:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
pci 0000:0a:01.0: PCI bridge to [bus 0c-0d]
pci 0000:0a:01.0: bridge window [mem 0xd7e00000-0xd7efffff]
pci 0000:0d:00.0: [1102:0009] type 00 class 0x040300
pci 0000:0d:00.0: reg 10: [mem 0xd7efc000-0xd7efffff]
pci 0000:0d:00.0: supports D1 D2
pci 0000:0c:00.0: PCI bridge to [bus 0d]
pci 0000:0c:00.0: bridge window [mem 0xd7e00000-0xd7efffff]
pci 0000:0a:02.0: PCI bridge to [bus 0b]
pci 0000:05:00.0: [10de:05b1] type 01 class 0x060400
pci 0000:05:00.0: PME# supported from D0 D3hot D3cold
pci 0000:00:07.0: PCI bridge to [bus 05-08]
pci 0000:00:07.0: bridge window [io 0xc000-0xdfff]
pci 0000:00:07.0: bridge window [mem 0xf4000000-0xfbdfffff]
pci 0000:00:07.0: bridge window [mem 0xa8000000-0xbfffffff 64bit pref]
pci 0000:06:00.0: [10de:05b1] type 01 class 0x060400
pci 0000:06:00.0: PME# supported from D0 D3hot D3cold
pci 0000:06:02.0: [10de:05b1] type 01 class 0x060400
pci 0000:06:02.0: PME# supported from D0 D3hot D3cold
pci 0000:05:00.0: PCI bridge to [bus 06-08]
pci 0000:05:00.0: bridge window [io 0xc000-0xdfff]
pci 0000:05:00.0: bridge window [mem 0xf4000000-0xfbdfffff]
pci 0000:05:00.0: bridge window [mem 0xa8000000-0xbfffffff 64bit pref]
pci 0000:08:00.0: [10de:06d8] type 00 class 0x030000
pci 0000:08:00.0: reg 10: [mem 0xf8000000-0xf9ffffff]
pci 0000:08:00.0: reg 14: [mem 0xb8000000-0xbfffffff 64bit pref]
pci 0000:08:00.0: reg 1c: [mem 0xb4000000-0xb7ffffff 64bit pref]
pci 0000:08:00.0: reg 24: [io 0xdf80-0xdfff]
pci 0000:08:00.0: reg 30: [mem 0xfbd00000-0xfbd7ffff pref]
pci 0000:08:00.1: [10de:0be5] type 00 class 0x040300
pci 0000:08:00.1: reg 10: [mem 0xfbdfc000-0xfbdfffff]
pci 0000:06:00.0: PCI bridge to [bus 08]
pci 0000:06:00.0: bridge window [io 0xd000-0xdfff]
pci 0000:06:00.0: bridge window [mem 0xf8000000-0xfbdfffff]
pci 0000:06:00.0: bridge window [mem 0xb4000000-0xbfffffff 64bit pref]
pci 0000:07:00.0: [10de:06d9] type 00 class 0x030000
pci 0000:07:00.0: reg 10: [mem 0xf4000000-0xf5ffffff]
pci 0000:07:00.0: reg 14: [mem 0xa8000000-0xafffffff 64bit pref]
pci 0000:07:00.0: reg 1c: [mem 0xb0000000-0xb3ffffff 64bit pref]
pci 0000:07:00.0: reg 24: [io 0xcf80-0xcfff]
pci 0000:07:00.0: reg 30: [mem 0xf7f00000-0xf7f7ffff pref]
pci 0000:07:00.1: [10de:0be5] type 00 class 0x040300
pci 0000:07:00.1: reg 10: [mem 0xf7ffc000-0xf7ffffff]
pci 0000:06:02.0: PCI bridge to [bus 07]
pci 0000:06:02.0: bridge window [io 0xc000-0xcfff]
pci 0000:06:02.0: bridge window [mem 0xf4000000-0xf7ffffff]
pci 0000:06:02.0: bridge window [mem 0xa8000000-0xb3ffffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04]
pci 0000:03:00.0: [11ab:4380] type 00 class 0x020000
pci 0000:03:00.0: reg 10: [mem 0xf3fdc000-0xf3fdffff 64bit]
pci 0000:03:00.0: reg 18: [io 0xbf00-0xbfff]
pci 0000:03:00.0: reg 30: [mem 0xf3fe0000-0xf3ffffff pref]
pci 0000:03:00.0: supports D1 D2
pci 0000:03:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:1c.2: PCI bridge to [bus 03]
pci 0000:00:1c.2: bridge window [io 0xb000-0xbfff]
pci 0000:00:1c.2: bridge window [mem 0xf3f00000-0xf3ffffff]
pci 0000:02:00.0: [11ab:4380] type 00 class 0x020000
pci 0000:02:00.0: reg 10: [mem 0xf3edc000-0xf3edffff 64bit]
pci 0000:02:00.0: reg 18: [io 0xaf00-0xafff]
pci 0000:02:00.0: reg 30: [mem 0xf3ee0000-0xf3efffff pref]
pci 0000:02:00.0: supports D1 D2
pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:1c.4: PCI bridge to [bus 02]
pci 0000:00:1c.4: bridge window [io 0xa000-0xafff]
pci 0000:00:1c.4: bridge window [mem 0xf3e00000-0xf3efffff]
pci 0000:00:1e.0: PCI bridge to [bus 01] (subtractive decode)
pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode)
pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x000d0000-0x000dffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x40000000-0xdfffffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0xf0000000-0xfed8ffff] (subtractive decode)
acpi PNP0A08:00: Requesting ACPI _OSC control (0x1d)
acpi PNP0A08:00: ACPI _OSC control (0x1d) granted
ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 6 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKB] (IRQs *5)
ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 6 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 6 7 10 11 12 14 *15)
ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 6 *7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKG] (IRQs *3 4 6 7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 6 7 10 11 12 *14 15)
ACPI: Enabled 1 GPEs in block 00 to 3F
acpi root: \_SB_.PCI0 notify handler is installed
Found 1 acpi root devices
ACPI: No dock devices found.
xen/balloon: Initialising balloon driver.
xen-balloon: Initialising balloon driver.
xen/balloon: Xen selfballooning driver disabled for domain0.
vgaarb: device added: PCI:0000:0e:00.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: device added: PCI:0000:08:00.0,decodes=io+mem,owns=none,locks=none
vgaarb: device added: PCI:0000:07:00.0,decodes=io+mem,owns=none,locks=none
vgaarb: loaded
vgaarb: bridge control possible 0000:07:00.0
vgaarb: bridge control possible 0000:08:00.0
vgaarb: bridge control possible 0000:0e:00.0
SCSI subsystem initialized
ACPI: bus type ATA registered
libata version 3.00 loaded.
ACPI: bus type USB registered
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
PCI: Discovered peer bus fe
PCI: root bus fe: using default resources
PCI: Probing PCI hardware (bus fe)
PCI host bridge to bus 0000:fe
pci_bus 0000:fe: root bus resource [io 0x0000-0xffff]
pci_bus 0000:fe: root bus resource [mem 0x00000000-0xffffffffff]
pci_bus 0000:fe: No busn resource found for root bus, will use [bus fe-ff]
pci 0000:fe:00.0: [8086:2c70] type 00 class 0x060000
pci 0000:fe:00.1: [8086:2d81] type 00 class 0x060000
pci 0000:fe:02.0: [8086:2d90] type 00 class 0x060000
pci 0000:fe:02.1: [8086:2d91] type 00 class 0x060000
pci 0000:fe:02.2: [8086:2d92] type 00 class 0x060000
pci 0000:fe:02.3: [8086:2d93] type 00 class 0x060000
pci 0000:fe:02.4: [8086:2d94] type 00 class 0x060000
pci 0000:fe:02.5: [8086:2d95] type 00 class 0x060000
pci 0000:fe:03.0: [8086:2d98] type 00 class 0x060000
pci 0000:fe:03.1: [8086:2d99] type 00 class 0x060000
pci 0000:fe:03.2: [8086:2d9a] type 00 class 0x060000
pci 0000:fe:03.4: [8086:2d9c] type 00 class 0x060000
pci 0000:fe:04.0: [8086:2da0] type 00 class 0x060000
pci 0000:fe:04.1: [8086:2da1] type 00 class 0x060000
pci 0000:fe:04.2: [8086:2da2] type 00 class 0x060000
pci 0000:fe:04.3: [8086:2da3] type 00 class 0x060000
pci 0000:fe:05.0: [8086:2da8] type 00 class 0x060000
pci 0000:fe:05.1: [8086:2da9] type 00 class 0x060000
pci 0000:fe:05.2: [8086:2daa] type 00 class 0x060000
pci 0000:fe:05.3: [8086:2dab] type 00 class 0x060000
pci 0000:fe:06.0: [8086:2db0] type 00 class 0x060000
pci 0000:fe:06.1: [8086:2db1] type 00 class 0x060000
pci 0000:fe:06.2: [8086:2db2] type 00 class 0x060000
pci 0000:fe:06.3: [8086:2db3] type 00 class 0x060000
pci_bus 0000:fe: busn_res: [bus fe-ff] end is updated to fe
PCI: Discovered peer bus ff
PCI: root bus ff: using default resources
PCI: Probing PCI hardware (bus ff)
PCI host bridge to bus 0000:ff
pci_bus 0000:ff: root bus resource [io 0x0000-0xffff]
pci_bus 0000:ff: root bus resource [mem 0x00000000-0xffffffffff]
pci_bus 0000:ff: No busn resource found for root bus, will use [bus ff-ff]
pci 0000:ff:00.0: [8086:2c70] type 00 class 0x060000
pci 0000:ff:00.1: [8086:2d81] type 00 class 0x060000
pci 0000:ff:02.0: [8086:2d90] type 00 class 0x060000
pci 0000:ff:02.1: [8086:2d91] type 00 class 0x060000
pci 0000:ff:02.2: [8086:2d92] type 00 class 0x060000
pci 0000:ff:02.3: [8086:2d93] type 00 class 0x060000
pci 0000:ff:02.4: [8086:2d94] type 00 class 0x060000
pci 0000:ff:02.5: [8086:2d95] type 00 class 0x060000
pci 0000:ff:03.0: [8086:2d98] type 00 class 0x060000
pci 0000:ff:03.1: [8086:2d99] type 00 class 0x060000
pci 0000:ff:03.2: [8086:2d9a] type 00 class 0x060000
pci 0000:ff:03.4: [8086:2d9c] type 00 class 0x060000
pci 0000:ff:04.0: [8086:2da0] type 00 class 0x060000
pci 0000:ff:04.1: [8086:2da1] type 00 class 0x060000
pci 0000:ff:04.2: [8086:2da2] type 00 class 0x060000
pci 0000:ff:04.3: [8086:2da3] type 00 class 0x060000
pci 0000:ff:05.0: [8086:2da8] type 00 class 0x060000
pci 0000:ff:05.1: [8086:2da9] type 00 class 0x060000
pci 0000:ff:05.2: [8086:2daa] type 00 class 0x060000
pci 0000:ff:05.3: [8086:2dab] type 00 class 0x060000
pci 0000:ff:06.0: [8086:2db0] type 00 class 0x060000
pci 0000:ff:06.1: [8086:2db1] type 00 class 0x060000
pci 0000:ff:06.2: [8086:2db2] type 00 class 0x060000
pci 0000:ff:06.3: [8086:2db3] type 00 class 0x060000
pci_bus 0000:ff: busn_res: [bus ff] end is updated to ff
PCI: pci_cache_line_size set to 64 bytes
e820: reserve RAM buffer [mem 0x0009d000-0x0009ffff]
e820: reserve RAM buffer [mem 0x3f790000-0x3fffffff]
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
Switching to clocksource xen
pnp: PnP ACPI init
ACPI: bus type PNP registered
system 00:00: [mem 0xfbf00000-0xfbffffff] has been reserved
system 00:00: [mem 0xfc000000-0xfcffffff] has been reserved
system 00:00: [mem 0xfd000000-0xfdffffff] has been reserved
system 00:00: [mem 0xfe000000-0xfebfffff] has been reserved
system 00:00: [mem 0xfec8a000-0xfec8afff] could not be reserved
system 00:00: [mem 0xfed10000-0xfed10fff] has been reserved
system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
pnp 00:01: [dma 4]
pnp 00:01: Plug and Play ACPI device, IDs PNP0200 (active)
xen: registering gsi 8 triggering 1 polarity 0
pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active)
pnp 00:03: Plug and Play ACPI device, IDs PNP0800 (active)
xen: registering gsi 13 triggering 1 polarity 0
pnp 00:04: Plug and Play ACPI device, IDs PNP0c04 (active)
system 00:05: [io 0x0a00-0x0adf] has been reserved
system 00:05: [io 0x0ae0-0x0aef] has been reserved
system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active)
system 00:06: [io 0x04d0-0x04d1] has been reserved
system 00:06: [io 0x0800-0x087f] has been reserved
system 00:06: [io 0x0500-0x057f] has been reserved
system 00:06: [mem 0xfed1c000-0xfed1ffff] has been reserved
system 00:06: [mem 0xfed20000-0xfed3ffff] has been reserved
system 00:06: [mem 0xfed40000-0xfed8ffff] has been reserved
system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:07: Plug and Play ACPI device, IDs PNP0103 (active)
system 00:08: [mem 0xfec00000-0xfec00fff] could not be reserved
system 00:08: [mem 0xfee00000-0xfee00fff] has been reserved
system 00:08: Plug and Play ACPI device, IDs PNP0c02 (active)
system 00:09: [mem 0xe0000000-0xefffffff] has been reserved
system 00:09: Plug and Play ACPI device, IDs PNP0c02 (active)
system 00:0a: [mem 0x00000000-0x0009ffff] could not be reserved
system 00:0a: [mem 0x000c0000-0x000cffff] could not be reserved
system 00:0a: [mem 0x000e0000-0x000fffff] could not be reserved
system 00:0a: [mem 0x00100000-0x3fffffff] could not be reserved
system 00:0a: [mem 0xfed90000-0xffffffff] could not be reserved
system 00:0a: Plug and Play ACPI device, IDs PNP0c01 (active)
pnp: PnP ACPI: found 11 devices
ACPI: bus type PNP unregistered
PM-Timer failed consistency check (0x0xffffff) - aborting.
pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 04] add_size 1000
pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 04] add_size 200000
pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 04] add_size 200000
pci 0000:00:1c.2: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03] add_size 200000
pci 0000:00:1c.4: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 02] add_size 200000
pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x000fffff] get_res_add_size add_size 200000
pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
pci 0000:00:1c.2: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
pci 0000:00:1c.4: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
pci 0000:00:1c.0: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000
pci 0000:00:1c.0: BAR 14: assigned [mem 0x40000000-0x401fffff]
pci 0000:00:1c.0: BAR 15: assigned [mem 0x40200000-0x403fffff 64bit pref]
pci 0000:00:1c.2: BAR 15: assigned [mem 0x40400000-0x405fffff 64bit pref]
pci 0000:00:1c.4: BAR 15: assigned [mem 0x40600000-0x407fffff 64bit pref]
pci 0000:00:1c.0: BAR 13: assigned [io 0x1000-0x1fff]
pci 0000:00:02.0: PCI bridge to [bus 0f]
pci 0000:00:02.0: bridge window [mem 0xfbe00000-0xfbefffff]
pci 0000:0a:00.0: PCI bridge to [bus 0e]
pci 0000:0a:00.0: bridge window [io 0xe000-0xefff]
pci 0000:0a:00.0: bridge window [mem 0xd7f00000-0xdfffffff]
pci 0000:0a:00.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0c:00.0: PCI bridge to [bus 0d]
pci 0000:0c:00.0: bridge window [mem 0xd7e00000-0xd7efffff]
pci 0000:0a:01.0: PCI bridge to [bus 0c-0d]
pci 0000:0a:01.0: bridge window [mem 0xd7e00000-0xd7efffff]
pci 0000:0a:02.0: PCI bridge to [bus 0b]
pci 0000:09:00.0: PCI bridge to [bus 0a-0e]
pci 0000:09:00.0: bridge window [io 0xe000-0xefff]
pci 0000:09:00.0: bridge window [mem 0xd7e00000-0xdfffffff]
pci 0000:09:00.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:00:03.0: PCI bridge to [bus 09-0e]
pci 0000:00:03.0: bridge window [io 0xe000-0xefff]
pci 0000:00:03.0: bridge window [mem 0xd7e00000-0xdfffffff]
pci 0000:00:03.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:06:00.0: PCI bridge to [bus 08]
pci 0000:06:00.0: bridge window [io 0xd000-0xdfff]
pci 0000:06:00.0: bridge window [mem 0xf8000000-0xfbdfffff]
pci 0000:06:00.0: bridge window [mem 0xb4000000-0xbfffffff 64bit pref]
pci 0000:06:02.0: PCI bridge to [bus 07]
pci 0000:06:02.0: bridge window [io 0xc000-0xcfff]
pci 0000:06:02.0: bridge window [mem 0xf4000000-0xf7ffffff]
pci 0000:06:02.0: bridge window [mem 0xa8000000-0xb3ffffff 64bit pref]
pci 0000:05:00.0: PCI bridge to [bus 06-08]
pci 0000:05:00.0: bridge window [io 0xc000-0xdfff]
pci 0000:05:00.0: bridge window [mem 0xf4000000-0xfbdfffff]
pci 0000:05:00.0: bridge window [mem 0xa8000000-0xbfffffff 64bit pref]
pci 0000:00:07.0: PCI bridge to [bus 05-08]
pci 0000:00:07.0: bridge window [io 0xc000-0xdfff]
pci 0000:00:07.0: bridge window [mem 0xf4000000-0xfbdfffff]
pci 0000:00:07.0: bridge window [mem 0xa8000000-0xbfffffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04]
pci 0000:00:1c.0: bridge window [io 0x1000-0x1fff]
pci 0000:00:1c.0: bridge window [mem 0x40000000-0x401fffff]
pci 0000:00:1c.0: bridge window [mem 0x40200000-0x403fffff 64bit pref]
pci 0000:00:1c.2: PCI bridge to [bus 03]
pci 0000:00:1c.2: bridge window [io 0xb000-0xbfff]
pci 0000:00:1c.2: bridge window [mem 0xf3f00000-0xf3ffffff]
pci 0000:00:1c.2: bridge window [mem 0x40400000-0x405fffff 64bit pref]
pci 0000:00:1c.4: PCI bridge to [bus 02]
pci 0000:00:1c.4: bridge window [io 0xa000-0xafff]
pci 0000:00:1c.4: bridge window [mem 0xf3e00000-0xf3efffff]
pci 0000:00:1c.4: bridge window [mem 0x40600000-0x407fffff 64bit pref]
pci 0000:00:1e.0: PCI bridge to [bus 01]
pci 0000:00:1c.0: enabling device (0104 -> 0107)
xen: registering gsi 17 triggering 0 polarity 1
xen: --> pirq=17 -> irq=17 (gsi=17)
xen: registering gsi 18 triggering 0 polarity 1
xen: --> pirq=18 -> irq=18 (gsi=18)
xen: registering gsi 17 triggering 0 polarity 1
Already setup the GSI :17
pci 0000:00:1e.0: setting latency timer to 64
pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7]
pci_bus 0000:00: resource 5 [io 0x0d00-0xffff]
pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: resource 7 [mem 0x000d0000-0x000dffff]
pci_bus 0000:00: resource 8 [mem 0x40000000-0xdfffffff]
pci_bus 0000:00: resource 9 [mem 0xf0000000-0xfed8ffff]
pci_bus 0000:0f: resource 1 [mem 0xfbe00000-0xfbefffff]
pci_bus 0000:09: resource 0 [io 0xe000-0xefff]
pci_bus 0000:09: resource 1 [mem 0xd7e00000-0xdfffffff]
pci_bus 0000:09: resource 2 [mem 0xc0000000-0xcfffffff 64bit pref]
pci_bus 0000:0a: resource 0 [io 0xe000-0xefff]
pci_bus 0000:0a: resource 1 [mem 0xd7e00000-0xdfffffff]
pci_bus 0000:0a: resource 2 [mem 0xc0000000-0xcfffffff 64bit pref]
pci_bus 0000:0e: resource 0 [io 0xe000-0xefff]
pci_bus 0000:0e: resource 1 [mem 0xd7f00000-0xdfffffff]
pci_bus 0000:0e: resource 2 [mem 0xc0000000-0xcfffffff 64bit pref]
pci_bus 0000:0c: resource 1 [mem 0xd7e00000-0xd7efffff]
pci_bus 0000:0d: resource 1 [mem 0xd7e00000-0xd7efffff]
pci_bus 0000:05: resource 0 [io 0xc000-0xdfff]
pci_bus 0000:05: resource 1 [mem 0xf4000000-0xfbdfffff]
pci_bus 0000:05: resource 2 [mem 0xa8000000-0xbfffffff 64bit pref]
pci_bus 0000:06: resource 0 [io 0xc000-0xdfff]
pci_bus 0000:06: resource 1 [mem 0xf4000000-0xfbdfffff]
pci_bus 0000:06: resource 2 [mem 0xa8000000-0xbfffffff 64bit pref]
pci_bus 0000:08: resource 0 [io 0xd000-0xdfff]
pci_bus 0000:08: resource 1 [mem 0xf8000000-0xfbdfffff]
pci_bus 0000:08: resource 2 [mem 0xb4000000-0xbfffffff 64bit pref]
pci_bus 0000:07: resource 0 [io 0xc000-0xcfff]
pci_bus 0000:07: resource 1 [mem 0xf4000000-0xf7ffffff]
pci_bus 0000:07: resource 2 [mem 0xa8000000-0xb3ffffff 64bit pref]
pci_bus 0000:04: resource 0 [io 0x1000-0x1fff]
pci_bus 0000:04: resource 1 [mem 0x40000000-0x401fffff]
pci_bus 0000:04: resource 2 [mem 0x40200000-0x403fffff 64bit pref]
pci_bus 0000:03: resource 0 [io 0xb000-0xbfff]
pci_bus 0000:03: resource 1 [mem 0xf3f00000-0xf3ffffff]
pci_bus 0000:03: resource 2 [mem 0x40400000-0x405fffff 64bit pref]
pci_bus 0000:02: resource 0 [io 0xa000-0xafff]
pci_bus 0000:02: resource 1 [mem 0xf3e00000-0xf3efffff]
pci_bus 0000:02: resource 2 [mem 0x40600000-0x407fffff 64bit pref]
pci_bus 0000:01: resource 4 [io 0x0000-0x0cf7]
pci_bus 0000:01: resource 5 [io 0x0d00-0xffff]
pci_bus 0000:01: resource 6 [mem 0x000a0000-0x000bffff]
pci_bus 0000:01: resource 7 [mem 0x000d0000-0x000dffff]
pci_bus 0000:01: resource 8 [mem 0x40000000-0xdfffffff]
pci_bus 0000:01: resource 9 [mem 0xf0000000-0xfed8ffff]
pci_bus 0000:fe: resource 4 [io 0x0000-0xffff]
pci_bus 0000:fe: resource 5 [mem 0x00000000-0xffffffffff]
pci_bus 0000:ff: resource 4 [io 0x0000-0xffff]
pci_bus 0000:ff: resource 5 [mem 0x00000000-0xffffffffff]
NET: Registered protocol family 2
TCP established hash table entries: 524288 (order: 11, 8388608 bytes)
TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
TCP: Hash tables configured (established 524288 bind 65536)
TCP: reno registered
UDP hash table entries: 32768 (order: 8, 1048576 bytes)
UDP-Lite hash table entries: 32768 (order: 8, 1048576 bytes)
NET: Registered protocol family 1
xen: registering gsi 16 triggering 0 polarity 1
xen: --> pirq=16 -> irq=16 (gsi=16)
xen: registering gsi 21 triggering 0 polarity 1
xen: --> pirq=21 -> irq=21 (gsi=21)
xen: registering gsi 19 triggering 0 polarity 1
xen: --> pirq=19 -> irq=19 (gsi=19)
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
xen: registering gsi 23 triggering 0 polarity 1
xen: --> pirq=23 -> irq=23 (gsi=23)
xen: registering gsi 19 triggering 0 polarity 1
Already setup the GSI :19
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
xen: registering gsi 23 triggering 0 polarity 1
Already setup the GSI :23
xen: registering gsi 29 triggering 0 polarity 1
xen: --> pirq=29 -> irq=29 (gsi=29)
pci 0000:0e:00.0: Boot video device
PCI: CLS 256 bytes, default 64
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 67828k freed
Initialise module verification
audit: initializing netlink socket (disabled)
type=2000 audit(1374703268.000:1): initialized
bounce pool size: 64 pages
HugeTLB registered 2 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
msgmni has been set to 32768
Key type asymmetric registered
Asymmetric key parser 'x509' registered
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
io scheduler noop registered
io scheduler deadline registered (default)
io scheduler cfq registered
aer 0000:00:02.0:pcie02: service driver aer loaded
aer 0000:00:03.0:pcie02: service driver aer loaded
aer 0000:00:07.0:pcie02: service driver aer loaded
pcieport 0000:00:02.0: Signaling PME through PCIe PME interrupt
pci 0000:0f:00.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:02.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:03.0: Signaling PME through PCIe PME interrupt
pcieport 0000:09:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:0a:00.0: Signaling PME through PCIe PME interrupt
pci 0000:0e:00.0: Signaling PME through PCIe PME interrupt
pci 0000:0e:00.1: Signaling PME through PCIe PME interrupt
pcieport 0000:0a:01.0: Signaling PME through PCIe PME interrupt
pci 0000:0c:00.0: Signaling PME through PCIe PME interrupt
pci 0000:0d:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:0a:02.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:03.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:07.0: Signaling PME through PCIe PME interrupt
pcieport 0000:05:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:06:00.0: Signaling PME through PCIe PME interrupt
pci 0000:08:00.0: Signaling PME through PCIe PME interrupt
pci 0000:08:00.1: Signaling PME through PCIe PME interrupt
pcieport 0000:06:02.0: Signaling PME through PCIe PME interrupt
pci 0000:07:00.0: Signaling PME through PCIe PME interrupt
pci 0000:07:00.1: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:07.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:1c.2: Signaling PME through PCIe PME interrupt
pci 0000:03:00.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:1c.2:pcie01: service driver pcie_pme loaded
pcieport 0000:00:1c.4: Signaling PME through PCIe PME interrupt
pci 0000:02:00.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:1c.4:pcie01: service driver pcie_pme loaded
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
intel_idle: MWAIT substates: 0x1120
intel_idle: v0.4 model 0x2C
intel_idle: lapic_timer_reliable_states 0xffffffff
intel_idle: intel_idle yielding to none
input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input0
ACPI: Power Button [PWRB]
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1
ACPI: Power Button [PWRF]
ACPI: Requesting acpi_cpufreq
Monitor-Mwait will be used to enter C-1 state
Monitor-Mwait will be used to enter C-3 state
Monitor-Mwait will be used to enter C-3 state
Warning: Processor Platform Limit not supported.
GHES: HEST is not enabled!
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
hpet_acpi_add: no address or irqs in _CRS
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
brd: module loaded
loop: module loaded
libphy: Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
ehci-pci 0000:00:1a.7: setting latency timer to 64
ehci-pci 0000:00:1a.7: EHCI Host Controller
ehci-pci 0000:00:1a.7: new USB bus registered, assigned bus number 1
ehci-pci 0000:00:1a.7: debug port 1
ehci-pci 0000:00:1a.7: cache line size of 256 is not supported
ehci-pci 0000:00:1a.7: irq 18, io mem 0xf3df8000
ehci-pci 0000:00:1a.7: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: EHCI Host Controller
usb usb1: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 ehci_hcd
usb usb1: SerialNumber: 0000:00:1a.7
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 6 ports detected
xen: registering gsi 23 triggering 0 polarity 1
Already setup the GSI :23
ehci-pci 0000:00:1d.7: setting latency timer to 64
ehci-pci 0000:00:1d.7: EHCI Host Controller
ehci-pci 0000:00:1d.7: new USB bus registered, assigned bus number 2
ehci-pci 0000:00:1d.7: debug port 1
ehci-pci 0000:00:1d.7: cache line size of 256 is not supported
ehci-pci 0000:00:1d.7: irq 23, io mem 0xf3dfa000
ehci-pci 0000:00:1d.7: USB 2.0 started, EHCI 1.00
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: EHCI Host Controller
usb usb2: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 ehci_hcd
usb usb2: SerialNumber: 0000:00:1d.7
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 6 ports detected
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
xen: registering gsi 16 triggering 0 polarity 1
Already setup the GSI :16
uhci_hcd 0000:00:1a.0: setting latency timer to 64
uhci_hcd 0000:00:1a.0: UHCI Host Controller
uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 3
uhci_hcd 0000:00:1a.0: irq 16, io base 0x00009980
usb usb3: New USB device found, idVendor=1d6b, idProduct=0001
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb3: Product: UHCI Host Controller
usb usb3: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb3: SerialNumber: 0000:00:1a.0
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 2 ports detected
xen: registering gsi 21 triggering 0 polarity 1
Already setup the GSI :21
uhci_hcd 0000:00:1a.1: setting latency timer to 64
uhci_hcd 0000:00:1a.1: UHCI Host Controller
uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4
uhci_hcd 0000:00:1a.1: irq 21, io base 0x00009a00
usb usb4: New USB device found, idVendor=1d6b, idProduct=0001
usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb4: Product: UHCI Host Controller
usb usb4: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb4: SerialNumber: 0000:00:1a.1
hub 4-0:1.0: USB hub found
hub 4-0:1.0: 2 ports detected
xen: registering gsi 19 triggering 0 polarity 1
Already setup the GSI :19
uhci_hcd 0000:00:1a.2: setting latency timer to 64
uhci_hcd 0000:00:1a.2: UHCI Host Controller
uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5
uhci_hcd 0000:00:1a.2: irq 19, io base 0x00009a80
usb usb5: New USB device found, idVendor=1d6b, idProduct=0001
usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb5: Product: UHCI Host Controller
usb usb5: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb5: SerialNumber: 0000:00:1a.2
hub 5-0:1.0: USB hub found
hub 5-0:1.0: 2 ports detected
xen: registering gsi 23 triggering 0 polarity 1
Already setup the GSI :23
uhci_hcd 0000:00:1d.0: setting latency timer to 64
uhci_hcd 0000:00:1d.0: UHCI Host Controller
uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6
uhci_hcd 0000:00:1d.0: irq 23, io base 0x00009b00
usb usb6: New USB device found, idVendor=1d6b, idProduct=0001
usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb6: Product: UHCI Host Controller
usb usb6: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb6: SerialNumber: 0000:00:1d.0
hub 6-0:1.0: USB hub found
hub 6-0:1.0: 2 ports detected
xen: registering gsi 19 triggering 0 polarity 1
Already setup the GSI :19
uhci_hcd 0000:00:1d.1: setting latency timer to 64
uhci_hcd 0000:00:1d.1: UHCI Host Controller
uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7
uhci_hcd 0000:00:1d.1: irq 19, io base 0x00009b80
usb usb7: New USB device found, idVendor=1d6b, idProduct=0001
usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb7: Product: UHCI Host Controller
usb usb7: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb7: SerialNumber: 0000:00:1d.1
hub 7-0:1.0: USB hub found
hub 7-0:1.0: 2 ports detected
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
uhci_hcd 0000:00:1d.2: setting latency timer to 64
uhci_hcd 0000:00:1d.2: UHCI Host Controller
uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8
uhci_hcd 0000:00:1d.2: irq 18, io base 0x00009c00
usb usb8: New USB device found, idVendor=1d6b, idProduct=0001
usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb8: Product: UHCI Host Controller
usb usb8: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb8: SerialNumber: 0000:00:1d.2
hub 8-0:1.0: USB hub found
hub 8-0:1.0: 2 ports detected
i8042: PNP: No PS/2 controller found. Probing ports directly.
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mousedev: PS/2 mouse device common for all mice
rtc_cmos 00:02: RTC can wake from S4
rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0
rtc_cmos 00:02: alarms up to one month, y3k, 114 bytes nvram
EFI Variables Facility v0.08 2004-May-17
hidraw: raw HID events driver (C) Jiri Kosina
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
drop_monitor: Initializing network drop monitor service
TCP: cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
Loading module verification certificates
MODSIGN: Loaded cert 'Magrathea: Glacier signing key: 37cced82f1f9fd38d8ceb662cc0603433dd14ab8'
registered taskstats version 1
IMA: No TPM chip found, activating TPM-bypass!
rtc_cmos 00:02: setting system clock to 2013-07-24 22:01:08 UTC (1374703268)
Freeing unused kernel memory: 1732k freed
dracut: dracut-004-53.el6
dracut: rd_NO_LUKS: removing cryptoluks activation
dracut: rd_NO_LVM: removing LVM activation
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.24.0-ioctl (2013-01-15) initialised: dm-devel@redhat.com
udev: starting version 147
udevd (200): /proc/200/oom_adj is deprecated, please use /proc/200/oom_score_adj instead.
[drm] Initialized drm 1.1.0 20060810
[drm] radeon kernel modesetting enabled.
xen: registering gsi 24 triggering 0 polarity 1
xen: --> pirq=24 -> irq=24 (gsi=24)
[drm] initializing kernel modesetting (RV770 0x1002:0x9442 0x174B:0xE810).
[drm] register mmio base: 0xD8000000
[drm] register mmio size: 65536
ATOM BIOS: Wekiva
radeon 0000:0e:00.0: VRAM: 1024M 0x0000000000000000 - 0x000000003FFFFFFF (1024M used)
radeon 0000:0e:00.0: GTT: 512M 0x0000000040000000 - 0x000000005FFFFFFF
[drm] Detected VRAM RAM=1024M, BAR=256M
[drm] RAM width 256bits DDR
[TTM] Zone kernel: Available graphics memory: 24286922 kiB
[TTM] Zone dma32: Available graphics memory: 2097152 kiB
[TTM] Initializing pool allocator
[TTM] Initializing DMA pool allocator
[drm] radeon: 1024M of VRAM memory ready
[drm] radeon: 512M of GTT memory ready.
[drm] GART: num cpu pages 131072, num gpu pages 131072
[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0
[drm] Loading RV770 Microcode
[drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
radeon 0000:0e:00.0: WB enabled
radeon 0000:0e:00.0: fence driver on ring 0 use gpu addr 0x0000000040000c00 and cpu addr 0xffff880c47d98c00
radeon 0000:0e:00.0: fence driver on ring 3 use gpu addr 0x0000000040000c0c and cpu addr 0xffff880c47d98c0c
[drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[drm] Driver supports precise vblank timestamp query.
radeon 0000:0e:00.0: radeon: using MSI.
[drm] radeon: irq initialized.
[drm] ring test on 0 succeeded in 1 usecs
[drm] ring test on 3 succeeded in 1 usecs
[drm] ib test on ring 0 succeeded in 0 usecs
[drm] ib test on ring 3 succeeded in 0 usecs
[drm] Radeon Display Connectors
[drm] Connector 0:
[drm] DVI-I-1
[drm] HPD1
[drm] DDC: 0x7e60 0x7e60 0x7e64 0x7e64 0x7e68 0x7e68 0x7e6c 0x7e6c
[drm] Encoders:
[drm] DFP1: INTERNAL_UNIPHY
[drm] CRT2: INTERNAL_KLDSCP_DAC2
[drm] Connector 1:
[drm] DIN-1
[drm] Encoders:
[drm] TV1: INTERNAL_KLDSCP_DAC2
[drm] Connector 2:
[drm] DVI-I-2
[drm] HPD2
[drm] DDC: 0x7e20 0x7e20 0x7e24 0x7e24 0x7e28 0x7e28 0x7e2c 0x7e2c
[drm] Encoders:
[drm] CRT1: INTERNAL_KLDSCP_DAC1
[drm] DFP2: INTERNAL_KLDSCP_LVTMA
[drm] Internal thermal controller with fan control
[drm] radeon: power management initialized
parse error at position 4 in video mode 'edid/1920x2400'
[drm] forcing DIN-1 connector OFF
usb 2-6: new high-speed USB device number 2 using ehci-pci
[drm] fb mappable at 0xC0142000
[drm] vram apper at 0xC0000000
[drm] size 36864000
[drm] fb depth is 24
[drm] pitch is 15360
fbcon: radeondrmfb (fb0) is primary device
usb 2-6: New USB device found, idVendor=0424, idProduct=2504
usb 2-6: New USB device strings: Mfr=0, Product=0, SerialNumber=0
hub 2-6:1.0: USB hub found
hub 2-6:1.0: 3 ports detected
usb 4-1: new low-speed USB device number 2 using uhci_hcd
usb 4-1: New USB device found, idVendor=045e, idProduct=00dd
usb 4-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 4-1: Product: Comfort Curve Keyboard 2000
usb 4-1: Manufacturer: Microsoft
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:1a.1/usb4/4-1/4-1:1.0/input/input2
hid-generic 0003:045E:00DD.0001: input,hidraw0: USB HID v1.11 Keyboard [Microsoft Comfort Curve Keyboard 2000] on usb-0000:00:1a.1-1/input0
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:1a.1/usb4/4-1/4-1:1.1/input/input3
hid-generic 0003:045E:00DD.0002: input,hidraw1: USB HID v1.11 Device [Microsoft Comfort Curve Keyboard 2000] on usb-0000:00:1a.1-1/input1
usb 4-2: new full-speed USB device number 3 using uhci_hcd
usb 4-2: New USB device found, idVendor=1532, idProduct=002f
usb 4-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 4-2: Product: Razer Imperator
usb 4-2: Manufacturer: Razer
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:1a.1/usb4/4-2/4-2:1.0/input/input4
hid-generic 0003:1532:002F.0003: input,hidraw2: USB HID v1.11 Mouse [Razer Razer Imperator] on usb-0000:00:1a.1-2/input0
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:1a.1/usb4/4-2/4-2:1.1/input/input5
hid-generic 0003:1532:002F.0004: input,hidraw3: USB HID v1.11 Keyboard [Razer Razer Imperator] on usb-0000:00:1a.1-2/input1
Console: switching to colour frame buffer device 240x150
usb 2-6.1: new high-speed USB device number 3 using ehci-pci
usb 2-6.1: New USB device found, idVendor=0424, idProduct=2503
usb 2-6.1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
hub 2-6.1:1.0: USB hub found
hub 2-6.1:1.0: 3 ports detected
usb 2-6.2: new low-speed USB device number 4 using ehci-pci
usb 2-6.2: New USB device found, idVendor=045e, idProduct=0780
usb 2-6.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-6.2: Product: Comfort Curve Keyboard 3000
usb 2-6.2: Manufacturer: Microsoft
input: Microsoft Comfort Curve Keyboard 3000 as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.2/2-6.2:1.0/input/input6
hid-generic 0003:045E:0780.0005: input,hidraw4: USB HID v1.11 Keyboard [Microsoft Comfort Curve Keyboard 3000] on usb-0000:00:1d.7-6.2/input0
input: Microsoft Comfort Curve Keyboard 3000 as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.2/2-6.2:1.1/input/input7
hid-generic 0003:045E:0780.0006: input,hidraw5: USB HID v1.11 Device [Microsoft Comfort Curve Keyboard 3000] on usb-0000:00:1d.7-6.2/input1
usb 2-6.3: new full-speed USB device number 5 using ehci-pci
usb 2-6.3: New USB device found, idVendor=1532, idProduct=002f
usb 2-6.3: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-6.3: Product: Razer Imperator
usb 2-6.3: Manufacturer: Razer
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.3/2-6.3:1.0/input/input8
hid-generic 0003:1532:002F.0007: input,hidraw6: USB HID v1.11 Mouse [Razer Razer Imperator] on usb-0000:00:1d.7-6.3/input0
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.3/2-6.3:1.1/input/input9
hid-generic 0003:1532:002F.0008: input,hidraw7: USB HID v1.11 Keyboard [Razer Razer Imperator] on usb-0000:00:1d.7-6.3/input1
usb 2-6.1.1: new high-speed USB device number 6 using ehci-pci
radeon 0000:0e:00.0: fb0: radeondrmfb frame buffer device
radeon 0000:0e:00.0: registered panic notifier
[drm] Initialized radeon 2.30.0 20080528 for 0000:0e:00.0 on minor 0
usb 2-6.1.1: New USB device found, idVendor=0424, idProduct=2228
usb 2-6.1.1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
dracut: Starting plymouth daemon
usb 2-6.1.1: Product: Flash Card Reader
usb 2-6.1.1: Manufacturer: Generic
usb 2-6.1.1: SerialNumber: 000022272228
Initializing USB Mass Storage driver...
scsi0 : usb-storage 2-6.1.1:1.0
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usb 2-6.1.2: new full-speed USB device number 7 using ehci-pci
usb 2-6.1.2: New USB device found, idVendor=0d8c, idProduct=000e
usb 2-6.1.2: New USB device strings: Mfr=0, Product=1, SerialNumber=0
usb 2-6.1.2: Product: Generic USB Audio Device
dracut: rd_NO_DM: removing DM RAID activation
sky2: driver version 1.30
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
sky2 0000:03:00.0: Yukon-2 UL 2 chip revision 0
sky2 0000:03:00.0 eth0: addr 00:1f:bc:0e:1e:3d
xen: registering gsi 16 triggering 0 polarity 1
Already setup the GSI :16
sky2 0000:02:00.0: Yukon-2 UL 2 chip revision 0
sky2 0000:02:00.0 eth1: addr 00:1f:bc:0e:1e:3e
ahci 0000:00:1f.2: version 3.0
xen: registering gsi 19 triggering 0 polarity 1
Already setup the GSI :19
ahci: SSS flag set, parallel bus scan disabled
ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 6 ports 3 Gbps 0x3f impl SATA mode
ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc ems sxs
ahci 0000:00:1f.2: setting latency timer to 64
scsi1 : ahci
scsi2 : ahci
scsi3 : ahci
scsi4 : ahci
scsi5 : ahci
scsi6 : ahci
ata1: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc100 irq 221
ata2: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc180 irq 221
ata3: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc200 irq 221
ata4: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc280 irq 221
ata5: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc300 irq 221
ata6: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc380 irq 221
scsi 0:0:0:0: Direct-Access Generic Flash HS-CF 4.49 PQ: 0 ANSI: 0
scsi 0:0:0:1: Direct-Access Generic Flash HS-COMBO 4.49 PQ: 0 ANSI: 0
ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata1.00: ATA-7: Integral SATAII and USB SSD, 02.10104, max UDMA/133
ata1.00: 498935040 sectors, multi 1: LBA48
ata1.00: configured for UDMA/133
scsi 1:0:0:0: Direct-Access ATA Integral SATAII 02.1 PQ: 0 ANSI: 5
ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata2.00: ATA-7: Integral SATAII and USB SSD, 02.10104, max UDMA/133
ata2.00: 498935040 sectors, multi 1: LBA48
ata2.00: configured for UDMA/133
scsi 2:0:0:0: Direct-Access ATA Integral SATAII 02.1 PQ: 0 ANSI: 5
ata3: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata3.00: ATA-7: Integral SATAII and USB SSD, 02.10104, max UDMA/133
ata3.00: 498935040 sectors, multi 1: LBA48
ata3.00: configured for UDMA/133
scsi 3:0:0:0: Direct-Access ATA Integral SATAII 02.1 PQ: 0 ANSI: 5
ata4: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata4.00: ATA-7: Integral SATAII and USB SSD, 02.10104, max UDMA/133
ata4.00: 498935040 sectors, multi 1: LBA48
ata4.00: configured for UDMA/133
scsi 4:0:0:0: Direct-Access ATA Integral SATAII 02.1 PQ: 0 ANSI: 5
ata5: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata5.00: ATAPI: Optiarc DVD RW AD-7280S, 1.01, max UDMA/100
ata5.00: configured for UDMA/100
scsi 5:0:0:0: CD-ROM Optiarc DVD RW AD-7280S 1.01 PQ: 0 ANSI: 5
ata6: SATA link down (SStatus 0 SControl 300)
wmi: Mapper loaded
sd 1:0:0:0: [sdc] 498935040 512-byte logical blocks: (255 GB/237 GiB)
sd 3:0:0:0: [sde] 498935040 512-byte logical blocks: (255 GB/237 GiB)
sd 4:0:0:0: [sdf] 498935040 512-byte logical blocks: (255 GB/237 GiB)
sd 2:0:0:0: [sdd] 498935040 512-byte logical blocks: (255 GB/237 GiB)
sd 3:0:0:0: [sde] Write Protect is off
sd 3:0:0:0: [sde] Mode Sense: 00 3a 00 00
sd 2:0:0:0: [sdd] Write Protect is off
sd 2:0:0:0: [sdd] Mode Sense: 00 3a 00 00
sd 4:0:0:0: [sdf] Write Protect is off
sd 4:0:0:0: [sdf] Mode Sense: 00 3a 00 00
sd 3:0:0:0: [sde] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sd 2:0:0:0: [sdd] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sd 4:0:0:0: [sdf] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sde: sde1 sde2 sde4
sd 3:0:0:0: [sde] Attached SCSI disk
sdf: sdf1 sdf9
sdd: sdd1 sdd9
sd 4:0:0:0: [sdf] Attached SCSI disk
sd 2:0:0:0: [sdd] Attached SCSI disk
sd 0:0:0:0: [sda] Attached SCSI removable disk
sd 0:0:0:1: [sdb] Attached SCSI removable disk
sd 1:0:0:0: [sdc] Write Protect is off
sd 1:0:0:0: [sdc] Mode Sense: 00 3a 00 00
sd 1:0:0:0: [sdc] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sdc: sdc1 sdc2 sdc4
sd 1:0:0:0: [sdc] Attached SCSI disk
sr0: scsi3-mmc drive: 48x/48x writer dvd-ram cd/rw xa/form2 cdda tray
cdrom: Uniform CD-ROM driver Revision: 3.20
sr 5:0:0:0: Attached scsi CD-ROM sr0
md: bind<sde1>
md: bind<sde2>
md: bind<sdc1>
md: raid1 personality registered for level 1
md/raid1:md127: active with 2 out of 2 mirrors
md127: detected capacity change from 0 to 536842240
md127: unknown partition table
md: bind<sdc2>
md/raid1:md126: active with 2 out of 2 mirrors
md126: detected capacity change from 0 to 34359664640
md126: unknown partition table
dracut: Assembling MD RAID arrays
EXT4-fs (md126): mounted filesystem with ordered data mode. Opts: (null)
dracut: Remounting /dev/disk/by-uuid/ea61c60b-8e91-4cc3-ab17-f6b5097f1e87 with -o noatime,ro
EXT4-fs (md126): mounted filesystem with ordered data mode. Opts: (null)
dracut: Mounted root filesystem /dev/md126
md127: detected capacity change from 536842240 to 0
md: md127 stopped.
md: unbind<sdc1>
md: export_rdev(sdc1)
md: unbind<sde1>
md: export_rdev(sde1)
md: md127 stopped.
dracut: Switching root
udev: starting version 147
xen: registering gsi 29 triggering 0 polarity 1
Already setup the GSI :29
WARNING! power/level is deprecated; use power/control instead
xhci_hcd 0000:0f:00.0: xHCI Host Controller
xhci_hcd 0000:0f:00.0: new USB bus registered, assigned bus number 9
usb usb9: New USB device found, idVendor=1d6b, idProduct=0002
usb usb9: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb9: Product: xHCI Host Controller
usb usb9: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 xhci_hcd
usb usb9: SerialNumber: 0000:0f:00.0
xHCI xhci_add_endpoint called for root hub
xHCI xhci_check_bandwidth called for root hub
hub 9-0:1.0: USB hub found
hub 9-0:1.0: 2 ports detected
xhci_hcd 0000:0f:00.0: xHCI Host Controller
xhci_hcd 0000:0f:00.0: new USB bus registered, assigned bus number 10
usb usb10: New USB device found, idVendor=1d6b, idProduct=0003
usb usb10: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb10: Product: xHCI Host Controller
usb usb10: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 xhci_hcd
usb usb10: SerialNumber: 0000:0f:00.0
xHCI xhci_add_endpoint called for root hub
xHCI xhci_check_bandwidth called for root hub
hub 10-0:1.0: USB hub found
hub 10-0:1.0: 2 ports detected
usb 9-1: new low-speed USB device number 2 using xhci_hcd
usb 9-1: New USB device found, idVendor=045e, idProduct=00dd
usb 9-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 9-1: Product: Comfort Curve Keyboard 2000
usb 9-1: Manufacturer: Microsoft
usb 9-1: ep 0x81 - rounding interval to 64 microframes, ep desc says 80 microframes
usb 9-1: ep 0x82 - rounding interval to 64 microframes, ep desc says 80 microframes
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:02.0/0000:0f:00.0/usb9/9-1/9-1:1.0/input/input10
hid-generic 0003:045E:00DD.0009: input,hidraw8: USB HID v1.11 Keyboard [Microsoft Comfort Curve Keyboard 2000] on usb-0000:0f:00.0-1/input0
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:02.0/0000:0f:00.0/usb9/9-1/9-1:1.1/input/input11
hid-generic 0003:045E:00DD.000A: input,hidraw9: USB HID v1.11 Device [Microsoft Comfort Curve Keyboard 2000] on usb-0000:0f:00.0-1/input1
usb 9-2: new full-speed USB device number 3 using xhci_hcd
usb 9-2: New USB device found, idVendor=1532, idProduct=0017
usb 9-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 9-2: Product: Razer Imperator
usb 9-2: Manufacturer: Razer
xen: registering gsi 22 triggering 0 polarity 1
xen: --> pirq=22 -> irq=22 (gsi=22)
input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/input/input12
input: HDA Intel Line as /devices/pci0000:00/0000:00:1b.0/sound/card0/input13
input: HDA Intel Rear Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input14
input: HDA Intel Front Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input15
input: HDA Intel Line Out Side as /devices/pci0000:00/0000:00:1b.0/sound/card0/input16
input: HDA Intel Line Out CLFE as /devices/pci0000:00/0000:00:1b.0/sound/card0/input17
input: HDA Intel Line Out Surround as /devices/pci0000:00/0000:00:1b.0/sound/card0/input18
input: HDA Intel Line Out Front as /devices/pci0000:00/0000:00:1b.0/sound/card0/input19
xen: registering gsi 34 triggering 0 polarity 1
xen: --> pirq=34 -> irq=34 (gsi=34)
hda-intel 0000:0e:00.1: Handle VGA-switcheroo audio client
input: HDA ATI HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:00.0/0000:0e:00.1/sound/card1/input20
xen: registering gsi 34 triggering 0 polarity 1
Already setup the GSI :34
input: HDA Creative Line as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input21
input: HDA Creative Mic as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input22
input: HDA Creative Front Headphone as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input23
input: HDA Creative Line Out Side as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input24
input: HDA Creative Line Out CLFE as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input25
input: HDA Creative Line Out Surround as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input26
input: HDA Creative Line Out Front as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input27
xen: registering gsi 37 triggering 0 polarity 1
xen: --> pirq=37 -> irq=37 (gsi=37)
hda_intel: Disabling MSI
hda-intel 0000:08:00.1: Handle VGA-switcheroo audio client
input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:00.0/0000:08:00.1/sound/card3/input28
input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:00.0/0000:08:00.1/sound/card3/input29
input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:00.0/0000:08:00.1/sound/card3/input30
input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:00.0/0000:08:00.1/sound/card3/input31
xen: registering gsi 38 triggering 0 polarity 1
xen: --> pirq=38 -> irq=38 (gsi=38)
hda_intel: Disabling MSI
hda-intel 0000:07:00.1: Handle VGA-switcheroo audio client
input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:02.0/0000:07:00.1/sound/card4/input32
input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:02.0/0000:07:00.1/sound/card4/input33
input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:02.0/0000:07:00.1/sound/card4/input34
input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:02.0/0000:07:00.1/sound/card4/input35
shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
EDAC MC: Ver: 3.0.0
EDAC MC1: Giving out device to 'i7core_edac.c' 'i7 core #1': DEV 0000:fe:03.0
EDAC PCI0: Giving out device to module 'i7core_edac' controller 'EDAC PCI controller': DEV '0000:fe:03.0' (POLLED)
EDAC MC0: Giving out device to 'i7core_edac.c' 'i7 core #0': DEV 0000:ff:03.0
EDAC PCI1: Giving out device to module 'i7core_edac' controller 'EDAC PCI controller': DEV '0000:ff:03.0' (POLLED)
EDAC i7core: Driver loaded, 2 memory controller(s) found.
ACPI Warning: 0x0000000000000828-0x000000000000082f SystemIO conflicts with Region \PMRG 1 (20130117/utaddress-251)
ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
lpc_ich: Resource conflict(s) found affecting gpio_ich
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
i801_smbus 0000:00:1f.3: SMBus using PCI Interrupt
cm109: Keymap for Komunikate KIP1000 phone loaded
input: CM109 USB driver as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.1/2-6.1.2/2-6.1.2:1.3/input/input36
usbcore: registered new interface driver cm109
cm109: CM109 phone driver: 20080805 (C) Alfred E. Heggestad
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:1: Attached scsi generic sg1 type 0
sd 1:0:0:0: Attached scsi generic sg2 type 0
sd 2:0:0:0: Attached scsi generic sg3 type 0
sd 3:0:0:0: Attached scsi generic sg4 type 0
sd 4:0:0:0: Attached scsi generic sg5 type 0
sr 5:0:0:0: Attached scsi generic sg6 type 5
input: PC Speaker as /devices/platform/pcspkr/input/input37
microcode: CPU0 sig=0x206c0, pf=0x1, revision=0x0
md: bind<sdc1>
microcode: CPU1 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU2 sig=0x206c0, pf=0x1, revision=0x0
md: bind<sde1>
md/raid1:md0: active with 2 out of 2 mirrors
md0: detected capacity change from 0 to 536842240
microcode: CPU3 sig=0x206c0, pf=0x1, revision=0x0
md0: unknown partition table
microcode: CPU4 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU5 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU6 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU7 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU8 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU9 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU10 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU11 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU12 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU13 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU14 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU15 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU16 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU17 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU18 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU19 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU20 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU21 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU22 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU23 sig=0x206c0, pf=0x1, revision=0x0
microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:02.0/0000:0f:00.0/usb9/9-2/9-2:1.0/input/input38
hid-generic 0003:1532:0017.000B: input,hidraw10: USB HID v1.11 Mouse [Razer Razer Imperator] on usb-0000:0f:00.0-2/input0
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:02.0/0000:0f:00.0/usb9/9-2/9-2:1.1/input/input39
hid-generic 0003:1532:0017.000C: input,hidraw11: USB HID v1.11 Keyboard [Razer Razer Imperator] on usb-0000:0f:00.0-2/input1
iTCO_vendor_support: vendor-support=0
iTCO_wdt: Intel TCO WatchDog Timer Driver v1.10
iTCO_wdt: unable to reset NO_REBOOT flag, device disabled by hardware/BIOS
spl: module verification failed: signature and/or required key missing - tainting kernel
SPL: Loaded module v0.6.1-1
zunicode: module license 'CDDL' taints kernel.
Disabling lock debugging due to kernel taint
bonding: Ethernet Channel Bonding Driver: v3.7.1 (April 27, 2011)
tun: Universal TUN/TAP device driver, 1.6
tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
Event-channel device installed.
pciback 0000:08:00.0: seizing device
pciback 0000:07:00.0: seizing device
pciback 0000:07:00.0: enabling device (0000 -> 0003)
xen: registering gsi 39 triggering 0 polarity 1
xen: --> pirq=39 -> irq=39 (gsi=39)
pciback 0000:08:00.0: enabling device (0000 -> 0003)
xen: registering gsi 30 triggering 0 polarity 1
xen: --> pirq=30 -> irq=30 (gsi=30)
xen-pciback: backend is vpci
zram: module is from the staging directory, the quality is unknown, you have been warned.
zram: Created 24 device(s) ...
Adding 2097148k swap on /dev/zram0. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram1. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram2. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram3. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram4. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram5. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram6. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram7. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram8. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram9. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram10. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram11. Priority:100 extents:1 across:2097148k SS
EXT4-fs (md126): re-mounted. Opts: (null)
EXT4-fs (md0): mounted filesystem with ordered data mode. Opts: (null)
ZFS: Loaded module v0.6.1-1, ZFS pool version 5000, ZFS filesystem version 5
SPL: using hostid 0x00000000
zd0: p1
zd16: p1
zd32: p1
NET: Registered protocol family 10
IPv6: ADDRCONF(NETDEV_UP): bond0: link is not ready
bonding: bond0: Adding slave eth0.
sky2 0000:02:00.0 eth0: enabling interface
bonding: bond0: enslaving eth0 as an active interface with an up link.
IPv6: ADDRCONF(NETDEV_CHANGE): bond0: link becomes ready
bonding: bond0: Adding slave eth1.
sky2 0000:03:00.0 eth1: enabling interface
bonding: bond0: enslaving eth1 as an active interface with an up link.
Bridge firewalling registered
device bond0 entered promiscuous mode
device eth0 entered promiscuous mode
device eth1 entered promiscuous mode
br0: port 1(bond0) entered forwarding state
br0: port 1(bond0) entered forwarding state
sky2 0000:02:00.0 eth0: Link is up at 1000 Mbps, full duplex, flow control both
sky2 0000:03:00.0 eth1: Link is up at 1000 Mbps, full duplex, flow control both
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
FS-Cache: Loaded
FS-Cache: Netfs 'nfs' registered for caching
f71882fg: Found f71808e chip at 0xa10, revision 49
f71882fg f71882fg.2576: Fan: 1 is in duty-cycle mode
f71882fg f71882fg.2576: Auto pwm controlled by raw digital data, disabling pwm auto_point sysfs attributes for fan 1
f71882fg f71882fg.2576: Fan: 2 is in duty-cycle mode
f71882fg f71882fg.2576: Fan: 3 is in duty-cycle mode
uhci_hcd 0000:00:1a.0: remove, state 4
usb usb3: USB disconnect, device number 1
uhci_hcd 0000:00:1a.0: USB bus 3 deregistered
pciback 0000:00:1a.0: seizing device
xen: registering gsi 16 triggering 0 polarity 1
Already setup the GSI :16
uhci_hcd 0000:00:1a.1: remove, state 1
usb usb4: USB disconnect, device number 1
usb 4-1: USB disconnect, device number 2
usb 4-2: USB disconnect, device number 3
uhci_hcd 0000:00:1a.1: USB bus 4 deregistered
pciback 0000:00:1a.1: seizing device
xen: registering gsi 21 triggering 0 polarity 1
Already setup the GSI :21
uhci_hcd 0000:00:1d.2: remove, state 4
usb usb8: USB disconnect, device number 1
uhci_hcd 0000:00:1d.2: USB bus 8 deregistered
pciback 0000:00:1d.2: seizing device
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
ehci-pci 0000:00:1d.7: remove, state 1
usb usb2: USB disconnect, device number 1
usb 2-6: USB disconnect, device number 2
usb 2-6.1: USB disconnect, device number 3
usb 2-6.1.1: USB disconnect, device number 6
usb 2-6.1.2: USB disconnect, device number 7
cm109 2-6.1.2:1.3: cm109_toggle_buzzer_sync: usb_control_msg() failed -19
usb 2-6.2: USB disconnect, device number 4
usb 2-6.3: USB disconnect, device number 5
ehci-pci 0000:00:1d.7: USB bus 2 deregistered
pciback 0000:00:1d.7: seizing device
xen: registering gsi 23 triggering 0 polarity 1
Already setup the GSI :23
pciback 0000:07:00.1: seizing device
xen: registering gsi 38 triggering 0 polarity 1
Already setup the GSI :38
pciback 0000:08:00.1: seizing device
xen: registering gsi 37 triggering 0 polarity 1
Already setup the GSI :37
pciback 0000:0d:00.0: seizing device
xen: registering gsi 34 triggering 0 polarity 1
Already setup the GSI :34
vgaarb: device changed decodes: PCI:0000:0e:00.0,olddecodes=io+mem,decodes=none:owns=io+mem
vgaarb: transferring owner from PCI:0000:0e:00.0 to PCI:0000:07:00.0
fuse init (API version 7.21)
hda-intel: IRQ timing workaround is activated for card #1. Suggest a bigger bdl_pos_adj.
hda-intel: IRQ timing workaround is activated for card #0. Suggest a bigger bdl_pos_adj.
device vif1.0 entered promiscuous mode
IPv6: ADDRCONF(NETDEV_UP): vif1.0: link is not ready
device vif1.0-emu entered promiscuous mode
br0: port 3(vif1.0-emu) entered forwarding state
br0: port 3(vif1.0-emu) entered forwarding state
xen-pciback: vpci: 0000:00:1a.1: assign to virtual slot 0
xen-pciback: vpci: 0000:0d:00.0: assign to virtual slot 1
xen-pciback: vpci: 0000:08:00.0: assign to virtual slot 2
xen-pciback: vpci: 0000:08:00.1: assign to virtual slot 2 func 1
br0: port 3(vif1.0-emu) entered disabled state
device vif1.0-emu left promiscuous mode
br0: port 3(vif1.0-emu) entered disabled state
xen-blkback:ring-ref 16383, event-channel 14, protocol 1 (unspecified, assuming native)
IPv6: ADDRCONF(NETDEV_CHANGE): vif1.0: link becomes ready
br0: port 2(vif1.0) entered forwarding state
br0: port 2(vif1.0) entered forwarding state
br0: port 2(vif1.0) entered disabled state
device vif1.0 left promiscuous mode
br0: port 2(vif1.0) entered disabled state
[-- Attachment #3: dmesg.log.8GB --]
[-- Type: text/plain, Size: 76218 bytes --]
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Linux version 3.9.9-2.el6xen.x86_64 (root@normandy) (gcc version 4.4.5 20110214 (Red Hat 4.4.5-6) (GCC) ) #1 SMP Tue Jul 16 15:52:11 BST 2013
Command line: ro root=UUID=ea61c60b-8e91-4cc3-ab17-f6b5097f1e87 rd_MD_UUID=26fb9899:f3adb40f:b22e37a7:5f2db70a rd_MD_UUID=fbf20e02:97089c2c:1d0e1847:9e192fe8 rd_NO_LUKS rd_NO_LVM rd_NO_DM LANG=en_US.UTF-8 SYSFONT=latarcyrheb-sun16 KEYBOARDTYPE=pc KEYTABLE=uk selinux=0 elevator=deadline intel_iommu=on elevator=deadline iomem=relaxed video=DVI-I-1:edid/1920x2400 video=DVI-I-2:1920x2400 video=DIN-1:d
Freeing 9d-100 pfn range: 99 pages freed
1-1 mapping on 9d->100
Freeing 3f790-100000 pfn range: 788592 pages freed
1-1 mapping on 3f790->100000
Released 788691 pages of unused memory
Set 788691 page(s) to 1-1 mapping
Populating bcf912-c901e5 pfn range: 788691 pages added
e820: BIOS-provided physical RAM map:
Xen: [mem 0x0000000000000000-0x000000000009cfff] usable
Xen: [mem 0x000000000009d400-0x00000000000fffff] reserved
Xen: [mem 0x0000000000100000-0x000000003f78ffff] usable
Xen: [mem 0x000000003f790000-0x000000003f79dfff] ACPI data
Xen: [mem 0x000000003f79e000-0x000000003f7cffff] ACPI NVS
Xen: [mem 0x000000003f7d0000-0x000000003f7dffff] reserved
Xen: [mem 0x000000003f7e7000-0x000000003fffffff] reserved
Xen: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
Xen: [mem 0x00000000ffc00000-0x00000000ffffffff] reserved
Xen: [mem 0x0000000100000000-0x0000000cbfffffff] usable
NX (Execute Disable) protection: active
SMBIOS 2.6 present.
DMI: To Be Filled By O.E.M. To Be Filled By O.E.M./EVGA Classified SR-2, BIOS 080016 04/24/2013
e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
e820: remove [mem 0x000a0000-0x000fffff] usable
No AGP bridge found
e820: last_pfn = 0xcc0000 max_arch_pfn = 0x400000000
e820: last_pfn = 0x3f790 max_arch_pfn = 0x400000000
Base memory trampoline at [ffff880000096000] 96000 size 28672
init_memory_mapping: [mem 0x00000000-0x000fffff]
[mem 0x00000000-0x000fffff] page 4k
init_memory_mapping: [mem 0xc8fe00000-0xc8fffffff]
[mem 0xc8fe00000-0xc8fffffff] page 4k
BRK [0x01bc0000, 0x01bc0fff] PGTABLE
BRK [0x01bc1000, 0x01bc1fff] PGTABLE
init_memory_mapping: [mem 0xc8c000000-0xc8fdfffff]
[mem 0xc8c000000-0xc8fdfffff] page 4k
BRK [0x01bc2000, 0x01bc2fff] PGTABLE
BRK [0x01bc3000, 0x01bc3fff] PGTABLE
BRK [0x01bc4000, 0x01bc4fff] PGTABLE
init_memory_mapping: [mem 0xc80000000-0xc8bffffff]
[mem 0xc80000000-0xc8bffffff] page 4k
init_memory_mapping: [mem 0x00100000-0x3f78ffff]
[mem 0x00100000-0x3f78ffff] page 4k
init_memory_mapping: [mem 0x100000000-0xc7fffffff]
[mem 0x100000000-0xc7fffffff] page 4k
init_memory_mapping: [mem 0xc90000000-0xcbfffffff]
[mem 0xc90000000-0xcbfffffff] page 4k
RAMDISK: [mem 0x01f70000-0x061acfff]
ACPI: RSDP 00000000000f9f70 00024 (v02 ACPIAM)
ACPI: XSDT 000000003f790100 00064 (v01 042413 XSDT1438 20130424 MSFT 00000097)
ACPI: FACP 000000003f790290 000F4 (v04 042413 FACP1438 20130424 MSFT 00000097)
ACPI: DSDT 000000003f7904f0 058A3 (v02 1W555 1W555A58 00000A58 INTL 20051117)
ACPI: FACS 000000003f79e000 00040
ACPI: APIC 000000003f790390 00118 (v02 042413 APIC1438 20130424 MSFT 00000097)
ACPI: MCFG 000000003f7904b0 0003C (v01 042413 OEMMCFG 20130424 MSFT 00000097)
ACPI: OEMB 000000003f79e040 00082 (v01 042413 OEMB1438 20130424 MSFT 00000097)
ACPI: SRAT 000000003f79a4f0 00250 (v02 042413 OEMSRAT 00000001 INTL 00000001)
ACPI: HPET 000000003f79a740 00038 (v01 042413 OEMHPET 20130424 MSFT 00000097)
ACPI: XMAR 000000003f79e0d0 00120 (v01 AMI OEMDMAR 00000001 MSFT 00000097)
ACPI: SSDT 000000003f7a4c70 00363 (v01 DpgPmm CpuPm 00000012 INTL 20051117)
ACPI: Local APIC address 0xfee00000
NUMA turned off
Faking a node at [mem 0x0000000000000000-0x0000000cbfffffff]
Initmem setup node 0 [mem 0x00000000-0xcbfffffff]
NODE_DATA [mem 0xc901be000-0xc901e4fff]
Zone ranges:
DMA [mem 0x00001000-0x00ffffff]
DMA32 [mem 0x01000000-0xffffffff]
Normal [mem 0x100000000-0xcbfffffff]
Movable zone start for each node
Early memory node ranges
node 0: [mem 0x00001000-0x0009cfff]
node 0: [mem 0x00100000-0x3f78ffff]
node 0: [mem 0x100000000-0xcbfffffff]
On node 0 totalpages: 12580652
DMA zone: 56 pages used for memmap
DMA zone: 22 pages reserved
DMA zone: 3996 pages, LIFO batch:0
DMA32 zone: 3499 pages used for memmap
DMA32 zone: 255888 pages, LIFO batch:31
Normal zone: 168448 pages used for memmap
Normal zone: 12320768 pages, LIFO batch:31
ACPI: PM-Timer IO Port: 0x808
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)
ACPI: LAPIC (acpi_id[0x04] lapic_id[0x10] enabled)
ACPI: LAPIC (acpi_id[0x05] lapic_id[0x12] enabled)
ACPI: LAPIC (acpi_id[0x06] lapic_id[0x14] enabled)
ACPI: LAPIC (acpi_id[0x07] lapic_id[0x20] enabled)
ACPI: LAPIC (acpi_id[0x08] lapic_id[0x22] enabled)
ACPI: LAPIC (acpi_id[0x09] lapic_id[0x24] enabled)
ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x30] enabled)
ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x32] enabled)
ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x34] enabled)
ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x01] enabled)
ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x03] enabled)
ACPI: LAPIC (acpi_id[0x0f] lapic_id[0x05] enabled)
ACPI: LAPIC (acpi_id[0x10] lapic_id[0x11] enabled)
ACPI: LAPIC (acpi_id[0x11] lapic_id[0x13] enabled)
ACPI: LAPIC (acpi_id[0x12] lapic_id[0x15] enabled)
ACPI: LAPIC (acpi_id[0x13] lapic_id[0x21] enabled)
ACPI: LAPIC (acpi_id[0x14] lapic_id[0x23] enabled)
ACPI: LAPIC (acpi_id[0x15] lapic_id[0x25] enabled)
ACPI: LAPIC (acpi_id[0x16] lapic_id[0x31] enabled)
ACPI: LAPIC (acpi_id[0x17] lapic_id[0x33] enabled)
ACPI: LAPIC (acpi_id[0x18] lapic_id[0x35] enabled)
ACPI: IOAPIC (id[0x06] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 6, version 32, address 0xfec00000, GSI 0-23
ACPI: IOAPIC (id[0x07] address[0xfec8a000] gsi_base[24])
IOAPIC[1]: apic_id 7, version 32, address 0xfec8a000, GSI 24-47
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ9 used by override.
Using ACPI (MADT) for SMP configuration information
ACPI: HPET id: 0xffffffff base: 0xfed00000
smpboot: Allowing 24 CPUs, 0 hotplug CPUs
nr_irqs_gsi: 64
PM: Registered nosave memory: 000000000009d000 - 000000000009e000
PM: Registered nosave memory: 000000000009e000 - 0000000000100000
PM: Registered nosave memory: 000000003f790000 - 000000003f79e000
PM: Registered nosave memory: 000000003f79e000 - 000000003f7d0000
PM: Registered nosave memory: 000000003f7d0000 - 000000003f7e0000
PM: Registered nosave memory: 000000003f7e0000 - 000000003f7e7000
PM: Registered nosave memory: 000000003f7e7000 - 0000000040000000
PM: Registered nosave memory: 0000000040000000 - 00000000fee00000
PM: Registered nosave memory: 00000000fee00000 - 00000000fee01000
PM: Registered nosave memory: 00000000fee01000 - 00000000ffc00000
PM: Registered nosave memory: 00000000ffc00000 - 0000000100000000
e820: [mem 0x40000000-0xfedfffff] available for PCI devices
Booting paravirtualized kernel on Xen
Xen version: 4.3.0 (preserve-AD)
setup_percpu: NR_CPUS:32 nr_cpumask_bits:32 nr_cpu_ids:24 nr_node_ids:1
PERCPU: Embedded 28 pages/cpu @ffff880c83c00000 s84032 r8192 d22464 u131072
pcpu-alloc: s84032 r8192 d22464 u131072 alloc=1*2097152
pcpu-alloc: [0] 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
pcpu-alloc: [0] 16 17 18 19 20 21 22 23 -- -- -- -- -- -- -- --
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 12408627
Policy zone: Normal
Kernel command line: ro root=UUID=ea61c60b-8e91-4cc3-ab17-f6b5097f1e87 rd_MD_UUID=26fb9899:f3adb40f:b22e37a7:5f2db70a rd_MD_UUID=fbf20e02:97089c2c:1d0e1847:9e192fe8 rd_NO_LUKS rd_NO_LVM rd_NO_DM LANG=en_US.UTF-8 SYSFONT=latarcyrheb-sun16 KEYBOARDTYPE=pc KEYTABLE=uk selinux=0 elevator=deadline intel_iommu=on elevator=deadline iomem=relaxed video=DVI-I-1:edid/1920x2400 video=DVI-I-2:1920x2400 video=DIN-1:d
Intel-IOMMU: enabled
PID hash table entries: 4096 (order: 3, 32768 bytes)
__ex_table already sorted, skipping sort
software IO TLB [mem 0xc55800000-0xc59800000] (64MB) mapped at [ffff880c55800000-ffff880c597fffff]
Memory: 48504280k/53477376k available (5525k kernel code, 3154768k absent, 1818328k reserved, 2610k data, 1732k init)
Hierarchical RCU implementation.
RCU restricting CPUs from NR_CPUS=32 to nr_cpu_ids=24.
NR_IRQS:4352 nr_irqs:1280 16
xen: sci override: global_irq=20 trigger=0 polarity=1
xen: registering gsi 20 triggering 0 polarity 1
xen: --> pirq=20 -> irq=9 (gsi=9)
xen: acpi sci 9
xen: --> pirq=1 -> irq=1 (gsi=1)
xen: --> pirq=2 -> irq=2 (gsi=2)
xen: --> pirq=3 -> irq=3 (gsi=3)
xen: --> pirq=4 -> irq=4 (gsi=4)
xen: --> pirq=5 -> irq=5 (gsi=5)
xen: --> pirq=6 -> irq=6 (gsi=6)
xen: --> pirq=7 -> irq=7 (gsi=7)
xen: --> pirq=8 -> irq=8 (gsi=8)
xen: --> pirq=10 -> irq=10 (gsi=10)
xen: --> pirq=11 -> irq=11 (gsi=11)
xen: --> pirq=12 -> irq=12 (gsi=12)
xen: --> pirq=13 -> irq=13 (gsi=13)
xen: --> pirq=14 -> irq=14 (gsi=14)
xen: --> pirq=15 -> irq=15 (gsi=15)
Console: colour VGA+ 80x25
console [tty0] enabled
Xen: using vcpuop timer interface
installing Xen timer for CPU 0
tsc: Detected 3321.754 MHz processor
Calibrating delay loop (skipped), value calculated using timer frequency.. 6643.50 BogoMIPS (lpj=3321754)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux: Disabled at boot.
Dentry cache hash table entries: 8388608 (order: 14, 67108864 bytes)
Inode-cache hash table entries: 4194304 (order: 13, 33554432 bytes)
Mount-cache hash table entries: 256
Initializing cgroup subsys cpuacct
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
Initializing cgroup subsys net_cls
Initializing cgroup subsys blkio
Initializing cgroup subsys perf_event
Initializing cgroup subsys net_prio
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
mce: CPU supports 2 MCE banks
Last level iTLB entries: 4KB 512, 2MB 7, 4MB 7
Last level dTLB entries: 4KB 512, 2MB 32, 4MB 32
tlb_flushall_shift: 6
Freeing SMP alternatives: 20k freed
ACPI: Core revision 20130117
ACPI: All ACPI Tables successfully acquired
ftrace: allocating 21258 entries in 84 pages
Performance Events: unsupported p6 CPU model 44 no PMU driver, software events only.
installing Xen timer for CPU 1
installing Xen timer for CPU 2
installing Xen timer for CPU 3
installing Xen timer for CPU 4
installing Xen timer for CPU 5
installing Xen timer for CPU 6
installing Xen timer for CPU 7
installing Xen timer for CPU 8
installing Xen timer for CPU 9
installing Xen timer for CPU 10
installing Xen timer for CPU 11
installing Xen timer for CPU 12
installing Xen timer for CPU 13
installing Xen timer for CPU 14
installing Xen timer for CPU 15
installing Xen timer for CPU 16
installing Xen timer for CPU 17
installing Xen timer for CPU 18
installing Xen timer for CPU 19
installing Xen timer for CPU 20
installing Xen timer for CPU 21
installing Xen timer for CPU 22
installing Xen timer for CPU 23
Brought up 24 CPUs
devtmpfs: initialized
PM: Registering ACPI NVS region [mem 0x3f79e000-0x3f7cffff] (204800 bytes)
Grant tables using version 2 layout.
Grant table initialized
regulator-dummy: no parameters
NET: Registered protocol family 16
ACPI: bus type PCI registered
PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
PCI: not using MMCONFIG
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: Added _OSI(Module Device)
ACPI: Added _OSI(Processor Device)
ACPI: Added _OSI(3.0 _SCP Extensions)
ACPI: Added _OSI(Processor Aggregator Device)
ACPI: EC: Look up EC in DSDT
ACPI: Executed 1 blocks of module-level executable AML code
ACPI: SSDT 000000003f79e1f0 053DC (v01 DpgPmm P001Ist 00000011 INTL 20051117)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT (null) 053DC (v01 DpgPmm P001Ist 00000011 INTL 20051117)
ACPI: SSDT 000000003f7a35d0 00C88 (v01 PmRef P001Cst 00003001 INTL 20051117)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT (null) 00C88 (v01 PmRef P001Cst 00003001 INTL 20051117)
ACPI: SSDT 000000003f7a4260 00A0A (v01 PmRef Cpu0Tst 00003000 INTL 20051117)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT (null) 00A0A (v01 PmRef Cpu0Tst 00003000 INTL 20051117)
ACPI: Interpreter enabled
ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20130117/hwxface-568)
ACPI: (supports S0 S1 S3 S4 S5)
ACPI: Using IOAPIC for interrupt routing
PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in ACPI motherboard resources
PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [bus 00-ff]
pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7]
pci_bus 0000:00: root bus resource [io 0x0d00-0xffff]
pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000dffff]
pci_bus 0000:00: root bus resource [mem 0x40000000-0xdfffffff]
pci_bus 0000:00: root bus resource [mem 0xf0000000-0xfed8ffff]
pci 0000:00:00.0: [8086:3406] type 00 class 0x060000
pci 0000:00:00.0: PME# supported from D0 D3hot D3cold
pci 0000:00:02.0: [8086:3409] type 01 class 0x060400
pci 0000:00:02.0: PME# supported from D0 D3hot D3cold
pci 0000:00:02.0: System wakeup disabled by ACPI
pci 0000:00:03.0: [8086:340a] type 01 class 0x060400
pci 0000:00:03.0: PME# supported from D0 D3hot D3cold
pci 0000:00:03.0: System wakeup disabled by ACPI
pci 0000:00:07.0: [8086:340e] type 01 class 0x060400
pci 0000:00:07.0: PME# supported from D0 D3hot D3cold
pci 0000:00:07.0: System wakeup disabled by ACPI
pci 0000:00:13.0: [8086:342d] type 00 class 0x080020
pci 0000:00:13.0: reg 10: [mem 0xfec8a000-0xfec8afff]
pci 0000:00:13.0: PME# supported from D0 D3hot D3cold
pci 0000:00:14.0: [8086:342e] type 00 class 0x080000
pci 0000:00:14.1: [8086:3422] type 00 class 0x080000
pci 0000:00:14.2: [8086:3423] type 00 class 0x080000
pci 0000:00:14.3: [8086:3438] type 00 class 0x080000
pci 0000:00:1a.0: [8086:3a37] type 00 class 0x0c0300
pci 0000:00:1a.0: reg 20: [io 0x9980-0x999f]
pci 0000:00:1a.0: System wakeup disabled by ACPI
pci 0000:00:1a.1: [8086:3a38] type 00 class 0x0c0300
pci 0000:00:1a.1: reg 20: [io 0x9a00-0x9a1f]
pci 0000:00:1a.1: System wakeup disabled by ACPI
pci 0000:00:1a.2: [8086:3a39] type 00 class 0x0c0300
pci 0000:00:1a.2: reg 20: [io 0x9a80-0x9a9f]
pci 0000:00:1a.2: System wakeup disabled by ACPI
pci 0000:00:1a.7: [8086:3a3c] type 00 class 0x0c0320
pci 0000:00:1a.7: reg 10: [mem 0xf3df8000-0xf3df83ff]
pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1a.7: System wakeup disabled by ACPI
pci 0000:00:1b.0: [8086:3a3e] type 00 class 0x040300
pci 0000:00:1b.0: reg 10: [mem 0xf3df4000-0xf3df7fff 64bit]
pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.0: [8086:3a40] type 01 class 0x060400
pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.0: System wakeup disabled by ACPI
pci 0000:00:1c.2: [8086:3a44] type 01 class 0x060400
pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.2: System wakeup disabled by ACPI
pci 0000:00:1c.4: [8086:3a48] type 01 class 0x060400
pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.4: System wakeup disabled by ACPI
pci 0000:00:1d.0: [8086:3a34] type 00 class 0x0c0300
pci 0000:00:1d.0: reg 20: [io 0x9b00-0x9b1f]
pci 0000:00:1d.0: System wakeup disabled by ACPI
pci 0000:00:1d.1: [8086:3a35] type 00 class 0x0c0300
pci 0000:00:1d.1: reg 20: [io 0x9b80-0x9b9f]
pci 0000:00:1d.1: System wakeup disabled by ACPI
pci 0000:00:1d.2: [8086:3a36] type 00 class 0x0c0300
pci 0000:00:1d.2: reg 20: [io 0x9c00-0x9c1f]
pci 0000:00:1d.2: System wakeup disabled by ACPI
pci 0000:00:1d.7: [8086:3a3a] type 00 class 0x0c0320
pci 0000:00:1d.7: reg 10: [mem 0xf3dfa000-0xf3dfa3ff]
pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1d.7: System wakeup disabled by ACPI
pci 0000:00:1e.0: [8086:244e] type 01 class 0x060401
pci 0000:00:1e.0: System wakeup disabled by ACPI
pci 0000:00:1f.0: [8086:3a16] type 00 class 0x060100
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 0a00 (mask 00ff)
pci 0000:00:1f.2: [8086:3a22] type 00 class 0x010601
pci 0000:00:1f.2: reg 10: [io 0x9d00-0x9d07]
pci 0000:00:1f.2: reg 14: [io 0x9f00-0x9f03]
pci 0000:00:1f.2: reg 18: [io 0x9e80-0x9e87]
pci 0000:00:1f.2: reg 1c: [io 0x9e00-0x9e03]
pci 0000:00:1f.2: reg 20: [io 0x9d80-0x9d9f]
pci 0000:00:1f.2: reg 24: [mem 0xf3dfc000-0xf3dfc7ff]
pci 0000:00:1f.2: PME# supported from D3hot
pci 0000:00:1f.3: [8086:3a30] type 00 class 0x0c0500
pci 0000:00:1f.3: reg 10: [mem 0xf3dfe000-0xf3dfe0ff 64bit]
pci 0000:00:1f.3: reg 20: [io 0x0400-0x041f]
pci 0000:0f:00.0: [1033:0194] type 00 class 0x0c0330
pci 0000:0f:00.0: reg 10: [mem 0xfbefe000-0xfbefffff 64bit]
pci 0000:0f:00.0: PME# supported from D0 D3hot
pci 0000:00:02.0: PCI bridge to [bus 0f]
pci 0000:00:02.0: bridge window [mem 0xfbe00000-0xfbefffff]
pci 0000:09:00.0: [10de:05b1] type 01 class 0x060400
pci 0000:09:00.0: PME# supported from D0 D3hot D3cold
pci 0000:00:03.0: PCI bridge to [bus 09-0e]
pci 0000:00:03.0: bridge window [io 0xe000-0xefff]
pci 0000:00:03.0: bridge window [mem 0xd7e00000-0xdfffffff]
pci 0000:00:03.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0a:00.0: [10de:05b1] type 01 class 0x060400
pci 0000:0a:00.0: PME# supported from D0 D3hot D3cold
pci 0000:0a:01.0: [10de:05b1] type 01 class 0x060400
pci 0000:0a:01.0: PME# supported from D0 D3hot D3cold
pci 0000:0a:02.0: [10de:05b1] type 01 class 0x060400
pci 0000:0a:02.0: PME# supported from D0 D3hot D3cold
pci 0000:09:00.0: PCI bridge to [bus 0a-0e]
pci 0000:09:00.0: bridge window [io 0xe000-0xefff]
pci 0000:09:00.0: bridge window [mem 0xd7e00000-0xdfffffff]
pci 0000:09:00.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0e:00.0: [1002:9442] type 00 class 0x030000
pci 0000:0e:00.0: reg 10: [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0e:00.0: reg 18: [mem 0xd8000000-0xd800ffff 64bit]
pci 0000:0e:00.0: reg 20: [io 0xe000-0xe0ff]
pci 0000:0e:00.0: reg 30: [mem 0xd7fe0000-0xd7ffffff pref]
pci 0000:0e:00.0: supports D1 D2
pci 0000:0e:00.1: [1002:aa30] type 00 class 0x040300
pci 0000:0e:00.1: reg 10: [mem 0xdc000000-0xdc003fff 64bit]
pci 0000:0e:00.1: supports D1 D2
pci 0000:0a:00.0: PCI bridge to [bus 0e]
pci 0000:0a:00.0: bridge window [io 0xe000-0xefff]
pci 0000:0a:00.0: bridge window [mem 0xd7f00000-0xdfffffff]
pci 0000:0a:00.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0c:00.0: [1102:7006] type 01 class 0x060400
pci 0000:0c:00.0: supports D1 D2
pci 0000:0c:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
pci 0000:0a:01.0: PCI bridge to [bus 0c-0d]
pci 0000:0a:01.0: bridge window [mem 0xd7e00000-0xd7efffff]
pci 0000:0d:00.0: [1102:0009] type 00 class 0x040300
pci 0000:0d:00.0: reg 10: [mem 0xd7efc000-0xd7efffff]
pci 0000:0d:00.0: supports D1 D2
pci 0000:0c:00.0: PCI bridge to [bus 0d]
pci 0000:0c:00.0: bridge window [mem 0xd7e00000-0xd7efffff]
pci 0000:0a:02.0: PCI bridge to [bus 0b]
pci 0000:05:00.0: [10de:05b1] type 01 class 0x060400
pci 0000:05:00.0: PME# supported from D0 D3hot D3cold
pci 0000:00:07.0: PCI bridge to [bus 05-08]
pci 0000:00:07.0: bridge window [io 0xc000-0xdfff]
pci 0000:00:07.0: bridge window [mem 0xf4000000-0xfbdfffff]
pci 0000:00:07.0: bridge window [mem 0xa8000000-0xbfffffff 64bit pref]
pci 0000:06:00.0: [10de:05b1] type 01 class 0x060400
pci 0000:06:00.0: PME# supported from D0 D3hot D3cold
pci 0000:06:02.0: [10de:05b1] type 01 class 0x060400
pci 0000:06:02.0: PME# supported from D0 D3hot D3cold
pci 0000:05:00.0: PCI bridge to [bus 06-08]
pci 0000:05:00.0: bridge window [io 0xc000-0xdfff]
pci 0000:05:00.0: bridge window [mem 0xf4000000-0xfbdfffff]
pci 0000:05:00.0: bridge window [mem 0xa8000000-0xbfffffff 64bit pref]
pci 0000:08:00.0: [10de:06d8] type 00 class 0x030000
pci 0000:08:00.0: reg 10: [mem 0xf8000000-0xf9ffffff]
pci 0000:08:00.0: reg 14: [mem 0xb8000000-0xbfffffff 64bit pref]
pci 0000:08:00.0: reg 1c: [mem 0xb4000000-0xb7ffffff 64bit pref]
pci 0000:08:00.0: reg 24: [io 0xdf80-0xdfff]
pci 0000:08:00.0: reg 30: [mem 0xfbd00000-0xfbd7ffff pref]
pci 0000:08:00.1: [10de:0be5] type 00 class 0x040300
pci 0000:08:00.1: reg 10: [mem 0xfbdfc000-0xfbdfffff]
pci 0000:06:00.0: PCI bridge to [bus 08]
pci 0000:06:00.0: bridge window [io 0xd000-0xdfff]
pci 0000:06:00.0: bridge window [mem 0xf8000000-0xfbdfffff]
pci 0000:06:00.0: bridge window [mem 0xb4000000-0xbfffffff 64bit pref]
pci 0000:07:00.0: [10de:06d9] type 00 class 0x030000
pci 0000:07:00.0: reg 10: [mem 0xf4000000-0xf5ffffff]
pci 0000:07:00.0: reg 14: [mem 0xa8000000-0xafffffff 64bit pref]
pci 0000:07:00.0: reg 1c: [mem 0xb0000000-0xb3ffffff 64bit pref]
pci 0000:07:00.0: reg 24: [io 0xcf80-0xcfff]
pci 0000:07:00.0: reg 30: [mem 0xf7f00000-0xf7f7ffff pref]
pci 0000:07:00.1: [10de:0be5] type 00 class 0x040300
pci 0000:07:00.1: reg 10: [mem 0xf7ffc000-0xf7ffffff]
pci 0000:06:02.0: PCI bridge to [bus 07]
pci 0000:06:02.0: bridge window [io 0xc000-0xcfff]
pci 0000:06:02.0: bridge window [mem 0xf4000000-0xf7ffffff]
pci 0000:06:02.0: bridge window [mem 0xa8000000-0xb3ffffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04]
pci 0000:03:00.0: [11ab:4380] type 00 class 0x020000
pci 0000:03:00.0: reg 10: [mem 0xf3fdc000-0xf3fdffff 64bit]
pci 0000:03:00.0: reg 18: [io 0xbf00-0xbfff]
pci 0000:03:00.0: reg 30: [mem 0xf3fe0000-0xf3ffffff pref]
pci 0000:03:00.0: supports D1 D2
pci 0000:03:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:1c.2: PCI bridge to [bus 03]
pci 0000:00:1c.2: bridge window [io 0xb000-0xbfff]
pci 0000:00:1c.2: bridge window [mem 0xf3f00000-0xf3ffffff]
pci 0000:02:00.0: [11ab:4380] type 00 class 0x020000
pci 0000:02:00.0: reg 10: [mem 0xf3edc000-0xf3edffff 64bit]
pci 0000:02:00.0: reg 18: [io 0xaf00-0xafff]
pci 0000:02:00.0: reg 30: [mem 0xf3ee0000-0xf3efffff pref]
pci 0000:02:00.0: supports D1 D2
pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:1c.4: PCI bridge to [bus 02]
pci 0000:00:1c.4: bridge window [io 0xa000-0xafff]
pci 0000:00:1c.4: bridge window [mem 0xf3e00000-0xf3efffff]
pci 0000:00:1e.0: PCI bridge to [bus 01] (subtractive decode)
pci 0000:00:1e.0: bridge window [io 0x0000-0x0cf7] (subtractive decode)
pci 0000:00:1e.0: bridge window [io 0x0d00-0xffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x000d0000-0x000dffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0x40000000-0xdfffffff] (subtractive decode)
pci 0000:00:1e.0: bridge window [mem 0xf0000000-0xfed8ffff] (subtractive decode)
acpi PNP0A08:00: Requesting ACPI _OSC control (0x1d)
acpi PNP0A08:00: ACPI _OSC control (0x1d) granted
ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 6 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKB] (IRQs *5)
ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 6 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 6 7 10 11 12 14 *15)
ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 6 *7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKG] (IRQs *3 4 6 7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 6 7 10 11 12 *14 15)
ACPI: Enabled 1 GPEs in block 00 to 3F
acpi root: \_SB_.PCI0 notify handler is installed
Found 1 acpi root devices
ACPI: No dock devices found.
xen/balloon: Initialising balloon driver.
xen-balloon: Initialising balloon driver.
xen/balloon: Xen selfballooning driver disabled for domain0.
vgaarb: device added: PCI:0000:0e:00.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: device added: PCI:0000:08:00.0,decodes=io+mem,owns=none,locks=none
vgaarb: device added: PCI:0000:07:00.0,decodes=io+mem,owns=none,locks=none
vgaarb: loaded
vgaarb: bridge control possible 0000:07:00.0
vgaarb: bridge control possible 0000:08:00.0
vgaarb: bridge control possible 0000:0e:00.0
SCSI subsystem initialized
ACPI: bus type ATA registered
libata version 3.00 loaded.
ACPI: bus type USB registered
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
PCI: Discovered peer bus fe
PCI: root bus fe: using default resources
PCI: Probing PCI hardware (bus fe)
PCI host bridge to bus 0000:fe
pci_bus 0000:fe: root bus resource [io 0x0000-0xffff]
pci_bus 0000:fe: root bus resource [mem 0x00000000-0xffffffffff]
pci_bus 0000:fe: No busn resource found for root bus, will use [bus fe-ff]
pci 0000:fe:00.0: [8086:2c70] type 00 class 0x060000
pci 0000:fe:00.1: [8086:2d81] type 00 class 0x060000
pci 0000:fe:02.0: [8086:2d90] type 00 class 0x060000
pci 0000:fe:02.1: [8086:2d91] type 00 class 0x060000
pci 0000:fe:02.2: [8086:2d92] type 00 class 0x060000
pci 0000:fe:02.3: [8086:2d93] type 00 class 0x060000
pci 0000:fe:02.4: [8086:2d94] type 00 class 0x060000
pci 0000:fe:02.5: [8086:2d95] type 00 class 0x060000
pci 0000:fe:03.0: [8086:2d98] type 00 class 0x060000
pci 0000:fe:03.1: [8086:2d99] type 00 class 0x060000
pci 0000:fe:03.2: [8086:2d9a] type 00 class 0x060000
pci 0000:fe:03.4: [8086:2d9c] type 00 class 0x060000
pci 0000:fe:04.0: [8086:2da0] type 00 class 0x060000
pci 0000:fe:04.1: [8086:2da1] type 00 class 0x060000
pci 0000:fe:04.2: [8086:2da2] type 00 class 0x060000
pci 0000:fe:04.3: [8086:2da3] type 00 class 0x060000
pci 0000:fe:05.0: [8086:2da8] type 00 class 0x060000
pci 0000:fe:05.1: [8086:2da9] type 00 class 0x060000
pci 0000:fe:05.2: [8086:2daa] type 00 class 0x060000
pci 0000:fe:05.3: [8086:2dab] type 00 class 0x060000
pci 0000:fe:06.0: [8086:2db0] type 00 class 0x060000
pci 0000:fe:06.1: [8086:2db1] type 00 class 0x060000
pci 0000:fe:06.2: [8086:2db2] type 00 class 0x060000
pci 0000:fe:06.3: [8086:2db3] type 00 class 0x060000
pci_bus 0000:fe: busn_res: [bus fe-ff] end is updated to fe
PCI: Discovered peer bus ff
PCI: root bus ff: using default resources
PCI: Probing PCI hardware (bus ff)
PCI host bridge to bus 0000:ff
pci_bus 0000:ff: root bus resource [io 0x0000-0xffff]
pci_bus 0000:ff: root bus resource [mem 0x00000000-0xffffffffff]
pci_bus 0000:ff: No busn resource found for root bus, will use [bus ff-ff]
pci 0000:ff:00.0: [8086:2c70] type 00 class 0x060000
pci 0000:ff:00.1: [8086:2d81] type 00 class 0x060000
pci 0000:ff:02.0: [8086:2d90] type 00 class 0x060000
pci 0000:ff:02.1: [8086:2d91] type 00 class 0x060000
pci 0000:ff:02.2: [8086:2d92] type 00 class 0x060000
pci 0000:ff:02.3: [8086:2d93] type 00 class 0x060000
pci 0000:ff:02.4: [8086:2d94] type 00 class 0x060000
pci 0000:ff:02.5: [8086:2d95] type 00 class 0x060000
pci 0000:ff:03.0: [8086:2d98] type 00 class 0x060000
pci 0000:ff:03.1: [8086:2d99] type 00 class 0x060000
pci 0000:ff:03.2: [8086:2d9a] type 00 class 0x060000
pci 0000:ff:03.4: [8086:2d9c] type 00 class 0x060000
pci 0000:ff:04.0: [8086:2da0] type 00 class 0x060000
pci 0000:ff:04.1: [8086:2da1] type 00 class 0x060000
pci 0000:ff:04.2: [8086:2da2] type 00 class 0x060000
pci 0000:ff:04.3: [8086:2da3] type 00 class 0x060000
pci 0000:ff:05.0: [8086:2da8] type 00 class 0x060000
pci 0000:ff:05.1: [8086:2da9] type 00 class 0x060000
pci 0000:ff:05.2: [8086:2daa] type 00 class 0x060000
pci 0000:ff:05.3: [8086:2dab] type 00 class 0x060000
pci 0000:ff:06.0: [8086:2db0] type 00 class 0x060000
pci 0000:ff:06.1: [8086:2db1] type 00 class 0x060000
pci 0000:ff:06.2: [8086:2db2] type 00 class 0x060000
pci 0000:ff:06.3: [8086:2db3] type 00 class 0x060000
pci_bus 0000:ff: busn_res: [bus ff] end is updated to ff
PCI: pci_cache_line_size set to 64 bytes
e820: reserve RAM buffer [mem 0x0009d000-0x0009ffff]
e820: reserve RAM buffer [mem 0x3f790000-0x3fffffff]
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
Switching to clocksource xen
pnp: PnP ACPI init
ACPI: bus type PNP registered
system 00:00: [mem 0xfbf00000-0xfbffffff] has been reserved
system 00:00: [mem 0xfc000000-0xfcffffff] has been reserved
system 00:00: [mem 0xfd000000-0xfdffffff] has been reserved
system 00:00: [mem 0xfe000000-0xfebfffff] has been reserved
system 00:00: [mem 0xfec8a000-0xfec8afff] could not be reserved
system 00:00: [mem 0xfed10000-0xfed10fff] has been reserved
system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
pnp 00:01: [dma 4]
pnp 00:01: Plug and Play ACPI device, IDs PNP0200 (active)
xen: registering gsi 8 triggering 1 polarity 0
pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active)
pnp 00:03: Plug and Play ACPI device, IDs PNP0800 (active)
xen: registering gsi 13 triggering 1 polarity 0
pnp 00:04: Plug and Play ACPI device, IDs PNP0c04 (active)
system 00:05: [io 0x0a00-0x0adf] has been reserved
system 00:05: [io 0x0ae0-0x0aef] has been reserved
system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active)
system 00:06: [io 0x04d0-0x04d1] has been reserved
system 00:06: [io 0x0800-0x087f] has been reserved
system 00:06: [io 0x0500-0x057f] has been reserved
system 00:06: [mem 0xfed1c000-0xfed1ffff] has been reserved
system 00:06: [mem 0xfed20000-0xfed3ffff] has been reserved
system 00:06: [mem 0xfed40000-0xfed8ffff] has been reserved
system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:07: Plug and Play ACPI device, IDs PNP0103 (active)
system 00:08: [mem 0xfec00000-0xfec00fff] could not be reserved
system 00:08: [mem 0xfee00000-0xfee00fff] has been reserved
system 00:08: Plug and Play ACPI device, IDs PNP0c02 (active)
system 00:09: [mem 0xe0000000-0xefffffff] has been reserved
system 00:09: Plug and Play ACPI device, IDs PNP0c02 (active)
system 00:0a: [mem 0x00000000-0x0009ffff] could not be reserved
system 00:0a: [mem 0x000c0000-0x000cffff] could not be reserved
system 00:0a: [mem 0x000e0000-0x000fffff] could not be reserved
system 00:0a: [mem 0x00100000-0x3fffffff] could not be reserved
system 00:0a: [mem 0xfed90000-0xffffffff] could not be reserved
system 00:0a: Plug and Play ACPI device, IDs PNP0c01 (active)
pnp: PnP ACPI: found 11 devices
ACPI: bus type PNP unregistered
PM-Timer failed consistency check (0x0xffffff) - aborting.
pci 0000:00:1c.0: bridge window [io 0x1000-0x0fff] to [bus 04] add_size 1000
pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 04] add_size 200000
pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 04] add_size 200000
pci 0000:00:1c.2: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03] add_size 200000
pci 0000:00:1c.4: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 02] add_size 200000
pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x000fffff] get_res_add_size add_size 200000
pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
pci 0000:00:1c.2: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
pci 0000:00:1c.4: res[15]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
pci 0000:00:1c.0: res[13]=[io 0x1000-0x0fff] get_res_add_size add_size 1000
pci 0000:00:1c.0: BAR 14: assigned [mem 0x40000000-0x401fffff]
pci 0000:00:1c.0: BAR 15: assigned [mem 0x40200000-0x403fffff 64bit pref]
pci 0000:00:1c.2: BAR 15: assigned [mem 0x40400000-0x405fffff 64bit pref]
pci 0000:00:1c.4: BAR 15: assigned [mem 0x40600000-0x407fffff 64bit pref]
pci 0000:00:1c.0: BAR 13: assigned [io 0x1000-0x1fff]
pci 0000:00:02.0: PCI bridge to [bus 0f]
pci 0000:00:02.0: bridge window [mem 0xfbe00000-0xfbefffff]
pci 0000:0a:00.0: PCI bridge to [bus 0e]
pci 0000:0a:00.0: bridge window [io 0xe000-0xefff]
pci 0000:0a:00.0: bridge window [mem 0xd7f00000-0xdfffffff]
pci 0000:0a:00.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:0c:00.0: PCI bridge to [bus 0d]
pci 0000:0c:00.0: bridge window [mem 0xd7e00000-0xd7efffff]
pci 0000:0a:01.0: PCI bridge to [bus 0c-0d]
pci 0000:0a:01.0: bridge window [mem 0xd7e00000-0xd7efffff]
pci 0000:0a:02.0: PCI bridge to [bus 0b]
pci 0000:09:00.0: PCI bridge to [bus 0a-0e]
pci 0000:09:00.0: bridge window [io 0xe000-0xefff]
pci 0000:09:00.0: bridge window [mem 0xd7e00000-0xdfffffff]
pci 0000:09:00.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:00:03.0: PCI bridge to [bus 09-0e]
pci 0000:00:03.0: bridge window [io 0xe000-0xefff]
pci 0000:00:03.0: bridge window [mem 0xd7e00000-0xdfffffff]
pci 0000:00:03.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:06:00.0: PCI bridge to [bus 08]
pci 0000:06:00.0: bridge window [io 0xd000-0xdfff]
pci 0000:06:00.0: bridge window [mem 0xf8000000-0xfbdfffff]
pci 0000:06:00.0: bridge window [mem 0xb4000000-0xbfffffff 64bit pref]
pci 0000:06:02.0: PCI bridge to [bus 07]
pci 0000:06:02.0: bridge window [io 0xc000-0xcfff]
pci 0000:06:02.0: bridge window [mem 0xf4000000-0xf7ffffff]
pci 0000:06:02.0: bridge window [mem 0xa8000000-0xb3ffffff 64bit pref]
pci 0000:05:00.0: PCI bridge to [bus 06-08]
pci 0000:05:00.0: bridge window [io 0xc000-0xdfff]
pci 0000:05:00.0: bridge window [mem 0xf4000000-0xfbdfffff]
pci 0000:05:00.0: bridge window [mem 0xa8000000-0xbfffffff 64bit pref]
pci 0000:00:07.0: PCI bridge to [bus 05-08]
pci 0000:00:07.0: bridge window [io 0xc000-0xdfff]
pci 0000:00:07.0: bridge window [mem 0xf4000000-0xfbdfffff]
pci 0000:00:07.0: bridge window [mem 0xa8000000-0xbfffffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04]
pci 0000:00:1c.0: bridge window [io 0x1000-0x1fff]
pci 0000:00:1c.0: bridge window [mem 0x40000000-0x401fffff]
pci 0000:00:1c.0: bridge window [mem 0x40200000-0x403fffff 64bit pref]
pci 0000:00:1c.2: PCI bridge to [bus 03]
pci 0000:00:1c.2: bridge window [io 0xb000-0xbfff]
pci 0000:00:1c.2: bridge window [mem 0xf3f00000-0xf3ffffff]
pci 0000:00:1c.2: bridge window [mem 0x40400000-0x405fffff 64bit pref]
pci 0000:00:1c.4: PCI bridge to [bus 02]
pci 0000:00:1c.4: bridge window [io 0xa000-0xafff]
pci 0000:00:1c.4: bridge window [mem 0xf3e00000-0xf3efffff]
pci 0000:00:1c.4: bridge window [mem 0x40600000-0x407fffff 64bit pref]
pci 0000:00:1e.0: PCI bridge to [bus 01]
pci 0000:00:1c.0: enabling device (0104 -> 0107)
xen: registering gsi 17 triggering 0 polarity 1
xen: --> pirq=17 -> irq=17 (gsi=17)
xen: registering gsi 18 triggering 0 polarity 1
xen: --> pirq=18 -> irq=18 (gsi=18)
xen: registering gsi 17 triggering 0 polarity 1
Already setup the GSI :17
pci 0000:00:1e.0: setting latency timer to 64
pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7]
pci_bus 0000:00: resource 5 [io 0x0d00-0xffff]
pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: resource 7 [mem 0x000d0000-0x000dffff]
pci_bus 0000:00: resource 8 [mem 0x40000000-0xdfffffff]
pci_bus 0000:00: resource 9 [mem 0xf0000000-0xfed8ffff]
pci_bus 0000:0f: resource 1 [mem 0xfbe00000-0xfbefffff]
pci_bus 0000:09: resource 0 [io 0xe000-0xefff]
pci_bus 0000:09: resource 1 [mem 0xd7e00000-0xdfffffff]
pci_bus 0000:09: resource 2 [mem 0xc0000000-0xcfffffff 64bit pref]
pci_bus 0000:0a: resource 0 [io 0xe000-0xefff]
pci_bus 0000:0a: resource 1 [mem 0xd7e00000-0xdfffffff]
pci_bus 0000:0a: resource 2 [mem 0xc0000000-0xcfffffff 64bit pref]
pci_bus 0000:0e: resource 0 [io 0xe000-0xefff]
pci_bus 0000:0e: resource 1 [mem 0xd7f00000-0xdfffffff]
pci_bus 0000:0e: resource 2 [mem 0xc0000000-0xcfffffff 64bit pref]
pci_bus 0000:0c: resource 1 [mem 0xd7e00000-0xd7efffff]
pci_bus 0000:0d: resource 1 [mem 0xd7e00000-0xd7efffff]
pci_bus 0000:05: resource 0 [io 0xc000-0xdfff]
pci_bus 0000:05: resource 1 [mem 0xf4000000-0xfbdfffff]
pci_bus 0000:05: resource 2 [mem 0xa8000000-0xbfffffff 64bit pref]
pci_bus 0000:06: resource 0 [io 0xc000-0xdfff]
pci_bus 0000:06: resource 1 [mem 0xf4000000-0xfbdfffff]
pci_bus 0000:06: resource 2 [mem 0xa8000000-0xbfffffff 64bit pref]
pci_bus 0000:08: resource 0 [io 0xd000-0xdfff]
pci_bus 0000:08: resource 1 [mem 0xf8000000-0xfbdfffff]
pci_bus 0000:08: resource 2 [mem 0xb4000000-0xbfffffff 64bit pref]
pci_bus 0000:07: resource 0 [io 0xc000-0xcfff]
pci_bus 0000:07: resource 1 [mem 0xf4000000-0xf7ffffff]
pci_bus 0000:07: resource 2 [mem 0xa8000000-0xb3ffffff 64bit pref]
pci_bus 0000:04: resource 0 [io 0x1000-0x1fff]
pci_bus 0000:04: resource 1 [mem 0x40000000-0x401fffff]
pci_bus 0000:04: resource 2 [mem 0x40200000-0x403fffff 64bit pref]
pci_bus 0000:03: resource 0 [io 0xb000-0xbfff]
pci_bus 0000:03: resource 1 [mem 0xf3f00000-0xf3ffffff]
pci_bus 0000:03: resource 2 [mem 0x40400000-0x405fffff 64bit pref]
pci_bus 0000:02: resource 0 [io 0xa000-0xafff]
pci_bus 0000:02: resource 1 [mem 0xf3e00000-0xf3efffff]
pci_bus 0000:02: resource 2 [mem 0x40600000-0x407fffff 64bit pref]
pci_bus 0000:01: resource 4 [io 0x0000-0x0cf7]
pci_bus 0000:01: resource 5 [io 0x0d00-0xffff]
pci_bus 0000:01: resource 6 [mem 0x000a0000-0x000bffff]
pci_bus 0000:01: resource 7 [mem 0x000d0000-0x000dffff]
pci_bus 0000:01: resource 8 [mem 0x40000000-0xdfffffff]
pci_bus 0000:01: resource 9 [mem 0xf0000000-0xfed8ffff]
pci_bus 0000:fe: resource 4 [io 0x0000-0xffff]
pci_bus 0000:fe: resource 5 [mem 0x00000000-0xffffffffff]
pci_bus 0000:ff: resource 4 [io 0x0000-0xffff]
pci_bus 0000:ff: resource 5 [mem 0x00000000-0xffffffffff]
NET: Registered protocol family 2
TCP established hash table entries: 524288 (order: 11, 8388608 bytes)
TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
TCP: Hash tables configured (established 524288 bind 65536)
TCP: reno registered
UDP hash table entries: 32768 (order: 8, 1048576 bytes)
UDP-Lite hash table entries: 32768 (order: 8, 1048576 bytes)
NET: Registered protocol family 1
xen: registering gsi 16 triggering 0 polarity 1
xen: --> pirq=16 -> irq=16 (gsi=16)
xen: registering gsi 21 triggering 0 polarity 1
xen: --> pirq=21 -> irq=21 (gsi=21)
xen: registering gsi 19 triggering 0 polarity 1
xen: --> pirq=19 -> irq=19 (gsi=19)
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
xen: registering gsi 23 triggering 0 polarity 1
xen: --> pirq=23 -> irq=23 (gsi=23)
xen: registering gsi 19 triggering 0 polarity 1
Already setup the GSI :19
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
xen: registering gsi 23 triggering 0 polarity 1
Already setup the GSI :23
xen: registering gsi 29 triggering 0 polarity 1
xen: --> pirq=29 -> irq=29 (gsi=29)
pci 0000:0e:00.0: Boot video device
PCI: CLS 256 bytes, default 64
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 67828k freed
Initialise module verification
audit: initializing netlink socket (disabled)
type=2000 audit(1374702399.936:1): initialized
bounce pool size: 64 pages
HugeTLB registered 2 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
msgmni has been set to 32768
Key type asymmetric registered
Asymmetric key parser 'x509' registered
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
io scheduler noop registered
io scheduler deadline registered (default)
io scheduler cfq registered
aer 0000:00:02.0:pcie02: service driver aer loaded
aer 0000:00:03.0:pcie02: service driver aer loaded
aer 0000:00:07.0:pcie02: service driver aer loaded
pcieport 0000:00:02.0: Signaling PME through PCIe PME interrupt
pci 0000:0f:00.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:02.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:03.0: Signaling PME through PCIe PME interrupt
pcieport 0000:09:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:0a:00.0: Signaling PME through PCIe PME interrupt
pci 0000:0e:00.0: Signaling PME through PCIe PME interrupt
pci 0000:0e:00.1: Signaling PME through PCIe PME interrupt
pcieport 0000:0a:01.0: Signaling PME through PCIe PME interrupt
pci 0000:0c:00.0: Signaling PME through PCIe PME interrupt
pci 0000:0d:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:0a:02.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:03.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:07.0: Signaling PME through PCIe PME interrupt
pcieport 0000:05:00.0: Signaling PME through PCIe PME interrupt
pcieport 0000:06:00.0: Signaling PME through PCIe PME interrupt
pci 0000:08:00.0: Signaling PME through PCIe PME interrupt
pci 0000:08:00.1: Signaling PME through PCIe PME interrupt
pcieport 0000:06:02.0: Signaling PME through PCIe PME interrupt
pci 0000:07:00.0: Signaling PME through PCIe PME interrupt
pci 0000:07:00.1: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:07.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
pcieport 0000:00:1c.2: Signaling PME through PCIe PME interrupt
pci 0000:03:00.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:1c.2:pcie01: service driver pcie_pme loaded
pcieport 0000:00:1c.4: Signaling PME through PCIe PME interrupt
pci 0000:02:00.0: Signaling PME through PCIe PME interrupt
pcie_pme 0000:00:1c.4:pcie01: service driver pcie_pme loaded
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
intel_idle: MWAIT substates: 0x1120
intel_idle: v0.4 model 0x2C
intel_idle: lapic_timer_reliable_states 0xffffffff
intel_idle: intel_idle yielding to none
input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input0
ACPI: Power Button [PWRB]
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1
ACPI: Power Button [PWRF]
ACPI: Requesting acpi_cpufreq
Monitor-Mwait will be used to enter C-1 state
Monitor-Mwait will be used to enter C-3 state
Monitor-Mwait will be used to enter C-3 state
Warning: Processor Platform Limit not supported.
GHES: HEST is not enabled!
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
hpet_acpi_add: no address or irqs in _CRS
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
brd: module loaded
loop: module loaded
libphy: Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
ehci-pci 0000:00:1a.7: setting latency timer to 64
ehci-pci 0000:00:1a.7: EHCI Host Controller
ehci-pci 0000:00:1a.7: new USB bus registered, assigned bus number 1
ehci-pci 0000:00:1a.7: debug port 1
ehci-pci 0000:00:1a.7: cache line size of 256 is not supported
ehci-pci 0000:00:1a.7: irq 18, io mem 0xf3df8000
ehci-pci 0000:00:1a.7: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: EHCI Host Controller
usb usb1: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 ehci_hcd
usb usb1: SerialNumber: 0000:00:1a.7
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 6 ports detected
xen: registering gsi 23 triggering 0 polarity 1
Already setup the GSI :23
ehci-pci 0000:00:1d.7: setting latency timer to 64
ehci-pci 0000:00:1d.7: EHCI Host Controller
ehci-pci 0000:00:1d.7: new USB bus registered, assigned bus number 2
ehci-pci 0000:00:1d.7: debug port 1
ehci-pci 0000:00:1d.7: cache line size of 256 is not supported
ehci-pci 0000:00:1d.7: irq 23, io mem 0xf3dfa000
ehci-pci 0000:00:1d.7: USB 2.0 started, EHCI 1.00
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: EHCI Host Controller
usb usb2: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 ehci_hcd
usb usb2: SerialNumber: 0000:00:1d.7
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 6 ports detected
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
xen: registering gsi 16 triggering 0 polarity 1
Already setup the GSI :16
uhci_hcd 0000:00:1a.0: setting latency timer to 64
uhci_hcd 0000:00:1a.0: UHCI Host Controller
uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 3
uhci_hcd 0000:00:1a.0: irq 16, io base 0x00009980
usb usb3: New USB device found, idVendor=1d6b, idProduct=0001
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb3: Product: UHCI Host Controller
usb usb3: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb3: SerialNumber: 0000:00:1a.0
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 2 ports detected
xen: registering gsi 21 triggering 0 polarity 1
Already setup the GSI :21
uhci_hcd 0000:00:1a.1: setting latency timer to 64
uhci_hcd 0000:00:1a.1: UHCI Host Controller
uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4
uhci_hcd 0000:00:1a.1: irq 21, io base 0x00009a00
usb usb4: New USB device found, idVendor=1d6b, idProduct=0001
usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb4: Product: UHCI Host Controller
usb usb4: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb4: SerialNumber: 0000:00:1a.1
hub 4-0:1.0: USB hub found
hub 4-0:1.0: 2 ports detected
xen: registering gsi 19 triggering 0 polarity 1
Already setup the GSI :19
uhci_hcd 0000:00:1a.2: setting latency timer to 64
uhci_hcd 0000:00:1a.2: UHCI Host Controller
uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5
uhci_hcd 0000:00:1a.2: irq 19, io base 0x00009a80
usb usb5: New USB device found, idVendor=1d6b, idProduct=0001
usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb5: Product: UHCI Host Controller
usb usb5: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb5: SerialNumber: 0000:00:1a.2
hub 5-0:1.0: USB hub found
hub 5-0:1.0: 2 ports detected
xen: registering gsi 23 triggering 0 polarity 1
Already setup the GSI :23
uhci_hcd 0000:00:1d.0: setting latency timer to 64
uhci_hcd 0000:00:1d.0: UHCI Host Controller
uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6
uhci_hcd 0000:00:1d.0: irq 23, io base 0x00009b00
usb usb6: New USB device found, idVendor=1d6b, idProduct=0001
usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb6: Product: UHCI Host Controller
usb usb6: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb6: SerialNumber: 0000:00:1d.0
hub 6-0:1.0: USB hub found
hub 6-0:1.0: 2 ports detected
xen: registering gsi 19 triggering 0 polarity 1
Already setup the GSI :19
uhci_hcd 0000:00:1d.1: setting latency timer to 64
uhci_hcd 0000:00:1d.1: UHCI Host Controller
uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7
uhci_hcd 0000:00:1d.1: irq 19, io base 0x00009b80
usb usb7: New USB device found, idVendor=1d6b, idProduct=0001
usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb7: Product: UHCI Host Controller
usb usb7: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb7: SerialNumber: 0000:00:1d.1
hub 7-0:1.0: USB hub found
hub 7-0:1.0: 2 ports detected
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
uhci_hcd 0000:00:1d.2: setting latency timer to 64
uhci_hcd 0000:00:1d.2: UHCI Host Controller
uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8
uhci_hcd 0000:00:1d.2: irq 18, io base 0x00009c00
usb usb8: New USB device found, idVendor=1d6b, idProduct=0001
usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb8: Product: UHCI Host Controller
usb usb8: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 uhci_hcd
usb usb8: SerialNumber: 0000:00:1d.2
hub 8-0:1.0: USB hub found
hub 8-0:1.0: 2 ports detected
i8042: PNP: No PS/2 controller found. Probing ports directly.
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mousedev: PS/2 mouse device common for all mice
rtc_cmos 00:02: RTC can wake from S4
rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0
rtc_cmos 00:02: alarms up to one month, y3k, 114 bytes nvram
EFI Variables Facility v0.08 2004-May-17
hidraw: raw HID events driver (C) Jiri Kosina
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
drop_monitor: Initializing network drop monitor service
TCP: cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
Loading module verification certificates
MODSIGN: Loaded cert 'Magrathea: Glacier signing key: 37cced82f1f9fd38d8ceb662cc0603433dd14ab8'
registered taskstats version 1
IMA: No TPM chip found, activating TPM-bypass!
rtc_cmos 00:02: setting system clock to 2013-07-24 21:46:39 UTC (1374702399)
Freeing unused kernel memory: 1732k freed
dracut: dracut-004-53.el6
dracut: rd_NO_LUKS: removing cryptoluks activation
dracut: rd_NO_LVM: removing LVM activation
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.24.0-ioctl (2013-01-15) initialised: dm-devel@redhat.com
udev: starting version 147
udevd (200): /proc/200/oom_adj is deprecated, please use /proc/200/oom_score_adj instead.
[drm] Initialized drm 1.1.0 20060810
[drm] radeon kernel modesetting enabled.
xen: registering gsi 24 triggering 0 polarity 1
xen: --> pirq=24 -> irq=24 (gsi=24)
[drm] initializing kernel modesetting (RV770 0x1002:0x9442 0x174B:0xE810).
[drm] register mmio base: 0xD8000000
[drm] register mmio size: 65536
ATOM BIOS: Wekiva
radeon 0000:0e:00.0: VRAM: 1024M 0x0000000000000000 - 0x000000003FFFFFFF (1024M used)
radeon 0000:0e:00.0: GTT: 512M 0x0000000040000000 - 0x000000005FFFFFFF
[drm] Detected VRAM RAM=1024M, BAR=256M
[drm] RAM width 256bits DDR
[TTM] Zone kernel: Available graphics memory: 24286930 kiB
[TTM] Zone dma32: Available graphics memory: 2097152 kiB
[TTM] Initializing pool allocator
[TTM] Initializing DMA pool allocator
[drm] radeon: 1024M of VRAM memory ready
[drm] radeon: 512M of GTT memory ready.
[drm] GART: num cpu pages 131072, num gpu pages 131072
[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0
[drm] Loading RV770 Microcode
[drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
radeon 0000:0e:00.0: WB enabled
radeon 0000:0e:00.0: fence driver on ring 0 use gpu addr 0x0000000040000c00 and cpu addr 0xffff880c47d4cc00
radeon 0000:0e:00.0: fence driver on ring 3 use gpu addr 0x0000000040000c0c and cpu addr 0xffff880c47d4cc0c
[drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[drm] Driver supports precise vblank timestamp query.
radeon 0000:0e:00.0: radeon: using MSI.
[drm] radeon: irq initialized.
[drm] ring test on 0 succeeded in 1 usecs
[drm] ring test on 3 succeeded in 1 usecs
[drm] ib test on ring 0 succeeded in 0 usecs
[drm] ib test on ring 3 succeeded in 0 usecs
[drm] Radeon Display Connectors
[drm] Connector 0:
[drm] DVI-I-1
[drm] HPD1
[drm] DDC: 0x7e60 0x7e60 0x7e64 0x7e64 0x7e68 0x7e68 0x7e6c 0x7e6c
[drm] Encoders:
[drm] DFP1: INTERNAL_UNIPHY
[drm] CRT2: INTERNAL_KLDSCP_DAC2
[drm] Connector 1:
[drm] DIN-1
[drm] Encoders:
[drm] TV1: INTERNAL_KLDSCP_DAC2
[drm] Connector 2:
[drm] DVI-I-2
[drm] HPD2
[drm] DDC: 0x7e20 0x7e20 0x7e24 0x7e24 0x7e28 0x7e28 0x7e2c 0x7e2c
[drm] Encoders:
[drm] CRT1: INTERNAL_KLDSCP_DAC1
[drm] DFP2: INTERNAL_KLDSCP_LVTMA
[drm] Internal thermal controller with fan control
[drm] radeon: power management initialized
parse error at position 4 in video mode 'edid/1920x2400'
[drm] forcing DIN-1 connector OFF
usb 2-6: new high-speed USB device number 2 using ehci-pci
[drm] fb mappable at 0xC0142000
[drm] vram apper at 0xC0000000
[drm] size 36864000
[drm] fb depth is 24
[drm] pitch is 15360
fbcon: radeondrmfb (fb0) is primary device
usb 2-6: New USB device found, idVendor=0424, idProduct=2504
usb 2-6: New USB device strings: Mfr=0, Product=0, SerialNumber=0
hub 2-6:1.0: USB hub found
hub 2-6:1.0: 3 ports detected
usb 4-1: new low-speed USB device number 2 using uhci_hcd
usb 4-1: New USB device found, idVendor=045e, idProduct=00dd
usb 4-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 4-1: Product: Comfort Curve Keyboard 2000
usb 4-1: Manufacturer: Microsoft
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:1a.1/usb4/4-1/4-1:1.0/input/input2
hid-generic 0003:045E:00DD.0001: input,hidraw0: USB HID v1.11 Keyboard [Microsoft Comfort Curve Keyboard 2000] on usb-0000:00:1a.1-1/input0
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:1a.1/usb4/4-1/4-1:1.1/input/input3
hid-generic 0003:045E:00DD.0002: input,hidraw1: USB HID v1.11 Device [Microsoft Comfort Curve Keyboard 2000] on usb-0000:00:1a.1-1/input1
usb 4-2: new full-speed USB device number 3 using uhci_hcd
usb 4-2: New USB device found, idVendor=1532, idProduct=002f
usb 4-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 4-2: Product: Razer Imperator
usb 4-2: Manufacturer: Razer
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:1a.1/usb4/4-2/4-2:1.0/input/input4
hid-generic 0003:1532:002F.0003: input,hidraw2: USB HID v1.11 Mouse [Razer Razer Imperator] on usb-0000:00:1a.1-2/input0
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:1a.1/usb4/4-2/4-2:1.1/input/input5
hid-generic 0003:1532:002F.0004: input,hidraw3: USB HID v1.11 Keyboard [Razer Razer Imperator] on usb-0000:00:1a.1-2/input1
Console: switching to colour frame buffer device 240x150
usb 2-6.1: new high-speed USB device number 3 using ehci-pci
usb 2-6.1: New USB device found, idVendor=0424, idProduct=2503
usb 2-6.1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
hub 2-6.1:1.0: USB hub found
hub 2-6.1:1.0: 3 ports detected
usb 2-6.2: new low-speed USB device number 4 using ehci-pci
usb 2-6.2: New USB device found, idVendor=045e, idProduct=0780
usb 2-6.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-6.2: Product: Comfort Curve Keyboard 3000
usb 2-6.2: Manufacturer: Microsoft
input: Microsoft Comfort Curve Keyboard 3000 as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.2/2-6.2:1.0/input/input6
hid-generic 0003:045E:0780.0005: input,hidraw4: USB HID v1.11 Keyboard [Microsoft Comfort Curve Keyboard 3000] on usb-0000:00:1d.7-6.2/input0
input: Microsoft Comfort Curve Keyboard 3000 as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.2/2-6.2:1.1/input/input7
hid-generic 0003:045E:0780.0006: input,hidraw5: USB HID v1.11 Device [Microsoft Comfort Curve Keyboard 3000] on usb-0000:00:1d.7-6.2/input1
usb 2-6.3: new full-speed USB device number 5 using ehci-pci
usb 2-6.3: New USB device found, idVendor=1532, idProduct=002f
usb 2-6.3: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-6.3: Product: Razer Imperator
usb 2-6.3: Manufacturer: Razer
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.3/2-6.3:1.0/input/input8
hid-generic 0003:1532:002F.0007: input,hidraw6: USB HID v1.11 Mouse [Razer Razer Imperator] on usb-0000:00:1d.7-6.3/input0
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.3/2-6.3:1.1/input/input9
hid-generic 0003:1532:002F.0008: input,hidraw7: USB HID v1.11 Keyboard [Razer Razer Imperator] on usb-0000:00:1d.7-6.3/input1
usb 2-6.1.1: new high-speed USB device number 6 using ehci-pci
radeon 0000:0e:00.0: fb0: radeondrmfb frame buffer device
radeon 0000:0e:00.0: registered panic notifier
[drm] Initialized radeon 2.30.0 20080528 for 0000:0e:00.0 on minor 0
dracut: Starting plymouth daemon
usb 2-6.1.1: New USB device found, idVendor=0424, idProduct=2228
usb 2-6.1.1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 2-6.1.1: Product: Flash Card Reader
usb 2-6.1.1: Manufacturer: Generic
usb 2-6.1.1: SerialNumber: 000022272228
Initializing USB Mass Storage driver...
scsi0 : usb-storage 2-6.1.1:1.0
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usb 2-6.1.2: new full-speed USB device number 7 using ehci-pci
usb 2-6.1.2: New USB device found, idVendor=0d8c, idProduct=000e
usb 2-6.1.2: New USB device strings: Mfr=0, Product=1, SerialNumber=0
usb 2-6.1.2: Product: Generic USB Audio Device
dracut: rd_NO_DM: removing DM RAID activation
sky2: driver version 1.30
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
sky2 0000:03:00.0: Yukon-2 UL 2 chip revision 0
sky2 0000:03:00.0 eth0: addr 00:1f:bc:0e:1e:3d
xen: registering gsi 16 triggering 0 polarity 1
Already setup the GSI :16
sky2 0000:02:00.0: Yukon-2 UL 2 chip revision 0
sky2 0000:02:00.0 eth1: addr 00:1f:bc:0e:1e:3e
ahci 0000:00:1f.2: version 3.0
xen: registering gsi 19 triggering 0 polarity 1
Already setup the GSI :19
ahci: SSS flag set, parallel bus scan disabled
ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 6 ports 3 Gbps 0x3f impl SATA mode
ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pio slum part ccc ems sxs
ahci 0000:00:1f.2: setting latency timer to 64
scsi1 : ahci
scsi2 : ahci
scsi3 : ahci
scsi4 : ahci
scsi5 : ahci
scsi6 : ahci
ata1: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc100 irq 221
ata2: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc180 irq 221
ata3: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc200 irq 221
ata4: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc280 irq 221
ata5: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc300 irq 221
ata6: SATA max UDMA/133 abar m2048@0xf3dfc000 port 0xf3dfc380 irq 221
scsi 0:0:0:0: Direct-Access Generic Flash HS-CF 4.49 PQ: 0 ANSI: 0
scsi 0:0:0:1: Direct-Access Generic Flash HS-COMBO 4.49 PQ: 0 ANSI: 0
ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata1.00: ATA-7: Integral SATAII and USB SSD, 02.10104, max UDMA/133
ata1.00: 498935040 sectors, multi 1: LBA48
ata1.00: configured for UDMA/133
scsi 1:0:0:0: Direct-Access ATA Integral SATAII 02.1 PQ: 0 ANSI: 5
ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata2.00: ATA-7: Integral SATAII and USB SSD, 02.10104, max UDMA/133
ata2.00: 498935040 sectors, multi 1: LBA48
ata2.00: configured for UDMA/133
scsi 2:0:0:0: Direct-Access ATA Integral SATAII 02.1 PQ: 0 ANSI: 5
ata3: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata3.00: ATA-7: Integral SATAII and USB SSD, 02.10104, max UDMA/133
ata3.00: 498935040 sectors, multi 1: LBA48
ata3.00: configured for UDMA/133
scsi 3:0:0:0: Direct-Access ATA Integral SATAII 02.1 PQ: 0 ANSI: 5
ata4: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata4.00: ATA-7: Integral SATAII and USB SSD, 02.10104, max UDMA/133
ata4.00: 498935040 sectors, multi 1: LBA48
ata4.00: configured for UDMA/133
scsi 4:0:0:0: Direct-Access ATA Integral SATAII 02.1 PQ: 0 ANSI: 5
ata5: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata5.00: ATAPI: Optiarc DVD RW AD-7280S, 1.01, max UDMA/100
ata5.00: configured for UDMA/100
scsi 5:0:0:0: CD-ROM Optiarc DVD RW AD-7280S 1.01 PQ: 0 ANSI: 5
ata6: SATA link down (SStatus 0 SControl 300)
wmi: Mapper loaded
sd 1:0:0:0: [sdc] 498935040 512-byte logical blocks: (255 GB/237 GiB)
sd 2:0:0:0: [sdd] 498935040 512-byte logical blocks: (255 GB/237 GiB)
sd 3:0:0:0: [sde] 498935040 512-byte logical blocks: (255 GB/237 GiB)
sd 4:0:0:0: [sdf] 498935040 512-byte logical blocks: (255 GB/237 GiB)
sd 3:0:0:0: [sde] Write Protect is off
sd 3:0:0:0: [sde] Mode Sense: 00 3a 00 00
sd 2:0:0:0: [sdd] Write Protect is off
sd 2:0:0:0: [sdd] Mode Sense: 00 3a 00 00
sd 4:0:0:0: [sdf] Write Protect is off
sd 4:0:0:0: [sdf] Mode Sense: 00 3a 00 00
sd 3:0:0:0: [sde] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sd 4:0:0:0: [sdf] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sd 2:0:0:0: [sdd] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sde: sde1 sde2 sde4
sd 3:0:0:0: [sde] Attached SCSI disk
sdf: sdf1 sdf9
sdd: sdd1 sdd9
sd 2:0:0:0: [sdd] Attached SCSI disk
sd 4:0:0:0: [sdf] Attached SCSI disk
sd 0:0:0:0: [sda] Attached SCSI removable disk
sd 0:0:0:1: [sdb] Attached SCSI removable disk
sd 1:0:0:0: [sdc] Write Protect is off
sd 1:0:0:0: [sdc] Mode Sense: 00 3a 00 00
sd 1:0:0:0: [sdc] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sdc: sdc1 sdc2 sdc4
sd 1:0:0:0: [sdc] Attached SCSI disk
sr0: scsi3-mmc drive: 48x/48x writer dvd-ram cd/rw xa/form2 cdda tray
cdrom: Uniform CD-ROM driver Revision: 3.20
sr 5:0:0:0: Attached scsi CD-ROM sr0
md: bind<sdc2>
md: bind<sde1>
md: bind<sde2>
md: raid1 personality registered for level 1
md/raid1:md127: active with 2 out of 2 mirrors
md127: detected capacity change from 0 to 34359664640
md127: unknown partition table
md: bind<sdc1>
md/raid1:md126: active with 2 out of 2 mirrors
md126: detected capacity change from 0 to 536842240
md126: unknown partition table
dracut: Assembling MD RAID arrays
EXT4-fs (md127): mounted filesystem with ordered data mode. Opts: (null)
dracut: Remounting /dev/disk/by-uuid/ea61c60b-8e91-4cc3-ab17-f6b5097f1e87 with -o noatime,ro
EXT4-fs (md127): mounted filesystem with ordered data mode. Opts: (null)
dracut: Mounted root filesystem /dev/md127
md126: detected capacity change from 536842240 to 0
md: md126 stopped.
md: unbind<sdc1>
md: export_rdev(sdc1)
md: unbind<sde1>
md: export_rdev(sde1)
dracut: Switching root
udev: starting version 147
xen: registering gsi 29 triggering 0 polarity 1
Already setup the GSI :29
WARNING! power/level is deprecated; use power/control instead
xhci_hcd 0000:0f:00.0: xHCI Host Controller
xhci_hcd 0000:0f:00.0: new USB bus registered, assigned bus number 9
usb usb9: New USB device found, idVendor=1d6b, idProduct=0002
usb usb9: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb9: Product: xHCI Host Controller
usb usb9: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 xhci_hcd
usb usb9: SerialNumber: 0000:0f:00.0
xHCI xhci_add_endpoint called for root hub
xHCI xhci_check_bandwidth called for root hub
hub 9-0:1.0: USB hub found
hub 9-0:1.0: 2 ports detected
xhci_hcd 0000:0f:00.0: xHCI Host Controller
xhci_hcd 0000:0f:00.0: new USB bus registered, assigned bus number 10
usb usb10: New USB device found, idVendor=1d6b, idProduct=0003
usb usb10: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb10: Product: xHCI Host Controller
usb usb10: Manufacturer: Linux 3.9.9-2.el6xen.x86_64 xhci_hcd
usb usb10: SerialNumber: 0000:0f:00.0
xHCI xhci_add_endpoint called for root hub
xHCI xhci_check_bandwidth called for root hub
hub 10-0:1.0: USB hub found
hub 10-0:1.0: 2 ports detected
usb 9-1: new low-speed USB device number 2 using xhci_hcd
usb 9-1: New USB device found, idVendor=045e, idProduct=00dd
usb 9-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 9-1: Product: Comfort Curve Keyboard 2000
usb 9-1: Manufacturer: Microsoft
usb 9-1: ep 0x81 - rounding interval to 64 microframes, ep desc says 80 microframes
usb 9-1: ep 0x82 - rounding interval to 64 microframes, ep desc says 80 microframes
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:02.0/0000:0f:00.0/usb9/9-1/9-1:1.0/input/input10
hid-generic 0003:045E:00DD.0009: input,hidraw8: USB HID v1.11 Keyboard [Microsoft Comfort Curve Keyboard 2000] on usb-0000:0f:00.0-1/input0
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:02.0/0000:0f:00.0/usb9/9-1/9-1:1.1/input/input11
hid-generic 0003:045E:00DD.000A: input,hidraw9: USB HID v1.11 Device [Microsoft Comfort Curve Keyboard 2000] on usb-0000:0f:00.0-1/input1
usb 9-2: new full-speed USB device number 3 using xhci_hcd
usb 9-2: New USB device found, idVendor=1532, idProduct=0017
usb 9-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 9-2: Product: Razer Imperator
usb 9-2: Manufacturer: Razer
xen: registering gsi 22 triggering 0 polarity 1
xen: --> pirq=22 -> irq=22 (gsi=22)
input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/input/input12
input: HDA Intel Line as /devices/pci0000:00/0000:00:1b.0/sound/card0/input13
input: HDA Intel Rear Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input14
input: HDA Intel Front Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input15
input: HDA Intel Line Out Side as /devices/pci0000:00/0000:00:1b.0/sound/card0/input16
input: HDA Intel Line Out CLFE as /devices/pci0000:00/0000:00:1b.0/sound/card0/input17
input: HDA Intel Line Out Surround as /devices/pci0000:00/0000:00:1b.0/sound/card0/input18
input: HDA Intel Line Out Front as /devices/pci0000:00/0000:00:1b.0/sound/card0/input19
xen: registering gsi 34 triggering 0 polarity 1
xen: --> pirq=34 -> irq=34 (gsi=34)
hda-intel 0000:0e:00.1: Handle VGA-switcheroo audio client
input: HDA ATI HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:00.0/0000:0e:00.1/sound/card1/input20
xen: registering gsi 34 triggering 0 polarity 1
Already setup the GSI :34
input: HDA Creative Line as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input21
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:02.0/0000:0f:00.0/usb9/9-2/9-2:1.0/input/input22
hid-generic 0003:1532:0017.000B: input,hidraw10: USB HID v1.11 Mouse [Razer Razer Imperator] on usb-0000:0f:00.0-2/input0
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:02.0/0000:0f:00.0/usb9/9-2/9-2:1.1/input/input23
hid-generic 0003:1532:0017.000C: input,hidraw11: USB HID v1.11 Keyboard [Razer Razer Imperator] on usb-0000:0f:00.0-2/input1
input: HDA Creative Mic as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input24
input: HDA Creative Front Headphone as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input25
input: HDA Creative Line Out Side as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input26
input: HDA Creative Line Out CLFE as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input27
input: HDA Creative Line Out Surround as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input28
input: HDA Creative Line Out Front as /devices/pci0000:00/0000:00:03.0/0000:09:00.0/0000:0a:01.0/0000:0c:00.0/0000:0d:00.0/sound/card2/input29
xen: registering gsi 37 triggering 0 polarity 1
xen: --> pirq=37 -> irq=37 (gsi=37)
hda_intel: Disabling MSI
hda-intel 0000:08:00.1: Handle VGA-switcheroo audio client
input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:00.0/0000:08:00.1/sound/card3/input30
input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:00.0/0000:08:00.1/sound/card3/input31
input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:00.0/0000:08:00.1/sound/card3/input32
input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:00.0/0000:08:00.1/sound/card3/input33
xen: registering gsi 38 triggering 0 polarity 1
xen: --> pirq=38 -> irq=38 (gsi=38)
hda_intel: Disabling MSI
hda-intel 0000:07:00.1: Handle VGA-switcheroo audio client
input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:02.0/0000:07:00.1/sound/card4/input34
input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:02.0/0000:07:00.1/sound/card4/input35
input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:02.0/0000:07:00.1/sound/card4/input36
input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:07.0/0000:05:00.0/0000:06:02.0/0000:07:00.1/sound/card4/input37
shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
EDAC MC: Ver: 3.0.0
EDAC MC1: Giving out device to 'i7core_edac.c' 'i7 core #1': DEV 0000:fe:03.0
EDAC PCI0: Giving out device to module 'i7core_edac' controller 'EDAC PCI controller': DEV '0000:fe:03.0' (POLLED)
EDAC MC0: Giving out device to 'i7core_edac.c' 'i7 core #0': DEV 0000:ff:03.0
EDAC PCI1: Giving out device to module 'i7core_edac' controller 'EDAC PCI controller': DEV '0000:ff:03.0' (POLLED)
EDAC i7core: Driver loaded, 2 memory controller(s) found.
ACPI Warning: 0x0000000000000828-0x000000000000082f SystemIO conflicts with Region \PMRG 1 (20130117/utaddress-251)
ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
lpc_ich: Resource conflict(s) found affecting gpio_ich
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
i801_smbus 0000:00:1f.3: SMBus using PCI Interrupt
cm109: Keymap for Komunikate KIP1000 phone loaded
input: CM109 USB driver as /devices/pci0000:00/0000:00:1d.7/usb2/2-6/2-6.1/2-6.1.2/2-6.1.2:1.3/input/input38
usbcore: registered new interface driver cm109
cm109: CM109 phone driver: 20080805 (C) Alfred E. Heggestad
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:1: Attached scsi generic sg1 type 0
sd 1:0:0:0: Attached scsi generic sg2 type 0
sd 2:0:0:0: Attached scsi generic sg3 type 0
sd 3:0:0:0: Attached scsi generic sg4 type 0
sd 4:0:0:0: Attached scsi generic sg5 type 0
sr 5:0:0:0: Attached scsi generic sg6 type 5
md: bind<sde1>
input: PC Speaker as /devices/platform/pcspkr/input/input39
microcode: CPU0 sig=0x206c0, pf=0x1, revision=0x0
md: bind<sdc1>
microcode: CPU1 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU2 sig=0x206c0, pf=0x1, revision=0x0
md/raid1:md0: active with 2 out of 2 mirrors
microcode: CPU3 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU4 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU5 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU6 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU7 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU8 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU9 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU10 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU11 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU12 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU13 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU14 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU15 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU16 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU17 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU18 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU19 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU20 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU21 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU22 sig=0x206c0, pf=0x1, revision=0x0
microcode: CPU23 sig=0x206c0, pf=0x1, revision=0x0
microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
md0: detected capacity change from 0 to 536842240
md0: unknown partition table
iTCO_vendor_support: vendor-support=0
iTCO_wdt: Intel TCO WatchDog Timer Driver v1.10
iTCO_wdt: unable to reset NO_REBOOT flag, device disabled by hardware/BIOS
spl: module verification failed: signature and/or required key missing - tainting kernel
SPL: Loaded module v0.6.1-1
zunicode: module license 'CDDL' taints kernel.
Disabling lock debugging due to kernel taint
bonding: Ethernet Channel Bonding Driver: v3.7.1 (April 27, 2011)
tun: Universal TUN/TAP device driver, 1.6
tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
Event-channel device installed.
pciback 0000:08:00.0: seizing device
pciback 0000:07:00.0: seizing device
pciback 0000:07:00.0: enabling device (0000 -> 0003)
xen: registering gsi 39 triggering 0 polarity 1
xen: --> pirq=39 -> irq=39 (gsi=39)
pciback 0000:08:00.0: enabling device (0000 -> 0003)
xen: registering gsi 30 triggering 0 polarity 1
xen: --> pirq=30 -> irq=30 (gsi=30)
xen-pciback: backend is vpci
zram: module is from the staging directory, the quality is unknown, you have been warned.
zram: Created 24 device(s) ...
Adding 2097148k swap on /dev/zram0. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram1. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram2. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram3. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram4. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram5. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram6. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram7. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram8. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram9. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram10. Priority:100 extents:1 across:2097148k SS
Adding 2097148k swap on /dev/zram11. Priority:100 extents:1 across:2097148k SS
EXT4-fs (md127): re-mounted. Opts: (null)
EXT4-fs (md0): mounted filesystem with ordered data mode. Opts: (null)
ZFS: Loaded module v0.6.1-1, ZFS pool version 5000, ZFS filesystem version 5
SPL: using hostid 0x00000000
zd0: p1
zd16: p1
zd32: p1
NET: Registered protocol family 10
IPv6: ADDRCONF(NETDEV_UP): bond0: link is not ready
bonding: bond0: Adding slave eth0.
sky2 0000:02:00.0 eth0: enabling interface
bonding: bond0: enslaving eth0 as an active interface with an up link.
IPv6: ADDRCONF(NETDEV_CHANGE): bond0: link becomes ready
bonding: bond0: Adding slave eth1.
sky2 0000:03:00.0 eth1: enabling interface
bonding: bond0: enslaving eth1 as an active interface with an up link.
Bridge firewalling registered
device bond0 entered promiscuous mode
device eth0 entered promiscuous mode
device eth1 entered promiscuous mode
br0: port 1(bond0) entered forwarding state
br0: port 1(bond0) entered forwarding state
sky2 0000:02:00.0 eth0: Link is up at 1000 Mbps, full duplex, flow control both
sky2 0000:03:00.0 eth1: Link is up at 1000 Mbps, full duplex, flow control both
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
FS-Cache: Loaded
FS-Cache: Netfs 'nfs' registered for caching
f71882fg: Found f71808e chip at 0xa10, revision 49
f71882fg f71882fg.2576: Fan: 1 is in duty-cycle mode
f71882fg f71882fg.2576: Auto pwm controlled by raw digital data, disabling pwm auto_point sysfs attributes for fan 1
f71882fg f71882fg.2576: Fan: 2 is in duty-cycle mode
f71882fg f71882fg.2576: Fan: 3 is in duty-cycle mode
uhci_hcd 0000:00:1a.0: remove, state 4
usb usb3: USB disconnect, device number 1
uhci_hcd 0000:00:1a.0: USB bus 3 deregistered
pciback 0000:00:1a.0: seizing device
xen: registering gsi 16 triggering 0 polarity 1
Already setup the GSI :16
uhci_hcd 0000:00:1a.1: remove, state 1
usb usb4: USB disconnect, device number 1
usb 4-1: USB disconnect, device number 2
usb 4-2: USB disconnect, device number 3
uhci_hcd 0000:00:1a.1: USB bus 4 deregistered
pciback 0000:00:1a.1: seizing device
xen: registering gsi 21 triggering 0 polarity 1
Already setup the GSI :21
uhci_hcd 0000:00:1d.2: remove, state 4
usb usb8: USB disconnect, device number 1
uhci_hcd 0000:00:1d.2: USB bus 8 deregistered
pciback 0000:00:1d.2: seizing device
xen: registering gsi 18 triggering 0 polarity 1
Already setup the GSI :18
ehci-pci 0000:00:1d.7: remove, state 1
usb usb2: USB disconnect, device number 1
usb 2-6: USB disconnect, device number 2
usb 2-6.1: USB disconnect, device number 3
usb 2-6.1.1: USB disconnect, device number 6
usb 2-6.1.2: USB disconnect, device number 7
cm109 2-6.1.2:1.3: cm109_toggle_buzzer_sync: usb_control_msg() failed -19
usb 2-6.2: USB disconnect, device number 4
usb 2-6.3: USB disconnect, device number 5
ehci-pci 0000:00:1d.7: USB bus 2 deregistered
pciback 0000:00:1d.7: seizing device
xen: registering gsi 23 triggering 0 polarity 1
Already setup the GSI :23
pciback 0000:07:00.1: seizing device
xen: registering gsi 38 triggering 0 polarity 1
Already setup the GSI :38
pciback 0000:08:00.1: seizing device
xen: registering gsi 37 triggering 0 polarity 1
Already setup the GSI :37
pciback 0000:0d:00.0: seizing device
xen: registering gsi 34 triggering 0 polarity 1
Already setup the GSI :34
vgaarb: device changed decodes: PCI:0000:0e:00.0,olddecodes=io+mem,decodes=none:owns=io+mem
vgaarb: transferring owner from PCI:0000:0e:00.0 to PCI:0000:07:00.0
fuse init (API version 7.21)
hda-intel: IRQ timing workaround is activated for card #1. Suggest a bigger bdl_pos_adj.
hda-intel: IRQ timing workaround is activated for card #0. Suggest a bigger bdl_pos_adj.
[-- Attachment #4: edi.2GB --]
[-- Type: text/plain, Size: 622 bytes --]
name="edi"
description="None"
uuid="a57e6840-e9f5-4a14-a822-b2cc662c177f"
memory=2048
maxmem=2048
vcpus=8
cpus="0-7"
on_poweroff="destroy"
on_reboot="restart"
on_crash="destroy"
localtime=1
keymap="en-gb"
builder="hvm"
device_model_override="/usr/lib/xen/bin/qemu-dm"
device_model_version="qemu-xen-traditional"
boot="c"
disk=[ '/dev/zvol/ssd/edi,raw,hda,rw' ]
vif=[ 'mac=00:16:3e:4e:c5:0c,bridge=br0,model=e1000', ]
sdl=0
stdvga=1
vnc=1
audio=0
viridian=1
usb=1
acpi=1
apic=1
pae=1
serial="pty"
gfx_passthru=0
pci = [ '00:1a.1', '0d:00.0', '08:00.0', '08:00.1' ]
xen_platform_pci=1
pci_msitranslate=1
[-- Attachment #5: edi.8GB --]
[-- Type: text/plain, Size: 622 bytes --]
name="edi"
description="None"
uuid="a57e6840-e9f5-4a14-a822-b2cc662c177f"
memory=8192
maxmem=8192
vcpus=8
cpus="0-7"
on_poweroff="destroy"
on_reboot="restart"
on_crash="destroy"
localtime=1
keymap="en-gb"
builder="hvm"
device_model_override="/usr/lib/xen/bin/qemu-dm"
device_model_version="qemu-xen-traditional"
boot="c"
disk=[ '/dev/zvol/ssd/edi,raw,hda,rw' ]
vif=[ 'mac=00:16:3e:4e:c5:0c,bridge=br0,model=e1000', ]
sdl=0
stdvga=1
vnc=1
audio=0
viridian=1
usb=1
acpi=1
apic=1
pae=1
serial="pty"
gfx_passthru=0
pci = [ '00:1a.1', '0d:00.0', '08:00.0', '08:00.1' ]
xen_platform_pci=1
pci_msitranslate=1
[-- Attachment #6: qemu-dm-edi.log.2GB --]
[-- Type: text/plain, Size: 8001 bytes --]
domid: 1
Using file /dev/zvol/ssd/edi in read-write mode
Watching /local/domain/0/device-model/1/logdirty/cmd
Watching /local/domain/0/device-model/1/command
Watching /local/domain/1/cpu
char device redirected to /dev/pts/3
qemu_map_cache_init nr_buckets = 10000 size 4194304
shared page at pfn feffd
buffered io page at pfn feffb
Guest uuid = a57e6840-e9f5-4a14-a822-b2cc662c177f
populating video RAM at ff000000
mapping video RAM from ff000000
Register xen platform.
Done register platform.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
xs_read(/local/domain/0/device-model/1/xen_extended_power_mgmt): read error
xs_read(): vncpasswd get error. /vm/a57e6840-e9f5-4a14-a822-b2cc662c177f/vncpasswd.
Log-dirty: no command yet.
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
vcpu-set: watch node error.
[xenstore_process_vcpu_set_event]: /local/domain/1/cpu has no CPU!
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
xs_read(/local/domain/1/log-throttling): read error
qemu: ignoring not-understood drive `/local/domain/1/log-throttling'
medium change watch on `/local/domain/1/log-throttling' - unknown device, ignored
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 00:1a.1 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x0:0x1a.0x1
pt_register_regions: IO region registered (size=0x00000020 base_addr=0x00009a01)
pci_intx: intx=2
register_real_device: Real physical device 00:1a.1 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 0d:00.0 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0xd:0x0.0x0
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xd7efc000)
pci_intx: intx=1
register_real_device: Real physical device 0d:00.0 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.0 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x0
pt_register_regions: IO region registered (size=0x02000000 base_addr=0xf8000000)
pt_register_regions: IO region registered (size=0x08000000 base_addr=0xb800000c)
pt_register_regions: IO region registered (size=0x04000000 base_addr=0xb400000c)
pt_register_regions: IO region registered (size=0x00000080 base_addr=0x0000df81)
pt_register_regions: Expansion ROM registered (size=0x00080000 base_addr=0xfbd00000)
pt_msi_setup: msi mapped with pirq 4f
pci_intx: intx=1
register_real_device: Real physical device 08:00.0 registered successfuly!
IRQ type = MSI-INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.1 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x1
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xfbdfc000)
pt_msi_setup: msi mapped with pirq 4e
pci_intx: intx=2
register_real_device: Real physical device 08:00.1 registered successfuly!
IRQ type = MSI-INTx
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=1
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=1
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=1
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=1
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=1
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=1
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=1
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro state.
Unknown PV product 2 loaded in guest
PV driver build 1
region type 0 at [ef880000,ef8a0000).
squash iomem [ef880000, ef8a0000).
region type 1 at [c180,c1c0).
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
pt_pci_write_config: [00:05:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:06:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:08:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
shutdown requested in cpu_handle_ioreq
Issued domain 1 poweroff
[-- Attachment #7: qemu-dm-edi.log.8GB --]
[-- Type: text/plain, Size: 8001 bytes --]
domid: 1
Using file /dev/zvol/ssd/edi in read-write mode
Watching /local/domain/0/device-model/1/logdirty/cmd
Watching /local/domain/0/device-model/1/command
Watching /local/domain/1/cpu
char device redirected to /dev/pts/4
qemu_map_cache_init nr_buckets = 10000 size 4194304
shared page at pfn feffd
buffered io page at pfn feffb
Guest uuid = a57e6840-e9f5-4a14-a822-b2cc662c177f
populating video RAM at ff000000
mapping video RAM from ff000000
Register xen platform.
Done register platform.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
xs_read(/local/domain/0/device-model/1/xen_extended_power_mgmt): read error
xs_read(): vncpasswd get error. /vm/a57e6840-e9f5-4a14-a822-b2cc662c177f/vncpasswd.
Log-dirty: no command yet.
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
vcpu-set: watch node error.
[xenstore_process_vcpu_set_event]: /local/domain/1/cpu has no CPU!
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
xs_read(/local/domain/1/log-throttling): read error
qemu: ignoring not-understood drive `/local/domain/1/log-throttling'
medium change watch on `/local/domain/1/log-throttling' - unknown device, ignored
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 00:1a.1 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x0:0x1a.0x1
pt_register_regions: IO region registered (size=0x00000020 base_addr=0x00009a01)
pci_intx: intx=2
register_real_device: Real physical device 00:1a.1 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 0d:00.0 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0xd:0x0.0x0
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xd7efc000)
pci_intx: intx=1
register_real_device: Real physical device 0d:00.0 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.0 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x0
pt_register_regions: IO region registered (size=0x02000000 base_addr=0xf8000000)
pt_register_regions: IO region registered (size=0x08000000 base_addr=0xb800000c)
pt_register_regions: IO region registered (size=0x04000000 base_addr=0xb400000c)
pt_register_regions: IO region registered (size=0x00000080 base_addr=0x0000df81)
pt_register_regions: Expansion ROM registered (size=0x00080000 base_addr=0xfbd00000)
pt_msi_setup: msi mapped with pirq 4f
pci_intx: intx=1
register_real_device: Real physical device 08:00.0 registered successfuly!
IRQ type = MSI-INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.1 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x1
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xfbdfc000)
pt_msi_setup: msi mapped with pirq 4e
pci_intx: intx=2
register_real_device: Real physical device 08:00.1 registered successfuly!
IRQ type = MSI-INTx
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=1
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=1
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=1
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=1
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=1
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=1
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=1
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro state.
Unknown PV product 2 loaded in guest
PV driver build 1
region type 0 at [ef880000,ef8a0000).
squash iomem [ef880000, ef8a0000).
region type 1 at [c180,c1c0).
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
pt_pci_write_config: [00:05:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:06:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:08:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
pt_ioport_map: e_phys=c1e0 pio_base=9a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a4000 maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a0000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=df80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbdfc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=9a00 len=32 index=4 first_map=0
shutdown requested in cpu_handle_ioreq
Issued domain 1 poweroff
[-- Attachment #8: xl-dmesg.log.2GB --]
[-- Type: text/plain, Size: 22926 bytes --]
__ __ _ _ _____ ___ _ _ __
\ \/ /___ _ __ | || | |___ / / _ \ / | ___| |/ /_
\ // _ \ '_ \ | || |_ |_ \| | | |__| | / _ \ | '_ \
/ \ __/ | | | |__ _| ___) | |_| |__| || __/ | (_) |
/_/\_\___|_| |_| |_|(_)____(_)___/ |_(_)___|_|\___/
(XEN) Xen version 4.3.0 (root@shatteredsilicon.net) (gcc (GCC) 4.4.5 20110214 (Red Hat 4.4.5-6)) debug=n Tue Jul 23 14:28:40 BST 2013
(XEN) Latest ChangeSet:
(XEN) Bootloader: GNU GRUB 0.97
(XEN) Command line: noreboot dom0_vcpus_pin iommu=1 loglvl=all guest_loglvl=all unrestricted_guest=1 msi=1
(XEN) Video information:
(XEN) VGA is text mode 80x25, font 8x16
(XEN) VBE/DDC methods: V2; EDID transfer time: 1 seconds
(XEN) Disc information:
(XEN) Found 4 MBR signatures
(XEN) Found 4 EDD information structures
(XEN) Xen-e820 RAM map:
(XEN) 0000000000000000 - 000000000009d400 (usable)
(XEN) 000000000009d400 - 00000000000a0000 (reserved)
(XEN) 00000000000e0000 - 0000000000100000 (reserved)
(XEN) 0000000000100000 - 000000003f790000 (usable)
(XEN) 000000003f790000 - 000000003f79e000 (ACPI data)
(XEN) 000000003f79e000 - 000000003f7d0000 (ACPI NVS)
(XEN) 000000003f7d0000 - 000000003f7e0000 (reserved)
(XEN) 000000003f7e7000 - 0000000040000000 (reserved)
(XEN) 00000000fee00000 - 00000000fee01000 (reserved)
(XEN) 00000000ffc00000 - 0000000100000000 (reserved)
(XEN) 0000000100000000 - 0000000cc0000000 (usable)
(XEN) ACPI: RSDP 000F9F70, 0024 (r2 ACPIAM)
(XEN) ACPI: XSDT 3F790100, 0064 (r1 042413 XSDT1438 20130424 MSFT 97)
(XEN) ACPI: FACP 3F790290, 00F4 (r4 042413 FACP1438 20130424 MSFT 97)
(XEN) ACPI: DSDT 3F7904F0, 58A3 (r2 1W555 1W555A58 A58 INTL 20051117)
(XEN) ACPI: FACS 3F79E000, 0040
(XEN) ACPI: APIC 3F790390, 0118 (r2 042413 APIC1438 20130424 MSFT 97)
(XEN) ACPI: MCFG 3F7904B0, 003C (r1 042413 OEMMCFG 20130424 MSFT 97)
(XEN) ACPI: OEMB 3F79E040, 0082 (r1 042413 OEMB1438 20130424 MSFT 97)
(XEN) ACPI: SRAT 3F79A4F0, 0250 (r2 042413 OEMSRAT 1 INTL 1)
(XEN) ACPI: HPET 3F79A740, 0038 (r1 042413 OEMHPET 20130424 MSFT 97)
(XEN) ACPI: DMAR 3F79E0D0, 0120 (r1 AMI OEMDMAR 1 MSFT 97)
(XEN) ACPI: SSDT 3F7A4C70, 0363 (r1 DpgPmm CpuPm 12 INTL 20051117)
(XEN) System RAM: 49143MB (50322612kB)
(XEN) SRAT: PXM 0 -> APIC 0 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 2 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 4 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 16 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 18 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 20 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 1 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 3 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 5 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 17 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 19 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 21 -> Node 0
(XEN) SRAT: PXM 1 -> APIC 32 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 34 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 36 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 48 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 50 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 52 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 33 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 35 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 37 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 49 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 51 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 53 -> Node 1
(XEN) SRAT: Node 0 PXM 0 0-a0000
(XEN) SRAT: Node 0 PXM 0 100000-40000000
(XEN) SRAT: Node 0 PXM 0 100000000-6c0000000
(XEN) SRAT: Node 1 PXM 1 6c0000000-cc0000000
(XEN) NUMA: Allocated memnodemap from cbac1d000 - cbac2a000
(XEN) NUMA: Using 8 for the hash shift.
(XEN) Domain heap initialised DMA width 32 bits
(XEN) found SMP MP-table at 000ff780
(XEN) DMI present.
(XEN) Using APIC driver default
(XEN) ACPI: PM-Timer IO Port: 0x808
(XEN) ACPI: SLEEP INFO: pm1x_cnt[804,0], pm1x_evt[800,0]
(XEN) ACPI: wakeup_vec[3f79e00c], vec_size[20]
(XEN) ACPI: Local APIC address 0xfee00000
(XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
(XEN) Processor #0 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
(XEN) Processor #2 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)
(XEN) Processor #4 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x10] enabled)
(XEN) Processor #16 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x12] enabled)
(XEN) Processor #18 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x14] enabled)
(XEN) Processor #20 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x07] lapic_id[0x20] enabled)
(XEN) Processor #32 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x08] lapic_id[0x22] enabled)
(XEN) Processor #34 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x09] lapic_id[0x24] enabled)
(XEN) Processor #36 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x30] enabled)
(XEN) Processor #48 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x32] enabled)
(XEN) Processor #50 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x34] enabled)
(XEN) Processor #52 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x01] enabled)
(XEN) Processor #1 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x03] enabled)
(XEN) Processor #3 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0f] lapic_id[0x05] enabled)
(XEN) Processor #5 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x10] lapic_id[0x11] enabled)
(XEN) Processor #17 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x11] lapic_id[0x13] enabled)
(XEN) Processor #19 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x12] lapic_id[0x15] enabled)
(XEN) Processor #21 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x13] lapic_id[0x21] enabled)
(XEN) Processor #33 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x14] lapic_id[0x23] enabled)
(XEN) Processor #35 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x15] lapic_id[0x25] enabled)
(XEN) Processor #37 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x16] lapic_id[0x31] enabled)
(XEN) Processor #49 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x17] lapic_id[0x33] enabled)
(XEN) Processor #51 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x18] lapic_id[0x35] enabled)
(XEN) Processor #53 6:12 APIC version 21
(XEN) Overriding APIC driver with bigsmp
(XEN) ACPI: IOAPIC (id[0x06] address[0xfec00000] gsi_base[0])
(XEN) IOAPIC[0]: apic_id 6, version 32, address 0xfec00000, GSI 0-23
(XEN) ACPI: IOAPIC (id[0x07] address[0xfec8a000] gsi_base[24])
(XEN) IOAPIC[1]: apic_id 7, version 32, address 0xfec8a000, GSI 24-47
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
(XEN) ACPI: IRQ0 used by override.
(XEN) ACPI: IRQ2 used by override.
(XEN) ACPI: IRQ9 used by override.
(XEN) Enabling APIC mode: Phys. Using 2 I/O APICs
(XEN) ACPI: HPET id: 0xffffffff base: 0xfed00000
(XEN) ERST table was not found
(XEN) Using ACPI (MADT) for SMP configuration information
(XEN) SMP: Allowing 24 CPUs (0 hotplug CPUs)
(XEN) IRQ limits: 48 GSI, 4576 MSI/MSI-X
(XEN) Using scheduler: SMP Credit Scheduler (credit)
(XEN) Detected 3321.722 MHz processor.
(XEN) Initing memory sharing.
(XEN) mce_intel.c:717: MCA Capability: BCAST 1 SER 0 CMCI 1 firstbank 0 extended MCE MSR 0
(XEN) Intel machine check reporting enabled
(XEN) PCI: MCFG configuration 0: base e0000000 segment 0000 buses 00 - ff
(XEN) PCI: Not using MCFG for segment 0000 bus 00-ff
(XEN) Intel VT-d iommu 0 supported page sizes: 4kB.
(XEN) Intel VT-d Snoop Control enabled.
(XEN) Intel VT-d Dom0 DMA Passthrough not enabled.
(XEN) Intel VT-d Queued Invalidation enabled.
(XEN) Intel VT-d Interrupt Remapping not enabled.
(XEN) Intel VT-d Shared EPT tables not enabled.
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping disabled
(XEN) Enabled directed EOI with ioapic_ack_old on!
(XEN) ENABLING IO-APIC IRQs
(XEN) -> Using old ACK method
(XEN) ..TIMER: vector=0xF0 apic1=0 pin1=2 apic2=-1 pin2=-1
(XEN) Platform timer is 14.318MHz HPET
(XEN) Defaulting to alternative key handling; send 'A' to switch to normal mode.
(XEN) Allocated console ring of 256 KiB.
(XEN) mwait-idle: MWAIT substates: 0x1120
(XEN) mwait-idle: v0.4 model 0x2c
(XEN) mwait-idle: lapic_timer_reliable_states 0xffffffff
(XEN) VMX: Supported advanced features:
(XEN) - APIC MMIO access virtualisation
(XEN) - APIC TPR shadow
(XEN) - Extended Page Tables (EPT)
(XEN) - Virtual-Processor Identifiers (VPID)
(XEN) - Virtual NMI
(XEN) - MSR direct-access bitmap
(XEN) - Unrestricted Guest
(XEN) HVM: ASIDs enabled.
(XEN) HVM: VMX enabled
(XEN) HVM: Hardware Assisted Paging (HAP) detected
(XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
(XEN) Brought up 24 CPUs
(XEN) verify_tsc_reliability: TSC warp detected, disabling TSC_RELIABLE
(XEN) ACPI sleep modes: S3
(XEN) mcheck_poll: Machine check polling timer started.
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Xen kernel: 64-bit, lsb, compat32
(XEN) Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x1f70000
(XEN) PHYSICAL MEMORY ARRANGEMENT:
(XEN) Dom0 alloc.: 0000000420000000->0000000430000000 (12302033 pages to be allocated)
(XEN) Init. ramdisk: 0000000cbbdc3000->0000000cbffff400
(XEN) VIRTUAL MEMORY ARRANGEMENT:
(XEN) Loaded kernel: ffffffff81000000->ffffffff81f70000
(XEN) Init. ramdisk: ffffffff81f70000->ffffffff861ac400
(XEN) Phys-Mach map: ffffffff861ad000->ffffffff8c029870
(XEN) Start info: ffffffff8c02a000->ffffffff8c02a4b4
(XEN) Page tables: ffffffff8c02b000->ffffffff8c090000
(XEN) Boot stack: ffffffff8c090000->ffffffff8c091000
(XEN) TOTAL: ffffffff80000000->ffffffff8c400000
(XEN) ENTRY ADDRESS: ffffffff818091e0
(XEN) Dom0 has maximum 24 VCPUs
(XEN) Scrubbing Free RAM: .done.
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: All
(XEN) Guest Loglevel: All
(XEN) Xen is relinquishing VGA console.
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 272kB init memory.
(XEN) PCI add device 0000:00:00.0
(XEN) PCI add device 0000:00:02.0
(XEN) PCI add device 0000:00:03.0
(XEN) PCI add device 0000:00:07.0
(XEN) PCI add device 0000:00:13.0
(XEN) PCI add device 0000:00:14.0
(XEN) PCI add device 0000:00:14.1
(XEN) PCI add device 0000:00:14.2
(XEN) PCI add device 0000:00:14.3
(XEN) PCI add device 0000:00:1a.0
(XEN) PCI add device 0000:00:1a.1
(XEN) PCI add device 0000:00:1a.2
(XEN) PCI add device 0000:00:1a.7
(XEN) PCI add device 0000:00:1b.0
(XEN) PCI add device 0000:00:1c.0
(XEN) PCI add device 0000:00:1c.2
(XEN) PCI add device 0000:00:1c.4
(XEN) PCI add device 0000:00:1d.0
(XEN) PCI add device 0000:00:1d.1
(XEN) PCI add device 0000:00:1d.2
(XEN) PCI add device 0000:00:1d.7
(XEN) PCI add device 0000:00:1e.0
(XEN) PCI add device 0000:00:1f.0
(XEN) PCI add device 0000:00:1f.2
(XEN) PCI add device 0000:00:1f.3
(XEN) PCI add device 0000:0f:00.0
(XEN) PCI add device 0000:09:00.0
(XEN) PCI add device 0000:0a:00.0
(XEN) PCI add device 0000:0a:01.0
(XEN) PCI add device 0000:0a:02.0
(XEN) PCI add device 0000:0e:00.0
(XEN) PCI add device 0000:0e:00.1
(XEN) PCI add device 0000:0c:00.0
(XEN) PCI add device 0000:0d:00.0
(XEN) PCI add device 0000:05:00.0
(XEN) PCI add device 0000:06:00.0
(XEN) PCI add device 0000:06:02.0
(XEN) PCI add device 0000:08:00.0
(XEN) PCI add device 0000:08:00.1
(XEN) PCI add device 0000:07:00.0
(XEN) PCI add device 0000:07:00.1
(XEN) PCI add device 0000:03:00.0
(XEN) PCI add device 0000:02:00.0
(XEN) PCI add device 0000:fe:00.0
(XEN) PCI add device 0000:fe:00.1
(XEN) PCI add device 0000:fe:02.0
(XEN) PCI add device 0000:fe:02.1
(XEN) PCI add device 0000:fe:02.2
(XEN) PCI add device 0000:fe:02.3
(XEN) PCI add device 0000:fe:02.4
(XEN) PCI add device 0000:fe:02.5
(XEN) PCI add device 0000:fe:03.0
(XEN) PCI add device 0000:fe:03.1
(XEN) PCI add device 0000:fe:03.2
(XEN) PCI add device 0000:fe:03.4
(XEN) PCI add device 0000:fe:04.0
(XEN) PCI add device 0000:fe:04.1
(XEN) PCI add device 0000:fe:04.2
(XEN) PCI add device 0000:fe:04.3
(XEN) PCI add device 0000:fe:05.0
(XEN) PCI add device 0000:fe:05.1
(XEN) PCI add device 0000:fe:05.2
(XEN) PCI add device 0000:fe:05.3
(XEN) PCI add device 0000:fe:06.0
(XEN) PCI add device 0000:fe:06.1
(XEN) PCI add device 0000:fe:06.2
(XEN) PCI add device 0000:fe:06.3
(XEN) PCI add device 0000:ff:00.0
(XEN) PCI add device 0000:ff:00.1
(XEN) PCI add device 0000:ff:02.0
(XEN) PCI add device 0000:ff:02.1
(XEN) PCI add device 0000:ff:02.2
(XEN) PCI add device 0000:ff:02.3
(XEN) PCI add device 0000:ff:02.4
(XEN) PCI add device 0000:ff:02.5
(XEN) PCI add device 0000:ff:03.0
(XEN) PCI add device 0000:ff:03.1
(XEN) PCI add device 0000:ff:03.2
(XEN) PCI add device 0000:ff:03.4
(XEN) PCI add device 0000:ff:04.0
(XEN) PCI add device 0000:ff:04.1
(XEN) PCI add device 0000:ff:04.2
(XEN) PCI add device 0000:ff:04.3
(XEN) PCI add device 0000:ff:05.0
(XEN) PCI add device 0000:ff:05.1
(XEN) PCI add device 0000:ff:05.2
(XEN) PCI add device 0000:ff:05.3
(XEN) PCI add device 0000:ff:06.0
(XEN) PCI add device 0000:ff:06.1
(XEN) PCI add device 0000:ff:06.2
(XEN) PCI add device 0000:ff:06.3
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) HVM1: HVM Loader
(XEN) HVM1: Detected Xen v4.3.0
(XEN) HVM1: Xenbus rings @0xfeffc000, event channel 10
(XEN) HVM1: System requested ROMBIOS
(XEN) HVM1: CPU speed is 3322 MHz
(XEN) HVM1: Relocating guest memory for lowmem MMIO space enabled
(XEN) irq.c:270: Dom1 PCI link 0 changed 0 -> 5
(XEN) HVM1: PCI-ISA link 0 routed to IRQ5
(XEN) irq.c:270: Dom1 PCI link 1 changed 0 -> 10
(XEN) HVM1: PCI-ISA link 1 routed to IRQ10
(XEN) irq.c:270: Dom1 PCI link 2 changed 0 -> 11
(XEN) HVM1: PCI-ISA link 2 routed to IRQ11
(XEN) irq.c:270: Dom1 PCI link 3 changed 0 -> 5
(XEN) HVM1: PCI-ISA link 3 routed to IRQ5
(XEN) HVM1: pci dev 01:2 INTD->IRQ5
(XEN) HVM1: pci dev 01:3 INTA->IRQ10
(XEN) HVM1: pci dev 03:0 INTA->IRQ5
(XEN) HVM1: pci dev 04:0 INTA->IRQ5
(XEN) HVM1: pci dev 05:0 INTB->IRQ11
(XEN) HVM1: pci dev 06:0 INTA->IRQ11
(XEN) HVM1: pci dev 07:0 INTA->IRQ5
(XEN) HVM1: pci dev 08:0 INTB->IRQ10
(XEN) HVM1: No RAM in high memory; setting high_mem resource base to 100000000
(XEN) HVM1: pci dev 07:0 bar 14 size 008000000: 0e000000c
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) HVM1: pci dev 07:0 bar 1c size 004000000: 0e800000c
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) HVM1: pci dev 07:0 bar 10 size 002000000: 0ec000000
(XEN) HVM1: pci dev 03:0 bar 14 size 001000000: 0ee000008
(XEN) HVM1: pci dev 02:0 bar 10 size 000800000: 0ef000008
(XEN) HVM1: pci dev 07:0 bar 30 size 000080000: 0ef800000
(XEN) HVM1: pci dev 04:0 bar 10 size 000020000: 0ef880000
(XEN) HVM1: pci dev 06:0 bar 10 size 000004000: 0ef8a0000
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) HVM1: pci dev 08:0 bar 10 size 000004000: 0ef8a4000
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) HVM1: pci dev 03:0 bar 10 size 000000100: 00000c001
(XEN) HVM1: pci dev 07:0 bar 24 size 000000080: 00000c101
(XEN) ioport_map:add: dom1 gport=c100 mport=df80 nr=80
(XEN) HVM1: pci dev 04:0 bar 14 size 000000040: 00000c181
(XEN) HVM1: pci dev 01:2 bar 20 size 000000020: 00000c1c1
(XEN) HVM1: pci dev 05:0 bar 20 size 000000020: 00000c1e1
(XEN) ioport_map:add: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) HVM1: pci dev 01:1 bar 20 size 000000010: 00000c201
(XEN) HVM1: Multiprocessor initialisation:
(XEN) HVM1: - CPU0 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU1 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU2 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU3 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU4 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU5 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU6 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU7 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: Testing HVM environment:
(XEN) HVM1: - REP INSB across page boundaries ... passed
(XEN) HVM1: - GS base MSRs and SWAPGS ... passed
(XEN) HVM1: Passed 2 of 2 tests
(XEN) HVM1: Writing SMBIOS tables ...
(XEN) HVM1: Loading ROMBIOS ...
(XEN) HVM1: 9628 bytes of ROMBIOS high-memory extensions:
(XEN) HVM1: Relocating to 0xfc001000-0xfc00359c ... done
(XEN) HVM1: Creating MP tables ...
(XEN) HVM1: Loading Standard VGABIOS ...
(XEN) HVM1: Loading PCI Option ROM ...
(XEN) HVM1: - Manufacturer: http://ipxe.org
(XEN) HVM1: - Product name: iPXE
(XEN) HVM1: Option ROMs:
(XEN) HVM1: c0000-c9fff: VGA BIOS
(XEN) HVM1: ca000-dafff: Etherboot ROM
(XEN) HVM1: Loading ACPI ...
(XEN) HVM1: vm86 TSS at fc00f700
(XEN) HVM1: BIOS map:
(XEN) HVM1: f0000-fffff: Main BIOS
(XEN) HVM1: E820 table:
(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
(XEN) HVM1: [03]: 00000000:00100000 - 00000000:7f800000: RAM
(XEN) HVM1: HOLE: 00000000:7f800000 - 00000000:fc000000
(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
(XEN) HVM1: Invoking ROMBIOS ...
(XEN) HVM1: $Revision: 1.221 $ $Date: 2008/12/07 17:32:29 $
(XEN) stdvga.c:147:d1 entering stdvga and caching modes
(XEN) HVM1: VGABios $Id: vgabios.c,v 1.67 2008/01/27 09:44:12 vruppert Exp $
(XEN) HVM1: VBE Bios $Id: vbe.c,v 1.60 2008/03/02 07:47:21 vruppert Exp $
(XEN) HVM1: Bochs BIOS - build: 06/23/99
(XEN) HVM1: $Revision: 1.221 $ $Date: 2008/12/07 17:32:29 $
(XEN) HVM1: Options: apmbios pcibios eltorito PMM
(XEN) HVM1:
(XEN) HVM1: ata0-0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63
(XEN) HVM1: ata0 master: QEMU HARDDISK ATA-7 Hard-Disk ( 128 GBytes)
(XEN) HVM1: IDE time out
(XEN) HVM1:
(XEN) HVM1:
(XEN) HVM1:
(XEN) HVM1: Press F12 for boot menu.
(XEN) HVM1:
(XEN) HVM1: Booting from Hard Disk...
(XEN) HVM1: Booting from 0000:7c00
(XEN) HVM1: int13_harddisk: function 15, unmapped device for ELDL=81
(XEN) HVM1: *** int 15h function AX=e980, BX=0066 not yet supported!
(XEN) HVM1: *** int 15h function AX=ec00, BX=0002 not yet supported!
(XEN) irq.c:270: Dom1 PCI link 0 changed 5 -> 0
(XEN) irq.c:270: Dom1 PCI link 1 changed 10 -> 0
(XEN) irq.c:270: Dom1 PCI link 2 changed 11 -> 0
(XEN) irq.c:270: Dom1 PCI link 3 changed 5 -> 0
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom1 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom1 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) grant_table.c:1250:d1 Expanding dom (1) grant table from (4) to (32) frames.
(XEN) irq.c:375: Dom1 callback via changed to GSI 28
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom1 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom1 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=9a00 nr=20
[-- Attachment #9: xl-dmesg.log.8GB --]
[-- Type: text/plain, Size: 23235 bytes --]
__ __ _ _ _____ ___ _ _ __
\ \/ /___ _ __ | || | |___ / / _ \ / | ___| |/ /_
\ // _ \ '_ \ | || |_ |_ \| | | |__| | / _ \ | '_ \
/ \ __/ | | | |__ _| ___) | |_| |__| || __/ | (_) |
/_/\_\___|_| |_| |_|(_)____(_)___/ |_(_)___|_|\___/
(XEN) Xen version 4.3.0 (root@shatteredsilicon.net) (gcc (GCC) 4.4.5 20110214 (Red Hat 4.4.5-6)) debug=n Tue Jul 23 14:28:40 BST 2013
(XEN) Latest ChangeSet:
(XEN) Bootloader: GNU GRUB 0.97
(XEN) Command line: noreboot dom0_vcpus_pin iommu=1 loglvl=all guest_loglvl=all unrestricted_guest=1 msi=1
(XEN) Video information:
(XEN) VGA is text mode 80x25, font 8x16
(XEN) VBE/DDC methods: V2; EDID transfer time: 1 seconds
(XEN) Disc information:
(XEN) Found 4 MBR signatures
(XEN) Found 4 EDD information structures
(XEN) Xen-e820 RAM map:
(XEN) 0000000000000000 - 000000000009d400 (usable)
(XEN) 000000000009d400 - 00000000000a0000 (reserved)
(XEN) 00000000000e0000 - 0000000000100000 (reserved)
(XEN) 0000000000100000 - 000000003f790000 (usable)
(XEN) 000000003f790000 - 000000003f79e000 (ACPI data)
(XEN) 000000003f79e000 - 000000003f7d0000 (ACPI NVS)
(XEN) 000000003f7d0000 - 000000003f7e0000 (reserved)
(XEN) 000000003f7e7000 - 0000000040000000 (reserved)
(XEN) 00000000fee00000 - 00000000fee01000 (reserved)
(XEN) 00000000ffc00000 - 0000000100000000 (reserved)
(XEN) 0000000100000000 - 0000000cc0000000 (usable)
(XEN) ACPI: RSDP 000F9F70, 0024 (r2 ACPIAM)
(XEN) ACPI: XSDT 3F790100, 0064 (r1 042413 XSDT1438 20130424 MSFT 97)
(XEN) ACPI: FACP 3F790290, 00F4 (r4 042413 FACP1438 20130424 MSFT 97)
(XEN) ACPI: DSDT 3F7904F0, 58A3 (r2 1W555 1W555A58 A58 INTL 20051117)
(XEN) ACPI: FACS 3F79E000, 0040
(XEN) ACPI: APIC 3F790390, 0118 (r2 042413 APIC1438 20130424 MSFT 97)
(XEN) ACPI: MCFG 3F7904B0, 003C (r1 042413 OEMMCFG 20130424 MSFT 97)
(XEN) ACPI: OEMB 3F79E040, 0082 (r1 042413 OEMB1438 20130424 MSFT 97)
(XEN) ACPI: SRAT 3F79A4F0, 0250 (r2 042413 OEMSRAT 1 INTL 1)
(XEN) ACPI: HPET 3F79A740, 0038 (r1 042413 OEMHPET 20130424 MSFT 97)
(XEN) ACPI: DMAR 3F79E0D0, 0120 (r1 AMI OEMDMAR 1 MSFT 97)
(XEN) ACPI: SSDT 3F7A4C70, 0363 (r1 DpgPmm CpuPm 12 INTL 20051117)
(XEN) System RAM: 49143MB (50322612kB)
(XEN) SRAT: PXM 0 -> APIC 0 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 2 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 4 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 16 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 18 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 20 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 1 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 3 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 5 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 17 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 19 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 21 -> Node 0
(XEN) SRAT: PXM 1 -> APIC 32 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 34 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 36 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 48 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 50 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 52 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 33 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 35 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 37 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 49 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 51 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 53 -> Node 1
(XEN) SRAT: Node 0 PXM 0 0-a0000
(XEN) SRAT: Node 0 PXM 0 100000-40000000
(XEN) SRAT: Node 0 PXM 0 100000000-6c0000000
(XEN) SRAT: Node 1 PXM 1 6c0000000-cc0000000
(XEN) NUMA: Allocated memnodemap from cbac1d000 - cbac2a000
(XEN) NUMA: Using 8 for the hash shift.
(XEN) Domain heap initialised DMA width 32 bits
(XEN) found SMP MP-table at 000ff780
(XEN) DMI present.
(XEN) Using APIC driver default
(XEN) ACPI: PM-Timer IO Port: 0x808
(XEN) ACPI: SLEEP INFO: pm1x_cnt[804,0], pm1x_evt[800,0]
(XEN) ACPI: wakeup_vec[3f79e00c], vec_size[20]
(XEN) ACPI: Local APIC address 0xfee00000
(XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
(XEN) Processor #0 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
(XEN) Processor #2 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)
(XEN) Processor #4 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x10] enabled)
(XEN) Processor #16 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x12] enabled)
(XEN) Processor #18 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x14] enabled)
(XEN) Processor #20 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x07] lapic_id[0x20] enabled)
(XEN) Processor #32 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x08] lapic_id[0x22] enabled)
(XEN) Processor #34 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x09] lapic_id[0x24] enabled)
(XEN) Processor #36 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x30] enabled)
(XEN) Processor #48 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x32] enabled)
(XEN) Processor #50 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x34] enabled)
(XEN) Processor #52 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x01] enabled)
(XEN) Processor #1 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x03] enabled)
(XEN) Processor #3 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0f] lapic_id[0x05] enabled)
(XEN) Processor #5 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x10] lapic_id[0x11] enabled)
(XEN) Processor #17 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x11] lapic_id[0x13] enabled)
(XEN) Processor #19 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x12] lapic_id[0x15] enabled)
(XEN) Processor #21 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x13] lapic_id[0x21] enabled)
(XEN) Processor #33 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x14] lapic_id[0x23] enabled)
(XEN) Processor #35 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x15] lapic_id[0x25] enabled)
(XEN) Processor #37 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x16] lapic_id[0x31] enabled)
(XEN) Processor #49 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x17] lapic_id[0x33] enabled)
(XEN) Processor #51 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x18] lapic_id[0x35] enabled)
(XEN) Processor #53 6:12 APIC version 21
(XEN) Overriding APIC driver with bigsmp
(XEN) ACPI: IOAPIC (id[0x06] address[0xfec00000] gsi_base[0])
(XEN) IOAPIC[0]: apic_id 6, version 32, address 0xfec00000, GSI 0-23
(XEN) ACPI: IOAPIC (id[0x07] address[0xfec8a000] gsi_base[24])
(XEN) IOAPIC[1]: apic_id 7, version 32, address 0xfec8a000, GSI 24-47
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
(XEN) ACPI: IRQ0 used by override.
(XEN) ACPI: IRQ2 used by override.
(XEN) ACPI: IRQ9 used by override.
(XEN) Enabling APIC mode: Phys. Using 2 I/O APICs
(XEN) ACPI: HPET id: 0xffffffff base: 0xfed00000
(XEN) ERST table was not found
(XEN) Using ACPI (MADT) for SMP configuration information
(XEN) SMP: Allowing 24 CPUs (0 hotplug CPUs)
(XEN) IRQ limits: 48 GSI, 4576 MSI/MSI-X
(XEN) Using scheduler: SMP Credit Scheduler (credit)
(XEN) Detected 3321.755 MHz processor.
(XEN) Initing memory sharing.
(XEN) mce_intel.c:717: MCA Capability: BCAST 1 SER 0 CMCI 1 firstbank 0 extended MCE MSR 0
(XEN) Intel machine check reporting enabled
(XEN) PCI: MCFG configuration 0: base e0000000 segment 0000 buses 00 - ff
(XEN) PCI: Not using MCFG for segment 0000 bus 00-ff
(XEN) Intel VT-d iommu 0 supported page sizes: 4kB.
(XEN) Intel VT-d Snoop Control enabled.
(XEN) Intel VT-d Dom0 DMA Passthrough not enabled.
(XEN) Intel VT-d Queued Invalidation enabled.
(XEN) Intel VT-d Interrupt Remapping not enabled.
(XEN) Intel VT-d Shared EPT tables not enabled.
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping disabled
(XEN) Enabled directed EOI with ioapic_ack_old on!
(XEN) ENABLING IO-APIC IRQs
(XEN) -> Using old ACK method
(XEN) ..TIMER: vector=0xF0 apic1=0 pin1=2 apic2=-1 pin2=-1
(XEN) Platform timer is 14.318MHz HPET
(XEN) Defaulting to alternative key handling; send 'A' to switch to normal mode.
(XEN) Allocated console ring of 256 KiB.
(XEN) mwait-idle: MWAIT substates: 0x1120
(XEN) mwait-idle: v0.4 model 0x2c
(XEN) mwait-idle: lapic_timer_reliable_states 0xffffffff
(XEN) VMX: Supported advanced features:
(XEN) - APIC MMIO access virtualisation
(XEN) - APIC TPR shadow
(XEN) - Extended Page Tables (EPT)
(XEN) - Virtual-Processor Identifiers (VPID)
(XEN) - Virtual NMI
(XEN) - MSR direct-access bitmap
(XEN) - Unrestricted Guest
(XEN) HVM: ASIDs enabled.
(XEN) HVM: VMX enabled
(XEN) HVM: Hardware Assisted Paging (HAP) detected
(XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
(XEN) Brought up 24 CPUs
(XEN) verify_tsc_reliability: TSC warp detected, disabling TSC_RELIABLE
(XEN) ACPI sleep modes: S3
(XEN) mcheck_poll: Machine check polling timer started.
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Xen kernel: 64-bit, lsb, compat32
(XEN) Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x1f70000
(XEN) PHYSICAL MEMORY ARRANGEMENT:
(XEN) Dom0 alloc.: 0000000420000000->0000000430000000 (12302037 pages to be allocated)
(XEN) Init. ramdisk: 0000000cbbdc3000->0000000cbffff400
(XEN) VIRTUAL MEMORY ARRANGEMENT:
(XEN) Loaded kernel: ffffffff81000000->ffffffff81f70000
(XEN) Init. ramdisk: ffffffff81f70000->ffffffff861ac400
(XEN) Phys-Mach map: ffffffff861ad000->ffffffff8c029890
(XEN) Start info: ffffffff8c02a000->ffffffff8c02a4b4
(XEN) Page tables: ffffffff8c02b000->ffffffff8c090000
(XEN) Boot stack: ffffffff8c090000->ffffffff8c091000
(XEN) TOTAL: ffffffff80000000->ffffffff8c400000
(XEN) ENTRY ADDRESS: ffffffff818091e0
(XEN) Dom0 has maximum 24 VCPUs
(XEN) Scrubbing Free RAM: .done.
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: All
(XEN) Guest Loglevel: All
(XEN) Xen is relinquishing VGA console.
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 272kB init memory.
(XEN) PCI add device 0000:00:00.0
(XEN) PCI add device 0000:00:02.0
(XEN) PCI add device 0000:00:03.0
(XEN) PCI add device 0000:00:07.0
(XEN) PCI add device 0000:00:13.0
(XEN) PCI add device 0000:00:14.0
(XEN) PCI add device 0000:00:14.1
(XEN) PCI add device 0000:00:14.2
(XEN) PCI add device 0000:00:14.3
(XEN) PCI add device 0000:00:1a.0
(XEN) PCI add device 0000:00:1a.1
(XEN) PCI add device 0000:00:1a.2
(XEN) PCI add device 0000:00:1a.7
(XEN) PCI add device 0000:00:1b.0
(XEN) PCI add device 0000:00:1c.0
(XEN) PCI add device 0000:00:1c.2
(XEN) PCI add device 0000:00:1c.4
(XEN) PCI add device 0000:00:1d.0
(XEN) PCI add device 0000:00:1d.1
(XEN) PCI add device 0000:00:1d.2
(XEN) PCI add device 0000:00:1d.7
(XEN) PCI add device 0000:00:1e.0
(XEN) PCI add device 0000:00:1f.0
(XEN) PCI add device 0000:00:1f.2
(XEN) PCI add device 0000:00:1f.3
(XEN) PCI add device 0000:0f:00.0
(XEN) PCI add device 0000:09:00.0
(XEN) PCI add device 0000:0a:00.0
(XEN) PCI add device 0000:0a:01.0
(XEN) PCI add device 0000:0a:02.0
(XEN) PCI add device 0000:0e:00.0
(XEN) PCI add device 0000:0e:00.1
(XEN) PCI add device 0000:0c:00.0
(XEN) PCI add device 0000:0d:00.0
(XEN) PCI add device 0000:05:00.0
(XEN) PCI add device 0000:06:00.0
(XEN) PCI add device 0000:06:02.0
(XEN) PCI add device 0000:08:00.0
(XEN) PCI add device 0000:08:00.1
(XEN) PCI add device 0000:07:00.0
(XEN) PCI add device 0000:07:00.1
(XEN) PCI add device 0000:03:00.0
(XEN) PCI add device 0000:02:00.0
(XEN) PCI add device 0000:fe:00.0
(XEN) PCI add device 0000:fe:00.1
(XEN) PCI add device 0000:fe:02.0
(XEN) PCI add device 0000:fe:02.1
(XEN) PCI add device 0000:fe:02.2
(XEN) PCI add device 0000:fe:02.3
(XEN) PCI add device 0000:fe:02.4
(XEN) PCI add device 0000:fe:02.5
(XEN) PCI add device 0000:fe:03.0
(XEN) PCI add device 0000:fe:03.1
(XEN) PCI add device 0000:fe:03.2
(XEN) PCI add device 0000:fe:03.4
(XEN) PCI add device 0000:fe:04.0
(XEN) PCI add device 0000:fe:04.1
(XEN) PCI add device 0000:fe:04.2
(XEN) PCI add device 0000:fe:04.3
(XEN) PCI add device 0000:fe:05.0
(XEN) PCI add device 0000:fe:05.1
(XEN) PCI add device 0000:fe:05.2
(XEN) PCI add device 0000:fe:05.3
(XEN) PCI add device 0000:fe:06.0
(XEN) PCI add device 0000:fe:06.1
(XEN) PCI add device 0000:fe:06.2
(XEN) PCI add device 0000:fe:06.3
(XEN) PCI add device 0000:ff:00.0
(XEN) PCI add device 0000:ff:00.1
(XEN) PCI add device 0000:ff:02.0
(XEN) PCI add device 0000:ff:02.1
(XEN) PCI add device 0000:ff:02.2
(XEN) PCI add device 0000:ff:02.3
(XEN) PCI add device 0000:ff:02.4
(XEN) PCI add device 0000:ff:02.5
(XEN) PCI add device 0000:ff:03.0
(XEN) PCI add device 0000:ff:03.1
(XEN) PCI add device 0000:ff:03.2
(XEN) PCI add device 0000:ff:03.4
(XEN) PCI add device 0000:ff:04.0
(XEN) PCI add device 0000:ff:04.1
(XEN) PCI add device 0000:ff:04.2
(XEN) PCI add device 0000:ff:04.3
(XEN) PCI add device 0000:ff:05.0
(XEN) PCI add device 0000:ff:05.1
(XEN) PCI add device 0000:ff:05.2
(XEN) PCI add device 0000:ff:05.3
(XEN) PCI add device 0000:ff:06.0
(XEN) PCI add device 0000:ff:06.1
(XEN) PCI add device 0000:ff:06.2
(XEN) PCI add device 0000:ff:06.3
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) memory.c:132:d0 Could not allocate order=18 extent: id=1 memflags=0 (0 of 1)
(XEN) HVM1: HVM Loader
(XEN) HVM1: Detected Xen v4.3.0
(XEN) HVM1: Xenbus rings @0xfeffc000, event channel 10
(XEN) HVM1: System requested ROMBIOS
(XEN) HVM1: CPU speed is 3322 MHz
(XEN) HVM1: Relocating guest memory for lowmem MMIO space enabled
(XEN) irq.c:270: Dom1 PCI link 0 changed 0 -> 5
(XEN) HVM1: PCI-ISA link 0 routed to IRQ5
(XEN) irq.c:270: Dom1 PCI link 1 changed 0 -> 10
(XEN) HVM1: PCI-ISA link 1 routed to IRQ10
(XEN) irq.c:270: Dom1 PCI link 2 changed 0 -> 11
(XEN) HVM1: PCI-ISA link 2 routed to IRQ11
(XEN) irq.c:270: Dom1 PCI link 3 changed 0 -> 5
(XEN) HVM1: PCI-ISA link 3 routed to IRQ5
(XEN) HVM1: pci dev 01:2 INTD->IRQ5
(XEN) HVM1: pci dev 01:3 INTA->IRQ10
(XEN) HVM1: pci dev 03:0 INTA->IRQ5
(XEN) HVM1: pci dev 04:0 INTA->IRQ5
(XEN) HVM1: pci dev 05:0 INTB->IRQ11
(XEN) HVM1: pci dev 06:0 INTA->IRQ11
(XEN) HVM1: pci dev 07:0 INTA->IRQ5
(XEN) HVM1: pci dev 08:0 INTB->IRQ10
(XEN) HVM1: Relocating 0xffff pages from 0e0001000 to 20f800000 for lowmem MMIO hole
(XEN) HVM1: Relocating 0x1 pages from 0e0000000 to 21f7ff000 for lowmem MMIO hole
(XEN) HVM1: RAM in high memory; setting high_mem resource base to 21f800000
(XEN) HVM1: pci dev 07:0 bar 14 size 008000000: 0e000000c
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) HVM1: pci dev 07:0 bar 1c size 004000000: 0e800000c
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) HVM1: pci dev 07:0 bar 10 size 002000000: 0ec000000
(XEN) HVM1: pci dev 03:0 bar 14 size 001000000: 0ee000008
(XEN) HVM1: pci dev 02:0 bar 10 size 000800000: 0ef000008
(XEN) HVM1: pci dev 07:0 bar 30 size 000080000: 0ef800000
(XEN) HVM1: pci dev 04:0 bar 10 size 000020000: 0ef880000
(XEN) HVM1: pci dev 06:0 bar 10 size 000004000: 0ef8a0000
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) HVM1: pci dev 08:0 bar 10 size 000004000: 0ef8a4000
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) HVM1: pci dev 03:0 bar 10 size 000000100: 00000c001
(XEN) HVM1: pci dev 07:0 bar 24 size 000000080: 00000c101
(XEN) ioport_map:add: dom1 gport=c100 mport=df80 nr=80
(XEN) HVM1: pci dev 04:0 bar 14 size 000000040: 00000c181
(XEN) HVM1: pci dev 01:2 bar 20 size 000000020: 00000c1c1
(XEN) HVM1: pci dev 05:0 bar 20 size 000000020: 00000c1e1
(XEN) ioport_map:add: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) HVM1: pci dev 01:1 bar 20 size 000000010: 00000c201
(XEN) HVM1: Multiprocessor initialisation:
(XEN) HVM1: - CPU0 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU1 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU2 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU3 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU4 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU5 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU6 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU7 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: Testing HVM environment:
(XEN) HVM1: - REP INSB across page boundaries ... passed
(XEN) HVM1: - GS base MSRs and SWAPGS ... passed
(XEN) HVM1: Passed 2 of 2 tests
(XEN) HVM1: Writing SMBIOS tables ...
(XEN) HVM1: Loading ROMBIOS ...
(XEN) HVM1: 9628 bytes of ROMBIOS high-memory extensions:
(XEN) HVM1: Relocating to 0xfc001000-0xfc00359c ... done
(XEN) HVM1: Creating MP tables ...
(XEN) HVM1: Loading Standard VGABIOS ...
(XEN) HVM1: Loading PCI Option ROM ...
(XEN) HVM1: - Manufacturer: http://ipxe.org
(XEN) HVM1: - Product name: iPXE
(XEN) HVM1: Option ROMs:
(XEN) HVM1: c0000-c9fff: VGA BIOS
(XEN) HVM1: ca000-dafff: Etherboot ROM
(XEN) HVM1: Loading ACPI ...
(XEN) HVM1: vm86 TSS at fc00f700
(XEN) HVM1: BIOS map:
(XEN) HVM1: f0000-fffff: Main BIOS
(XEN) HVM1: E820 table:
(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
(XEN) HVM1: [03]: 00000000:00100000 - 00000000:e0000000: RAM
(XEN) HVM1: HOLE: 00000000:e0000000 - 00000000:fc000000
(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
(XEN) HVM1: [05]: 00000001:00000000 - 00000002:1f800000: RAM
(XEN) HVM1: Invoking ROMBIOS ...
(XEN) HVM1: $Revision: 1.221 $ $Date: 2008/12/07 17:32:29 $
(XEN) stdvga.c:147:d1 entering stdvga and caching modes
(XEN) HVM1: VGABios $Id: vgabios.c,v 1.67 2008/01/27 09:44:12 vruppert Exp $
(XEN) HVM1: VBE Bios $Id: vbe.c,v 1.60 2008/03/02 07:47:21 vruppert Exp $
(XEN) HVM1: Bochs BIOS - build: 06/23/99
(XEN) HVM1: $Revision: 1.221 $ $Date: 2008/12/07 17:32:29 $
(XEN) HVM1: Options: apmbios pcibios eltorito PMM
(XEN) HVM1:
(XEN) HVM1: ata0-0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63
(XEN) HVM1: ata0 master: QEMU HARDDISK ATA-7 Hard-Disk ( 128 GBytes)
(XEN) HVM1: IDE time out
(XEN) HVM1:
(XEN) HVM1:
(XEN) HVM1:
(XEN) HVM1: Press F12 for boot menu.
(XEN) HVM1:
(XEN) HVM1: Booting from Hard Disk...
(XEN) HVM1: Booting from 0000:7c00
(XEN) HVM1: int13_harddisk: function 15, unmapped device for ELDL=81
(XEN) HVM1: *** int 15h function AX=e980, BX=007e not yet supported!
(XEN) HVM1: *** int 15h function AX=ec00, BX=0002 not yet supported!
(XEN) irq.c:270: Dom1 PCI link 0 changed 5 -> 0
(XEN) irq.c:270: Dom1 PCI link 1 changed 10 -> 0
(XEN) irq.c:270: Dom1 PCI link 2 changed 11 -> 0
(XEN) irq.c:270: Dom1 PCI link 3 changed 5 -> 0
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom1 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom1 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) grant_table.c:1250:d1 Expanding dom (1) grant table from (4) to (32) frames.
(XEN) irq.c:375: Dom1 callback via changed to GSI 28
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom1 gport=c1e0 mport=9a00 nr=20
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom1 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom1 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=9a00 nr=20
[-- Attachment #10: xl-edi.log.2GB --]
[-- Type: text/plain, Size: 465 bytes --]
Waiting for domain edi (domid 1) to die [pid 8660]
Domain 1 has shut down, reason code 0 0x0
Action for shutdown reason code 0 is destroy
Domain 1 needs to be cleaned up: destroying the domain
libxl: error: libxl_pci.c:990:libxl__device_pci_reset: The kernel doesn't support reset from sysfs for PCI device 0000:08:00.0
libxl: error: libxl_pci.c:990:libxl__device_pci_reset: The kernel doesn't support reset from sysfs for PCI device 0000:08:00.1
Done. Exiting now
[-- Attachment #11: xl-edi.log.8GB --]
[-- Type: text/plain, Size: 465 bytes --]
Waiting for domain edi (domid 1) to die [pid 8596]
Domain 1 has shut down, reason code 0 0x0
Action for shutdown reason code 0 is destroy
Domain 1 needs to be cleaned up: destroying the domain
libxl: error: libxl_pci.c:990:libxl__device_pci_reset: The kernel doesn't support reset from sysfs for PCI device 0000:08:00.0
libxl: error: libxl_pci.c:990:libxl__device_pci_reset: The kernel doesn't support reset from sysfs for PCI device 0000:08:00.1
Done. Exiting now
[-- Attachment #12: Type: text/plain, Size: 126 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-24 22:15 ` Gordan Bobic
@ 2013-07-25 19:18 ` George Dunlap
2013-07-25 21:48 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: George Dunlap @ 2013-07-25 19:18 UTC (permalink / raw)
To: Gordan Bobic; +Cc: Andrew Cooper, xen-devel
On Wed, Jul 24, 2013 at 11:15 PM, Gordan Bobic <gordan@bobich.net> wrote:
> Attached are the logs (loglvl=all) and configs for 2GB (working) and 8GB
> (screen corruption + domU crash + sometimes dom0 crashing with it).
>
> I can see in the xl-dmesg log in 8GB case that there is memory remapping
> going on to allow for the lowmem MMIO hole, but it doesn't seem to help.
Gordan,
There's a possibility that it's actually got nothing to do with
relocation, but with bugs in your hardware. Can you try:
* Set the guest memory to 3600
* Boot the guest, and check to make sure that xl dmesg shows does
*not* relocate memory?
* Report whether it crashes?
If it's a bug in the hardware, I would expect to see that memory was
not relocated, but that the system will lock up anyway.
Can you also do lspci -vvv in dom0 before assigning the device and
attach the output?
The hardware bug we've seen is this: In order for the IOMMU to work
properly, *all* DMA transactions must be passed up to the root bridge
so the IOMMU can translate the addresses from guest address to host
address. Unfortunately, an awful lot of bridges will not do this
properly, which means that the address is not translated properly,
which means that if a *guest* memory address overlaps the a *host*
MMIO range, badness ensues. There's nothing we can do about this in
Xen other than make the guest MMIO hole the same size as the host MMIO
hole.
Thanks,
-George
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-24 16:31 ` Konrad Rzeszutek Wilk
2013-07-24 17:26 ` Gordan Bobic
2013-07-24 22:15 ` Gordan Bobic
@ 2013-07-25 21:26 ` Gordan Bobic
2 siblings, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-07-25 21:26 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
[-- Attachment #1: Type: text/plain, Size: 2359 bytes --]
Attached are:
domU-2GB dmesg, lspci
domU-8GB dmesg, lspci
map-2GB - memory map, e820 + PCI
map-8GB - memory map, e820 + PCI
There are no overlaps. In fact, the map is identical with 2040MB and
8192MB, except for the top usable range being bigger.
So according to this, there _shouldn't_ be any memory clobbering
going on within domU.
Which leads on to what George said earlier, which I will reply to in a
separate email.
What puzzles me, however, is that I thought that in 4.3.0 all 64-bit
BARs should automatically be re-mapped to memory > 4GB, and that doesn't
appear to be happening here. Or is the remapping only happening if there
is not enough 32-bit space for all the BARs?
Gordan
On 07/24/2013 05:31 PM, Konrad Rzeszutek Wilk wrote:
> On Wed, Jul 24, 2013 at 05:14:32PM +0100, Gordan Bobic wrote:
>> On Wed, 24 Jul 2013 12:06:39 -0400, Konrad Rzeszutek Wilk
>> <konrad.wilk@oracle.com> wrote:
>>
>>>>> Are you also able to get the serial log from the guest? (IF this is
>>>>> Linux?) I usually have this in my guest config:
>>>>>
>>>>> serial='pty'
>>>>>
>>>>> and when Linux boots up I add 'console=ttyS0,115200 loglevel=8
>>>> debug'
>>>>> which will output everything to the 'xl console <guest> | tee
>>>>> /tmp/log'.
>>>>
>>>> The intended guest is XP64. I will, however, get a Linux guest up
>>>
>>> Ah, I am not actually sure how Linux will work. I hadn't had a chance
>>> to test that recently :-(
>>
>> As long as it brings up the serial console, that should be
>> sufficient, but working VNC to text console login would be
>> convenient. The main thing I want to find on it is the
>> BAR mapping addresses from lspci and compare that to the
>> e820 map from dmesg.
>
> I see. That should work for you.
>>
>> I wouldn't expect the memory map provided by SeaBIOS and
>> the BAR mappings configured by qemu-dm to differ
>> depending on the domU OS. Or am I wrong here?
>
> They might. The patches to fix the 2GB limit went in qemu-xen-traditional
> meaning you have to use:
>
> device_model_version = 'qemu-xen-traditional'
>
> in your guest config (which I think you are already doing).
>
> I don't recall what the situation is with upstream SeaBIOS.
>>
>> If there is any overlap, the problem should be obvious.
>> If there is no overlap, then something even more
>> bizzare is going on, but we can worry about that
>> later. :)
[-- Attachment #2: edi2-dmesg.log.2GB --]
[-- Type: text/plain, Size: 27415 bytes --]
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Linux version 2.6.32-358.14.1.el6.x86_64 (mockbuild@sl6.fnal.gov) (gcc version 4.4.7 20120313 (Red Hat 4.4.7-3) (GCC) ) #1 SMP Tue Jul 16 14:24:33 CDT 2013
Command line: ro root=/dev/mapper/vg_edi2-lv_root nomodeset rd_NO_LUKS KEYBOARDTYPE=pc KEYTABLE=uk rd_LVM_LV=vg_edi2/lv_swap LANG=en_US.UTF-8 rd_NO_MD rd_LVM_LV=vg_edi2/lv_root SYSFONT=latarcyrheb-sun16 rd_NO_DM selinux=0
KERNEL supported cpus:
Intel GenuineIntel
AMD AuthenticAMD
Centaur CentaurHauls
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009e000 (usable)
BIOS-e820: 000000000009e000 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 000000007f000000 (usable)
BIOS-e820: 00000000fc000000 - 0000000100000000 (reserved)
DMI 2.4 present.
SMBIOS version 2.4 @ 0xFBB80
DMI: Xen HVM domU, BIOS 4.3.0 07/23/2013
e820 update range: 0000000000000000 - 0000000000001000 (usable) ==> (reserved)
e820 remove range: 00000000000a0000 - 0000000000100000 (usable)
last_pfn = 0x7f000 max_arch_pfn = 0x400000000
MTRR default type: write-back
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-BFFFF write-combining
C0000-FFFFF write-back
MTRR variable ranges enabled:
0 base 00E0000000 mask FFF0000000 uncachable
1 base 00F0000000 mask FFF8000000 uncachable
2 base 00F8000000 mask FFFC000000 uncachable
3 disabled
4 disabled
5 disabled
6 disabled
7 disabled
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
initial memory mapped : 0 - 20000000
init_memory_mapping: 0000000000000000-000000007f000000
0000000000 - 007f000000 page 2M
kernel direct mapping tables up to 7f000000 @ 8000-b000
RAMDISK: 3717a000 - 37fef754
ACPI: RSDP 00000000000ea020 00024 (v02 Xen)
ACPI: XSDT 00000000fc00f610 00054 (v01 Xen HVM 00000000 HVML 00000000)
ACPI: FACP 00000000fc00f2d0 000F4 (v04 Xen HVM 00000000 HVML 00000000)
ACPI: DSDT 00000000fc0035e0 0BC6E (v02 Xen HVM 00000000 INTL 20090123)
ACPI: FACS 00000000fc0035a0 00040
ACPI: APIC 00000000fc00f3d0 000D8 (v02 Xen HVM 00000000 HVML 00000000)
ACPI: HPET 00000000fc00f520 00038 (v01 Xen HVM 00000000 HVML 00000000)
ACPI: WAET 00000000fc00f560 00028 (v01 Xen HVM 00000000 HVML 00000000)
ACPI: SSDT 00000000fc00f590 00031 (v02 Xen HVM 00000000 INTL 20090123)
ACPI: SSDT 00000000fc00f5d0 00031 (v02 Xen HVM 00000000 INTL 20090123)
ACPI: Local APIC address 0xfee00000
Setting APIC routing to flat.
No NUMA configuration found
Faking a node at 0000000000000000-000000007f000000
Bootmem setup node 0 0000000000000000-000000007f000000
NODE_DATA [0000000000009000 - 000000000003cfff]
bootmap [000000000003d000 - 000000000004cdff] pages 10
(7 early reservations) ==> bootmem [0000000000 - 007f000000]
#0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000]
#1 [0000006000 - 0000008000] TRAMPOLINE ==> [0000006000 - 0000008000]
#2 [0001000000 - 000201b0a4] TEXT DATA BSS ==> [0001000000 - 000201b0a4]
#3 [003717a000 - 0037fef754] RAMDISK ==> [003717a000 - 0037fef754]
#4 [000009e000 - 0000100000] BIOS reserved ==> [000009e000 - 0000100000]
#5 [000201c000 - 000201c0c8] BRK ==> [000201c000 - 000201c0c8]
#6 [0000008000 - 0000009000] PGTABLE ==> [0000008000 - 0000009000]
found SMP MP-table at [ffff8800000fbba0] fbba0
[ffffea0000000000-ffffea0001bfffff] PMD -> [ffff880002600000-ffff8800041fffff] on node 0
Zone PFN ranges:
DMA 0x00000001 -> 0x00001000
DMA32 0x00001000 -> 0x00100000
Normal 0x00100000 -> 0x00100000
Movable zone start PFN for each node
early_node_map[2] active PFN ranges
0: 0x00000001 -> 0x0000009e
0: 0x00000100 -> 0x0007f000
On node 0 totalpages: 520093
DMA zone: 56 pages used for memmap
DMA zone: 102 pages reserved
DMA zone: 3839 pages, LIFO batch:0
DMA32 zone: 7056 pages used for memmap
DMA32 zone: 509040 pages, LIFO batch:31
ACPI: PM-Timer IO Port: 0xb008
ACPI: Local APIC address 0xfee00000
Setting APIC routing to flat.
ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x02] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x04] enabled)
ACPI: LAPIC (acpi_id[0x03] lapic_id[0x06] enabled)
ACPI: LAPIC (acpi_id[0x04] lapic_id[0x08] enabled)
ACPI: LAPIC (acpi_id[0x05] lapic_id[0x0a] enabled)
ACPI: LAPIC (acpi_id[0x06] lapic_id[0x0c] enabled)
ACPI: LAPIC (acpi_id[0x07] lapic_id[0x0e] enabled)
ACPI: LAPIC (acpi_id[0x08] lapic_id[0x10] disabled)
ACPI: LAPIC (acpi_id[0x09] lapic_id[0x12] disabled)
ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x14] disabled)
ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x16] disabled)
ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x18] disabled)
ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x1a] disabled)
ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x1c] disabled)
ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 1, version 17, address 0xfec00000, GSI 0-47
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 5 global_irq 5 low level)
ACPI: INT_SRC_OVR (bus 0 bus_irq 10 global_irq 10 low level)
ACPI: INT_SRC_OVR (bus 0 bus_irq 11 global_irq 11 low level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ5 used by override.
ACPI: IRQ9 used by override.
ACPI: IRQ10 used by override.
ACPI: IRQ11 used by override.
Using ACPI (MADT) for SMP configuration information
ACPI: HPET id: 0x8086a201 base: 0xfed00000
SMP: Allowing 15 CPUs, 7 hotplug CPUs
nr_irqs_gsi: 48
Xen version 4.3.
Xen Platform PCI: I/O protocol version 1
Netfront and the Xen platform PCI driver have been compiled for this kernel: unplug emulated NICs.
Blkfront and the Xen platform PCI driver have been compiled for this kernel: unplug emulated disks.
You might have to change the root device
from /dev/hd[a-d] to /dev/xvd[a-d]
in your root= kernel command line option
PM: Registered nosave memory: 000000000009e000 - 00000000000a0000
PM: Registered nosave memory: 00000000000a0000 - 00000000000e0000
PM: Registered nosave memory: 00000000000e0000 - 0000000000100000
Allocating PCI resources starting at 7f000000 (gap: 7f000000:7d000000)
Booting paravirtualized kernel on Xen
NR_CPUS:4096 nr_cpumask_bits:15 nr_cpu_ids:15 nr_node_ids:1
PERCPU: Embedded 31 pages/cpu @ffff880002200000 s94552 r8192 d24232 u131072
pcpu-alloc: s94552 r8192 d24232 u131072 alloc=1*2097152
pcpu-alloc: [0] 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 --
Built 1 zonelists in Node order, mobility grouping on. Total pages: 512879
Policy zone: DMA32
Kernel command line: ro root=/dev/mapper/vg_edi2-lv_root nomodeset rd_NO_LUKS KEYBOARDTYPE=pc KEYTABLE=uk rd_LVM_LV=vg_edi2/lv_swap LANG=en_US.UTF-8 rd_NO_MD rd_LVM_LV=vg_edi2/lv_root SYSFONT=latarcyrheb-sun16 rd_NO_DM selinux=0
PID hash table entries: 4096 (order: 3, 32768 bytes)
Checking aperture...
No AGP bridge found
Memory: 2018000k/2080768k available (5222k kernel code, 396k absent, 62372k reserved, 7120k data, 1264k init)
Hierarchical RCU implementation.
NR_IRQS:33024 nr_irqs:936
Xen HVM callback vector for event delivery is enabled
Console: colour VGA+ 80x25
console [tty0] enabled
allocated 8388608 bytes of page_cgroup
please try 'cgroup_disable=memory' option if you don't want memory cgroups
hpet clockevent registered
Fast TSC calibration using PIT
Detected 3321.683 MHz processor.
Calibrating delay loop (skipped), value calculated using timer frequency.. 6643.36 BogoMIPS (lpj=3321683)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux: Disabled at boot.
Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
Mount-cache hash table entries: 256
Initializing cgroup subsys ns
Initializing cgroup subsys cpuacct
Initializing cgroup subsys memory
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
Initializing cgroup subsys net_cls
Initializing cgroup subsys blkio
Initializing cgroup subsys perf_event
Initializing cgroup subsys net_prio
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64
mce: CPU supports 2 MCE banks
alternatives: switching to unfair spinlock
ACPI: Core revision 20090903
ftrace: converting mcount calls to 0f 1f 44 00 00
ftrace: allocating 21438 entries in 85 pages
x2apic not enabled, IRQ remapping init failed
APIC routing finalized to physical flat.
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0
CPU0: Genuine Intel(R) CPU 000 @ 2.67GHz stepping 00
Performance Events: unsupported p6 CPU model 44 no PMU driver, software events only.
NMI watchdog disabled (cpu0): hardware events not enabled
Booting Node 0, Processors #1
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #2
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #3
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #4
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #5
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #6
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #7
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64
Brought up 8 CPUs
Total of 8 processors activated (53154.05 BogoMIPS).
sizeof(vma)=200 bytes
sizeof(page)=56 bytes
sizeof(inode)=592 bytes
sizeof(dentry)=192 bytes
sizeof(ext3inode)=800 bytes
sizeof(buffer_head)=104 bytes
sizeof(skbuff)=232 bytes
sizeof(task_struct)=2648 bytes
devtmpfs: initialized
regulator: core version 0.5
NET: Registered protocol family 16
alloc irq_desc for 935 on node 0
alloc kstat_irqs on node 0
ACPI: bus type pci registered
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: EC: Look up EC in DSDT
ACPI: Interpreter enabled
ACPI: (supports S0 S3 S4 S5)
ACPI: Using IOAPIC for interrupt routing
ACPI: No dock devices found.
HEST: Table not found.
PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
pci_root PNP0A03:00: host bridge window [io 0x0000-0x0cf7]
pci_root PNP0A03:00: host bridge window [io 0x0d00-0xffff]
pci_root PNP0A03:00: host bridge window [mem 0x000a0000-0x000bffff]
pci_root PNP0A03:00: host bridge window [mem 0xe0000000-0xfbffffff]
pci 0000:00:01.1: reg 20: [io 0xc200-0xc20f]
pci 0000:00:01.2: reg 20: [io 0xc1c0-0xc1df]
* Found PM-Timer Bug on the chipset. Due to workarounds for a bug,
* this clock source is slow. Consider trying other clock sources
pci 0000:00:01.3: quirk: [io 0xb000-0xb03f] claimed by PIIX4 ACPI
pci 0000:00:02.0: reg 10: [mem 0xef000000-0xef7fffff pref]
pci 0000:00:03.0: reg 10: [io 0xc000-0xc0ff]
pci 0000:00:03.0: reg 14: [mem 0xee000000-0xeeffffff pref]
pci 0000:00:05.0: reg 20: [io 0xc1e0-0xc1ff]
pci 0000:00:06.0: reg 10: [mem 0xef8a0000-0xef8a3fff]
pci 0000:00:06.0: supports D1 D2
pci 0000:00:07.0: reg 10: [mem 0xec000000-0xedffffff]
pci 0000:00:07.0: reg 14: [mem 0xe0000000-0xe7ffffff 64bit pref]
pci 0000:00:07.0: reg 1c: [mem 0xe8000000-0xebffffff 64bit pref]
pci 0000:00:07.0: reg 24: [io 0xc100-0xc17f]
pci 0000:00:07.0: reg 30: [mem 0xef800000-0xef87ffff pref]
pci 0000:00:08.0: reg 10: [mem 0xef8a4000-0xef8a7fff]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Link [LNKA] (IRQs *5 10 11)
ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11)
ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11)
ACPI: PCI Interrupt Link [LNKD] (IRQs *5 10 11)
vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: device added: PCI:0000:00:07.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: loaded
vgaarb: bridge control possible 0000:00:07.0
vgaarb: no bridge control possible 0000:00:02.0
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
PCI: old code would have set cacheline size to 32 bytes, but clflush_size = 64
PCI: pci_cache_line_size set to 64 bytes
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
HPET: 3 timers in total, 0 timers will be used for per-cpu timer
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
hpet0: 3 comparators, 64-bit 62.500000 MHz counter
Switching to clocksource hpet
pnp: PnP ACPI init
ACPI: bus type pnp registered
pnp 00:00: [mem 0x00000000-0x0009ffff]
pnp 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:01: [io 0x0cf8-0x0cff]
pnp 00:01: Plug and Play ACPI device, IDs PNP0a03 (active)
pnp 00:02: [mem 0xfed00000-0xfed003ff]
pnp 00:02: Plug and Play ACPI device, IDs PNP0103 (active)
pnp 00:03: [io 0x0010-0x001f]
pnp 00:03: [io 0x0022-0x002d]
pnp 00:03: [io 0x0030-0x003f]
pnp 00:03: [io 0x0044-0x005f]
pnp 00:03: [io 0x0062-0x0063]
pnp 00:03: [io 0x0065-0x006f]
pnp 00:03: [io 0x0072-0x007f]
pnp 00:03: [io 0x0080]
pnp 00:03: [io 0x0084-0x0086]
pnp 00:03: [io 0x0088]
pnp 00:03: [io 0x008c-0x008e]
pnp 00:03: [io 0x0090-0x009f]
pnp 00:03: [io 0x00a2-0x00bd]
pnp 00:03: [io 0x00e0-0x00ef]
pnp 00:03: [io 0x08a0-0x08a3]
pnp 00:03: [io 0x0cc0-0x0ccf]
pnp 00:03: [io 0x04d0-0x04d1]
pnp 00:03: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:04: [dma 4]
pnp 00:04: [io 0x0000-0x000f]
pnp 00:04: [io 0x0081-0x0083]
pnp 00:04: [io 0x0087]
pnp 00:04: [io 0x0089-0x008b]
pnp 00:04: [io 0x008f]
pnp 00:04: [io 0x00c0-0x00df]
pnp 00:04: [io 0x0480-0x048f]
pnp 00:04: Plug and Play ACPI device, IDs PNP0200 (active)
pnp 00:05: [io 0x0070-0x0071]
pnp 00:05: [irq 8]
pnp 00:05: Plug and Play ACPI device, IDs PNP0b00 (active)
pnp 00:06: [io 0x0061]
pnp 00:06: Plug and Play ACPI device, IDs PNP0800 (active)
pnp 00:07: [irq 12]
pnp 00:07: Plug and Play ACPI device, IDs PNP0f13 (active)
pnp 00:08: [io 0x0060]
pnp 00:08: [io 0x0064]
pnp 00:08: [irq 1]
pnp 00:08: Plug and Play ACPI device, IDs PNP0303 PNP030b (active)
pnp 00:09: [io 0x03f0-0x03f5]
pnp 00:09: [io 0x03f7]
pnp 00:09: [irq 6]
pnp 00:09: [dma 2]
pnp 00:09: Plug and Play ACPI device, IDs PNP0700 (active)
pnp 00:0a: [io 0x03f8-0x03ff]
pnp 00:0a: [irq 4]
pnp 00:0a: Plug and Play ACPI device, IDs PNP0501 (active)
pnp 00:0b: [io 0x0378-0x037f]
pnp 00:0b: [irq 7]
pnp 00:0b: Plug and Play ACPI device, IDs PNP0400 (active)
pnp 00:0c: [io 0x10c0-0x1141]
pnp 00:0c: [io 0xb044-0xb047]
pnp 00:0c: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp: PnP ACPI: found 13 devices
ACPI: ACPI bus type pnp unregistered
system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved
system 00:03: [io 0x08a0-0x08a3] has been reserved
system 00:03: [io 0x0cc0-0x0ccf] has been reserved
system 00:03: [io 0x04d0-0x04d1] has been reserved
system 00:0c: [io 0x10c0-0x1141] has been reserved
system 00:0c: [io 0xb044-0xb047] has been reserved
PCI: max bus depth: 0 pci_try_num: 1
pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7]
pci_bus 0000:00: resource 5 [io 0x0d00-0xffff]
pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: resource 7 [mem 0xe0000000-0xfbffffff]
NET: Registered protocol family 2
IP route cache hash table entries: 65536 (order: 7, 524288 bytes)
TCP established hash table entries: 262144 (order: 10, 4194304 bytes)
TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
TCP: Hash tables configured (established 262144 bind 65536)
TCP reno registered
NET: Registered protocol family 1
pci 0000:00:00.0: Limiting direct PCI/PCI transfers
pci 0000:00:01.0: PIIX3: Enabling Passive Release
pci 0000:00:01.0: Activating ISA DMA hang workarounds
alloc irq_desc for 23 on node -1
alloc kstat_irqs on node -1
pci 0000:00:01.2: PCI INT D -> GSI 23 (level, low) -> IRQ 23
pci 0000:00:01.2: PCI INT D disabled
pci 0000:00:02.0: Boot video device
alloc irq_desc for 37 on node -1
alloc kstat_irqs on node -1
pci 0000:00:05.0: PCI INT B -> GSI 37 (level, low) -> IRQ 37
pci 0000:00:05.0: PCI INT B disabled
pci 0000:00:07.0: Boot video device
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 14805k freed
audit: initializing netlink socket (disabled)
type=2000 audit(1374787875.282:1): initialized
HugeTLB registered 2 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
msgmni has been set to 3970
alg: No test for stdrng (krng)
ksign: Installing public key data
Loading keyring
- Added public key 70A327EA65A393B6
- User ID: Red Hat, Inc. (Kernel Module GPG key)
- Added public key D4A26C9CCD09BEDA
- User ID: Red Hat Enterprise Linux Driver Update Program <secalert@redhat.com>
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
acpiphp: Slot [0] registered
acpiphp: Slot [1] registered
acpiphp: Slot [2] registered
acpiphp: Slot [3] registered
acpiphp: Slot [4] registered
acpiphp: Slot [5] registered
acpiphp: Slot [6] registered
acpiphp: Slot [7] registered
acpiphp: Slot [8] registered
acpiphp: Slot [9] registered
acpiphp: Slot [10] registered
acpiphp: Slot [11] registered
acpiphp: Slot [12] registered
acpiphp: Slot [13] registered
acpiphp: Slot [14] registered
acpiphp: Slot [15] registered
acpiphp: Slot [16] registered
acpiphp: Slot [17] registered
acpiphp: Slot [18] registered
acpiphp: Slot [19] registered
acpiphp: Slot [20] registered
acpiphp: Slot [21] registered
acpiphp: Slot [22] registered
acpiphp: Slot [23] registered
acpiphp: Slot [24] registered
acpiphp: Slot [25] registered
acpiphp: Slot [26] registered
acpiphp: Slot [27] registered
acpiphp: Slot [28] registered
acpiphp: Slot [29] registered
acpiphp: Slot [30] registered
acpiphp: Slot [31] registered
ipmi message handler version 39.2
IPMI System Interface driver.
ipmi_si: Adding default-specified kcs state machine
ipmi_si: Trying default-specified kcs state machine at i/o address 0xca2, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Adding default-specified smic state machine
ipmi_si: Trying default-specified smic state machine at i/o address 0xca9, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Adding default-specified bt state machine
ipmi_si: Trying default-specified bt state machine at i/o address 0xe4, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Unable to find any System Interface(s)
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input0
ACPI: Power Button [PWRF]
input: Sleep Button as /devices/LNXSYSTM:00/LNXSLPBN:00/input/input1
ACPI: Sleep Button [SLPF]
ACPI: acpi_idle registered with cpuidle
ERST: Table is not found!
GHES: HEST is not enabled!
alloc irq_desc for 28 on node -1
alloc kstat_irqs on node -1
xen-platform-pci 0000:00:03.0: PCI INT A -> GSI 28 (level, low) -> IRQ 28
Grant table initialized
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
crash memory driver: version 1.1
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
00:0a: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
brd: module loaded
loop: module loaded
input: Macintosh mouse button emulation as /devices/virtual/input/input2
Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
uhci_hcd 0000:00:01.2: PCI INT D -> GSI 23 (level, low) -> IRQ 23
uhci_hcd 0000:00:01.2: setting latency timer to 64
uhci_hcd 0000:00:01.2: UHCI Host Controller
uhci_hcd 0000:00:01.2: new USB bus registered, assigned bus number 1
uhci_hcd 0000:00:01.2: irq 23, io base 0x0000c1c0
usb usb1: New USB device found, idVendor=1d6b, idProduct=0001
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: UHCI Host Controller
usb usb1: Manufacturer: Linux 2.6.32-358.14.1.el6.x86_64 uhci_hcd
usb usb1: SerialNumber: 0000:00:01.2
usb usb1: configuration #1 chosen from 1 choice
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 2 ports detected
uhci_hcd 0000:00:05.0: PCI INT B -> GSI 37 (level, low) -> IRQ 37
uhci_hcd 0000:00:05.0: setting latency timer to 64
uhci_hcd 0000:00:05.0: UHCI Host Controller
uhci_hcd 0000:00:05.0: new USB bus registered, assigned bus number 2
uhci_hcd 0000:00:05.0: irq 37, io base 0x0000c1e0
usb usb2: New USB device found, idVendor=1d6b, idProduct=0001
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: UHCI Host Controller
usb usb2: Manufacturer: Linux 2.6.32-358.14.1.el6.x86_64 uhci_hcd
usb usb2: SerialNumber: 0000:00:05.0
usb usb2: configuration #1 chosen from 1 choice
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 2 ports detected
PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mice: PS/2 mouse device common for all mice
rtc_cmos 00:05: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one day, 114 bytes nvram, hpet irqs
cpuidle: using governor ladder
cpuidle: using governor menu
input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3
EFI Variables Facility v0.08 2004-May-17
usbcore: registered new interface driver hiddev
usbcore: registered new interface driver usbhid
usbhid: v2.6:USB HID core driver
TCP cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
registered taskstats version 1
XENBUS: Device with no driver: device/vbd/768
XENBUS: Device with no driver: device/vkbd/0
XENBUS: Device with no driver: device/vif/0
XENBUS: Device with no driver: device/pci/0
rtc_cmos 00:05: setting system clock to 2013-07-25 21:31:16 UTC (1374787876)
Initalizing network drop monitor service
Freeing unused kernel memory: 1264k freed
Write protecting the kernel read-only data: 10240k
Freeing unused kernel memory: 904k freed
Freeing unused kernel memory: 1672k freed
dracut: dracut-004-303.el6
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.23.6-ioctl (2012-07-25) initialised: dm-devel@redhat.com
udev: starting version 147
ACPI: WMI: Mapper loaded
[drm] Initialized drm 1.1.0 20060810
dracut: Starting plymouth daemon
usb 2-1: new low speed USB device number 2 using uhci_hcd
ata_piix 0000:00:01.1: version 2.13
ata_piix 0000:00:01.1: setting latency timer to 64
scsi0 : ata_piix
scsi1 : ata_piix
ata1: PATA max MWDMA2 cmd 0x1f0 ctl 0x3f6 bmdma 0xc200 irq 14
ata2: PATA max MWDMA2 cmd 0x170 ctl 0x376 bmdma 0xc208 irq 15
usb 2-1: New USB device found, idVendor=045e, idProduct=00dd
usb 2-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-1: Product: Comfort Curve Keyboard 2000
usb 2-1: Manufacturer: Microsoft
usb 2-1: configuration #1 chosen from 1 choice
input: ImExPS/2 Generic Explorer Mouse as /devices/platform/i8042/serio1/input/input4
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:05.0/usb2/2-1/2-1:1.0/input/input5
Refined TSC clocksource calibration: 3321.753 MHz.
Switching to clocksource tsc
generic-usb 0003:045E:00DD.0001: input,hidraw0: USB HID v1.11 Keyboard [Microsoft Comfort Curve Keyboard 2000] on usb-0000:00:05.0-1/input0
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:05.0/usb2/2-1/2-1:1.1/input/input6
generic-usb 0003:045E:00DD.0002: input,hidraw1: USB HID v1.11 Device [Microsoft Comfort Curve Keyboard 2000] on usb-0000:00:05.0-1/input1
xlblk_init: register_blkdev major: 202
alloc irq_desc for 934 on node 0
alloc kstat_irqs on node 0
blkfront: xvda: barriers disabled
xvda: xvda1 xvda2
usb 2-2: new full speed USB device number 3 using uhci_hcd
usb 2-2: New USB device found, idVendor=1532, idProduct=002f
usb 2-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-2: Product: Razer Imperator
usb 2-2: Manufacturer: Razer
usb 2-2: configuration #1 chosen from 1 choice
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:05.0/usb2/2-2/2-2:1.0/input/input7
generic-usb 0003:1532:002F.0003: input,hidraw2: USB HID v1.11 Mouse [Razer Razer Imperator] on usb-0000:00:05.0-2/input0
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:05.0/usb2/2-2/2-2:1.1/input/input8
generic-usb 0003:1532:002F.0004: input,hidraw3: USB HID v1.11 Keyboard [Razer Razer Imperator] on usb-0000:00:05.0-2/input1
dracut: Scanning devices xvda2 for LVM logical volumes vg_edi2/lv_swap vg_edi2/lv_root
dracut: inactive '/dev/vg_edi2/lv_root' [50.00 GiB] inherit
dracut: inactive '/dev/vg_edi2/lv_home' [9.60 GiB] inherit
dracut: inactive '/dev/vg_edi2/lv_swap' [3.91 GiB] inherit
EXT4-fs (dm-0): mounted filesystem with ordered data mode. Opts:
dracut: Mounted root filesystem /dev/mapper/vg_edi2-lv_root
dracut: Switching root
udev: starting version 147
piix4_smbus 0000:00:01.3: SMBus base address uninitialized - upgrade BIOS or use force_addr=0xaddr
alloc irq_desc for 40 on node -1
alloc kstat_irqs on node -1
snd_hda_intel 0000:00:06.0: PCI INT A -> GSI 40 (level, low) -> IRQ 40
snd_hda_intel 0000:00:06.0: setting latency timer to 64
alloc irq_desc for 18 on node -1
alloc kstat_irqs on node -1
snd_hda_intel 0000:00:08.0: PCI INT B -> GSI 18 (level, low) -> IRQ 18
hda_intel: Disabling MSI
snd_hda_intel 0000:00:08.0: setting latency timer to 64
input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:08.0/sound/card1/input9
input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:08.0/sound/card1/input10
input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:08.0/sound/card1/input11
input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:08.0/sound/card1/input12
Initialising Xen virtual ethernet driver.
alloc irq_desc for 933 on node 0
alloc kstat_irqs on node 0
parport_pc 00:0b: reported by Plug and Play ACPI
parport0: PC-style at 0x378, irq 7 [PCSPP,TRISTATE]
ppdev: user-space parallel port driver
EXT4-fs (xvda1): mounted filesystem with ordered data mode. Opts:
EXT4-fs (dm-2): mounted filesystem with ordered data mode. Opts:
Adding 4095992k swap on /dev/mapper/vg_edi2-lv_swap. Priority:-1 extents:1 across:4095992k SS
NET: Registered protocol family 10
lo: Disabled Privacy Extensions
eth0: no IPv6 routers present
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Slow work thread pool: Starting up
Slow work thread pool: Ready
FS-Cache: Loaded
Registering the id_resolver key type
FS-Cache: Netfs 'nfs' registered for caching
[-- Attachment #3: edi2-lspci.log.2GB --]
[-- Type: text/plain, Size: 8643 bytes --]
00:00.0 Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02)
Subsystem: Red Hat, Inc Qemu virtual machine
Physical Slot: 0
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:01.0 ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II]
Subsystem: Red Hat, Inc Qemu virtual machine
Physical Slot: 1
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:01.1 IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] (prog-if 80 [Master])
Subsystem: XenSource, Inc. Device 0001
Physical Slot: 1
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8]
Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable)
Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8]
Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable)
Region 4: I/O ports at c200 [size=16]
Kernel driver in use: ata_piix
Kernel modules: ata_generic, pata_acpi, ata_piix
00:01.2 USB controller: Intel Corporation 82371SB PIIX3 USB [Natoma/Triton II] (rev 01) (prog-if 00 [UHCI])
Subsystem: Red Hat, Inc Qemu virtual machine
Physical Slot: 1
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Interrupt: pin D routed to IRQ 23
Region 4: I/O ports at c1c0 [size=32]
Kernel driver in use: uhci_hcd
00:01.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 01)
Subsystem: Red Hat, Inc Qemu virtual machine
Physical Slot: 1
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 9
Kernel modules: i2c-piix4
00:02.0 VGA compatible controller: Device 1234:1111 (prog-if 00 [VGA controller])
Subsystem: XenSource, Inc. Device 0001
Physical Slot: 2
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at ef000000 (32-bit, prefetchable) [size=8M]
Expansion ROM at <unassigned> [disabled]
00:03.0 Unassigned class [ff80]: XenSource, Inc. Xen Platform Device (rev 01)
Subsystem: XenSource, Inc. Xen Platform Device
Physical Slot: 3
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 28
Region 0: I/O ports at c000 [size=256]
Region 1: Memory at ee000000 (32-bit, prefetchable) [size=16M]
Kernel driver in use: xen-platform-pci
00:05.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Physical Slot: 5
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Interrupt: pin B routed to IRQ 37
Region 4: I/O ports at c1e0 [size=32]
Kernel driver in use: uhci_hcd
00:06.0 Audio device: Creative Labs [SB X-Fi Xtreme Audio] CA0110-IBG
Subsystem: Creative Labs SB1040
Physical Slot: 6
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (500ns min, 5000ns max)
Interrupt: pin A routed to IRQ 40
Region 0: Memory at ef8a0000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [dc] Power Management version 3
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: snd_hda_intel
Kernel modules: snd-hda-intel
00:07.0 VGA compatible controller: NVIDIA Corporation GF100GL [Quadro 6000] (rev a3) (prog-if 00 [VGA controller])
Subsystem: NVIDIA Corporation Device 075f
Physical Slot: 7
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 5
Region 0: Memory at ec000000 (32-bit, non-prefetchable) [size=32M]
Region 1: Memory at e0000000 (64-bit, prefetchable) [size=128M]
Region 3: Memory at e8000000 (64-bit, prefetchable) [size=64M]
Region 5: I/O ports at c100 [size=128]
Expansion ROM at ef800000 [disabled] [size=512K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [b4] Vendor Specific Information: Len=14 <?>
Kernel modules: nouveau, nvidiafb
00:08.0 Audio device: NVIDIA Corporation GF100 High Definition Audio Controller (rev a1)
Subsystem: NVIDIA Corporation Device 075f
Physical Slot: 8
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Interrupt: pin B routed to IRQ 18
Region 0: Memory at ef8a4000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: snd_hda_intel
Kernel modules: snd-hda-intel
[-- Attachment #4: map.2GB --]
[-- Type: text/plain, Size: 845 bytes --]
BIOS-e820: 0000000000000000 - 000000000009e000 (usable)
BIOS-e820: 000000000009e000 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 000000007f000000 (usable)
Xen VGA: 00000000ef000000 - 00000000ef800000 32-bit
Xen Platform: 00000000ee000000 - 00000000ef000000 32-bit
Xen VGA: 00000000ef000000 - 00000000ef800000 32-bit
Xen Platform: 00000000ee000000 - 00000000ef000000 32-bit
Creative Audio: 00000000ef8a0000 - 00000000ef8a4000 32-bit
Quadro 6000 2: 00000000e0000000 - 00000000e8000000 64-bit
Quadro 6000 3: 00000000e8000000 - 00000000ec000000 64-bit
Quadro 6000 1: 00000000ec000000 - 00000000ee000000 32-bit
Quadro ROM: 00000000ef800000 - 00000000ef880000
Quadro Audio: 00000000ef8a4000 - 00000000ef8a8000 32-bit
BIOS-e820: 00000000fc000000 - 0000000100000000 (reserved)
[-- Attachment #5: edi2-dmesg.log.8GB --]
[-- Type: text/plain, Size: 28272 bytes --]
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Linux version 2.6.32-358.14.1.el6.x86_64 (mockbuild@sl6.fnal.gov) (gcc version 4.4.7 20120313 (Red Hat 4.4.7-3) (GCC) ) #1 SMP Tue Jul 16 14:24:33 CDT 2013
Command line: ro root=/dev/mapper/vg_edi2-lv_root nomodeset rd_NO_LUKS KEYBOARDTYPE=pc KEYTABLE=uk rd_LVM_LV=vg_edi2/lv_swap LANG=en_US.UTF-8 rd_NO_MD rd_LVM_LV=vg_edi2/lv_root SYSFONT=latarcyrheb-sun16 rd_NO_DM selinux=0
KERNEL supported cpus:
Intel GenuineIntel
AMD AuthenticAMD
Centaur CentaurHauls
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009e000 (usable)
BIOS-e820: 000000000009e000 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 00000000e0000000 (usable)
BIOS-e820: 00000000fc000000 - 0000000100000000 (reserved)
BIOS-e820: 0000000100000000 - 000000021f800000 (usable)
DMI 2.4 present.
SMBIOS version 2.4 @ 0xFBB80
DMI: Xen HVM domU, BIOS 4.3.0 07/23/2013
e820 update range: 0000000000000000 - 0000000000001000 (usable) ==> (reserved)
e820 remove range: 00000000000a0000 - 0000000000100000 (usable)
last_pfn = 0x21f800 max_arch_pfn = 0x400000000
MTRR default type: write-back
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-BFFFF write-combining
C0000-FFFFF write-back
MTRR variable ranges enabled:
0 base 00E0000000 mask FFF0000000 uncachable
1 base 00F0000000 mask FFF8000000 uncachable
2 base 00F8000000 mask FFFC000000 uncachable
3 disabled
4 disabled
5 disabled
6 disabled
7 disabled
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
last_pfn = 0xe0000 max_arch_pfn = 0x400000000
initial memory mapped : 0 - 20000000
init_memory_mapping: 0000000000000000-00000000e0000000
0000000000 - 00e0000000 page 2M
kernel direct mapping tables up to e0000000 @ 8000-d000
init_memory_mapping: 0000000100000000-000000021f800000
0100000000 - 021f800000 page 2M
kernel direct mapping tables up to 21f800000 @ b000-11000
RAMDISK: 3717a000 - 37fef754
ACPI: RSDP 00000000000ea020 00024 (v02 Xen)
ACPI: XSDT 00000000fc00f610 00054 (v01 Xen HVM 00000000 HVML 00000000)
ACPI: FACP 00000000fc00f2d0 000F4 (v04 Xen HVM 00000000 HVML 00000000)
ACPI: DSDT 00000000fc0035e0 0BC6E (v02 Xen HVM 00000000 INTL 20090123)
ACPI: FACS 00000000fc0035a0 00040
ACPI: APIC 00000000fc00f3d0 000D8 (v02 Xen HVM 00000000 HVML 00000000)
ACPI: HPET 00000000fc00f520 00038 (v01 Xen HVM 00000000 HVML 00000000)
ACPI: WAET 00000000fc00f560 00028 (v01 Xen HVM 00000000 HVML 00000000)
ACPI: SSDT 00000000fc00f590 00031 (v02 Xen HVM 00000000 INTL 20090123)
ACPI: SSDT 00000000fc00f5d0 00031 (v02 Xen HVM 00000000 INTL 20090123)
ACPI: Local APIC address 0xfee00000
Setting APIC routing to flat.
No NUMA configuration found
Faking a node at 0000000000000000-000000021f800000
Bootmem setup node 0 0000000000000000-000000021f800000
NODE_DATA [0000000000010000 - 0000000000043fff]
bootmap [0000000000044000 - 0000000000087eff] pages 44
(8 early reservations) ==> bootmem [0000000000 - 021f800000]
#0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000]
#1 [0000006000 - 0000008000] TRAMPOLINE ==> [0000006000 - 0000008000]
#2 [0001000000 - 000201b0a4] TEXT DATA BSS ==> [0001000000 - 000201b0a4]
#3 [003717a000 - 0037fef754] RAMDISK ==> [003717a000 - 0037fef754]
#4 [000009e000 - 0000100000] BIOS reserved ==> [000009e000 - 0000100000]
#5 [000201c000 - 000201c0c8] BRK ==> [000201c000 - 000201c0c8]
#6 [0000008000 - 000000b000] PGTABLE ==> [0000008000 - 000000b000]
#7 [000000b000 - 0000010000] PGTABLE ==> [000000b000 - 0000010000]
found SMP MP-table at [ffff8800000fbba0] fbba0
[ffffea0000000000-ffffea00077fffff] PMD -> [ffff880028600000-ffff88002f7fffff] on node 0
Zone PFN ranges:
DMA 0x00000001 -> 0x00001000
DMA32 0x00001000 -> 0x00100000
Normal 0x00100000 -> 0x0021f800
Movable zone start PFN for each node
early_node_map[3] active PFN ranges
0: 0x00000001 -> 0x0000009e
0: 0x00000100 -> 0x000e0000
0: 0x00100000 -> 0x0021f800
On node 0 totalpages: 2095005
DMA zone: 56 pages used for memmap
DMA zone: 109 pages reserved
DMA zone: 3832 pages, LIFO batch:0
DMA32 zone: 14280 pages used for memmap
DMA32 zone: 899128 pages, LIFO batch:31
Normal zone: 16100 pages used for memmap
Normal zone: 1161500 pages, LIFO batch:31
ACPI: PM-Timer IO Port: 0xb008
ACPI: Local APIC address 0xfee00000
Setting APIC routing to flat.
ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x02] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x04] enabled)
ACPI: LAPIC (acpi_id[0x03] lapic_id[0x06] enabled)
ACPI: LAPIC (acpi_id[0x04] lapic_id[0x08] enabled)
ACPI: LAPIC (acpi_id[0x05] lapic_id[0x0a] enabled)
ACPI: LAPIC (acpi_id[0x06] lapic_id[0x0c] enabled)
ACPI: LAPIC (acpi_id[0x07] lapic_id[0x0e] enabled)
ACPI: LAPIC (acpi_id[0x08] lapic_id[0x10] disabled)
ACPI: LAPIC (acpi_id[0x09] lapic_id[0x12] disabled)
ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x14] disabled)
ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x16] disabled)
ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x18] disabled)
ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x1a] disabled)
ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x1c] disabled)
ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 1, version 17, address 0xfec00000, GSI 0-47
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 5 global_irq 5 low level)
ACPI: INT_SRC_OVR (bus 0 bus_irq 10 global_irq 10 low level)
ACPI: INT_SRC_OVR (bus 0 bus_irq 11 global_irq 11 low level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ5 used by override.
ACPI: IRQ9 used by override.
ACPI: IRQ10 used by override.
ACPI: IRQ11 used by override.
Using ACPI (MADT) for SMP configuration information
ACPI: HPET id: 0x8086a201 base: 0xfed00000
SMP: Allowing 15 CPUs, 7 hotplug CPUs
nr_irqs_gsi: 48
Xen version 4.3.
Xen Platform PCI: I/O protocol version 1
Netfront and the Xen platform PCI driver have been compiled for this kernel: unplug emulated NICs.
Blkfront and the Xen platform PCI driver have been compiled for this kernel: unplug emulated disks.
You might have to change the root device
from /dev/hd[a-d] to /dev/xvd[a-d]
in your root= kernel command line option
PM: Registered nosave memory: 000000000009e000 - 00000000000a0000
PM: Registered nosave memory: 00000000000a0000 - 00000000000e0000
PM: Registered nosave memory: 00000000000e0000 - 0000000000100000
PM: Registered nosave memory: 00000000e0000000 - 00000000fc000000
PM: Registered nosave memory: 00000000fc000000 - 0000000100000000
Allocating PCI resources starting at e0000000 (gap: e0000000:1c000000)
Booting paravirtualized kernel on Xen
NR_CPUS:4096 nr_cpumask_bits:15 nr_cpu_ids:15 nr_node_ids:1
PERCPU: Embedded 31 pages/cpu @ffff880028200000 s94552 r8192 d24232 u131072
pcpu-alloc: s94552 r8192 d24232 u131072 alloc=1*2097152
pcpu-alloc: [0] 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 --
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 2064460
Policy zone: Normal
Kernel command line: ro root=/dev/mapper/vg_edi2-lv_root nomodeset rd_NO_LUKS KEYBOARDTYPE=pc KEYTABLE=uk rd_LVM_LV=vg_edi2/lv_swap LANG=en_US.UTF-8 rd_NO_MD rd_LVM_LV=vg_edi2/lv_root SYSFONT=latarcyrheb-sun16 rd_NO_DM selinux=0
PID hash table entries: 4096 (order: 3, 32768 bytes)
Checking aperture...
No AGP bridge found
PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
Placing 64MB software IO TLB between ffff880020000000 - ffff880024000000
software IO TLB at phys 0x20000000 - 0x24000000
Memory: 8163508k/8904704k available (5222k kernel code, 524684k absent, 216512k reserved, 7120k data, 1264k init)
Hierarchical RCU implementation.
NR_IRQS:33024 nr_irqs:936
Xen HVM callback vector for event delivery is enabled
Console: colour VGA+ 80x25
console [tty0] enabled
allocated 33554432 bytes of page_cgroup
please try 'cgroup_disable=memory' option if you don't want memory cgroups
hpet clockevent registered
Fast TSC calibration using PIT
Detected 3321.862 MHz processor.
Calibrating delay loop (skipped), value calculated using timer frequency.. 6643.72 BogoMIPS (lpj=3321862)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux: Disabled at boot.
Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
Mount-cache hash table entries: 256
Initializing cgroup subsys ns
Initializing cgroup subsys cpuacct
Initializing cgroup subsys memory
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
Initializing cgroup subsys net_cls
Initializing cgroup subsys blkio
Initializing cgroup subsys perf_event
Initializing cgroup subsys net_prio
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64
mce: CPU supports 2 MCE banks
alternatives: switching to unfair spinlock
ACPI: Core revision 20090903
ftrace: converting mcount calls to 0f 1f 44 00 00
ftrace: allocating 21438 entries in 85 pages
x2apic not enabled, IRQ remapping init failed
APIC routing finalized to physical flat.
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0
CPU0: Genuine Intel(R) CPU 000 @ 2.67GHz stepping 00
Performance Events: unsupported p6 CPU model 44 no PMU driver, software events only.
NMI watchdog disabled (cpu0): hardware events not enabled
Booting Node 0, Processors #1
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #2
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #3
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #4
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #5
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #6
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64 #7
CPU: CPU feature constant_tsc disabled on xen guest
CPU: CPU feature nonstop_tsc disabled on xen guest
CPU: Unsupported number of siblings 64
Brought up 8 CPUs
Total of 8 processors activated (53145.20 BogoMIPS).
sizeof(vma)=200 bytes
sizeof(page)=56 bytes
sizeof(inode)=592 bytes
sizeof(dentry)=192 bytes
sizeof(ext3inode)=800 bytes
sizeof(buffer_head)=104 bytes
sizeof(skbuff)=232 bytes
sizeof(task_struct)=2648 bytes
devtmpfs: initialized
regulator: core version 0.5
NET: Registered protocol family 16
alloc irq_desc for 935 on node 0
alloc kstat_irqs on node 0
ACPI: bus type pci registered
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: EC: Look up EC in DSDT
ACPI: Interpreter enabled
ACPI: (supports S0 S3 S4 S5)
ACPI: Using IOAPIC for interrupt routing
ACPI: No dock devices found.
HEST: Table not found.
PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
pci_root PNP0A03:00: host bridge window [io 0x0000-0x0cf7]
pci_root PNP0A03:00: host bridge window [io 0x0d00-0xffff]
pci_root PNP0A03:00: host bridge window [mem 0x000a0000-0x000bffff]
pci_root PNP0A03:00: host bridge window [mem 0xe0000000-0xfbffffff]
pci 0000:00:01.1: reg 20: [io 0xc200-0xc20f]
pci 0000:00:01.2: reg 20: [io 0xc1c0-0xc1df]
* Found PM-Timer Bug on the chipset. Due to workarounds for a bug,
* this clock source is slow. Consider trying other clock sources
pci 0000:00:01.3: quirk: [io 0xb000-0xb03f] claimed by PIIX4 ACPI
pci 0000:00:02.0: reg 10: [mem 0xef000000-0xef7fffff pref]
pci 0000:00:03.0: reg 10: [io 0xc000-0xc0ff]
pci 0000:00:03.0: reg 14: [mem 0xee000000-0xeeffffff pref]
pci 0000:00:05.0: reg 20: [io 0xc1e0-0xc1ff]
pci 0000:00:06.0: reg 10: [mem 0xef8a0000-0xef8a3fff]
pci 0000:00:06.0: supports D1 D2
pci 0000:00:07.0: reg 10: [mem 0xec000000-0xedffffff]
pci 0000:00:07.0: reg 14: [mem 0xe0000000-0xe7ffffff 64bit pref]
pci 0000:00:07.0: reg 1c: [mem 0xe8000000-0xebffffff 64bit pref]
pci 0000:00:07.0: reg 24: [io 0xc100-0xc17f]
pci 0000:00:07.0: reg 30: [mem 0xef800000-0xef87ffff pref]
pci 0000:00:08.0: reg 10: [mem 0xef8a4000-0xef8a7fff]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Link [LNKA] (IRQs *5 10 11)
ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11)
ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11)
ACPI: PCI Interrupt Link [LNKD] (IRQs *5 10 11)
vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: device added: PCI:0000:00:07.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: loaded
vgaarb: bridge control possible 0000:00:07.0
vgaarb: no bridge control possible 0000:00:02.0
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
PCI: old code would have set cacheline size to 32 bytes, but clflush_size = 64
PCI: pci_cache_line_size set to 64 bytes
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
HPET: 3 timers in total, 0 timers will be used for per-cpu timer
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
hpet0: 3 comparators, 64-bit 62.500000 MHz counter
Switching to clocksource hpet
pnp: PnP ACPI init
ACPI: bus type pnp registered
pnp 00:00: [mem 0x00000000-0x0009ffff]
pnp 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:01: [io 0x0cf8-0x0cff]
pnp 00:01: Plug and Play ACPI device, IDs PNP0a03 (active)
pnp 00:02: [mem 0xfed00000-0xfed003ff]
pnp 00:02: Plug and Play ACPI device, IDs PNP0103 (active)
pnp 00:03: [io 0x0010-0x001f]
pnp 00:03: [io 0x0022-0x002d]
pnp 00:03: [io 0x0030-0x003f]
pnp 00:03: [io 0x0044-0x005f]
pnp 00:03: [io 0x0062-0x0063]
pnp 00:03: [io 0x0065-0x006f]
pnp 00:03: [io 0x0072-0x007f]
pnp 00:03: [io 0x0080]
pnp 00:03: [io 0x0084-0x0086]
pnp 00:03: [io 0x0088]
pnp 00:03: [io 0x008c-0x008e]
pnp 00:03: [io 0x0090-0x009f]
pnp 00:03: [io 0x00a2-0x00bd]
pnp 00:03: [io 0x00e0-0x00ef]
pnp 00:03: [io 0x08a0-0x08a3]
pnp 00:03: [io 0x0cc0-0x0ccf]
pnp 00:03: [io 0x04d0-0x04d1]
pnp 00:03: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:04: [dma 4]
pnp 00:04: [io 0x0000-0x000f]
pnp 00:04: [io 0x0081-0x0083]
pnp 00:04: [io 0x0087]
pnp 00:04: [io 0x0089-0x008b]
pnp 00:04: [io 0x008f]
pnp 00:04: [io 0x00c0-0x00df]
pnp 00:04: [io 0x0480-0x048f]
pnp 00:04: Plug and Play ACPI device, IDs PNP0200 (active)
pnp 00:05: [io 0x0070-0x0071]
pnp 00:05: [irq 8]
pnp 00:05: Plug and Play ACPI device, IDs PNP0b00 (active)
pnp 00:06: [io 0x0061]
pnp 00:06: Plug and Play ACPI device, IDs PNP0800 (active)
pnp 00:07: [irq 12]
pnp 00:07: Plug and Play ACPI device, IDs PNP0f13 (active)
pnp 00:08: [io 0x0060]
pnp 00:08: [io 0x0064]
pnp 00:08: [irq 1]
pnp 00:08: Plug and Play ACPI device, IDs PNP0303 PNP030b (active)
pnp 00:09: [io 0x03f0-0x03f5]
pnp 00:09: [io 0x03f7]
pnp 00:09: [irq 6]
pnp 00:09: [dma 2]
pnp 00:09: Plug and Play ACPI device, IDs PNP0700 (active)
pnp 00:0a: [io 0x03f8-0x03ff]
pnp 00:0a: [irq 4]
pnp 00:0a: Plug and Play ACPI device, IDs PNP0501 (active)
pnp 00:0b: [io 0x0378-0x037f]
pnp 00:0b: [irq 7]
pnp 00:0b: Plug and Play ACPI device, IDs PNP0400 (active)
pnp 00:0c: [io 0x10c0-0x1141]
pnp 00:0c: [io 0xb044-0xb047]
pnp 00:0c: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp: PnP ACPI: found 13 devices
ACPI: ACPI bus type pnp unregistered
system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved
system 00:03: [io 0x08a0-0x08a3] has been reserved
system 00:03: [io 0x0cc0-0x0ccf] has been reserved
system 00:03: [io 0x04d0-0x04d1] has been reserved
system 00:0c: [io 0x10c0-0x1141] has been reserved
system 00:0c: [io 0xb044-0xb047] has been reserved
PCI: max bus depth: 0 pci_try_num: 1
pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7]
pci_bus 0000:00: resource 5 [io 0x0d00-0xffff]
pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: resource 7 [mem 0xe0000000-0xfbffffff]
NET: Registered protocol family 2
IP route cache hash table entries: 262144 (order: 9, 2097152 bytes)
TCP established hash table entries: 524288 (order: 11, 8388608 bytes)
TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
TCP: Hash tables configured (established 524288 bind 65536)
TCP reno registered
NET: Registered protocol family 1
pci 0000:00:00.0: Limiting direct PCI/PCI transfers
pci 0000:00:01.0: PIIX3: Enabling Passive Release
pci 0000:00:01.0: Activating ISA DMA hang workarounds
alloc irq_desc for 23 on node -1
alloc kstat_irqs on node -1
pci 0000:00:01.2: PCI INT D -> GSI 23 (level, low) -> IRQ 23
pci 0000:00:01.2: PCI INT D disabled
pci 0000:00:02.0: Boot video device
alloc irq_desc for 37 on node -1
alloc kstat_irqs on node -1
pci 0000:00:05.0: PCI INT B -> GSI 37 (level, low) -> IRQ 37
pci 0000:00:05.0: PCI INT B disabled
pci 0000:00:07.0: Boot video device
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 14805k freed
audit: initializing netlink socket (disabled)
type=2000 audit(1374790135.268:1): initialized
HugeTLB registered 2 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
msgmni has been set to 15973
alg: No test for stdrng (krng)
ksign: Installing public key data
Loading keyring
- Added public key 70A327EA65A393B6
- User ID: Red Hat, Inc. (Kernel Module GPG key)
- Added public key D4A26C9CCD09BEDA
- User ID: Red Hat Enterprise Linux Driver Update Program <secalert@redhat.com>
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
acpiphp: Slot [0] registered
acpiphp: Slot [1] registered
acpiphp: Slot [2] registered
acpiphp: Slot [3] registered
acpiphp: Slot [4] registered
acpiphp: Slot [5] registered
acpiphp: Slot [6] registered
acpiphp: Slot [7] registered
acpiphp: Slot [8] registered
acpiphp: Slot [9] registered
acpiphp: Slot [10] registered
acpiphp: Slot [11] registered
acpiphp: Slot [12] registered
acpiphp: Slot [13] registered
acpiphp: Slot [14] registered
acpiphp: Slot [15] registered
acpiphp: Slot [16] registered
acpiphp: Slot [17] registered
acpiphp: Slot [18] registered
acpiphp: Slot [19] registered
acpiphp: Slot [20] registered
acpiphp: Slot [21] registered
acpiphp: Slot [22] registered
acpiphp: Slot [23] registered
acpiphp: Slot [24] registered
acpiphp: Slot [25] registered
acpiphp: Slot [26] registered
acpiphp: Slot [27] registered
acpiphp: Slot [28] registered
acpiphp: Slot [29] registered
acpiphp: Slot [30] registered
acpiphp: Slot [31] registered
ipmi message handler version 39.2
IPMI System Interface driver.
ipmi_si: Adding default-specified kcs state machine
ipmi_si: Trying default-specified kcs state machine at i/o address 0xca2, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Adding default-specified smic state machine
ipmi_si: Trying default-specified smic state machine at i/o address 0xca9, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Adding default-specified bt state machine
ipmi_si: Trying default-specified bt state machine at i/o address 0xe4, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Unable to find any System Interface(s)
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input0
ACPI: Power Button [PWRF]
input: Sleep Button as /devices/LNXSYSTM:00/LNXSLPBN:00/input/input1
ACPI: Sleep Button [SLPF]
ACPI: acpi_idle registered with cpuidle
ERST: Table is not found!
GHES: HEST is not enabled!
alloc irq_desc for 28 on node -1
alloc kstat_irqs on node -1
xen-platform-pci 0000:00:03.0: PCI INT A -> GSI 28 (level, low) -> IRQ 28
Grant table initialized
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
crash memory driver: version 1.1
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
00:0a: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
brd: module loaded
loop: module loaded
input: Macintosh mouse button emulation as /devices/virtual/input/input2
Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
uhci_hcd 0000:00:01.2: PCI INT D -> GSI 23 (level, low) -> IRQ 23
uhci_hcd 0000:00:01.2: setting latency timer to 64
uhci_hcd 0000:00:01.2: UHCI Host Controller
uhci_hcd 0000:00:01.2: new USB bus registered, assigned bus number 1
uhci_hcd 0000:00:01.2: irq 23, io base 0x0000c1c0
usb usb1: New USB device found, idVendor=1d6b, idProduct=0001
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: UHCI Host Controller
usb usb1: Manufacturer: Linux 2.6.32-358.14.1.el6.x86_64 uhci_hcd
usb usb1: SerialNumber: 0000:00:01.2
usb usb1: configuration #1 chosen from 1 choice
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 2 ports detected
uhci_hcd 0000:00:05.0: PCI INT B -> GSI 37 (level, low) -> IRQ 37
uhci_hcd 0000:00:05.0: setting latency timer to 64
uhci_hcd 0000:00:05.0: UHCI Host Controller
uhci_hcd 0000:00:05.0: new USB bus registered, assigned bus number 2
uhci_hcd 0000:00:05.0: irq 37, io base 0x0000c1e0
usb usb2: New USB device found, idVendor=1d6b, idProduct=0001
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: UHCI Host Controller
usb usb2: Manufacturer: Linux 2.6.32-358.14.1.el6.x86_64 uhci_hcd
usb usb2: SerialNumber: 0000:00:05.0
usb usb2: configuration #1 chosen from 1 choice
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 2 ports detected
PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mice: PS/2 mouse device common for all mice
rtc_cmos 00:05: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one day, 114 bytes nvram, hpet irqs
input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3
cpuidle: using governor ladder
cpuidle: using governor menu
EFI Variables Facility v0.08 2004-May-17
usbcore: registered new interface driver hiddev
usbcore: registered new interface driver usbhid
usbhid: v2.6:USB HID core driver
TCP cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
registered taskstats version 1
XENBUS: Device with no driver: device/vbd/768
XENBUS: Device with no driver: device/vkbd/0
XENBUS: Device with no driver: device/vif/0
XENBUS: Device with no driver: device/pci/0
rtc_cmos 00:05: setting system clock to 2013-07-25 22:08:56 UTC (1374790136)
Initalizing network drop monitor service
Freeing unused kernel memory: 1264k freed
Write protecting the kernel read-only data: 10240k
Freeing unused kernel memory: 904k freed
Freeing unused kernel memory: 1672k freed
dracut: dracut-004-303.el6
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.23.6-ioctl (2012-07-25) initialised: dm-devel@redhat.com
udev: starting version 147
ACPI: WMI: Mapper loaded
[drm] Initialized drm 1.1.0 20060810
dracut: Starting plymouth daemon
usb 2-1: new low speed USB device number 2 using uhci_hcd
ata_piix 0000:00:01.1: version 2.13
ata_piix 0000:00:01.1: setting latency timer to 64
scsi0 : ata_piix
scsi1 : ata_piix
ata1: PATA max MWDMA2 cmd 0x1f0 ctl 0x3f6 bmdma 0xc200 irq 14
ata2: PATA max MWDMA2 cmd 0x170 ctl 0x376 bmdma 0xc208 irq 15
usb 2-1: New USB device found, idVendor=045e, idProduct=00dd
usb 2-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-1: Product: Comfort Curve Keyboard 2000
usb 2-1: Manufacturer: Microsoft
usb 2-1: configuration #1 chosen from 1 choice
input: ImExPS/2 Generic Explorer Mouse as /devices/platform/i8042/serio1/input/input4
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:05.0/usb2/2-1/2-1:1.0/input/input5
generic-usb 0003:045E:00DD.0001: input,hidraw0: USB HID v1.11 Keyboard [Microsoft Comfort Curve Keyboard 2000] on usb-0000:00:05.0-1/input0
input: Microsoft Comfort Curve Keyboard 2000 as /devices/pci0000:00/0000:00:05.0/usb2/2-1/2-1:1.1/input/input6
generic-usb 0003:045E:00DD.0002: input,hidraw1: USB HID v1.11 Device [Microsoft Comfort Curve Keyboard 2000] on usb-0000:00:05.0-1/input1
xlblk_init: register_blkdev major: 202
alloc irq_desc for 934 on node 0
alloc kstat_irqs on node 0
blkfront: xvda: barriers disabled
xvda: xvda1 xvda2
Refined TSC clocksource calibration: 3321.753 MHz.
Switching to clocksource tsc
usb 2-2: new full speed USB device number 3 using uhci_hcd
usb 2-2: New USB device found, idVendor=1532, idProduct=002f
usb 2-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-2: Product: Razer Imperator
usb 2-2: Manufacturer: Razer
usb 2-2: configuration #1 chosen from 1 choice
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:05.0/usb2/2-2/2-2:1.0/input/input7
generic-usb 0003:1532:002F.0003: input,hidraw2: USB HID v1.11 Mouse [Razer Razer Imperator] on usb-0000:00:05.0-2/input0
input: Razer Razer Imperator as /devices/pci0000:00/0000:00:05.0/usb2/2-2/2-2:1.1/input/input8
generic-usb 0003:1532:002F.0004: input,hidraw3: USB HID v1.11 Keyboard [Razer Razer Imperator] on usb-0000:00:05.0-2/input1
dracut: Scanning devices xvda2 for LVM logical volumes vg_edi2/lv_swap vg_edi2/lv_root
dracut: inactive '/dev/vg_edi2/lv_root' [50.00 GiB] inherit
dracut: inactive '/dev/vg_edi2/lv_home' [9.60 GiB] inherit
dracut: inactive '/dev/vg_edi2/lv_swap' [3.91 GiB] inherit
EXT4-fs (dm-0): mounted filesystem with ordered data mode. Opts:
dracut: Mounted root filesystem /dev/mapper/vg_edi2-lv_root
dracut: Switching root
udev: starting version 147
piix4_smbus 0000:00:01.3: SMBus base address uninitialized - upgrade BIOS or use force_addr=0xaddr
alloc irq_desc for 40 on node -1
alloc kstat_irqs on node -1
snd_hda_intel 0000:00:06.0: PCI INT A -> GSI 40 (level, low) -> IRQ 40
snd_hda_intel 0000:00:06.0: setting latency timer to 64
alloc irq_desc for 18 on node -1
alloc kstat_irqs on node -1
snd_hda_intel 0000:00:08.0: PCI INT B -> GSI 18 (level, low) -> IRQ 18
hda_intel: Disabling MSI
snd_hda_intel 0000:00:08.0: setting latency timer to 64
hda-intel: azx_get_response timeout, switching to polling mode: last cmd=0x304f0d00
input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:08.0/sound/card1/input9
input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:08.0/sound/card1/input10
input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:08.0/sound/card1/input11
input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:08.0/sound/card1/input12
Initialising Xen virtual ethernet driver.
alloc irq_desc for 933 on node 0
alloc kstat_irqs on node 0
parport_pc 00:0b: reported by Plug and Play ACPI
parport0: PC-style at 0x378, irq 7 [PCSPP,TRISTATE]
ppdev: user-space parallel port driver
EXT4-fs (xvda1): mounted filesystem with ordered data mode. Opts:
EXT4-fs (dm-2): mounted filesystem with ordered data mode. Opts:
Adding 4095992k swap on /dev/mapper/vg_edi2-lv_swap. Priority:-1 extents:1 across:4095992k SS
NET: Registered protocol family 10
lo: Disabled Privacy Extensions
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
eth0: no IPv6 routers present
Slow work thread pool: Starting up
Slow work thread pool: Ready
FS-Cache: Loaded
Registering the id_resolver key type
FS-Cache: Netfs 'nfs' registered for caching
[-- Attachment #6: edi2-lspci.log.8GB --]
[-- Type: text/plain, Size: 8643 bytes --]
00:00.0 Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02)
Subsystem: Red Hat, Inc Qemu virtual machine
Physical Slot: 0
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:01.0 ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II]
Subsystem: Red Hat, Inc Qemu virtual machine
Physical Slot: 1
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:01.1 IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] (prog-if 80 [Master])
Subsystem: XenSource, Inc. Device 0001
Physical Slot: 1
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8]
Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable)
Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8]
Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable)
Region 4: I/O ports at c200 [size=16]
Kernel driver in use: ata_piix
Kernel modules: ata_generic, pata_acpi, ata_piix
00:01.2 USB controller: Intel Corporation 82371SB PIIX3 USB [Natoma/Triton II] (rev 01) (prog-if 00 [UHCI])
Subsystem: Red Hat, Inc Qemu virtual machine
Physical Slot: 1
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Interrupt: pin D routed to IRQ 23
Region 4: I/O ports at c1c0 [size=32]
Kernel driver in use: uhci_hcd
00:01.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 01)
Subsystem: Red Hat, Inc Qemu virtual machine
Physical Slot: 1
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 9
Kernel modules: i2c-piix4
00:02.0 VGA compatible controller: Device 1234:1111 (prog-if 00 [VGA controller])
Subsystem: XenSource, Inc. Device 0001
Physical Slot: 2
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at ef000000 (32-bit, prefetchable) [size=8M]
Expansion ROM at <unassigned> [disabled]
00:03.0 Unassigned class [ff80]: XenSource, Inc. Xen Platform Device (rev 01)
Subsystem: XenSource, Inc. Xen Platform Device
Physical Slot: 3
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 28
Region 0: I/O ports at c000 [size=256]
Region 1: Memory at ee000000 (32-bit, prefetchable) [size=16M]
Kernel driver in use: xen-platform-pci
00:05.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Physical Slot: 5
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Interrupt: pin B routed to IRQ 37
Region 4: I/O ports at c1e0 [size=32]
Kernel driver in use: uhci_hcd
00:06.0 Audio device: Creative Labs [SB X-Fi Xtreme Audio] CA0110-IBG
Subsystem: Creative Labs SB1040
Physical Slot: 6
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (500ns min, 5000ns max)
Interrupt: pin A routed to IRQ 40
Region 0: Memory at ef8a0000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [dc] Power Management version 3
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: snd_hda_intel
Kernel modules: snd-hda-intel
00:07.0 VGA compatible controller: NVIDIA Corporation GF100GL [Quadro 6000] (rev a3) (prog-if 00 [VGA controller])
Subsystem: NVIDIA Corporation Device 075f
Physical Slot: 7
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 5
Region 0: Memory at ec000000 (32-bit, non-prefetchable) [size=32M]
Region 1: Memory at e0000000 (64-bit, prefetchable) [size=128M]
Region 3: Memory at e8000000 (64-bit, prefetchable) [size=64M]
Region 5: I/O ports at c100 [size=128]
Expansion ROM at ef800000 [disabled] [size=512K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [b4] Vendor Specific Information: Len=14 <?>
Kernel modules: nouveau, nvidiafb
00:08.0 Audio device: NVIDIA Corporation GF100 High Definition Audio Controller (rev a1)
Subsystem: NVIDIA Corporation Device 075f
Physical Slot: 8
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64
Interrupt: pin B routed to IRQ 18
Region 0: Memory at ef8a4000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: snd_hda_intel
Kernel modules: snd-hda-intel
[-- Attachment #7: map.8GB --]
[-- Type: text/plain, Size: 901 bytes --]
BIOS-e820: 0000000000000000 - 000000000009e000 (usable)
BIOS-e820: 000000000009e000 - 00000000000a0000 (reserved)
BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 00000000e0000000 (usable)
Xen VGA: 00000000ef000000 - 00000000ef800000 32-bit
Xen Platform: 00000000ee000000 - 00000000ef000000 32-bit
Xen VGA: 00000000ef000000 - 00000000ef800000 32-bit
Xen Platform: 00000000ee000000 - 00000000ef000000 32-bit
Creative Audio: 00000000ef8a0000 - 00000000ef8a4000 32-bit
Quadro 6000 2: 00000000e0000000 - 00000000e8000000 64-bit
Quadro 6000 3: 00000000e8000000 - 00000000ec000000 64-bit
Quadro 6000 1: 00000000ec000000 - 00000000ee000000 32-bit
Quadro ROM: 00000000ef800000 - 00000000ef880000
Quadro Audio: 00000000ef8a4000 - 00000000ef8a8000 32-bit
BIOS-e820: 00000000fc000000 - 0000000100000000 (reserved)
BIOS-e820: 0000000100000000 - 000000021f800000 (usable)
[-- Attachment #8: Type: text/plain, Size: 126 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-25 19:18 ` George Dunlap
@ 2013-07-25 21:48 ` Gordan Bobic
2013-07-25 22:23 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-25 21:48 UTC (permalink / raw)
To: George Dunlap; +Cc: Andrew Cooper, xen-devel
[-- Attachment #1: Type: text/plain, Size: 3606 bytes --]
On 07/25/2013 08:18 PM, George Dunlap wrote:
> On Wed, Jul 24, 2013 at 11:15 PM, Gordan Bobic <gordan@bobich.net> wrote:
>> Attached are the logs (loglvl=all) and configs for 2GB (working) and 8GB
>> (screen corruption + domU crash + sometimes dom0 crashing with it).
>>
>> I can see in the xl-dmesg log in 8GB case that there is memory remapping
>> going on to allow for the lowmem MMIO hole, but it doesn't seem to help.
>
> There's a possibility that it's actually got nothing to do with
> relocation, but with bugs in your hardware.
That wouldn't surprise me at all, unfortunately. :(
> Can you try:
> * Set the guest memory to 3600
> * Boot the guest, and check to make sure that xl dmesg shows does
> *not* relocate memory?
> * Report whether it crashes?
xl dmesg from booting a Linux domU with 3600MB is attached.
The crash is never immediate, both Linux and Windows boot fine. But when
a large 3D application like a game loads, there is frame buffer
corruption immediately visible, and the domU will typically lock up some
seconds later. Infrequently, it will take the host down with it.
> If it's a bug in the hardware, I would expect to see that memory was
> not relocated, but that the system will lock up anyway.
That is indeed what seems to happen - the memory map looks OK with no
overlaps between PCI memory and ROM ranges and the usable or reserved
e820 regions.
> Can you also do lspci -vvv in dom0 before assigning the device and
> attach the output?
I have attached it, but not before assigning - I'll need to reboot for
that. Do you expect there to be a difference in mapping in dom0 before
and after assigning the device to domU?
> The hardware bug we've seen is this: In order for the IOMMU to work
> properly, *all* DMA transactions must be passed up to the root bridge
> so the IOMMU can translate the addresses from guest address to host
> address. Unfortunately, an awful lot of bridges will not do this
> properly, which means that the address is not translated properly,
> which means that if a *guest* memory address overlaps the a *host*
> MMIO range, badness ensues.
Hmm, looking at xl dmesg vs dom0 lspci, that does appear to be the case:
xl dmesg:
(XEN) HVM24: E820 table:
(XEN) HVM24: [00]: 00000000:00000000 - 00000000:0009e000: RAM
(XEN) HVM24: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
(XEN) HVM24: HOLE: 00000000:000a0000 - 00000000:000e0000
(XEN) HVM24: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
(XEN) HVM24: [03]: 00000000:00100000 - 00000000:e0000000: RAM
(XEN) HVM24: HOLE: 00000000:e0000000 - 00000000:fc000000
(XEN) HVM24: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
(XEN) HVM24: [05]: 00000001:00000000 - 00000001:00800000: RAM
lspci:
08:00.0 VGA compatible controller: nVidia Corporation GF100
Region 0: Memory at f8000000 (32-bit, non-prefetchable)
[disabled] [size=32M]
Region 1: Memory at b8000000 (64-bit, prefetchable) [disabled]
[size=128M]
Region 3: Memory at b4000000 (64-bit, prefetchable) [disabled]
[size=64M]
Unless I'm reading this wrong, it means that physical GPU region 0 is in
the domU reserved area, and GPU regions 1 and 2 and in the domU RAM area.
b4000000 = 2880MB
So in theory, that might mean that I should be able to get away with up
to 2880MB of RAM for domU without encountering frame buffer corruption
and the crash. I will test this shortly.
> There's nothing we can do about this in
> Xen other than make the guest MMIO hole the same size as the host MMIO
> hole.
Not sure I follow. Do you mean make it so that pBAR = vBAR?
Gordan
[-- Attachment #2: xl-dmesg5 --]
[-- Type: text/plain, Size: 12491 bytes --]
(XEN) HVM24: HVM Loader
(XEN) HVM24: Detected Xen v4.3.0
(XEN) HVM24: Xenbus rings @0xfeffc000, event channel 10
(XEN) HVM24: System requested ROMBIOS
(XEN) HVM24: CPU speed is 3322 MHz
(XEN) HVM24: Relocating guest memory for lowmem MMIO space enabled
(XEN) irq.c:270: Dom24 PCI link 0 changed 0 -> 5
(XEN) HVM24: PCI-ISA link 0 routed to IRQ5
(XEN) irq.c:270: Dom24 PCI link 1 changed 0 -> 10
(XEN) HVM24: PCI-ISA link 1 routed to IRQ10
(XEN) irq.c:270: Dom24 PCI link 2 changed 0 -> 11
(XEN) HVM24: PCI-ISA link 2 routed to IRQ11
(XEN) irq.c:270: Dom24 PCI link 3 changed 0 -> 5
(XEN) HVM24: PCI-ISA link 3 routed to IRQ5
(XEN) HVM24: pci dev 01:2 INTD->IRQ5
(XEN) HVM24: pci dev 01:3 INTA->IRQ10
(XEN) HVM24: pci dev 03:0 INTA->IRQ5
(XEN) HVM24: pci dev 04:0 INTA->IRQ5
(XEN) HVM24: pci dev 05:0 INTB->IRQ11
(XEN) HVM24: pci dev 06:0 INTA->IRQ11
(XEN) HVM24: pci dev 07:0 INTA->IRQ5
(XEN) HVM24: pci dev 08:0 INTB->IRQ10
(XEN) HVM24: Relocating 0x800 pages from 0e0000000 to 100000000 for lowmem MMIO hole
(XEN) HVM24: RAM in high memory; setting high_mem resource base to 100800000
(XEN) HVM24: pci dev 07:0 bar 14 size 008000000: 0e000000c
(XEN) memory_map:add: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) HVM24: pci dev 07:0 bar 1c size 004000000: 0e800000c
(XEN) memory_map:add: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) HVM24: pci dev 07:0 bar 10 size 002000000: 0ec000000
(XEN) HVM24: pci dev 03:0 bar 14 size 001000000: 0ee000008
(XEN) HVM24: pci dev 02:0 bar 10 size 000800000: 0ef000008
(XEN) HVM24: pci dev 07:0 bar 30 size 000080000: 0ef800000
(XEN) HVM24: pci dev 04:0 bar 10 size 000020000: 0ef880000
(XEN) HVM24: pci dev 06:0 bar 10 size 000004000: 0ef8a0000
(XEN) memory_map:add: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) HVM24: pci dev 08:0 bar 10 size 000004000: 0ef8a4000
(XEN) memory_map:add: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) HVM24: pci dev 03:0 bar 10 size 000000100: 00000c001
(XEN) HVM24: pci dev 07:0 bar 24 size 000000080: 00000c101
(XEN) ioport_map:add: dom24 gport=c100 mport=df80 nr=80
(XEN) HVM24: pci dev 04:0 bar 14 size 000000040: 00000c181
(XEN) HVM24: pci dev 01:2 bar 20 size 000000020: 00000c1c1
(XEN) HVM24: pci dev 05:0 bar 20 size 000000020: 00000c1e1
(XEN) ioport_map:add: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) HVM24: pci dev 01:1 bar 20 size 000000010: 00000c201
(XEN) HVM24: Multiprocessor initialisation:
(XEN) HVM24: - CPU0 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM24: - CPU1 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM24: - CPU2 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM24: - CPU3 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM24: - CPU4 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM24: - CPU5 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM24: - CPU6 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM24: - CPU7 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM24: Testing HVM environment:
(XEN) HVM24: - REP INSB across page boundaries ... passed
(XEN) HVM24: - GS base MSRs and SWAPGS ... passed
(XEN) HVM24: Passed 2 of 2 tests
(XEN) HVM24: Writing SMBIOS tables ...
(XEN) HVM24: Loading ROMBIOS ...
(XEN) HVM24: 9628 bytes of ROMBIOS high-memory extensions:
(XEN) HVM24: Relocating to 0xfc001000-0xfc00359c ... done
(XEN) HVM24: Creating MP tables ...
(XEN) HVM24: Loading Standard VGABIOS ...
(XEN) HVM24: Loading PCI Option ROM ...
(XEN) HVM24: - Manufacturer: http://ipxe.org
(XEN) HVM24: - Product name: iPXE
(XEN) HVM24: Option ROMs:
(XEN) HVM24: c0000-c9fff: VGA BIOS
(XEN) HVM24: ca000-dafff: Etherboot ROM
(XEN) HVM24: Loading ACPI ...
(XEN) HVM24: vm86 TSS at fc00f700
(XEN) HVM24: BIOS map:
(XEN) HVM24: f0000-fffff: Main BIOS
(XEN) HVM24: E820 table:
(XEN) HVM24: [00]: 00000000:00000000 - 00000000:0009e000: RAM
(XEN) HVM24: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
(XEN) HVM24: HOLE: 00000000:000a0000 - 00000000:000e0000
(XEN) HVM24: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
(XEN) HVM24: [03]: 00000000:00100000 - 00000000:e0000000: RAM
(XEN) HVM24: HOLE: 00000000:e0000000 - 00000000:fc000000
(XEN) HVM24: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
(XEN) HVM24: [05]: 00000001:00000000 - 00000001:00800000: RAM
(XEN) HVM24: Invoking ROMBIOS ...
(XEN) HVM24: $Revision: 1.221 $ $Date: 2008/12/07 17:32:29 $
(XEN) stdvga.c:147:d24 entering stdvga and caching modes
(XEN) HVM24: VGABios $Id: vgabios.c,v 1.67 2008/01/27 09:44:12 vruppert Exp $
(XEN) HVM24: VBE Bios $Id: vbe.c,v 1.60 2008/03/02 07:47:21 vruppert Exp $
(XEN) HVM24: Bochs BIOS - build: 06/23/99
(XEN) HVM24: $Revision: 1.221 $ $Date: 2008/12/07 17:32:29 $
(XEN) HVM24: Options: apmbios pcibios eltorito PMM
(XEN) HVM24:
(XEN) HVM24: ata0-0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63
(XEN) HVM24: ata0 master: QEMU HARDDISK ATA-7 Hard-Disk ( 64 GBytes)
(XEN) HVM24: IDE time out
(XEN) HVM24:
(XEN) HVM24:
(XEN) HVM24:
(XEN) HVM24: Press F12 for boot menu.
(XEN) HVM24:
(XEN) HVM24: Booting from Hard Disk...
(XEN) HVM24: Booting from 0000:7c00
(XEN) HVM24: int13_harddisk: function 41, unmapped device for ELDL=81
(XEN) HVM24: int13_harddisk: function 08, unmapped device for ELDL=81
(XEN) HVM24: *** int 15h function AX=00c0, BX=0000 not yet supported!
(XEN) HVM24: *** int 15h function AX=ec00, BX=0002 not yet supported!
(XEN) HVM24: KBD: unsupported int 16h function 03
(XEN) HVM24: *** int 15h function AX=e980, BX=0000 not yet supported!
(XEN) HVM24: int13_harddisk: function 41, unmapped device for ELDL=81
(XEN) HVM24: int13_harddisk: function 02, unmapped device for ELDL=81
(XEN) HVM24: int13_harddisk: function 41, unmapped device for ELDL=82
(XEN) HVM24: int13_harddisk: function 02, unmapped device for ELDL=82
(XEN) HVM24: int13_harddisk: function 41, unmapped device for ELDL=83
(XEN) HVM24: int13_harddisk: function 02, unmapped device for ELDL=83
(XEN) HVM24: int13_harddisk: function 41, unmapped device for ELDL=84
(XEN) HVM24: int13_harddisk: function 02, unmapped device for ELDL=84
(XEN) HVM24: int13_harddisk: function 41, unmapped device for ELDL=85
(XEN) HVM24: int13_harddisk: function 02, unmapped device for ELDL=85
(XEN) HVM24: int13_harddisk: function 41, unmapped device for ELDL=86
(XEN) HVM24: int13_harddisk: function 02, unmapped device for ELDL=86
(XEN) HVM24: int13_harddisk: function 41, unmapped device for ELDL=87
(XEN) HVM24: int13_harddisk: function 02, unmapped device for ELDL=87
(XEN) HVM24: int13_harddisk: function 41, ELDL out of range 88
(XEN) HVM24: int13_harddisk: function 02, ELDL out of range 88
(XEN) HVM24: int13_harddisk: function 41, ELDL out of range 89
(XEN) HVM24: int13_harddisk: function 02, ELDL out of range 89
(XEN) HVM24: int13_harddisk: function 41, ELDL out of range 8a
(XEN) HVM24: int13_harddisk: function 02, ELDL out of range 8a
(XEN) HVM24: int13_harddisk: function 41, ELDL out of range 8b
(XEN) HVM24: int13_harddisk: function 02, ELDL out of range 8b
(XEN) HVM24: int13_harddisk: function 41, ELDL out of range 8c
(XEN) HVM24: int13_harddisk: function 02, ELDL out of range 8c
(XEN) HVM24: int13_harddisk: function 41, ELDL out of range 8d
(XEN) HVM24: int13_harddisk: function 02, ELDL out of range 8d
(XEN) HVM24: int13_harddisk: function 41, ELDL out of range 8e
(XEN) HVM24: int13_harddisk: function 02, ELDL out of range 8e
(XEN) HVM24: int13_harddisk: function 41, ELDL out of range 8f
(XEN) HVM24: int13_harddisk: function 02, ELDL out of range 8f
(XEN) irq.c:375: Dom24 callback via changed to Direct Vector 0xe9
(XEN) ioport_map:remove: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:remove: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:remove: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:remove: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:remove: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:remove: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:remove: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) ioport_map:add: dom24 gport=c1e0 mport=9a00 nr=20
(XEN) memory_map:remove: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a0 mfn=d7efc nr=4
(XEN) memory_map:remove: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:add: dom24 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom24 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom24 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom24 gport=c100 mport=df80 nr=80
(XEN) memory_map:remove: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:remove: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) memory_map:add: dom24 gfn=ef8a4 mfn=fbdfc nr=4
(XEN) irq.c:270: Dom24 PCI link 0 changed 5 -> 0
(XEN) irq.c:270: Dom24 PCI link 1 changed 10 -> 0
(XEN) irq.c:270: Dom24 PCI link 2 changed 11 -> 0
(XEN) irq.c:270: Dom24 PCI link 3 changed 5 -> 0
[-- Attachment #3: dom0-lspci --]
[-- Type: text/plain, Size: 93453 bytes --]
00:00.0 Host bridge: Intel Corporation 5520 I/O Hub to ESI Port (rev 22)
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Capabilities: [160] Vendor Specific Information <?>
00:02.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 2 (rev 22) (prog-if 00 [Normal decode])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=0f, subordinate=0f, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fbe00000-fbefffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Intel Corporation Device 0000
Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit-
Address: fee00000 Data: 4029
Masking: 00000002 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x2, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 0, PowerLimit 0.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Kernel driver in use: pcieport
Kernel modules: shpchp
00:03.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 3 (rev 22) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=09, subordinate=0e, sec-latency=0
I/O behind bridge: 0000e000-0000efff
Memory behind bridge: d7e00000-dfffffff
Prefetchable memory behind bridge: 00000000c0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Intel Corporation Device 0000
Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit-
Address: fee00000 Data: 4031
Masking: 00000002 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr+ FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 33, PowerLimit 75.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO+ CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 0e, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Capabilities: [160] Vendor Specific Information <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00:07.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 7 (rev 22) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=05, subordinate=08, sec-latency=0
I/O behind bridge: 0000c000-0000dfff
Memory behind bridge: f4000000-fbdfffff
Prefetchable memory behind bridge: 00000000a8000000-00000000bfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Intel Corporation Device 0000
Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit-
Address: fee00000 Data: 4039
Masking: 00000002 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 37, PowerLimit 75.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+ ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 0e, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Capabilities: [160] Vendor Specific Information <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00:13.0 PIC: Intel Corporation 5520/5500/X58 I/O Hub I/OxAPIC Interrupt Controller (rev 22) (prog-if 20 [IO(X)-APIC])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at fec8a000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [6c] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
00:14.0 PIC: Intel Corporation 5520/5500/X58 I/O Hub System Management Registers (rev 22) (prog-if 00 [8259])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Kernel driver in use: i7core_edac
Kernel modules: i7core_edac
00:14.1 PIC: Intel Corporation 5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers (rev 22) (prog-if 00 [8259])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
00:14.2 PIC: Intel Corporation 5520/5500/X58 I/O Hub Control Status and RAS Registers (rev 22) (prog-if 00 [8259])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
00:14.3 PIC: Intel Corporation 5520/5500/X58 I/O Hub Throttle Registers (rev 22) (prog-if 00 [8259])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:1a.0 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 16
Region 4: I/O ports at 9980 [disabled] [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: pciback
00:1a.1 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 21
Region 4: I/O ports at 9a00 [disabled] [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: pciback
00:1a.2 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin D routed to IRQ 19
Region 4: I/O ports at 9a80 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1a.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 (prog-if 20 [EHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 18
Region 0: Memory at f3df8000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ehci-pci
00:1b.0 Audio device: Intel Corporation 82801JI (ICH10 Family) HD Audio Controller
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 230
Region 0: Memory at f3df4000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 40c9
Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE- FLReset+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Virtual Channel <?>
Capabilities: [130] Root Complex Link <?>
Kernel driver in use: snd_hda_intel
Kernel modules: snd-hda-intel
00:1c.0 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 1 (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 00001000-00001fff
Memory behind bridge: 40000000-401fffff
Prefetchable memory behind bridge: 0000000040200000-00000000403fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
Slot # 0, PowerLimit 10.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4041
Capabilities: [90] Subsystem: eVga.com. Corp. Device 101a
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1c.2 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 3 (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 0000b000-0000bfff
Memory behind bridge: f3f00000-f3ffffff
Prefetchable memory behind bridge: 0000000040400000-00000000405fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
Slot # 0, PowerLimit 10.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4049
Capabilities: [90] Subsystem: eVga.com. Corp. Device 101a
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1c.4 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 5 (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
I/O behind bridge: 0000a000-0000afff
Memory behind bridge: f3e00000-f3efffff
Prefetchable memory behind bridge: 0000000040600000-00000000407fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+
Slot # 0, PowerLimit 10.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4051
Capabilities: [90] Subsystem: eVga.com. Corp. Device 101a
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100] Virtual Channel <?>
Capabilities: [180] Root Complex Link <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1d.0 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 4: I/O ports at 9b00 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.1 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 19
Region 4: I/O ports at 9b80 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.2 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 18
Region 4: I/O ports at 9c00 [disabled] [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: pciback
00:1d.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 (prog-if 20 [EHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 23
Region 0: Memory at f3dfa000 (32-bit, non-prefetchable) [disabled] [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: pciback
00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90) (prog-if 01 [Subtractive decode])
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Subsystem: eVga.com. Corp. Device 101a
00:1f.0 ISA bridge: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information <?>
Kernel driver in use: lpc_ich
Kernel modules: lpc_ich
00:1f.2 SATA controller: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller (prog-if 01 [AHCI 1.0])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 221
Region 0: I/O ports at 9d00 [size=8]
Region 1: I/O ports at 9f00 [size=4]
Region 2: I/O ports at 9e80 [size=8]
Region 3: I/O ports at 9e00 [size=4]
Region 4: I/O ports at 9d80 [size=32]
Region 5: Memory at f3dfc000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit-
Address: fee00000 Data: 4079
Capabilities: [70] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a8] SATA HBA <?>
Capabilities: [b0] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ahci
Kernel modules: ahci
00:1f.3 SMBus: Intel Corporation 82801JI (ICH10 Family) SMBus Controller
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 18
Region 0: Memory at f3dfe000 (64-bit, non-prefetchable) [size=256]
Region 4: I/O ports at 0400 [size=32]
Kernel driver in use: i801_smbus
Kernel modules: i2c-i801
02:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8057 PCI-E Gigabit Ethernet Controller (rev 10)
Subsystem: eVga.com. Corp. Device abcd
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 220
Region 0: Memory at f3edc000 (64-bit, non-prefetchable) [size=16K]
Region 2: I/O ports at af00 [size=256]
Expansion ROM at f3ee0000 [disabled] [size=128K]
Capabilities: [48] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [5c] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4071
Capabilities: [c0] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <32us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP+ BadDLLP+ Rollover- Timeout+ NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 1f, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [130] Device Serial Number 3e-1e-0e-ff-ff-bc-1f-00
Kernel driver in use: sky2
Kernel modules: sky2
03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8057 PCI-E Gigabit Ethernet Controller (rev 10)
Subsystem: eVga.com. Corp. Device abcd
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 219
Region 0: Memory at f3fdc000 (64-bit, non-prefetchable) [size=16K]
Region 2: I/O ports at bf00 [size=256]
Expansion ROM at f3fe0000 [disabled] [size=128K]
Capabilities: [48] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [5c] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4069
Capabilities: [c0] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <32us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr+ BadTLP+ BadDLLP+ Rollover- Timeout+ NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 1f, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [130] Device Serial Number 3d-1e-0e-ff-ff-bc-1f-00
Kernel driver in use: sky2
Kernel modules: sky2
05:00.0 PCI bridge: nVidia Corporation NF200 PCIe 2.0 switch for mainboards (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=05, secondary=06, subordinate=08, sec-latency=0
I/O behind bridge: 0000c000-0000dfff
Memory behind bridge: f4000000-fbdfffff
Prefetchable memory behind bridge: 00000000a8000000-00000000bfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Upstream Port, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-SlotPowerLimit 75.000000W
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [a0] Subsystem: nVidia Corporation Device c55e
Kernel driver in use: pcieport
Kernel modules: shpchp
06:00.0 PCI bridge: nVidia Corporation NF200 PCIe 2.0 switch for mainboards (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=06, secondary=08, subordinate=08, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: f8000000-fbdfffff
Prefetchable memory behind bridge: 00000000b4000000-00000000bfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 1, PowerLimit 0.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Kernel driver in use: pcieport
Kernel modules: shpchp
06:02.0 PCI bridge: nVidia Corporation NF200 PCIe 2.0 switch for mainboards (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=06, secondary=07, subordinate=07, sec-latency=0
I/O behind bridge: 0000c000-0000cfff
Memory behind bridge: f4000000-f7ffffff
Prefetchable memory behind bridge: 00000000a8000000-00000000b3ffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 3, PowerLimit 0.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Kernel driver in use: pcieport
Kernel modules: shpchp
07:00.0 VGA compatible controller: nVidia Corporation Device 06d9 (rev a3) (prog-if 00 [VGA controller])
Subsystem: ASUSTeK Computer Inc. Device 8342
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 39
Region 0: Memory at f4000000 (32-bit, non-prefetchable) [disabled] [size=32M]
Region 1: Memory at a8000000 (64-bit, prefetchable) [disabled] [size=128M]
Region 3: Memory at b0000000 (64-bit, prefetchable) [disabled] [size=64M]
Region 5: I/O ports at cf80 [disabled] [size=128]
[virtual] Expansion ROM at f7f00000 [disabled] [size=512K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 00000000fee35000 Data: 4062
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [b4] Vendor Specific Information <?>
Capabilities: [100] Virtual Channel <?>
Capabilities: [128] Power Budgeting <?>
Capabilities: [600] Vendor Specific Information <?>
Kernel driver in use: pciback
Kernel modules: nouveau, nvidiafb
07:00.1 Audio device: nVidia Corporation GF100 High Definition Audio Controller (rev a1)
Subsystem: ASUSTeK Computer Inc. Device 8342
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 38
Region 0: Memory at f7ffc000 (32-bit, non-prefetchable) [disabled] [size=16K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 00000000fee35000 Data: 4072
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Kernel driver in use: pciback
Kernel modules: snd-hda-intel
08:00.0 VGA compatible controller: nVidia Corporation GF100 [Quadro 6000] (rev a3) (prog-if 00 [VGA controller])
Subsystem: nVidia Corporation Device 075f
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 30
Region 0: Memory at f8000000 (32-bit, non-prefetchable) [disabled] [size=32M]
Region 1: Memory at b8000000 (64-bit, prefetchable) [disabled] [size=128M]
Region 3: Memory at b4000000 (64-bit, prefetchable) [disabled] [size=64M]
Region 5: I/O ports at df80 [disabled] [size=128]
Expansion ROM at fbd00000 [disabled] [size=512K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4034
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [b4] Vendor Specific Information <?>
Capabilities: [100] Virtual Channel <?>
Capabilities: [128] Power Budgeting <?>
Capabilities: [600] Vendor Specific Information <?>
Kernel driver in use: pciback
Kernel modules: nouveau, nvidiafb
08:00.1 Audio device: nVidia Corporation GF100 High Definition Audio Controller (rev a1)
Subsystem: nVidia Corporation Device 075f
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin B routed to IRQ 37
Region 0: Memory at fbdfc000 (32-bit, non-prefetchable) [disabled] [size=16K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 403c
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Kernel driver in use: pciback
Kernel modules: snd-hda-intel
09:00.0 PCI bridge: nVidia Corporation NF200 PCIe 2.0 switch for mainboards (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=09, secondary=0a, subordinate=0e, sec-latency=0
I/O behind bridge: 0000e000-0000efff
Memory behind bridge: d7e00000-dfffffff
Prefetchable memory behind bridge: 00000000c0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Upstream Port, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-SlotPowerLimit 75.000000W
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [a0] Subsystem: nVidia Corporation Device c55e
Kernel driver in use: pcieport
Kernel modules: shpchp
0a:00.0 PCI bridge: nVidia Corporation NF200 PCIe 2.0 switch for mainboards (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=0a, secondary=0e, subordinate=0e, sec-latency=0
I/O behind bridge: 0000e000-0000efff
Memory behind bridge: d7f00000-dfffffff
Prefetchable memory behind bridge: 00000000c0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt+
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 1, PowerLimit 0.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB
Kernel driver in use: pcieport
Kernel modules: shpchp
0a:01.0 PCI bridge: nVidia Corporation NF200 PCIe 2.0 switch for mainboards (rev a3) (prog-if 00 [Normal decode])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=0a, secondary=0c, subordinate=0d, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: d7e00000-d7efffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #1, Speed 5GT/s, Width x8, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 2, PowerLimit 0.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Kernel driver in use: pcieport
Kernel modules: shpchp
0a:02.0 PCI bridge: nVidia Corporation NF200 PCIe 2.0 switch for mainboards (rev a3) (prog-if 00 [Normal decode])
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=0a, secondary=0b, subordinate=0b, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 3, PowerLimit 0.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Kernel driver in use: pcieport
Kernel modules: shpchp
0c:00.0 PCI bridge: Creative Labs [SB X-Fi Xtreme Audio] CA0110-IBG PCI to PCIe Bridge (prog-if 00 [Normal decode])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=0c, secondary=0d, subordinate=0d, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: d7e00000-d7efffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Bridge: PM- B3+
Capabilities: [60] MSI: Enable- Count=1/16 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [80] Subsystem: Creative Labs Device 0010
Capabilities: [90] Express (v1) PCI/PCI-X Bridge, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ BrConfRtry-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <16us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn-
Kernel modules: shpchp
0d:00.0 Audio device: Creative Labs [SB X-Fi Xtreme Audio] CA0110-IBG
Subsystem: Creative Labs SB1040
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 34
Region 0: Memory at d7efc000 (32-bit, non-prefetchable) [disabled] [size=16K]
Capabilities: [dc] Power Management version 3
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pciback
Kernel modules: snd-hda-intel
0e:00.0 VGA compatible controller: ATI Technologies Inc RV770 [Radeon HD 4850] (prog-if 00 [VGA controller])
Subsystem: PC Partner Limited Sapphire HD 4850 512MB GDDR3 PCI-E Dual Slot Fansink
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 218
Region 0: Memory at c0000000 (64-bit, prefetchable) [size=256M]
Region 2: Memory at d8000000 (64-bit, non-prefetchable) [size=64K]
Region 4: I/O ports at e000 [size=256]
Expansion ROM at d7fe0000 [disabled] [size=128K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4061
Capabilities: [100] Vendor Specific Information <?>
Kernel driver in use: radeon
Kernel modules: radeon
0e:00.1 Audio device: ATI Technologies Inc HD48x0 audio
Subsystem: PC Partner Limited Sapphire HD 4850 512MB GDDR3 PCI-E Dual Slot Fansink
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin B routed to IRQ 231
Region 0: Memory at dc000000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 40d9
Capabilities: [100] Vendor Specific Information <?>
Kernel driver in use: snd_hda_intel
Kernel modules: snd-hda-intel
0f:00.0 USB Controller: NEC Corporation uPD720200 USB 3.0 Host Controller (rev 03) (prog-if 30 [XHCI])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 29
Region 0: Memory at fbefe000 (64-bit, non-prefetchable) [size=8K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [70] MSI: Enable- Count=1/8 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
Vector table: BAR=0 offset=00001000
PBA: BAR=0 offset=00001080
Capabilities: [a0] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <4us, L1 unlimited
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [140] Device Serial Number ff-ff-ff-ff-ff-ff-ff-ff
Capabilities: [150] #18
Kernel driver in use: xhci_hcd
Kernel modules: xhci-hcd
fe:00.0 Host bridge: Intel Corporation Xeon 5600 Series QuickPath Architecture Generic Non-core Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:00.1 Host bridge: Intel Corporation Xeon 5600 Series QuickPath Architecture System Address Decoder
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.0 Host bridge: Intel Corporation Xeon 5600 Series QPI Link 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.1 Host bridge: Intel Corporation Xeon 5600 Series QPI Physical 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.2 Host bridge: Intel Corporation Xeon 5600 Series Mirror Port Link 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.3 Host bridge: Intel Corporation Xeon 5600 Series Mirror Port Link 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.4 Host bridge: Intel Corporation Xeon 5600 Series QPI Link 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.5 Host bridge: Intel Corporation Xeon 5600 Series QPI Physical 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:03.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:03.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Target Address Decoder
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:03.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller RAS Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:03.4 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Test Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:04.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:04.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:04.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:04.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:05.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:05.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:05.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:05.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:06.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:06.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:06.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:06.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:00.0 Host bridge: Intel Corporation Xeon 5600 Series QuickPath Architecture Generic Non-core Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:00.1 Host bridge: Intel Corporation Xeon 5600 Series QuickPath Architecture System Address Decoder
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.0 Host bridge: Intel Corporation Xeon 5600 Series QPI Link 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.1 Host bridge: Intel Corporation Xeon 5600 Series QPI Physical 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.2 Host bridge: Intel Corporation Xeon 5600 Series Mirror Port Link 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.3 Host bridge: Intel Corporation Xeon 5600 Series Mirror Port Link 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.4 Host bridge: Intel Corporation Xeon 5600 Series QPI Link 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.5 Host bridge: Intel Corporation Xeon 5600 Series QPI Physical 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:03.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:03.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Target Address Decoder
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:03.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller RAS Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:03.4 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Test Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:04.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:04.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:04.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:04.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:05.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:05.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:05.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:05.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:06.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:06.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:06.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:06.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
[-- Attachment #4: Type: text/plain, Size: 126 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-25 21:48 ` Gordan Bobic
@ 2013-07-25 22:23 ` Gordan Bobic
2013-07-26 0:21 ` Ian Campbell
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-25 22:23 UTC (permalink / raw)
To: George Dunlap; +Cc: Andrew Cooper, xen-devel
On 07/25/2013 10:48 PM, Gordan Bobic wrote:
> On 07/25/2013 08:18 PM, George Dunlap wrote:
>> On Wed, Jul 24, 2013 at 11:15 PM, Gordan Bobic <gordan@bobich.net> wrote:
>>> Attached are the logs (loglvl=all) and configs for 2GB (working) and 8GB
>>> (screen corruption + domU crash + sometimes dom0 crashing with it).
>>>
>>> I can see in the xl-dmesg log in 8GB case that there is memory remapping
>>> going on to allow for the lowmem MMIO hole, but it doesn't seem to help.
>>
>> There's a possibility that it's actually got nothing to do with
>> relocation, but with bugs in your hardware.
>
> That wouldn't surprise me at all, unfortunately. :(
>
>> Can you try:
>> * Set the guest memory to 3600
>> * Boot the guest, and check to make sure that xl dmesg shows does
>> *not* relocate memory?
>> * Report whether it crashes?
>
> xl dmesg from booting a Linux domU with 3600MB is attached.
> The crash is never immediate, both Linux and Windows boot fine. But when
> a large 3D application like a game loads, there is frame buffer
> corruption immediately visible, and the domU will typically lock up some
> seconds later. Infrequently, it will take the host down with it.
>
>> If it's a bug in the hardware, I would expect to see that memory was
>> not relocated, but that the system will lock up anyway.
>
> That is indeed what seems to happen - the memory map looks OK with no
> overlaps between PCI memory and ROM ranges and the usable or reserved
> e820 regions.
>
>> Can you also do lspci -vvv in dom0 before assigning the device and
>> attach the output?
>
> I have attached it, but not before assigning - I'll need to reboot for
> that. Do you expect there to be a difference in mapping in dom0 before
> and after assigning the device to domU?
>
>> The hardware bug we've seen is this: In order for the IOMMU to work
>> properly, *all* DMA transactions must be passed up to the root bridge
>> so the IOMMU can translate the addresses from guest address to host
>> address. Unfortunately, an awful lot of bridges will not do this
>> properly, which means that the address is not translated properly,
>> which means that if a *guest* memory address overlaps the a *host*
>> MMIO range, badness ensues.
>
> Hmm, looking at xl dmesg vs dom0 lspci, that does appear to be the case:
>
> xl dmesg:
> (XEN) HVM24: E820 table:
> (XEN) HVM24: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> (XEN) HVM24: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> (XEN) HVM24: HOLE: 00000000:000a0000 - 00000000:000e0000
> (XEN) HVM24: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> (XEN) HVM24: [03]: 00000000:00100000 - 00000000:e0000000: RAM
> (XEN) HVM24: HOLE: 00000000:e0000000 - 00000000:fc000000
> (XEN) HVM24: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> (XEN) HVM24: [05]: 00000001:00000000 - 00000001:00800000: RAM
>
> lspci:
> 08:00.0 VGA compatible controller: nVidia Corporation GF100
> Region 0: Memory at f8000000 (32-bit, non-prefetchable)
> [disabled] [size=32M]
> Region 1: Memory at b8000000 (64-bit, prefetchable) [disabled]
> [size=128M]
> Region 3: Memory at b4000000 (64-bit, prefetchable) [disabled]
> [size=64M]
>
> Unless I'm reading this wrong, it means that physical GPU region 0 is in
> the domU reserved area, and GPU regions 1 and 2 and in the domU RAM area.
>
> b4000000 = 2880MB
Correction - my other GPU has a BAR mapped lower, at 0xa8000000 which is
2688MB. So I upped my memory mapping to 2688MB, and lo and behold, that
doesn't crash and games work just fine without frame buffer getting
corrupted.
Now, if I am understanding the basic nature of the problem correctly,
this _could_ be worked around by ensuring that vBAR = pBAR since in that
case there is no room for the mis-mapped memory overwrites to occur. Is
that correct?
I guess I could test this easily enough by applying the vBAR = pBAR hack.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-25 22:23 ` Gordan Bobic
@ 2013-07-26 0:21 ` Ian Campbell
2013-07-26 1:15 ` Andrew Bobulsky
2013-07-26 9:23 ` Gordan Bobic
0 siblings, 2 replies; 74+ messages in thread
From: Ian Campbell @ 2013-07-26 0:21 UTC (permalink / raw)
To: Gordan Bobic; +Cc: George Dunlap, Andrew Cooper, xen-devel
On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
> Now, if I am understanding the basic nature of the problem correctly,
> this _could_ be worked around by ensuring that vBAR = pBAR since in that
> case there is no room for the mis-mapped memory overwrites to occur. Is
> that correct?
AIUI (which is not very well...) it's not so much vBAR=pBAR but making
the guest e820 (memory map) have the same MMIO holes as the host so that
there can't be any clash between v- or p-BAR and RAM in the guest.
> I guess I could test this easily enough by applying the vBAR = pBAR hack.
Does the e820_host=1 option help? That might be PV only though, I can't
remember...
Ian.
>
> Gordan
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-26 0:21 ` Ian Campbell
@ 2013-07-26 1:15 ` Andrew Bobulsky
2013-07-26 9:28 ` Gordan Bobic
2013-07-28 10:26 ` Konrad Rzeszutek Wilk
2013-07-26 9:23 ` Gordan Bobic
1 sibling, 2 replies; 74+ messages in thread
From: Andrew Bobulsky @ 2013-07-26 1:15 UTC (permalink / raw)
To: Ian Campbell; +Cc: George Dunlap, Andrew Cooper, Gordan Bobic, xen-devel
On Thu, Jul 25, 2013 at 8:21 PM, Ian Campbell <ian.campbell@citrix.com> wrote:
> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
>> Now, if I am understanding the basic nature of the problem correctly,
>> this _could_ be worked around by ensuring that vBAR = pBAR since in that
>> case there is no room for the mis-mapped memory overwrites to occur. Is
>> that correct?
>
> AIUI (which is not very well...) it's not so much vBAR=pBAR but making
> the guest e820 (memory map) have the same MMIO holes as the host so that
> there can't be any clash between v- or p-BAR and RAM in the guest.
>
>> I guess I could test this easily enough by applying the vBAR = pBAR hack.
>
> Does the e820_host=1 option help? That might be PV only though, I can't
> remember...
Alas, yes. The man pages list it under "PV Guest Specific Options":
http://xenbits.xen.org/docs/unstable/man/xl.cfg.5.html
You got my hopes up! ;)
Carry on! I'll be sitting here metaphorically munching popcorn with
anticipation :P
-Andrew
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-26 0:21 ` Ian Campbell
2013-07-26 1:15 ` Andrew Bobulsky
@ 2013-07-26 9:23 ` Gordan Bobic
2013-07-29 11:14 ` Ian Campbell
2013-07-29 18:04 ` Konrad Rzeszutek Wilk
1 sibling, 2 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-07-26 9:23 UTC (permalink / raw)
To: Ian Campbell; +Cc: George Dunlap, Andrew Cooper, xen-devel
On Fri, 26 Jul 2013 01:21:24 +0100, Ian Campbell
<ian.campbell@citrix.com> wrote:
> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
>> Now, if I am understanding the basic nature of the problem
>> correctly,
>> this _could_ be worked around by ensuring that vBAR = pBAR since in
>> that
>> case there is no room for the mis-mapped memory overwrites to occur.
>> Is
>> that correct?
>
> AIUI (which is not very well...) it's not so much vBAR=pBAR but
> making
> the guest e820 (memory map) have the same MMIO holes as the host so
> that
> there can't be any clash between v- or p-BAR and RAM in the guest.
Sure, I understand that - but unless I am overlooking something,
vBAR=pBAR implicitly ensures that.
The question, then, is what happens in the null translation instance.
Specifically, if the PCIe bridge/router is broken (and NF200 is, it
seems), it would imply that when the driver talks to the device, the
operation will get sent to the vBAR (=pBAR, i.e. straight to the
hardware). This then gets translated to the pBAR. But - with a
broken bridge, and vBAR=pBAR, the MMIO request hits the pBAR
directly from the guest. Does it then still get intercepted by
the hypervisor, translated (null operation), and re-transmitted?
If so, this would lead to the card receiving everything twice,
resulting either in things outright breaking or going half as
fast at best.
Now, all this could be a good thing or a bad thing, depending on
how exactly you spin it. If the bridge is broken and doesn't
route all the way back to the root bridge, this could actually be
a performance optimizing feature. If we set vBAR=pBAR and disable
any translation thereafter, this avoids the overhead of passing
everything to/from the root PCIe bridge, and we can just directly
DMA everything.
I'm sure there are security implications here, but since NF200
doesn't do PCIe ACS either, any concept of security goes out
the window pre-emptively.
So, my question is:
1) If vBAR = pBAR, does the hypervisor still do any translation?
I presume it does because it expects the traffic to pass up
from the root bridge, to the hypervisor and then back, to
ensure security. If indeed it does do this, where could I
optionally disable it, and is there an easy to follow bit of
example code for how to plumb in a boot parameter option for
this?
2) Further, I'm finding myself motivated to write that
auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
briefly a week or so ago (have an init script read the BAR
info from dom0 and put it in xenstore, plus a patch to
make pBAR=vBAR reservations built dynamically rather than
statically, based on this data. Now, I'm quite fluent in C,
but my familiarity with Xen soruce code is nearly non-existant
(limited to studying an old unsupported patch every now and then
in order to make it apply to a more recent code release).
Can anyone help me out with a high level view WRT where
this would be best plumbed in (which files and the flow of
control between the affected files)?
The added bonus of this (if it can be made to work) is that
it might just make unmodified GeForce cards work, too,
which probably makes it worthwhile on it's own.
>> I guess I could test this easily enough by applying the vBAR = pBAR
>> hack.
>
> Does the e820_host=1 option help? That might be PV only though, I
> can't
> remember...
Thanks for pointing this one out, I just found this post in the
archives:
http://lists.xen.org/archives/html/xen-users/2012-08/msg00150.html
With a broken PCIe router, would I also need iommu=soft?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-26 1:15 ` Andrew Bobulsky
@ 2013-07-26 9:28 ` Gordan Bobic
2013-07-26 13:11 ` Gordan Bobic
2013-07-28 10:26 ` Konrad Rzeszutek Wilk
1 sibling, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-26 9:28 UTC (permalink / raw)
To: Andrew Bobulsky; +Cc: George Dunlap, Andrew Cooper, Ian Campbell, xen-devel
On Thu, 25 Jul 2013 21:15:10 -0400, Andrew Bobulsky <rulerof@gmail.com>
wrote:
> On Thu, Jul 25, 2013 at 8:21 PM, Ian Campbell
> <ian.campbell@citrix.com> wrote:
>> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
>>> Now, if I am understanding the basic nature of the problem
>>> correctly,
>>> this _could_ be worked around by ensuring that vBAR = pBAR since in
>>> that
>>> case there is no room for the mis-mapped memory overwrites to
>>> occur. Is
>>> that correct?
>>
>> AIUI (which is not very well...) it's not so much vBAR=pBAR but
>> making
>> the guest e820 (memory map) have the same MMIO holes as the host so
>> that
>> there can't be any clash between v- or p-BAR and RAM in the guest.
>>
>>> I guess I could test this easily enough by applying the vBAR = pBAR
>>> hack.
>>
>> Does the e820_host=1 option help? That might be PV only though, I
>> can't
>> remember...
>
> Alas, yes. The man pages list it under "PV Guest Specific Options":
> http://xenbits.xen.org/docs/unstable/man/xl.cfg.5.html
Now that is intereting - if this makes the memory holes the same
between
the guest and the host, does it also implicitly vBAR=pBAR?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-26 9:28 ` Gordan Bobic
@ 2013-07-26 13:11 ` Gordan Bobic
2013-07-31 17:53 ` George Dunlap
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-26 13:11 UTC (permalink / raw)
To: Gordan Bobic
Cc: George Dunlap, Andrew Bobulsky, xen-devel, Ian Campbell, Andrew Cooper
On Fri, 26 Jul 2013 10:28:12 +0100, Gordan Bobic <gordan@bobich.net>
wrote:
> On Thu, 25 Jul 2013 21:15:10 -0400, Andrew Bobulsky
> <rulerof@gmail.com> wrote:
>> On Thu, Jul 25, 2013 at 8:21 PM, Ian Campbell
>> <ian.campbell@citrix.com> wrote:
>>> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
>>>> Now, if I am understanding the basic nature of the problem
>>>> correctly,
>>>> this _could_ be worked around by ensuring that vBAR = pBAR since
>>>> in that
>>>> case there is no room for the mis-mapped memory overwrites to
>>>> occur. Is
>>>> that correct?
>>>
>>> AIUI (which is not very well...) it's not so much vBAR=pBAR but
>>> making
>>> the guest e820 (memory map) have the same MMIO holes as the host so
>>> that
>>> there can't be any clash between v- or p-BAR and RAM in the guest.
>>>
>>>> I guess I could test this easily enough by applying the vBAR =
>>>> pBAR hack.
>>>
>>> Does the e820_host=1 option help? That might be PV only though, I
>>> can't
>>> remember...
>>
>> Alas, yes. The man pages list it under "PV Guest Specific Options":
>> http://xenbits.xen.org/docs/unstable/man/xl.cfg.5.html
>
> Now that is intereting - if this makes the memory holes the same
> between
> the guest and the host, does it also implicitly vBAR=pBAR?
Another thing that occurred to me might be useful to check - it is
pretty easy to modify the BAR size on Nvidia cards. The defaults are
64MB and 128MB for the two BARs. They can be made much, much larger,
and there is often advantage to enlarging them to at least be equal to
VRAM size. Soooooo... If I boost the BAR from 128MB to 2GB, being a
64-bit BAR, it might make the BIOS do the sane thing and map it above
4GB. With the other BAR also suitably enlarged and it being done on
the second GPU as well, there is no obvious option but to map them
above 4GB (unless the BIOS is broken, which it may well be, in
which case all bets are off).
Which may just alleviate the memory issue if not completely fix
the problem.
Will try this and see what happens.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-26 1:15 ` Andrew Bobulsky
2013-07-26 9:28 ` Gordan Bobic
@ 2013-07-28 10:26 ` Konrad Rzeszutek Wilk
2013-07-28 21:24 ` Gordan Bobic
1 sibling, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-07-28 10:26 UTC (permalink / raw)
To: Andrew Bobulsky, Ian Campbell
Cc: George Dunlap, Andrew Cooper, Gordan Bobic, xen-devel
Andrew Bobulsky <rulerof@gmail.com> wrote:
>On Thu, Jul 25, 2013 at 8:21 PM, Ian Campbell <ian.campbell@citrix.com>
>wrote:
>> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
>>> Now, if I am understanding the basic nature of the problem
>correctly,
>>> this _could_ be worked around by ensuring that vBAR = pBAR since in
>that
>>> case there is no room for the mis-mapped memory overwrites to occur.
>Is
>>> that correct?
>>
>> AIUI (which is not very well...) it's not so much vBAR=pBAR but
>making
>> the guest e820 (memory map) have the same MMIO holes as the host so
>that
>> there can't be any clash between v- or p-BAR and RAM in the guest.
>>
>>> I guess I could test this easily enough by applying the vBAR = pBAR
>hack.
>>
>> Does the e820_host=1 option help? That might be PV only though, I
>can't
>> remember...
>
>Alas, yes. The man pages list it under "PV Guest Specific Options":
>http://xenbits.xen.org/docs/unstable/man/xl.cfg.5.html
>
>You got my hopes up! ;)
>
>Carry on! I'll be sitting here metaphorically munching popcorn with
>anticipation :P
>
>-Andrew
>
>_______________________________________________
>Xen-devel mailing list
>Xen-devel@lists.xen.org
>http://lists.xen.org/xen-devel
We could implement that for HVM guests too. But I am not sure about the consequences of this for migration (say you unplug the device beforehand and then migrate to another host which has a different E820). That part requires a bit of pondering.
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-28 10:26 ` Konrad Rzeszutek Wilk
@ 2013-07-28 21:24 ` Gordan Bobic
2013-07-28 23:17 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-28 21:24 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk
Cc: George Dunlap, Andrew Bobulsky, xen-devel, Ian Campbell, Andrew Cooper
On 07/28/2013 11:26 AM, Konrad Rzeszutek Wilk wrote:
> Andrew Bobulsky <rulerof@gmail.com> wrote:
>> On Thu, Jul 25, 2013 at 8:21 PM, Ian Campbell <ian.campbell@citrix.com>
>> wrote:
>>> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
>>>> Now, if I am understanding the basic nature of the problem
>> correctly,
>>>> this _could_ be worked around by ensuring that vBAR = pBAR since in
>> that
>>>> case there is no room for the mis-mapped memory overwrites to occur.
>> Is
>>>> that correct?
>>>
>>> AIUI (which is not very well...) it's not so much vBAR=pBAR but
>> making
>>> the guest e820 (memory map) have the same MMIO holes as the host so
>> that
>>> there can't be any clash between v- or p-BAR and RAM in the guest.
>>>
>>>> I guess I could test this easily enough by applying the vBAR = pBAR
>> hack.
>>>
>>> Does the e820_host=1 option help? That might be PV only though, I
>> can't
>>> remember...
>>
>> Alas, yes. The man pages list it under "PV Guest Specific Options":
>> http://xenbits.xen.org/docs/unstable/man/xl.cfg.5.html
>>
>> You got my hopes up! ;)
>>
>> Carry on! I'll be sitting here metaphorically munching popcorn with
>> anticipation :P
>
> We could implement that for HVM guests too. But I am not sure about
> the consequences of this for migration (say you unplug the device
> beforehand and then migrate to another host which has a different
> E820). That part requires a bit of pondering.
Just out of interest, what happens in case where the PV guests get
migrated with e820_host=1 set?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-28 21:24 ` Gordan Bobic
@ 2013-07-28 23:17 ` Konrad Rzeszutek Wilk
2013-07-28 23:30 ` Gordan Bobic
2013-07-29 9:53 ` Ian Campbell
0 siblings, 2 replies; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-07-28 23:17 UTC (permalink / raw)
To: Gordan Bobic
Cc: George Dunlap, Andrew Bobulsky, xen-devel, Ian Campbell, Andrew Cooper
Gordan Bobic <gordan@bobich.net> wrote:
>On 07/28/2013 11:26 AM, Konrad Rzeszutek Wilk wrote:
>> Andrew Bobulsky <rulerof@gmail.com> wrote:
>>> On Thu, Jul 25, 2013 at 8:21 PM, Ian Campbell
><ian.campbell@citrix.com>
>>> wrote:
>>>> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
>>>>> Now, if I am understanding the basic nature of the problem
>>> correctly,
>>>>> this _could_ be worked around by ensuring that vBAR = pBAR since
>in
>>> that
>>>>> case there is no room for the mis-mapped memory overwrites to
>occur.
>>> Is
>>>>> that correct?
>>>>
>>>> AIUI (which is not very well...) it's not so much vBAR=pBAR but
>>> making
>>>> the guest e820 (memory map) have the same MMIO holes as the host so
>>> that
>>>> there can't be any clash between v- or p-BAR and RAM in the guest.
>>>>
>>>>> I guess I could test this easily enough by applying the vBAR =
>pBAR
>>> hack.
>>>>
>>>> Does the e820_host=1 option help? That might be PV only though, I
>>> can't
>>>> remember...
>>>
>>> Alas, yes. The man pages list it under "PV Guest Specific Options":
>>> http://xenbits.xen.org/docs/unstable/man/xl.cfg.5.html
>>>
>>> You got my hopes up! ;)
>>>
>>> Carry on! I'll be sitting here metaphorically munching popcorn with
>>> anticipation :P
>>
>> We could implement that for HVM guests too. But I am not sure about
>> the consequences of this for migration (say you unplug the device
>> beforehand and then migrate to another host which has a different
>> E820). That part requires a bit of pondering.
>
>Just out of interest, what happens in case where the PV guests get
>migrated with e820_host=1 set?
>
>Gordan
We disallow (I think?) as there is no way we can guarantee the E820 map. I guess your point is that since we disallow this on PV with this parameter there is not much difference in allowing HVM guest with this.
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-28 23:17 ` Konrad Rzeszutek Wilk
@ 2013-07-28 23:30 ` Gordan Bobic
2013-07-29 9:53 ` Ian Campbell
1 sibling, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-07-28 23:30 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk
Cc: George Dunlap, Andrew Bobulsky, xen-devel, Ian Campbell, Andrew Cooper
On 07/29/2013 12:17 AM, Konrad Rzeszutek Wilk wrote:
> Gordan Bobic <gordan@bobich.net> wrote:
>> On 07/28/2013 11:26 AM, Konrad Rzeszutek Wilk wrote:
>>> Andrew Bobulsky <rulerof@gmail.com> wrote:
>>>> On Thu, Jul 25, 2013 at 8:21 PM, Ian Campbell
>> <ian.campbell@citrix.com>
>>>> wrote:
>>>>> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
>>>>>> Now, if I am understanding the basic nature of the problem
>>>> correctly,
>>>>>> this _could_ be worked around by ensuring that vBAR = pBAR since
>> in
>>>> that
>>>>>> case there is no room for the mis-mapped memory overwrites to
>> occur.
>>>> Is
>>>>>> that correct?
>>>>>
>>>>> AIUI (which is not very well...) it's not so much vBAR=pBAR but
>>>> making
>>>>> the guest e820 (memory map) have the same MMIO holes as the host so
>>>> that
>>>>> there can't be any clash between v- or p-BAR and RAM in the guest.
>>>>>
>>>>>> I guess I could test this easily enough by applying the vBAR =
>> pBAR
>>>> hack.
>>>>>
>>>>> Does the e820_host=1 option help? That might be PV only though, I
>>>> can't
>>>>> remember...
>>>>
>>>> Alas, yes. The man pages list it under "PV Guest Specific Options":
>>>> http://xenbits.xen.org/docs/unstable/man/xl.cfg.5.html
>>>>
>>>> You got my hopes up! ;)
>>>>
>>>> Carry on! I'll be sitting here metaphorically munching popcorn with
>>>> anticipation :P
>>>
>>> We could implement that for HVM guests too. But I am not sure about
>>> the consequences of this for migration (say you unplug the device
>>> beforehand and then migrate to another host which has a different
>>> E820). That part requires a bit of pondering.
>>
>> Just out of interest, what happens in case where the PV guests get
>> migrated with e820_host=1 set?
>>
>> Gordan
>
> We disallow (I think?) as there is no way we can guarantee the
> E820 map. I guess your point is that since we disallow this on
> PV with this parameter there is not much difference in allowing
> HVM guest with this.
That is indeed where I was pondering going with this, yes - apply the
same restriction in the HVM case that exists in the PV case.
Regarding the e820_host=1 case, which of the following is true:
1) The dom0 BAR areas are simply reserved/holes and the domU still maps
it's own BARs elsewhere in the memory space?
2) domU is free to map BARs into any of the host E820 map holes of
appropriate size?
3) vBAR=pBAR
4) Other?
Thanks.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-28 23:17 ` Konrad Rzeszutek Wilk
2013-07-28 23:30 ` Gordan Bobic
@ 2013-07-29 9:53 ` Ian Campbell
1 sibling, 0 replies; 74+ messages in thread
From: Ian Campbell @ 2013-07-29 9:53 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk
Cc: George Dunlap, Andrew Bobulsky, Gordan Bobic, xen-devel, Andrew Cooper
On Sun, 2013-07-28 at 19:17 -0400, Konrad Rzeszutek Wilk wrote:
> Gordan Bobic <gordan@bobich.net> wrote:
> >On 07/28/2013 11:26 AM, Konrad Rzeszutek Wilk wrote:
> >> Andrew Bobulsky <rulerof@gmail.com> wrote:
> >>> On Thu, Jul 25, 2013 at 8:21 PM, Ian Campbell
> ><ian.campbell@citrix.com>
> >>> wrote:
> >>>> On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
> >>>>> Now, if I am understanding the basic nature of the problem
> >>> correctly,
> >>>>> this _could_ be worked around by ensuring that vBAR = pBAR since
> >in
> >>> that
> >>>>> case there is no room for the mis-mapped memory overwrites to
> >occur.
> >>> Is
> >>>>> that correct?
> >>>>
> >>>> AIUI (which is not very well...) it's not so much vBAR=pBAR but
> >>> making
> >>>> the guest e820 (memory map) have the same MMIO holes as the host so
> >>> that
> >>>> there can't be any clash between v- or p-BAR and RAM in the guest.
> >>>>
> >>>>> I guess I could test this easily enough by applying the vBAR =
> >pBAR
> >>> hack.
> >>>>
> >>>> Does the e820_host=1 option help? That might be PV only though, I
> >>> can't
> >>>> remember...
> >>>
> >>> Alas, yes. The man pages list it under "PV Guest Specific Options":
> >>> http://xenbits.xen.org/docs/unstable/man/xl.cfg.5.html
> >>>
> >>> You got my hopes up! ;)
> >>>
> >>> Carry on! I'll be sitting here metaphorically munching popcorn with
> >>> anticipation :P
> >>
> >> We could implement that for HVM guests too. But I am not sure about
> >> the consequences of this for migration (say you unplug the device
> >> beforehand and then migrate to another host which has a different
> >> E820). That part requires a bit of pondering.
> >
> >Just out of interest, what happens in case where the PV guests get
> >migrated with e820_host=1 set?
> >
> >Gordan
>
> We disallow (I think?) as there is no way we can guarantee the E820
> map. I guess your point is that since we disallow this on PV with
> this parameter there is not much difference in allowing HVM guest with
> this.
Yes, I don't think it is unreasonable to disallow migration when
hardware specific workarounds have been applied (which is really what
e820_host is, for either PV or HVM).
Ian.
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-26 9:23 ` Gordan Bobic
@ 2013-07-29 11:14 ` Ian Campbell
2013-07-29 18:04 ` Konrad Rzeszutek Wilk
1 sibling, 0 replies; 74+ messages in thread
From: Ian Campbell @ 2013-07-29 11:14 UTC (permalink / raw)
To: Gordan Bobic; +Cc: George Dunlap, Andrew Cooper, xen-devel
On Fri, 2013-07-26 at 10:23 +0100, Gordan Bobic wrote:
> On Fri, 26 Jul 2013 01:21:24 +0100, Ian Campbell
> <ian.campbell@citrix.com> wrote:
> > On Thu, 2013-07-25 at 23:23 +0100, Gordan Bobic wrote:
> >> Now, if I am understanding the basic nature of the problem
> >> correctly,
> >> this _could_ be worked around by ensuring that vBAR = pBAR since in
> >> that
> >> case there is no room for the mis-mapped memory overwrites to occur.
> >> Is
> >> that correct?
> >
> > AIUI (which is not very well...) it's not so much vBAR=pBAR but
> > making
> > the guest e820 (memory map) have the same MMIO holes as the host so
> > that
> > there can't be any clash between v- or p-BAR and RAM in the guest.
>
> Sure, I understand that - but unless I am overlooking something,
> vBAR=pBAR implicitly ensures that.
Not quite because you need to ensure that guest RAM and guest MMIO space
do not overlap. So setting vBAR=pBAR is not sufficient, you also need to
ensure that there is no RAM at those addresses.
Depending on your PCI bus topology/hardware functionality it may be
sufficient to only ensure the memory map is the same as the host, so
long as the vBAR all fall within the MMIO regions. On other systems you
may require vBAR=pBAR in addition to that. Obviously doing both is most
likely to work.
> The question, then, is what happens in the null translation instance.
> Specifically, if the PCIe bridge/router is broken (and NF200 is, it
> seems), it would imply that when the driver talks to the device, the
> operation will get sent to the vBAR (=pBAR, i.e. straight to the
> hardware). This then gets translated to the pBAR. But - with a
> broken bridge, and vBAR=pBAR, the MMIO request hits the pBAR
> directly from the guest. Does it then still get intercepted by
> the hypervisor, translated (null operation), and re-transmitted?
> If so, this would lead to the card receiving everything twice,
> resulting either in things outright breaking or going half as
> fast at best.
AIUI the issue is not so much with a device seeing an IO accesses twice
but with two device seeing the same IO access (one sees translated, the
other untranslated) and thinking it is for them and who "wins" when such
shadowing occurs, which will differ depending on which device (or the
host CPU) is doing the IO.
It is not the hypervisor which is intercepting and translating, but the
hardware. A single bit of hardware should never see things twice.
Perhaps a diagram (intended to be more illustrative than "real"):
CPU
|
MMU & IOMMU
| | RAM
BUS 1: `---+---------------'
|
BRIDGE
|
BUS 2: `--- BUS 2 -------------
| |
DEVICE A DEVICE B
vBAR->pBAR translation happens at the IOMMU.
So if the CPU accesses a RAM address it will be translated by the MMU
and go to the correct address in RAM.
Lets assume that the bridge knows that accesses it forwards on need to
be translated. So if DEVICE A tries to access RAM then it the BRIDGE
will translate things (by talking to the IOMMU) and the access will
again go to the right place.
Likewise if the CPU tries to talk to DEVICE A then the MMIO accesses
will be translated and go to the right place.
However lets imagine DEVICE B happens to have a pBAR which is the same
as the memory which DEVICE A is trying to access. Lets also assume that
the BRIDGE has a bug which would allow DEVICE B to see DEVICE A's
accesses directly instead of laundering them via the IOMMU (perhaps it
is really a shared bus like I've drawn it rather than a PCI-e thing with
lanes etc).
So now DEVICE A's memory access could be seen and acted on by both the
RAM (translated, probably) and DEVICE B. Weirdness will ensue, perhaps
the DMA read done via device A gets serviced by DEVICE B and not RAM, or
maybe the DMA write causes a side effect in DEVICE B. Furthermore the
"winner" might even be different for an access from DEVICE A vs an
access from the CPU etc.
This is something vaguely like the real bug, but only vaguely, because
my understanding of the real bug is a bit vague. I hope it is
illustrative of the sort of issue we are talking about.
>
> Now, all this could be a good thing or a bad thing, depending on
> how exactly you spin it. If the bridge is broken and doesn't
> route all the way back to the root bridge, this could actually be
> a performance optimizing feature. If we set vBAR=pBAR and disable
> any translation thereafter, this avoids the overhead of passing
> everything to/from the root PCIe bridge, and we can just directly
> DMA everything.
I'm not sure how much perf overhead there is in practice since ISTR that
the translations can be cached in the bridge and need explicit flushing
etc when they are modified. Obviously there will be some overhead but I
don't think it will be anything like doubling the traffic.
> I'm sure there are security implications here, but since NF200
> doesn't do PCIe ACS either, any concept of security goes out
> the window pre-emptively.
>
> So, my question is:
> 1) If vBAR = pBAR, does the hypervisor still do any translation?
I would assume so.
> I presume it does because it expects the traffic to pass up
> from the root bridge, to the hypervisor and then back, to
> ensure security.
NB: Not to the hypervisor (software) but to some bit of hardware which
interprets a table provided by the hypervisor.
> If indeed it does do this, where could I
> optionally disable it, and is there an easy to follow bit of
> example code for how to plumb in a boot parameter option for
> this?
I'm afraid I've no clue...
Perhaps if you started from the hypercall which the toolstacks use to
plumb stuff through you would be able to trace it down?
XEN_DOMCTL_memory_mapping perhaps? (I'm wary of saying too much because
there is every chance I am sending you on some wild goose chase)
> 2) Further, I'm finding myself motivated to write that
> auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
> briefly a week or so ago (have an init script read the BAR
> info from dom0 and put it in xenstore, plus a patch to
> make pBAR=vBAR reservations built dynamically rather than
> statically, based on this data. Now, I'm quite fluent in C,
> but my familiarity with Xen soruce code is nearly non-existant
> (limited to studying an old unsupported patch every now and then
> in order to make it apply to a more recent code release).
> Can anyone help me out with a high level view WRT where
> this would be best plumbed in (which files and the flow of
> control between the affected files)?
I'm not sure but the places I would start are the bits of libxc which
call things like XEN_DOMCTL_memory_mapping and the bits of libxl which
call into them. It would also be worth looking at the PCI setup code in
hvmloader (tools/firmware/hvmloader/) I have a feeling that is where the
code responsible for PCI bar allocation/layout within the guest's memory
map lives.
Perhaps you might want perhaps to implement a mode where libxl/libxc end
up writing the desired vBAR(==pBAR, in your case) values into xenstore
for hvmloader to pickup and implement. Not being a maintainer for that
area I'm not sure if that would acceptable or not.
>
> The added bonus of this (if it can be made to work) is that
> it might just make unmodified GeForce cards work, too,
> which probably makes it worthwhile on it's own.
>
> >> I guess I could test this easily enough by applying the vBAR = pBAR
> >> hack.
> >
> > Does the e820_host=1 option help? That might be PV only though, I
> > can't
> > remember...
>
> Thanks for pointing this one out, I just found this post in the
> archives:
> http://lists.xen.org/archives/html/xen-users/2012-08/msg00150.html
>
> With a broken PCIe router, would I also need iommu=soft?
I'm not sure that isn't also a PV only thing. Sorry :-/
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-26 9:23 ` Gordan Bobic
2013-07-29 11:14 ` Ian Campbell
@ 2013-07-29 18:04 ` Konrad Rzeszutek Wilk
2013-09-03 13:53 ` Gordan Bobic
1 sibling, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-07-29 18:04 UTC (permalink / raw)
To: Gordan Bobic; +Cc: George Dunlap, Andrew Cooper, Ian Campbell, xen-devel
> So, my question is:
> 1) If vBAR = pBAR, does the hypervisor still do any translation?
> I presume it does because it expects the traffic to pass up
> from the root bridge, to the hypervisor and then back, to
> ensure security. If indeed it does do this, where could I
> optionally disable it, and is there an easy to follow bit of
> example code for how to plumb in a boot parameter option for
> this?
It should.
>
> 2) Further, I'm finding myself motivated to write that
> auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
> briefly a week or so ago (have an init script read the BAR
> info from dom0 and put it in xenstore, plus a patch to
> make pBAR=vBAR reservations built dynamically rather than
> statically, based on this data. Now, I'm quite fluent in C,
> but my familiarity with Xen soruce code is nearly non-existant
> (limited to studying an old unsupported patch every now and then
> in order to make it apply to a more recent code release).
> Can anyone help me out with a high level view WRT where
> this would be best plumbed in (which files and the flow of
> control between the affected files)?
hvmloader probably and the libxl e820 code. What from a
high view needs to happen is that:
1). Need to relax the check in libxl for e820_hole
to also do it for HVM guests. Said code just iterates over the
host E820 and sanitizes it a bit and makes a E820 hypercall to
set it for the guest.
2). Figure out whether the E820 hypercall (which sets the E820
layout for a guest) can be run on HVM guests. I think it
could not and Mukesh in his PVH patches posted a patch
to enable that - "..Move e820 fields out of pv_domain struct"
2). Hvmloader should do an E820 get machine memory hypercall
to see if there is anything there. If there is - that means
the toolstack has request a "new" type of E820. Iterate
over the E820 and make it look like that.
You can look in the Linux arch/x86/xen/setup.c to see how
it does that.
The complication there is that hvmloader needs to to fit the
ACPI code (the guest type one) and such.
Presumarily you can just re-use the existing spaces that
the host has marked as E820_RESERVED or E820_ACPI..
Then there is the SMBIOS would need to move and the BIOS
might need to be relocated - but I think those are relocatable
in some form.
>
> The added bonus of this (if it can be made to work) is that
> it might just make unmodified GeForce cards work, too,
> which probably makes it worthwhile on it's own.
Well, I am more than happy to help you with this.
>
> >>I guess I could test this easily enough by applying the vBAR =
> >>pBAR hack.
> >
> >Does the e820_host=1 option help? That might be PV only though, I
> >can't
> >remember...
>
> Thanks for pointing this one out, I just found this post in the
> archives:
> http://lists.xen.org/archives/html/xen-users/2012-08/msg00150.html
>
> With a broken PCIe router, would I also need iommu=soft?
No. The iommu=soft is not needed with the recent pvops linux kernels.
But broken PCIe router's don't have much to do with the kernel - that
is the hypervisor decision whether to allow a guest (either PV or HVM)
to have said device.
>
> Gordan
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-26 13:11 ` Gordan Bobic
@ 2013-07-31 17:53 ` George Dunlap
2013-07-31 17:56 ` Andrew Cooper
2013-07-31 19:35 ` Gordan Bobic
0 siblings, 2 replies; 74+ messages in thread
From: George Dunlap @ 2013-07-31 17:53 UTC (permalink / raw)
To: Gordan Bobic; +Cc: Andrew Bobulsky, Andrew Cooper, Ian Campbell, xen-devel
On Fri, Jul 26, 2013 at 2:11 PM, Gordan Bobic <gordan@bobich.net> wrote:
>> Now that is intereting - if this makes the memory holes the same between
>> the guest and the host, does it also implicitly vBAR=pBAR?
>
>
> Another thing that occurred to me might be useful to check - it is
> pretty easy to modify the BAR size on Nvidia cards. The defaults are
> 64MB and 128MB for the two BARs. They can be made much, much larger,
> and there is often advantage to enlarging them to at least be equal to
> VRAM size. Soooooo... If I boost the BAR from 128MB to 2GB, being a
> 64-bit BAR, it might make the BIOS do the sane thing and map it above
> 4GB. With the other BAR also suitably enlarged and it being done on
> the second GPU as well, there is no obvious option but to map them
> above 4GB (unless the BIOS is broken, which it may well be, in
> which case all bets are off).
>
> Which may just alleviate the memory issue if not completely fix
> the problem.
>
> Will try this and see what happens.
I believe XenServer has a patch that allows the toolstack (in this
case xapi) to set the default size of the MMIO hole. Andrew, did that
ever make it upstream?
Unfortunately, it is unlikely to work with upstream qemu until we fix
the memory relocation issue...
-George
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-31 17:53 ` George Dunlap
@ 2013-07-31 17:56 ` Andrew Cooper
2013-07-31 19:36 ` Gordan Bobic
2013-07-31 19:35 ` Gordan Bobic
1 sibling, 1 reply; 74+ messages in thread
From: Andrew Cooper @ 2013-07-31 17:56 UTC (permalink / raw)
To: George Dunlap; +Cc: Andrew Bobulsky, Gordan Bobic, Ian Campbell, xen-devel
On 31/07/13 18:53, George Dunlap wrote:
> On Fri, Jul 26, 2013 at 2:11 PM, Gordan Bobic <gordan@bobich.net> wrote:
>>> Now that is intereting - if this makes the memory holes the same between
>>> the guest and the host, does it also implicitly vBAR=pBAR?
>>
>> Another thing that occurred to me might be useful to check - it is
>> pretty easy to modify the BAR size on Nvidia cards. The defaults are
>> 64MB and 128MB for the two BARs. They can be made much, much larger,
>> and there is often advantage to enlarging them to at least be equal to
>> VRAM size. Soooooo... If I boost the BAR from 128MB to 2GB, being a
>> 64-bit BAR, it might make the BIOS do the sane thing and map it above
>> 4GB. With the other BAR also suitably enlarged and it being done on
>> the second GPU as well, there is no obvious option but to map them
>> above 4GB (unless the BIOS is broken, which it may well be, in
>> which case all bets are off).
>>
>> Which may just alleviate the memory issue if not completely fix
>> the problem.
>>
>> Will try this and see what happens.
> I believe XenServer has a patch that allows the toolstack (in this
> case xapi) to set the default size of the MMIO hole. Andrew, did that
> ever make it upstream?
>
> Unfortunately, it is unlikely to work with upstream qemu until we fix
> the memory relocation issue...
>
> -George
I believe it did - the patch does not exist in our patch queue any more.
~Andrew
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-31 17:53 ` George Dunlap
2013-07-31 17:56 ` Andrew Cooper
@ 2013-07-31 19:35 ` Gordan Bobic
2013-08-01 9:15 ` George Dunlap
1 sibling, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-07-31 19:35 UTC (permalink / raw)
To: George Dunlap; +Cc: Andrew Bobulsky, Andrew Cooper, Ian Campbell, xen-devel
On 07/31/2013 06:53 PM, George Dunlap wrote:
> On Fri, Jul 26, 2013 at 2:11 PM, Gordan Bobic <gordan@bobich.net> wrote:
>>> Now that is intereting - if this makes the memory holes the same between
>>> the guest and the host, does it also implicitly vBAR=pBAR?
>>
>>
>> Another thing that occurred to me might be useful to check - it is
>> pretty easy to modify the BAR size on Nvidia cards. The defaults are
>> 64MB and 128MB for the two BARs. They can be made much, much larger,
>> and there is often advantage to enlarging them to at least be equal to
>> VRAM size. Soooooo... If I boost the BAR from 128MB to 2GB, being a
>> 64-bit BAR, it might make the BIOS do the sane thing and map it above
>> 4GB. With the other BAR also suitably enlarged and it being done on
>> the second GPU as well, there is no obvious option but to map them
>> above 4GB (unless the BIOS is broken, which it may well be, in
>> which case all bets are off).
>>
>> Which may just alleviate the memory issue if not completely fix
>> the problem.
>>
>> Will try this and see what happens.
>
> I believe XenServer has a patch that allows the toolstack (in this
> case xapi) to set the default size of the MMIO hole. Andrew, did that
> ever make it upstream?
>
> Unfortunately, it is unlikely to work with upstream qemu until we fix
> the memory relocation issue...
Interesting you should mention something like this. I've been pondering
whether it might be easier (even if it is a bodge) to simply always set
the domU E820 map to have 0x80000000 - 0xFFFFFFFF (2GB->4GB) reserved. I
have not yet seen a motherboard that maps 32-bit BARs below 2GB.
Note: Admittedly, I haven't tested what happens when you have multiple
Nvidia cards each with a 1GB 32-bit BAR, though, I fully expect
weirdness. And Nvidia cards have have the 32-bit BAR0 up to 2GB in size!
But I cannot see a good reason to use such a configuration since it's
the 64-bit BAR1 (up to 64GB in size) that provides the direct VRAM mapping.
Anyway, if the whole 2GB->4GB area was reserved, then presumably Xen
would map the 32-bit bars below 2GB, which, provided there's enough
memory for the OS kernel to load and the BARs, shouldn't be a problem (I
cannot think of a sane case where this wouldn't hold). 64-bit BARs can
get re-mapped somewhere sky-high in domU RAM (at the top of the
addressable range sounds like a reasonable bet, BIOS (for non-broken
BIOS implementations, of which there seem to be fewer than I'd like to
believe) would probably set those just above the size of RAM in the
machine, so to 2^48 minus BAR size would possibly be a safe place to map
them.
Yes, I know it's a bodge. Yes, I know it wouldn't solve the GeForce
passthrough problem. Yes, host E820 with vBAR = pBAR (possibly without
IOMMU involvement) would be an awesome feature to have. But the bodge of
just punching a 2GB hole at 2GB might just be a lot easier to implement
as a quick fix.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-31 17:56 ` Andrew Cooper
@ 2013-07-31 19:36 ` Gordan Bobic
0 siblings, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-07-31 19:36 UTC (permalink / raw)
To: Andrew Cooper; +Cc: George Dunlap, Andrew Bobulsky, Ian Campbell, xen-devel
On 07/31/2013 06:56 PM, Andrew Cooper wrote:
> On 31/07/13 18:53, George Dunlap wrote:
>> On Fri, Jul 26, 2013 at 2:11 PM, Gordan Bobic <gordan@bobich.net> wrote:
>>>> Now that is intereting - if this makes the memory holes the same between
>>>> the guest and the host, does it also implicitly vBAR=pBAR?
>>>
>>> Another thing that occurred to me might be useful to check - it is
>>> pretty easy to modify the BAR size on Nvidia cards. The defaults are
>>> 64MB and 128MB for the two BARs. They can be made much, much larger,
>>> and there is often advantage to enlarging them to at least be equal to
>>> VRAM size. Soooooo... If I boost the BAR from 128MB to 2GB, being a
>>> 64-bit BAR, it might make the BIOS do the sane thing and map it above
>>> 4GB. With the other BAR also suitably enlarged and it being done on
>>> the second GPU as well, there is no obvious option but to map them
>>> above 4GB (unless the BIOS is broken, which it may well be, in
>>> which case all bets are off).
>>>
>>> Which may just alleviate the memory issue if not completely fix
>>> the problem.
>>>
>>> Will try this and see what happens.
>> I believe XenServer has a patch that allows the toolstack (in this
>> case xapi) to set the default size of the MMIO hole. Andrew, did that
>> ever make it upstream?
>>
>> Unfortunately, it is unlikely to work with upstream qemu until we fix
>> the memory relocation issue...
>>
>
> I believe it did - the patch does not exist in our patch queue any more.
Can anyone point me at the relevant commit / docs on this patch?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-31 19:35 ` Gordan Bobic
@ 2013-08-01 9:15 ` George Dunlap
2013-08-01 13:10 ` Fabio Fantoni
0 siblings, 1 reply; 74+ messages in thread
From: George Dunlap @ 2013-08-01 9:15 UTC (permalink / raw)
To: Gordan Bobic; +Cc: Andrew Bobulsky, Andrew Cooper, Ian Campbell, xen-devel
On 31/07/13 20:35, Gordan Bobic wrote:
> On 07/31/2013 06:53 PM, George Dunlap wrote:
>> On Fri, Jul 26, 2013 at 2:11 PM, Gordan Bobic <gordan@bobich.net> wrote:
>>>> Now that is intereting - if this makes the memory holes the same
>>>> between
>>>> the guest and the host, does it also implicitly vBAR=pBAR?
>>>
>>>
>>> Another thing that occurred to me might be useful to check - it is
>>> pretty easy to modify the BAR size on Nvidia cards. The defaults are
>>> 64MB and 128MB for the two BARs. They can be made much, much larger,
>>> and there is often advantage to enlarging them to at least be equal to
>>> VRAM size. Soooooo... If I boost the BAR from 128MB to 2GB, being a
>>> 64-bit BAR, it might make the BIOS do the sane thing and map it above
>>> 4GB. With the other BAR also suitably enlarged and it being done on
>>> the second GPU as well, there is no obvious option but to map them
>>> above 4GB (unless the BIOS is broken, which it may well be, in
>>> which case all bets are off).
>>>
>>> Which may just alleviate the memory issue if not completely fix
>>> the problem.
>>>
>>> Will try this and see what happens.
>>
>> I believe XenServer has a patch that allows the toolstack (in this
>> case xapi) to set the default size of the MMIO hole. Andrew, did that
>> ever make it upstream?
>>
>> Unfortunately, it is unlikely to work with upstream qemu until we fix
>> the memory relocation issue...
>
> Interesting you should mention something like this. I've been
> pondering whether it might be easier (even if it is a bodge) to simply
> always set the domU E820 map to have 0x80000000 - 0xFFFFFFFF
> (2GB->4GB) reserved. I have not yet seen a motherboard that maps
> 32-bit BARs below 2GB.
I'm pretty sure we've seen a memory hole larger than 2GiB, in a box
loaded up with a boatload of GPUs.
The main problem with doing this unconditionally is that the relocated
memory isn't available to non-PAE 32-bit guests. I think we should have
a work-around in place for 4.4 that will avoid a collision between the
host MMIO and guest memory addresses; but it will need to be off by
default, at least for guests that don't have a passed-through device.
-George
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-08-01 9:15 ` George Dunlap
@ 2013-08-01 13:10 ` Fabio Fantoni
2013-08-02 14:43 ` George Dunlap
0 siblings, 1 reply; 74+ messages in thread
From: Fabio Fantoni @ 2013-08-01 13:10 UTC (permalink / raw)
To: George Dunlap
Cc: Andrew Bobulsky, Gordan Bobic, xen-devel, Ian Campbell, Andrew Cooper
Il 01/08/2013 11:15, George Dunlap ha scritto:
> On 31/07/13 20:35, Gordan Bobic wrote:
>> On 07/31/2013 06:53 PM, George Dunlap wrote:
>>> On Fri, Jul 26, 2013 at 2:11 PM, Gordan Bobic <gordan@bobich.net>
>>> wrote:
>>>>> Now that is intereting - if this makes the memory holes the same
>>>>> between
>>>>> the guest and the host, does it also implicitly vBAR=pBAR?
>>>>
>>>>
>>>> Another thing that occurred to me might be useful to check - it is
>>>> pretty easy to modify the BAR size on Nvidia cards. The defaults are
>>>> 64MB and 128MB for the two BARs. They can be made much, much larger,
>>>> and there is often advantage to enlarging them to at least be equal to
>>>> VRAM size. Soooooo... If I boost the BAR from 128MB to 2GB, being a
>>>> 64-bit BAR, it might make the BIOS do the sane thing and map it above
>>>> 4GB. With the other BAR also suitably enlarged and it being done on
>>>> the second GPU as well, there is no obvious option but to map them
>>>> above 4GB (unless the BIOS is broken, which it may well be, in
>>>> which case all bets are off).
>>>>
>>>> Which may just alleviate the memory issue if not completely fix
>>>> the problem.
>>>>
>>>> Will try this and see what happens.
>>>
>>> I believe XenServer has a patch that allows the toolstack (in this
>>> case xapi) to set the default size of the MMIO hole. Andrew, did that
>>> ever make it upstream?
>>>
>>> Unfortunately, it is unlikely to work with upstream qemu until we fix
>>> the memory relocation issue...
>>
>> Interesting you should mention something like this. I've been
>> pondering whether it might be easier (even if it is a bodge) to
>> simply always set the domU E820 map to have 0x80000000 - 0xFFFFFFFF
>> (2GB->4GB) reserved. I have not yet seen a motherboard that maps
>> 32-bit BARs below 2GB.
>
> I'm pretty sure we've seen a memory hole larger than 2GiB, in a box
> loaded up with a boatload of GPUs.
>
> The main problem with doing this unconditionally is that the relocated
> memory isn't available to non-PAE 32-bit guests. I think we should
> have a work-around in place for 4.4 that will avoid a collision
> between the host MMIO and guest memory addresses; but it will need to
> be off by default, at least for guests that don't have a
> passed-through device.
>
> -George
>
I see this recent patch on qemu:
http://git.qemu.org/?p=qemu.git;a=commit;h=398489018183d613306ab022653552247d93919f
Is related and can solve the problem or I'm wrong?
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-08-01 13:10 ` Fabio Fantoni
@ 2013-08-02 14:43 ` George Dunlap
0 siblings, 0 replies; 74+ messages in thread
From: George Dunlap @ 2013-08-02 14:43 UTC (permalink / raw)
To: Fabio Fantoni
Cc: Andrew Bobulsky, Gordan Bobic, Andrew Cooper, Ian Campbell, xen-devel
On Thu, Aug 1, 2013 at 2:10 PM, Fabio Fantoni <fabio.fantoni@m2r.biz> wrote:
> Il 01/08/2013 11:15, George Dunlap ha scritto:
>
>> On 31/07/13 20:35, Gordan Bobic wrote:
>>>
>>> On 07/31/2013 06:53 PM, George Dunlap wrote:
>>>>
>>>> On Fri, Jul 26, 2013 at 2:11 PM, Gordan Bobic <gordan@bobich.net> wrote:
>>>>>>
>>>>>> Now that is intereting - if this makes the memory holes the same
>>>>>> between
>>>>>> the guest and the host, does it also implicitly vBAR=pBAR?
>>>>>
>>>>>
>>>>>
>>>>> Another thing that occurred to me might be useful to check - it is
>>>>> pretty easy to modify the BAR size on Nvidia cards. The defaults are
>>>>> 64MB and 128MB for the two BARs. They can be made much, much larger,
>>>>> and there is often advantage to enlarging them to at least be equal to
>>>>> VRAM size. Soooooo... If I boost the BAR from 128MB to 2GB, being a
>>>>> 64-bit BAR, it might make the BIOS do the sane thing and map it above
>>>>> 4GB. With the other BAR also suitably enlarged and it being done on
>>>>> the second GPU as well, there is no obvious option but to map them
>>>>> above 4GB (unless the BIOS is broken, which it may well be, in
>>>>> which case all bets are off).
>>>>>
>>>>> Which may just alleviate the memory issue if not completely fix
>>>>> the problem.
>>>>>
>>>>> Will try this and see what happens.
>>>>
>>>>
>>>> I believe XenServer has a patch that allows the toolstack (in this
>>>> case xapi) to set the default size of the MMIO hole. Andrew, did that
>>>> ever make it upstream?
>>>>
>>>> Unfortunately, it is unlikely to work with upstream qemu until we fix
>>>> the memory relocation issue...
>>>
>>>
>>> Interesting you should mention something like this. I've been pondering
>>> whether it might be easier (even if it is a bodge) to simply always set the
>>> domU E820 map to have 0x80000000 - 0xFFFFFFFF (2GB->4GB) reserved. I have
>>> not yet seen a motherboard that maps 32-bit BARs below 2GB.
>>
>>
>> I'm pretty sure we've seen a memory hole larger than 2GiB, in a box loaded
>> up with a boatload of GPUs.
>>
>> The main problem with doing this unconditionally is that the relocated
>> memory isn't available to non-PAE 32-bit guests. I think we should have a
>> work-around in place for 4.4 that will avoid a collision between the host
>> MMIO and guest memory addresses; but it will need to be off by default, at
>> least for guests that don't have a passed-through device.
>>
>> -George
>>
>
> I see this recent patch on qemu:
> http://git.qemu.org/?p=qemu.git;a=commit;h=398489018183d613306ab022653552247d93919f
> Is related and can solve the problem or I'm wrong?
It doesn't look like it to me, but thanks for looking.
-George
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-07-29 18:04 ` Konrad Rzeszutek Wilk
@ 2013-09-03 13:53 ` Gordan Bobic
2013-09-03 14:59 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-03 13:53 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk, xen-devel
On Mon, 29 Jul 2013 14:04:31 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
Hi Konrad,
Apologies it took me a month to get back to this.
>> 2) Further, I'm finding myself motivated to write that
>> auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
>> briefly a week or so ago (have an init script read the BAR
>> info from dom0 and put it in xenstore, plus a patch to
>> make pBAR=vBAR reservations built dynamically rather than
>> statically, based on this data. Now, I'm quite fluent in C,
>> but my familiarity with Xen soruce code is nearly non-existant
>> (limited to studying an old unsupported patch every now and then
>> in order to make it apply to a more recent code release).
>> Can anyone help me out with a high level view WRT where
>> this would be best plumbed in (which files and the flow of
>> control between the affected files)?
>
> hvmloader probably and the libxl e820 code. What from a
> high view needs to happen is that:
> 1). Need to relax the check in libxl for e820_hole
> to also do it for HVM guests. Said code just iterates over the
> host E820 and sanitizes it a bit and makes a E820 hypercall to
> set it for the guest.
I'm looking at the libxl code at the moment.
In cases where e820_host is seen as PV specific, would the
correct thing to do be to move it out of the PV/HVM specific
blocks so it applies to both?
In libxl/libxl_x86.c/libxl__e820_alloc
I have thus far changed the code to remove the PV check,
and having moved e820_host option to be common to both VM
types, I changed the 820 related instances from
b_info->u.pv.e820_host
to
b_info->e820_host
Is this the correct/preferred way this should be handled?
Or would it be better to make e820_host be in both PV and
HVM options, and refer to it as such
(u.pv.e820_host / u.hvm.e820_host) ?
The e820 sanitizer is called with b_info->u.pv.slack_memkb
parameter. What does parameter actually mean? I googled
it and couldn't find any documentation specific to it, and
it doesn't appear to be documented as settable in the config
file. What would the equivalent be in case of HVM?
> 2). Figure out whether the E820 hypercall (which sets the E820
> layout for a guest) can be run on HVM guests. I think it
> could not and Mukesh in his PVH patches posted a patch
> to enable that - "..Move e820 fields out of pv_domain struct"
> 2). Hvmloader should do an E820 get machine memory hypercall
> to see if there is anything there. If there is - that means
> the toolstack has request a "new" type of E820. Iterate
> over the E820 and make it look like that.
> You can look in the Linux arch/x86/xen/setup.c to see how
> it does that.
>
> The complication there is that hvmloader needs to to fit the
> ACPI code (the guest type one) and such.
> Presumarily you can just re-use the existing spaces that
> the host has marked as E820_RESERVED or E820_ACPI..
Yup, I get it. Not only that, but it should also ideally (not
strictly necessary, but it'd be handy) map the IOMEM for devices
it is passed so that pBAR=vBAR (as opposed to just leaving all
the host e820 reserved areas well alone - which would work for
most things).
> Then there is the SMBIOS would need to move and the BIOS
> might need to be relocated - but I think those are relocatable
> in some form.
OK, I'll look at that once I have a workable patch for the libxl
part.
>> The added bonus of this (if it can be made to work) is that
>> it might just make unmodified GeForce cards work, too,
>> which probably makes it worthwhile on it's own.
>
> Well, I am more than happy to help you with this.
Thanks, much appreciated. :)
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0
2013-09-03 13:53 ` Gordan Bobic
@ 2013-09-03 14:59 ` Konrad Rzeszutek Wilk
2013-09-03 19:47 ` HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0) Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-03 14:59 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Tue, Sep 03, 2013 at 02:53:06PM +0100, Gordan Bobic wrote:
> On Mon, 29 Jul 2013 14:04:31 -0400, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
>
> Hi Konrad,
>
> Apologies it took me a month to get back to this.
Hey Gordan,
That is OK. Time flies fast!
>
> >>2) Further, I'm finding myself motivated to write that
> >>auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
> >>briefly a week or so ago (have an init script read the BAR
> >>info from dom0 and put it in xenstore, plus a patch to
> >>make pBAR=vBAR reservations built dynamically rather than
> >>statically, based on this data. Now, I'm quite fluent in C,
> >>but my familiarity with Xen soruce code is nearly non-existant
> >>(limited to studying an old unsupported patch every now and then
> >>in order to make it apply to a more recent code release).
> >>Can anyone help me out with a high level view WRT where
> >>this would be best plumbed in (which files and the flow of
> >>control between the affected files)?
> >
> >hvmloader probably and the libxl e820 code. What from a
> >high view needs to happen is that:
> > 1). Need to relax the check in libxl for e820_hole
> > to also do it for HVM guests. Said code just iterates over the
> > host E820 and sanitizes it a bit and makes a E820 hypercall to
> > set it for the guest.
>
> I'm looking at the libxl code at the moment.
>
> In cases where e820_host is seen as PV specific, would the
> correct thing to do be to move it out of the PV/HVM specific
> blocks so it applies to both?
Yes.
>
> In libxl/libxl_x86.c/libxl__e820_alloc
>
> I have thus far changed the code to remove the PV check,
> and having moved e820_host option to be common to both VM
> types, I changed the 820 related instances from
> b_info->u.pv.e820_host
> to
> b_info->e820_host
>
> Is this the correct/preferred way this should be handled?
Yes.
> Or would it be better to make e820_host be in both PV and
> HVM options, and refer to it as such
> (u.pv.e820_host / u.hvm.e820_host) ?
No. Lets make it work across the board.
>
> The e820 sanitizer is called with b_info->u.pv.slack_memkb
> parameter. What does parameter actually mean? I googled
> it and couldn't find any documentation specific to it, and
> it doesn't appear to be documented as settable in the config
> file. What would the equivalent be in case of HVM?
0.
If my memory serves me right it is some amount of memory that
a PV guests that it does not use normally. It is used by the
frontend and backend driver to communicate. Kind of like a shadow
memory. But only ancient kernels use it but those still have to be
supported.
>
> > 2). Figure out whether the E820 hypercall (which sets the E820
> > layout for a guest) can be run on HVM guests. I think it
> > could not and Mukesh in his PVH patches posted a patch
> > to enable that - "..Move e820 fields out of pv_domain struct"
> > 2). Hvmloader should do an E820 get machine memory hypercall
> > to see if there is anything there. If there is - that means
> > the toolstack has request a "new" type of E820. Iterate
> > over the E820 and make it look like that.
> > You can look in the Linux arch/x86/xen/setup.c to see how
> > it does that.
> >
> > The complication there is that hvmloader needs to to fit the
> > ACPI code (the guest type one) and such.
> > Presumarily you can just re-use the existing spaces that
> > the host has marked as E820_RESERVED or E820_ACPI..
>
> Yup, I get it. Not only that, but it should also ideally (not
> strictly necessary, but it'd be handy) map the IOMEM for devices
> it is passed so that pBAR=vBAR (as opposed to just leaving all
> the host e820 reserved areas well alone - which would work for
> most things).
Yes. That is an extra complication that could be done in subsequent
patches. But in theory if you have the E820 mirrored from the host the
pBAR=vBAR should be easy enough as the values from the host BARs can
easily fit in the E820 gaps.
>
> > Then there is the SMBIOS would need to move and the BIOS
> > might need to be relocated - but I think those are relocatable
> > in some form.
>
> OK, I'll look at that once I have a workable patch for the libxl
> part.
Aye.
>
> >>The added bonus of this (if it can be made to work) is that
> >>it might just make unmodified GeForce cards work, too,
> >>which probably makes it worthwhile on it's own.
> >
> >Well, I am more than happy to help you with this.
>
> Thanks, much appreciated. :)
Yeeey! Vict^H^H^H^volunteer :-)! <manically laughter in the background>
I am also reachable on IRC (FreeNode mostly) as either darnok or konrad
if that would be more convient to discuss this.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 14:59 ` Konrad Rzeszutek Wilk
@ 2013-09-03 19:47 ` Gordan Bobic
2013-09-03 20:35 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-03 19:47 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
[-- Attachment #1: Type: text/plain, Size: 3693 bytes --]
On 09/03/2013 03:59 PM, Konrad Rzeszutek Wilk wrote:
>>>> 2) Further, I'm finding myself motivated to write that
>>>> auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
>>>> briefly a week or so ago (have an init script read the BAR
>>>> info from dom0 and put it in xenstore, plus a patch to
>>>> make pBAR=vBAR reservations built dynamically rather than
>>>> statically, based on this data. Now, I'm quite fluent in C,
>>>> but my familiarity with Xen soruce code is nearly non-existant
>>>> (limited to studying an old unsupported patch every now and then
>>>> in order to make it apply to a more recent code release).
>>>> Can anyone help me out with a high level view WRT where
>>>> this would be best plumbed in (which files and the flow of
>>>> control between the affected files)?
>>>
>>> hvmloader probably and the libxl e820 code. What from a
>>> high view needs to happen is that:
>>> 1). Need to relax the check in libxl for e820_hole
>>> to also do it for HVM guests. Said code just iterates over the
>>> host E820 and sanitizes it a bit and makes a E820 hypercall to
>>> set it for the guest.
[snip]
OK, I have attached a preliminary patch against 4.3.0 for the libxl
part. It compiles. I haven't tried running it to see if it actually
works or does something, but my packages build.
Please let me know if I've missed anything. On it's own, I don't think
this patch will do much (apart from maybe break HVM hosts with
e820_host=1 set).
>>> 2). Figure out whether the E820 hypercall (which sets the E820
>>> layout for a guest) can be run on HVM guests. I think it
>>> could not and Mukesh in his PVH patches posted a patch
>>> to enable that - "..Move e820 fields out of pv_domain struct"
Is this already in 4.3.0 or is this an out-of-tree patch? Do you have a
link to it handy?
>>> 2). Hvmloader should do an E820 get machine memory hypercall
>>> to see if there is anything there. If there is - that means
>>> the toolstack has request a "new" type of E820. Iterate
>>> over the E820 and make it look like that.
>>> You can look in the Linux arch/x86/xen/setup.c to see how
>>> it does that.
>>>
>>> The complication there is that hvmloader needs to to fit the
>>> ACPI code (the guest type one) and such.
>>> Presumarily you can just re-use the existing spaces that
>>> the host has marked as E820_RESERVED or E820_ACPI..
>>
>> Yup, I get it. Not only that, but it should also ideally (not
>> strictly necessary, but it'd be handy) map the IOMEM for devices
>> it is passed so that pBAR=vBAR (as opposed to just leaving all
>> the host e820 reserved areas well alone - which would work for
>> most things).
>
> Yes. That is an extra complication that could be done in subsequent
> patches. But in theory if you have the E820 mirrored from the host the
> pBAR=vBAR should be easy enough as the values from the host BARs can
> easily fit in the E820 gaps.
Agreed. Let's leave the pBAR=vBAR part for a separate patch set. I'll
have to figure out a sensible way to query the IOMEM regions for each of
the devices passed to the VM and make sure they are in the same hole.
>>> Then there is the SMBIOS would need to move and the BIOS
>>> might need to be relocated - but I think those are relocatable
>>> in some form.
[bit above left for later reference]
>>> Well, I am more than happy to help you with this.
>>
>> Thanks, much appreciated. :)
>
> Yeeey! Vict^H^H^H^volunteer :-)! <manically laughter in the background>
>
> I am also reachable on IRC (FreeNode mostly) as either darnok or konrad
> if that would be more convient to discuss this.
Thanks. I'll keep that in mind. :)
Gordan
[-- Attachment #2: xen-hvm-libxl-e820_host.patch --]
[-- Type: text/plain, Size: 5596 bytes --]
--- xen-4.3.0/tools/libxl/libxl_create.c.orig 2013-09-03 14:26:47.478350269 +0100
+++ xen-4.3.0/tools/libxl/libxl_create.c 2013-09-03 14:45:26.710553063 +0100
@@ -208,6 +208,8 @@
libxl_defbool_setdefault(&b_info->disable_migrate, false);
+ libxl_defbool_setdefault(&b_info->e820_host, false);
+
switch (b_info->type) {
case LIBXL_DOMAIN_TYPE_HVM:
if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
@@ -280,7 +282,6 @@
break;
case LIBXL_DOMAIN_TYPE_PV:
- libxl_defbool_setdefault(&b_info->u.pv.e820_host, false);
if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
b_info->shadow_memkb = 0;
if (b_info->u.pv.slack_memkb == LIBXL_MEMKB_DEFAULT)
--- xen-4.3.0/tools/libxl/libxl_types.idl.orig 2013-09-03 14:16:48.462767589 +0100
+++ xen-4.3.0/tools/libxl/libxl_types.idl 2013-09-03 14:18:19.624028024 +0100
@@ -295,6 +295,8 @@
("irqs", Array(uint32, "num_irqs")),
("iomem", Array(libxl_iomem_range, "num_iomem")),
("claim_mode", libxl_defbool),
+ # Use host's E820 for PCI passthrough.
+ ("e820_host", libxl_defbool),
("u", KeyedUnion(None, libxl_domain_type, "type",
[("hvm", Struct(None, [("firmware", string),
("bios", libxl_bios_type),
@@ -340,8 +342,6 @@
("cmdline", string),
("ramdisk", string),
("features", string, {'const': True}),
- # Use host's E820 for PCI passthrough.
- ("e820_host", libxl_defbool),
])),
("invalid", Struct(None, [])),
], keyvar_init_val = "LIBXL_DOMAIN_TYPE_INVALID")),
--- xen-4.3.0/tools/libxl/libxl_x86.c.orig 2013-09-03 14:26:36.093566315 +0100
+++ xen-4.3.0/tools/libxl/libxl_x86.c 2013-09-03 16:52:24.648701260 +0100
@@ -216,11 +216,8 @@
struct e820entry map[E820MAX];
libxl_domain_build_info *b_info;
- if (d_config == NULL || d_config->c_info.type == LIBXL_DOMAIN_TYPE_HVM)
- return ERROR_INVAL;
-
b_info = &d_config->b_info;
- if (!libxl_defbool_val(b_info->u.pv.e820_host))
+ if (!libxl_defbool_val(b_info->e820_host))
return ERROR_INVAL;
rc = xc_get_machine_memory_map(ctx->xch, map, E820MAX);
@@ -229,9 +226,15 @@
return ERROR_FAIL;
}
nr = rc;
- rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
- (b_info->max_memkb - b_info->target_memkb) +
- b_info->u.pv.slack_memkb);
+ if (d_config == NULL || d_config->c_info.type == LIBXL_DOMAIN_TYPE_HVM) {
+ rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
+ (b_info->max_memkb - b_info->target_memkb));
+ } else if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV) {
+ rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
+ (b_info->max_memkb - b_info->target_memkb) +
+ b_info->u.pv.slack_memkb);
+ }
+
if (rc)
return ERROR_FAIL;
@@ -296,8 +299,7 @@
xc_shadow_control(ctx->xch, domid, XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION, NULL, 0, &shadow, 0, NULL);
}
- if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV &&
- libxl_defbool_val(d_config->b_info.u.pv.e820_host)) {
+ if (libxl_defbool_val(d_config->b_info.e820_host)) {
ret = libxl__e820_alloc(gc, domid, d_config);
if (ret) {
LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
--- xen-4.3.0/tools/libxl/xl_cmdimpl.c.orig 2013-09-03 14:26:54.524214804 +0100
+++ xen-4.3.0/tools/libxl/xl_cmdimpl.c 2013-09-03 14:47:11.811612562 +0100
@@ -1274,11 +1274,7 @@
if (!xlu_cfg_get_long (config, "pci_permissive", &l, 0))
pci_permissive = l;
- /* To be reworked (automatically enabled) once the auto ballooning
- * after guest starts is done (with PCI devices passed in). */
- if (c_info->type == LIBXL_DOMAIN_TYPE_PV) {
- xlu_cfg_get_defbool(config, "e820_host", &b_info->u.pv.e820_host, 0);
- }
+ xlu_cfg_get_defbool(config, "e820_host", &b_info->e820_host, 0);
if (!xlu_cfg_get_list (config, "pci", &pcis, 0, 0)) {
d_config->num_pcidevs = 0;
@@ -1296,8 +1292,8 @@
if (!xlu_pci_parse_bdf(config, pcidev, buf))
d_config->num_pcidevs++;
}
- if (d_config->num_pcidevs && c_info->type == LIBXL_DOMAIN_TYPE_PV)
- libxl_defbool_set(&b_info->u.pv.e820_host, true);
+ if (d_config->num_pcidevs)
+ libxl_defbool_set(&b_info->e820_host, true);
}
switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
--- xen-4.3.0/tools/libxl/xl_sxp.c.orig 2013-09-03 14:25:37.839675572 +0100
+++ xen-4.3.0/tools/libxl/xl_sxp.c 2013-09-03 14:22:13.953561029 +0100
@@ -87,6 +87,10 @@
}
}
+ printf("\t(e820_host %s)\n",
+ libxl_defbool_to_string(b_info->e820_host));
+
+
printf("\t(image\n");
switch (c_info->type) {
case LIBXL_DOMAIN_TYPE_HVM:
@@ -150,8 +154,6 @@
printf("\t\t\t(kernel %s)\n", b_info->u.pv.kernel);
printf("\t\t\t(cmdline %s)\n", b_info->u.pv.cmdline);
printf("\t\t\t(ramdisk %s)\n", b_info->u.pv.ramdisk);
- printf("\t\t\t(e820_host %s)\n",
- libxl_defbool_to_string(b_info->u.pv.e820_host));
printf("\t\t)\n");
break;
default:
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 19:47 ` HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0) Gordan Bobic
@ 2013-09-03 20:35 ` Gordan Bobic
2013-09-03 20:49 ` Gordan Bobic
2013-09-03 21:08 ` Konrad Rzeszutek Wilk
0 siblings, 2 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-03 20:35 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
[-- Attachment #1: Type: text/plain, Size: 4763 bytes --]
First attempt at a test run predictably failed. I added e820_host=1 to a
VM config and tried starting it:
[root@normandy ~]# xl create /etc/xen/edi
Parsing config from /etc/xen/edi
libxl: error: libxl_x86.c:307:libxl__arch_domain_create: Failed while
collecting E820 with: -3 (errno:-1)
libxl: error: libxl_create.c:901:domcreate_rebuild_done: cannot
(re-)build domain: -3
libxl: error: libxl_dm.c:1300:libxl__destroy_device_model: could not
find device-model's pid for dom 1
libxl: error: libxl.c:1415:libxl__destroy_domid:
libxl__destroy_device_model failed for 1
xl-edi.log, qemu-dm-edi.log attached.
Both actually look identical to previous logs before the patch.
Is this something that is clearly a consequence of the patch being
incomplete? Or did I break something?
Gordan
On 09/03/2013 08:47 PM, Gordan Bobic wrote:
> On 09/03/2013 03:59 PM, Konrad Rzeszutek Wilk wrote:
>
>>>>> 2) Further, I'm finding myself motivated to write that
>>>>> auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
>>>>> briefly a week or so ago (have an init script read the BAR
>>>>> info from dom0 and put it in xenstore, plus a patch to
>>>>> make pBAR=vBAR reservations built dynamically rather than
>>>>> statically, based on this data. Now, I'm quite fluent in C,
>>>>> but my familiarity with Xen soruce code is nearly non-existant
>>>>> (limited to studying an old unsupported patch every now and then
>>>>> in order to make it apply to a more recent code release).
>>>>> Can anyone help me out with a high level view WRT where
>>>>> this would be best plumbed in (which files and the flow of
>>>>> control between the affected files)?
>>>>
>>>> hvmloader probably and the libxl e820 code. What from a
>>>> high view needs to happen is that:
>>>> 1). Need to relax the check in libxl for e820_hole
>>>> to also do it for HVM guests. Said code just iterates over the
>>>> host E820 and sanitizes it a bit and makes a E820 hypercall to
>>>> set it for the guest.
> [snip]
>
> OK, I have attached a preliminary patch against 4.3.0 for the libxl
> part. It compiles. I haven't tried running it to see if it actually
> works or does something, but my packages build.
>
> Please let me know if I've missed anything. On it's own, I don't think
> this patch will do much (apart from maybe break HVM hosts with
> e820_host=1 set).
>
>>>> 2). Figure out whether the E820 hypercall (which sets the E820
>>>> layout for a guest) can be run on HVM guests. I think it
>>>> could not and Mukesh in his PVH patches posted a patch
>>>> to enable that - "..Move e820 fields out of pv_domain struct"
>
> Is this already in 4.3.0 or is this an out-of-tree patch? Do you have a
> link to it handy?
>
>>>> 2). Hvmloader should do an E820 get machine memory hypercall
>>>> to see if there is anything there. If there is - that means
>>>> the toolstack has request a "new" type of E820. Iterate
>>>> over the E820 and make it look like that.
>>>> You can look in the Linux arch/x86/xen/setup.c to see how
>>>> it does that.
>>>>
>>>> The complication there is that hvmloader needs to to fit the
>>>> ACPI code (the guest type one) and such.
>>>> Presumarily you can just re-use the existing spaces that
>>>> the host has marked as E820_RESERVED or E820_ACPI..
>>>
>>> Yup, I get it. Not only that, but it should also ideally (not
>>> strictly necessary, but it'd be handy) map the IOMEM for devices
>>> it is passed so that pBAR=vBAR (as opposed to just leaving all
>>> the host e820 reserved areas well alone - which would work for
>>> most things).
>>
>> Yes. That is an extra complication that could be done in subsequent
>> patches. But in theory if you have the E820 mirrored from the host the
>> pBAR=vBAR should be easy enough as the values from the host BARs can
>> easily fit in the E820 gaps.
>
> Agreed. Let's leave the pBAR=vBAR part for a separate patch set. I'll
> have to figure out a sensible way to query the IOMEM regions for each of
> the devices passed to the VM and make sure they are in the same hole.
>
>>>> Then there is the SMBIOS would need to move and the BIOS
>>>> might need to be relocated - but I think those are relocatable
>>>> in some form.
>
> [bit above left for later reference]
>
>>>> Well, I am more than happy to help you with this.
>>>
>>> Thanks, much appreciated. :)
>>
>> Yeeey! Vict^H^H^H^volunteer :-)! <manically laughter in the background>
>>
>> I am also reachable on IRC (FreeNode mostly) as either darnok or konrad
>> if that would be more convient to discuss this.
>
> Thanks. I'll keep that in mind. :)
>
> Gordan
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
>
[-- Attachment #2: qemu-dm-edi.log --]
[-- Type: text/plain, Size: 7917 bytes --]
domid: 1
Using file /dev/zvol/ssd/edi in read-write mode
Watching /local/domain/0/device-model/1/logdirty/cmd
Watching /local/domain/0/device-model/1/command
Watching /local/domain/1/cpu
char device redirected to /dev/pts/3
qemu_map_cache_init nr_buckets = 10000 size 4194304
shared page at pfn feffd
buffered io page at pfn feffb
Guest uuid = a57e6840-e9f5-4a14-a822-b2cc662c177f
populating video RAM at ff000000
mapping video RAM from ff000000
Register xen platform.
Done register platform.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
xs_read(/local/domain/0/device-model/1/xen_extended_power_mgmt): read error
xs_read(): vncpasswd get error. /vm/a57e6840-e9f5-4a14-a822-b2cc662c177f/vncpasswd.
Log-dirty: no command yet.
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
vcpu-set: watch node error.
[xenstore_process_vcpu_set_event]: /local/domain/1/cpu has no CPU!
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
xs_read(/local/domain/1/log-throttling): read error
qemu: ignoring not-understood drive `/local/domain/1/log-throttling'
medium change watch on `/local/domain/1/log-throttling' - unknown device, ignored
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.0 ...
register_real_device: Disable MSI translation via per device option
register_real_device: Enable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x0
pt_register_regions: IO region registered (size=0x02000000 base_addr=0xf8000000)
pt_register_regions: IO region registered (size=0x08000000 base_addr=0xb800000c)
pt_register_regions: IO region registered (size=0x04000000 base_addr=0xb400000c)
pt_register_regions: IO region registered (size=0x00000080 base_addr=0x0000cf81)
pt_register_regions: Expansion ROM registered (size=0x00080000 base_addr=0xfbc00000)
pci_intx: intx=1
register_real_device: Real physical device 08:00.0 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.1 ...
register_real_device: Disable MSI translation via per device option
register_real_device: Enable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x1
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xfbcfc000)
pci_intx: intx=2
register_real_device: Real physical device 08:00.1 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 0c:00.0 ...
register_real_device: Disable MSI translation via per device option
register_real_device: Enable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0xc:0x0.0x0
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xd7efc000)
pci_intx: intx=1
register_real_device: Real physical device 0c:00.0 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 00:1a.1 ...
register_real_device: Disable MSI translation via per device option
register_real_device: Enable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x0:0x1a.0x1
pt_register_regions: IO region registered (size=0x00000020 base_addr=0x00008a01)
pci_intx: intx=2
register_real_device: Real physical device 00:1a.1 registered successfuly!
IRQ type = INTx
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=1
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=1
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=1
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=1
pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=1
pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=1
pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=1
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro state.
Unknown PV product 2 loaded in guest
PV driver build 1
region type 0 at [ef880000,ef8a0000).
squash iomem [ef880000, ef8a0000).
region type 1 at [c180,c1c0).
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=cf80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:06:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:07:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=8a00 len=32 index=4 first_map=0
pt_pci_write_config: [00:08:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=cf80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=8a00 len=32 index=4 first_map=0
pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=8a00 len=32 index=4 first_map=0
shutdown requested in cpu_handle_ioreq
Issued domain 1 poweroff
[-- Attachment #3: xl-edi.log --]
[-- Type: text/plain, Size: 465 bytes --]
Waiting for domain edi (domid 1) to die [pid 8363]
Domain 1 has shut down, reason code 0 0x0
Action for shutdown reason code 0 is destroy
Domain 1 needs to be cleaned up: destroying the domain
libxl: error: libxl_pci.c:990:libxl__device_pci_reset: The kernel doesn't support reset from sysfs for PCI device 0000:08:00.0
libxl: error: libxl_pci.c:990:libxl__device_pci_reset: The kernel doesn't support reset from sysfs for PCI device 0000:08:00.1
Done. Exiting now
[-- Attachment #4: Type: text/plain, Size: 126 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 20:35 ` Gordan Bobic
@ 2013-09-03 20:49 ` Gordan Bobic
2013-09-03 21:10 ` Konrad Rzeszutek Wilk
2013-09-03 21:08 ` Konrad Rzeszutek Wilk
1 sibling, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-03 20:49 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
I spoke too soon - even with e820_host=0, the same error occurs. What
did I break? The code in question is this:
if (libxl_defbool_val(d_config->b_info.e820_host)) {
ret = libxl__e820_alloc(gc, domid, d_config);
if (ret) {
LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
"Failed while collecting E820 with: %d (errno:%d)\n",
ret, errno);
}
}
With e820_host=0, that outer black should evaluate to false, should it
not? In libxl_create.c, if I am understanding the code correctly,
e820_host is defaulted to false, too. What am I missing?
Gordan
On 09/03/2013 09:35 PM, Gordan Bobic wrote:
> First attempt at a test run predictably failed. I added e820_host=1 to a
> VM config and tried starting it:
>
> [root@normandy ~]# xl create /etc/xen/edi
> Parsing config from /etc/xen/edi
> libxl: error: libxl_x86.c:307:libxl__arch_domain_create: Failed while
> collecting E820 with: -3 (errno:-1)
>
> libxl: error: libxl_create.c:901:domcreate_rebuild_done: cannot
> (re-)build domain: -3
> libxl: error: libxl_dm.c:1300:libxl__destroy_device_model: could not
> find device-model's pid for dom 1
> libxl: error: libxl.c:1415:libxl__destroy_domid:
> libxl__destroy_device_model failed for 1
>
> xl-edi.log, qemu-dm-edi.log attached.
> Both actually look identical to previous logs before the patch.
>
> Is this something that is clearly a consequence of the patch being
> incomplete? Or did I break something?
>
> Gordan
>
> On 09/03/2013 08:47 PM, Gordan Bobic wrote:
>> On 09/03/2013 03:59 PM, Konrad Rzeszutek Wilk wrote:
>>
>>>>>> 2) Further, I'm finding myself motivated to write that
>>>>>> auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
>>>>>> briefly a week or so ago (have an init script read the BAR
>>>>>> info from dom0 and put it in xenstore, plus a patch to
>>>>>> make pBAR=vBAR reservations built dynamically rather than
>>>>>> statically, based on this data. Now, I'm quite fluent in C,
>>>>>> but my familiarity with Xen soruce code is nearly non-existant
>>>>>> (limited to studying an old unsupported patch every now and then
>>>>>> in order to make it apply to a more recent code release).
>>>>>> Can anyone help me out with a high level view WRT where
>>>>>> this would be best plumbed in (which files and the flow of
>>>>>> control between the affected files)?
>>>>>
>>>>> hvmloader probably and the libxl e820 code. What from a
>>>>> high view needs to happen is that:
>>>>> 1). Need to relax the check in libxl for e820_hole
>>>>> to also do it for HVM guests. Said code just iterates over the
>>>>> host E820 and sanitizes it a bit and makes a E820 hypercall to
>>>>> set it for the guest.
>> [snip]
>>
>> OK, I have attached a preliminary patch against 4.3.0 for the libxl
>> part. It compiles. I haven't tried running it to see if it actually
>> works or does something, but my packages build.
>>
>> Please let me know if I've missed anything. On it's own, I don't think
>> this patch will do much (apart from maybe break HVM hosts with
>> e820_host=1 set).
>>
>>>>> 2). Figure out whether the E820 hypercall (which sets the E820
>>>>> layout for a guest) can be run on HVM guests. I think it
>>>>> could not and Mukesh in his PVH patches posted a patch
>>>>> to enable that - "..Move e820 fields out of pv_domain struct"
>>
>> Is this already in 4.3.0 or is this an out-of-tree patch? Do you have a
>> link to it handy?
>>
>>>>> 2). Hvmloader should do an E820 get machine memory hypercall
>>>>> to see if there is anything there. If there is - that means
>>>>> the toolstack has request a "new" type of E820. Iterate
>>>>> over the E820 and make it look like that.
>>>>> You can look in the Linux arch/x86/xen/setup.c to see how
>>>>> it does that.
>>>>>
>>>>> The complication there is that hvmloader needs to to fit the
>>>>> ACPI code (the guest type one) and such.
>>>>> Presumarily you can just re-use the existing spaces that
>>>>> the host has marked as E820_RESERVED or E820_ACPI..
>>>>
>>>> Yup, I get it. Not only that, but it should also ideally (not
>>>> strictly necessary, but it'd be handy) map the IOMEM for devices
>>>> it is passed so that pBAR=vBAR (as opposed to just leaving all
>>>> the host e820 reserved areas well alone - which would work for
>>>> most things).
>>>
>>> Yes. That is an extra complication that could be done in subsequent
>>> patches. But in theory if you have the E820 mirrored from the host the
>>> pBAR=vBAR should be easy enough as the values from the host BARs can
>>> easily fit in the E820 gaps.
>>
>> Agreed. Let's leave the pBAR=vBAR part for a separate patch set. I'll
>> have to figure out a sensible way to query the IOMEM regions for each of
>> the devices passed to the VM and make sure they are in the same hole.
>>
>>>>> Then there is the SMBIOS would need to move and the BIOS
>>>>> might need to be relocated - but I think those are relocatable
>>>>> in some form.
>>
>> [bit above left for later reference]
>>
>>>>> Well, I am more than happy to help you with this.
>>>>
>>>> Thanks, much appreciated. :)
>>>
>>> Yeeey! Vict^H^H^H^volunteer :-)! <manically laughter in the background>
>>>
>>> I am also reachable on IRC (FreeNode mostly) as either darnok or konrad
>>> if that would be more convient to discuss this.
>>
>> Thanks. I'll keep that in mind. :)
>>
>> Gordan
>>
>>
>> _______________________________________________
>> Xen-devel mailing list
>> Xen-devel@lists.xen.org
>> http://lists.xen.org/xen-devel
>>
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 20:35 ` Gordan Bobic
2013-09-03 20:49 ` Gordan Bobic
@ 2013-09-03 21:08 ` Konrad Rzeszutek Wilk
2013-09-04 9:21 ` Gordan Bobic
2013-09-04 11:01 ` Gordan Bobic
1 sibling, 2 replies; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-03 21:08 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Tue, Sep 03, 2013 at 09:35:50PM +0100, Gordan Bobic wrote:
> First attempt at a test run predictably failed. I added e820_host=1
> to a VM config and tried starting it:
>
> [root@normandy ~]# xl create /etc/xen/edi
> Parsing config from /etc/xen/edi
> libxl: error: libxl_x86.c:307:libxl__arch_domain_create: Failed
> while collecting E820 with: -3 (errno:-1)
>
> libxl: error: libxl_create.c:901:domcreate_rebuild_done: cannot
> (re-)build domain: -3
> libxl: error: libxl_dm.c:1300:libxl__destroy_device_model: could not
> find device-model's pid for dom 1
> libxl: error: libxl.c:1415:libxl__destroy_domid:
> libxl__destroy_device_model failed for 1
>
> xl-edi.log, qemu-dm-edi.log attached.
> Both actually look identical to previous logs before the patch.
>
> Is this something that is clearly a consequence of the patch being
> incomplete? Or did I break something?
You are missing the hypervisor patch to set the E820 for HVM guests.
http://lists.xen.org/archives/html/xen-devel/2013-05/msg01603.html
And that should make it possible to "stash" the E820 in the hypervisor.
Then after that you will need to implement in the hvmloader.c the
XENMEM_memory_map hypercall to get the E820 and do something with it.
Oh, and something like this probably should do it - not compile tested
in any way:
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 1fcaed0..7b38890 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3146,6 +3146,7 @@ static long hvm_memory_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
case XENMEM_machine_memory_map:
case XENMEM_machphys_mapping:
return -ENOSYS;
+ case XENMEM_memory_map:
case XENMEM_decrease_reservation:
rc = do_memory_op(cmd, arg);
current->domain->arch.hvm_domain.qemu_mapcache_invalidate = 1;
@@ -3216,10 +3217,10 @@ static long hvm_memory_op_compat32(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
switch ( cmd & MEMOP_CMD_MASK )
{
- case XENMEM_memory_map:
case XENMEM_machine_memory_map:
case XENMEM_machphys_mapping:
return -ENOSYS;
+ case XENMEM_memory_map:
case XENMEM_decrease_reservation:
rc = compat_memory_op(cmd, arg);
current->domain->arch.hvm_domain.qemu_mapcache_invalidate = 1;
diff --git a/tools/firmware/hvmloader/e820.c b/tools/firmware/hvmloader/e820.c
index 2e05e93..86fb20a 100644
--- a/tools/firmware/hvmloader/e820.c
+++ b/tools/firmware/hvmloader/e820.c
@@ -68,16 +68,42 @@ void dump_e820_table(struct e820entry *e820, unsigned int nr)
}
}
+static const char *e820_names(int type)
+{
+ switch (type) {
+ case E820_RAM: return "RAM";
+ case E820_RESERVED: return "Reserved";
+ case E820_ACPI: return "ACPI";
+ case E820_NVS: return "ACPI NVS";
+ case E820_UNUSABLE: return "Unusable";
+ default: break;
+ }
+ return "Unknown";
+}
+
+
/* Create an E820 table based on memory parameters provided in hvm_info. */
int build_e820_table(struct e820entry *e820,
unsigned int lowmem_reserved_base,
unsigned int bios_image_base)
{
unsigned int nr = 0;
+ struct xen_memory_map op;
+ struct e820entry map[E820MAX];
+ int rc;
if ( !lowmem_reserved_base )
lowmem_reserved_base = 0xA0000;
+ set_xen_guest_handle(op.buffer, map);
+
+ rc = hypercall_memory_op ( XENMEM_memory_op, &op);
+ if ( rc != -ENOSYS) { /* It works!? */
+ int i;
+ for ( i = 0; i < op.nr_entries; i++ )
+ printf(" %lx -> %lx %s\n", map[i].addr >> 12,
+ (map[i].addr + map[i].size) >> 12, e820_names(map[i].type));
+ }
/* Lowmem must be at least 512K to keep Windows happy) */
ASSERT ( lowmem_reserved_base > 512<<10 );
>
> Gordan
>
> On 09/03/2013 08:47 PM, Gordan Bobic wrote:
> >On 09/03/2013 03:59 PM, Konrad Rzeszutek Wilk wrote:
> >
> >>>>>2) Further, I'm finding myself motivated to write that
> >>>>>auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
> >>>>>briefly a week or so ago (have an init script read the BAR
> >>>>>info from dom0 and put it in xenstore, plus a patch to
> >>>>>make pBAR=vBAR reservations built dynamically rather than
> >>>>>statically, based on this data. Now, I'm quite fluent in C,
> >>>>>but my familiarity with Xen soruce code is nearly non-existant
> >>>>>(limited to studying an old unsupported patch every now and then
> >>>>>in order to make it apply to a more recent code release).
> >>>>>Can anyone help me out with a high level view WRT where
> >>>>>this would be best plumbed in (which files and the flow of
> >>>>>control between the affected files)?
> >>>>
> >>>>hvmloader probably and the libxl e820 code. What from a
> >>>>high view needs to happen is that:
> >>>>1). Need to relax the check in libxl for e820_hole
> >>>> to also do it for HVM guests. Said code just iterates over the
> >>>> host E820 and sanitizes it a bit and makes a E820 hypercall to
> >>>> set it for the guest.
> >[snip]
> >
> >OK, I have attached a preliminary patch against 4.3.0 for the libxl
> >part. It compiles. I haven't tried running it to see if it actually
> >works or does something, but my packages build.
> >
> >Please let me know if I've missed anything. On it's own, I don't think
> >this patch will do much (apart from maybe break HVM hosts with
> >e820_host=1 set).
> >
> >>>>2). Figure out whether the E820 hypercall (which sets the E820
> >>>> layout for a guest) can be run on HVM guests. I think it
> >>>> could not and Mukesh in his PVH patches posted a patch
> >>>> to enable that - "..Move e820 fields out of pv_domain struct"
> >
> >Is this already in 4.3.0 or is this an out-of-tree patch? Do you have a
> >link to it handy?
> >
> >>>>2). Hvmloader should do an E820 get machine memory hypercall
> >>>> to see if there is anything there. If there is - that means
> >>>> the toolstack has request a "new" type of E820. Iterate
> >>>> over the E820 and make it look like that.
> >>>> You can look in the Linux arch/x86/xen/setup.c to see how
> >>>> it does that.
> >>>>
> >>>> The complication there is that hvmloader needs to to fit the
> >>>> ACPI code (the guest type one) and such.
> >>>> Presumarily you can just re-use the existing spaces that
> >>>> the host has marked as E820_RESERVED or E820_ACPI..
> >>>
> >>>Yup, I get it. Not only that, but it should also ideally (not
> >>>strictly necessary, but it'd be handy) map the IOMEM for devices
> >>>it is passed so that pBAR=vBAR (as opposed to just leaving all
> >>>the host e820 reserved areas well alone - which would work for
> >>>most things).
> >>
> >>Yes. That is an extra complication that could be done in subsequent
> >>patches. But in theory if you have the E820 mirrored from the host the
> >>pBAR=vBAR should be easy enough as the values from the host BARs can
> >>easily fit in the E820 gaps.
> >
> >Agreed. Let's leave the pBAR=vBAR part for a separate patch set. I'll
> >have to figure out a sensible way to query the IOMEM regions for each of
> >the devices passed to the VM and make sure they are in the same hole.
> >
> >>>> Then there is the SMBIOS would need to move and the BIOS
> >>>> might need to be relocated - but I think those are relocatable
> >>>> in some form.
> >
> >[bit above left for later reference]
> >
> >>>>Well, I am more than happy to help you with this.
> >>>
> >>>Thanks, much appreciated. :)
> >>
> >>Yeeey! Vict^H^H^H^volunteer :-)! <manically laughter in the background>
> >>
> >>I am also reachable on IRC (FreeNode mostly) as either darnok or konrad
> >>if that would be more convient to discuss this.
> >
> >Thanks. I'll keep that in mind. :)
> >
> >Gordan
> >
> >
> >_______________________________________________
> >Xen-devel mailing list
> >Xen-devel@lists.xen.org
> >http://lists.xen.org/xen-devel
> >
>
> domid: 1
> Using file /dev/zvol/ssd/edi in read-write mode
> Watching /local/domain/0/device-model/1/logdirty/cmd
> Watching /local/domain/0/device-model/1/command
> Watching /local/domain/1/cpu
> char device redirected to /dev/pts/3
> qemu_map_cache_init nr_buckets = 10000 size 4194304
> shared page at pfn feffd
> buffered io page at pfn feffb
> Guest uuid = a57e6840-e9f5-4a14-a822-b2cc662c177f
> populating video RAM at ff000000
> mapping video RAM from ff000000
> Register xen platform.
> Done register platform.
> platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
> xs_read(/local/domain/0/device-model/1/xen_extended_power_mgmt): read error
> xs_read(): vncpasswd get error. /vm/a57e6840-e9f5-4a14-a822-b2cc662c177f/vncpasswd.
> Log-dirty: no command yet.
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> vcpu-set: watch node error.
> [xenstore_process_vcpu_set_event]: /local/domain/1/cpu has no CPU!
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> xs_read(/local/domain/1/log-throttling): read error
> qemu: ignoring not-understood drive `/local/domain/1/log-throttling'
> medium change watch on `/local/domain/1/log-throttling' - unknown device, ignored
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
> dm-command: hot insert pass-through pci dev
> register_real_device: Assigning real physical device 08:00.0 ...
> register_real_device: Disable MSI translation via per device option
> register_real_device: Enable power management
> pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x0
> pt_register_regions: IO region registered (size=0x02000000 base_addr=0xf8000000)
> pt_register_regions: IO region registered (size=0x08000000 base_addr=0xb800000c)
> pt_register_regions: IO region registered (size=0x04000000 base_addr=0xb400000c)
> pt_register_regions: IO region registered (size=0x00000080 base_addr=0x0000cf81)
> pt_register_regions: Expansion ROM registered (size=0x00080000 base_addr=0xfbc00000)
> pci_intx: intx=1
> register_real_device: Real physical device 08:00.0 registered successfuly!
> IRQ type = INTx
> dm-command: hot insert pass-through pci dev
> register_real_device: Assigning real physical device 08:00.1 ...
> register_real_device: Disable MSI translation via per device option
> register_real_device: Enable power management
> pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x1
> pt_register_regions: IO region registered (size=0x00004000 base_addr=0xfbcfc000)
> pci_intx: intx=2
> register_real_device: Real physical device 08:00.1 registered successfuly!
> IRQ type = INTx
> dm-command: hot insert pass-through pci dev
> register_real_device: Assigning real physical device 0c:00.0 ...
> register_real_device: Disable MSI translation via per device option
> register_real_device: Enable power management
> pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0xc:0x0.0x0
> pt_register_regions: IO region registered (size=0x00004000 base_addr=0xd7efc000)
> pci_intx: intx=1
> register_real_device: Real physical device 0c:00.0 registered successfuly!
> IRQ type = INTx
> dm-command: hot insert pass-through pci dev
> register_real_device: Assigning real physical device 00:1a.1 ...
> register_real_device: Disable MSI translation via per device option
> register_real_device: Enable power management
> pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x0:0x1a.0x1
> pt_register_regions: IO region registered (size=0x00000020 base_addr=0x00008a01)
> pci_intx: intx=2
> register_real_device: Real physical device 00:1a.1 registered successfuly!
> IRQ type = INTx
> pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=1
> pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=1
> pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=1
> vga s->lfb_addr = ef000000 s->lfb_end = ef800000
> pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=1
> pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=1
> pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=1
> pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=1
> platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
> platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro state.
> Unknown PV product 2 loaded in guest
> PV driver build 1
> region type 0 at [ef880000,ef8a0000).
> squash iomem [ef880000, ef8a0000).
> region type 1 at [c180,c1c0).
> vga s->lfb_addr = ef000000 s->lfb_end = ef800000
> pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
> pt_ioport_map: e_phys=ffff pio_base=cf80 len=128 index=5 first_map=0
> pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
> pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
> pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
> pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
> pt_pci_write_config: [00:06:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
> pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_pci_write_config: [00:07:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
> pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_ioport_map: e_phys=ffff pio_base=8a00 len=32 index=4 first_map=0
> pt_pci_write_config: [00:08:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
> pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
> pt_ioport_map: e_phys=ffff pio_base=cf80 len=128 index=5 first_map=0
> pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
> pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
> pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
> pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
> pt_ioport_map: e_phys=ffff pio_base=8a00 len=32 index=4 first_map=0
> pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
> pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
> pt_ioport_map: e_phys=ffff pio_base=8a00 len=32 index=4 first_map=0
> shutdown requested in cpu_handle_ioreq
> Issued domain 1 poweroff
> Waiting for domain edi (domid 1) to die [pid 8363]
> Domain 1 has shut down, reason code 0 0x0
> Action for shutdown reason code 0 is destroy
> Domain 1 needs to be cleaned up: destroying the domain
> libxl: error: libxl_pci.c:990:libxl__device_pci_reset: The kernel doesn't support reset from sysfs for PCI device 0000:08:00.0
> libxl: error: libxl_pci.c:990:libxl__device_pci_reset: The kernel doesn't support reset from sysfs for PCI device 0000:08:00.1
> Done. Exiting now
^ permalink raw reply related [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 20:49 ` Gordan Bobic
@ 2013-09-03 21:10 ` Konrad Rzeszutek Wilk
2013-09-03 21:24 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-03 21:10 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Tue, Sep 03, 2013 at 09:49:40PM +0100, Gordan Bobic wrote:
> I spoke too soon - even with e820_host=0, the same error occurs.
> What did I break? The code in question is this:
>
> if (libxl_defbool_val(d_config->b_info.e820_host)) {
> ret = libxl__e820_alloc(gc, domid, d_config);
> if (ret) {
> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
> "Failed while collecting E820 with: %d (errno:%d)\n",
> ret, errno);
> }
> }
>
> With e820_host=0, that outer black should evaluate to false, should
> it not? In libxl_create.c, if I am understanding the code correctly,
> e820_host is defaulted to false, too. What am I missing?
Just sent you an email but I believe what is failing is:
241 rc = xc_domain_set_memory_map(ctx->xch, domid, map, nr);
You can add some extra LIBXL__LOG_ERRNO to check each 'rc' to see
which one of them failed.
Hm, perhaps it might make sense to actually have the libxl__e820_alloc
also use the LIBXL__LOG_ERRNO to log more details..
>
> Gordan
>
> On 09/03/2013 09:35 PM, Gordan Bobic wrote:
> >First attempt at a test run predictably failed. I added e820_host=1 to a
> >VM config and tried starting it:
> >
> >[root@normandy ~]# xl create /etc/xen/edi
> >Parsing config from /etc/xen/edi
> >libxl: error: libxl_x86.c:307:libxl__arch_domain_create: Failed while
> >collecting E820 with: -3 (errno:-1)
> >
> >libxl: error: libxl_create.c:901:domcreate_rebuild_done: cannot
> >(re-)build domain: -3
> >libxl: error: libxl_dm.c:1300:libxl__destroy_device_model: could not
> >find device-model's pid for dom 1
> >libxl: error: libxl.c:1415:libxl__destroy_domid:
> >libxl__destroy_device_model failed for 1
> >
> >xl-edi.log, qemu-dm-edi.log attached.
> >Both actually look identical to previous logs before the patch.
> >
> >Is this something that is clearly a consequence of the patch being
> >incomplete? Or did I break something?
> >
> >Gordan
> >
> >On 09/03/2013 08:47 PM, Gordan Bobic wrote:
> >>On 09/03/2013 03:59 PM, Konrad Rzeszutek Wilk wrote:
> >>
> >>>>>>2) Further, I'm finding myself motivated to write that
> >>>>>>auto-set (as opposed to hard coded) vBAR=pBAR patch discussed
> >>>>>>briefly a week or so ago (have an init script read the BAR
> >>>>>>info from dom0 and put it in xenstore, plus a patch to
> >>>>>>make pBAR=vBAR reservations built dynamically rather than
> >>>>>>statically, based on this data. Now, I'm quite fluent in C,
> >>>>>>but my familiarity with Xen soruce code is nearly non-existant
> >>>>>>(limited to studying an old unsupported patch every now and then
> >>>>>>in order to make it apply to a more recent code release).
> >>>>>>Can anyone help me out with a high level view WRT where
> >>>>>>this would be best plumbed in (which files and the flow of
> >>>>>>control between the affected files)?
> >>>>>
> >>>>>hvmloader probably and the libxl e820 code. What from a
> >>>>>high view needs to happen is that:
> >>>>>1). Need to relax the check in libxl for e820_hole
> >>>>> to also do it for HVM guests. Said code just iterates over the
> >>>>> host E820 and sanitizes it a bit and makes a E820 hypercall to
> >>>>> set it for the guest.
> >>[snip]
> >>
> >>OK, I have attached a preliminary patch against 4.3.0 for the libxl
> >>part. It compiles. I haven't tried running it to see if it actually
> >>works or does something, but my packages build.
> >>
> >>Please let me know if I've missed anything. On it's own, I don't think
> >>this patch will do much (apart from maybe break HVM hosts with
> >>e820_host=1 set).
> >>
> >>>>>2). Figure out whether the E820 hypercall (which sets the E820
> >>>>> layout for a guest) can be run on HVM guests. I think it
> >>>>> could not and Mukesh in his PVH patches posted a patch
> >>>>> to enable that - "..Move e820 fields out of pv_domain struct"
> >>
> >>Is this already in 4.3.0 or is this an out-of-tree patch? Do you have a
> >>link to it handy?
> >>
> >>>>>2). Hvmloader should do an E820 get machine memory hypercall
> >>>>> to see if there is anything there. If there is - that means
> >>>>> the toolstack has request a "new" type of E820. Iterate
> >>>>> over the E820 and make it look like that.
> >>>>> You can look in the Linux arch/x86/xen/setup.c to see how
> >>>>> it does that.
> >>>>>
> >>>>> The complication there is that hvmloader needs to to fit the
> >>>>> ACPI code (the guest type one) and such.
> >>>>> Presumarily you can just re-use the existing spaces that
> >>>>> the host has marked as E820_RESERVED or E820_ACPI..
> >>>>
> >>>>Yup, I get it. Not only that, but it should also ideally (not
> >>>>strictly necessary, but it'd be handy) map the IOMEM for devices
> >>>>it is passed so that pBAR=vBAR (as opposed to just leaving all
> >>>>the host e820 reserved areas well alone - which would work for
> >>>>most things).
> >>>
> >>>Yes. That is an extra complication that could be done in subsequent
> >>>patches. But in theory if you have the E820 mirrored from the host the
> >>>pBAR=vBAR should be easy enough as the values from the host BARs can
> >>>easily fit in the E820 gaps.
> >>
> >>Agreed. Let's leave the pBAR=vBAR part for a separate patch set. I'll
> >>have to figure out a sensible way to query the IOMEM regions for each of
> >>the devices passed to the VM and make sure they are in the same hole.
> >>
> >>>>> Then there is the SMBIOS would need to move and the BIOS
> >>>>> might need to be relocated - but I think those are relocatable
> >>>>> in some form.
> >>
> >>[bit above left for later reference]
> >>
> >>>>>Well, I am more than happy to help you with this.
> >>>>
> >>>>Thanks, much appreciated. :)
> >>>
> >>>Yeeey! Vict^H^H^H^volunteer :-)! <manically laughter in the background>
> >>>
> >>>I am also reachable on IRC (FreeNode mostly) as either darnok or konrad
> >>>if that would be more convient to discuss this.
> >>
> >>Thanks. I'll keep that in mind. :)
> >>
> >>Gordan
> >>
> >>
> >>_______________________________________________
> >>Xen-devel mailing list
> >>Xen-devel@lists.xen.org
> >>http://lists.xen.org/xen-devel
> >>
> >
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 21:10 ` Konrad Rzeszutek Wilk
@ 2013-09-03 21:24 ` Gordan Bobic
2013-09-03 21:30 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-03 21:24 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On 09/03/2013 10:10 PM, Konrad Rzeszutek Wilk wrote:
> On Tue, Sep 03, 2013 at 09:49:40PM +0100, Gordan Bobic wrote:
>> I spoke too soon - even with e820_host=0, the same error occurs.
>> What did I break? The code in question is this:
>>
>> if (libxl_defbool_val(d_config->b_info.e820_host)) {
>> ret = libxl__e820_alloc(gc, domid, d_config);
>> if (ret) {
>> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
>> "Failed while collecting E820 with: %d (errno:%d)\n",
>> ret, errno);
>> }
>> }
>>
>> With e820_host=0, that outer black should evaluate to false, should
>> it not? In libxl_create.c, if I am understanding the code correctly,
>> e820_host is defaulted to false, too. What am I missing?
>
> Just sent you an email but I believe what is failing is:
>
> 241 rc = xc_domain_set_memory_map(ctx->xch, domid, map, nr);
But with e820_host=0 set in the config, libxl__e820_alloc() should not
be getting called in the first place. That function only gets called
from line 303, inside that if block I pasted above. That is what is
puzzling me.
> You can add some extra LIBXL__LOG_ERRNO to check each 'rc' to see
> which one of them failed.
>
> Hm, perhaps it might make sense to actually have the libxl__e820_alloc
> also use the LIBXL__LOG_ERRNO to log more details..
OK, I'll add some debug and see what I find.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 21:24 ` Gordan Bobic
@ 2013-09-03 21:30 ` Konrad Rzeszutek Wilk
2013-09-04 0:18 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-03 21:30 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Tue, Sep 03, 2013 at 10:24:44PM +0100, Gordan Bobic wrote:
> On 09/03/2013 10:10 PM, Konrad Rzeszutek Wilk wrote:
> >On Tue, Sep 03, 2013 at 09:49:40PM +0100, Gordan Bobic wrote:
> >>I spoke too soon - even with e820_host=0, the same error occurs.
> >>What did I break? The code in question is this:
> >>
> >>if (libxl_defbool_val(d_config->b_info.e820_host)) {
> >> ret = libxl__e820_alloc(gc, domid, d_config);
> >> if (ret) {
> >> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
> >> "Failed while collecting E820 with: %d (errno:%d)\n",
> >> ret, errno);
> >> }
> >>}
> >>
> >>With e820_host=0, that outer black should evaluate to false, should
> >>it not? In libxl_create.c, if I am understanding the code correctly,
> >>e820_host is defaulted to false, too. What am I missing?
Does your config have 'pci' in it? The patch you sent had this:
+ if (d_config->num_pcidevs)
+ libxl_defbool_set(&b_info->e820_host, true);
Which means that even if you did not have e820_host it will be automatically
set if you have PCI devices.
> >
> >Just sent you an email but I believe what is failing is:
> >
> >241 rc = xc_domain_set_memory_map(ctx->xch, domid, map, nr);
>
> But with e820_host=0 set in the config, libxl__e820_alloc() should
> not be getting called in the first place. That function only gets
> called from line 303, inside that if block I pasted above. That is
> what is puzzling me.
>
> >You can add some extra LIBXL__LOG_ERRNO to check each 'rc' to see
> >which one of them failed.
> >
> >Hm, perhaps it might make sense to actually have the libxl__e820_alloc
> >also use the LIBXL__LOG_ERRNO to log more details..
>
> OK, I'll add some debug and see what I find.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 21:30 ` Konrad Rzeszutek Wilk
@ 2013-09-04 0:18 ` Gordan Bobic
2013-09-04 14:08 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-04 0:18 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On 09/03/2013 10:30 PM, Konrad Rzeszutek Wilk wrote:
> On Tue, Sep 03, 2013 at 10:24:44PM +0100, Gordan Bobic wrote:
>> On 09/03/2013 10:10 PM, Konrad Rzeszutek Wilk wrote:
>>> On Tue, Sep 03, 2013 at 09:49:40PM +0100, Gordan Bobic wrote:
>>>> I spoke too soon - even with e820_host=0, the same error occurs.
>>>> What did I break? The code in question is this:
>>>>
>>>> if (libxl_defbool_val(d_config->b_info.e820_host)) {
>>>> ret = libxl__e820_alloc(gc, domid, d_config);
>>>> if (ret) {
>>>> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
>>>> "Failed while collecting E820 with: %d (errno:%d)\n",
>>>> ret, errno);
>>>> }
>>>> }
>>>>
>>>> With e820_host=0, that outer black should evaluate to false, should
>>>> it not? In libxl_create.c, if I am understanding the code correctly,
>>>> e820_host is defaulted to false, too. What am I missing?
>
> Does your config have 'pci' in it? The patch you sent had this:
>
> + if (d_config->num_pcidevs)
> + libxl_defbool_set(&b_info->e820_host, true);
>
> Which means that even if you did not have e820_host it will be automatically
> set if you have PCI devices.
OK - that was embarrasing. Caffeine underflow error. :(
I backed out that block. I don't think e820_host should be implicit in
hvm when PCI devices are passed.
That makes the adjusted patch fragment:
--- xl_cmdimpl.c.orig 2013-09-04 00:42:57.424337503 +0100
+++ xl_cmdimpl.c 2013-09-04 00:43:21.213886356 +0100
@@ -1293,7 +1293,7 @@
d_config->num_pcidevs++;
}
if (d_config->num_pcidevs && c_info->type == LIBXL_DOMAIN_TYPE_PV)
- libxl_defbool_set(&b_info->u.pv.e820_host, true);
+ libxl_defbool_set(&b_info->e820_host, true);
}
switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
This should maintain the old behaviour for backward compatibility when
e820_host is not set. I just tested it and it works (with e820_host=1 I
get the previous error, with e820_host=0, everything works fine.
I will have a play with the other two patches tomorrow.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 21:08 ` Konrad Rzeszutek Wilk
@ 2013-09-04 9:21 ` Gordan Bobic
2013-09-04 11:01 ` Gordan Bobic
1 sibling, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-04 9:21 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Tue, 3 Sep 2013 17:08:33 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> You are missing the hypervisor patch to set the E820 for HVM guests.
> http://lists.xen.org/archives/html/xen-devel/2013-05/msg01603.html
>
> And that should make it possible to "stash" the E820 in the
> hypervisor.
Regarding Jan's comment on the thread here:
http://lists.xen.org/archives/html/xen-devel/2013-05/msg01649.html
Should this not instead of:
===
@@ -595,7 +595,7 @@ void arch_domain_destroy(struct domain *d)
if ( is_hvm_domain(d) )
hvm_domain_destroy(d);
else
- xfree(d->arch.pv_domain.e820);
+ xfree(d->arch.e820);
free_domain_pirqs(d);
if ( !is_idle_domain(d) )
===
be something like:
===
@@ -595,7 +595,6 @@ void arch_domain_destroy(struct domain *d)
if ( is_hvm_domain(d) )
hvm_domain_destroy(d);
- else
- xfree(d->arch.pv_domain.e820);
+ xfree(d->arch.e820);
free_domain_pirqs(d);
if ( !is_idle_domain(d) )
===
The question I have is will d->arch.e820 always be there and set
even with e820_host=0? Or does there need to be an extra check
here?
> Then after that you will need to implement in the hvmloader.c the
> XENMEM_memory_map hypercall to get the E820 and do something with it.
>
>
> Oh, and something like this probably should do it - not compile
> tested
> in any way:
>
> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
> index 1fcaed0..7b38890 100644
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -3146,6 +3146,7 @@ static long hvm_memory_op(int cmd,
> XEN_GUEST_HANDLE_PARAM(void) arg)
> case XENMEM_machine_memory_map:
> case XENMEM_machphys_mapping:
> return -ENOSYS;
> + case XENMEM_memory_map:
> case XENMEM_decrease_reservation:
> rc = do_memory_op(cmd, arg);
> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
> 1;
> @@ -3216,10 +3217,10 @@ static long hvm_memory_op_compat32(int cmd,
> XEN_GUEST_HANDLE_PARAM(void) arg)
>
> switch ( cmd & MEMOP_CMD_MASK )
> {
> - case XENMEM_memory_map:
> case XENMEM_machine_memory_map:
> case XENMEM_machphys_mapping:
> return -ENOSYS;
> + case XENMEM_memory_map:
> case XENMEM_decrease_reservation:
> rc = compat_memory_op(cmd, arg);
> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
> 1;
>
> diff --git a/tools/firmware/hvmloader/e820.c
> b/tools/firmware/hvmloader/e820.c
> index 2e05e93..86fb20a 100644
> --- a/tools/firmware/hvmloader/e820.c
> +++ b/tools/firmware/hvmloader/e820.c
> @@ -68,16 +68,42 @@ void dump_e820_table(struct e820entry *e820,
> unsigned int nr)
> }
> }
>
> +static const char *e820_names(int type)
> +{
> + switch (type) {
> + case E820_RAM: return "RAM";
> + case E820_RESERVED: return "Reserved";
> + case E820_ACPI: return "ACPI";
> + case E820_NVS: return "ACPI NVS";
> + case E820_UNUSABLE: return "Unusable";
> + default: break;
> + }
> + return "Unknown";
> +}
> +
> +
> /* Create an E820 table based on memory parameters provided in
> hvm_info. */
> int build_e820_table(struct e820entry *e820,
> unsigned int lowmem_reserved_base,
> unsigned int bios_image_base)
> {
> unsigned int nr = 0;
> + struct xen_memory_map op;
> + struct e820entry map[E820MAX];
> + int rc;
>
> if ( !lowmem_reserved_base )
> lowmem_reserved_base = 0xA0000;
>
> + set_xen_guest_handle(op.buffer, map);
> +
> + rc = hypercall_memory_op ( XENMEM_memory_op, &op);
> + if ( rc != -ENOSYS) { /* It works!? */
> + int i;
> + for ( i = 0; i < op.nr_entries; i++ )
> + printf(" %lx -> %lx %s\n", map[i].addr >> 12,
> + (map[i].addr + map[i].size) >> 12,
> e820_names(map[i].type));
> + }
> /* Lowmem must be at least 512K to keep Windows happy) */
> ASSERT ( lowmem_reserved_base > 512<<10 );
Thanks. :) Will try that when I've verified the first two
patches (mine and Mukesh's) build cleanly in my 4.3.0 package
build.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-03 21:08 ` Konrad Rzeszutek Wilk
2013-09-04 9:21 ` Gordan Bobic
@ 2013-09-04 11:01 ` Gordan Bobic
2013-09-04 13:11 ` Gordan Bobic
1 sibling, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-04 11:01 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Tue, 3 Sep 2013 17:08:33 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> Oh, and something like this probably should do it - not compile
> tested
> in any way:
>
> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
> index 1fcaed0..7b38890 100644
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -3146,6 +3146,7 @@ static long hvm_memory_op(int cmd,
> XEN_GUEST_HANDLE_PARAM(void) arg)
> case XENMEM_machine_memory_map:
> case XENMEM_machphys_mapping:
> return -ENOSYS;
> + case XENMEM_memory_map:
> case XENMEM_decrease_reservation:
> rc = do_memory_op(cmd, arg);
> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
> 1;
This seems to work better. :)
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3142,10 +3142,10 @@ static long hvm_memory_op(int cmd,
XEN_GUEST_HANDLE_PARAM(void) arg)
switch ( cmd & MEMOP_CMD_MASK )
{
- case XENMEM_memory_map:
case XENMEM_machine_memory_map:
case XENMEM_machphys_mapping:
return -ENOSYS;
+ case XENMEM_memory_map:
case XENMEM_decrease_reservation:
rc = do_memory_op(cmd, arg);
current->domain->arch.hvm_domain.qemu_mapcache_invalidate = 1;
> diff --git a/tools/firmware/hvmloader/e820.c
> b/tools/firmware/hvmloader/e820.c
> index 2e05e93..86fb20a 100644
> --- a/tools/firmware/hvmloader/e820.c
> +++ b/tools/firmware/hvmloader/e820.c
> @@ -68,16 +68,42 @@ void dump_e820_table(struct e820entry *e820,
> unsigned int nr)
> }
> }
>
> +static const char *e820_names(int type)
> +{
> + switch (type) {
> + case E820_RAM: return "RAM";
> + case E820_RESERVED: return "Reserved";
> + case E820_ACPI: return "ACPI";
> + case E820_NVS: return "ACPI NVS";
> + case E820_UNUSABLE: return "Unusable";
> + default: break;
> + }
> + return "Unknown";
> +}
To make this work I also added:
--- tools/firmware/hvmloader/e820.h.orig 2013-09-04 10:55:38.317275183
+0100
+++ tools/firmware/hvmloader/e820.h 2013-09-04 10:56:14.374595809 +0100
@@ -8,6 +8,7 @@
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
+#define E820_UNUSBLE 5
struct e820entry {
uint64_t addr;
It that OK?
> /* Create an E820 table based on memory parameters provided in
> hvm_info. */
> int build_e820_table(struct e820entry *e820,
> unsigned int lowmem_reserved_base,
> unsigned int bios_image_base)
> {
> unsigned int nr = 0;
> + struct xen_memory_map op;
> + struct e820entry map[E820MAX];
> + int rc;
>
> if ( !lowmem_reserved_base )
> lowmem_reserved_base = 0xA0000;
>
> + set_xen_guest_handle(op.buffer, map);
> +
> + rc = hypercall_memory_op ( XENMEM_memory_op, &op);
Where is XENMEM_memory_op defined?
Should that be XENMEM_memory_map? Or maybe XENMEM_populate_physmap?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-04 11:01 ` Gordan Bobic
@ 2013-09-04 13:11 ` Gordan Bobic
2013-09-04 20:18 ` Gordan Bobic
2013-09-05 2:04 ` Konrad Rzeszutek Wilk
0 siblings, 2 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-04 13:11 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
[-- Attachment #1: Type: text/plain, Size: 4296 bytes --]
I have this at the point where it actually builds.
Otherwise completely untested (will do that later today).
Attached are:
1) libxl patch
Modified from the original patch to _not_ implicitly enable
e820_host when PCI devices are passed.
2) Mukesh's hypervisor e820 patch from here:
http://lists.xen.org/archives/html/xen-devel/2013-05/msg01603.html
Modified slightly to attempt to address Jan's comment on the same
thread, and to adjust the diff line pointers to match against
4.3.0 release code.
3) A patch based on Konrad's earlier in this thread, with
a few additions and changes to make it all compile.
Some peer review would be most welcome - this is my first
venture into Xen code, so please do assume that I have
no idea what I'm doing at the moment. :)
I added yet another E820MAX #define, this time to
tools/firmware/hvmloader/e820.h
If there is a better place to #include that via from
e820.c, please point me in the right direction.
Gordan
On Wed, 04 Sep 2013 12:01:09 +0100, Gordan Bobic <gordan@bobich.net>
wrote:
> On Tue, 3 Sep 2013 17:08:33 -0400, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
>
>> Oh, and something like this probably should do it - not compile
>> tested
>> in any way:
>>
>> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
>> index 1fcaed0..7b38890 100644
>> --- a/xen/arch/x86/hvm/hvm.c
>> +++ b/xen/arch/x86/hvm/hvm.c
>> @@ -3146,6 +3146,7 @@ static long hvm_memory_op(int cmd,
>> XEN_GUEST_HANDLE_PARAM(void) arg)
>> case XENMEM_machine_memory_map:
>> case XENMEM_machphys_mapping:
>> return -ENOSYS;
>> + case XENMEM_memory_map:
>> case XENMEM_decrease_reservation:
>> rc = do_memory_op(cmd, arg);
>> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
>> 1;
>
> This seems to work better. :)
>
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -3142,10 +3142,10 @@ static long hvm_memory_op(int cmd,
> XEN_GUEST_HANDLE_PARAM(void) arg)
>
> switch ( cmd & MEMOP_CMD_MASK )
> {
> - case XENMEM_memory_map:
> case XENMEM_machine_memory_map:
> case XENMEM_machphys_mapping:
> return -ENOSYS;
> + case XENMEM_memory_map:
> case XENMEM_decrease_reservation:
> rc = do_memory_op(cmd, arg);
> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
> 1;
>
>
>> diff --git a/tools/firmware/hvmloader/e820.c
>> b/tools/firmware/hvmloader/e820.c
>> index 2e05e93..86fb20a 100644
>> --- a/tools/firmware/hvmloader/e820.c
>> +++ b/tools/firmware/hvmloader/e820.c
>> @@ -68,16 +68,42 @@ void dump_e820_table(struct e820entry *e820,
>> unsigned int nr)
>> }
>> }
>>
>> +static const char *e820_names(int type)
>> +{
>> + switch (type) {
>> + case E820_RAM: return "RAM";
>> + case E820_RESERVED: return "Reserved";
>> + case E820_ACPI: return "ACPI";
>> + case E820_NVS: return "ACPI NVS";
>> + case E820_UNUSABLE: return "Unusable";
>> + default: break;
>> + }
>> + return "Unknown";
>> +}
>
> To make this work I also added:
>
> --- tools/firmware/hvmloader/e820.h.orig 2013-09-04
> 10:55:38.317275183 +0100
> +++ tools/firmware/hvmloader/e820.h 2013-09-04 10:56:14.374595809
> +0100
> @@ -8,6 +8,7 @@
> #define E820_RESERVED 2
> #define E820_ACPI 3
> #define E820_NVS 4
> +#define E820_UNUSBLE 5
>
> struct e820entry {
> uint64_t addr;
>
> It that OK?
>
>> /* Create an E820 table based on memory parameters provided in
>> hvm_info. */
>> int build_e820_table(struct e820entry *e820,
>> unsigned int lowmem_reserved_base,
>> unsigned int bios_image_base)
>> {
>> unsigned int nr = 0;
>> + struct xen_memory_map op;
>> + struct e820entry map[E820MAX];
>> + int rc;
>>
>> if ( !lowmem_reserved_base )
>> lowmem_reserved_base = 0xA0000;
>>
>> + set_xen_guest_handle(op.buffer, map);
>> +
>> + rc = hypercall_memory_op ( XENMEM_memory_op, &op);
>
> Where is XENMEM_memory_op defined?
> Should that be XENMEM_memory_map? Or maybe XENMEM_populate_physmap?
>
> Gordan
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
[-- Attachment #2: xen-hvm-libxl-e820_host.patch --]
[-- Type: text/x-c, Size: 5502 bytes --]
--- xen-4.3.0/tools/libxl/libxl_create.c.orig 2013-09-03 14:26:47.478350269 +0100
+++ xen-4.3.0/tools/libxl/libxl_create.c 2013-09-03 14:45:26.710553063 +0100
@@ -208,6 +208,8 @@
libxl_defbool_setdefault(&b_info->disable_migrate, false);
+ libxl_defbool_setdefault(&b_info->e820_host, false);
+
switch (b_info->type) {
case LIBXL_DOMAIN_TYPE_HVM:
if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
@@ -280,7 +282,6 @@
break;
case LIBXL_DOMAIN_TYPE_PV:
- libxl_defbool_setdefault(&b_info->u.pv.e820_host, false);
if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
b_info->shadow_memkb = 0;
if (b_info->u.pv.slack_memkb == LIBXL_MEMKB_DEFAULT)
--- xen-4.3.0/tools/libxl/libxl_types.idl.orig 2013-09-03 14:16:48.462767589 +0100
+++ xen-4.3.0/tools/libxl/libxl_types.idl 2013-09-03 14:18:19.624028024 +0100
@@ -295,6 +295,8 @@
("irqs", Array(uint32, "num_irqs")),
("iomem", Array(libxl_iomem_range, "num_iomem")),
("claim_mode", libxl_defbool),
+ # Use host's E820 for PCI passthrough.
+ ("e820_host", libxl_defbool),
("u", KeyedUnion(None, libxl_domain_type, "type",
[("hvm", Struct(None, [("firmware", string),
("bios", libxl_bios_type),
@@ -340,8 +342,6 @@
("cmdline", string),
("ramdisk", string),
("features", string, {'const': True}),
- # Use host's E820 for PCI passthrough.
- ("e820_host", libxl_defbool),
])),
("invalid", Struct(None, [])),
], keyvar_init_val = "LIBXL_DOMAIN_TYPE_INVALID")),
--- xen-4.3.0/tools/libxl/libxl_x86.c.orig 2013-09-03 14:26:36.093566315 +0100
+++ xen-4.3.0/tools/libxl/libxl_x86.c 2013-09-03 16:52:24.648701260 +0100
@@ -216,11 +216,8 @@
struct e820entry map[E820MAX];
libxl_domain_build_info *b_info;
- if (d_config == NULL || d_config->c_info.type == LIBXL_DOMAIN_TYPE_HVM)
- return ERROR_INVAL;
-
b_info = &d_config->b_info;
- if (!libxl_defbool_val(b_info->u.pv.e820_host))
+ if (!libxl_defbool_val(b_info->e820_host))
return ERROR_INVAL;
rc = xc_get_machine_memory_map(ctx->xch, map, E820MAX);
@@ -229,9 +226,15 @@
return ERROR_FAIL;
}
nr = rc;
- rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
- (b_info->max_memkb - b_info->target_memkb) +
- b_info->u.pv.slack_memkb);
+ if (d_config == NULL || d_config->c_info.type == LIBXL_DOMAIN_TYPE_HVM) {
+ rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
+ (b_info->max_memkb - b_info->target_memkb));
+ } else if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV) {
+ rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
+ (b_info->max_memkb - b_info->target_memkb) +
+ b_info->u.pv.slack_memkb);
+ }
+
if (rc)
return ERROR_FAIL;
@@ -296,8 +299,7 @@
xc_shadow_control(ctx->xch, domid, XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION, NULL, 0, &shadow, 0, NULL);
}
- if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV &&
- libxl_defbool_val(d_config->b_info.u.pv.e820_host)) {
+ if (libxl_defbool_val(d_config->b_info.e820_host)) {
ret = libxl__e820_alloc(gc, domid, d_config);
if (ret) {
LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
--- xen-4.3.0/tools/libxl/xl_cmdimpl.c.orig 2013-09-03 14:26:54.524214804 +0100
+++ xen-4.3.0/tools/libxl/xl_cmdimpl.c 2013-09-03 14:47:11.811612562 +0100
@@ -1274,11 +1274,7 @@
if (!xlu_cfg_get_long (config, "pci_permissive", &l, 0))
pci_permissive = l;
- /* To be reworked (automatically enabled) once the auto ballooning
- * after guest starts is done (with PCI devices passed in). */
- if (c_info->type == LIBXL_DOMAIN_TYPE_PV) {
- xlu_cfg_get_defbool(config, "e820_host", &b_info->u.pv.e820_host, 0);
- }
+ xlu_cfg_get_defbool(config, "e820_host", &b_info->e820_host, 0);
if (!xlu_cfg_get_list (config, "pci", &pcis, 0, 0)) {
d_config->num_pcidevs = 0;
@@ -1297,7 +1293,7 @@
d_config->num_pcidevs++;
}
if (d_config->num_pcidevs && c_info->type == LIBXL_DOMAIN_TYPE_PV)
- libxl_defbool_set(&b_info->u.pv.e820_host, true);
+ libxl_defbool_set(&b_info->e820_host, true);
}
switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
--- xen-4.3.0/tools/libxl/xl_sxp.c.orig 2013-09-03 14:25:37.839675572 +0100
+++ xen-4.3.0/tools/libxl/xl_sxp.c 2013-09-03 14:22:13.953561029 +0100
@@ -87,6 +87,10 @@
}
}
+ printf("\t(e820_host %s)\n",
+ libxl_defbool_to_string(b_info->e820_host));
+
+
printf("\t(image\n");
switch (c_info->type) {
case LIBXL_DOMAIN_TYPE_HVM:
@@ -150,8 +154,6 @@
printf("\t\t\t(kernel %s)\n", b_info->u.pv.kernel);
printf("\t\t\t(cmdline %s)\n", b_info->u.pv.cmdline);
printf("\t\t\t(ramdisk %s)\n", b_info->u.pv.ramdisk);
- printf("\t\t\t(e820_host %s)\n",
- libxl_defbool_to_string(b_info->u.pv.e820_host));
printf("\t\t)\n");
break;
default:
[-- Attachment #3: xen-hvm-hypervisor-e820_host.patch --]
[-- Type: text/x-diff, Size: 3704 bytes --]
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index b9711d2..8b04339 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -567,7 +567,7 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags)
/* 64-bit PV guest by default. */
d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
- spin_lock_init(&d->arch.pv_domain.e820_lock);
+ spin_lock_init(&d->arch.e820_lock);
}
/* initialize default tsc behavior in case tools don't */
@@ -592,8 +592,8 @@ void arch_domain_destroy(struct domain *d)
{
if ( is_hvm_domain(d) )
hvm_domain_destroy(d);
- else
- xfree(d->arch.pv_domain.e820);
+
+ xfree(d->arch.e820);
free_domain_pirqs(d);
if ( !is_idle_domain(d) )
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 43eeddc..60f1a4f 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4762,11 +4762,11 @@ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg)
return -EFAULT;
}
- spin_lock(&d->arch.pv_domain.e820_lock);
- xfree(d->arch.pv_domain.e820);
- d->arch.pv_domain.e820 = e820;
- d->arch.pv_domain.nr_e820 = fmap.map.nr_entries;
- spin_unlock(&d->arch.pv_domain.e820_lock);
+ spin_lock(&d->arch.e820_lock);
+ xfree(d->arch.e820);
+ d->arch.e820 = e820;
+ d->arch.nr_e820 = fmap.map.nr_entries;
+ spin_unlock(&d->arch.e820_lock);
rcu_unlock_domain(d);
return rc;
@@ -4780,26 +4780,26 @@ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg)
if ( copy_from_guest(&map, arg, 1) )
return -EFAULT;
- spin_lock(&d->arch.pv_domain.e820_lock);
+ spin_lock(&d->arch.e820_lock);
/* Backwards compatibility. */
- if ( (d->arch.pv_domain.nr_e820 == 0) ||
- (d->arch.pv_domain.e820 == NULL) )
+ if ( (d->arch.nr_e820 == 0) ||
+ (d->arch.e820 == NULL) )
{
- spin_unlock(&d->arch.pv_domain.e820_lock);
+ spin_unlock(&d->arch.e820_lock);
return -ENOSYS;
}
- map.nr_entries = min(map.nr_entries, d->arch.pv_domain.nr_e820);
- if ( copy_to_guest(map.buffer, d->arch.pv_domain.e820,
+ map.nr_entries = min(map.nr_entries, d->arch.nr_e820);
+ if ( copy_to_guest(map.buffer, d->arch.e820,
map.nr_entries) ||
__copy_to_guest(arg, &map, 1) )
{
- spin_unlock(&d->arch.pv_domain.e820_lock);
+ spin_unlock(&d->arch.e820_lock);
return -EFAULT;
}
- spin_unlock(&d->arch.pv_domain.e820_lock);
+ spin_unlock(&d->arch.e820_lock);
return 0;
}
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 83fbe58..1d5783f 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -234,11 +234,6 @@ struct pv_domain
/* map_domain_page() mapping cache. */
struct mapcache_domain mapcache;
-
- /* Pseudophysical e820 map (XENMEM_memory_map). */
- spinlock_t e820_lock;
- struct e820entry *e820;
- unsigned int nr_e820;
};
struct arch_domain
@@ -313,6 +308,11 @@ struct arch_domain
(possibly other cases in the future */
uint64_t vtsc_kerncount; /* for hvm, counts all vtsc */
uint64_t vtsc_usercount; /* not used for hvm */
+
+ /* Pseudophysical e820 map (XENMEM_memory_map). */
+ spinlock_t e820_lock;
+ struct e820entry *e820;
+ unsigned int nr_e820;
} __cacheline_aligned;
#define has_arch_pdevs(d) (!list_empty(&(d)->arch.pdev_list))
--
1.7.2.3
[-- Attachment #4: xen-hvm-loader-e820_host.patch --]
[-- Type: text/x-diff, Size: 3164 bytes --]
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 1fcaed0..7b38890 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3142,10 +3142,10 @@ static long hvm_memory_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
switch ( cmd & MEMOP_CMD_MASK )
{
- case XENMEM_memory_map:
case XENMEM_machine_memory_map:
case XENMEM_machphys_mapping:
return -ENOSYS;
+ case XENMEM_memory_map:
case XENMEM_decrease_reservation:
rc = do_memory_op(cmd, arg);
current->domain->arch.hvm_domain.qemu_mapcache_invalidate = 1;
@@ -3216,10 +3217,10 @@ static long hvm_memory_op_compat32(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
switch ( cmd & MEMOP_CMD_MASK )
{
- case XENMEM_memory_map:
case XENMEM_machine_memory_map:
case XENMEM_machphys_mapping:
return -ENOSYS;
+ case XENMEM_memory_map:
case XENMEM_decrease_reservation:
rc = compat_memory_op(cmd, arg);
current->domain->arch.hvm_domain.qemu_mapcache_invalidate = 1;
diff --git a/tools/firmware/hvmloader/e820.h.orig b/tools/firmware/hvmloader/e820.h
index b2ead7f..2fa700d 100644
--- a/tools/firmware/hvmloader/e820.h.orig
+++ b/tools/firmware/hvmloader/e820.h
@@ -8,6 +8,9 @@
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
+#define E820_UNUSABLE 5
+
+#define E820MAX 128
struct e820entry {
uint64_t addr;
diff --git a/tools/firmware/hvmloader/e820.c b/tools/firmware/hvmloader/e820.c
index 2e05e93..86fb20a 100644
--- a/tools/firmware/hvmloader/e820.c
+++ b/tools/firmware/hvmloader/e820.c
@@ -22,6 +22,9 @@
#include "config.h"
#include "util.h"
+#include "hypercall.h"
+#include <xen/memory.h>
+#include <errno.h>
void dump_e820_table(struct e820entry *e820, unsigned int nr)
{
@@ -68,16 +68,42 @@ void dump_e820_table(struct e820entry *e820, unsigned int nr)
}
}
+static const char *e820_names(int type)
+{
+ switch (type) {
+ case E820_RAM: return "RAM";
+ case E820_RESERVED: return "Reserved";
+ case E820_ACPI: return "ACPI";
+ case E820_NVS: return "ACPI NVS";
+ case E820_UNUSABLE: return "Unusable";
+ default: break;
+ }
+ return "Unknown";
+}
+
+
/* Create an E820 table based on memory parameters provided in hvm_info. */
int build_e820_table(struct e820entry *e820,
unsigned int lowmem_reserved_base,
unsigned int bios_image_base)
{
unsigned int nr = 0;
+ struct xen_memory_map op;
+ struct e820entry map[E820MAX];
+ int rc;
if ( !lowmem_reserved_base )
lowmem_reserved_base = 0xA0000;
+ set_xen_guest_handle(op.buffer, map);
+
+ rc = hypercall_memory_op ( XENMEM_memory_map, &op);
+ if ( rc != -ENOSYS) { /* It works!? */
+ int i;
+ for ( i = 0; i < op.nr_entries; i++ )
+ printf(" %llx -> %llx %s\n", map[i].addr >> 12,
+ (map[i].addr + map[i].size) >> 12, e820_names(map[i].type));
+ }
/* Lowmem must be at least 512K to keep Windows happy) */
ASSERT ( lowmem_reserved_base > 512<<10 );
[-- Attachment #5: Type: text/plain, Size: 126 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply related [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-04 0:18 ` Gordan Bobic
@ 2013-09-04 14:08 ` Konrad Rzeszutek Wilk
2013-09-04 14:23 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-04 14:08 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Wed, Sep 04, 2013 at 01:18:39AM +0100, Gordan Bobic wrote:
> On 09/03/2013 10:30 PM, Konrad Rzeszutek Wilk wrote:
> >On Tue, Sep 03, 2013 at 10:24:44PM +0100, Gordan Bobic wrote:
> >>On 09/03/2013 10:10 PM, Konrad Rzeszutek Wilk wrote:
> >>>On Tue, Sep 03, 2013 at 09:49:40PM +0100, Gordan Bobic wrote:
> >>>>I spoke too soon - even with e820_host=0, the same error occurs.
> >>>>What did I break? The code in question is this:
> >>>>
> >>>>if (libxl_defbool_val(d_config->b_info.e820_host)) {
> >>>> ret = libxl__e820_alloc(gc, domid, d_config);
> >>>> if (ret) {
> >>>> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
> >>>> "Failed while collecting E820 with: %d (errno:%d)\n",
> >>>> ret, errno);
> >>>> }
> >>>>}
> >>>>
> >>>>With e820_host=0, that outer black should evaluate to false, should
> >>>>it not? In libxl_create.c, if I am understanding the code correctly,
> >>>>e820_host is defaulted to false, too. What am I missing?
> >
> >Does your config have 'pci' in it? The patch you sent had this:
> >
> >+ if (d_config->num_pcidevs)
> >+ libxl_defbool_set(&b_info->e820_host, true);
> >
> >Which means that even if you did not have e820_host it will be automatically
> >set if you have PCI devices.
>
> OK - that was embarrasing. Caffeine underflow error. :(
> I backed out that block. I don't think e820_host should be implicit
> in hvm when PCI devices are passed.
>
> That makes the adjusted patch fragment:
> --- xl_cmdimpl.c.orig 2013-09-04 00:42:57.424337503 +0100
> +++ xl_cmdimpl.c 2013-09-04 00:43:21.213886356 +0100
> @@ -1293,7 +1293,7 @@
> d_config->num_pcidevs++;
> }
> if (d_config->num_pcidevs && c_info->type == LIBXL_DOMAIN_TYPE_PV)
I think you also want to get rid of the c_info->type check?
> - libxl_defbool_set(&b_info->u.pv.e820_host, true);
> + libxl_defbool_set(&b_info->e820_host, true);
> }
>
> switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
>
>
> This should maintain the old behaviour for backward compatibility
> when e820_host is not set. I just tested it and it works (with
> e820_host=1 I get the previous error, with e820_host=0, everything
> works fine.
I think it might make sense to relax the PV check. That way the only
way e820_host capability gets activated is if a the guest config
has pci=X stanze. But perhaps that _and_ e820_host=1 is what should
be done.
Or maybe a negative check - if 'pci' stanze is there we automatically
turn on e820_host=1 (right now that is how it works). If the user
has thought 'e820_host=0' and 'pci=xxx' then we would turn the E820
off? That way if something is odd we can turn this off?
>
> I will have a play with the other two patches tomorrow.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-04 14:08 ` Konrad Rzeszutek Wilk
@ 2013-09-04 14:23 ` Gordan Bobic
2013-09-04 18:00 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-04 14:23 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Wed, 4 Sep 2013 10:08:37 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> On Wed, Sep 04, 2013 at 01:18:39AM +0100, Gordan Bobic wrote:
>> On 09/03/2013 10:30 PM, Konrad Rzeszutek Wilk wrote:
>> >On Tue, Sep 03, 2013 at 10:24:44PM +0100, Gordan Bobic wrote:
>> >>On 09/03/2013 10:10 PM, Konrad Rzeszutek Wilk wrote:
>> >>>On Tue, Sep 03, 2013 at 09:49:40PM +0100, Gordan Bobic wrote:
>> >>>>I spoke too soon - even with e820_host=0, the same error occurs.
>> >>>>What did I break? The code in question is this:
>> >>>>
>> >>>>if (libxl_defbool_val(d_config->b_info.e820_host)) {
>> >>>> ret = libxl__e820_alloc(gc, domid, d_config);
>> >>>> if (ret) {
>> >>>> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
>> >>>> "Failed while collecting E820 with: %d
>> (errno:%d)\n",
>> >>>> ret, errno);
>> >>>> }
>> >>>>}
>> >>>>
>> >>>>With e820_host=0, that outer black should evaluate to false,
>> should
>> >>>>it not? In libxl_create.c, if I am understanding the code
>> correctly,
>> >>>>e820_host is defaulted to false, too. What am I missing?
>> >
>> >Does your config have 'pci' in it? The patch you sent had this:
>> >
>> >+ if (d_config->num_pcidevs)
>> >+ libxl_defbool_set(&b_info->e820_host, true);
>> >
>> >Which means that even if you did not have e820_host it will be
>> automatically
>> >set if you have PCI devices.
>>
>> OK - that was embarrasing. Caffeine underflow error. :(
>> I backed out that block. I don't think e820_host should be implicit
>> in hvm when PCI devices are passed.
>>
>> That makes the adjusted patch fragment:
>> --- xl_cmdimpl.c.orig 2013-09-04 00:42:57.424337503 +0100
>> +++ xl_cmdimpl.c 2013-09-04 00:43:21.213886356 +0100
>> @@ -1293,7 +1293,7 @@
>> d_config->num_pcidevs++;
>> }
>> if (d_config->num_pcidevs && c_info->type ==
>> LIBXL_DOMAIN_TYPE_PV)
>
> I think you also want to get rid of the c_info->type check?
That would alter the current PV behaviour of implicitly
enabling e820_host with PCI devices passed, would it not?
I was hoping to maintain current behaviours intact, and
only affect what happens when e820_host=1 is set for HVMs.
>> - libxl_defbool_set(&b_info->u.pv.e820_host, true);
>> + libxl_defbool_set(&b_info->e820_host, true);
>> }
>>
>> switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
>>
>>
>> This should maintain the old behaviour for backward compatibility
>> when e820_host is not set. I just tested it and it works (with
>> e820_host=1 I get the previous error, with e820_host=0, everything
>> works fine.
>
> I think it might make sense to relax the PV check. That way the only
> way e820_host capability gets activated is if a the guest config
> has pci=X stanze. But perhaps that _and_ e820_host=1 is what should
> be done.
While I think these two checks should be separate in both cases,
I don't know that this won't break something for PV instances. And
I would prefer to not have to also debug that code path at this
point. :)
> Or maybe a negative check - if 'pci' stanze is there we automatically
> turn on e820_host=1 (right now that is how it works). If the user
> has thought 'e820_host=0' and 'pci=xxx' then we would turn the E820
> off? That way if something is odd we can turn this off?
I am not disagreeing at all - I just really don't want to change
the current PV behaviour since that will potentially require
extra debugging. Current PV behaviour seems to be that that if
PCI devices are passed, e820_host=1 is always set regardless
of whether it is explicitly enabled or disabled in the config.
And I have no idea what will happen with a PV domain with
PCI devices if e820_host=1 is disabled.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-04 14:23 ` Gordan Bobic
@ 2013-09-04 18:00 ` Konrad Rzeszutek Wilk
0 siblings, 0 replies; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-04 18:00 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Wed, Sep 04, 2013 at 03:23:40PM +0100, Gordan Bobic wrote:
> On Wed, 4 Sep 2013 10:08:37 -0400, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
> >On Wed, Sep 04, 2013 at 01:18:39AM +0100, Gordan Bobic wrote:
> >>On 09/03/2013 10:30 PM, Konrad Rzeszutek Wilk wrote:
> >>>On Tue, Sep 03, 2013 at 10:24:44PM +0100, Gordan Bobic wrote:
> >>>>On 09/03/2013 10:10 PM, Konrad Rzeszutek Wilk wrote:
> >>>>>On Tue, Sep 03, 2013 at 09:49:40PM +0100, Gordan Bobic wrote:
> >>>>>>I spoke too soon - even with e820_host=0, the same error occurs.
> >>>>>>What did I break? The code in question is this:
> >>>>>>
> >>>>>>if (libxl_defbool_val(d_config->b_info.e820_host)) {
> >>>>>> ret = libxl__e820_alloc(gc, domid, d_config);
> >>>>>> if (ret) {
> >>>>>> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
> >>>>>> "Failed while collecting E820 with: %d
> >>(errno:%d)\n",
> >>>>>> ret, errno);
> >>>>>> }
> >>>>>>}
> >>>>>>
> >>>>>>With e820_host=0, that outer black should evaluate to false,
> >>should
> >>>>>>it not? In libxl_create.c, if I am understanding the code
> >>correctly,
> >>>>>>e820_host is defaulted to false, too. What am I missing?
> >>>
> >>>Does your config have 'pci' in it? The patch you sent had this:
> >>>
> >>>+ if (d_config->num_pcidevs)
> >>>+ libxl_defbool_set(&b_info->e820_host, true);
> >>>
> >>>Which means that even if you did not have e820_host it will be
> >>automatically
> >>>set if you have PCI devices.
> >>
> >>OK - that was embarrasing. Caffeine underflow error. :(
> >>I backed out that block. I don't think e820_host should be implicit
> >>in hvm when PCI devices are passed.
> >>
> >>That makes the adjusted patch fragment:
> >>--- xl_cmdimpl.c.orig 2013-09-04 00:42:57.424337503 +0100
> >>+++ xl_cmdimpl.c 2013-09-04 00:43:21.213886356 +0100
> >>@@ -1293,7 +1293,7 @@
> >> d_config->num_pcidevs++;
> >> }
> >> if (d_config->num_pcidevs && c_info->type ==
> >>LIBXL_DOMAIN_TYPE_PV)
> >
> >I think you also want to get rid of the c_info->type check?
>
> That would alter the current PV behaviour of implicitly
> enabling e820_host with PCI devices passed, would it not?
> I was hoping to maintain current behaviours intact, and
> only affect what happens when e820_host=1 is set for HVMs.
>
> >>- libxl_defbool_set(&b_info->u.pv.e820_host, true);
> >>+ libxl_defbool_set(&b_info->e820_host, true);
> >> }
> >>
> >> switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
> >>
> >>
> >>This should maintain the old behaviour for backward compatibility
> >>when e820_host is not set. I just tested it and it works (with
> >>e820_host=1 I get the previous error, with e820_host=0, everything
> >>works fine.
> >
> >I think it might make sense to relax the PV check. That way the only
> >way e820_host capability gets activated is if a the guest config
> >has pci=X stanze. But perhaps that _and_ e820_host=1 is what should
> >be done.
>
> While I think these two checks should be separate in both cases,
> I don't know that this won't break something for PV instances. And
> I would prefer to not have to also debug that code path at this
> point. :)
OK.
>
> >Or maybe a negative check - if 'pci' stanze is there we automatically
> >turn on e820_host=1 (right now that is how it works). If the user
> >has thought 'e820_host=0' and 'pci=xxx' then we would turn the E820
> >off? That way if something is odd we can turn this off?
>
> I am not disagreeing at all - I just really don't want to change
> the current PV behaviour since that will potentially require
> extra debugging. Current PV behaviour seems to be that that if
> PCI devices are passed, e820_host=1 is always set regardless
> of whether it is explicitly enabled or disabled in the config.
Right.
>
> And I have no idea what will happen with a PV domain with
> PCI devices if e820_host=1 is disabled.
It will boot - but if you are have more than 2GB the PCI devices
will most likely not work.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-04 13:11 ` Gordan Bobic
@ 2013-09-04 20:18 ` Gordan Bobic
2013-09-05 2:04 ` Konrad Rzeszutek Wilk
1 sibling, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-04 20:18 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
[-- Attachment #1: Type: text/plain, Size: 1705 bytes --]
OK, I have done some preliminary testing. Details below.
On 09/04/2013 02:11 PM, Gordan Bobic wrote:
> I have this at the point where it actually builds.
> Otherwise completely untested (will do that later today).
>
> Attached are:
>
> 1) libxl patch
> Modified from the original patch to _not_ implicitly enable
> e820_host when PCI devices are passed.
Builds, works with e820_host=0.
> 2) Mukesh's hypervisor e820 patch from here:
> http://lists.xen.org/archives/html/xen-devel/2013-05/msg01603.html
> Modified slightly to attempt to address Jan's comment on the same
> thread, and to adjust the diff line pointers to match against
> 4.3.0 release code.
Builds, works with e820_host=0.
> 3) A patch based on Konrad's earlier in this thread, with
> a few additions and changes to make it all compile.
Causes the domU to fail to start. No obvious errors in any logs, but the
qemu-dm log simply stops before the usual point. There is blank white
screen on VNC console. It looks like domU crashes before it even starts
loading the OS.
I have attached two qemu-dm logs:
qemu-dm-edi.log - without patch 3
qemu-dm-edi.log.2 - with patch 3
I also attached the output of xl dmesg in each case.
With the 3rd patch applied, everything seems to stop just as the
hypervisor is about to log the E820 table for HVM1 (obvious if you diff
them).
This may be related to what I did to get your patch to build, Konrad.
The map never gets output, so either rc=-ENOSYS, or it crashes during
the hypercall.
With e820_host=0, the e820 map should be exactly the same as it would
have been anyway, but something seems to go wrong during:
rc = hypercall_memory_op ( XENMEM_memory_map, &op);
Thoughts?
Gordan
[-- Attachment #2: qemu-dm-edi.log --]
[-- Type: text/plain, Size: 7622 bytes --]
domid: 1
Using file /dev/zvol/ssd/edi in read-write mode
Watching /local/domain/0/device-model/1/logdirty/cmd
Watching /local/domain/0/device-model/1/command
Watching /local/domain/1/cpu
char device redirected to /dev/pts/3
qemu_map_cache_init nr_buckets = 10000 size 4194304
shared page at pfn feffd
buffered io page at pfn feffb
Guest uuid = a57e6840-e9f5-4a14-a822-b2cc662c177f
populating video RAM at ff000000
mapping video RAM from ff000000
Register xen platform.
Done register platform.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
xs_read(/local/domain/0/device-model/1/xen_extended_power_mgmt): read error
xs_read(): vncpasswd get error. /vm/a57e6840-e9f5-4a14-a822-b2cc662c177f/vncpasswd.
Log-dirty: no command yet.
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
vcpu-set: watch node error.
[xenstore_process_vcpu_set_event]: /local/domain/1/cpu has no CPU!
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
xs_read(/local/domain/1/log-throttling): read error
qemu: ignoring not-understood drive `/local/domain/1/log-throttling'
medium change watch on `/local/domain/1/log-throttling' - unknown device, ignored
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.0 ...
register_real_device: Disable MSI translation via per device option
register_real_device: Enable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x0
pt_register_regions: IO region registered (size=0x02000000 base_addr=0xf8000000)
pt_register_regions: IO region registered (size=0x08000000 base_addr=0xb800000c)
pt_register_regions: IO region registered (size=0x04000000 base_addr=0xb400000c)
pt_register_regions: IO region registered (size=0x00000080 base_addr=0x0000cf81)
pt_register_regions: Expansion ROM registered (size=0x00080000 base_addr=0xfbc00000)
pci_intx: intx=1
register_real_device: Real physical device 08:00.0 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 08:00.1 ...
register_real_device: Disable MSI translation via per device option
register_real_device: Enable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x8:0x0.0x1
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xfbcfc000)
pci_intx: intx=2
register_real_device: Real physical device 08:00.1 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 0c:00.0 ...
register_real_device: Disable MSI translation via per device option
register_real_device: Enable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0xc:0x0.0x0
pt_register_regions: IO region registered (size=0x00004000 base_addr=0xd7efc000)
pci_intx: intx=1
register_real_device: Real physical device 0c:00.0 registered successfuly!
IRQ type = INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 00:1a.1 ...
register_real_device: Disable MSI translation via per device option
register_real_device: Enable power management
pt_iomul_init: Error: pt_iomul_init can't open file /dev/xen/pci_iomul: No such file or directory: 0x0:0x1a.0x1
pt_register_regions: IO region registered (size=0x00000020 base_addr=0x00008a01)
pci_intx: intx=2
register_real_device: Real physical device 00:1a.1 registered successfuly!
IRQ type = INTx
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=1
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=1
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=1
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=1
pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=1
pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=1
pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=1
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw state.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro state.
Unknown PV product 2 loaded in guest
PV driver build 1
region type 0 at [ef880000,ef8a0000).
squash iomem [ef880000, ef8a0000).
region type 1 at [c180,c1c0).
vga s->lfb_addr = ef000000 s->lfb_end = ef800000
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=cf80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:06:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_pci_write_config: [00:07:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=8a00 len=32 index=4 first_map=0
pt_pci_write_config: [00:08:0] Warning: Guest attempt to set address to unused Base Address Register. [Offset:30h][Length:4]
pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=ffff pio_base=cf80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ec000000 maddr=f8000000 type=0 len=33554432 index=0 first_map=0
pt_iomem_map: e_phys=e0000000 maddr=b8000000 type=8 len=134217728 index=1 first_map=0
pt_iomem_map: e_phys=e8000000 maddr=b4000000 type=8 len=67108864 index=3 first_map=0
pt_ioport_map: e_phys=c100 pio_base=cf80 len=128 index=5 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a0000 maddr=fbcfc000 type=0 len=16384 index=0 first_map=0
pt_ioport_map: e_phys=ffff pio_base=8a00 len=32 index=4 first_map=0
pt_ioport_map: e_phys=c1e0 pio_base=8a00 len=32 index=4 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=d7efc000 type=0 len=16384 index=0 first_map=0
pt_iomem_map: e_phys=ef8a4000 maddr=d7efc000 type=0 len=16384 index=0 first_map=0
[-- Attachment #3: qemu-dm-edi.log.2 --]
[-- Type: application/x-troff-man, Size: 4651 bytes --]
[-- Attachment #4: dmesg.2.log --]
[-- Type: text/plain, Size: 23056 bytes --]
__ __ _ _ _____ ___ __ _ __
\ \/ /___ _ __ | || | |___ / / _ \ / /_ ___| |/ /_
\ // _ \ '_ \ | || |_ |_ \| | | |__| '_ \ / _ \ | '_ \
/ \ __/ | | | |__ _| ___) | |_| |__| (_) | __/ | (_) |
/_/\_\___|_| |_| |_|(_)____(_)___/ \___(_)___|_|\___/
(XEN) Xen version 4.3.0 (root@shatteredsilicon.net) (gcc (GCC) 4.4.7 20120313 (Red Hat 4.4.7-3)) debug=n Wed Sep 4 20:45:33 BST 2013
(XEN) Latest ChangeSet:
(XEN) Bootloader: GNU GRUB 0.97
(XEN) Command line: noreboot dom0_vcpus_pin iommu=1 loglvl=all guest_loglvl=all unrestricted_guest=1 msi=1
(XEN) Video information:
(XEN) VGA is text mode 80x25, font 8x16
(XEN) VBE/DDC methods: V2; EDID transfer time: 1 seconds
(XEN) Disc information:
(XEN) Found 2 MBR signatures
(XEN) Found 2 EDD information structures
(XEN) Xen-e820 RAM map:
(XEN) 0000000000000000 - 000000000009d000 (usable)
(XEN) 000000000009d000 - 00000000000a0000 (reserved)
(XEN) 00000000000e0000 - 0000000000100000 (reserved)
(XEN) 0000000000100000 - 000000003f790000 (usable)
(XEN) 000000003f790000 - 000000003f79e000 (ACPI data)
(XEN) 000000003f79e000 - 000000003f7d0000 (ACPI NVS)
(XEN) 000000003f7d0000 - 000000003f7e0000 (reserved)
(XEN) 000000003f7e7000 - 0000000040000000 (reserved)
(XEN) 00000000fee00000 - 00000000fee01000 (reserved)
(XEN) 00000000ffc00000 - 0000000100000000 (reserved)
(XEN) 0000000100000000 - 0000000cc0000000 (usable)
(XEN) ACPI: RSDP 000F9F70, 0024 (r2 ACPIAM)
(XEN) ACPI: XSDT 3F790100, 0064 (r1 042413 XSDT1438 20130424 MSFT 97)
(XEN) ACPI: FACP 3F790290, 00F4 (r4 042413 FACP1438 20130424 MSFT 97)
(XEN) ACPI: DSDT 3F7904F0, 58A3 (r2 1W555 1W555A58 A58 INTL 20051117)
(XEN) ACPI: FACS 3F79E000, 0040
(XEN) ACPI: APIC 3F790390, 0118 (r2 042413 APIC1438 20130424 MSFT 97)
(XEN) ACPI: MCFG 3F7904B0, 003C (r1 042413 OEMMCFG 20130424 MSFT 97)
(XEN) ACPI: OEMB 3F79E040, 0082 (r1 042413 OEMB1438 20130424 MSFT 97)
(XEN) ACPI: SRAT 3F79A4F0, 0250 (r2 042413 OEMSRAT 1 INTL 1)
(XEN) ACPI: HPET 3F79A740, 0038 (r1 042413 OEMHPET 20130424 MSFT 97)
(XEN) ACPI: DMAR 3F79E0D0, 0128 (r1 AMI OEMDMAR 1 MSFT 97)
(XEN) ACPI: SSDT 3F7A4C80, 0363 (r1 DpgPmm CpuPm 12 INTL 20051117)
(XEN) System RAM: 49143MB (50322612kB)
(XEN) SRAT: PXM 0 -> APIC 0 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 2 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 4 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 16 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 18 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 20 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 1 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 3 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 5 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 17 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 19 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 21 -> Node 0
(XEN) SRAT: PXM 1 -> APIC 32 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 34 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 36 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 48 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 50 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 52 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 33 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 35 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 37 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 49 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 51 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 53 -> Node 1
(XEN) SRAT: Node 0 PXM 0 0-a0000
(XEN) SRAT: Node 0 PXM 0 100000-40000000
(XEN) SRAT: Node 0 PXM 0 100000000-6c0000000
(XEN) SRAT: Node 1 PXM 1 6c0000000-cc0000000
(XEN) NUMA: Allocated memnodemap from cbab5f000 - cbab6c000
(XEN) NUMA: Using 8 for the hash shift.
(XEN) Domain heap initialised DMA width 32 bits
(XEN) found SMP MP-table at 000ff780
(XEN) DMI present.
(XEN) Using APIC driver default
(XEN) ACPI: PM-Timer IO Port: 0x808
(XEN) ACPI: SLEEP INFO: pm1x_cnt[804,0], pm1x_evt[800,0]
(XEN) ACPI: wakeup_vec[3f79e00c], vec_size[20]
(XEN) ACPI: Local APIC address 0xfee00000
(XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
(XEN) Processor #0 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
(XEN) Processor #2 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)
(XEN) Processor #4 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x10] enabled)
(XEN) Processor #16 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x12] enabled)
(XEN) Processor #18 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x14] enabled)
(XEN) Processor #20 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x07] lapic_id[0x20] enabled)
(XEN) Processor #32 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x08] lapic_id[0x22] enabled)
(XEN) Processor #34 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x09] lapic_id[0x24] enabled)
(XEN) Processor #36 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x30] enabled)
(XEN) Processor #48 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x32] enabled)
(XEN) Processor #50 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x34] enabled)
(XEN) Processor #52 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x01] enabled)
(XEN) Processor #1 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x03] enabled)
(XEN) Processor #3 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0f] lapic_id[0x05] enabled)
(XEN) Processor #5 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x10] lapic_id[0x11] enabled)
(XEN) Processor #17 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x11] lapic_id[0x13] enabled)
(XEN) Processor #19 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x12] lapic_id[0x15] enabled)
(XEN) Processor #21 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x13] lapic_id[0x21] enabled)
(XEN) Processor #33 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x14] lapic_id[0x23] enabled)
(XEN) Processor #35 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x15] lapic_id[0x25] enabled)
(XEN) Processor #37 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x16] lapic_id[0x31] enabled)
(XEN) Processor #49 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x17] lapic_id[0x33] enabled)
(XEN) Processor #51 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x18] lapic_id[0x35] enabled)
(XEN) Processor #53 6:12 APIC version 21
(XEN) Overriding APIC driver with bigsmp
(XEN) ACPI: IOAPIC (id[0x06] address[0xfec00000] gsi_base[0])
(XEN) IOAPIC[0]: apic_id 6, version 32, address 0xfec00000, GSI 0-23
(XEN) ACPI: IOAPIC (id[0x07] address[0xfec8a000] gsi_base[24])
(XEN) IOAPIC[1]: apic_id 7, version 32, address 0xfec8a000, GSI 24-47
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
(XEN) ACPI: IRQ0 used by override.
(XEN) ACPI: IRQ2 used by override.
(XEN) ACPI: IRQ9 used by override.
(XEN) Enabling APIC mode: Phys. Using 2 I/O APICs
(XEN) ACPI: HPET id: 0xffffffff base: 0xfed00000
(XEN) ERST table was not found
(XEN) Using ACPI (MADT) for SMP configuration information
(XEN) SMP: Allowing 24 CPUs (0 hotplug CPUs)
(XEN) IRQ limits: 48 GSI, 4576 MSI/MSI-X
(XEN) Using scheduler: SMP Credit Scheduler (credit)
(XEN) Detected 3321.752 MHz processor.
(XEN) Initing memory sharing.
(XEN) mce_intel.c:717: MCA Capability: BCAST 1 SER 0 CMCI 1 firstbank 0 extended MCE MSR 0
(XEN) Intel machine check reporting enabled
(XEN) PCI: MCFG configuration 0: base e0000000 segment 0000 buses 00 - ff
(XEN) PCI: Not using MCFG for segment 0000 bus 00-ff
(XEN) Intel VT-d iommu 0 supported page sizes: 4kB.
(XEN) Intel VT-d Snoop Control enabled.
(XEN) Intel VT-d Dom0 DMA Passthrough not enabled.
(XEN) Intel VT-d Queued Invalidation enabled.
(XEN) Intel VT-d Interrupt Remapping not enabled.
(XEN) Intel VT-d Shared EPT tables not enabled.
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping disabled
(XEN) Enabled directed EOI with ioapic_ack_old on!
(XEN) ENABLING IO-APIC IRQs
(XEN) -> Using old ACK method
(XEN) ..TIMER: vector=0xF0 apic1=0 pin1=2 apic2=-1 pin2=-1
(XEN) Platform timer is 14.318MHz HPET
(XEN) Defaulting to alternative key handling; send 'A' to switch to normal mode.
(XEN) Allocated console ring of 256 KiB.
(XEN) mwait-idle: MWAIT substates: 0x1120
(XEN) mwait-idle: v0.4 model 0x2c
(XEN) mwait-idle: lapic_timer_reliable_states 0xffffffff
(XEN) VMX: Supported advanced features:
(XEN) - APIC MMIO access virtualisation
(XEN) - APIC TPR shadow
(XEN) - Extended Page Tables (EPT)
(XEN) - Virtual-Processor Identifiers (VPID)
(XEN) - Virtual NMI
(XEN) - MSR direct-access bitmap
(XEN) - Unrestricted Guest
(XEN) HVM: ASIDs enabled.
(XEN) HVM: VMX enabled
(XEN) HVM: Hardware Assisted Paging (HAP) detected
(XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
(XEN) Brought up 24 CPUs
(XEN) ACPI sleep modes: S3
(XEN) mcheck_poll: Machine check polling timer started.
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Xen kernel: 64-bit, lsb, compat32
(XEN) Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x1f70000
(XEN) PHYSICAL MEMORY ARRANGEMENT:
(XEN) Dom0 alloc.: 0000000420000000->0000000430000000 (12301846 pages to be allocated)
(XEN) Init. ramdisk: 0000000cbbd05000->0000000cbffffa00
(XEN) VIRTUAL MEMORY ARRANGEMENT:
(XEN) Loaded kernel: ffffffff81000000->ffffffff81f70000
(XEN) Init. ramdisk: ffffffff81f70000->ffffffff8626aa00
(XEN) Phys-Mach map: ffffffff8626b000->ffffffff8c0e7888
(XEN) Start info: ffffffff8c0e8000->ffffffff8c0e84b4
(XEN) Page tables: ffffffff8c0e9000->ffffffff8c14e000
(XEN) Boot stack: ffffffff8c14e000->ffffffff8c14f000
(XEN) TOTAL: ffffffff80000000->ffffffff8c400000
(XEN) ENTRY ADDRESS: ffffffff818091e0
(XEN) Dom0 has maximum 24 VCPUs
(XEN) Scrubbing Free RAM: .done.
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: All
(XEN) Guest Loglevel: All
(XEN) Xen is relinquishing VGA console.
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 272kB init memory.
(XEN) PCI add device 0000:00:00.0
(XEN) PCI add device 0000:00:01.0
(XEN) PCI add device 0000:00:02.0
(XEN) PCI add device 0000:00:03.0
(XEN) PCI add device 0000:00:07.0
(XEN) PCI add device 0000:00:13.0
(XEN) PCI add device 0000:00:14.0
(XEN) PCI add device 0000:00:14.1
(XEN) PCI add device 0000:00:14.2
(XEN) PCI add device 0000:00:14.3
(XEN) PCI add device 0000:00:1a.0
(XEN) PCI add device 0000:00:1a.1
(XEN) PCI add device 0000:00:1a.2
(XEN) PCI add device 0000:00:1a.7
(XEN) PCI add device 0000:00:1b.0
(XEN) PCI add device 0000:00:1c.0
(XEN) PCI add device 0000:00:1c.2
(XEN) PCI add device 0000:00:1c.4
(XEN) PCI add device 0000:00:1d.0
(XEN) PCI add device 0000:00:1d.1
(XEN) PCI add device 0000:00:1d.2
(XEN) PCI add device 0000:00:1d.7
(XEN) PCI add device 0000:00:1e.0
(XEN) PCI add device 0000:00:1f.0
(XEN) PCI add device 0000:00:1f.2
(XEN) PCI add device 0000:00:1f.3
(XEN) PCI add device 0000:10:00.0
(XEN) PCI add device 0000:10:00.1
(XEN) PCI add device 0000:0f:00.0
(XEN) PCI add device 0000:09:00.0
(XEN) PCI add device 0000:0a:00.0
(XEN) PCI add device 0000:0a:02.0
(XEN) PCI add device 0000:0a:03.0
(XEN) PCI add device 0000:0e:00.0
(XEN) PCI add device 0000:0e:00.1
(XEN) PCI add device 0000:0b:00.0
(XEN) PCI add device 0000:0c:00.0
(XEN) PCI add device 0000:05:00.0
(XEN) PCI add device 0000:06:00.0
(XEN) PCI add device 0000:06:02.0
(XEN) PCI add device 0000:08:00.0
(XEN) PCI add device 0000:08:00.1
(XEN) PCI add device 0000:07:00.0
(XEN) PCI add device 0000:07:00.1
(XEN) PCI add device 0000:03:00.0
(XEN) PCI add device 0000:02:00.0
(XEN) PCI add device 0000:fe:00.0
(XEN) PCI add device 0000:fe:00.1
(XEN) PCI add device 0000:fe:02.0
(XEN) PCI add device 0000:fe:02.1
(XEN) PCI add device 0000:fe:02.2
(XEN) PCI add device 0000:fe:02.3
(XEN) PCI add device 0000:fe:02.4
(XEN) PCI add device 0000:fe:02.5
(XEN) PCI add device 0000:fe:03.0
(XEN) PCI add device 0000:fe:03.1
(XEN) PCI add device 0000:fe:03.2
(XEN) PCI add device 0000:fe:03.4
(XEN) PCI add device 0000:fe:04.0
(XEN) PCI add device 0000:fe:04.1
(XEN) PCI add device 0000:fe:04.2
(XEN) PCI add device 0000:fe:04.3
(XEN) PCI add device 0000:fe:05.0
(XEN) PCI add device 0000:fe:05.1
(XEN) PCI add device 0000:fe:05.2
(XEN) PCI add device 0000:fe:05.3
(XEN) PCI add device 0000:fe:06.0
(XEN) PCI add device 0000:fe:06.1
(XEN) PCI add device 0000:fe:06.2
(XEN) PCI add device 0000:fe:06.3
(XEN) PCI add device 0000:ff:00.0
(XEN) PCI add device 0000:ff:00.1
(XEN) PCI add device 0000:ff:02.0
(XEN) PCI add device 0000:ff:02.1
(XEN) PCI add device 0000:ff:02.2
(XEN) PCI add device 0000:ff:02.3
(XEN) PCI add device 0000:ff:02.4
(XEN) PCI add device 0000:ff:02.5
(XEN) PCI add device 0000:ff:03.0
(XEN) PCI add device 0000:ff:03.1
(XEN) PCI add device 0000:ff:03.2
(XEN) PCI add device 0000:ff:03.4
(XEN) PCI add device 0000:ff:04.0
(XEN) PCI add device 0000:ff:04.1
(XEN) PCI add device 0000:ff:04.2
(XEN) PCI add device 0000:ff:04.3
(XEN) PCI add device 0000:ff:05.0
(XEN) PCI add device 0000:ff:05.1
(XEN) PCI add device 0000:ff:05.2
(XEN) PCI add device 0000:ff:05.3
(XEN) PCI add device 0000:ff:06.0
(XEN) PCI add device 0000:ff:06.1
(XEN) PCI add device 0000:ff:06.2
(XEN) PCI add device 0000:ff:06.3
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) memory.c:132:d0 Could not allocate order=18 extent: id=1 memflags=0 (0 of 1)
(XEN) HVM1: HVM Loader
(XEN) HVM1: Detected Xen v4.3.0
(XEN) HVM1: Xenbus rings @0xfeffc000, event channel 10
(XEN) HVM1: System requested ROMBIOS
(XEN) HVM1: CPU speed is 3322 MHz
(XEN) HVM1: Relocating guest memory for lowmem MMIO space enabled
(XEN) irq.c:270: Dom1 PCI link 0 changed 0 -> 5
(XEN) HVM1: PCI-ISA link 0 routed to IRQ5
(XEN) irq.c:270: Dom1 PCI link 1 changed 0 -> 10
(XEN) HVM1: PCI-ISA link 1 routed to IRQ10
(XEN) irq.c:270: Dom1 PCI link 2 changed 0 -> 11
(XEN) HVM1: PCI-ISA link 2 routed to IRQ11
(XEN) irq.c:270: Dom1 PCI link 3 changed 0 -> 5
(XEN) HVM1: PCI-ISA link 3 routed to IRQ5
(XEN) HVM1: pci dev 01:2 INTD->IRQ5
(XEN) HVM1: pci dev 01:3 INTA->IRQ10
(XEN) HVM1: pci dev 03:0 INTA->IRQ5
(XEN) HVM1: pci dev 04:0 INTA->IRQ5
(XEN) HVM1: pci dev 05:0 INTA->IRQ10
(XEN) HVM1: pci dev 06:0 INTB->IRQ5
(XEN) HVM1: pci dev 07:0 INTA->IRQ5
(XEN) HVM1: pci dev 08:0 INTB->IRQ10
(XEN) HVM1: No RAM in high memory; setting high_mem resource base to 100000000
(XEN) HVM1: pci dev 05:0 bar 14 size 008000000: 0e000000c
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) HVM1: pci dev 05:0 bar 1c size 004000000: 0e800000c
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) HVM1: pci dev 05:0 bar 10 size 002000000: 0ec000000
(XEN) HVM1: pci dev 03:0 bar 14 size 001000000: 0ee000008
(XEN) HVM1: pci dev 02:0 bar 10 size 000800000: 0ef000008
(XEN) HVM1: pci dev 05:0 bar 30 size 000080000: 0ef800000
(XEN) HVM1: pci dev 04:0 bar 10 size 000020000: 0ef880000
(XEN) HVM1: pci dev 06:0 bar 10 size 000004000: 0ef8a0000
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=fbcfc nr=4
(XEN) HVM1: pci dev 07:0 bar 10 size 000004000: 0ef8a4000
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=d7efc nr=4
(XEN) HVM1: pci dev 03:0 bar 10 size 000000100: 00000c001
(XEN) HVM1: pci dev 05:0 bar 24 size 000000080: 00000c101
(XEN) ioport_map:add: dom1 gport=c100 mport=cf80 nr=80
(XEN) HVM1: pci dev 04:0 bar 14 size 000000040: 00000c181
(XEN) HVM1: pci dev 01:2 bar 20 size 000000020: 00000c1c1
(XEN) HVM1: pci dev 08:0 bar 20 size 000000020: 00000c1e1
(XEN) ioport_map:add: dom1 gport=c1e0 mport=8a00 nr=20
(XEN) HVM1: pci dev 01:1 bar 20 size 000000010: 00000c201
(XEN) HVM1: Multiprocessor initialisation:
(XEN) HVM1: - CPU0 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU1 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU2 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU3 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU4 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU5 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU6 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU7 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: Testing HVM environment:
(XEN) HVM1: - REP INSB across page boundaries ... passed
(XEN) HVM1: - GS base MSRs and SWAPGS ... passed
(XEN) HVM1: Passed 2 of 2 tests
(XEN) HVM1: Writing SMBIOS tables ...
(XEN) HVM1: Loading ROMBIOS ...
(XEN) HVM1: 9628 bytes of ROMBIOS high-memory extensions:
(XEN) HVM1: Relocating to 0xfc001000-0xfc00359c ... done
(XEN) HVM1: Creating MP tables ...
(XEN) HVM1: Loading Standard VGABIOS ...
(XEN) HVM1: Loading PCI Option ROM ...
(XEN) HVM1: - Manufacturer: http://ipxe.org
(XEN) HVM1: - Product name: iPXE
(XEN) HVM1: Option ROMs:
(XEN) HVM1: c0000-c9fff: VGA BIOS
(XEN) HVM1: ca000-dafff: Etherboot ROM
(XEN) HVM1: Loading ACPI ...
(XEN) HVM1: vm86 TSS at fc00f700
(XEN) HVM1: BIOS map:
(XEN) HVM1: f0000-fffff: Main BIOS
(XEN) HVM1: E820 table:
(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
(XEN) HVM1: Invoking ROMBIOS ...
(XEN) HVM1: $Revision: 1.221 $ $Date: 2008/12/07 17:32:29 $
(XEN) stdvga.c:147:d1 entering stdvga and caching modes
(XEN) HVM1: VGABios $Id: vgabios.c,v 1.67 2008/01/27 09:44:12 vruppert Exp $
(XEN) HVM1: VBE Bios $Id: vbe.c,v 1.60 2008/03/02 07:47:21 vruppert Exp $
(XEN) HVM1: Bochs BIOS - build: 06/23/99
(XEN) HVM1: $Revision: 1.221 $ $Date: 2008/12/07 17:32:29 $
(XEN) HVM1: Options: apmbios pcibios eltorito PMM
(XEN) HVM1:
(XEN) HVM1: ata0-0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63
(XEN) HVM1: ata0 master: QEMU HARDDISK ATA-7 Hard-Disk ( 64 GBytes)
(XEN) HVM1: IDE time out
(XEN) HVM1:
(XEN) HVM1:
(XEN) HVM1:
(XEN) HVM1: Press F12 for boot menu.
(XEN) HVM1:
(XEN) HVM1: Booting from Hard Disk...
(XEN) HVM1: Booting from 0000:7c00
(XEN) HVM1: int13_harddisk: function 15, unmapped device for ELDL=81
(XEN) HVM1: *** int 15h function AX=e980, BX=0066 not yet supported!
(XEN) HVM1: *** int 15h function AX=ec00, BX=0002 not yet supported!
(XEN) irq.c:270: Dom1 PCI link 0 changed 5 -> 0
(XEN) irq.c:270: Dom1 PCI link 1 changed 10 -> 0
(XEN) irq.c:270: Dom1 PCI link 2 changed 11 -> 0
(XEN) irq.c:270: Dom1 PCI link 3 changed 5 -> 0
(XEN) memory_map:remove: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom1 gport=c100 mport=cf80 nr=80
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom1 gport=c100 mport=cf80 nr=80
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=fbcfc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=fbcfc nr=4
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=d7efc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=d7efc nr=4
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=8a00 nr=20
(XEN) ioport_map:add: dom1 gport=c1e0 mport=8a00 nr=20
(XEN) grant_table.c:1250:d1 Expanding dom (1) grant table from (4) to (32) frames.
(XEN) irq.c:375: Dom1 callback via changed to GSI 28
(XEN) memory_map:remove: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:remove: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:remove: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:remove: dom1 gport=c100 mport=cf80 nr=80
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) ioport_map:add: dom1 gport=c100 mport=cf80 nr=80
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=fbcfc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=fbcfc nr=4
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=8a00 nr=20
(XEN) ioport_map:add: dom1 gport=c1e0 mport=8a00 nr=20
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=d7efc nr=4
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=d7efc nr=4
(XEN) memory_map:remove: dom1 gfn=ef8a0 mfn=fbcfc nr=4
(XEN) memory_map:remove: dom1 gfn=ef8a4 mfn=d7efc nr=4
(XEN) ioport_map:remove: dom1 gport=c1e0 mport=8a00 nr=20
[-- Attachment #5: dmesg.log --]
[-- Type: text/plain, Size: 19533 bytes --]
__ __ _ _ _____ ___ ____ _ __
\ \/ /___ _ __ | || | |___ / / _ \ | ___| ___| |/ /_
\ // _ \ '_ \ | || |_ |_ \| | | |_|___ \ / _ \ | '_ \
/ \ __/ | | | |__ _| ___) | |_| |__|__) | __/ | (_) |
/_/\_\___|_| |_| |_|(_)____(_)___/ |____(_)___|_|\___/
(XEN) Xen version 4.3.0 (root@shatteredsilicon.net) (gcc (GCC) 4.4.7 20120313 (Red Hat 4.4.7-3)) debug=n Wed Sep 4 14:17:13 BST 2013
(XEN) Latest ChangeSet:
(XEN) Bootloader: GNU GRUB 0.97
(XEN) Command line: noreboot dom0_vcpus_pin iommu=1 loglvl=all guest_loglvl=all unrestricted_guest=1 msi=1
(XEN) Video information:
(XEN) VGA is text mode 80x25, font 8x16
(XEN) VBE/DDC methods: V2; EDID transfer time: 1 seconds
(XEN) Disc information:
(XEN) Found 2 MBR signatures
(XEN) Found 2 EDD information structures
(XEN) Xen-e820 RAM map:
(XEN) 0000000000000000 - 000000000009d000 (usable)
(XEN) 000000000009d000 - 00000000000a0000 (reserved)
(XEN) 00000000000e0000 - 0000000000100000 (reserved)
(XEN) 0000000000100000 - 000000003f790000 (usable)
(XEN) 000000003f790000 - 000000003f79e000 (ACPI data)
(XEN) 000000003f79e000 - 000000003f7d0000 (ACPI NVS)
(XEN) 000000003f7d0000 - 000000003f7e0000 (reserved)
(XEN) 000000003f7e7000 - 0000000040000000 (reserved)
(XEN) 00000000fee00000 - 00000000fee01000 (reserved)
(XEN) 00000000ffc00000 - 0000000100000000 (reserved)
(XEN) 0000000100000000 - 0000000cc0000000 (usable)
(XEN) ACPI: RSDP 000F9F70, 0024 (r2 ACPIAM)
(XEN) ACPI: XSDT 3F790100, 0064 (r1 042413 XSDT1438 20130424 MSFT 97)
(XEN) ACPI: FACP 3F790290, 00F4 (r4 042413 FACP1438 20130424 MSFT 97)
(XEN) ACPI: DSDT 3F7904F0, 58A3 (r2 1W555 1W555A58 A58 INTL 20051117)
(XEN) ACPI: FACS 3F79E000, 0040
(XEN) ACPI: APIC 3F790390, 0118 (r2 042413 APIC1438 20130424 MSFT 97)
(XEN) ACPI: MCFG 3F7904B0, 003C (r1 042413 OEMMCFG 20130424 MSFT 97)
(XEN) ACPI: OEMB 3F79E040, 0082 (r1 042413 OEMB1438 20130424 MSFT 97)
(XEN) ACPI: SRAT 3F79A4F0, 0250 (r2 042413 OEMSRAT 1 INTL 1)
(XEN) ACPI: HPET 3F79A740, 0038 (r1 042413 OEMHPET 20130424 MSFT 97)
(XEN) ACPI: DMAR 3F79E0D0, 0128 (r1 AMI OEMDMAR 1 MSFT 97)
(XEN) ACPI: SSDT 3F7A4C80, 0363 (r1 DpgPmm CpuPm 12 INTL 20051117)
(XEN) System RAM: 49143MB (50322612kB)
(XEN) SRAT: PXM 0 -> APIC 0 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 2 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 4 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 16 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 18 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 20 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 1 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 3 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 5 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 17 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 19 -> Node 0
(XEN) SRAT: PXM 0 -> APIC 21 -> Node 0
(XEN) SRAT: PXM 1 -> APIC 32 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 34 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 36 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 48 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 50 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 52 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 33 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 35 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 37 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 49 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 51 -> Node 1
(XEN) SRAT: PXM 1 -> APIC 53 -> Node 1
(XEN) SRAT: Node 0 PXM 0 0-a0000
(XEN) SRAT: Node 0 PXM 0 100000-40000000
(XEN) SRAT: Node 0 PXM 0 100000000-6c0000000
(XEN) SRAT: Node 1 PXM 1 6c0000000-cc0000000
(XEN) NUMA: Allocated memnodemap from cbab5f000 - cbab6c000
(XEN) NUMA: Using 8 for the hash shift.
(XEN) Domain heap initialised DMA width 32 bits
(XEN) found SMP MP-table at 000ff780
(XEN) DMI present.
(XEN) Using APIC driver default
(XEN) ACPI: PM-Timer IO Port: 0x808
(XEN) ACPI: SLEEP INFO: pm1x_cnt[804,0], pm1x_evt[800,0]
(XEN) ACPI: wakeup_vec[3f79e00c], vec_size[20]
(XEN) ACPI: Local APIC address 0xfee00000
(XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
(XEN) Processor #0 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
(XEN) Processor #2 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)
(XEN) Processor #4 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x10] enabled)
(XEN) Processor #16 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x12] enabled)
(XEN) Processor #18 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x14] enabled)
(XEN) Processor #20 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x07] lapic_id[0x20] enabled)
(XEN) Processor #32 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x08] lapic_id[0x22] enabled)
(XEN) Processor #34 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x09] lapic_id[0x24] enabled)
(XEN) Processor #36 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0a] lapic_id[0x30] enabled)
(XEN) Processor #48 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0b] lapic_id[0x32] enabled)
(XEN) Processor #50 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0c] lapic_id[0x34] enabled)
(XEN) Processor #52 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0d] lapic_id[0x01] enabled)
(XEN) Processor #1 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0e] lapic_id[0x03] enabled)
(XEN) Processor #3 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x0f] lapic_id[0x05] enabled)
(XEN) Processor #5 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x10] lapic_id[0x11] enabled)
(XEN) Processor #17 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x11] lapic_id[0x13] enabled)
(XEN) Processor #19 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x12] lapic_id[0x15] enabled)
(XEN) Processor #21 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x13] lapic_id[0x21] enabled)
(XEN) Processor #33 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x14] lapic_id[0x23] enabled)
(XEN) Processor #35 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x15] lapic_id[0x25] enabled)
(XEN) Processor #37 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x16] lapic_id[0x31] enabled)
(XEN) Processor #49 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x17] lapic_id[0x33] enabled)
(XEN) Processor #51 6:12 APIC version 21
(XEN) ACPI: LAPIC (acpi_id[0x18] lapic_id[0x35] enabled)
(XEN) Processor #53 6:12 APIC version 21
(XEN) Overriding APIC driver with bigsmp
(XEN) ACPI: IOAPIC (id[0x06] address[0xfec00000] gsi_base[0])
(XEN) IOAPIC[0]: apic_id 6, version 32, address 0xfec00000, GSI 0-23
(XEN) ACPI: IOAPIC (id[0x07] address[0xfec8a000] gsi_base[24])
(XEN) IOAPIC[1]: apic_id 7, version 32, address 0xfec8a000, GSI 24-47
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
(XEN) ACPI: IRQ0 used by override.
(XEN) ACPI: IRQ2 used by override.
(XEN) ACPI: IRQ9 used by override.
(XEN) Enabling APIC mode: Phys. Using 2 I/O APICs
(XEN) ACPI: HPET id: 0xffffffff base: 0xfed00000
(XEN) ERST table was not found
(XEN) Using ACPI (MADT) for SMP configuration information
(XEN) SMP: Allowing 24 CPUs (0 hotplug CPUs)
(XEN) IRQ limits: 48 GSI, 4576 MSI/MSI-X
(XEN) Using scheduler: SMP Credit Scheduler (credit)
(XEN) Detected 3321.754 MHz processor.
(XEN) Initing memory sharing.
(XEN) mce_intel.c:717: MCA Capability: BCAST 1 SER 0 CMCI 1 firstbank 0 extended MCE MSR 0
(XEN) Intel machine check reporting enabled
(XEN) PCI: MCFG configuration 0: base e0000000 segment 0000 buses 00 - ff
(XEN) PCI: Not using MCFG for segment 0000 bus 00-ff
(XEN) Intel VT-d iommu 0 supported page sizes: 4kB.
(XEN) Intel VT-d Snoop Control enabled.
(XEN) Intel VT-d Dom0 DMA Passthrough not enabled.
(XEN) Intel VT-d Queued Invalidation enabled.
(XEN) Intel VT-d Interrupt Remapping not enabled.
(XEN) Intel VT-d Shared EPT tables not enabled.
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping disabled
(XEN) Enabled directed EOI with ioapic_ack_old on!
(XEN) ENABLING IO-APIC IRQs
(XEN) -> Using old ACK method
(XEN) ..TIMER: vector=0xF0 apic1=0 pin1=2 apic2=-1 pin2=-1
(XEN) Platform timer is 14.318MHz HPET
(XEN) Defaulting to alternative key handling; send 'A' to switch to normal mode.
(XEN) Allocated console ring of 256 KiB.
(XEN) mwait-idle: MWAIT substates: 0x1120
(XEN) mwait-idle: v0.4 model 0x2c
(XEN) mwait-idle: lapic_timer_reliable_states 0xffffffff
(XEN) VMX: Supported advanced features:
(XEN) - APIC MMIO access virtualisation
(XEN) - APIC TPR shadow
(XEN) - Extended Page Tables (EPT)
(XEN) - Virtual-Processor Identifiers (VPID)
(XEN) - Virtual NMI
(XEN) - MSR direct-access bitmap
(XEN) - Unrestricted Guest
(XEN) HVM: ASIDs enabled.
(XEN) HVM: VMX enabled
(XEN) HVM: Hardware Assisted Paging (HAP) detected
(XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
(XEN) Brought up 24 CPUs
(XEN) ACPI sleep modes: S3
(XEN) mcheck_poll: Machine check polling timer started.
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Xen kernel: 64-bit, lsb, compat32
(XEN) Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x1f70000
(XEN) PHYSICAL MEMORY ARRANGEMENT:
(XEN) Dom0 alloc.: 0000000420000000->0000000430000000 (12301846 pages to be allocated)
(XEN) Init. ramdisk: 0000000cbbd05000->0000000cbffffa00
(XEN) VIRTUAL MEMORY ARRANGEMENT:
(XEN) Loaded kernel: ffffffff81000000->ffffffff81f70000
(XEN) Init. ramdisk: ffffffff81f70000->ffffffff8626aa00
(XEN) Phys-Mach map: ffffffff8626b000->ffffffff8c0e7888
(XEN) Start info: ffffffff8c0e8000->ffffffff8c0e84b4
(XEN) Page tables: ffffffff8c0e9000->ffffffff8c14e000
(XEN) Boot stack: ffffffff8c14e000->ffffffff8c14f000
(XEN) TOTAL: ffffffff80000000->ffffffff8c400000
(XEN) ENTRY ADDRESS: ffffffff818091e0
(XEN) Dom0 has maximum 24 VCPUs
(XEN) Scrubbing Free RAM: .done.
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: All
(XEN) Guest Loglevel: All
(XEN) Xen is relinquishing VGA console.
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 272kB init memory.
(XEN) PCI add device 0000:00:00.0
(XEN) PCI add device 0000:00:01.0
(XEN) PCI add device 0000:00:02.0
(XEN) PCI add device 0000:00:03.0
(XEN) PCI add device 0000:00:07.0
(XEN) PCI add device 0000:00:13.0
(XEN) PCI add device 0000:00:14.0
(XEN) PCI add device 0000:00:14.1
(XEN) PCI add device 0000:00:14.2
(XEN) PCI add device 0000:00:14.3
(XEN) PCI add device 0000:00:1a.0
(XEN) PCI add device 0000:00:1a.1
(XEN) PCI add device 0000:00:1a.2
(XEN) PCI add device 0000:00:1a.7
(XEN) PCI add device 0000:00:1b.0
(XEN) PCI add device 0000:00:1c.0
(XEN) PCI add device 0000:00:1c.2
(XEN) PCI add device 0000:00:1c.4
(XEN) PCI add device 0000:00:1d.0
(XEN) PCI add device 0000:00:1d.1
(XEN) PCI add device 0000:00:1d.2
(XEN) PCI add device 0000:00:1d.7
(XEN) PCI add device 0000:00:1e.0
(XEN) PCI add device 0000:00:1f.0
(XEN) PCI add device 0000:00:1f.2
(XEN) PCI add device 0000:00:1f.3
(XEN) PCI add device 0000:10:00.0
(XEN) PCI add device 0000:10:00.1
(XEN) PCI add device 0000:0f:00.0
(XEN) PCI add device 0000:09:00.0
(XEN) PCI add device 0000:0a:00.0
(XEN) PCI add device 0000:0a:02.0
(XEN) PCI add device 0000:0a:03.0
(XEN) PCI add device 0000:0e:00.0
(XEN) PCI add device 0000:0e:00.1
(XEN) PCI add device 0000:0b:00.0
(XEN) PCI add device 0000:0c:00.0
(XEN) PCI add device 0000:05:00.0
(XEN) PCI add device 0000:06:00.0
(XEN) PCI add device 0000:06:02.0
(XEN) PCI add device 0000:08:00.0
(XEN) PCI add device 0000:08:00.1
(XEN) PCI add device 0000:07:00.0
(XEN) PCI add device 0000:07:00.1
(XEN) PCI add device 0000:03:00.0
(XEN) PCI add device 0000:02:00.0
(XEN) PCI add device 0000:fe:00.0
(XEN) PCI add device 0000:fe:00.1
(XEN) PCI add device 0000:fe:02.0
(XEN) PCI add device 0000:fe:02.1
(XEN) PCI add device 0000:fe:02.2
(XEN) PCI add device 0000:fe:02.3
(XEN) PCI add device 0000:fe:02.4
(XEN) PCI add device 0000:fe:02.5
(XEN) PCI add device 0000:fe:03.0
(XEN) PCI add device 0000:fe:03.1
(XEN) PCI add device 0000:fe:03.2
(XEN) PCI add device 0000:fe:03.4
(XEN) PCI add device 0000:fe:04.0
(XEN) PCI add device 0000:fe:04.1
(XEN) PCI add device 0000:fe:04.2
(XEN) PCI add device 0000:fe:04.3
(XEN) PCI add device 0000:fe:05.0
(XEN) PCI add device 0000:fe:05.1
(XEN) PCI add device 0000:fe:05.2
(XEN) PCI add device 0000:fe:05.3
(XEN) PCI add device 0000:fe:06.0
(XEN) PCI add device 0000:fe:06.1
(XEN) PCI add device 0000:fe:06.2
(XEN) PCI add device 0000:fe:06.3
(XEN) PCI add device 0000:ff:00.0
(XEN) PCI add device 0000:ff:00.1
(XEN) PCI add device 0000:ff:02.0
(XEN) PCI add device 0000:ff:02.1
(XEN) PCI add device 0000:ff:02.2
(XEN) PCI add device 0000:ff:02.3
(XEN) PCI add device 0000:ff:02.4
(XEN) PCI add device 0000:ff:02.5
(XEN) PCI add device 0000:ff:03.0
(XEN) PCI add device 0000:ff:03.1
(XEN) PCI add device 0000:ff:03.2
(XEN) PCI add device 0000:ff:03.4
(XEN) PCI add device 0000:ff:04.0
(XEN) PCI add device 0000:ff:04.1
(XEN) PCI add device 0000:ff:04.2
(XEN) PCI add device 0000:ff:04.3
(XEN) PCI add device 0000:ff:05.0
(XEN) PCI add device 0000:ff:05.1
(XEN) PCI add device 0000:ff:05.2
(XEN) PCI add device 0000:ff:05.3
(XEN) PCI add device 0000:ff:06.0
(XEN) PCI add device 0000:ff:06.1
(XEN) PCI add device 0000:ff:06.2
(XEN) PCI add device 0000:ff:06.3
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) traps.c:2503:d0 Domain attempted WRMSR 00000000000001fc from 0x0000000000000002 to 0x0000000000000000.
(XEN) memory.c:132:d0 Could not allocate order=18 extent: id=1 memflags=0 (0 of 1)
(XEN) HVM1: HVM Loader
(XEN) HVM1: Detected Xen v4.3.0
(XEN) HVM1: Xenbus rings @0xfeffc000, event channel 10
(XEN) HVM1: System requested ROMBIOS
(XEN) HVM1: CPU speed is 3322 MHz
(XEN) HVM1: Relocating guest memory for lowmem MMIO space enabled
(XEN) irq.c:270: Dom1 PCI link 0 changed 0 -> 5
(XEN) HVM1: PCI-ISA link 0 routed to IRQ5
(XEN) irq.c:270: Dom1 PCI link 1 changed 0 -> 10
(XEN) HVM1: PCI-ISA link 1 routed to IRQ10
(XEN) irq.c:270: Dom1 PCI link 2 changed 0 -> 11
(XEN) HVM1: PCI-ISA link 2 routed to IRQ11
(XEN) irq.c:270: Dom1 PCI link 3 changed 0 -> 5
(XEN) HVM1: PCI-ISA link 3 routed to IRQ5
(XEN) HVM1: pci dev 01:2 INTD->IRQ5
(XEN) HVM1: pci dev 01:3 INTA->IRQ10
(XEN) HVM1: pci dev 03:0 INTA->IRQ5
(XEN) HVM1: pci dev 04:0 INTA->IRQ5
(XEN) HVM1: pci dev 05:0 INTA->IRQ10
(XEN) HVM1: pci dev 06:0 INTB->IRQ5
(XEN) HVM1: pci dev 07:0 INTA->IRQ5
(XEN) HVM1: pci dev 08:0 INTB->IRQ10
(XEN) HVM1: No RAM in high memory; setting high_mem resource base to 100000000
(XEN) HVM1: pci dev 05:0 bar 14 size 008000000: 0e000000c
(XEN) memory_map:add: dom1 gfn=e0000 mfn=b8000 nr=8000
(XEN) memory_map:add: dom1 gfn=e8000 mfn=b4000 nr=4000
(XEN) HVM1: pci dev 05:0 bar 1c size 004000000: 0e800000c
(XEN) memory_map:add: dom1 gfn=ec000 mfn=f8000 nr=2000
(XEN) HVM1: pci dev 05:0 bar 10 size 002000000: 0ec000000
(XEN) HVM1: pci dev 03:0 bar 14 size 001000000: 0ee000008
(XEN) HVM1: pci dev 02:0 bar 10 size 000800000: 0ef000008
(XEN) HVM1: pci dev 05:0 bar 30 size 000080000: 0ef800000
(XEN) HVM1: pci dev 04:0 bar 10 size 000020000: 0ef880000
(XEN) HVM1: pci dev 06:0 bar 10 size 000004000: 0ef8a0000
(XEN) memory_map:add: dom1 gfn=ef8a0 mfn=fbcfc nr=4
(XEN) HVM1: pci dev 07:0 bar 10 size 000004000: 0ef8a4000
(XEN) memory_map:add: dom1 gfn=ef8a4 mfn=d7efc nr=4
(XEN) HVM1: pci dev 03:0 bar 10 size 000000100: 00000c001
(XEN) HVM1: pci dev 05:0 bar 24 size 000000080: 00000c101
(XEN) ioport_map:add: dom1 gport=c100 mport=cf80 nr=80
(XEN) HVM1: pci dev 04:0 bar 14 size 000000040: 00000c181
(XEN) HVM1: pci dev 01:2 bar 20 size 000000020: 00000c1c1
(XEN) HVM1: pci dev 08:0 bar 20 size 000000020: 00000c1e1
(XEN) ioport_map:add: dom1 gport=c1e0 mport=8a00 nr=20
(XEN) HVM1: pci dev 01:1 bar 20 size 000000010: 00000c201
(XEN) HVM1: Multiprocessor initialisation:
(XEN) HVM1: - CPU0 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU1 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU2 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU3 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU4 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU5 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU6 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: - CPU7 ... 40-bit phys ... fixed MTRRs ... var MTRRs [3/8] ... done.
(XEN) HVM1: Testing HVM environment:
(XEN) HVM1: - REP INSB across page boundaries ... passed
(XEN) HVM1: - GS base MSRs and SWAPGS ... passed
(XEN) HVM1: Passed 2 of 2 tests
(XEN) HVM1: Writing SMBIOS tables ...
(XEN) HVM1: Loading ROMBIOS ...
(XEN) HVM1: 9628 bytes of ROMBIOS high-memory extensions:
(XEN) HVM1: Relocating to 0xfc001000-0xfc00359c ... done
(XEN) HVM1: Creating MP tables ...
(XEN) HVM1: Loading Standard VGABIOS ...
(XEN) HVM1: Loading PCI Option ROM ...
(XEN) HVM1: - Manufacturer: http://ipxe.org
(XEN) HVM1: - Product name: iPXE
(XEN) HVM1: Option ROMs:
(XEN) HVM1: c0000-c9fff: VGA BIOS
(XEN) HVM1: ca000-dafff: Etherboot ROM
(XEN) HVM1: Loading ACPI ...
(XEN) HVM1: vm86 TSS at fc00f700
(XEN) HVM1: BIOS map:
(XEN) HVM1: f0000-fffff: Main BIOS
[-- Attachment #6: Type: text/plain, Size: 126 bytes --]
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^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-04 13:11 ` Gordan Bobic
2013-09-04 20:18 ` Gordan Bobic
@ 2013-09-05 2:04 ` Konrad Rzeszutek Wilk
2013-09-05 9:41 ` Gordan Bobic
` (2 more replies)
1 sibling, 3 replies; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-05 2:04 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Wed, Sep 04, 2013 at 02:11:06PM +0100, Gordan Bobic wrote:
> I have this at the point where it actually builds.
> Otherwise completely untested (will do that later today).
>
> Attached are:
>
> 1) libxl patch
> Modified from the original patch to _not_ implicitly enable
> e820_host when PCI devices are passed.
>
> 2) Mukesh's hypervisor e820 patch from here:
> http://lists.xen.org/archives/html/xen-devel/2013-05/msg01603.html
> Modified slightly to attempt to address Jan's comment on the same
> thread, and to adjust the diff line pointers to match against
> 4.3.0 release code.
I think that was the old version. I spotted a bug in it that
was causing a hang. And also the one that explains why libxl
would refuse to setup the E820.
The problem was that in the XENMEM_set_memory_map there was
a check to make sure that the guest launched was not HVM.
Also there was bug in the initial domain creation where
the spinlock was only set for PV and not for HVM.
>
> 3) A patch based on Konrad's earlier in this thread, with
> a few additions and changes to make it all compile.
>
> Some peer review would be most welcome - this is my first
> venture into Xen code, so please do assume that I have
> no idea what I'm doing at the moment. :)
>
> I added yet another E820MAX #define, this time to
> tools/firmware/hvmloader/e820.h
>
> If there is a better place to #include that via from
> e820.c, please point me in the right direction.
I think I saw that #define in tools/libxc/xenctrl.h. But since
the tools/firmware cannot link to the libxc (b/c it is a Minicontained
OS) I believe just having the #define in hvmloader/e820.h is
the right call.
Good first pass. I altered it a bit and got in the HVM guest
the E820 entries printed out. Here is a big giant diff:
diff --git a/tools/firmware/hvmloader/e820.c b/tools/firmware/hvmloader/e820.c
index 2e05e93..3c80241 100644
--- a/tools/firmware/hvmloader/e820.c
+++ b/tools/firmware/hvmloader/e820.c
@@ -22,6 +22,9 @@
#include "config.h"
#include "util.h"
+#include "hypercall.h"
+#include <xen/memory.h>
+#include <errno.h>
void dump_e820_table(struct e820entry *e820, unsigned int nr)
{
@@ -74,10 +77,20 @@ int build_e820_table(struct e820entry *e820,
unsigned int bios_image_base)
{
unsigned int nr = 0;
+ struct xen_memory_map op;
+ struct e820entry map[E820MAX];
+ int rc;
if ( !lowmem_reserved_base )
lowmem_reserved_base = 0xA0000;
+ set_xen_guest_handle(op.buffer, map);
+
+ rc = hypercall_memory_op ( XENMEM_memory_map, &op);
+ if ( rc != -ENOSYS) { /* It works!? */
+ printf("%s:%d got %d op.nr_entries \n", __func__, __LINE__, op.nr_entries);
+ dump_e820_table(&map[0], op.nr_entries);
+ }
/* Lowmem must be at least 512K to keep Windows happy) */
ASSERT ( lowmem_reserved_base > 512<<10 );
diff --git a/tools/firmware/hvmloader/e820.h b/tools/firmware/hvmloader/e820.h
index b2ead7f..2fa700d 100644
--- a/tools/firmware/hvmloader/e820.h
+++ b/tools/firmware/hvmloader/e820.h
@@ -8,6 +8,9 @@
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
+#define E820_UNUSABLE 5
+
+#define E820MAX 128
struct e820entry {
uint64_t addr;
diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c
index 0c32d0b..d8e2346 100644
--- a/tools/libxl/libxl_create.c
+++ b/tools/libxl/libxl_create.c
@@ -208,6 +208,8 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
libxl_defbool_setdefault(&b_info->disable_migrate, false);
+ libxl_defbool_setdefault(&b_info->e820_host, false);
+
switch (b_info->type) {
case LIBXL_DOMAIN_TYPE_HVM:
if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
@@ -280,7 +282,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
break;
case LIBXL_DOMAIN_TYPE_PV:
- libxl_defbool_setdefault(&b_info->u.pv.e820_host, false);
if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
b_info->shadow_memkb = 0;
if (b_info->u.pv.slack_memkb == LIBXL_MEMKB_DEFAULT)
diff --git a/tools/libxl/libxl_types.idl b/tools/libxl/libxl_types.idl
index 85341a0..fd6389a 100644
--- a/tools/libxl/libxl_types.idl
+++ b/tools/libxl/libxl_types.idl
@@ -299,6 +299,8 @@ libxl_domain_build_info = Struct("domain_build_info",[
("irqs", Array(uint32, "num_irqs")),
("iomem", Array(libxl_iomem_range, "num_iomem")),
("claim_mode", libxl_defbool),
+ # Use host's E820 for PCI passthrough.
+ ("e820_host", libxl_defbool),
("u", KeyedUnion(None, libxl_domain_type, "type",
[("hvm", Struct(None, [("firmware", string),
("bios", libxl_bios_type),
@@ -345,8 +347,6 @@ libxl_domain_build_info = Struct("domain_build_info",[
("cmdline", string),
("ramdisk", string),
("features", string, {'const': True}),
- # Use host's E820 for PCI passthrough.
- ("e820_host", libxl_defbool),
])),
("invalid", Struct(None, [])),
], keyvar_init_val = "LIBXL_DOMAIN_TYPE_INVALID")),
diff --git a/tools/libxl/libxl_x86.c b/tools/libxl/libxl_x86.c
index a78c91d..94515a5 100644
--- a/tools/libxl/libxl_x86.c
+++ b/tools/libxl/libxl_x86.c
@@ -216,28 +216,41 @@ static int libxl__e820_alloc(libxl__gc *gc, uint32_t domid,
struct e820entry map[E820MAX];
libxl_domain_build_info *b_info;
- if (d_config == NULL || d_config->c_info.type == LIBXL_DOMAIN_TYPE_HVM)
- return ERROR_INVAL;
-
b_info = &d_config->b_info;
- if (!libxl_defbool_val(b_info->u.pv.e820_host))
+ if (!libxl_defbool_val(b_info->e820_host)) {
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.",__func__, __LINE__);
return ERROR_INVAL;
-
+ }
rc = xc_get_machine_memory_map(ctx->xch, map, E820MAX);
if (rc < 0) {
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.",__func__, __LINE__);
errno = rc;
return ERROR_FAIL;
}
nr = rc;
- rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
- (b_info->max_memkb - b_info->target_memkb) +
- b_info->u.pv.slack_memkb);
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.nr:%d",__func__, __LINE__, nr);
+ if (d_config == NULL || d_config->c_info.type == LIBXL_DOMAIN_TYPE_HVM) {
+ rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
+ (b_info->max_memkb - b_info->target_memkb));
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d",__func__, __LINE__, rc);
+ } else if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV) {
+ rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
+ (b_info->max_memkb - b_info->target_memkb) +
+ b_info->u.pv.slack_memkb);
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d",__func__, __LINE__, rc);
+ }
+
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d",__func__, __LINE__, rc);
if (rc)
return ERROR_FAIL;
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d, nr:%d",__func__, __LINE__, rc, nr);
+
rc = xc_domain_set_memory_map(ctx->xch, domid, map, nr);
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d",__func__, __LINE__, rc);
if (rc < 0) {
+ LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d",__func__, __LINE__, rc);
errno = rc;
return ERROR_FAIL;
}
@@ -296,8 +309,7 @@ int libxl__arch_domain_create(libxl__gc *gc, libxl_domain_config *d_config,
xc_shadow_control(ctx->xch, domid, XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION, NULL, 0, &shadow, 0, NULL);
}
- if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV &&
- libxl_defbool_val(d_config->b_info.u.pv.e820_host)) {
+ if (libxl_defbool_val(d_config->b_info.e820_host)) {
ret = libxl__e820_alloc(gc, domid, d_config);
if (ret) {
LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
diff --git a/tools/libxl/xl_cmdimpl.c b/tools/libxl/xl_cmdimpl.c
index ed99622..d98ca24 100644
--- a/tools/libxl/xl_cmdimpl.c
+++ b/tools/libxl/xl_cmdimpl.c
@@ -1291,11 +1291,7 @@ skip_vfb:
if (!xlu_cfg_get_long (config, "pci_permissive", &l, 0))
pci_permissive = l;
- /* To be reworked (automatically enabled) once the auto ballooning
- * after guest starts is done (with PCI devices passed in). */
- if (c_info->type == LIBXL_DOMAIN_TYPE_PV) {
- xlu_cfg_get_defbool(config, "e820_host", &b_info->u.pv.e820_host, 0);
- }
+ xlu_cfg_get_defbool(config, "e820_host", &b_info->e820_host, 0);
if (!xlu_cfg_get_list (config, "pci", &pcis, 0, 0)) {
d_config->num_pcidevs = 0;
@@ -1314,7 +1310,7 @@ skip_vfb:
d_config->num_pcidevs++;
}
if (d_config->num_pcidevs && c_info->type == LIBXL_DOMAIN_TYPE_PV)
- libxl_defbool_set(&b_info->u.pv.e820_host, true);
+ libxl_defbool_set(&b_info->e820_host, true);
}
switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
diff --git a/tools/libxl/xl_sxp.c b/tools/libxl/xl_sxp.c
index a16a025..f34f0ba 100644
--- a/tools/libxl/xl_sxp.c
+++ b/tools/libxl/xl_sxp.c
@@ -87,6 +87,10 @@ void printf_info_sexp(int domid, libxl_domain_config *d_config)
}
}
+ printf("\t(e820_host %s)\n",
+ libxl_defbool_to_string(b_info->e820_host));
+
+
printf("\t(image\n");
switch (c_info->type) {
case LIBXL_DOMAIN_TYPE_HVM:
@@ -150,8 +154,6 @@ void printf_info_sexp(int domid, libxl_domain_config *d_config)
printf("\t\t\t(kernel %s)\n", b_info->u.pv.kernel);
printf("\t\t\t(cmdline %s)\n", b_info->u.pv.cmdline);
printf("\t\t\t(ramdisk %s)\n", b_info->u.pv.ramdisk);
- printf("\t\t\t(e820_host %s)\n",
- libxl_defbool_to_string(b_info->u.pv.e820_host));
printf("\t\t)\n");
break;
default:
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 874742c..4796221 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -566,10 +566,9 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags)
{
/* 64-bit PV guest by default. */
d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
-
- spin_lock_init(&d->arch.pv_domain.e820_lock);
}
+ spin_lock_init(&d->arch.e820_lock);
/* initialize default tsc behavior in case tools don't */
tsc_set_info(d, TSC_MODE_DEFAULT, 0UL, 0, 0);
spin_lock_init(&d->arch.vtsc_lock);
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 54b1e6a..6c9b58c 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3142,10 +3142,10 @@ static long hvm_memory_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
switch ( cmd & MEMOP_CMD_MASK )
{
- case XENMEM_memory_map:
case XENMEM_machine_memory_map:
case XENMEM_machphys_mapping:
return -ENOSYS;
+ case XENMEM_memory_map:
case XENMEM_decrease_reservation:
rc = do_memory_op(cmd, arg);
current->domain->arch.hvm_domain.qemu_mapcache_invalidate = 1;
@@ -3217,10 +3217,10 @@ static long hvm_memory_op_compat32(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
switch ( cmd & MEMOP_CMD_MASK )
{
- case XENMEM_memory_map:
case XENMEM_machine_memory_map:
case XENMEM_machphys_mapping:
return -ENOSYS;
+ case XENMEM_memory_map:
case XENMEM_decrease_reservation:
rc = compat_memory_op(cmd, arg);
current->domain->arch.hvm_domain.qemu_mapcache_invalidate = 1;
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index e7f0e13..4c3ce9a 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4740,19 +4740,13 @@ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg)
return rc;
}
- if ( is_hvm_domain(d) )
- {
- rcu_unlock_domain(d);
- return -EPERM;
- }
-
e820 = xmalloc_array(e820entry_t, fmap.map.nr_entries);
if ( e820 == NULL )
{
rcu_unlock_domain(d);
return -ENOMEM;
}
-
+
if ( copy_from_guest(e820, fmap.map.buffer, fmap.map.nr_entries) )
{
xfree(e820);
@@ -4760,11 +4754,11 @@ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg)
return -EFAULT;
}
- spin_lock(&d->arch.pv_domain.e820_lock);
- xfree(d->arch.pv_domain.e820);
- d->arch.pv_domain.e820 = e820;
- d->arch.pv_domain.nr_e820 = fmap.map.nr_entries;
- spin_unlock(&d->arch.pv_domain.e820_lock);
+ spin_lock(&d->arch.e820_lock);
+ xfree(d->arch.e820);
+ d->arch.e820 = e820;
+ d->arch.nr_e820 = fmap.map.nr_entries;
+ spin_unlock(&d->arch.e820_lock);
rcu_unlock_domain(d);
return rc;
@@ -4778,26 +4772,26 @@ long arch_memory_op(int op, XEN_GUEST_HANDLE_PARAM(void) arg)
if ( copy_from_guest(&map, arg, 1) )
return -EFAULT;
- spin_lock(&d->arch.pv_domain.e820_lock);
+ spin_lock(&d->arch.e820_lock);
/* Backwards compatibility. */
- if ( (d->arch.pv_domain.nr_e820 == 0) ||
- (d->arch.pv_domain.e820 == NULL) )
+ if ( (d->arch.nr_e820 == 0) ||
+ (d->arch.e820 == NULL) )
{
- spin_unlock(&d->arch.pv_domain.e820_lock);
+ spin_unlock(&d->arch.e820_lock);
return -ENOSYS;
}
- map.nr_entries = min(map.nr_entries, d->arch.pv_domain.nr_e820);
- if ( copy_to_guest(map.buffer, d->arch.pv_domain.e820,
+ map.nr_entries = min(map.nr_entries, d->arch.nr_e820);
+ if ( copy_to_guest(map.buffer, d->arch.e820,
map.nr_entries) ||
__copy_to_guest(arg, &map, 1) )
{
- spin_unlock(&d->arch.pv_domain.e820_lock);
+ spin_unlock(&d->arch.e820_lock);
return -EFAULT;
}
- spin_unlock(&d->arch.pv_domain.e820_lock);
+ spin_unlock(&d->arch.e820_lock);
return 0;
}
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index d79464d..c3f9f8e 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -234,11 +234,6 @@ struct pv_domain
/* map_domain_page() mapping cache. */
struct mapcache_domain mapcache;
-
- /* Pseudophysical e820 map (XENMEM_memory_map). */
- spinlock_t e820_lock;
- struct e820entry *e820;
- unsigned int nr_e820;
};
struct arch_domain
@@ -313,6 +308,11 @@ struct arch_domain
(possibly other cases in the future */
uint64_t vtsc_kerncount; /* for hvm, counts all vtsc */
uint64_t vtsc_usercount; /* not used for hvm */
+
+ /* Pseudophysical e820 map (XENMEM_memory_map). */
+ spinlock_t e820_lock;
+ struct e820entry *e820;
+ unsigned int nr_e820;
} __cacheline_aligned;
#define has_arch_pdevs(d) (!list_empty(&(d)->arch.pdev_list))
^ permalink raw reply related [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 2:04 ` Konrad Rzeszutek Wilk
@ 2013-09-05 9:41 ` Gordan Bobic
2013-09-05 10:00 ` Gordan Bobic
2013-09-05 10:26 ` Gordan Bobic
2013-09-05 21:13 ` Gordan Bobic
2 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 9:41 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
Hmm...
gcc -O2 -fomit-frame-pointer -m64 -fno-strict-aliasing -std=gnu99 -Wall
-Wstrict-prototypes -Wdeclaration-after-statement
-Wno-unused-but-set-variable -DNDEBUG -fno-builtin -fno-common
-Wredundant-decls -iwithprefix include -Werror -Wno-pointer-arith -pipe
-I/root/rpmbuild/BUILD/xen-4.3.0/xen/include
-I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-generic
-I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-default
-msoft-float -fno-stack-protector -fno-exceptions -Wnested-externs
-mno-red-zone -mno-sse -fpic -fno-asynchronous-unwind-tables
-DGCC_HAS_VISIBILITY_ATTRIBUTE -nostdinc -g -D__XEN__ -include
/root/rpmbuild/BUILD/xen-4.3.0/xen/include/xen/config.h -DHAS_ACPI
-DHAS_GDBSX -DHAS_PASSTHROUGH -MMD -MF .debug.o.d -c debug.c -o debug.o
gcc -O2 -fomit-frame-pointer -m64 -fno-strict-aliasing -std=gnu99 -Wall
-Wstrict-prototypes -Wdeclaration-after-statement
-Wno-unused-but-set-variable -DNDEBUG -fno-builtin -fno-common
-Wredundant-decls -iwithprefix include -Werror -Wno-pointer-arith -pipe
-I/root/rpmbuild/BUILD/xen-4.3.0/xen/include
-I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-generic
-I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-default
-msoft-float -fno-stack-protector -fno-exceptions -Wnested-externs
-mno-red-zone -mno-sse -fpic -fno-asynchronous-unwind-tables
-DGCC_HAS_VISIBILITY_ATTRIBUTE -nostdinc -g -D__XEN__ -include
/root/rpmbuild/BUILD/xen-4.3.0/xen/include/xen/config.h -DHAS_ACPI
-DHAS_GDBSX -DHAS_PASSTHROUGH -MMD -MF .domain.o.d -c domain.c -o
domain.o
domain.c: In function ‘arch_domain_destroy’:
domain.c:595: error: ‘struct pv_domain’ has no member named ‘e820’
make[4]: *** [domain.o] Error 1
It would seem you omitted this block from the original patch:
===
@@ -592,8 +592,8 @@ void arch_domain_destroy(struct domain *d)
{
if ( is_hvm_domain(d) )
hvm_domain_destroy(d);
- else
- xfree(d->arch.pv_domain.e820);
+
+ xfree(d->arch.e820);
free_domain_pirqs(d);
if ( !is_idle_domain(d) )
===
Was that intentional? Does that block look OK to you? Should I re-add
it?
Gordan
On Wed, 4 Sep 2013 22:04:42 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> On Wed, Sep 04, 2013 at 02:11:06PM +0100, Gordan Bobic wrote:
>> I have this at the point where it actually builds.
>> Otherwise completely untested (will do that later today).
>>
>> Attached are:
>>
>> 1) libxl patch
>> Modified from the original patch to _not_ implicitly enable
>> e820_host when PCI devices are passed.
>>
>> 2) Mukesh's hypervisor e820 patch from here:
>> http://lists.xen.org/archives/html/xen-devel/2013-05/msg01603.html
>> Modified slightly to attempt to address Jan's comment on the same
>> thread, and to adjust the diff line pointers to match against
>> 4.3.0 release code.
>
> I think that was the old version. I spotted a bug in it that
> was causing a hang. And also the one that explains why libxl
> would refuse to setup the E820.
>
> The problem was that in the XENMEM_set_memory_map there was
> a check to make sure that the guest launched was not HVM.
>
> Also there was bug in the initial domain creation where
> the spinlock was only set for PV and not for HVM.
>
>>
>> 3) A patch based on Konrad's earlier in this thread, with
>> a few additions and changes to make it all compile.
>>
>> Some peer review would be most welcome - this is my first
>> venture into Xen code, so please do assume that I have
>> no idea what I'm doing at the moment. :)
>>
>> I added yet another E820MAX #define, this time to
>> tools/firmware/hvmloader/e820.h
>>
>> If there is a better place to #include that via from
>> e820.c, please point me in the right direction.
>
> I think I saw that #define in tools/libxc/xenctrl.h. But since
> the tools/firmware cannot link to the libxc (b/c it is a
> Minicontained
> OS) I believe just having the #define in hvmloader/e820.h is
> the right call.
>
> Good first pass. I altered it a bit and got in the HVM guest
> the E820 entries printed out. Here is a big giant diff:
>
> diff --git a/tools/firmware/hvmloader/e820.c
> b/tools/firmware/hvmloader/e820.c
> index 2e05e93..3c80241 100644
> --- a/tools/firmware/hvmloader/e820.c
> +++ b/tools/firmware/hvmloader/e820.c
> @@ -22,6 +22,9 @@
>
> #include "config.h"
> #include "util.h"
> +#include "hypercall.h"
> +#include <xen/memory.h>
> +#include <errno.h>
>
> void dump_e820_table(struct e820entry *e820, unsigned int nr)
> {
> @@ -74,10 +77,20 @@ int build_e820_table(struct e820entry *e820,
> unsigned int bios_image_base)
> {
> unsigned int nr = 0;
> + struct xen_memory_map op;
> + struct e820entry map[E820MAX];
> + int rc;
>
> if ( !lowmem_reserved_base )
> lowmem_reserved_base = 0xA0000;
>
> + set_xen_guest_handle(op.buffer, map);
> +
> + rc = hypercall_memory_op ( XENMEM_memory_map, &op);
> + if ( rc != -ENOSYS) { /* It works!? */
> + printf("%s:%d got %d op.nr_entries \n", __func__, __LINE__,
> op.nr_entries);
> + dump_e820_table(&map[0], op.nr_entries);
> + }
> /* Lowmem must be at least 512K to keep Windows happy) */
> ASSERT ( lowmem_reserved_base > 512<<10 );
>
> diff --git a/tools/firmware/hvmloader/e820.h
> b/tools/firmware/hvmloader/e820.h
> index b2ead7f..2fa700d 100644
> --- a/tools/firmware/hvmloader/e820.h
> +++ b/tools/firmware/hvmloader/e820.h
> @@ -8,6 +8,9 @@
> #define E820_RESERVED 2
> #define E820_ACPI 3
> #define E820_NVS 4
> +#define E820_UNUSABLE 5
> +
> +#define E820MAX 128
>
> struct e820entry {
> uint64_t addr;
> diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c
> index 0c32d0b..d8e2346 100644
> --- a/tools/libxl/libxl_create.c
> +++ b/tools/libxl/libxl_create.c
> @@ -208,6 +208,8 @@ int libxl__domain_build_info_setdefault(libxl__gc
> *gc,
>
> libxl_defbool_setdefault(&b_info->disable_migrate, false);
>
> + libxl_defbool_setdefault(&b_info->e820_host, false);
> +
> switch (b_info->type) {
> case LIBXL_DOMAIN_TYPE_HVM:
> if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
> @@ -280,7 +282,6 @@ int libxl__domain_build_info_setdefault(libxl__gc
> *gc,
>
> break;
> case LIBXL_DOMAIN_TYPE_PV:
> - libxl_defbool_setdefault(&b_info->u.pv.e820_host, false);
> if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
> b_info->shadow_memkb = 0;
> if (b_info->u.pv.slack_memkb == LIBXL_MEMKB_DEFAULT)
> diff --git a/tools/libxl/libxl_types.idl
> b/tools/libxl/libxl_types.idl
> index 85341a0..fd6389a 100644
> --- a/tools/libxl/libxl_types.idl
> +++ b/tools/libxl/libxl_types.idl
> @@ -299,6 +299,8 @@ libxl_domain_build_info =
> Struct("domain_build_info",[
> ("irqs", Array(uint32, "num_irqs")),
> ("iomem", Array(libxl_iomem_range, "num_iomem")),
> ("claim_mode", libxl_defbool),
> + # Use host's E820 for PCI passthrough.
> + ("e820_host", libxl_defbool),
> ("u", KeyedUnion(None, libxl_domain_type, "type",
> [("hvm", Struct(None, [("firmware", string),
> ("bios",
> libxl_bios_type),
> @@ -345,8 +347,6 @@ libxl_domain_build_info =
> Struct("domain_build_info",[
> ("cmdline", string),
> ("ramdisk", string),
> ("features", string, {'const':
> True}),
> - # Use host's E820 for PCI
> passthrough.
> - ("e820_host", libxl_defbool),
> ])),
> ("invalid", Struct(None, [])),
> ], keyvar_init_val = "LIBXL_DOMAIN_TYPE_INVALID")),
> diff --git a/tools/libxl/libxl_x86.c b/tools/libxl/libxl_x86.c
> index a78c91d..94515a5 100644
> --- a/tools/libxl/libxl_x86.c
> +++ b/tools/libxl/libxl_x86.c
> @@ -216,28 +216,41 @@ static int libxl__e820_alloc(libxl__gc *gc,
> uint32_t domid,
> struct e820entry map[E820MAX];
> libxl_domain_build_info *b_info;
>
> - if (d_config == NULL || d_config->c_info.type ==
> LIBXL_DOMAIN_TYPE_HVM)
> - return ERROR_INVAL;
> -
> b_info = &d_config->b_info;
> - if (!libxl_defbool_val(b_info->u.pv.e820_host))
> + if (!libxl_defbool_val(b_info->e820_host)) {
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.",__func__,
> __LINE__);
> return ERROR_INVAL;
> -
> + }
> rc = xc_get_machine_memory_map(ctx->xch, map, E820MAX);
> if (rc < 0) {
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.",__func__,
> __LINE__);
> errno = rc;
> return ERROR_FAIL;
> }
> nr = rc;
> - rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
> - (b_info->max_memkb - b_info->target_memkb) +
> - b_info->u.pv.slack_memkb);
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.nr:%d",__func__,
> __LINE__, nr);
> + if (d_config == NULL || d_config->c_info.type ==
> LIBXL_DOMAIN_TYPE_HVM) {
> + rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
> + (b_info->max_memkb -
> b_info->target_memkb));
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
> "%s:%d.rc%d",__func__, __LINE__, rc);
> + } else if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV) {
> + rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
> + (b_info->max_memkb -
> b_info->target_memkb) +
> + b_info->u.pv.slack_memkb);
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
> "%s:%d.rc%d",__func__, __LINE__, rc);
> + }
> +
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
> "%s:%d.rc%d",__func__, __LINE__, rc);
> if (rc)
> return ERROR_FAIL;
>
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d,
> nr:%d",__func__, __LINE__, rc, nr);
> +
> rc = xc_domain_set_memory_map(ctx->xch, domid, map, nr);
>
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
> "%s:%d.rc%d",__func__, __LINE__, rc);
> if (rc < 0) {
> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
> "%s:%d.rc%d",__func__, __LINE__, rc);
> errno = rc;
> return ERROR_FAIL;
> }
> @@ -296,8 +309,7 @@ int libxl__arch_domain_create(libxl__gc *gc,
> libxl_domain_config *d_config,
> xc_shadow_control(ctx->xch, domid,
> XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION, NULL, 0, &shadow, 0, NULL);
> }
>
> - if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV &&
> - libxl_defbool_val(d_config->b_info.u.pv.e820_host)) {
> + if (libxl_defbool_val(d_config->b_info.e820_host)) {
> ret = libxl__e820_alloc(gc, domid, d_config);
> if (ret) {
> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
> diff --git a/tools/libxl/xl_cmdimpl.c b/tools/libxl/xl_cmdimpl.c
> index ed99622..d98ca24 100644
> --- a/tools/libxl/xl_cmdimpl.c
> +++ b/tools/libxl/xl_cmdimpl.c
> @@ -1291,11 +1291,7 @@ skip_vfb:
> if (!xlu_cfg_get_long (config, "pci_permissive", &l, 0))
> pci_permissive = l;
>
> - /* To be reworked (automatically enabled) once the auto
> ballooning
> - * after guest starts is done (with PCI devices passed in). */
> - if (c_info->type == LIBXL_DOMAIN_TYPE_PV) {
> - xlu_cfg_get_defbool(config, "e820_host",
> &b_info->u.pv.e820_host, 0);
> - }
> + xlu_cfg_get_defbool(config, "e820_host", &b_info->e820_host, 0);
>
> if (!xlu_cfg_get_list (config, "pci", &pcis, 0, 0)) {
> d_config->num_pcidevs = 0;
> @@ -1314,7 +1310,7 @@ skip_vfb:
> d_config->num_pcidevs++;
> }
> if (d_config->num_pcidevs && c_info->type ==
> LIBXL_DOMAIN_TYPE_PV)
> - libxl_defbool_set(&b_info->u.pv.e820_host, true);
> + libxl_defbool_set(&b_info->e820_host, true);
> }
>
> switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
> diff --git a/tools/libxl/xl_sxp.c b/tools/libxl/xl_sxp.c
> index a16a025..f34f0ba 100644
> --- a/tools/libxl/xl_sxp.c
> +++ b/tools/libxl/xl_sxp.c
> @@ -87,6 +87,10 @@ void printf_info_sexp(int domid,
> libxl_domain_config *d_config)
> }
> }
>
> + printf("\t(e820_host %s)\n",
> + libxl_defbool_to_string(b_info->e820_host));
> +
> +
> printf("\t(image\n");
> switch (c_info->type) {
> case LIBXL_DOMAIN_TYPE_HVM:
> @@ -150,8 +154,6 @@ void printf_info_sexp(int domid,
> libxl_domain_config *d_config)
> printf("\t\t\t(kernel %s)\n", b_info->u.pv.kernel);
> printf("\t\t\t(cmdline %s)\n", b_info->u.pv.cmdline);
> printf("\t\t\t(ramdisk %s)\n", b_info->u.pv.ramdisk);
> - printf("\t\t\t(e820_host %s)\n",
> - libxl_defbool_to_string(b_info->u.pv.e820_host));
> printf("\t\t)\n");
> break;
> default:
> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
> index 874742c..4796221 100644
> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -566,10 +566,9 @@ int arch_domain_create(struct domain *d,
> unsigned int domcr_flags)
> {
> /* 64-bit PV guest by default. */
> d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
> -
> - spin_lock_init(&d->arch.pv_domain.e820_lock);
> }
>
> + spin_lock_init(&d->arch.e820_lock);
> /* initialize default tsc behavior in case tools don't */
> tsc_set_info(d, TSC_MODE_DEFAULT, 0UL, 0, 0);
> spin_lock_init(&d->arch.vtsc_lock);
> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
> index 54b1e6a..6c9b58c 100644
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -3142,10 +3142,10 @@ static long hvm_memory_op(int cmd,
> XEN_GUEST_HANDLE_PARAM(void) arg)
>
> switch ( cmd & MEMOP_CMD_MASK )
> {
> - case XENMEM_memory_map:
> case XENMEM_machine_memory_map:
> case XENMEM_machphys_mapping:
> return -ENOSYS;
> + case XENMEM_memory_map:
> case XENMEM_decrease_reservation:
> rc = do_memory_op(cmd, arg);
> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
> 1;
> @@ -3217,10 +3217,10 @@ static long hvm_memory_op_compat32(int cmd,
> XEN_GUEST_HANDLE_PARAM(void) arg)
>
> switch ( cmd & MEMOP_CMD_MASK )
> {
> - case XENMEM_memory_map:
> case XENMEM_machine_memory_map:
> case XENMEM_machphys_mapping:
> return -ENOSYS;
> + case XENMEM_memory_map:
> case XENMEM_decrease_reservation:
> rc = compat_memory_op(cmd, arg);
> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
> 1;
> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
> index e7f0e13..4c3ce9a 100644
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -4740,19 +4740,13 @@ long arch_memory_op(int op,
> XEN_GUEST_HANDLE_PARAM(void) arg)
> return rc;
> }
>
> - if ( is_hvm_domain(d) )
> - {
> - rcu_unlock_domain(d);
> - return -EPERM;
> - }
> -
> e820 = xmalloc_array(e820entry_t, fmap.map.nr_entries);
> if ( e820 == NULL )
> {
> rcu_unlock_domain(d);
> return -ENOMEM;
> }
> -
> +
> if ( copy_from_guest(e820, fmap.map.buffer,
> fmap.map.nr_entries) )
> {
> xfree(e820);
> @@ -4760,11 +4754,11 @@ long arch_memory_op(int op,
> XEN_GUEST_HANDLE_PARAM(void) arg)
> return -EFAULT;
> }
>
> - spin_lock(&d->arch.pv_domain.e820_lock);
> - xfree(d->arch.pv_domain.e820);
> - d->arch.pv_domain.e820 = e820;
> - d->arch.pv_domain.nr_e820 = fmap.map.nr_entries;
> - spin_unlock(&d->arch.pv_domain.e820_lock);
> + spin_lock(&d->arch.e820_lock);
> + xfree(d->arch.e820);
> + d->arch.e820 = e820;
> + d->arch.nr_e820 = fmap.map.nr_entries;
> + spin_unlock(&d->arch.e820_lock);
>
> rcu_unlock_domain(d);
> return rc;
> @@ -4778,26 +4772,26 @@ long arch_memory_op(int op,
> XEN_GUEST_HANDLE_PARAM(void) arg)
> if ( copy_from_guest(&map, arg, 1) )
> return -EFAULT;
>
> - spin_lock(&d->arch.pv_domain.e820_lock);
> + spin_lock(&d->arch.e820_lock);
>
> /* Backwards compatibility. */
> - if ( (d->arch.pv_domain.nr_e820 == 0) ||
> - (d->arch.pv_domain.e820 == NULL) )
> + if ( (d->arch.nr_e820 == 0) ||
> + (d->arch.e820 == NULL) )
> {
> - spin_unlock(&d->arch.pv_domain.e820_lock);
> + spin_unlock(&d->arch.e820_lock);
> return -ENOSYS;
> }
>
> - map.nr_entries = min(map.nr_entries,
> d->arch.pv_domain.nr_e820);
> - if ( copy_to_guest(map.buffer, d->arch.pv_domain.e820,
> + map.nr_entries = min(map.nr_entries, d->arch.nr_e820);
> + if ( copy_to_guest(map.buffer, d->arch.e820,
> map.nr_entries) ||
> __copy_to_guest(arg, &map, 1) )
> {
> - spin_unlock(&d->arch.pv_domain.e820_lock);
> + spin_unlock(&d->arch.e820_lock);
> return -EFAULT;
> }
>
> - spin_unlock(&d->arch.pv_domain.e820_lock);
> + spin_unlock(&d->arch.e820_lock);
> return 0;
> }
>
> diff --git a/xen/include/asm-x86/domain.h
> b/xen/include/asm-x86/domain.h
> index d79464d..c3f9f8e 100644
> --- a/xen/include/asm-x86/domain.h
> +++ b/xen/include/asm-x86/domain.h
> @@ -234,11 +234,6 @@ struct pv_domain
>
> /* map_domain_page() mapping cache. */
> struct mapcache_domain mapcache;
> -
> - /* Pseudophysical e820 map (XENMEM_memory_map). */
> - spinlock_t e820_lock;
> - struct e820entry *e820;
> - unsigned int nr_e820;
> };
>
> struct arch_domain
> @@ -313,6 +308,11 @@ struct arch_domain
> (possibly other cases in the future
> */
> uint64_t vtsc_kerncount; /* for hvm, counts all vtsc */
> uint64_t vtsc_usercount; /* not used for hvm */
> +
> + /* Pseudophysical e820 map (XENMEM_memory_map). */
> + spinlock_t e820_lock;
> + struct e820entry *e820;
> + unsigned int nr_e820;
> } __cacheline_aligned;
>
> #define has_arch_pdevs(d) (!list_empty(&(d)->arch.pdev_list))
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 9:41 ` Gordan Bobic
@ 2013-09-05 10:00 ` Gordan Bobic
2013-09-05 12:36 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 10:00 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Thu, 05 Sep 2013 10:41:09 +0100, Gordan Bobic <gordan@bobich.net>
wrote:
> Hmm...
>
> gcc -O2 -fomit-frame-pointer -m64 -fno-strict-aliasing -std=gnu99
> -Wall -Wstrict-prototypes -Wdeclaration-after-statement
> -Wno-unused-but-set-variable -DNDEBUG -fno-builtin -fno-common
> -Wredundant-decls -iwithprefix include -Werror -Wno-pointer-arith
> -pipe -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include
> -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-generic
> -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-default
> -msoft-float -fno-stack-protector -fno-exceptions -Wnested-externs
> -mno-red-zone -mno-sse -fpic -fno-asynchronous-unwind-tables
> -DGCC_HAS_VISIBILITY_ATTRIBUTE -nostdinc -g -D__XEN__ -include
> /root/rpmbuild/BUILD/xen-4.3.0/xen/include/xen/config.h -DHAS_ACPI
> -DHAS_GDBSX -DHAS_PASSTHROUGH -MMD -MF .debug.o.d -c debug.c -o
> debug.o
> gcc -O2 -fomit-frame-pointer -m64 -fno-strict-aliasing -std=gnu99
> -Wall -Wstrict-prototypes -Wdeclaration-after-statement
> -Wno-unused-but-set-variable -DNDEBUG -fno-builtin -fno-common
> -Wredundant-decls -iwithprefix include -Werror -Wno-pointer-arith
> -pipe -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include
> -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-generic
> -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-default
> -msoft-float -fno-stack-protector -fno-exceptions -Wnested-externs
> -mno-red-zone -mno-sse -fpic -fno-asynchronous-unwind-tables
> -DGCC_HAS_VISIBILITY_ATTRIBUTE -nostdinc -g -D__XEN__ -include
> /root/rpmbuild/BUILD/xen-4.3.0/xen/include/xen/config.h -DHAS_ACPI
> -DHAS_GDBSX -DHAS_PASSTHROUGH -MMD -MF .domain.o.d -c domain.c -o
> domain.o
> domain.c: In function ‘arch_domain_destroy’:
> domain.c:595: error: ‘struct pv_domain’ has no member named ‘e820’
> make[4]: *** [domain.o] Error 1
>
> It would seem you omitted this block from the original patch:
>
> ===
> @@ -592,8 +592,8 @@ void arch_domain_destroy(struct domain *d)
> {
> if ( is_hvm_domain(d) )
> hvm_domain_destroy(d);
> - else
> - xfree(d->arch.pv_domain.e820);
> +
> + xfree(d->arch.e820);
>
> free_domain_pirqs(d);
> if ( !is_idle_domain(d) )
> ===
>
> Was that intentional? Does that block look OK to you? Should I re-add
> it?
Just to clarify - re-adding this block fixes the build issue.
Will test tonight whether it runs. What I really wanted to
know is whether this is the correct way to handle the cleanup
in this case.
Gordan
> On Wed, 4 Sep 2013 22:04:42 -0400, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
>> On Wed, Sep 04, 2013 at 02:11:06PM +0100, Gordan Bobic wrote:
>>> I have this at the point where it actually builds.
>>> Otherwise completely untested (will do that later today).
>>>
>>> Attached are:
>>>
>>> 1) libxl patch
>>> Modified from the original patch to _not_ implicitly enable
>>> e820_host when PCI devices are passed.
>>>
>>> 2) Mukesh's hypervisor e820 patch from here:
>>> http://lists.xen.org/archives/html/xen-devel/2013-05/msg01603.html
>>> Modified slightly to attempt to address Jan's comment on the same
>>> thread, and to adjust the diff line pointers to match against
>>> 4.3.0 release code.
>>
>> I think that was the old version. I spotted a bug in it that
>> was causing a hang. And also the one that explains why libxl
>> would refuse to setup the E820.
>>
>> The problem was that in the XENMEM_set_memory_map there was
>> a check to make sure that the guest launched was not HVM.
>>
>> Also there was bug in the initial domain creation where
>> the spinlock was only set for PV and not for HVM.
>>
>>>
>>> 3) A patch based on Konrad's earlier in this thread, with
>>> a few additions and changes to make it all compile.
>>>
>>> Some peer review would be most welcome - this is my first
>>> venture into Xen code, so please do assume that I have
>>> no idea what I'm doing at the moment. :)
>>>
>>> I added yet another E820MAX #define, this time to
>>> tools/firmware/hvmloader/e820.h
>>>
>>> If there is a better place to #include that via from
>>> e820.c, please point me in the right direction.
>>
>> I think I saw that #define in tools/libxc/xenctrl.h. But since
>> the tools/firmware cannot link to the libxc (b/c it is a
>> Minicontained
>> OS) I believe just having the #define in hvmloader/e820.h is
>> the right call.
>>
>> Good first pass. I altered it a bit and got in the HVM guest
>> the E820 entries printed out. Here is a big giant diff:
>>
>> diff --git a/tools/firmware/hvmloader/e820.c
>> b/tools/firmware/hvmloader/e820.c
>> index 2e05e93..3c80241 100644
>> --- a/tools/firmware/hvmloader/e820.c
>> +++ b/tools/firmware/hvmloader/e820.c
>> @@ -22,6 +22,9 @@
>>
>> #include "config.h"
>> #include "util.h"
>> +#include "hypercall.h"
>> +#include <xen/memory.h>
>> +#include <errno.h>
>>
>> void dump_e820_table(struct e820entry *e820, unsigned int nr)
>> {
>> @@ -74,10 +77,20 @@ int build_e820_table(struct e820entry *e820,
>> unsigned int bios_image_base)
>> {
>> unsigned int nr = 0;
>> + struct xen_memory_map op;
>> + struct e820entry map[E820MAX];
>> + int rc;
>>
>> if ( !lowmem_reserved_base )
>> lowmem_reserved_base = 0xA0000;
>>
>> + set_xen_guest_handle(op.buffer, map);
>> +
>> + rc = hypercall_memory_op ( XENMEM_memory_map, &op);
>> + if ( rc != -ENOSYS) { /* It works!? */
>> + printf("%s:%d got %d op.nr_entries \n", __func__, __LINE__,
>> op.nr_entries);
>> + dump_e820_table(&map[0], op.nr_entries);
>> + }
>> /* Lowmem must be at least 512K to keep Windows happy) */
>> ASSERT ( lowmem_reserved_base > 512<<10 );
>>
>> diff --git a/tools/firmware/hvmloader/e820.h
>> b/tools/firmware/hvmloader/e820.h
>> index b2ead7f..2fa700d 100644
>> --- a/tools/firmware/hvmloader/e820.h
>> +++ b/tools/firmware/hvmloader/e820.h
>> @@ -8,6 +8,9 @@
>> #define E820_RESERVED 2
>> #define E820_ACPI 3
>> #define E820_NVS 4
>> +#define E820_UNUSABLE 5
>> +
>> +#define E820MAX 128
>>
>> struct e820entry {
>> uint64_t addr;
>> diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c
>> index 0c32d0b..d8e2346 100644
>> --- a/tools/libxl/libxl_create.c
>> +++ b/tools/libxl/libxl_create.c
>> @@ -208,6 +208,8 @@ int
>> libxl__domain_build_info_setdefault(libxl__gc *gc,
>>
>> libxl_defbool_setdefault(&b_info->disable_migrate, false);
>>
>> + libxl_defbool_setdefault(&b_info->e820_host, false);
>> +
>> switch (b_info->type) {
>> case LIBXL_DOMAIN_TYPE_HVM:
>> if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
>> @@ -280,7 +282,6 @@ int
>> libxl__domain_build_info_setdefault(libxl__gc *gc,
>>
>> break;
>> case LIBXL_DOMAIN_TYPE_PV:
>> - libxl_defbool_setdefault(&b_info->u.pv.e820_host, false);
>> if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
>> b_info->shadow_memkb = 0;
>> if (b_info->u.pv.slack_memkb == LIBXL_MEMKB_DEFAULT)
>> diff --git a/tools/libxl/libxl_types.idl
>> b/tools/libxl/libxl_types.idl
>> index 85341a0..fd6389a 100644
>> --- a/tools/libxl/libxl_types.idl
>> +++ b/tools/libxl/libxl_types.idl
>> @@ -299,6 +299,8 @@ libxl_domain_build_info =
>> Struct("domain_build_info",[
>> ("irqs", Array(uint32, "num_irqs")),
>> ("iomem", Array(libxl_iomem_range, "num_iomem")),
>> ("claim_mode", libxl_defbool),
>> + # Use host's E820 for PCI passthrough.
>> + ("e820_host", libxl_defbool),
>> ("u", KeyedUnion(None, libxl_domain_type, "type",
>> [("hvm", Struct(None, [("firmware",
>> string),
>> ("bios",
>> libxl_bios_type),
>> @@ -345,8 +347,6 @@ libxl_domain_build_info =
>> Struct("domain_build_info",[
>> ("cmdline", string),
>> ("ramdisk", string),
>> ("features", string,
>> {'const': True}),
>> - # Use host's E820 for PCI
>> passthrough.
>> - ("e820_host", libxl_defbool),
>> ])),
>> ("invalid", Struct(None, [])),
>> ], keyvar_init_val =
>> "LIBXL_DOMAIN_TYPE_INVALID")),
>> diff --git a/tools/libxl/libxl_x86.c b/tools/libxl/libxl_x86.c
>> index a78c91d..94515a5 100644
>> --- a/tools/libxl/libxl_x86.c
>> +++ b/tools/libxl/libxl_x86.c
>> @@ -216,28 +216,41 @@ static int libxl__e820_alloc(libxl__gc *gc,
>> uint32_t domid,
>> struct e820entry map[E820MAX];
>> libxl_domain_build_info *b_info;
>>
>> - if (d_config == NULL || d_config->c_info.type ==
>> LIBXL_DOMAIN_TYPE_HVM)
>> - return ERROR_INVAL;
>> -
>> b_info = &d_config->b_info;
>> - if (!libxl_defbool_val(b_info->u.pv.e820_host))
>> + if (!libxl_defbool_val(b_info->e820_host)) {
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.",__func__,
>> __LINE__);
>> return ERROR_INVAL;
>> -
>> + }
>> rc = xc_get_machine_memory_map(ctx->xch, map, E820MAX);
>> if (rc < 0) {
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.",__func__,
>> __LINE__);
>> errno = rc;
>> return ERROR_FAIL;
>> }
>> nr = rc;
>> - rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
>> - (b_info->max_memkb - b_info->target_memkb) +
>> - b_info->u.pv.slack_memkb);
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.nr:%d",__func__,
>> __LINE__, nr);
>> + if (d_config == NULL || d_config->c_info.type ==
>> LIBXL_DOMAIN_TYPE_HVM) {
>> + rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
>> + (b_info->max_memkb -
>> b_info->target_memkb));
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>> "%s:%d.rc%d",__func__, __LINE__, rc);
>> + } else if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV) {
>> + rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
>> + (b_info->max_memkb -
>> b_info->target_memkb) +
>> + b_info->u.pv.slack_memkb);
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>> "%s:%d.rc%d",__func__, __LINE__, rc);
>> + }
>> +
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>> "%s:%d.rc%d",__func__, __LINE__, rc);
>> if (rc)
>> return ERROR_FAIL;
>>
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d,
>> nr:%d",__func__, __LINE__, rc, nr);
>> +
>> rc = xc_domain_set_memory_map(ctx->xch, domid, map, nr);
>>
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>> "%s:%d.rc%d",__func__, __LINE__, rc);
>> if (rc < 0) {
>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>> "%s:%d.rc%d",__func__, __LINE__, rc);
>> errno = rc;
>> return ERROR_FAIL;
>> }
>> @@ -296,8 +309,7 @@ int libxl__arch_domain_create(libxl__gc *gc,
>> libxl_domain_config *d_config,
>> xc_shadow_control(ctx->xch, domid,
>> XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION, NULL, 0, &shadow, 0, NULL);
>> }
>>
>> - if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV &&
>> - libxl_defbool_val(d_config->b_info.u.pv.e820_host)) {
>> + if (libxl_defbool_val(d_config->b_info.e820_host)) {
>> ret = libxl__e820_alloc(gc, domid, d_config);
>> if (ret) {
>> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
>> diff --git a/tools/libxl/xl_cmdimpl.c b/tools/libxl/xl_cmdimpl.c
>> index ed99622..d98ca24 100644
>> --- a/tools/libxl/xl_cmdimpl.c
>> +++ b/tools/libxl/xl_cmdimpl.c
>> @@ -1291,11 +1291,7 @@ skip_vfb:
>> if (!xlu_cfg_get_long (config, "pci_permissive", &l, 0))
>> pci_permissive = l;
>>
>> - /* To be reworked (automatically enabled) once the auto
>> ballooning
>> - * after guest starts is done (with PCI devices passed in). */
>> - if (c_info->type == LIBXL_DOMAIN_TYPE_PV) {
>> - xlu_cfg_get_defbool(config, "e820_host",
>> &b_info->u.pv.e820_host, 0);
>> - }
>> + xlu_cfg_get_defbool(config, "e820_host", &b_info->e820_host,
>> 0);
>>
>> if (!xlu_cfg_get_list (config, "pci", &pcis, 0, 0)) {
>> d_config->num_pcidevs = 0;
>> @@ -1314,7 +1310,7 @@ skip_vfb:
>> d_config->num_pcidevs++;
>> }
>> if (d_config->num_pcidevs && c_info->type ==
>> LIBXL_DOMAIN_TYPE_PV)
>> - libxl_defbool_set(&b_info->u.pv.e820_host, true);
>> + libxl_defbool_set(&b_info->e820_host, true);
>> }
>>
>> switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
>> diff --git a/tools/libxl/xl_sxp.c b/tools/libxl/xl_sxp.c
>> index a16a025..f34f0ba 100644
>> --- a/tools/libxl/xl_sxp.c
>> +++ b/tools/libxl/xl_sxp.c
>> @@ -87,6 +87,10 @@ void printf_info_sexp(int domid,
>> libxl_domain_config *d_config)
>> }
>> }
>>
>> + printf("\t(e820_host %s)\n",
>> + libxl_defbool_to_string(b_info->e820_host));
>> +
>> +
>> printf("\t(image\n");
>> switch (c_info->type) {
>> case LIBXL_DOMAIN_TYPE_HVM:
>> @@ -150,8 +154,6 @@ void printf_info_sexp(int domid,
>> libxl_domain_config *d_config)
>> printf("\t\t\t(kernel %s)\n", b_info->u.pv.kernel);
>> printf("\t\t\t(cmdline %s)\n", b_info->u.pv.cmdline);
>> printf("\t\t\t(ramdisk %s)\n", b_info->u.pv.ramdisk);
>> - printf("\t\t\t(e820_host %s)\n",
>> - libxl_defbool_to_string(b_info->u.pv.e820_host));
>> printf("\t\t)\n");
>> break;
>> default:
>> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
>> index 874742c..4796221 100644
>> --- a/xen/arch/x86/domain.c
>> +++ b/xen/arch/x86/domain.c
>> @@ -566,10 +566,9 @@ int arch_domain_create(struct domain *d,
>> unsigned int domcr_flags)
>> {
>> /* 64-bit PV guest by default. */
>> d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
>> -
>> - spin_lock_init(&d->arch.pv_domain.e820_lock);
>> }
>>
>> + spin_lock_init(&d->arch.e820_lock);
>> /* initialize default tsc behavior in case tools don't */
>> tsc_set_info(d, TSC_MODE_DEFAULT, 0UL, 0, 0);
>> spin_lock_init(&d->arch.vtsc_lock);
>> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
>> index 54b1e6a..6c9b58c 100644
>> --- a/xen/arch/x86/hvm/hvm.c
>> +++ b/xen/arch/x86/hvm/hvm.c
>> @@ -3142,10 +3142,10 @@ static long hvm_memory_op(int cmd,
>> XEN_GUEST_HANDLE_PARAM(void) arg)
>>
>> switch ( cmd & MEMOP_CMD_MASK )
>> {
>> - case XENMEM_memory_map:
>> case XENMEM_machine_memory_map:
>> case XENMEM_machphys_mapping:
>> return -ENOSYS;
>> + case XENMEM_memory_map:
>> case XENMEM_decrease_reservation:
>> rc = do_memory_op(cmd, arg);
>> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
>> 1;
>> @@ -3217,10 +3217,10 @@ static long hvm_memory_op_compat32(int cmd,
>> XEN_GUEST_HANDLE_PARAM(void) arg)
>>
>> switch ( cmd & MEMOP_CMD_MASK )
>> {
>> - case XENMEM_memory_map:
>> case XENMEM_machine_memory_map:
>> case XENMEM_machphys_mapping:
>> return -ENOSYS;
>> + case XENMEM_memory_map:
>> case XENMEM_decrease_reservation:
>> rc = compat_memory_op(cmd, arg);
>> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
>> 1;
>> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
>> index e7f0e13..4c3ce9a 100644
>> --- a/xen/arch/x86/mm.c
>> +++ b/xen/arch/x86/mm.c
>> @@ -4740,19 +4740,13 @@ long arch_memory_op(int op,
>> XEN_GUEST_HANDLE_PARAM(void) arg)
>> return rc;
>> }
>>
>> - if ( is_hvm_domain(d) )
>> - {
>> - rcu_unlock_domain(d);
>> - return -EPERM;
>> - }
>> -
>> e820 = xmalloc_array(e820entry_t, fmap.map.nr_entries);
>> if ( e820 == NULL )
>> {
>> rcu_unlock_domain(d);
>> return -ENOMEM;
>> }
>> -
>> +
>> if ( copy_from_guest(e820, fmap.map.buffer,
>> fmap.map.nr_entries) )
>> {
>> xfree(e820);
>> @@ -4760,11 +4754,11 @@ long arch_memory_op(int op,
>> XEN_GUEST_HANDLE_PARAM(void) arg)
>> return -EFAULT;
>> }
>>
>> - spin_lock(&d->arch.pv_domain.e820_lock);
>> - xfree(d->arch.pv_domain.e820);
>> - d->arch.pv_domain.e820 = e820;
>> - d->arch.pv_domain.nr_e820 = fmap.map.nr_entries;
>> - spin_unlock(&d->arch.pv_domain.e820_lock);
>> + spin_lock(&d->arch.e820_lock);
>> + xfree(d->arch.e820);
>> + d->arch.e820 = e820;
>> + d->arch.nr_e820 = fmap.map.nr_entries;
>> + spin_unlock(&d->arch.e820_lock);
>>
>> rcu_unlock_domain(d);
>> return rc;
>> @@ -4778,26 +4772,26 @@ long arch_memory_op(int op,
>> XEN_GUEST_HANDLE_PARAM(void) arg)
>> if ( copy_from_guest(&map, arg, 1) )
>> return -EFAULT;
>>
>> - spin_lock(&d->arch.pv_domain.e820_lock);
>> + spin_lock(&d->arch.e820_lock);
>>
>> /* Backwards compatibility. */
>> - if ( (d->arch.pv_domain.nr_e820 == 0) ||
>> - (d->arch.pv_domain.e820 == NULL) )
>> + if ( (d->arch.nr_e820 == 0) ||
>> + (d->arch.e820 == NULL) )
>> {
>> - spin_unlock(&d->arch.pv_domain.e820_lock);
>> + spin_unlock(&d->arch.e820_lock);
>> return -ENOSYS;
>> }
>>
>> - map.nr_entries = min(map.nr_entries,
>> d->arch.pv_domain.nr_e820);
>> - if ( copy_to_guest(map.buffer, d->arch.pv_domain.e820,
>> + map.nr_entries = min(map.nr_entries, d->arch.nr_e820);
>> + if ( copy_to_guest(map.buffer, d->arch.e820,
>> map.nr_entries) ||
>> __copy_to_guest(arg, &map, 1) )
>> {
>> - spin_unlock(&d->arch.pv_domain.e820_lock);
>> + spin_unlock(&d->arch.e820_lock);
>> return -EFAULT;
>> }
>>
>> - spin_unlock(&d->arch.pv_domain.e820_lock);
>> + spin_unlock(&d->arch.e820_lock);
>> return 0;
>> }
>>
>> diff --git a/xen/include/asm-x86/domain.h
>> b/xen/include/asm-x86/domain.h
>> index d79464d..c3f9f8e 100644
>> --- a/xen/include/asm-x86/domain.h
>> +++ b/xen/include/asm-x86/domain.h
>> @@ -234,11 +234,6 @@ struct pv_domain
>>
>> /* map_domain_page() mapping cache. */
>> struct mapcache_domain mapcache;
>> -
>> - /* Pseudophysical e820 map (XENMEM_memory_map). */
>> - spinlock_t e820_lock;
>> - struct e820entry *e820;
>> - unsigned int nr_e820;
>> };
>>
>> struct arch_domain
>> @@ -313,6 +308,11 @@ struct arch_domain
>> (possibly other cases in the future
>> */
>> uint64_t vtsc_kerncount; /* for hvm, counts all vtsc */
>> uint64_t vtsc_usercount; /* not used for hvm */
>> +
>> + /* Pseudophysical e820 map (XENMEM_memory_map). */
>> + spinlock_t e820_lock;
>> + struct e820entry *e820;
>> + unsigned int nr_e820;
>> } __cacheline_aligned;
>>
>> #define has_arch_pdevs(d) (!list_empty(&(d)->arch.pdev_list))
>>
>> _______________________________________________
>> Xen-devel mailing list
>> Xen-devel@lists.xen.org
>> http://lists.xen.org/xen-devel
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 2:04 ` Konrad Rzeszutek Wilk
2013-09-05 9:41 ` Gordan Bobic
@ 2013-09-05 10:26 ` Gordan Bobic
2013-09-05 12:38 ` Konrad Rzeszutek Wilk
2013-09-05 21:13 ` Gordan Bobic
2 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 10:26 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Wed, 4 Sep 2013 22:04:42 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> diff --git a/tools/firmware/hvmloader/e820.h
> b/tools/firmware/hvmloader/e820.h
> index b2ead7f..2fa700d 100644
> --- a/tools/firmware/hvmloader/e820.h
> +++ b/tools/firmware/hvmloader/e820.h
> @@ -8,6 +8,9 @@
> #define E820_RESERVED 2
> #define E820_ACPI 3
> #define E820_NVS 4
> +#define E820_UNUSABLE 5
> +
> +#define E820MAX 128
>
> struct e820entry {
> uint64_t addr;
I don't think we actually need
+#define E820_UNUSABLE 5
any more because it is no longer used anywhere
in the patch. Do we need that extra e820 hole type?
I guess it's only useful if we want to explicitly
signify that a memory hole is inherited from
the host e820 map, rather than _really_ needed.
Otherwise we could probably just use E820_RESERVED
in it's place.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 10:00 ` Gordan Bobic
@ 2013-09-05 12:36 ` Konrad Rzeszutek Wilk
0 siblings, 0 replies; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-05 12:36 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
Gordan Bobic <gordan@bobich.net> wrote:
> On Thu, 05 Sep 2013 10:41:09 +0100, Gordan Bobic <gordan@bobich.net>
> wrote:
>> Hmm...
>>
>> gcc -O2 -fomit-frame-pointer -m64 -fno-strict-aliasing -std=gnu99
>> -Wall -Wstrict-prototypes -Wdeclaration-after-statement
>> -Wno-unused-but-set-variable -DNDEBUG -fno-builtin -fno-common
>> -Wredundant-decls -iwithprefix include -Werror -Wno-pointer-arith
>> -pipe -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include
>> -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-generic
>> -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-default
>> -msoft-float -fno-stack-protector -fno-exceptions -Wnested-externs
>> -mno-red-zone -mno-sse -fpic -fno-asynchronous-unwind-tables
>> -DGCC_HAS_VISIBILITY_ATTRIBUTE -nostdinc -g -D__XEN__ -include
>> /root/rpmbuild/BUILD/xen-4.3.0/xen/include/xen/config.h -DHAS_ACPI
>> -DHAS_GDBSX -DHAS_PASSTHROUGH -MMD -MF .debug.o.d -c debug.c -o
>> debug.o
>> gcc -O2 -fomit-frame-pointer -m64 -fno-strict-aliasing -std=gnu99
>> -Wall -Wstrict-prototypes -Wdeclaration-after-statement
>> -Wno-unused-but-set-variable -DNDEBUG -fno-builtin -fno-common
>> -Wredundant-decls -iwithprefix include -Werror -Wno-pointer-arith
>> -pipe -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include
>> -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-generic
>> -I/root/rpmbuild/BUILD/xen-4.3.0/xen/include/asm-x86/mach-default
>> -msoft-float -fno-stack-protector -fno-exceptions -Wnested-externs
>> -mno-red-zone -mno-sse -fpic -fno-asynchronous-unwind-tables
>> -DGCC_HAS_VISIBILITY_ATTRIBUTE -nostdinc -g -D__XEN__ -include
>> /root/rpmbuild/BUILD/xen-4.3.0/xen/include/xen/config.h -DHAS_ACPI
>> -DHAS_GDBSX -DHAS_PASSTHROUGH -MMD -MF .domain.o.d -c domain.c -o
>> domain.o
>> domain.c: In function ‘arch_domain_destroy’:
>> domain.c:595: error: ‘struct pv_domain’ has no member named ‘e820’
>> make[4]: *** [domain.o] Error 1
>>
>> It would seem you omitted this block from the original patch:
>>
>> ===
>> @@ -592,8 +592,8 @@ void arch_domain_destroy(struct domain *d)
>> {
>> if ( is_hvm_domain(d) )
>> hvm_domain_destroy(d);
>> - else
>> - xfree(d->arch.pv_domain.e820);
>> +
>> + xfree(d->arch.e820);
>>
>> free_domain_pirqs(d);
>> if ( !is_idle_domain(d) )
>> ===
>>
>> Was that intentional? Does that block look OK to you? Should I re-add
>
>> it?
>
> Just to clarify - re-adding this block fixes the build issue.
> Will test tonight whether it runs. What I really wanted to
> know is whether this is the correct way to handle the cleanup
> in this case.
It is correct. I must have messed up my tree after I tested it.
>
> Gordan
>
>> On Wed, 4 Sep 2013 22:04:42 -0400, Konrad Rzeszutek Wilk
>> <konrad.wilk@oracle.com> wrote:
>>> On Wed, Sep 04, 2013 at 02:11:06PM +0100, Gordan Bobic wrote:
>>>> I have this at the point where it actually builds.
>>>> Otherwise completely untested (will do that later today).
>>>>
>>>> Attached are:
>>>>
>>>> 1) libxl patch
>>>> Modified from the original patch to _not_ implicitly enable
>>>> e820_host when PCI devices are passed.
>>>>
>>>> 2) Mukesh's hypervisor e820 patch from here:
>>>> http://lists.xen.org/archives/html/xen-devel/2013-05/msg01603.html
>>>> Modified slightly to attempt to address Jan's comment on the same
>>>> thread, and to adjust the diff line pointers to match against
>>>> 4.3.0 release code.
>>>
>>> I think that was the old version. I spotted a bug in it that
>>> was causing a hang. And also the one that explains why libxl
>>> would refuse to setup the E820.
>>>
>>> The problem was that in the XENMEM_set_memory_map there was
>>> a check to make sure that the guest launched was not HVM.
>>>
>>> Also there was bug in the initial domain creation where
>>> the spinlock was only set for PV and not for HVM.
>>>
>>>>
>>>> 3) A patch based on Konrad's earlier in this thread, with
>>>> a few additions and changes to make it all compile.
>>>>
>>>> Some peer review would be most welcome - this is my first
>>>> venture into Xen code, so please do assume that I have
>>>> no idea what I'm doing at the moment. :)
>>>>
>>>> I added yet another E820MAX #define, this time to
>>>> tools/firmware/hvmloader/e820.h
>>>>
>>>> If there is a better place to #include that via from
>>>> e820.c, please point me in the right direction.
>>>
>>> I think I saw that #define in tools/libxc/xenctrl.h. But since
>>> the tools/firmware cannot link to the libxc (b/c it is a
>>> Minicontained
>>> OS) I believe just having the #define in hvmloader/e820.h is
>>> the right call.
>>>
>>> Good first pass. I altered it a bit and got in the HVM guest
>>> the E820 entries printed out. Here is a big giant diff:
>>>
>>> diff --git a/tools/firmware/hvmloader/e820.c
>>> b/tools/firmware/hvmloader/e820.c
>>> index 2e05e93..3c80241 100644
>>> --- a/tools/firmware/hvmloader/e820.c
>>> +++ b/tools/firmware/hvmloader/e820.c
>>> @@ -22,6 +22,9 @@
>>>
>>> #include "config.h"
>>> #include "util.h"
>>> +#include "hypercall.h"
>>> +#include <xen/memory.h>
>>> +#include <errno.h>
>>>
>>> void dump_e820_table(struct e820entry *e820, unsigned int nr)
>>> {
>>> @@ -74,10 +77,20 @@ int build_e820_table(struct e820entry *e820,
>>> unsigned int bios_image_base)
>>> {
>>> unsigned int nr = 0;
>>> + struct xen_memory_map op;
>>> + struct e820entry map[E820MAX];
>>> + int rc;
>>>
>>> if ( !lowmem_reserved_base )
>>> lowmem_reserved_base = 0xA0000;
>>>
>>> + set_xen_guest_handle(op.buffer, map);
>>> +
>>> + rc = hypercall_memory_op ( XENMEM_memory_map, &op);
>>> + if ( rc != -ENOSYS) { /* It works!? */
>>> + printf("%s:%d got %d op.nr_entries \n", __func__, __LINE__,
>>> op.nr_entries);
>>> + dump_e820_table(&map[0], op.nr_entries);
>>> + }
>>> /* Lowmem must be at least 512K to keep Windows happy) */
>>> ASSERT ( lowmem_reserved_base > 512<<10 );
>>>
>>> diff --git a/tools/firmware/hvmloader/e820.h
>>> b/tools/firmware/hvmloader/e820.h
>>> index b2ead7f..2fa700d 100644
>>> --- a/tools/firmware/hvmloader/e820.h
>>> +++ b/tools/firmware/hvmloader/e820.h
>>> @@ -8,6 +8,9 @@
>>> #define E820_RESERVED 2
>>> #define E820_ACPI 3
>>> #define E820_NVS 4
>>> +#define E820_UNUSABLE 5
>>> +
>>> +#define E820MAX 128
>>>
>>> struct e820entry {
>>> uint64_t addr;
>>> diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_create.c
>>> index 0c32d0b..d8e2346 100644
>>> --- a/tools/libxl/libxl_create.c
>>> +++ b/tools/libxl/libxl_create.c
>>> @@ -208,6 +208,8 @@ int
>>> libxl__domain_build_info_setdefault(libxl__gc *gc,
>>>
>>> libxl_defbool_setdefault(&b_info->disable_migrate, false);
>>>
>>> + libxl_defbool_setdefault(&b_info->e820_host, false);
>>> +
>>> switch (b_info->type) {
>>> case LIBXL_DOMAIN_TYPE_HVM:
>>> if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
>>> @@ -280,7 +282,6 @@ int
>>> libxl__domain_build_info_setdefault(libxl__gc *gc,
>>>
>>> break;
>>> case LIBXL_DOMAIN_TYPE_PV:
>>> - libxl_defbool_setdefault(&b_info->u.pv.e820_host, false);
>>> if (b_info->shadow_memkb == LIBXL_MEMKB_DEFAULT)
>>> b_info->shadow_memkb = 0;
>>> if (b_info->u.pv.slack_memkb == LIBXL_MEMKB_DEFAULT)
>>> diff --git a/tools/libxl/libxl_types.idl
>>> b/tools/libxl/libxl_types.idl
>>> index 85341a0..fd6389a 100644
>>> --- a/tools/libxl/libxl_types.idl
>>> +++ b/tools/libxl/libxl_types.idl
>>> @@ -299,6 +299,8 @@ libxl_domain_build_info =
>>> Struct("domain_build_info",[
>>> ("irqs", Array(uint32, "num_irqs")),
>>> ("iomem", Array(libxl_iomem_range, "num_iomem")),
>>> ("claim_mode", libxl_defbool),
>>> + # Use host's E820 for PCI passthrough.
>>> + ("e820_host", libxl_defbool),
>>> ("u", KeyedUnion(None, libxl_domain_type, "type",
>>> [("hvm", Struct(None, [("firmware",
>>> string),
>>> ("bios",
>>> libxl_bios_type),
>>> @@ -345,8 +347,6 @@ libxl_domain_build_info =
>>> Struct("domain_build_info",[
>>> ("cmdline", string),
>>> ("ramdisk", string),
>>> ("features", string,
>>> {'const': True}),
>>> - # Use host's E820 for PCI
>>> passthrough.
>>> - ("e820_host", libxl_defbool),
>>> ])),
>>> ("invalid", Struct(None, [])),
>>> ], keyvar_init_val =
>>> "LIBXL_DOMAIN_TYPE_INVALID")),
>>> diff --git a/tools/libxl/libxl_x86.c b/tools/libxl/libxl_x86.c
>>> index a78c91d..94515a5 100644
>>> --- a/tools/libxl/libxl_x86.c
>>> +++ b/tools/libxl/libxl_x86.c
>>> @@ -216,28 +216,41 @@ static int libxl__e820_alloc(libxl__gc *gc,
>>> uint32_t domid,
>>> struct e820entry map[E820MAX];
>>> libxl_domain_build_info *b_info;
>>>
>>> - if (d_config == NULL || d_config->c_info.type ==
>>> LIBXL_DOMAIN_TYPE_HVM)
>>> - return ERROR_INVAL;
>>> -
>>> b_info = &d_config->b_info;
>>> - if (!libxl_defbool_val(b_info->u.pv.e820_host))
>>> + if (!libxl_defbool_val(b_info->e820_host)) {
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.",__func__,
>>> __LINE__);
>>> return ERROR_INVAL;
>>> -
>>> + }
>>> rc = xc_get_machine_memory_map(ctx->xch, map, E820MAX);
>>> if (rc < 0) {
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.",__func__,
>>> __LINE__);
>>> errno = rc;
>>> return ERROR_FAIL;
>>> }
>>> nr = rc;
>>> - rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
>>> - (b_info->max_memkb - b_info->target_memkb) +
>>> - b_info->u.pv.slack_memkb);
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.nr:%d",__func__,
>>> __LINE__, nr);
>>> + if (d_config == NULL || d_config->c_info.type ==
>>> LIBXL_DOMAIN_TYPE_HVM) {
>>> + rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
>>> + (b_info->max_memkb -
>>> b_info->target_memkb));
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>>> "%s:%d.rc%d",__func__, __LINE__, rc);
>>> + } else if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV) {
>>> + rc = e820_sanitize(ctx, map, &nr, b_info->target_memkb,
>>> + (b_info->max_memkb -
>>> b_info->target_memkb) +
>>> + b_info->u.pv.slack_memkb);
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>>> "%s:%d.rc%d",__func__, __LINE__, rc);
>>> + }
>>> +
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>>> "%s:%d.rc%d",__func__, __LINE__, rc);
>>> if (rc)
>>> return ERROR_FAIL;
>>>
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR, "%s:%d.rc%d,
>>> nr:%d",__func__, __LINE__, rc, nr);
>>> +
>>> rc = xc_domain_set_memory_map(ctx->xch, domid, map, nr);
>>>
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>>> "%s:%d.rc%d",__func__, __LINE__, rc);
>>> if (rc < 0) {
>>> + LIBXL__LOG_ERRNO(ctx, LIBXL__LOG_ERROR,
>>> "%s:%d.rc%d",__func__, __LINE__, rc);
>>> errno = rc;
>>> return ERROR_FAIL;
>>> }
>>> @@ -296,8 +309,7 @@ int libxl__arch_domain_create(libxl__gc *gc,
>>> libxl_domain_config *d_config,
>>> xc_shadow_control(ctx->xch, domid,
>>> XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION, NULL, 0, &shadow, 0, NULL);
>>> }
>>>
>>> - if (d_config->c_info.type == LIBXL_DOMAIN_TYPE_PV &&
>>> - libxl_defbool_val(d_config->b_info.u.pv.e820_host)) {
>>> + if (libxl_defbool_val(d_config->b_info.e820_host)) {
>>> ret = libxl__e820_alloc(gc, domid, d_config);
>>> if (ret) {
>>> LIBXL__LOG_ERRNO(gc->owner, LIBXL__LOG_ERROR,
>>> diff --git a/tools/libxl/xl_cmdimpl.c b/tools/libxl/xl_cmdimpl.c
>>> index ed99622..d98ca24 100644
>>> --- a/tools/libxl/xl_cmdimpl.c
>>> +++ b/tools/libxl/xl_cmdimpl.c
>>> @@ -1291,11 +1291,7 @@ skip_vfb:
>>> if (!xlu_cfg_get_long (config, "pci_permissive", &l, 0))
>>> pci_permissive = l;
>>>
>>> - /* To be reworked (automatically enabled) once the auto
>>> ballooning
>>> - * after guest starts is done (with PCI devices passed in). */
>>> - if (c_info->type == LIBXL_DOMAIN_TYPE_PV) {
>>> - xlu_cfg_get_defbool(config, "e820_host",
>>> &b_info->u.pv.e820_host, 0);
>>> - }
>>> + xlu_cfg_get_defbool(config, "e820_host", &b_info->e820_host,
>>> 0);
>>>
>>> if (!xlu_cfg_get_list (config, "pci", &pcis, 0, 0)) {
>>> d_config->num_pcidevs = 0;
>>> @@ -1314,7 +1310,7 @@ skip_vfb:
>>> d_config->num_pcidevs++;
>>> }
>>> if (d_config->num_pcidevs && c_info->type ==
>>> LIBXL_DOMAIN_TYPE_PV)
>>> - libxl_defbool_set(&b_info->u.pv.e820_host, true);
>>> + libxl_defbool_set(&b_info->e820_host, true);
>>> }
>>>
>>> switch (xlu_cfg_get_list(config, "cpuid", &cpuids, 0, 1)) {
>>> diff --git a/tools/libxl/xl_sxp.c b/tools/libxl/xl_sxp.c
>>> index a16a025..f34f0ba 100644
>>> --- a/tools/libxl/xl_sxp.c
>>> +++ b/tools/libxl/xl_sxp.c
>>> @@ -87,6 +87,10 @@ void printf_info_sexp(int domid,
>>> libxl_domain_config *d_config)
>>> }
>>> }
>>>
>>> + printf("\t(e820_host %s)\n",
>>> + libxl_defbool_to_string(b_info->e820_host));
>>> +
>>> +
>>> printf("\t(image\n");
>>> switch (c_info->type) {
>>> case LIBXL_DOMAIN_TYPE_HVM:
>>> @@ -150,8 +154,6 @@ void printf_info_sexp(int domid,
>>> libxl_domain_config *d_config)
>>> printf("\t\t\t(kernel %s)\n", b_info->u.pv.kernel);
>>> printf("\t\t\t(cmdline %s)\n", b_info->u.pv.cmdline);
>>> printf("\t\t\t(ramdisk %s)\n", b_info->u.pv.ramdisk);
>>> - printf("\t\t\t(e820_host %s)\n",
>>> - libxl_defbool_to_string(b_info->u.pv.e820_host));
>>> printf("\t\t)\n");
>>> break;
>>> default:
>>> diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
>>> index 874742c..4796221 100644
>>> --- a/xen/arch/x86/domain.c
>>> +++ b/xen/arch/x86/domain.c
>>> @@ -566,10 +566,9 @@ int arch_domain_create(struct domain *d,
>>> unsigned int domcr_flags)
>>> {
>>> /* 64-bit PV guest by default. */
>>> d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
>>> -
>>> - spin_lock_init(&d->arch.pv_domain.e820_lock);
>>> }
>>>
>>> + spin_lock_init(&d->arch.e820_lock);
>>> /* initialize default tsc behavior in case tools don't */
>>> tsc_set_info(d, TSC_MODE_DEFAULT, 0UL, 0, 0);
>>> spin_lock_init(&d->arch.vtsc_lock);
>>> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
>>> index 54b1e6a..6c9b58c 100644
>>> --- a/xen/arch/x86/hvm/hvm.c
>>> +++ b/xen/arch/x86/hvm/hvm.c
>>> @@ -3142,10 +3142,10 @@ static long hvm_memory_op(int cmd,
>>> XEN_GUEST_HANDLE_PARAM(void) arg)
>>>
>>> switch ( cmd & MEMOP_CMD_MASK )
>>> {
>>> - case XENMEM_memory_map:
>>> case XENMEM_machine_memory_map:
>>> case XENMEM_machphys_mapping:
>>> return -ENOSYS;
>>> + case XENMEM_memory_map:
>>> case XENMEM_decrease_reservation:
>>> rc = do_memory_op(cmd, arg);
>>> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
>
>>> 1;
>>> @@ -3217,10 +3217,10 @@ static long hvm_memory_op_compat32(int cmd,
>>> XEN_GUEST_HANDLE_PARAM(void) arg)
>>>
>>> switch ( cmd & MEMOP_CMD_MASK )
>>> {
>>> - case XENMEM_memory_map:
>>> case XENMEM_machine_memory_map:
>>> case XENMEM_machphys_mapping:
>>> return -ENOSYS;
>>> + case XENMEM_memory_map:
>>> case XENMEM_decrease_reservation:
>>> rc = compat_memory_op(cmd, arg);
>>> current->domain->arch.hvm_domain.qemu_mapcache_invalidate =
>
>>> 1;
>>> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
>>> index e7f0e13..4c3ce9a 100644
>>> --- a/xen/arch/x86/mm.c
>>> +++ b/xen/arch/x86/mm.c
>>> @@ -4740,19 +4740,13 @@ long arch_memory_op(int op,
>>> XEN_GUEST_HANDLE_PARAM(void) arg)
>>> return rc;
>>> }
>>>
>>> - if ( is_hvm_domain(d) )
>>> - {
>>> - rcu_unlock_domain(d);
>>> - return -EPERM;
>>> - }
>>> -
>>> e820 = xmalloc_array(e820entry_t, fmap.map.nr_entries);
>>> if ( e820 == NULL )
>>> {
>>> rcu_unlock_domain(d);
>>> return -ENOMEM;
>>> }
>>> -
>>> +
>>> if ( copy_from_guest(e820, fmap.map.buffer,
>>> fmap.map.nr_entries) )
>>> {
>>> xfree(e820);
>>> @@ -4760,11 +4754,11 @@ long arch_memory_op(int op,
>>> XEN_GUEST_HANDLE_PARAM(void) arg)
>>> return -EFAULT;
>>> }
>>>
>>> - spin_lock(&d->arch.pv_domain.e820_lock);
>>> - xfree(d->arch.pv_domain.e820);
>>> - d->arch.pv_domain.e820 = e820;
>>> - d->arch.pv_domain.nr_e820 = fmap.map.nr_entries;
>>> - spin_unlock(&d->arch.pv_domain.e820_lock);
>>> + spin_lock(&d->arch.e820_lock);
>>> + xfree(d->arch.e820);
>>> + d->arch.e820 = e820;
>>> + d->arch.nr_e820 = fmap.map.nr_entries;
>>> + spin_unlock(&d->arch.e820_lock);
>>>
>>> rcu_unlock_domain(d);
>>> return rc;
>>> @@ -4778,26 +4772,26 @@ long arch_memory_op(int op,
>>> XEN_GUEST_HANDLE_PARAM(void) arg)
>>> if ( copy_from_guest(&map, arg, 1) )
>>> return -EFAULT;
>>>
>>> - spin_lock(&d->arch.pv_domain.e820_lock);
>>> + spin_lock(&d->arch.e820_lock);
>>>
>>> /* Backwards compatibility. */
>>> - if ( (d->arch.pv_domain.nr_e820 == 0) ||
>>> - (d->arch.pv_domain.e820 == NULL) )
>>> + if ( (d->arch.nr_e820 == 0) ||
>>> + (d->arch.e820 == NULL) )
>>> {
>>> - spin_unlock(&d->arch.pv_domain.e820_lock);
>>> + spin_unlock(&d->arch.e820_lock);
>>> return -ENOSYS;
>>> }
>>>
>>> - map.nr_entries = min(map.nr_entries,
>>> d->arch.pv_domain.nr_e820);
>>> - if ( copy_to_guest(map.buffer, d->arch.pv_domain.e820,
>>> + map.nr_entries = min(map.nr_entries, d->arch.nr_e820);
>>> + if ( copy_to_guest(map.buffer, d->arch.e820,
>>> map.nr_entries) ||
>>> __copy_to_guest(arg, &map, 1) )
>>> {
>>> - spin_unlock(&d->arch.pv_domain.e820_lock);
>>> + spin_unlock(&d->arch.e820_lock);
>>> return -EFAULT;
>>> }
>>>
>>> - spin_unlock(&d->arch.pv_domain.e820_lock);
>>> + spin_unlock(&d->arch.e820_lock);
>>> return 0;
>>> }
>>>
>>> diff --git a/xen/include/asm-x86/domain.h
>>> b/xen/include/asm-x86/domain.h
>>> index d79464d..c3f9f8e 100644
>>> --- a/xen/include/asm-x86/domain.h
>>> +++ b/xen/include/asm-x86/domain.h
>>> @@ -234,11 +234,6 @@ struct pv_domain
>>>
>>> /* map_domain_page() mapping cache. */
>>> struct mapcache_domain mapcache;
>>> -
>>> - /* Pseudophysical e820 map (XENMEM_memory_map). */
>>> - spinlock_t e820_lock;
>>> - struct e820entry *e820;
>>> - unsigned int nr_e820;
>>> };
>>>
>>> struct arch_domain
>>> @@ -313,6 +308,11 @@ struct arch_domain
>>> (possibly other cases in the future
>
>>> */
>>> uint64_t vtsc_kerncount; /* for hvm, counts all vtsc */
>>> uint64_t vtsc_usercount; /* not used for hvm */
>>> +
>>> + /* Pseudophysical e820 map (XENMEM_memory_map). */
>>> + spinlock_t e820_lock;
>>> + struct e820entry *e820;
>>> + unsigned int nr_e820;
>>> } __cacheline_aligned;
>>>
>>> #define has_arch_pdevs(d) (!list_empty(&(d)->arch.pdev_list))
>>>
>>> _______________________________________________
>>> Xen-devel mailing list
>>> Xen-devel@lists.xen.org
>>> http://lists.xen.org/xen-devel
>>
>>
>> _______________________________________________
>> Xen-devel mailing list
>> Xen-devel@lists.xen.org
>> http://lists.xen.org/xen-devel
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 10:26 ` Gordan Bobic
@ 2013-09-05 12:38 ` Konrad Rzeszutek Wilk
0 siblings, 0 replies; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-05 12:38 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
Gordan Bobic <gordan@bobich.net> wrote:
> On Wed, 4 Sep 2013 22:04:42 -0400, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
>
>> diff --git a/tools/firmware/hvmloader/e820.h
>> b/tools/firmware/hvmloader/e820.h
>> index b2ead7f..2fa700d 100644
>> --- a/tools/firmware/hvmloader/e820.h
>> +++ b/tools/firmware/hvmloader/e820.h
>> @@ -8,6 +8,9 @@
>> #define E820_RESERVED 2
>> #define E820_ACPI 3
>> #define E820_NVS 4
>> +#define E820_UNUSABLE 5
>> +
>> +#define E820MAX 128
>>
>> struct e820entry {
>> uint64_t addr;
>
> I don't think we actually need
> +#define E820_UNUSABLE 5
>
> any more because it is no longer used anywhere
> in the patch. Do we need that extra e820 hole type?
You could extend the dump_e820... code to print that type as well
> I guess it's only useful if we want to explicitly
> signify that a memory hole is inherited from
> the host e820 map, rather than _really_ needed.
> Otherwise we could probably just use E820_RESERVED
> in it's place.
Originally it was used to cover area that are RAM in the host but won't be RAM in the guest because the amount of memory the guest has is less then the physical amount.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 2:04 ` Konrad Rzeszutek Wilk
2013-09-05 9:41 ` Gordan Bobic
2013-09-05 10:26 ` Gordan Bobic
@ 2013-09-05 21:13 ` Gordan Bobic
2013-09-05 21:29 ` Gordan Bobic
` (2 more replies)
2 siblings, 3 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 21:13 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
Right, finally got around to trying this with the latest patch.
With e820_host=0 things work as before:
(XEN) HVM3: BIOS map:
(XEN) HVM3: f0000-fffff: Main BIOS
(XEN) HVM3: E820 table:
(XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
(XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
(XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
(XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
(XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
(XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
(XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
(XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
I seem to be getting two different E820 table dumps with e820_host=1:
(XEN) HVM1: BIOS map:
(XEN) HVM1: f0000-fffff: Main BIOS
(XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
(XEN) HVM1: E820 table:
(XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
(XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
(XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
(XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
(XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
(XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
(XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
(XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
(XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
(XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
(XEN) HVM1: E820 table:
(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
(XEN) HVM1: Invoking ROMBIOS ...
I cannot quite figure out what is going on here - these tables can't
both be true.
Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000 and
goes more or less contiguously up to 0xfec8b000.
Looking at dmesg on domU, the e820 map more or less matches the second
dump above.
So I guess that should work - the entire IOMEM area of the host is in
fact not mapped. But since I've passed 8GB of RAM to domU, shouldn't
there be another usable RAM area after 00000001:00000000 ?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 21:13 ` Gordan Bobic
@ 2013-09-05 21:29 ` Gordan Bobic
2013-09-05 21:46 ` Gordan Bobic
2013-09-05 22:23 ` Konrad Rzeszutek Wilk
2013-09-05 22:33 ` Gordan Bobic
2 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 21:29 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On 09/05/2013 10:13 PM, Gordan Bobic wrote:
> Right, finally got around to trying this with the latest patch.
>
> With e820_host=0 things work as before:
>
> (XEN) HVM3: BIOS map:
> (XEN) HVM3: f0000-fffff: Main BIOS
> (XEN) HVM3: E820 table:
> (XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> (XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> (XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
> (XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> (XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
> (XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
> (XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> (XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>
>
> I seem to be getting two different E820 table dumps with e820_host=1:
>
> (XEN) HVM1: BIOS map:
> (XEN) HVM1: f0000-fffff: Main BIOS
> (XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
> (XEN) HVM1: E820 table:
> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
> (XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
> (XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
> (XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
> (XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
> (XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
> (XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
> (XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
> (XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
> (XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
> (XEN) HVM1: E820 table:
> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> (XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> (XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
> (XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> (XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
> (XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
> (XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> (XEN) HVM1: Invoking ROMBIOS ...
>
> I cannot quite figure out what is going on here - these tables can't
> both be true.
>
> Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000 and
> goes more or less contiguously up to 0xfec8b000.
>
> Looking at dmesg on domU, the e820 map more or less matches the second
> dump above.
>
> So I guess that should work - the entire IOMEM area of the host is in
> fact not mapped. But since I've passed 8GB of RAM to domU, shouldn't
> there be another usable RAM area after 00000001:00000000 ?
I should probably also mention that the domU does in fact see 8GB of
RAM, so clearly it is working.
The PCI IOMEM reservations on the host are:
# lspci -vvv | grep Region | grep Memory | sed -e 's/.*Memory at //' | sort
a8000000 (64-bit, prefetchable) [disabled] [size=128M]
b0000000 (64-bit, prefetchable) [disabled] [size=64M]
b4000000 (64-bit, prefetchable) [size=64M]
b8000000 (64-bit, prefetchable) [size=128M]
c0000000 (64-bit, prefetchable) [size=256M]
d7efc000 (32-bit, non-prefetchable) [size=16K]
d8000000 (64-bit, non-prefetchable) [size=64K]
dc000000 (64-bit, non-prefetchable) [size=16K]
f3df4000 (64-bit, non-prefetchable) [size=16K]
f3df8000 (32-bit, non-prefetchable) [size=1K]
f3dfa000 (32-bit, non-prefetchable) [size=1K]
f3dfc000 (32-bit, non-prefetchable) [size=2K]
f3dfe000 (64-bit, non-prefetchable) [size=256]
f3edc000 (64-bit, non-prefetchable) [size=16K]
f3fdc000 (64-bit, non-prefetchable) [size=16K]
f4000000 (32-bit, non-prefetchable) [disabled] [size=32M]
f7ffc000 (32-bit, non-prefetchable) [disabled] [size=16K]
f8000000 (32-bit, non-prefetchable) [size=32M]
fbcfc000 (32-bit, non-prefetchable) [size=16K]
fbdfe000 (64-bit, non-prefetchable) [disabled] [size=8K]
fbeef000 (32-bit, non-prefetchable) [size=2K]
fbeefc00 (32-bit, non-prefetchable) [size=16]
fec8a000 (32-bit, non-prefetchable) [size=4K]
What is a little concerning is that my GPU in dom0 has it's IOMEM mapped at
E0000000-E7FFFFFF
E8000000-EBFFFFFF
EC000000-EDFFFFFF
Granted, this fits into a convenient hole in the host map
0xdc004000-0xf3df4000 but I cannot see that hole being listed as such in
the xl dmesg E820 table dump. Is this _really_ working, or is it working
by pure luck?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 21:29 ` Gordan Bobic
@ 2013-09-05 21:46 ` Gordan Bobic
0 siblings, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 21:46 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On 09/05/2013 10:29 PM, Gordan Bobic wrote:
> On 09/05/2013 10:13 PM, Gordan Bobic wrote:
>> Right, finally got around to trying this with the latest patch.
>>
>> With e820_host=0 things work as before:
>>
>> (XEN) HVM3: BIOS map:
>> (XEN) HVM3: f0000-fffff: Main BIOS
>> (XEN) HVM3: E820 table:
>> (XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> (XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> (XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
>> (XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> (XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
>> (XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
>> (XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> (XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>>
>>
>> I seem to be getting two different E820 table dumps with e820_host=1:
>>
>> (XEN) HVM1: BIOS map:
>> (XEN) HVM1: f0000-fffff: Main BIOS
>> (XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>> (XEN) HVM1: E820 table:
>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>> (XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>> (XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>> (XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>> (XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>> (XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>> (XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>> (XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>> (XEN) HVM1: E820 table:
>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> (XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>> (XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> (XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>> (XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>> (XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> (XEN) HVM1: Invoking ROMBIOS ...
>>
>> I cannot quite figure out what is going on here - these tables can't
>> both be true.
>>
>> Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000 and
>> goes more or less contiguously up to 0xfec8b000.
>>
>> Looking at dmesg on domU, the e820 map more or less matches the second
>> dump above.
>>
>> So I guess that should work - the entire IOMEM area of the host is in
>> fact not mapped. But since I've passed 8GB of RAM to domU, shouldn't
>> there be another usable RAM area after 00000001:00000000 ?
>
> I should probably also mention that the domU does in fact see 8GB of
> RAM, so clearly it is working.
>
> The PCI IOMEM reservations on the host are:
> # lspci -vvv | grep Region | grep Memory | sed -e 's/.*Memory at //' | sort
> a8000000 (64-bit, prefetchable) [disabled] [size=128M]
> b0000000 (64-bit, prefetchable) [disabled] [size=64M]
> b4000000 (64-bit, prefetchable) [size=64M]
> b8000000 (64-bit, prefetchable) [size=128M]
> c0000000 (64-bit, prefetchable) [size=256M]
> d7efc000 (32-bit, non-prefetchable) [size=16K]
> d8000000 (64-bit, non-prefetchable) [size=64K]
> dc000000 (64-bit, non-prefetchable) [size=16K]
> f3df4000 (64-bit, non-prefetchable) [size=16K]
> f3df8000 (32-bit, non-prefetchable) [size=1K]
> f3dfa000 (32-bit, non-prefetchable) [size=1K]
> f3dfc000 (32-bit, non-prefetchable) [size=2K]
> f3dfe000 (64-bit, non-prefetchable) [size=256]
> f3edc000 (64-bit, non-prefetchable) [size=16K]
> f3fdc000 (64-bit, non-prefetchable) [size=16K]
> f4000000 (32-bit, non-prefetchable) [disabled] [size=32M]
> f7ffc000 (32-bit, non-prefetchable) [disabled] [size=16K]
> f8000000 (32-bit, non-prefetchable) [size=32M]
> fbcfc000 (32-bit, non-prefetchable) [size=16K]
> fbdfe000 (64-bit, non-prefetchable) [disabled] [size=8K]
> fbeef000 (32-bit, non-prefetchable) [size=2K]
> fbeefc00 (32-bit, non-prefetchable) [size=16]
> fec8a000 (32-bit, non-prefetchable) [size=4K]
>
>
> What is a little concerning is that my GPU in dom0 has it's IOMEM mapped at
> E0000000-E7FFFFFF
> E8000000-EBFFFFFF
> EC000000-EDFFFFFF
>
> Granted, this fits into a convenient hole in the host map
> 0xdc004000-0xf3df4000 but I cannot see that hole being listed as such in
> the xl dmesg E820 table dump. Is this _really_ working, or is it working
> by pure luck?
Just doing a bit of testing at the moment. I haven't had a crash yet (it
would have happened by now, as things were before). But - I am
definitely getting the sort of graphical glitching/corruption in 3D
applications that I saw before when assigning > 2688MB of RAM to the
domU. That implies that there is still some memory overwriting happening
somewhere.
Aaand just as I was tying that - I've just had a crash. :'(
Back to the drawing board...
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 21:13 ` Gordan Bobic
2013-09-05 21:29 ` Gordan Bobic
@ 2013-09-05 22:23 ` Konrad Rzeszutek Wilk
2013-09-05 22:42 ` Gordan Bobic
2013-09-05 22:45 ` Gordan Bobic
2013-09-05 22:33 ` Gordan Bobic
2 siblings, 2 replies; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-05 22:23 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
Gordan Bobic <gordan@bobich.net> wrote:
>Right, finally got around to trying this with the latest patch.
>
>With e820_host=0 things work as before:
>
>(XEN) HVM3: BIOS map:
>(XEN) HVM3: f0000-fffff: Main BIOS
>(XEN) HVM3: E820 table:
>(XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>(XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>(XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
>(XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>(XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
>(XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
>(XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>(XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>
>
>I seem to be getting two different E820 table dumps with e820_host=1:
>
>(XEN) HVM1: BIOS map:
>(XEN) HVM1: f0000-fffff: Main BIOS
>(XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>(XEN) HVM1: E820 table:
>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>(XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>(XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>(XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>(XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>(XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>(XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>(XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>(XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>(XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>(XEN) HVM1: E820 table:
>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>(XEN) HVM1: Invoking ROMBIOS ...
>
>I cannot quite figure out what is going on here - these tables can't
>both be true.
>
Right. The code just prints the E820 that was constructed b/c of the e820_host =1 parameter as the first output. Then the second one is what was constructed originally.
The code that would tie in the E820 from the hyper call and the alter how the hvmloader sets it up is not yet done.
>Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000 and
>goes more or less contiguously up to 0xfec8b000.
>
>Looking at dmesg on domU, the e820 map more or less matches the second
>dump above.
Right. That is correct since the patch I sent just outputs stuff. No real changes to the E820 yet.
>
>So I guess that should work - the entire IOMEM area of the host is in
>fact not mapped. But since I've passed 8GB of RAM to domU, shouldn't
>there be another usable RAM area after 00000001:00000000 ?
>
>Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 21:13 ` Gordan Bobic
2013-09-05 21:29 ` Gordan Bobic
2013-09-05 22:23 ` Konrad Rzeszutek Wilk
@ 2013-09-05 22:33 ` Gordan Bobic
2013-09-06 13:04 ` Konrad Rzeszutek Wilk
2 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 22:33 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On 09/05/2013 10:13 PM, Gordan Bobic wrote:
> I seem to be getting two different E820 table dumps with e820_host=1:
>
> (XEN) HVM1: BIOS map:
> (XEN) HVM1: f0000-fffff: Main BIOS
> (XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
> (XEN) HVM1: E820 table:
> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
> (XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
> (XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
> (XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
> (XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
> (XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
> (XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
> (XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
> (XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
> (XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
I get it - this is the host e820 map. In dom0, dmesg shows:
e820: BIOS-provided physical RAM map:
Xen: [mem 0x0000000000000000-0x000000000009cfff] usable
Xen: [mem 0x000000000009d000-0x00000000000fffff] reserved
Xen: [mem 0x0000000000100000-0x000000003f78ffff] usable
Xen: [mem 0x000000003f790000-0x000000003f79dfff] ACPI data
Xen: [mem 0x000000003f79e000-0x000000003f7cffff] ACPI NVS
Xen: [mem 0x000000003f7d0000-0x000000003f7dffff] reserved
Xen: [mem 0x000000003f7e7000-0x000000003fffffff] reserved
Xen: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
Xen: [mem 0x00000000ffc00000-0x00000000ffffffff] reserved
Xen: [mem 0x0000000100000000-0x0000000cbfffffff] usable
That tallies up with the above map exactly. So far so good. Not sure if
the following is relevant, but here it is anyway just in case:
e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
e820: remove [mem 0x000a0000-0x000fffff] usable
[...]
e820: last_pfn = 0xcc0000 max_arch_pfn = 0x400000000
e820: last_pfn = 0x3f790 max_arch_pfn = 0x400000000
[...]
Zone ranges:
DMA [mem 0x00001000-0x00ffffff]
DMA32 [mem 0x01000000-0xffffffff]
Normal [mem 0x100000000-0xcbfffffff]
[...]
e820: [mem 0x40000000-0xfedfffff] available for PCI devices
> (XEN) HVM1: E820 table:
> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> (XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> (XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
> (XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> (XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
> (XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
> (XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> (XEN) HVM1: Invoking ROMBIOS ...
Comparing this to the above, it seems that 9d000-9e000 is marked as
reserved in dom0, but RAM in domU. Am I right in thinking that
dom0(usable) == domU(RAM) in terms of meaning?
What does "HOLE" actually mean in domU? Does it mean this space is OK to
map domU IOMEM into? Or something else? Either way full possible chasl
summary:
dom0: reserved 9d000-9e000
domU: RAM 9d000-9e000
dom0: reserved a0000-dffff
domU: HOLE a0000-dffff
dom0: ACPI data 3f790000-3f79dfff
dom0: ACPI NVS 3f79e000-3f7cffff
dom0: reserved 3f7d0000-3f7dffff
dom0: reserved
domU: RAM 00100000-a7800000
Then there seems to be a hole in dom0:
40000000-fedfffff which talles up with the dom0 dmesg output above about
it being for the PCI devices, i.e. that's the IOMEM region (from 1GB to
a lilttle under 4GB).
But in domU, the 40000000-a77fffff is available as RAM.
On the face of it, that's actually fine - my PCI IOMEM mappings show the
lowest mapping (according to lspci -vvv) starts at a8000000, which falls
into the domU area marked as "HOLE" (a7800000-fc000000). And this does
in fact appears to be where domU maps the GPU in both of my VMs:
E0000000-E7FFFFFF
E8000000-EBFFFFFF
EC000000-EDFFFFFF
and this doesn't overlap with any mapped PCI IOMEM according to lspci.
If we assume that anything below a8000000 doesn't actually matter in
this case (since if I give up to a8000000 memory to a domU everything
works absolutely fine indefinitely, I am at a loss to explain what is
actually going wrong and why the crash is still occuring - unless some
other piece of hardware is having it's domU IOMEM mapped somewhere in
the range f3df4000-fec8b000 and that is causing a memory overwrite.
I am just not seeing any obvious memory stomp at the moment...
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 22:23 ` Konrad Rzeszutek Wilk
@ 2013-09-05 22:42 ` Gordan Bobic
2013-09-06 13:09 ` Konrad Rzeszutek Wilk
2013-09-05 22:45 ` Gordan Bobic
1 sibling, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 22:42 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On 09/05/2013 11:23 PM, Konrad Rzeszutek Wilk wrote:
> Gordan Bobic <gordan@bobich.net> wrote:
>> Right, finally got around to trying this with the latest patch.
>>
>> With e820_host=0 things work as before:
>>
>> (XEN) HVM3: BIOS map:
>> (XEN) HVM3: f0000-fffff: Main BIOS
>> (XEN) HVM3: E820 table:
>> (XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> (XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> (XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
>> (XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> (XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
>> (XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
>> (XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> (XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>>
>>
>> I seem to be getting two different E820 table dumps with e820_host=1:
>>
>> (XEN) HVM1: BIOS map:
>> (XEN) HVM1: f0000-fffff: Main BIOS
>> (XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>> (XEN) HVM1: E820 table:
>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>> (XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>> (XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>> (XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>> (XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>> (XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>> (XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>> (XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>> (XEN) HVM1: E820 table:
>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> (XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>> (XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> (XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>> (XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>> (XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> (XEN) HVM1: Invoking ROMBIOS ...
>>
>> I cannot quite figure out what is going on here - these tables can't
>> both be true.
>>
>
> Right. The code just prints the E820 that was constructed b/c of the e820_host =1 parameter as the first output. Then the second one is what was constructed originally.
>
> The code that would tie in the E820 from the hyper call and the alter how the hvmloader sets it up is not yet done.
>
>
>> Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000 and
>> goes more or less contiguously up to 0xfec8b000.
>>
>> Looking at dmesg on domU, the e820 map more or less matches the second
>> dump above.
>
> Right. That is correct since the patch I sent just outputs stuff. No real changes to the E820 yet.
/me *facepalms*
That indeed explains everything. :)
But having had a thorough look through the memory mappings (see my other
long, rambling email), I don't actually see an obvious area where RAM
might overwrite a dom0 IOMEM range - assuming the "HOLE" part isn't
mapped as RAM in domU.
Or to summarize:
dom0 PCI IOMEM actually has mappings from a8000000 onward, and giving
domU up to that much memory works fine. So the memory stomp must be
happening from a8000000 onward. But - the only things above that address
in domU are the HOLE up to fc000000 and RESERVED up to ffffffff. So no
domU memory is getting mapped into the IOMEM range anyway - which begs
the question of what is _actually_ causing the crash. Stuff I haven't
yet found in domU getting mapped into the a7800000-fc000000 hole
overlapping dom0 IOMEM? SeaBIOS doing smething odd in the
fc000000-fec8b000 range marked RESERVED in domU?
Or am I reading this all wrong?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 22:23 ` Konrad Rzeszutek Wilk
2013-09-05 22:42 ` Gordan Bobic
@ 2013-09-05 22:45 ` Gordan Bobic
2013-09-05 23:01 ` Konrad Rzeszutek Wilk
1 sibling, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-05 22:45 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On 09/05/2013 11:23 PM, Konrad Rzeszutek Wilk wrote:
> Gordan Bobic <gordan@bobich.net> wrote:
>> Right, finally got around to trying this with the latest patch.
>>
>> With e820_host=0 things work as before:
>>
>> (XEN) HVM3: BIOS map:
>> (XEN) HVM3: f0000-fffff: Main BIOS
>> (XEN) HVM3: E820 table:
>> (XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> (XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> (XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
>> (XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> (XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
>> (XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
>> (XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> (XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>>
>>
>> I seem to be getting two different E820 table dumps with e820_host=1:
>>
>> (XEN) HVM1: BIOS map:
>> (XEN) HVM1: f0000-fffff: Main BIOS
>> (XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>> (XEN) HVM1: E820 table:
>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>> (XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>> (XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>> (XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>> (XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>> (XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>> (XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>> (XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>> (XEN) HVM1: E820 table:
>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> (XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> (XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>> (XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> (XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>> (XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>> (XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> (XEN) HVM1: Invoking ROMBIOS ...
>>
>> I cannot quite figure out what is going on here - these tables can't
>> both be true.
>>
>
> Right. The code just prints the E820 that was constructed b/c of the e820_host =1 parameter as the first output. Then the second one is what was constructed originally.
>
> The code that would tie in the E820 from the hyper call and the alter how the hvmloader sets it up is not yet done.
>
>
>> Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000 and
>> goes more or less contiguously up to 0xfec8b000.
>>
>> Looking at dmesg on domU, the e820 map more or less matches the second
>> dump above.
>
> Right. That is correct since the patch I sent just outputs stuff. No real changes to the E820 yet.
I thought this did that in hvmloader/e820c:
hypercall_memory_op ( XENMEM_memory_map, &op);
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 22:45 ` Gordan Bobic
@ 2013-09-05 23:01 ` Konrad Rzeszutek Wilk
2013-09-06 12:23 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-05 23:01 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
Gordan Bobic <gordan@bobich.net> wrote:
>On 09/05/2013 11:23 PM, Konrad Rzeszutek Wilk wrote:
>> Gordan Bobic <gordan@bobich.net> wrote:
>>> Right, finally got around to trying this with the latest patch.
>>>
>>> With e820_host=0 things work as before:
>>>
>>> (XEN) HVM3: BIOS map:
>>> (XEN) HVM3: f0000-fffff: Main BIOS
>>> (XEN) HVM3: E820 table:
>>> (XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>>> (XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>>> (XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
>>> (XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>>> (XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
>>> (XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
>>> (XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>>> (XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>>>
>>>
>>> I seem to be getting two different E820 table dumps with
>e820_host=1:
>>>
>>> (XEN) HVM1: BIOS map:
>>> (XEN) HVM1: f0000-fffff: Main BIOS
>>> (XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>>> (XEN) HVM1: E820 table:
>>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>>> (XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>>> (XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>>> (XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>>> (XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>>> (XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>>> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>>> (XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>>> (XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>>> (XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>>> (XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>>> (XEN) HVM1: E820 table:
>>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>>> (XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>>> (XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>>> (XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>>> (XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>>> (XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>>> (XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>>> (XEN) HVM1: Invoking ROMBIOS ...
>>>
>>> I cannot quite figure out what is going on here - these tables can't
>>> both be true.
>>>
>>
>> Right. The code just prints the E820 that was constructed b/c of the
>e820_host =1 parameter as the first output. Then the second one is
>what was constructed originally.
>>
>> The code that would tie in the E820 from the hyper call and the alter
>how the hvmloader sets it up is not yet done.
>>
>>
>>> Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000 and
>>> goes more or less contiguously up to 0xfec8b000.
>>>
>>> Looking at dmesg on domU, the e820 map more or less matches the
>second
>>> dump above.
>>
>> Right. That is correct since the patch I sent just outputs stuff.
>No real changes to the E820 yet.
>
>I thought this did that in hvmloader/e820c:
>hypercall_memory_op ( XENMEM_memory_map, &op);
>
>Gordan
No. They just gets the E820 that is stashed in the hypervisor for the guest. The PV guest would use it but hvmloader is not. This is what would needed to be implemented to allow hvmloader construct the E820 on its own.
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 23:01 ` Konrad Rzeszutek Wilk
@ 2013-09-06 12:23 ` Gordan Bobic
2013-09-06 13:20 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-06 12:23 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Thu, 05 Sep 2013 19:01:03 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> Gordan Bobic <gordan@bobich.net> wrote:
>>On 09/05/2013 11:23 PM, Konrad Rzeszutek Wilk wrote:
>>> Gordan Bobic <gordan@bobich.net> wrote:
>>>> Right, finally got around to trying this with the latest patch.
>>>>
>>>> With e820_host=0 things work as before:
>>>>
>>>> (XEN) HVM3: BIOS map:
>>>> (XEN) HVM3: f0000-fffff: Main BIOS
>>>> (XEN) HVM3: E820 table:
>>>> (XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>>>> (XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>>>> (XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
>>>> (XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>>>> (XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
>>>> (XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
>>>> (XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>>>> (XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>>>>
>>>>
>>>> I seem to be getting two different E820 table dumps with
>>e820_host=1:
>>>>
>>>> (XEN) HVM1: BIOS map:
>>>> (XEN) HVM1: f0000-fffff: Main BIOS
>>>> (XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>>>> (XEN) HVM1: E820 table:
>>>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>>>> (XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>>>> (XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>>>> (XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>>>> (XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>>>> (XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>>>> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>>>> (XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>>>> (XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>>>> (XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>>>> (XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>>>> (XEN) HVM1: E820 table:
>>>> (XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>>>> (XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>>>> (XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>>>> (XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>>>> (XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>>>> (XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>>>> (XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>>>> (XEN) HVM1: Invoking ROMBIOS ...
>>>>
>>>> I cannot quite figure out what is going on here - these tables
>>>> can't
>>>> both be true.
>>>>
>>>
>>> Right. The code just prints the E820 that was constructed b/c of
>>> the
>>e820_host =1 parameter as the first output. Then the second one is
>>what was constructed originally.
>>>
>>> The code that would tie in the E820 from the hyper call and the
>>> alter
>>how the hvmloader sets it up is not yet done.
>>>
>>>
>>>> Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000
>>>> and
>>>> goes more or less contiguously up to 0xfec8b000.
>>>>
>>>> Looking at dmesg on domU, the e820 map more or less matches the
>>second
>>>> dump above.
>>>
>>> Right. That is correct since the patch I sent just outputs stuff.
>>No real changes to the E820 yet.
>>
>>I thought this did that in hvmloader/e820c:
>>hypercall_memory_op ( XENMEM_memory_map, &op);
>>
>>Gordan
>
> No. They just gets the E820 that is stashed in the hypervisor for
> the guest. The PV guest would use it but hvmloader is not. This is
> what would needed to be implemented to allow hvmloader construct the
> E820 on its own.
Right. So so in hvmloader/e820.c we now have the host based map in
struct e820entry map[E820MAX];
The rest of the function then goes and constructs the standard HVM
e820 map in the passed in
struct e820entry *e820
So all that needs to happen here is if e820_host is set, fill e820[]
by copying map[] up to the hvm_info->low_mem_pgend
(or hvm_info->high_mem_pgend if it is set). I am guessing that
SeaBIOS and other existing stuff might break if the host map is
just copied in verbatim, so presumably I need to add/dedupe the
non-RAM parts of the maps.
Is that right? Nothing else needs to happen?
The following questions arise:
1) What to do in case of overlaps? On my specific hardware,
the key difference in the end map will be that the hole at:
(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
will end up being created in domU.
2) Do only the holes need to be pulled from the host or
the entire map? Would hvmloader/seabios/whatever know
what to do if passed a map that is different from what
they might expect (i.e. different from what the current
hvmloader provides)? Or would this be likely to cause
extensive further breakages?
3) At the moment I am leaning toward just pulling in the
holes from the host e820, mirroring them in domU.
3.1) Marking them as "reserved" would likely fix the
problem that was my primary motivation for doing this
in the first place. Having said that - with all of
the 1GB-3GB space marked as reserved, I'm not sure where
the IOMEM would end up mapped in domU - things might just
break. If marking the dom0 hole as a hole in domU without
ensuring pBAR=vBAR, the PCI device in domU might get
mapped with where another device is in dom0, which might
cause the same problem.
At the moment, I think the expedient thing to do is make
domU map holes as per dom0 and ignore other non-RAM
areas. This may (by luck) or may not fix my immediate problem
(RAM in domU clobbering host's mapped IOMEM), but at
least it would cover the pre-requisite hole mapping for
the next step which is vBAR=pBAR.
I light of this, however, depending on the answer to 2)
above, it may not be practical for e820_host option do do
what it actually means for HVMs, at least not to the same
extent as happens for PV. It would only do a part of it
(initial vHOLE=pHOLE, to later be extended to the more
specific case of vBAR=pBAR).
Does this sound reasonable?
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 22:33 ` Gordan Bobic
@ 2013-09-06 13:04 ` Konrad Rzeszutek Wilk
2013-09-06 13:34 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-06 13:04 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Thu, Sep 05, 2013 at 11:33:18PM +0100, Gordan Bobic wrote:
> On 09/05/2013 10:13 PM, Gordan Bobic wrote:
>
> >I seem to be getting two different E820 table dumps with e820_host=1:
> >
> >(XEN) HVM1: BIOS map:
> >(XEN) HVM1: f0000-fffff: Main BIOS
> >(XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
> >(XEN) HVM1: E820 table:
> >(XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
> >(XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
> >(XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
> >(XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
> >(XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
> >(XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
> >(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
> >(XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
> >(XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
> >(XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
> >(XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>
> I get it - this is the host e820 map. In dom0, dmesg shows:
>
> e820: BIOS-provided physical RAM map:
> Xen: [mem 0x0000000000000000-0x000000000009cfff] usable
> Xen: [mem 0x000000000009d000-0x00000000000fffff] reserved
> Xen: [mem 0x0000000000100000-0x000000003f78ffff] usable
> Xen: [mem 0x000000003f790000-0x000000003f79dfff] ACPI data
> Xen: [mem 0x000000003f79e000-0x000000003f7cffff] ACPI NVS
> Xen: [mem 0x000000003f7d0000-0x000000003f7dffff] reserved
> Xen: [mem 0x000000003f7e7000-0x000000003fffffff] reserved
> Xen: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
> Xen: [mem 0x00000000ffc00000-0x00000000ffffffff] reserved
> Xen: [mem 0x0000000100000000-0x0000000cbfffffff] usable
>
> That tallies up with the above map exactly. So far so good. Not sure
> if the following is relevant, but here it is anyway just in case:
>
> e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
> e820: remove [mem 0x000a0000-0x000fffff] usable
> [...]
> e820: last_pfn = 0xcc0000 max_arch_pfn = 0x400000000
> e820: last_pfn = 0x3f790 max_arch_pfn = 0x400000000
> [...]
> Zone ranges:
> DMA [mem 0x00001000-0x00ffffff]
> DMA32 [mem 0x01000000-0xffffffff]
> Normal [mem 0x100000000-0xcbfffffff]
> [...]
> e820: [mem 0x40000000-0xfedfffff] available for PCI devices
>
>
> >(XEN) HVM1: E820 table:
> >(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> >(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> >(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
> >(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> >(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
> >(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
> >(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> >(XEN) HVM1: Invoking ROMBIOS ...
>
> Comparing this to the above, it seems that 9d000-9e000 is marked as
> reserved in dom0, but RAM in domU. Am I right in thinking that
> dom0(usable) == domU(RAM) in terms of meaning?
>
> What does "HOLE" actually mean in domU? Does it mean this space is
> OK to map domU IOMEM into? Or something else? Either way full
> possible chasl summary:
>
> dom0: reserved 9d000-9e000
> domU: RAM 9d000-9e000
>
> dom0: reserved a0000-dffff
> domU: HOLE a0000-dffff
>
> dom0: ACPI data 3f790000-3f79dfff
> dom0: ACPI NVS 3f79e000-3f7cffff
> dom0: reserved 3f7d0000-3f7dffff
> dom0: reserved
.. you are missing a range here.
> domU: RAM 00100000-a7800000
>
> Then there seems to be a hole in dom0:
> 40000000-fedfffff which talles up with the dom0 dmesg output above
> about it being for the PCI devices, i.e. that's the IOMEM region
> (from 1GB to a lilttle under 4GB).
>
> But in domU, the 40000000-a77fffff is available as RAM.
OK, so that is the goal - make hvmloader construct the E820 memory
layout and all of its pieces to fit that layout.
>
> On the face of it, that's actually fine - my PCI IOMEM mappings show
> the lowest mapping (according to lspci -vvv) starts at a8000000,
<surprise>
> which falls into the domU area marked as "HOLE" (a7800000-fc000000).
> And this does in fact appears to be where domU maps the GPU in both
> of my VMs:
>
> E0000000-E7FFFFFF
> E8000000-EBFFFFFF
> EC000000-EDFFFFFF
>
> and this doesn't overlap with any mapped PCI IOMEM according to lspci.
>
> If we assume that anything below a8000000 doesn't actually matter in
> this case (since if I give up to a8000000 memory to a domU
> everything works absolutely fine indefinitely, I am at a loss to
Just to make sure I am not leading you astray. You are getting _no_ crashes
when you have a guest with 1GB?
> explain what is actually going wrong and why the crash is still
> occuring - unless some other piece of hardware is having it's domU
> IOMEM mapped somewhere in the range f3df4000-fec8b000 and that is
> causing a memory overwrite.
>
> I am just not seeing any obvious memory stomp at the moment...
Neither am I.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-05 22:42 ` Gordan Bobic
@ 2013-09-06 13:09 ` Konrad Rzeszutek Wilk
2013-09-06 14:09 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-06 13:09 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Thu, Sep 05, 2013 at 11:42:38PM +0100, Gordan Bobic wrote:
> On 09/05/2013 11:23 PM, Konrad Rzeszutek Wilk wrote:
> >Gordan Bobic <gordan@bobich.net> wrote:
> >>Right, finally got around to trying this with the latest patch.
> >>
> >>With e820_host=0 things work as before:
> >>
> >>(XEN) HVM3: BIOS map:
> >>(XEN) HVM3: f0000-fffff: Main BIOS
> >>(XEN) HVM3: E820 table:
> >>(XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> >>(XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> >>(XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
> >>(XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> >>(XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
> >>(XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
> >>(XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> >>(XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
> >>
> >>
> >>I seem to be getting two different E820 table dumps with e820_host=1:
> >>
> >>(XEN) HVM1: BIOS map:
> >>(XEN) HVM1: f0000-fffff: Main BIOS
> >>(XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
> >>(XEN) HVM1: E820 table:
> >>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
> >>(XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
> >>(XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
> >>(XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
> >>(XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
> >>(XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
> >>(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
> >>(XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
> >>(XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
> >>(XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
> >>(XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
> >>(XEN) HVM1: E820 table:
> >>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> >>(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> >>(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
> >>(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> >>(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
> >>(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
> >>(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> >>(XEN) HVM1: Invoking ROMBIOS ...
> >>
> >>I cannot quite figure out what is going on here - these tables can't
> >>both be true.
> >>
> >
> >Right. The code just prints the E820 that was constructed b/c of the e820_host =1 parameter as the first output. Then the second one is what was constructed originally.
> >
> >The code that would tie in the E820 from the hyper call and the alter how the hvmloader sets it up is not yet done.
> >
> >
> >>Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000 and
> >>goes more or less contiguously up to 0xfec8b000.
> >>
> >>Looking at dmesg on domU, the e820 map more or less matches the second
> >>dump above.
> >
> >Right. That is correct since the patch I sent just outputs stuff. No real changes to the E820 yet.
>
> /me *facepalms*
>
> That indeed explains everything. :)
>
> But having had a thorough look through the memory mappings (see my
> other long, rambling email), I don't actually see an obvious area
> where RAM might overwrite a dom0 IOMEM range - assuming the "HOLE"
> part isn't mapped as RAM in domU.
>
> Or to summarize:
> dom0 PCI IOMEM actually has mappings from a8000000 onward, and
> giving domU up to that much memory works fine. So the memory stomp
> must be happening from a8000000 onward. But - the only things above
> that address in domU are the HOLE up to fc000000 and RESERVED up to
> ffffffff. So no domU memory is getting mapped into the IOMEM range
> anyway - which begs the question of what is _actually_ causing the
> crash. Stuff I haven't yet found in domU getting mapped into the
> a7800000-fc000000 hole overlapping dom0 IOMEM? SeaBIOS doing
> smething odd in the fc000000-fec8b000 range marked RESERVED in domU?
There were some assumptions with that region and that stuff could
be stick in there (like ACPI tables and SMBIOS I think).
Perhaps a better question is - are any of the BARs of your card overlapping
with the RESERVED range in the domU?
Or if you grep through the hvmloader code are there anything addresses
that look to be within that range?
Incidentally could you send the output of lspci -vvvv from your output
in the guest and in dom0 please?
Thanks.
>
> Or am I reading this all wrong?
You are on the right track I think. There is some assumption made
about the RESERVED and HOLE that I think are conflicing with what the
card thinks of. Another way to figure out what is happening is to crank
up the verbosity of the driver in the domU. Specifically there is
an CONFIG_MMIO_TRACE (or something like that) that will tell you the
physical address the PCI cards are using and what it is writting in it.
It could help in identifying _where_ the graphic card is writting/reading
from. And also the last moment when it wrote something.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-06 12:23 ` Gordan Bobic
@ 2013-09-06 13:20 ` Konrad Rzeszutek Wilk
2013-09-06 14:45 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-06 13:20 UTC (permalink / raw)
To: Gordan Bobic; +Cc: xen-devel
On Fri, Sep 06, 2013 at 01:23:19PM +0100, Gordan Bobic wrote:
> On Thu, 05 Sep 2013 19:01:03 -0400, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com> wrote:
> >Gordan Bobic <gordan@bobich.net> wrote:
> >>On 09/05/2013 11:23 PM, Konrad Rzeszutek Wilk wrote:
> >>>Gordan Bobic <gordan@bobich.net> wrote:
> >>>>Right, finally got around to trying this with the latest patch.
> >>>>
> >>>>With e820_host=0 things work as before:
> >>>>
> >>>>(XEN) HVM3: BIOS map:
> >>>>(XEN) HVM3: f0000-fffff: Main BIOS
> >>>>(XEN) HVM3: E820 table:
> >>>>(XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> >>>>(XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> >>>>(XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
> >>>>(XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> >>>>(XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
> >>>>(XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
> >>>>(XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> >>>>(XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
> >>>>
> >>>>
> >>>>I seem to be getting two different E820 table dumps with
> >>e820_host=1:
> >>>>
> >>>>(XEN) HVM1: BIOS map:
> >>>>(XEN) HVM1: f0000-fffff: Main BIOS
> >>>>(XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
> >>>>(XEN) HVM1: E820 table:
> >>>>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
> >>>>(XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
> >>>>(XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
> >>>>(XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
> >>>>(XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
> >>>>(XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
> >>>>(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
> >>>>(XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
> >>>>(XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
> >>>>(XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
> >>>>(XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
> >>>>(XEN) HVM1: E820 table:
> >>>>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> >>>>(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> >>>>(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
> >>>>(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> >>>>(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
> >>>>(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
> >>>>(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> >>>>(XEN) HVM1: Invoking ROMBIOS ...
> >>>>
> >>>>I cannot quite figure out what is going on here - these
> >>>>tables can't
> >>>>both be true.
> >>>>
> >>>
> >>>Right. The code just prints the E820 that was constructed b/c
> >>>of the
> >>e820_host =1 parameter as the first output. Then the second one is
> >>what was constructed originally.
> >>>
> >>>The code that would tie in the E820 from the hyper call and
> >>>the alter
> >>how the hvmloader sets it up is not yet done.
> >>>
> >>>
> >>>>Looking at the IOMEM on the host, the IOMEM begins at
> >>>>0xa8000000 and
> >>>>goes more or less contiguously up to 0xfec8b000.
> >>>>
> >>>>Looking at dmesg on domU, the e820 map more or less matches the
> >>second
> >>>>dump above.
> >>>
> >>>Right. That is correct since the patch I sent just outputs stuff.
> >>No real changes to the E820 yet.
> >>
> >>I thought this did that in hvmloader/e820c:
> >>hypercall_memory_op ( XENMEM_memory_map, &op);
> >>
> >>Gordan
> >
> >No. They just gets the E820 that is stashed in the hypervisor for
> >the guest. The PV guest would use it but hvmloader is not. This is
> >what would needed to be implemented to allow hvmloader construct the
> >E820 on its own.
>
> Right. So so in hvmloader/e820.c we now have the host based map in
> struct e820entry map[E820MAX];
>
> The rest of the function then goes and constructs the standard HVM
> e820 map in the passed in
> struct e820entry *e820
>
> So all that needs to happen here is if e820_host is set, fill e820[]
> by copying map[] up to the hvm_info->low_mem_pgend
> (or hvm_info->high_mem_pgend if it is set). I am guessing that
Right. And then the overflow would be put past 4GB. Or fill in the
E820_RAM regions with it.
> SeaBIOS and other existing stuff might break if the host map is
> just copied in verbatim, so presumably I need to add/dedupe the
> non-RAM parts of the maps.
Probably. Or tweak SeaBIOS to use your E820.
Also you need to figure out where hvmloader constructs the ACPI and
SMBIOS tables and make sure they are within the E820_RESERVED regions.
>
> Is that right? Nothing else needs to happen?
HA! You are going to hit some bugs probably :-)
>
> The following questions arise:
>
> 1) What to do in case of overlaps? On my specific hardware,
> the key difference in the end map will be that the hole at:
> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
> will end up being created in domU.
The hole is also known as PCI gap or MMIO region. With the
e820_host in effect you should use the host's layout and
use its hole placement. That will replicate it and make
domU's E820 hole look like the host.
>
> 2) Do only the holes need to be pulled from the host or
> the entire map? Would hvmloader/seabios/whatever know
> what to do if passed a map that is different from what
> they might expect (i.e. different from what the current
> hvmloader provides)? Or would this be likely to cause
> extensive further breakages?
I think there are some assumptions made where the hole
starts. Those would have to be made more dynamic to deal
with a different E820 layout.
>
> 3) At the moment I am leaning toward just pulling in the
> holes from the host e820, mirroring them in domU.
<nods>
> 3.1) Marking them as "reserved" would likely fix the
> problem that was my primary motivation for doing this
> in the first place. Having said that - with all of
That unfortuntaly will make them not-gaps nor MMIO regions.
Meaning the kernel will scream: "You have a BAR in E820_
reserved region! That is bad!", and won't setup the card.
The hole needs to be replicated in the guest.
> the 1GB-3GB space marked as reserved, I'm not sure where
> the IOMEM would end up mapped in domU - things might just
> break. If marking the dom0 hole as a hole in domU without
> ensuring pBAR=vBAR, the PCI device in domU might get
> mapped with where another device is in dom0, which might
> cause the same problem.
Right. hvmloader could (I hadn't checked the code) scan the
E820 and determine that the PCI BARs are within the E820_RESRV
and try to move them to a hole. Since no hole would be found
below 4GB it would remap the PCI BAR above 4GB. That - depending
on the device - could be disastrous for the device. That is
if it is only capable of 32-bit DMA's it will never do anything.
>
> At the moment, I think the expedient thing to do is make
> domU map holes as per dom0 and ignore other non-RAM
<nods>
> areas. This may (by luck) or may not fix my immediate problem
> (RAM in domU clobbering host's mapped IOMEM), but at
> least it would cover the pre-requisite hole mapping for
> the next step which is vBAR=pBAR.
<nods>
>
> I light of this, however, depending on the answer to 2)
> above, it may not be practical for e820_host option do do
I think it will mean you need to look in the hvmloader directory
a bit more and find all of the assumptions it makes about memory
locations. One excellent tool is to do 'git log -p tools/hvmloader'
as it will tell you what changes have been done to address
the memory layout construction.
> what it actually means for HVMs, at least not to the same
> extent as happens for PV. It would only do a part of it
> (initial vHOLE=pHOLE, to later be extended to the more
> specific case of vBAR=pBAR).
>
> Does this sound reasonable?
Yes. I think the plan you outlined is sound. The difficultiy is
going to be cramming the E820 constructed by e820_host in hvmloader
and making sure that all the other parts of it (SMBIOS, ACPI, BIOS)
will be more dynamic and use dynamic locations instead of
hard-coded values.
Loads of printks can help with that :-)
The awesome thing is that it will make hvmloader a lot more
flexible. And one can extend the e820_host to construct an
E820 that is bizzare for testing even more absurd memory
layouts (say, no RAM below 4GB).
Keep on digging! Thanks for great analysis.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-06 13:04 ` Konrad Rzeszutek Wilk
@ 2013-09-06 13:34 ` Gordan Bobic
2013-09-06 14:32 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-06 13:34 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Fri, 6 Sep 2013 09:04:35 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> On Thu, Sep 05, 2013 at 11:33:18PM +0100, Gordan Bobic wrote:
>> On 09/05/2013 10:13 PM, Gordan Bobic wrote:
>>
>> >I seem to be getting two different E820 table dumps with
>> e820_host=1:
>> >
>> >(XEN) HVM1: BIOS map:
>> >(XEN) HVM1: f0000-fffff: Main BIOS
>> >(XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>> >(XEN) HVM1: E820 table:
>> >(XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>> >(XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>> >(XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>> >(XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>> >(XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>> >(XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>> >(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>> >(XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>> >(XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>> >(XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>> >(XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>>
>> I get it - this is the host e820 map. In dom0, dmesg shows:
>>
>> e820: BIOS-provided physical RAM map:
>> Xen: [mem 0x0000000000000000-0x000000000009cfff] usable
>> Xen: [mem 0x000000000009d000-0x00000000000fffff] reserved
>> Xen: [mem 0x0000000000100000-0x000000003f78ffff] usable
>> Xen: [mem 0x000000003f790000-0x000000003f79dfff] ACPI data
>> Xen: [mem 0x000000003f79e000-0x000000003f7cffff] ACPI NVS
>> Xen: [mem 0x000000003f7d0000-0x000000003f7dffff] reserved
>> Xen: [mem 0x000000003f7e7000-0x000000003fffffff] reserved
>> Xen: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>> Xen: [mem 0x00000000ffc00000-0x00000000ffffffff] reserved
>> Xen: [mem 0x0000000100000000-0x0000000cbfffffff] usable
>>
>> That tallies up with the above map exactly. So far so good. Not sure
>> if the following is relevant, but here it is anyway just in case:
>>
>> e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>> e820: remove [mem 0x000a0000-0x000fffff] usable
>> [...]
>> e820: last_pfn = 0xcc0000 max_arch_pfn = 0x400000000
>> e820: last_pfn = 0x3f790 max_arch_pfn = 0x400000000
>> [...]
>> Zone ranges:
>> DMA [mem 0x00001000-0x00ffffff]
>> DMA32 [mem 0x01000000-0xffffffff]
>> Normal [mem 0x100000000-0xcbfffffff]
>> [...]
>> e820: [mem 0x40000000-0xfedfffff] available for PCI devices
>>
>>
>> >(XEN) HVM1: E820 table:
>> >(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> >(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> >(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>> >(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> >(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>> >(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>> >(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> >(XEN) HVM1: Invoking ROMBIOS ...
>>
>> Comparing this to the above, it seems that 9d000-9e000 is marked as
>> reserved in dom0, but RAM in domU. Am I right in thinking that
>> dom0(usable) == domU(RAM) in terms of meaning?
>>
>> What does "HOLE" actually mean in domU? Does it mean this space is
>> OK to map domU IOMEM into? Or something else? Either way full
>> possible chasl summary:
>>
>> dom0: reserved 9d000-9e000
>> domU: RAM 9d000-9e000
>>
>> dom0: reserved a0000-dffff
>> domU: HOLE a0000-dffff
>>
>> dom0: ACPI data 3f790000-3f79dfff
>> dom0: ACPI NVS 3f79e000-3f7cffff
>> dom0: reserved 3f7d0000-3f7dffff
>> dom0: reserved
>
>
> .. you are missing a range here.
It wasn't meant as an exhaustive list, I was only looking at the
interesting/overlapping areas.
>> domU: RAM 00100000-a7800000
>>
>> Then there seems to be a hole in dom0:
>> 40000000-fedfffff which talles up with the dom0 dmesg output above
>> about it being for the PCI devices, i.e. that's the IOMEM region
>> (from 1GB to a lilttle under 4GB).
>>
>> But in domU, the 40000000-a77fffff is available as RAM.
>
> OK, so that is the goal - make hvmloader construct the E820 memory
> layout and all of its pieces to fit that layout.
I am actually leaning toward only copying the holes from the
host E820. The domU already seems to be successfully using various
memory ranges that correspond to reserved and acpi ranges, so
it doesn't look like these are a problem.
>> On the face of it, that's actually fine - my PCI IOMEM mappings show
>> the lowest mapping (according to lspci -vvv) starts at a8000000,
>
> <surprise>
Indeed - on the host, the hole is 1GB-4GB, but there is no IOMEM
mapped between 1024M and 2688MB. Hence why I can get away with a
domU memory allocation up to 2688MB.
>> which falls into the domU area marked as "HOLE" (a7800000-fc000000).
>> And this does in fact appears to be where domU maps the GPU in both
>> of my VMs:
>>
>> E0000000-E7FFFFFF
>> E8000000-EBFFFFFF
>> EC000000-EDFFFFFF
>>
>> and this doesn't overlap with any mapped PCI IOMEM according to
>> lspci.
>>
>> If we assume that anything below a8000000 doesn't actually matter in
>> this case (since if I give up to a8000000 memory to a domU
>> everything works absolutely fine indefinitely, I am at a loss to
>
>
> Just to make sure I am not leading you astray. You are getting _no_
> crashes
> when you have a guest with 1GB?
I haven't tried limiting a guest to 1GB recently. My PCI passthrough
domUs all have 2688MB assigned, and this works fine. More than that
and they crash eventually. Does that answer your question? Or were
you after something very specific to the 1GB domU case?
>> explain what is actually going wrong and why the crash is still
>> occuring - unless some other piece of hardware is having it's domU
>> IOMEM mapped somewhere in the range f3df4000-fec8b000 and that is
>> causing a memory overwrite.
>>
>> I am just not seeing any obvious memory stomp at the moment...
>
> Neither am I.
I may have pasted the wrong domU e820. I have a sneaky suspicion
that this above map was from a domU with 2688MB of RAM assigned,
hence why there is on domU RAM in the map above a7800000. I'll
re-check when I'm in front of that machine again.
Are you OK with the plan to _only_ copy the holes from host E820
to the hvmloader E820? I think this would be sufficient and not
cause any undue problems. The only things that would need to
change are:
1) Enlarge the domU hole
2) Do something with the top reserved block, starting at
RESERVED_MEMBASE=0xFC000000. What is this actually for? It
overlaps with the host memory hole which extends all the way up
to 0xfee00000. If it must be where it is, this could be
problematic. What to do in this case?
This does, also bring up another question - is there any point
in bothering with matching the host holes? I would hazard a
guess that no physical hardware is likely to have a memory
hole bigger than 3GB under the 4GB limit.
So would it perhaps be neater, easier, more consistent and
more debuggable to just make the hvmloader put in a hole
between 0x40000000-0xffffffff (the whole 3GB) by default?
Or is that deemed to be too crippling for 32-bit non-PAE
domUs (and are there enough of these aroudn to matter?)?
Caveat - this alone wouldn't cover any other weirdness such as
the odd memory hole 0x3f7e0000-0x3f7e7000 on my hardware. Was
this what you were thinking about when asking whether my domUs
work OK with 1GB of RAM? Since that is just under the 1GB
limit.
To clarify, I am not suggesting just hard coding a 3GB memory
hole - I am suggesting defaulting to at least that and them
mapping in any additional memory holes as well. My reasoning
behind this suggestion is that it would make things more
consistent between different (possibly dissimilar) hosts.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-06 13:09 ` Konrad Rzeszutek Wilk
@ 2013-09-06 14:09 ` Gordan Bobic
0 siblings, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-06 14:09 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
[-- Attachment #1: Type: text/plain, Size: 5993 bytes --]
On Fri, 6 Sep 2013 09:09:06 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> On Thu, Sep 05, 2013 at 11:42:38PM +0100, Gordan Bobic wrote:
>> On 09/05/2013 11:23 PM, Konrad Rzeszutek Wilk wrote:
>> >Gordan Bobic <gordan@bobich.net> wrote:
>> >>Right, finally got around to trying this with the latest patch.
>> >>
>> >>With e820_host=0 things work as before:
>> >>
>> >>(XEN) HVM3: BIOS map:
>> >>(XEN) HVM3: f0000-fffff: Main BIOS
>> >>(XEN) HVM3: E820 table:
>> >>(XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> >>(XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> >>(XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
>> >>(XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> >>(XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
>> >>(XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
>> >>(XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> >>(XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>> >>
>> >>
>> >>I seem to be getting two different E820 table dumps with
>> e820_host=1:
>> >>
>> >>(XEN) HVM1: BIOS map:
>> >>(XEN) HVM1: f0000-fffff: Main BIOS
>> >>(XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>> >>(XEN) HVM1: E820 table:
>> >>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>> >>(XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>> >>(XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>> >>(XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>> >>(XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>> >>(XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>> >>(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>> >>(XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>> >>(XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>> >>(XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>> >>(XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>> >>(XEN) HVM1: E820 table:
>> >>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> >>(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> >>(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>> >>(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> >>(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>> >>(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>> >>(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> >>(XEN) HVM1: Invoking ROMBIOS ...
>> >>
>> >>I cannot quite figure out what is going on here - these tables
>> can't
>> >>both be true.
>> >>
>> >
>> >Right. The code just prints the E820 that was constructed b/c of
>> the e820_host =1 parameter as the first output. Then the second one
>> is what was constructed originally.
>> >
>> >The code that would tie in the E820 from the hyper call and the
>> alter how the hvmloader sets it up is not yet done.
>> >
>> >
>> >>Looking at the IOMEM on the host, the IOMEM begins at 0xa8000000
>> and
>> >>goes more or less contiguously up to 0xfec8b000.
>> >>
>> >>Looking at dmesg on domU, the e820 map more or less matches the
>> second
>> >>dump above.
>> >
>> >Right. That is correct since the patch I sent just outputs stuff.
>> No real changes to the E820 yet.
>>
>> /me *facepalms*
>>
>> That indeed explains everything. :)
>>
>> But having had a thorough look through the memory mappings (see my
>> other long, rambling email), I don't actually see an obvious area
>> where RAM might overwrite a dom0 IOMEM range - assuming the "HOLE"
>> part isn't mapped as RAM in domU.
>>
>> Or to summarize:
>> dom0 PCI IOMEM actually has mappings from a8000000 onward, and
>> giving domU up to that much memory works fine. So the memory stomp
>> must be happening from a8000000 onward. But - the only things above
>> that address in domU are the HOLE up to fc000000 and RESERVED up to
>> ffffffff. So no domU memory is getting mapped into the IOMEM range
>> anyway - which begs the question of what is _actually_ causing the
>> crash. Stuff I haven't yet found in domU getting mapped into the
>> a7800000-fc000000 hole overlapping dom0 IOMEM? SeaBIOS doing
>> smething odd in the fc000000-fec8b000 range marked RESERVED in domU?
>
> There were some assumptions with that region and that stuff could
> be stick in there (like ACPI tables and SMBIOS I think).
>
> Perhaps a better question is - are any of the BARs of your card
> overlapping
> with the RESERVED range in the domU?
>
> Or if you grep through the hvmloader code are there anything
> addresses
> that look to be within that range?
>
> Incidentally could you send the output of lspci -vvvv from your
> output
> in the guest and in dom0 please?
Attached.
The main point I'm trying to keep in mind here is that this
needs to be generic and useful in different hardware cases,
not just my own. If it were just about my own hardware and use
case I'd have just opted for the approach of the old vBAR-pBAR
patch, hard-coded the holes and been done with it.
>> Or am I reading this all wrong?
>
> You are on the right track I think. There is some assumption made
> about the RESERVED and HOLE that I think are conflicing with what the
> card thinks of. Another way to figure out what is happening is to
> crank
> up the verbosity of the driver in the domU. Specifically there is
> an CONFIG_MMIO_TRACE (or something like that) that will tell you the
> physical address the PCI cards are using and what it is writting in
> it.
>
> It could help in identifying _where_ the graphic card is
> writting/reading
> from. And also the last moment when it wrote something.
That's a part of my problem - my domU with a reproducible crash
is Windows which is a lot less debuggable. :(
I have a Linux domU that I use for figuring out what the domU looks
like from the inside, but I don't have a readily usable test-case
for reproducing the crash there.
Gordan
[-- Attachment #2: lspci.log --]
[-- Type: text/plain, Size: 108710 bytes --]
00:00.0 Host bridge: Intel Corporation 5520 I/O Hub to ESI Port (rev 22)
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [60] MSI: Enable- Count=1/2 Maskable+ 64bit-
Address: 00000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Capabilities: [160 v0] Vendor Specific Information: ID=0002 Rev=0 Len=00c <?>
00:01.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 1 (rev 22) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=10, subordinate=10, sec-latency=0
I/O behind bridge: 0000e000-0000efff
Memory behind bridge: fbe00000-fbefffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Intel Corporation Device 0000
Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit-
Address: fee00000 Data: 4029
Masking: 00000002 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x2, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Capabilities: [160 v0] Vendor Specific Information: ID=0002 Rev=0 Len=00c <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00:02.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 2 (rev 22) (prog-if 00 [Normal decode])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=0f, subordinate=0f, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fbd00000-fbdfffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Intel Corporation Device 0000
Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit-
Address: fee00000 Data: 4031
Masking: 00000002 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x2, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt+
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #0, PowerLimit 0.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Kernel driver in use: pcieport
Kernel modules: shpchp
00:03.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 3 (rev 22) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=09, subordinate=0e, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: d7e00000-dfffffff
Prefetchable memory behind bridge: 00000000c0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Intel Corporation Device 0000
Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit-
Address: fee00000 Data: 4039
Masking: 00000002 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #51, PowerLimit 75.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Capabilities: [160 v0] Vendor Specific Information: ID=0002 Rev=0 Len=00c <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00:07.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 7 (rev 22) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=05, subordinate=08, sec-latency=0
I/O behind bridge: 0000b000-0000cfff
Memory behind bridge: f4000000-fbcfffff
Prefetchable memory behind bridge: 00000000a8000000-00000000bfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: Intel Corporation Device 0000
Capabilities: [60] MSI: Enable+ Count=1/2 Maskable+ 64bit-
Address: fee00000 Data: 4041
Masking: 00000002 Pending: 00000000
Capabilities: [90] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #55, PowerLimit 75.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd+
DevCtl2: Completion Timeout: 260ms to 900ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [e0] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [150 v1] Access Control Services
ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
Capabilities: [160 v0] Vendor Specific Information: ID=0002 Rev=0 Len=00c <?>
Kernel driver in use: pcieport
Kernel modules: shpchp
00:13.0 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub I/OxAPIC Interrupt Controller (rev 22) (prog-if 20 [IO(X)-APIC])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at fec8a000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [6c] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
00:14.0 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub System Management Registers (rev 22) (prog-if 00 [8259])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: i7core_edac
Kernel modules: i7core_edac
00:14.1 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers (rev 22) (prog-if 00 [8259])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
00:14.2 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub Control Status and RAS Registers (rev 22) (prog-if 00 [8259])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM L0s, Latency L0 unlimited, L1 unlimited
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
00:14.3 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub Throttle Registers (rev 22) (prog-if 00 [8259])
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:1a.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 4: I/O ports at 8980 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1a.1 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 21
Region 4: I/O ports at 8a00 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: pciback
00:1a.2 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin D routed to IRQ 19
Region 4: I/O ports at 8a80 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1a.7 USB controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 (prog-if 20 [EHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 18
Region 0: Memory at f3df8000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ehci-pci
00:1b.0 Audio device: Intel Corporation 82801JI (ICH10 Family) HD Audio Controller
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 224
Region 0: Memory at f3df4000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 40a9
Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE- FLReset+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00
Status: NegoPending- InProgress-
Capabilities: [130 v1] Root Complex Link
Desc: PortNumber=0f ComponentID=00 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+
Addr: 00000000fed1c000
Kernel driver in use: snd_hda_intel
Kernel modules: snd-hda-intel
00:1c.0 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 1 (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 00001000-00001fff
Memory behind bridge: 40000000-401fffff
Prefetchable memory behind bridge: 0000000040200000-00000000403fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+
Slot #0, PowerLimit 10.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4049
Capabilities: [90] Subsystem: eVga.com. Corp. Device 101a
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed+ WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
Status: NegoPending- InProgress-
Capabilities: [180 v1] Root Complex Link
Desc: PortNumber=01 ComponentID=00 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+
Addr: 00000000fed1c000
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1c.2 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 3 (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 0000a000-0000afff
Memory behind bridge: f3f00000-f3ffffff
Prefetchable memory behind bridge: 0000000040400000-00000000405fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+
Slot #0, PowerLimit 10.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4051
Capabilities: [90] Subsystem: eVga.com. Corp. Device 101a
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed+ WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
Status: NegoPending- InProgress-
Capabilities: [180 v1] Root Complex Link
Desc: PortNumber=03 ComponentID=00 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+
Addr: 00000000fed1c000
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1c.4 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 5 (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
I/O behind bridge: 00009000-00009fff
Memory behind bridge: f3e00000-f3efffff
Prefetchable memory behind bridge: 0000000040600000-00000000407fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+
Slot #0, PowerLimit 10.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4059
Capabilities: [90] Subsystem: eVga.com. Corp. Device 101a
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed+ WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
Status: NegoPending- InProgress-
Capabilities: [180 v1] Root Complex Link
Desc: PortNumber=05 ComponentID=00 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+
Addr: 00000000fed1c000
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1d.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 4: I/O ports at 8b00 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.1 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 19
Region 4: I/O ports at 8b80 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.2 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 (prog-if 00 [UHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin C routed to IRQ 18
Region 4: I/O ports at 8c00 [size=32]
Capabilities: [50] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: uhci_hcd
00:1d.7 USB controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 (prog-if 20 [EHCI])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 0: Memory at f3dfa000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ehci-pci
00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90) (prog-if 01 [Subtractive decode])
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Subsystem: eVga.com. Corp. Device 101a
00:1f.0 ISA bridge: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information: Len=0c <?>
Kernel driver in use: lpc_ich
Kernel modules: lpc_ich
00:1f.2 SATA controller: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller (prog-if 01 [AHCI 1.0])
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 220
Region 0: I/O ports at 8d00 [size=8]
Region 1: I/O ports at 8f00 [size=4]
Region 2: I/O ports at 8e80 [size=8]
Region 3: I/O ports at 8e00 [size=4]
Region 4: I/O ports at 8d80 [size=32]
Region 5: Memory at f3dfc000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit-
Address: fee00000 Data: 4071
Capabilities: [70] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004
Capabilities: [b0] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ahci
Kernel modules: ahci
00:1f.3 SMBus: Intel Corporation 82801JI (ICH10 Family) SMBus Controller
Subsystem: eVga.com. Corp. Device 101a
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 18
Region 0: Memory at f3dfe000 (64-bit, non-prefetchable) [size=256]
Region 4: I/O ports at 0400 [size=32]
Kernel driver in use: i801_smbus
Kernel modules: i2c-i801
02:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8057 PCI-E Gigabit Ethernet Controller (rev 10)
Subsystem: eVga.com. Corp. Device abcd
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 223
Region 0: Memory at f3edc000 (64-bit, non-prefetchable) [size=16K]
Region 2: I/O ports at 9f00 [size=256]
Expansion ROM at f3ee0000 [disabled] [size=128K]
Capabilities: [48] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [5c] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4099
Capabilities: [c0] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <32us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr+ BadTLP+ BadDLLP+ Rollover- Timeout+ NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 1f, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [130 v1] Device Serial Number 40-0c-0e-ff-ff-bc-1f-00
Kernel driver in use: sky2
Kernel modules: sky2
03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8057 PCI-E Gigabit Ethernet Controller (rev 10)
Subsystem: eVga.com. Corp. Device abcd
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 222
Region 0: Memory at f3fdc000 (64-bit, non-prefetchable) [size=16K]
Region 2: I/O ports at af00 [size=256]
Expansion ROM at f3fe0000 [disabled] [size=128K]
Capabilities: [48] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [5c] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4091
Capabilities: [c0] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <32us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP+ Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 1f, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [130 v1] Device Serial Number 3f-0c-0e-ff-ff-bc-1f-00
Kernel driver in use: sky2
Kernel modules: sky2
05:00.0 PCI bridge: NVIDIA Corporation NF200 PCIe 2.0 switch (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=05, secondary=06, subordinate=08, sec-latency=0
I/O behind bridge: 0000b000-0000cfff
Memory behind bridge: f4000000-fbcfffff
Prefetchable memory behind bridge: 00000000a8000000-00000000bfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Upstream Port, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-SlotPowerLimit 75.000W
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [a0] Subsystem: NVIDIA Corporation Device c55e
Kernel driver in use: pcieport
Kernel modules: shpchp
06:00.0 PCI bridge: NVIDIA Corporation NF200 PCIe 2.0 switch (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=06, secondary=08, subordinate=08, sec-latency=0
I/O behind bridge: 0000c000-0000cfff
Memory behind bridge: f8000000-fbcfffff
Prefetchable memory behind bridge: 00000000b4000000-00000000bfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #1, PowerLimit 0.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: pcieport
Kernel modules: shpchp
06:02.0 PCI bridge: NVIDIA Corporation NF200 PCIe 2.0 switch (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=06, secondary=07, subordinate=07, sec-latency=0
I/O behind bridge: 0000b000-0000bfff
Memory behind bridge: f4000000-f7ffffff
Prefetchable memory behind bridge: 00000000a8000000-00000000b3ffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #3, PowerLimit 0.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: pcieport
Kernel modules: shpchp
07:00.0 VGA compatible controller: NVIDIA Corporation GF100GL [Quadro 5000] (rev a3) (prog-if 00 [VGA controller])
Subsystem: ASUSTeK Computer Inc. Device 8342
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 39
Region 0: Memory at f4000000 (32-bit, non-prefetchable) [size=32M]
Region 1: Memory at a8000000 (64-bit, prefetchable) [size=128M]
Region 3: Memory at b0000000 (64-bit, prefetchable) [size=64M]
Region 5: I/O ports at bf80 [size=128]
[virtual] Expansion ROM at f7f00000 [disabled] [size=512K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [b4] Vendor Specific Information: Len=14 <?>
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [128 v1] Power Budgeting <?>
Capabilities: [600 v1] Vendor Specific Information: ID=0001 Rev=1 Len=024 <?>
Kernel driver in use: pciback
Kernel modules: nouveau, nvidiafb
07:00.1 Audio device: NVIDIA Corporation GF100 High Definition Audio Controller (rev a1)
Subsystem: ASUSTeK Computer Inc. Device 8342
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin B routed to IRQ 38
Region 0: Memory at f7ffc000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: pciback
Kernel modules: snd-hda-intel
08:00.0 VGA compatible controller: NVIDIA Corporation GF100GL [Quadro 6000] (rev a3) (prog-if 00 [VGA controller])
Subsystem: NVIDIA Corporation Device 075f
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 30
Region 0: Memory at f8000000 (32-bit, non-prefetchable) [size=32M]
Region 1: Memory at b8000000 (64-bit, prefetchable) [size=128M]
Region 3: Memory at b4000000 (64-bit, prefetchable) [size=64M]
Region 5: I/O ports at cf80 [size=128]
[virtual] Expansion ROM at fbc00000 [disabled] [size=512K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [b4] Vendor Specific Information: Len=14 <?>
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [128 v1] Power Budgeting <?>
Capabilities: [600 v1] Vendor Specific Information: ID=0001 Rev=1 Len=024 <?>
Kernel driver in use: pciback
Kernel modules: nouveau, nvidiafb
08:00.1 Audio device: NVIDIA Corporation GF100 High Definition Audio Controller (rev a1)
Subsystem: NVIDIA Corporation Device 075f
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin B routed to IRQ 37
Region 0: Memory at fbcfc000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: pciback
Kernel modules: snd-hda-intel
09:00.0 PCI bridge: NVIDIA Corporation NF200 PCIe 2.0 switch (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=09, secondary=0a, subordinate=0e, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: d7e00000-dfffffff
Prefetchable memory behind bridge: 00000000c0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Upstream Port, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-SlotPowerLimit 75.000W
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [a0] Subsystem: NVIDIA Corporation Device c55e
Kernel driver in use: pcieport
Kernel modules: shpchp
0a:00.0 PCI bridge: NVIDIA Corporation NF200 PCIe 2.0 switch (rev a3) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=0a, secondary=0e, subordinate=0e, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: d7f00000-dfffffff
Prefetchable memory behind bridge: 00000000c0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt+
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #1, PowerLimit 0.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: pcieport
Kernel modules: shpchp
0a:02.0 PCI bridge: NVIDIA Corporation NF200 PCIe 2.0 switch (rev a3) (prog-if 00 [Normal decode])
Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=0a, secondary=0d, subordinate=0d, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 5GT/s, Width x8, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #3, PowerLimit 0.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: pcieport
Kernel modules: shpchp
0a:03.0 PCI bridge: NVIDIA Corporation NF200 PCIe 2.0 switch (rev a3) (prog-if 00 [Normal decode])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=0a, secondary=0b, subordinate=0c, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: d7e00000-d7efffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] Express (v2) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #3, Speed 5GT/s, Width x8, ASPM L0s, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot+
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #4, PowerLimit 0.000W; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Kernel driver in use: pcieport
Kernel modules: shpchp
0b:00.0 PCI bridge: Creative Labs [SB X-Fi Xtreme Audio] CA0110-IBG PCI to PCIe Bridge (prog-if 00 [Normal decode])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Bus: primary=0b, secondary=0c, subordinate=0c, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: d7e00000-d7efffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Bridge: PM- B3+
Capabilities: [60] MSI: Enable- Count=1/16 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [80] Subsystem: Creative Labs Device 0010
Capabilities: [90] Express (v1) PCI/PCI-X Bridge, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ BrConfRtry-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <16us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn-
Kernel modules: shpchp
0c:00.0 Audio device: Creative Labs [SB X-Fi Xtreme Audio] CA0110-IBG
Subsystem: Creative Labs SB1040
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (500ns min, 5000ns max)
Interrupt: pin A routed to IRQ 36
Region 0: Memory at d7efc000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [dc] Power Management version 3
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pciback
Kernel modules: snd-hda-intel
0e:00.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI RV770 [Radeon HD 4850] (prog-if 00 [VGA controller])
Subsystem: PC Partner Limited Sapphire HD 4850 512MB GDDR3 PCI-E Dual Slot Fansink
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 219
Region 0: Memory at c0000000 (64-bit, prefetchable) [size=256M]
Region 2: Memory at d8000000 (64-bit, non-prefetchable) [size=64K]
Region 4: I/O ports at d000 [size=256]
Expansion ROM at d7fe0000 [disabled] [size=128K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4069
Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
Kernel driver in use: radeon
Kernel modules: radeon
0e:00.1 Audio device: Advanced Micro Devices [AMD] nee ATI RV770 HDMI Audio [Radeon HD 4850/4870]
Subsystem: PC Partner Limited Sapphire HD 4850 512MB GDDR3 PCI-E Dual Slot Fansink
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin B routed to IRQ 225
Region 0: Memory at dc000000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 40b9
Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
Kernel driver in use: snd_hda_intel
Kernel modules: snd-hda-intel
0f:00.0 USB controller: NEC Corporation uPD720200 USB 3.0 Host Controller (rev 03) (prog-if 30 [XHCI])
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 29
Region 0: Memory at fbdfe000 (64-bit, non-prefetchable) [size=8K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [70] MSI: Enable- Count=1/8 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [90] MSI-X: Enable- Count=8 Masked-
Vector table: BAR=0 offset=00001000
PBA: BAR=0 offset=00001080
Capabilities: [a0] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <4us, L1 unlimited
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR+, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Capabilities: [140 v1] Device Serial Number ff-ff-ff-ff-ff-ff-ff-ff
Capabilities: [150 v1] Latency Tolerance Reporting
Max snoop latency: 0ns
Max no snoop latency: 0ns
Kernel driver in use: pciback
Kernel modules: xhci-hcd
10:00.0 SATA controller: Marvell Technology Group Ltd. 88SE9123 PCIe SATA 6.0 Gb/s controller (rev 11) (prog-if 01 [AHCI 1.0])
Subsystem: Marvell Technology Group Ltd. 88SE9123 PCIe SATA 6.0 Gb/s controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin A routed to IRQ 221
Region 0: I/O ports at eb00 [size=8]
Region 1: I/O ports at ea80 [size=4]
Region 2: I/O ports at ed00 [size=8]
Region 3: I/O ports at ec00 [size=4]
Region 4: I/O ports at eb80 [size=16]
Region 5: Memory at fbeef000 (32-bit, non-prefetchable) [size=2K]
Expansion ROM at fbed0000 [disabled] [size=64K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4081
Capabilities: [70] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <1us, L1 <8us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Kernel driver in use: ahci
Kernel modules: ahci
10:00.1 IDE interface: Marvell Technology Group Ltd. 88SE9128 IDE Controller (rev 11) (prog-if 8f [Master SecP SecO PriP PriO])
Subsystem: Marvell Technology Group Ltd. 88SE9128 IDE Controller
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 256 bytes
Interrupt: pin B routed to IRQ 40
Region 0: I/O ports at ee00 [size=8]
Region 1: I/O ports at ed80 [size=4]
Region 2: I/O ports at ef80 [size=8]
Region 3: I/O ports at ef00 [size=4]
Region 4: I/O ports at ee80 [size=16]
Region 5: Memory at fbeefc00 (32-bit, non-prefetchable) [size=16]
Expansion ROM at fbef0000 [disabled] [size=64K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [70] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <1us, L1 <8us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <64us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
Kernel driver in use: pata_marvell
Kernel modules: ata_generic, pata_acpi, pata_marvell
fe:00.0 Host bridge: Intel Corporation Xeon 5600 Series QuickPath Architecture Generic Non-core Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:00.1 Host bridge: Intel Corporation Xeon 5600 Series QuickPath Architecture System Address Decoder
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.0 Host bridge: Intel Corporation Xeon 5600 Series QPI Link 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.1 Host bridge: Intel Corporation Xeon 5600 Series QPI Physical 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.2 Host bridge: Intel Corporation Xeon 5600 Series Mirror Port Link 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.3 Host bridge: Intel Corporation Xeon 5600 Series Mirror Port Link 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.4 Host bridge: Intel Corporation Xeon 5600 Series QPI Link 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:02.5 Host bridge: Intel Corporation Xeon 5600 Series QPI Physical 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:03.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:03.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Target Address Decoder
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:03.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller RAS Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:03.4 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Test Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:04.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:04.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:04.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:04.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:05.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:05.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:05.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:05.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:06.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:06.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:06.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
fe:06.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:00.0 Host bridge: Intel Corporation Xeon 5600 Series QuickPath Architecture Generic Non-core Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:00.1 Host bridge: Intel Corporation Xeon 5600 Series QuickPath Architecture System Address Decoder
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.0 Host bridge: Intel Corporation Xeon 5600 Series QPI Link 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.1 Host bridge: Intel Corporation Xeon 5600 Series QPI Physical 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.2 Host bridge: Intel Corporation Xeon 5600 Series Mirror Port Link 0
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.3 Host bridge: Intel Corporation Xeon 5600 Series Mirror Port Link 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.4 Host bridge: Intel Corporation Xeon 5600 Series QPI Link 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:02.5 Host bridge: Intel Corporation Xeon 5600 Series QPI Physical 1
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:03.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:03.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Target Address Decoder
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:03.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller RAS Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:03.4 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Test Registers
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:04.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:04.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:04.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:04.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 0 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:05.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:05.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:05.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:05.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 1 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:06.0 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:06.1 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Address
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:06.2 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Rank
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
ff:06.3 Host bridge: Intel Corporation Xeon 5600 Series Integrated Memory Controller Channel 2 Thermal Control
Subsystem: Intel Corporation Device 8086
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
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^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-06 13:34 ` Gordan Bobic
@ 2013-09-06 14:32 ` Konrad Rzeszutek Wilk
2013-09-06 16:30 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-06 14:32 UTC (permalink / raw)
To: Gordan Bobic, Stefano Stabellini; +Cc: xen-devel
> >>Then there seems to be a hole in dom0:
> >>40000000-fedfffff which talles up with the dom0 dmesg output above
> >>about it being for the PCI devices, i.e. that's the IOMEM region
> >>(from 1GB to a lilttle under 4GB).
> >>
> >>But in domU, the 40000000-a77fffff is available as RAM.
> >
> >OK, so that is the goal - make hvmloader construct the E820 memory
> >layout and all of its pieces to fit that layout.
>
> I am actually leaning toward only copying the holes from the
> host E820. The domU already seems to be successfully using various
> memory ranges that correspond to reserved and acpi ranges, so
> it doesn't look like these are a problem.
OK.
>
> >>On the face of it, that's actually fine - my PCI IOMEM mappings show
> >>the lowest mapping (according to lspci -vvv) starts at a8000000,
> >
> ><surprise>
>
> Indeed - on the host, the hole is 1GB-4GB, but there is no IOMEM
> mapped between 1024M and 2688MB. Hence why I can get away with a
> domU memory allocation up to 2688MB.
When you say 'IOMEM' you mean /proc/iomem output?
>
> >>which falls into the domU area marked as "HOLE" (a7800000-fc000000).
> >>And this does in fact appears to be where domU maps the GPU in both
> >>of my VMs:
> >>
> >>E0000000-E7FFFFFF
> >>E8000000-EBFFFFFF
> >>EC000000-EDFFFFFF
> >>
> >>and this doesn't overlap with any mapped PCI IOMEM according to
> >>lspci.
> >>
> >>If we assume that anything below a8000000 doesn't actually matter in
> >>this case (since if I give up to a8000000 memory to a domU
> >>everything works absolutely fine indefinitely, I am at a loss to
> >
> >
> >Just to make sure I am not leading you astray. You are getting
> >_no_ crashes
> >when you have a guest with 1GB?
>
> I haven't tried limiting a guest to 1GB recently. My PCI passthrough
> domUs all have 2688MB assigned, and this works fine. More than that
> and they crash eventually. Does that answer your question? Or were
> you after something very specific to the 1GB domU case?
No no. I just was too lazy to compute what a800000 came out in
decimal.
>
> >>explain what is actually going wrong and why the crash is still
> >>occuring - unless some other piece of hardware is having it's domU
> >>IOMEM mapped somewhere in the range f3df4000-fec8b000 and that is
> >>causing a memory overwrite.
> >>
> >>I am just not seeing any obvious memory stomp at the moment...
> >
> >Neither am I.
>
> I may have pasted the wrong domU e820. I have a sneaky suspicion
> that this above map was from a domU with 2688MB of RAM assigned,
> hence why there is on domU RAM in the map above a7800000. I'll
> re-check when I'm in front of that machine again.
>
> Are you OK with the plan to _only_ copy the holes from host E820
> to the hvmloader E820? I think this would be sufficient and not
> cause any undue problems. The only things that would need to
> change are:
> 1) Enlarge the domU hole
> 2) Do something with the top reserved block, starting at
> RESERVED_MEMBASE=0xFC000000. What is this actually for? It
> overlaps with the host memory hole which extends all the way up
> to 0xfee00000. If it must be where it is, this could be
> problematic. What to do in this case?
I would do a git log or git annotate to find it. I recall
some patches to move that - but I can't recall the details.
>
> This does, also bring up another question - is there any point
> in bothering with matching the host holes? I would hazard a
> guess that no physical hardware is likely to have a memory
> hole bigger than 3GB under the 4GB limit.
3GB is about the max I have seen.
>
> So would it perhaps be neater, easier, more consistent and
> more debuggable to just make the hvmloader put in a hole
> between 0x40000000-0xffffffff (the whole 3GB) by default?
> Or is that deemed to be too crippling for 32-bit non-PAE
> domUs (and are there enough of these aroudn to matter?)?
Correct. Also it would wreak havoc when migrating to other
hvmloader's which have a different layout.
>
> Caveat - this alone wouldn't cover any other weirdness such as
> the odd memory hole 0x3f7e0000-0x3f7e7000 on my hardware. Was
> this what you were thinking about when asking whether my domUs
> work OK with 1GB of RAM? Since that is just under the 1GB
> limit.
So there are some issues with i915 IGD having to have a 'flush
page'. Mainly some non-RAM region that they can tell the IGD
to flush its pages. And it had to be non-RAM and somehow
via magic IGD registers you can program the physical address
in the card - so the card has it remapped to itself.
Usually it is some gap (aka hole) that ends has to be
faithfully reproduced in the guest. But you are using
nvidia and are not playing those nasty tricks.
>
> To clarify, I am not suggesting just hard coding a 3GB memory
> hole - I am suggesting defaulting to at least that and them
> mapping in any additional memory holes as well. My reasoning
> behind this suggestion is that it would make things more
> consistent between different (possibly dissimilar) hosts.
Potentially. The other option when thinking about migration
and PCI - is to interogate _All_ of the hosts that will be involved
in the migration and construct an E820 that covers all the
right regions. Then use that for the guests and then you
can unplug/plug the PCI devices without much trouble.
That is where the e820_host=1 parameter can be used and
also some extra code to slurp up an XML of the E820 could be
implemented.
The 3GB HOLE could do it, but what if the host has some
odd layout where the HOLE is above 4GB? Then we are back at
remapping.
I think Stefano had some thoughts about enlaring the HOLE
and it might be good to include him here.
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-06 13:20 ` Konrad Rzeszutek Wilk
@ 2013-09-06 14:45 ` Gordan Bobic
0 siblings, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-06 14:45 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel
On Fri, 6 Sep 2013 09:20:50 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> On Fri, Sep 06, 2013 at 01:23:19PM +0100, Gordan Bobic wrote:
>> On Thu, 05 Sep 2013 19:01:03 -0400, Konrad Rzeszutek Wilk
>> <konrad.wilk@oracle.com> wrote:
>> >Gordan Bobic <gordan@bobich.net> wrote:
>> >>On 09/05/2013 11:23 PM, Konrad Rzeszutek Wilk wrote:
>> >>>Gordan Bobic <gordan@bobich.net> wrote:
>> >>>>Right, finally got around to trying this with the latest patch.
>> >>>>
>> >>>>With e820_host=0 things work as before:
>> >>>>
>> >>>>(XEN) HVM3: BIOS map:
>> >>>>(XEN) HVM3: f0000-fffff: Main BIOS
>> >>>>(XEN) HVM3: E820 table:
>> >>>>(XEN) HVM3: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> >>>>(XEN) HVM3: [01]: 00000000:0009e000 - 00000000:000a0000:
>> RESERVED
>> >>>>(XEN) HVM3: HOLE: 00000000:000a0000 - 00000000:000e0000
>> >>>>(XEN) HVM3: [02]: 00000000:000e0000 - 00000000:00100000:
>> RESERVED
>> >>>>(XEN) HVM3: [03]: 00000000:00100000 - 00000000:e0000000: RAM
>> >>>>(XEN) HVM3: HOLE: 00000000:e0000000 - 00000000:fc000000
>> >>>>(XEN) HVM3: [04]: 00000000:fc000000 - 00000001:00000000:
>> RESERVED
>> >>>>(XEN) HVM3: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>> >>>>
>> >>>>
>> >>>>I seem to be getting two different E820 table dumps with
>> >>e820_host=1:
>> >>>>
>> >>>>(XEN) HVM1: BIOS map:
>> >>>>(XEN) HVM1: f0000-fffff: Main BIOS
>> >>>>(XEN) HVM1: build_e820_table:91 got 8 op.nr_entries
>> >>>>(XEN) HVM1: E820 table:
>> >>>>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>> >>>>(XEN) HVM1: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>> >>>>(XEN) HVM1: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>> >>>>(XEN) HVM1: [03]: 00000000:3f7d0000 - 00000000:3f7e0000:
>> RESERVED
>> >>>>(XEN) HVM1: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>> >>>>(XEN) HVM1: [04]: 00000000:3f7e7000 - 00000000:40000000:
>> RESERVED
>> >>>>(XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>> >>>>(XEN) HVM1: [05]: 00000000:fee00000 - 00000000:fee01000:
>> RESERVED
>> >>>>(XEN) HVM1: HOLE: 00000000:fee01000 - 00000000:ffc00000
>> >>>>(XEN) HVM1: [06]: 00000000:ffc00000 - 00000001:00000000:
>> RESERVED
>> >>>>(XEN) HVM1: [07]: 00000001:00000000 - 00000001:68870000: RAM
>> >>>>(XEN) HVM1: E820 table:
>> >>>>(XEN) HVM1: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> >>>>(XEN) HVM1: [01]: 00000000:0009e000 - 00000000:000a0000:
>> RESERVED
>> >>>>(XEN) HVM1: HOLE: 00000000:000a0000 - 00000000:000e0000
>> >>>>(XEN) HVM1: [02]: 00000000:000e0000 - 00000000:00100000:
>> RESERVED
>> >>>>(XEN) HVM1: [03]: 00000000:00100000 - 00000000:a7800000: RAM
>> >>>>(XEN) HVM1: HOLE: 00000000:a7800000 - 00000000:fc000000
>> >>>>(XEN) HVM1: [04]: 00000000:fc000000 - 00000001:00000000:
>> RESERVED
>> >>>>(XEN) HVM1: Invoking ROMBIOS ...
>> >>>>
>> >>>>I cannot quite figure out what is going on here - these
>> >>>>tables can't
>> >>>>both be true.
>> >>>>
>> >>>
>> >>>Right. The code just prints the E820 that was constructed b/c
>> >>>of the
>> >>e820_host =1 parameter as the first output. Then the second one
>> is
>> >>what was constructed originally.
>> >>>
>> >>>The code that would tie in the E820 from the hyper call and
>> >>>the alter
>> >>how the hvmloader sets it up is not yet done.
>> >>>
>> >>>
>> >>>>Looking at the IOMEM on the host, the IOMEM begins at
>> >>>>0xa8000000 and
>> >>>>goes more or less contiguously up to 0xfec8b000.
>> >>>>
>> >>>>Looking at dmesg on domU, the e820 map more or less matches the
>> >>second
>> >>>>dump above.
>> >>>
>> >>>Right. That is correct since the patch I sent just outputs
>> stuff.
>> >>No real changes to the E820 yet.
>> >>
>> >>I thought this did that in hvmloader/e820c:
>> >>hypercall_memory_op ( XENMEM_memory_map, &op);
>> >>
>> >>Gordan
>> >
>> >No. They just gets the E820 that is stashed in the hypervisor for
>> >the guest. The PV guest would use it but hvmloader is not. This is
>> >what would needed to be implemented to allow hvmloader construct
>> the
>> >E820 on its own.
>>
>> Right. So so in hvmloader/e820.c we now have the host based map in
>> struct e820entry map[E820MAX];
>>
>> The rest of the function then goes and constructs the standard HVM
>> e820 map in the passed in
>> struct e820entry *e820
>>
>> So all that needs to happen here is if e820_host is set, fill e820[]
>> by copying map[] up to the hvm_info->low_mem_pgend
>> (or hvm_info->high_mem_pgend if it is set). I am guessing that
>
> Right. And then the overflow would be put past 4GB. Or fill in the
> E820_RAM regions with it.
>
>> SeaBIOS and other existing stuff might break if the host map is
>> just copied in verbatim, so presumably I need to add/dedupe the
>> non-RAM parts of the maps.
>
> Probably. Or tweak SeaBIOS to use your E820.
I don't think tweaking SeaBIOS to use a different specific map
is the way forward. As I said in the other email, my motivation
is to make something that will work in the general case, not
for the memory map in my dodgy hardware (I'm sure there are
many other poorly designed bits of hardware out there this might
be useful on ;) ).
> Also you need to figure out where hvmloader constructs the ACPI and
> SMBIOS tables and make sure they are within the E820_RESERVED
> regions.
This doesn't appear to have caused any problems - the only
problematic part is trampling over the host's _mapped_ parts
of the PCI MMIO hole. Having domU RAM everywhere else doesn't
_appear_ to cause any problems, hence why I would like to
focus my effort on making sure that the holes are mapped
while breaking nothing else if at all possible.
>> Is that right? Nothing else needs to happen?
>
> HA! You are going to hit some bugs probably :-)
Hey, some degree of optimisim is required for perseverence. ;)
>> The following questions arise:
>>
>> 1) What to do in case of overlaps? On my specific hardware,
>> the key difference in the end map will be that the hole at:
>> (XEN) HVM1: HOLE: 00000000:40000000 - 00000000:fee00000
>> will end up being created in domU.
>
> The hole is also known as PCI gap or MMIO region. With the
> e820_host in effect you should use the host's layout and
> use its hole placement. That will replicate it and make
> domU's E820 hole look like the host.
Hmm... Now there's an idea. I _could_ just hard-code the
memory hole to match that just to see if it fixes the
problem. I rather expect, however, that this will just
move the problem.
Specifically, it is liable to make domU MMIO overlap
(without matching) the dom0 MMIO and crash the host
quite spectacularly. Unless domU decides to map MMIO
from the bottom up, in which case there's 1688MB of
MMIO space between 0x40000000 and 0xa8000000 where
MMIO will end up in domU, never overlapping the host's
map and everything will, by pure chance, work just
fine from there on.
>> 2) Do only the holes need to be pulled from the host or
>> the entire map? Would hvmloader/seabios/whatever know
>> what to do if passed a map that is different from what
>> they might expect (i.e. different from what the current
>> hvmloader provides)? Or would this be likely to cause
>> extensive further breakages?
>
> I think there are some assumptions made where the hole
> starts. Those would have to be made more dynamic to deal
> with a different E820 layout.
Assumptions made by what?
>> 3) At the moment I am leaning toward just pulling in the
>> holes from the host e820, mirroring them in domU.
>
> <nods>
>
>> 3.1) Marking them as "reserved" would likely fix the
>> problem that was my primary motivation for doing this
>> in the first place. Having said that - with all of
>
> That unfortuntaly will make them not-gaps nor MMIO regions.
> Meaning the kernel will scream: "You have a BAR in E820_
> reserved region! That is bad!", and won't setup the card.
What makes decision in domU where to map the PCI
devices' MMIO? SeaBIOS?
> The hole needs to be replicated in the guest.
>> the 1GB-3GB space marked as reserved, I'm not sure where
>> the IOMEM would end up mapped in domU - things might just
>> break. If marking the dom0 hole as a hole in domU without
>> ensuring pBAR=vBAR, the PCI device in domU might get
>> mapped with where another device is in dom0, which might
>> cause the same problem.
>
> Right. hvmloader could (I hadn't checked the code) scan the
> E820 and determine that the PCI BARs are within the E820_RESRV
> and try to move them to a hole. Since no hole would be found
> below 4GB it would remap the PCI BAR above 4GB. That - depending
> on the device - could be disastrous for the device. That is
> if it is only capable of 32-bit DMA's it will never do anything.
Nvidia cards have a 32-bit 32MB BAR by default, and two 64-bit
BARs.
Looking at the different maps, I think I see what is actually
happening. In domU, the hole defaults to starting at e0000000,
and this is also where the BARs get mapped for the GPU in domU.
That implies that mirroring the host's hole at 1GB-4GB, would
actually likely work (by a fluke), since the BARs would
(hopefully) get mapped at bottom (plenty of hole before the
host's mapping, 1688MB to be exact), and the rest of the hole
would never get touched, stealthily (or obliviously, depending
on how you want to look at it) avoiding trampling over the
host's BARs.
OK, I'm convinced - I'll give this a try and see how I get
on. :)
>> At the moment, I think the expedient thing to do is make
>> domU map holes as per dom0 and ignore other non-RAM
>
> <nods>
>> areas. This may (by luck) or may not fix my immediate problem
>> (RAM in domU clobbering host's mapped IOMEM), but at
>> least it would cover the pre-requisite hole mapping for
>> the next step which is vBAR=pBAR.
>
> <nods>
>>
>> I light of this, however, depending on the answer to 2)
>> above, it may not be practical for e820_host option do do
>
> I think it will mean you need to look in the hvmloader directory
> a bit more and find all of the assumptions it makes about memory
> locations. One excellent tool is to do 'git log -p tools/hvmloader'
> as it will tell you what changes have been done to address
> the memory layout construction.
I'll have a dig.
>> what it actually means for HVMs, at least not to the same
>> extent as happens for PV. It would only do a part of it
>> (initial vHOLE=pHOLE, to later be extended to the more
>> specific case of vBAR=pBAR).
>>
>> Does this sound reasonable?
>
> Yes. I think the plan you outlined is sound. The difficultiy is
> going to be cramming the E820 constructed by e820_host in hvmloader
> and making sure that all the other parts of it (SMBIOS, ACPI, BIOS)
> will be more dynamic and use dynamic locations instead of
> hard-coded values.
>
> Loads of printks can help with that :-)
This is my main concern - that other things are making assumptions
about where the holes are. At the moment it doesn't look too bad
since the only areas of conflict between (_my_) host and current
hvmloader maps is in the RAM and HOLE areas, so coming up with
a generic solution that will work for my use (and hopefully
for most other people) ought to be fairly simple. Making it
actually work in the edge cases will be harder - but then again
for those cases it doesn't work at the moment anyway so erring
on the side of pragmatism may be the correct thing to do here.
> The awesome thing is that it will make hvmloader a lot more
> flexible. And one can extend the e820_host to construct an
> E820 that is bizzare for testing even more absurd memory
> layouts (say, no RAM below 4GB).
>
> Keep on digging! Thanks for great analysis.
Thanks, I appreciate it. :)
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-06 14:32 ` Konrad Rzeszutek Wilk
@ 2013-09-06 16:30 ` Gordan Bobic
2013-09-06 19:54 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-06 16:30 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: xen-devel, Stefano Stabellini
On Fri, 6 Sep 2013 10:32:23 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
>> >>On the face of it, that's actually fine - my PCI IOMEM mappings
>> show
>> >>the lowest mapping (according to lspci -vvv) starts at a8000000,
>> >
>> ><surprise>
>>
>> Indeed - on the host, the hole is 1GB-4GB, but there is no IOMEM
>> mapped between 1024M and 2688MB. Hence why I can get away with a
>> domU memory allocation up to 2688MB.
>
> When you say 'IOMEM' you mean /proc/iomem output?
I mean what lspci shows WRT where PCI device memory regions
are mapped.
>> >>explain what is actually going wrong and why the crash is still
>> >>occuring - unless some other piece of hardware is having it's domU
>> >>IOMEM mapped somewhere in the range f3df4000-fec8b000 and that is
>> >>causing a memory overwrite.
>> >>
>> >>I am just not seeing any obvious memory stomp at the moment...
>> >
>> >Neither am I.
>>
>> I may have pasted the wrong domU e820. I have a sneaky suspicion
>> that this above map was from a domU with 2688MB of RAM assigned,
>> hence why there is on domU RAM in the map above a7800000. I'll
>> re-check when I'm in front of that machine again.
>>
>> Are you OK with the plan to _only_ copy the holes from host E820
>> to the hvmloader E820? I think this would be sufficient and not
>> cause any undue problems. The only things that would need to
>> change are:
>> 1) Enlarge the domU hole
>> 2) Do something with the top reserved block, starting at
>> RESERVED_MEMBASE=0xFC000000. What is this actually for? It
>> overlaps with the host memory hole which extends all the way up
>> to 0xfee00000. If it must be where it is, this could be
>> problematic. What to do in this case?
>
> I would do a git log or git annotate to find it. I recall
> some patches to move that - but I can't recall the details.
Will do. But what could this possibly be for?
>> So would it perhaps be neater, easier, more consistent and
>> more debuggable to just make the hvmloader put in a hole
>> between 0x40000000-0xffffffff (the whole 3GB) by default?
>> Or is that deemed to be too crippling for 32-bit non-PAE
>> domUs (and are there enough of these aroudn to matter?)?
>
> Correct. Also it would wreak havoc when migrating to other
> hvmloader's which have a different layout.
Two points here that might just be worth pointing out here:
1) domUs with e820_host set aren't migratable anyway
(including PV ones for which e820_host is currently
implemented)
2) All of this is conditional on e820_host=1 being set
in the config. Since legacy hosts won't have this set
anyway (since it isn't implemented, and won't be until
this patch set is completed), surely any notion of
backward compatibility for HVMs with e820_host=1 set
is null and void.
Thus - as a first pass solution that would work in
most cases where this option is useful in the first
place, setting the low RAM limit to the beginning of
the first memory hole above 0x100000 (1MB) should be
OK.
Leave anything after that unmapped (that seems to
be what shows up as "HOLE" on the dumps) all the
way up to RESERVED_MEMBASE.
That would only leave the question of what it is
(if anything) that uses the memory between
RESERVED_MEMBASE and 0xffffffff (4GB) and under
which circumstances. This could be somewhat important
because 0xfec8a000 -> +4KB on my machine is actually
the Intel I/O APIC. If it is reserved and nothing uses
it, no problem, it can stay as is. If SeaBIOS or similar
is known to write to it under some circumstances, that
could easily be quite crashtastic.
>> Caveat - this alone wouldn't cover any other weirdness such as
>> the odd memory hole 0x3f7e0000-0x3f7e7000 on my hardware. Was
>> this what you were thinking about when asking whether my domUs
>> work OK with 1GB of RAM? Since that is just under the 1GB
>> limit.
>
> So there are some issues with i915 IGD having to have a 'flush
> page'. Mainly some non-RAM region that they can tell the IGD
> to flush its pages. And it had to be non-RAM and somehow
> via magic IGD registers you can program the physical address
> in the card - so the card has it remapped to itself.
>
> Usually it is some gap (aka hole) that ends has to be
> faithfully reproduced in the guest. But you are using
> nvidia and are not playing those nasty tricks.
Mere a different set of nasty tricks instead. :)
But yes, on the whole, I agree. I will try to get the holes
as similar as possible for a "production" level patch.
>> To clarify, I am not suggesting just hard coding a 3GB memory
>> hole - I am suggesting defaulting to at least that and them
>> mapping in any additional memory holes as well. My reasoning
>> behind this suggestion is that it would make things more
>> consistent between different (possibly dissimilar) hosts.
>
> Potentially. The other option when thinking about migration
> and PCI - is to interogate _All_ of the hosts that will be involved
> in the migration and construct an E820 that covers all the
> right regions. Then use that for the guests and then you
> can unplug/plug the PCI devices without much trouble.
That's possibly a step too far at this point.
> That is where the e820_host=1 parameter can be used and
> also some extra code to slurp up an XML of the E820 could be
> implemented.
>
> The 3GB HOLE could do it, but what if the host has some
> odd layout where the HOLE is above 4GB? Then we are back at
> remapping.
Such a host would also only work with devices that _only_
require 64-bit BARs. But they do exist (e.g. ATI GPUs).
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-06 16:30 ` Gordan Bobic
@ 2013-09-06 19:54 ` Gordan Bobic
2013-09-10 13:35 ` Konrad Rzeszutek Wilk
0 siblings, 1 reply; 74+ messages in thread
From: Gordan Bobic @ 2013-09-06 19:54 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: Stefano Stabellini, xen-devel
Here is a test patch I applied to:
/tools/firmware/hvmloader/e820.c
===
--- e820.c.orig 2013-09-06 11:15:20.023337321 +0100
+++ e820.c 2013-09-06 19:53:00.141876019 +0100
@@ -79,6 +79,7 @@
unsigned int nr = 0;
struct xen_memory_map op;
struct e820entry map[E820MAX];
+ int e820_host = 0;
int rc;
if ( !lowmem_reserved_base )
@@ -88,6 +89,7 @@
rc = hypercall_memory_op ( XENMEM_memory_map, &op);
if ( rc != -ENOSYS) { /* It works!? */
+ e820_host = 1;
printf("%s:%d got %d op.nr_entries \n", __func__, __LINE__,
op.nr_entries);
dump_e820_table(&map[0], op.nr_entries);
}
@@ -133,7 +135,12 @@
/* Low RAM goes here. Reserve space for special pages. */
BUG_ON((hvm_info->low_mem_pgend << PAGE_SHIFT) < (2u << 20));
e820[nr].addr = 0x100000;
- e820[nr].size = (hvm_info->low_mem_pgend << PAGE_SHIFT) -
e820[nr].addr;
+
+ if (e820_host)
+ e820[nr].size = 0x3f7e0000 - e820[nr].addr;
+ else
+ e820[nr].size = (hvm_info->low_mem_pgend << PAGE_SHIFT) -
e820[nr].addr;
+
e820[nr].type = E820_RAM;
nr++;
===
I'm sure this doesn't need explicitly pointing out, but for the record,
it is a gross hack just to prove the concept.
The map dump with this patch applied and memory set to 8192 is:
===
(XEN) HVM5: BIOS map:
(XEN) HVM5: f0000-fffff: Main BIOS
(XEN) HVM5: build_e820_table:93 got 8 op.nr_entries
(XEN) HVM5: E820 table:
(XEN) HVM5: [00]: 00000000:00000000 - 00000000:3f790000: RAM
(XEN) HVM5: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
(XEN) HVM5: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
(XEN) HVM5: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
(XEN) HVM5: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
(XEN) HVM5: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
(XEN) HVM5: HOLE: 00000000:40000000 - 00000000:fee00000
(XEN) HVM5: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
(XEN) HVM5: HOLE: 00000000:fee01000 - 00000000:ffc00000
(XEN) HVM5: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
(XEN) HVM5: [07]: 00000001:00000000 - 00000002:c0870000: RAM
(XEN) HVM5: E820 table:
(XEN) HVM5: [00]: 00000000:00000000 - 00000000:0009e000: RAM
(XEN) HVM5: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
(XEN) HVM5: HOLE: 00000000:000a0000 - 00000000:000e0000
(XEN) HVM5: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
(XEN) HVM5: [03]: 00000000:00100000 - 00000000:3f7e0000: RAM
(XEN) HVM5: HOLE: 00000000:3f7e0000 - 00000000:fc000000
(XEN) HVM5: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
(XEN) HVM5: [05]: 00000001:00000000 - 00000002:1f800000: RAM
(XEN) HVM5: Invoking ROMBIOS ...
===
Good observations:
It works! No crashes, no screen corruption! As an added bonus, it fixes
the problem of rebooting domUs causing them to lose GPU access and
eventually crash the host even with memory allocation below the first
PCI MMIO block. I am suspecting that something in the
0x3f7e0000-0x3f7e7000 hole that isn't showing up on lspci might be
responsible.
I think that proves beyond any doubt what the problem was before.
Interesting observations:
1) GPU PCI MMIO is still mapped at E0000000, rather than at the bottom
of the memory hole. That implies that SeaBIOS (or whatever does the
mapping) makes assumptions about where the memory hole begins. This will
need to somehow be fixed / made dynamic. What decides where to map PCI
memory for each device?
2) The memory hole size difference counts toward the total guest memory.
I set
memory=8192
maxmem=8192
but Windows in domU only sees 5.48GB. What is particularly odd is that
that the missing memory isn't 3GB, but 2.5GB - which implies that,
again, there are other things making assumptions about the size and
shape of the memory hole and moving the memory from the hole elsewhere
to make it usable. What does this?
My todo list, in order of priority (unless somebody here has a better
idea) is:
1) Tidy up the hole enlargement to make it dynamically based on the host
hole locations. In cases where the host hole overlaps something other
than guest RAM/HOLE (i.e. RESERVED), guest spec wins.
2) Fix whatever is causing the hole memory increase to reduce the guest
memory. The memory hole is a hole, not a shadow. I need some pointers on
where to look for whatever is responsible for this.
3) Fix what makes decisions on where to map devices' memory apertures.
Ideally, the fix should be to detect host's pBAR make vBAR=pBAR. Again,
I need some pointers on where to look for whatever is responsible for
doing this mapping.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-06 19:54 ` Gordan Bobic
@ 2013-09-10 13:35 ` Konrad Rzeszutek Wilk
2013-09-10 15:04 ` Gordan Bobic
0 siblings, 1 reply; 74+ messages in thread
From: Konrad Rzeszutek Wilk @ 2013-09-10 13:35 UTC (permalink / raw)
To: Gordan Bobic; +Cc: Stefano Stabellini, xen-devel
On Fri, Sep 06, 2013 at 08:54:24PM +0100, Gordan Bobic wrote:
> Here is a test patch I applied to:
> /tools/firmware/hvmloader/e820.c
>
> ===
> --- e820.c.orig 2013-09-06 11:15:20.023337321 +0100
> +++ e820.c 2013-09-06 19:53:00.141876019 +0100
> @@ -79,6 +79,7 @@
> unsigned int nr = 0;
> struct xen_memory_map op;
> struct e820entry map[E820MAX];
> + int e820_host = 0;
> int rc;
>
> if ( !lowmem_reserved_base )
> @@ -88,6 +89,7 @@
>
> rc = hypercall_memory_op ( XENMEM_memory_map, &op);
> if ( rc != -ENOSYS) { /* It works!? */
> + e820_host = 1;
> printf("%s:%d got %d op.nr_entries \n", __func__, __LINE__,
> op.nr_entries);
> dump_e820_table(&map[0], op.nr_entries);
> }
> @@ -133,7 +135,12 @@
> /* Low RAM goes here. Reserve space for special pages. */
> BUG_ON((hvm_info->low_mem_pgend << PAGE_SHIFT) < (2u << 20));
> e820[nr].addr = 0x100000;
> - e820[nr].size = (hvm_info->low_mem_pgend << PAGE_SHIFT) -
> e820[nr].addr;
> +
> + if (e820_host)
> + e820[nr].size = 0x3f7e0000 - e820[nr].addr;
> + else
> + e820[nr].size = (hvm_info->low_mem_pgend << PAGE_SHIFT) -
> e820[nr].addr;
> +
> e820[nr].type = E820_RAM;
> nr++;
>
> ===
>
> I'm sure this doesn't need explicitly pointing out, but for the
> record, it is a gross hack just to prove the concept.
>
> The map dump with this patch applied and memory set to 8192 is:
>
> ===
> (XEN) HVM5: BIOS map:
> (XEN) HVM5: f0000-fffff: Main BIOS
> (XEN) HVM5: build_e820_table:93 got 8 op.nr_entries
> (XEN) HVM5: E820 table:
> (XEN) HVM5: [00]: 00000000:00000000 - 00000000:3f790000: RAM
> (XEN) HVM5: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
> (XEN) HVM5: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
> (XEN) HVM5: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
> (XEN) HVM5: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
> (XEN) HVM5: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
> (XEN) HVM5: HOLE: 00000000:40000000 - 00000000:fee00000
> (XEN) HVM5: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
> (XEN) HVM5: HOLE: 00000000:fee01000 - 00000000:ffc00000
> (XEN) HVM5: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
> (XEN) HVM5: [07]: 00000001:00000000 - 00000002:c0870000: RAM
> (XEN) HVM5: E820 table:
> (XEN) HVM5: [00]: 00000000:00000000 - 00000000:0009e000: RAM
> (XEN) HVM5: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
> (XEN) HVM5: HOLE: 00000000:000a0000 - 00000000:000e0000
> (XEN) HVM5: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
> (XEN) HVM5: [03]: 00000000:00100000 - 00000000:3f7e0000: RAM
> (XEN) HVM5: HOLE: 00000000:3f7e0000 - 00000000:fc000000
> (XEN) HVM5: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
> (XEN) HVM5: [05]: 00000001:00000000 - 00000002:1f800000: RAM
> (XEN) HVM5: Invoking ROMBIOS ...
> ===
>
> Good observations:
> It works! No crashes, no screen corruption! As an added bonus, it
> fixes the problem of rebooting domUs causing them to lose GPU access
> and eventually crash the host even with memory allocation below the
> first PCI MMIO block. I am suspecting that something in the
> 0x3f7e0000-0x3f7e7000 hole that isn't showing up on lspci might be
> responsible.
>
> I think that proves beyond any doubt what the problem was before.
>
> Interesting observations:
> 1) GPU PCI MMIO is still mapped at E0000000, rather than at the
> bottom of the memory hole. That implies that SeaBIOS (or whatever
> does the mapping) makes assumptions about where the memory hole
> begins. This will need to somehow be fixed / made dynamic. What
> decides where to map PCI memory for each device?
>
> 2) The memory hole size difference counts toward the total guest
> memory. I set
> memory=8192
> maxmem=8192
> but Windows in domU only sees 5.48GB. What is particularly odd is
> that that the missing memory isn't 3GB, but 2.5GB - which implies
> that, again, there are other things making assumptions about the
> size and shape of the memory hole and moving the memory from the
> hole elsewhere to make it usable. What does this?
>
> My todo list, in order of priority (unless somebody here has a
> better idea) is:
> 1) Tidy up the hole enlargement to make it dynamically based on the
> host hole locations. In cases where the host hole overlaps something
> other than guest RAM/HOLE (i.e. RESERVED), guest spec wins.
guest spec is .. the default hvmloader behavior?
>
> 2) Fix whatever is causing the hole memory increase to reduce the
> guest memory. The memory hole is a hole, not a shadow. I need some
> pointers on where to look for whatever is responsible for this.
That is where git log tools/hvmloader/firmware might shed some light.
>
> 3) Fix what makes decisions on where to map devices' memory
> apertures. Ideally, the fix should be to detect host's pBAR make
> vBAR=pBAR. Again, I need some pointers on where to look for whatever
> is responsible for doing this mapping.
That should be all in tools/hvmloader/firmware I believe.
'pci_setup' function, where it says:
/* Assign iomem and ioport resources in descending order of size. */
>
> Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0)
2013-09-10 13:35 ` Konrad Rzeszutek Wilk
@ 2013-09-10 15:04 ` Gordan Bobic
0 siblings, 0 replies; 74+ messages in thread
From: Gordan Bobic @ 2013-09-10 15:04 UTC (permalink / raw)
To: Konrad Rzeszutek Wilk; +Cc: Stefano Stabellini, xen-devel
On Tue, 10 Sep 2013 09:35:59 -0400, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> On Fri, Sep 06, 2013 at 08:54:24PM +0100, Gordan Bobic wrote:
>> Here is a test patch I applied to:
>> /tools/firmware/hvmloader/e820.c
>>
>> ===
>> --- e820.c.orig 2013-09-06 11:15:20.023337321 +0100
>> +++ e820.c 2013-09-06 19:53:00.141876019 +0100
>> @@ -79,6 +79,7 @@
>> unsigned int nr = 0;
>> struct xen_memory_map op;
>> struct e820entry map[E820MAX];
>> + int e820_host = 0;
>> int rc;
>>
>> if ( !lowmem_reserved_base )
>> @@ -88,6 +89,7 @@
>>
>> rc = hypercall_memory_op ( XENMEM_memory_map, &op);
>> if ( rc != -ENOSYS) { /* It works!? */
>> + e820_host = 1;
>> printf("%s:%d got %d op.nr_entries \n", __func__, __LINE__,
>> op.nr_entries);
>> dump_e820_table(&map[0], op.nr_entries);
>> }
>> @@ -133,7 +135,12 @@
>> /* Low RAM goes here. Reserve space for special pages. */
>> BUG_ON((hvm_info->low_mem_pgend << PAGE_SHIFT) < (2u << 20));
>> e820[nr].addr = 0x100000;
>> - e820[nr].size = (hvm_info->low_mem_pgend << PAGE_SHIFT) -
>> e820[nr].addr;
>> +
>> + if (e820_host)
>> + e820[nr].size = 0x3f7e0000 - e820[nr].addr;
>> + else
>> + e820[nr].size = (hvm_info->low_mem_pgend << PAGE_SHIFT) -
>> e820[nr].addr;
>> +
>> e820[nr].type = E820_RAM;
>> nr++;
>>
>> ===
>>
>> I'm sure this doesn't need explicitly pointing out, but for the
>> record, it is a gross hack just to prove the concept.
>>
>> The map dump with this patch applied and memory set to 8192 is:
>>
>> ===
>> (XEN) HVM5: BIOS map:
>> (XEN) HVM5: f0000-fffff: Main BIOS
>> (XEN) HVM5: build_e820_table:93 got 8 op.nr_entries
>> (XEN) HVM5: E820 table:
>> (XEN) HVM5: [00]: 00000000:00000000 - 00000000:3f790000: RAM
>> (XEN) HVM5: [01]: 00000000:3f790000 - 00000000:3f79e000: ACPI
>> (XEN) HVM5: [02]: 00000000:3f79e000 - 00000000:3f7d0000: NVS
>> (XEN) HVM5: [03]: 00000000:3f7d0000 - 00000000:3f7e0000: RESERVED
>> (XEN) HVM5: HOLE: 00000000:3f7e0000 - 00000000:3f7e7000
>> (XEN) HVM5: [04]: 00000000:3f7e7000 - 00000000:40000000: RESERVED
>> (XEN) HVM5: HOLE: 00000000:40000000 - 00000000:fee00000
>> (XEN) HVM5: [05]: 00000000:fee00000 - 00000000:fee01000: RESERVED
>> (XEN) HVM5: HOLE: 00000000:fee01000 - 00000000:ffc00000
>> (XEN) HVM5: [06]: 00000000:ffc00000 - 00000001:00000000: RESERVED
>> (XEN) HVM5: [07]: 00000001:00000000 - 00000002:c0870000: RAM
>> (XEN) HVM5: E820 table:
>> (XEN) HVM5: [00]: 00000000:00000000 - 00000000:0009e000: RAM
>> (XEN) HVM5: [01]: 00000000:0009e000 - 00000000:000a0000: RESERVED
>> (XEN) HVM5: HOLE: 00000000:000a0000 - 00000000:000e0000
>> (XEN) HVM5: [02]: 00000000:000e0000 - 00000000:00100000: RESERVED
>> (XEN) HVM5: [03]: 00000000:00100000 - 00000000:3f7e0000: RAM
>> (XEN) HVM5: HOLE: 00000000:3f7e0000 - 00000000:fc000000
>> (XEN) HVM5: [04]: 00000000:fc000000 - 00000001:00000000: RESERVED
>> (XEN) HVM5: [05]: 00000001:00000000 - 00000002:1f800000: RAM
>> (XEN) HVM5: Invoking ROMBIOS ...
>> ===
>>
>> Good observations:
>> It works! No crashes, no screen corruption! As an added bonus, it
>> fixes the problem of rebooting domUs causing them to lose GPU access
>> and eventually crash the host even with memory allocation below the
>> first PCI MMIO block. I am suspecting that something in the
>> 0x3f7e0000-0x3f7e7000 hole that isn't showing up on lspci might be
>> responsible.
>>
>> I think that proves beyond any doubt what the problem was before.
>>
>> Interesting observations:
>> 1) GPU PCI MMIO is still mapped at E0000000, rather than at the
>> bottom of the memory hole. That implies that SeaBIOS (or whatever
>> does the mapping) makes assumptions about where the memory hole
>> begins. This will need to somehow be fixed / made dynamic. What
>> decides where to map PCI memory for each device?
>>
>> 2) The memory hole size difference counts toward the total guest
>> memory. I set
>> memory=8192
>> maxmem=8192
>> but Windows in domU only sees 5.48GB. What is particularly odd is
>> that that the missing memory isn't 3GB, but 2.5GB - which implies
>> that, again, there are other things making assumptions about the
>> size and shape of the memory hole and moving the memory from the
>> hole elsewhere to make it usable. What does this?
>>
>> My todo list, in order of priority (unless somebody here has a
>> better idea) is:
>> 1) Tidy up the hole enlargement to make it dynamically based on the
>> host hole locations. In cases where the host hole overlaps something
>> other than guest RAM/HOLE (i.e. RESERVED), guest spec wins.
>
> guest spec is .. the default hvmloader behavior?
Yes, that's exactly what I meant. At least until I can figure out
what necessitates the default HVM behaviour.
>> 2) Fix whatever is causing the hole memory increase to reduce the
>> guest memory. The memory hole is a hole, not a shadow. I need some
>> pointers on where to look for whatever is responsible for this.
>
> That is where git log tools/hvmloader/firmware might shed some light.
I grepped for low_mem_pgend and high_mem_pgend, and the only place
where I have found anything is in one place in libxc. Is this what
sets it? Is this common to xm and xl?
>> 3) Fix what makes decisions on where to map devices' memory
>> apertures. Ideally, the fix should be to detect host's pBAR make
>> vBAR=pBAR. Again, I need some pointers on where to look for whatever
>> is responsible for doing this mapping.
>
> That should be all in tools/hvmloader/firmware I believe.
> 'pci_setup' function, where it says:
> /* Assign iomem and ioport resources in descending order of size. */
Thanks, will take a closer look there.
Gordan
^ permalink raw reply [flat|nested] 74+ messages in thread
end of thread, other threads:[~2013-09-10 15:04 UTC | newest]
Thread overview: 74+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-07-23 22:34 Bug: Limitation of <=2GB RAM in domU persists with 4.3.0 Gordan Bobic
2013-07-24 14:08 ` Konrad Rzeszutek Wilk
2013-07-24 14:17 ` Gordan Bobic
2013-07-24 16:06 ` Konrad Rzeszutek Wilk
2013-07-24 16:14 ` Gordan Bobic
2013-07-24 16:31 ` Konrad Rzeszutek Wilk
2013-07-24 17:26 ` Gordan Bobic
2013-07-24 22:15 ` Gordan Bobic
2013-07-25 19:18 ` George Dunlap
2013-07-25 21:48 ` Gordan Bobic
2013-07-25 22:23 ` Gordan Bobic
2013-07-26 0:21 ` Ian Campbell
2013-07-26 1:15 ` Andrew Bobulsky
2013-07-26 9:28 ` Gordan Bobic
2013-07-26 13:11 ` Gordan Bobic
2013-07-31 17:53 ` George Dunlap
2013-07-31 17:56 ` Andrew Cooper
2013-07-31 19:36 ` Gordan Bobic
2013-07-31 19:35 ` Gordan Bobic
2013-08-01 9:15 ` George Dunlap
2013-08-01 13:10 ` Fabio Fantoni
2013-08-02 14:43 ` George Dunlap
2013-07-28 10:26 ` Konrad Rzeszutek Wilk
2013-07-28 21:24 ` Gordan Bobic
2013-07-28 23:17 ` Konrad Rzeszutek Wilk
2013-07-28 23:30 ` Gordan Bobic
2013-07-29 9:53 ` Ian Campbell
2013-07-26 9:23 ` Gordan Bobic
2013-07-29 11:14 ` Ian Campbell
2013-07-29 18:04 ` Konrad Rzeszutek Wilk
2013-09-03 13:53 ` Gordan Bobic
2013-09-03 14:59 ` Konrad Rzeszutek Wilk
2013-09-03 19:47 ` HVM support for e820_host (Was: Bug: Limitation of <=2GB RAM in domU persists with 4.3.0) Gordan Bobic
2013-09-03 20:35 ` Gordan Bobic
2013-09-03 20:49 ` Gordan Bobic
2013-09-03 21:10 ` Konrad Rzeszutek Wilk
2013-09-03 21:24 ` Gordan Bobic
2013-09-03 21:30 ` Konrad Rzeszutek Wilk
2013-09-04 0:18 ` Gordan Bobic
2013-09-04 14:08 ` Konrad Rzeszutek Wilk
2013-09-04 14:23 ` Gordan Bobic
2013-09-04 18:00 ` Konrad Rzeszutek Wilk
2013-09-03 21:08 ` Konrad Rzeszutek Wilk
2013-09-04 9:21 ` Gordan Bobic
2013-09-04 11:01 ` Gordan Bobic
2013-09-04 13:11 ` Gordan Bobic
2013-09-04 20:18 ` Gordan Bobic
2013-09-05 2:04 ` Konrad Rzeszutek Wilk
2013-09-05 9:41 ` Gordan Bobic
2013-09-05 10:00 ` Gordan Bobic
2013-09-05 12:36 ` Konrad Rzeszutek Wilk
2013-09-05 10:26 ` Gordan Bobic
2013-09-05 12:38 ` Konrad Rzeszutek Wilk
2013-09-05 21:13 ` Gordan Bobic
2013-09-05 21:29 ` Gordan Bobic
2013-09-05 21:46 ` Gordan Bobic
2013-09-05 22:23 ` Konrad Rzeszutek Wilk
2013-09-05 22:42 ` Gordan Bobic
2013-09-06 13:09 ` Konrad Rzeszutek Wilk
2013-09-06 14:09 ` Gordan Bobic
2013-09-05 22:45 ` Gordan Bobic
2013-09-05 23:01 ` Konrad Rzeszutek Wilk
2013-09-06 12:23 ` Gordan Bobic
2013-09-06 13:20 ` Konrad Rzeszutek Wilk
2013-09-06 14:45 ` Gordan Bobic
2013-09-05 22:33 ` Gordan Bobic
2013-09-06 13:04 ` Konrad Rzeszutek Wilk
2013-09-06 13:34 ` Gordan Bobic
2013-09-06 14:32 ` Konrad Rzeszutek Wilk
2013-09-06 16:30 ` Gordan Bobic
2013-09-06 19:54 ` Gordan Bobic
2013-09-10 13:35 ` Konrad Rzeszutek Wilk
2013-09-10 15:04 ` Gordan Bobic
2013-07-25 21:26 ` Bug: Limitation of <=2GB RAM in domU persists with 4.3.0 Gordan Bobic
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