[PATCH v8 0/3] DMA: Freescale: Add support for 8-channel DMA engine

[PATCH v8 0/3] DMA: Freescale: Add support for 8-channel DMA engine

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

Hi DMA and DT maintainers, please have a look at these V8 patches.

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
adds support this DMA engine.

V7->V8 changes:
- change the word "mapping" to "specifier" for reg and interrupts description

V6->V7 changes:
- only remove unnecessary "CHIP-dma" explanations in [1/3]

V5->V6 changes:
- minor updates of descriptions in binding document and Kconfig
- remove [4/4], that should be another patch in future

V4->V5 changes:
- update description in the dt binding document, to make it more resonable
- add new patch [4/4] to eliminate a compiling warning which already exists
  for a long time

V3->V4 changes:
- introduce new patch [1/3] to revise the legacy dma binding document
- and then add new paragraph to describe new dt node binding in [2/3]
- rebase to latest kernel v3.11-rc1

V2->V3 changes:
- edit Documentation/devicetree/bindings/powerpc/fsl/dma.txt
- edit text string in Kconfig and the driver files, using "elo series" to
  mention all the current "elo*"

V1->V2 changes:
- removed the codes handling the register dgsr1, since it isn't used currently
- renamed the DMA DT compatible to "fsl,elo3-dma"
- renamed the new dts files to "elo3-dma-<n>.dtsi"

Hongbo Zhang (3):
  DMA: Freescale: revise device tree binding document
  DMA: Freescale: Add new 8-channel DMA engine device tree nodes
  DMA: Freescale: update driver to support 8-channel DMA engine

 .../devicetree/bindings/powerpc/fsl/dma.txt        |  128 ++++++++++++++------
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 +++++++++++++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 +++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
 drivers/dma/Kconfig                                |    9 +-
 drivers/dma/fsldma.c                               |    9 +-
 drivers/dma/fsldma.h                               |    2 +-
 8 files changed, 271 insertions(+), 47 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

-- 
1.7.9.5

[PATCH v8 0/3] DMA: Freescale: Add support for 8-channel DMA engine

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

Hi DMA and DT maintainers, please have a look at these V8 patches.

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
adds support this DMA engine.

V7->V8 changes:
- change the word "mapping" to "specifier" for reg and interrupts description

V6->V7 changes:
- only remove unnecessary "CHIP-dma" explanations in [1/3]

V5->V6 changes:
- minor updates of descriptions in binding document and Kconfig
- remove [4/4], that should be another patch in future

V4->V5 changes:
- update description in the dt binding document, to make it more resonable
- add new patch [4/4] to eliminate a compiling warning which already exists
  for a long time

V3->V4 changes:
- introduce new patch [1/3] to revise the legacy dma binding document
- and then add new paragraph to describe new dt node binding in [2/3]
- rebase to latest kernel v3.11-rc1

V2->V3 changes:
- edit Documentation/devicetree/bindings/powerpc/fsl/dma.txt
- edit text string in Kconfig and the driver files, using "elo series" to
  mention all the current "elo*"

V1->V2 changes:
- removed the codes handling the register dgsr1, since it isn't used currently
- renamed the DMA DT compatible to "fsl,elo3-dma"
- renamed the new dts files to "elo3-dma-<n>.dtsi"

Hongbo Zhang (3):
  DMA: Freescale: revise device tree binding document
  DMA: Freescale: Add new 8-channel DMA engine device tree nodes
  DMA: Freescale: update driver to support 8-channel DMA engine

 .../devicetree/bindings/powerpc/fsl/dma.txt        |  128 ++++++++++++++------
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 +++++++++++++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 +++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
 drivers/dma/Kconfig                                |    9 +-
 drivers/dma/fsldma.c                               |    9 +-
 drivers/dma/fsldma.h                               |    2 +-
 8 files changed, 271 insertions(+), 47 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

-- 
1.7.9.5

[PATCH v8 0/3] DMA: Freescale: Add support for 8-channel DMA engine

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

Hi DMA and DT maintainers, please have a look at these V8 patches.

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
adds support this DMA engine.

V7->V8 changes:
- change the word "mapping" to "specifier" for reg and interrupts description

V6->V7 changes:
- only remove unnecessary "CHIP-dma" explanations in [1/3]

V5->V6 changes:
- minor updates of descriptions in binding document and Kconfig
- remove [4/4], that should be another patch in future

V4->V5 changes:
- update description in the dt binding document, to make it more resonable
- add new patch [4/4] to eliminate a compiling warning which already exists
  for a long time

V3->V4 changes:
- introduce new patch [1/3] to revise the legacy dma binding document
- and then add new paragraph to describe new dt node binding in [2/3]
- rebase to latest kernel v3.11-rc1

V2->V3 changes:
- edit Documentation/devicetree/bindings/powerpc/fsl/dma.txt
- edit text string in Kconfig and the driver files, using "elo series" to
  mention all the current "elo*"

V1->V2 changes:
- removed the codes handling the register dgsr1, since it isn't used currently
- renamed the DMA DT compatible to "fsl,elo3-dma"
- renamed the new dts files to "elo3-dma-<n>.dtsi"

Hongbo Zhang (3):
  DMA: Freescale: revise device tree binding document
  DMA: Freescale: Add new 8-channel DMA engine device tree nodes
  DMA: Freescale: update driver to support 8-channel DMA engine

 .../devicetree/bindings/powerpc/fsl/dma.txt        |  128 ++++++++++++++------
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 +++++++++++++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 +++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
 drivers/dma/Kconfig                                |    9 +-
 drivers/dma/fsldma.c                               |    9 +-
 drivers/dma/fsldma.h                               |    2 +-
 8 files changed, 271 insertions(+), 47 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

-- 
1.7.9.5

[PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
also fixes some defects of indent for text alignment at the same time.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
 1 file changed, 27 insertions(+), 35 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index 2a4b4bc..ddf17af 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -1,33 +1,29 @@
-* Freescale 83xx DMA Controller
+* Freescale DMA Controllers
 
-Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+** Freescale Elo DMA Controller
+   This is a little-endian DMA controller, used in Freescale mpc83xx series
+   chips such as mpc8315, mpc8349, mpc8379 etc.
 
 Required properties:
 
-- compatible        : compatible list, contains 2 entries, first is
-		 "fsl,CHIP-dma", where CHIP is the processor
-		 (mpc8349, mpc8360, etc.) and the second is
-		 "fsl,elo-dma"
-- reg               : <registers mapping for DMA general status reg>
-- ranges		: Should be defined as specified in 1) to describe the
-		  DMA controller channels.
+- compatible        : must include "fsl,elo-dma"
+- reg               : <registers specifier for DMA general status reg>
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
 - cell-index        : controller index.  0 for controller @ 0x8100
-- interrupts        : <interrupt mapping for DMA IRQ>
+- interrupts        : <interrupt specifier for DMA IRQ>
 - interrupt-parent  : optional, if needed for interrupt mapping
 
-
 - DMA channel nodes:
-        - compatible        : compatible list, contains 2 entries, first is
-			 "fsl,CHIP-dma-channel", where CHIP is the processor
-			 (mpc8349, mpc8350, etc.) and the second is
-			 "fsl,elo-dma-channel". However, see note below.
-        - reg               : <registers mapping for channel>
+        - compatible        : must include "fsl,elo-dma-channel"
+                              However, see note below.
+        - reg               : <registers specifier for channel>
         - cell-index        : dma channel index starts at 0.
 
 Optional properties:
-        - interrupts        : <interrupt mapping for DMA channel IRQ>
-			  (on 83xx this is expected to be identical to
-			   the interrupts property of the parent node)
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
+                              (on 83xx this is expected to be identical to
+                              the interrupts property of the parent node)
         - interrupt-parent  : optional, if needed for interrupt mapping
 
 Example:
@@ -70,30 +66,26 @@ Example:
 		};
 	};
 
-* Freescale 85xx/86xx DMA Controller
-
-Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
+** Freescale EloPlus DMA Controller
+   This is DMA controller with extended addresses and chaining, mainly used in
+   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
+   p4080, bsc9131 etc.
 
 Required properties:
 
-- compatible        : compatible list, contains 2 entries, first is
-		 "fsl,CHIP-dma", where CHIP is the processor
-		 (mpc8540, mpc8540, etc.) and the second is
-		 "fsl,eloplus-dma"
-- reg               : <registers mapping for DMA general status reg>
+- compatible        : must include "fsl,eloplus-dma"
+- reg               : <registers specifier for DMA general status reg>
 - cell-index        : controller index.  0 for controller @ 0x21000,
                                          1 for controller @ 0xc000
-- ranges		: Should be defined as specified in 1) to describe the
-		  DMA controller channels.
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
 
 - DMA channel nodes:
-        - compatible        : compatible list, contains 2 entries, first is
-			 "fsl,CHIP-dma-channel", where CHIP is the processor
-			 (mpc8540, mpc8560, etc.) and the second is
-			 "fsl,eloplus-dma-channel". However, see note below.
+        - compatible        : must include "fsl,eloplus-dma-channel"
+                              However, see note below.
         - cell-index        : dma channel index starts at 0.
-        - reg               : <registers mapping for channel>
-        - interrupts        : <interrupt mapping for DMA channel IRQ>
+        - reg               : <registers specifier for channel>
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
         - interrupt-parent  : optional, if needed for interrupt mapping
 
 Example:
-- 
1.7.9.5

[PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
also fixes some defects of indent for text alignment at the same time.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
 1 file changed, 27 insertions(+), 35 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index 2a4b4bc..ddf17af 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -1,33 +1,29 @@
-* Freescale 83xx DMA Controller
+* Freescale DMA Controllers
 
-Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+** Freescale Elo DMA Controller
+   This is a little-endian DMA controller, used in Freescale mpc83xx series
+   chips such as mpc8315, mpc8349, mpc8379 etc.
 
 Required properties:
 
-- compatible        : compatible list, contains 2 entries, first is
-		 "fsl,CHIP-dma", where CHIP is the processor
-		 (mpc8349, mpc8360, etc.) and the second is
-		 "fsl,elo-dma"
-- reg               : <registers mapping for DMA general status reg>
-- ranges		: Should be defined as specified in 1) to describe the
-		  DMA controller channels.
+- compatible        : must include "fsl,elo-dma"
+- reg               : <registers specifier for DMA general status reg>
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
 - cell-index        : controller index.  0 for controller @ 0x8100
-- interrupts        : <interrupt mapping for DMA IRQ>
+- interrupts        : <interrupt specifier for DMA IRQ>
 - interrupt-parent  : optional, if needed for interrupt mapping
 
-
 - DMA channel nodes:
-        - compatible        : compatible list, contains 2 entries, first is
-			 "fsl,CHIP-dma-channel", where CHIP is the processor
-			 (mpc8349, mpc8350, etc.) and the second is
-			 "fsl,elo-dma-channel". However, see note below.
-        - reg               : <registers mapping for channel>
+        - compatible        : must include "fsl,elo-dma-channel"
+                              However, see note below.
+        - reg               : <registers specifier for channel>
         - cell-index        : dma channel index starts at 0.
 
 Optional properties:
-        - interrupts        : <interrupt mapping for DMA channel IRQ>
-			  (on 83xx this is expected to be identical to
-			   the interrupts property of the parent node)
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
+                              (on 83xx this is expected to be identical to
+                              the interrupts property of the parent node)
         - interrupt-parent  : optional, if needed for interrupt mapping
 
 Example:
@@ -70,30 +66,26 @@ Example:
 		};
 	};
 
-* Freescale 85xx/86xx DMA Controller
-
-Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
+** Freescale EloPlus DMA Controller
+   This is DMA controller with extended addresses and chaining, mainly used in
+   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
+   p4080, bsc9131 etc.
 
 Required properties:
 
-- compatible        : compatible list, contains 2 entries, first is
-		 "fsl,CHIP-dma", where CHIP is the processor
-		 (mpc8540, mpc8540, etc.) and the second is
-		 "fsl,eloplus-dma"
-- reg               : <registers mapping for DMA general status reg>
+- compatible        : must include "fsl,eloplus-dma"
+- reg               : <registers specifier for DMA general status reg>
 - cell-index        : controller index.  0 for controller @ 0x21000,
                                          1 for controller @ 0xc000
-- ranges		: Should be defined as specified in 1) to describe the
-		  DMA controller channels.
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
 
 - DMA channel nodes:
-        - compatible        : compatible list, contains 2 entries, first is
-			 "fsl,CHIP-dma-channel", where CHIP is the processor
-			 (mpc8540, mpc8560, etc.) and the second is
-			 "fsl,eloplus-dma-channel". However, see note below.
+        - compatible        : must include "fsl,eloplus-dma-channel"
+                              However, see note below.
         - cell-index        : dma channel index starts at 0.
-        - reg               : <registers mapping for channel>
-        - interrupts        : <interrupt mapping for DMA channel IRQ>
+        - reg               : <registers specifier for channel>
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
         - interrupt-parent  : optional, if needed for interrupt mapping
 
 Example:
-- 
1.7.9.5

[PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
also fixes some defects of indent for text alignment at the same time.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
 1 file changed, 27 insertions(+), 35 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index 2a4b4bc..ddf17af 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -1,33 +1,29 @@
-* Freescale 83xx DMA Controller
+* Freescale DMA Controllers
 
-Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+** Freescale Elo DMA Controller
+   This is a little-endian DMA controller, used in Freescale mpc83xx series
+   chips such as mpc8315, mpc8349, mpc8379 etc.
 
 Required properties:
 
-- compatible        : compatible list, contains 2 entries, first is
-		 "fsl,CHIP-dma", where CHIP is the processor
-		 (mpc8349, mpc8360, etc.) and the second is
-		 "fsl,elo-dma"
-- reg               : <registers mapping for DMA general status reg>
-- ranges		: Should be defined as specified in 1) to describe the
-		  DMA controller channels.
+- compatible        : must include "fsl,elo-dma"
+- reg               : <registers specifier for DMA general status reg>
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
 - cell-index        : controller index.  0 for controller @ 0x8100
-- interrupts        : <interrupt mapping for DMA IRQ>
+- interrupts        : <interrupt specifier for DMA IRQ>
 - interrupt-parent  : optional, if needed for interrupt mapping
 
-
 - DMA channel nodes:
-        - compatible        : compatible list, contains 2 entries, first is
-			 "fsl,CHIP-dma-channel", where CHIP is the processor
-			 (mpc8349, mpc8350, etc.) and the second is
-			 "fsl,elo-dma-channel". However, see note below.
-        - reg               : <registers mapping for channel>
+        - compatible        : must include "fsl,elo-dma-channel"
+                              However, see note below.
+        - reg               : <registers specifier for channel>
         - cell-index        : dma channel index starts at 0.
 
 Optional properties:
-        - interrupts        : <interrupt mapping for DMA channel IRQ>
-			  (on 83xx this is expected to be identical to
-			   the interrupts property of the parent node)
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
+                              (on 83xx this is expected to be identical to
+                              the interrupts property of the parent node)
         - interrupt-parent  : optional, if needed for interrupt mapping
 
 Example:
@@ -70,30 +66,26 @@ Example:
 		};
 	};
 
-* Freescale 85xx/86xx DMA Controller
-
-Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
+** Freescale EloPlus DMA Controller
+   This is DMA controller with extended addresses and chaining, mainly used in
+   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
+   p4080, bsc9131 etc.
 
 Required properties:
 
-- compatible        : compatible list, contains 2 entries, first is
-		 "fsl,CHIP-dma", where CHIP is the processor
-		 (mpc8540, mpc8540, etc.) and the second is
-		 "fsl,eloplus-dma"
-- reg               : <registers mapping for DMA general status reg>
+- compatible        : must include "fsl,eloplus-dma"
+- reg               : <registers specifier for DMA general status reg>
 - cell-index        : controller index.  0 for controller @ 0x21000,
                                          1 for controller @ 0xc000
-- ranges		: Should be defined as specified in 1) to describe the
-		  DMA controller channels.
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
 
 - DMA channel nodes:
-        - compatible        : compatible list, contains 2 entries, first is
-			 "fsl,CHIP-dma-channel", where CHIP is the processor
-			 (mpc8540, mpc8560, etc.) and the second is
-			 "fsl,eloplus-dma-channel". However, see note below.
+        - compatible        : must include "fsl,eloplus-dma-channel"
+                              However, see note below.
         - cell-index        : dma channel index starts at 0.
-        - reg               : <registers mapping for channel>
-        - interrupts        : <interrupt mapping for DMA channel IRQ>
+        - reg               : <registers specifier for channel>
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
         - interrupt-parent  : optional, if needed for interrupt mapping
 
 Example:
-- 
1.7.9.5

[PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
 5 files changed, 232 insertions(+), 4 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index ddf17af..10fd031 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -126,6 +126,72 @@ Example:
 		};
 	};
 
+** Freescale Elo3 DMA Controller
+   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
+   series chips, such as t1040, t4240, b4860.
+
+Required properties:
+
+- compatible        : must include "fsl,elo3-dma"
+- reg               : <registers specifier for DMA general status reg>
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
+
+- DMA channel nodes:
+        - compatible        : must include "fsl,eloplus-dma-channel"
+        - reg               : <registers specifier for channel>
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
+        - interrupt-parent  : optional, if needed for interrupt mapping
+
+Example:
+dma@100300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x100300 0x4 0x100600 0x4>;
+	ranges = <0x0 0x100100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <28 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <29 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <30 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <31 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <76 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <77 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <78 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <79 2 0 0>;
+	};
+};
+
 Note on DMA channel compatible properties: The compatible property must say
 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
 driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 7399154..ea53ea1 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -223,13 +223,13 @@
 		reg = <0xe2000 0x1000>;
 	};
 
-/include/ "qoriq-dma-0.dtsi"
+/include/ "elo3-dma-0.dtsi"
 	dma@100300 {
 		fsl,iommu-parent = <&pamu0>;
 		fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
 	};
 
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-1.dtsi"
 	dma@101300 {
 		fsl,iommu-parent = <&pamu0>;
 		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
new file mode 100644
index 0000000..69a3277
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
@@ -0,0 +1,81 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma0: dma@100300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x100300 0x4 0x100600 0x4>;
+	ranges = <0x0 0x100100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <28 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <29 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <30 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <31 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <76 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <77 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <78 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <79 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
new file mode 100644
index 0000000..d410948
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
@@ -0,0 +1,81 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma1: dma@101300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x101300 0x4 0x101600 0x4>;
+	ranges = <0x0 0x101100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <32 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <33 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <34 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <35 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <80 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <81 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <82 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <83 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9..ec95c60 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -387,8 +387,8 @@
 		reg	   = <0xea000 0x4000>;
 	};
 
-/include/ "qoriq-dma-0.dtsi"
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-0.dtsi"
+/include/ "elo3-dma-1.dtsi"
 
 /include/ "qoriq-espi-0.dtsi"
 	spi@110000 {
-- 
1.7.9.5

[PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
 5 files changed, 232 insertions(+), 4 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index ddf17af..10fd031 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -126,6 +126,72 @@ Example:
 		};
 	};
 
+** Freescale Elo3 DMA Controller
+   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
+   series chips, such as t1040, t4240, b4860.
+
+Required properties:
+
+- compatible        : must include "fsl,elo3-dma"
+- reg               : <registers specifier for DMA general status reg>
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
+
+- DMA channel nodes:
+        - compatible        : must include "fsl,eloplus-dma-channel"
+        - reg               : <registers specifier for channel>
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
+        - interrupt-parent  : optional, if needed for interrupt mapping
+
+Example:
+dma@100300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x100300 0x4 0x100600 0x4>;
+	ranges = <0x0 0x100100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <28 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <29 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <30 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <31 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <76 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <77 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <78 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <79 2 0 0>;
+	};
+};
+
 Note on DMA channel compatible properties: The compatible property must say
 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
 driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 7399154..ea53ea1 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -223,13 +223,13 @@
 		reg = <0xe2000 0x1000>;
 	};
 
-/include/ "qoriq-dma-0.dtsi"
+/include/ "elo3-dma-0.dtsi"
 	dma@100300 {
 		fsl,iommu-parent = <&pamu0>;
 		fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
 	};
 
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-1.dtsi"
 	dma@101300 {
 		fsl,iommu-parent = <&pamu0>;
 		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
new file mode 100644
index 0000000..69a3277
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
@@ -0,0 +1,81 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma0: dma@100300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x100300 0x4 0x100600 0x4>;
+	ranges = <0x0 0x100100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <28 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <29 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <30 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <31 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <76 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <77 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <78 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <79 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
new file mode 100644
index 0000000..d410948
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
@@ -0,0 +1,81 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma1: dma@101300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x101300 0x4 0x101600 0x4>;
+	ranges = <0x0 0x101100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <32 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <33 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <34 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <35 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <80 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <81 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <82 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <83 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9..ec95c60 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -387,8 +387,8 @@
 		reg	   = <0xea000 0x4000>;
 	};
 
-/include/ "qoriq-dma-0.dtsi"
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-0.dtsi"
+/include/ "elo3-dma-1.dtsi"
 
 /include/ "qoriq-espi-0.dtsi"
 	spi@110000 {
-- 
1.7.9.5

[PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
 5 files changed, 232 insertions(+), 4 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index ddf17af..10fd031 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -126,6 +126,72 @@ Example:
 		};
 	};
 
+** Freescale Elo3 DMA Controller
+   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
+   series chips, such as t1040, t4240, b4860.
+
+Required properties:
+
+- compatible        : must include "fsl,elo3-dma"
+- reg               : <registers specifier for DMA general status reg>
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
+
+- DMA channel nodes:
+        - compatible        : must include "fsl,eloplus-dma-channel"
+        - reg               : <registers specifier for channel>
+        - interrupts        : <interrupt specifier for DMA channel IRQ>
+        - interrupt-parent  : optional, if needed for interrupt mapping
+
+Example:
+dma@100300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x100300 0x4 0x100600 0x4>;
+	ranges = <0x0 0x100100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <28 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <29 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <30 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <31 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <76 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <77 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <78 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <79 2 0 0>;
+	};
+};
+
 Note on DMA channel compatible properties: The compatible property must say
 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
 driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 7399154..ea53ea1 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -223,13 +223,13 @@
 		reg = <0xe2000 0x1000>;
 	};
 
-/include/ "qoriq-dma-0.dtsi"
+/include/ "elo3-dma-0.dtsi"
 	dma@100300 {
 		fsl,iommu-parent = <&pamu0>;
 		fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
 	};
 
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-1.dtsi"
 	dma@101300 {
 		fsl,iommu-parent = <&pamu0>;
 		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
new file mode 100644
index 0000000..69a3277
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
@@ -0,0 +1,81 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma0: dma@100300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x100300 0x4 0x100600 0x4>;
+	ranges = <0x0 0x100100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <28 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <29 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <30 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <31 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <76 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <77 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <78 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <79 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
new file mode 100644
index 0000000..d410948
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
@@ -0,0 +1,81 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma1: dma@101300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x101300 0x4 0x101600 0x4>;
+	ranges = <0x0 0x101100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <32 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <33 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <34 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <35 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <80 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <81 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <82 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <83 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9..ec95c60 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -387,8 +387,8 @@
 		reg	   = <0xea000 0x4000>;
 	};
 
-/include/ "qoriq-dma-0.dtsi"
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-0.dtsi"
+/include/ "elo3-dma-1.dtsi"
 
 /include/ "qoriq-espi-0.dtsi"
 	spi@110000 {
-- 
1.7.9.5

[PATCH v8 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 drivers/dma/Kconfig  |    9 +++++----
 drivers/dma/fsldma.c |    9 ++++++---
 drivers/dma/fsldma.h |    2 +-
 3 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6825957..3979c65 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -89,14 +89,15 @@ config AT_HDMAC
 	  Support the Atmel AHB DMA controller.
 
 config FSL_DMA
-	tristate "Freescale Elo and Elo Plus DMA support"
+	tristate "Freescale Elo series DMA support"
 	depends on FSL_SOC
 	select DMA_ENGINE
 	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
 	---help---
-	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
-	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
-	  Elo Plus is the DMA controller on 85xx and 86xx parts.
+	  Enable support for the Freescale Elo series DMA controllers.
+	  The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
+	  EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
+	  some Txxx and Bxxx parts.
 
 config MPC512X_DMA
 	tristate "Freescale MPC512x built-in DMA engine support"
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 49e8fbd..16a9a48 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev,
 	WARN_ON(fdev->feature != chan->feature);
 
 	chan->dev = fdev->dev;
-	chan->id = ((res.start - 0x100) & 0xfff) >> 7;
+	chan->id = (res.start & 0xfff) < 0x300 ?
+		   ((res.start - 0x100) & 0xfff) >> 7 :
+		   ((res.start - 0x200) & 0xfff) >> 7;
 	if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
 		dev_err(fdev->dev, "too many channels for device\n");
 		err = -EINVAL;
@@ -1434,6 +1436,7 @@ static int fsldma_of_remove(struct platform_device *op)
 }
 
 static const struct of_device_id fsldma_of_ids[] = {
+	{ .compatible = "fsl,elo3-dma", },
 	{ .compatible = "fsl,eloplus-dma", },
 	{ .compatible = "fsl,elo-dma", },
 	{}
@@ -1455,7 +1458,7 @@ static struct platform_driver fsldma_of_driver = {
 
 static __init int fsldma_init(void)
 {
-	pr_info("Freescale Elo / Elo Plus DMA driver\n");
+	pr_info("Freescale Elo series DMA driver\n");
 	return platform_driver_register(&fsldma_of_driver);
 }
 
@@ -1467,5 +1470,5 @@ static void __exit fsldma_exit(void)
 subsys_initcall(fsldma_init);
 module_exit(fsldma_exit);
 
-MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver");
+MODULE_DESCRIPTION("Freescale Elo series DMA driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index f5c3879..1ffc244 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -112,7 +112,7 @@ struct fsldma_chan_regs {
 };
 
 struct fsldma_chan;
-#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
+#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
 
 struct fsldma_device {
 	void __iomem *regs;	/* DGSR register base */
-- 
1.7.9.5

[PATCH v8 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 drivers/dma/Kconfig  |    9 +++++----
 drivers/dma/fsldma.c |    9 ++++++---
 drivers/dma/fsldma.h |    2 +-
 3 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6825957..3979c65 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -89,14 +89,15 @@ config AT_HDMAC
 	  Support the Atmel AHB DMA controller.
 
 config FSL_DMA
-	tristate "Freescale Elo and Elo Plus DMA support"
+	tristate "Freescale Elo series DMA support"
 	depends on FSL_SOC
 	select DMA_ENGINE
 	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
 	---help---
-	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
-	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
-	  Elo Plus is the DMA controller on 85xx and 86xx parts.
+	  Enable support for the Freescale Elo series DMA controllers.
+	  The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
+	  EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
+	  some Txxx and Bxxx parts.
 
 config MPC512X_DMA
 	tristate "Freescale MPC512x built-in DMA engine support"
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 49e8fbd..16a9a48 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev,
 	WARN_ON(fdev->feature != chan->feature);
 
 	chan->dev = fdev->dev;
-	chan->id = ((res.start - 0x100) & 0xfff) >> 7;
+	chan->id = (res.start & 0xfff) < 0x300 ?
+		   ((res.start - 0x100) & 0xfff) >> 7 :
+		   ((res.start - 0x200) & 0xfff) >> 7;
 	if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
 		dev_err(fdev->dev, "too many channels for device\n");
 		err = -EINVAL;
@@ -1434,6 +1436,7 @@ static int fsldma_of_remove(struct platform_device *op)
 }
 
 static const struct of_device_id fsldma_of_ids[] = {
+	{ .compatible = "fsl,elo3-dma", },
 	{ .compatible = "fsl,eloplus-dma", },
 	{ .compatible = "fsl,elo-dma", },
 	{}
@@ -1455,7 +1458,7 @@ static struct platform_driver fsldma_of_driver = {
 
 static __init int fsldma_init(void)
 {
-	pr_info("Freescale Elo / Elo Plus DMA driver\n");
+	pr_info("Freescale Elo series DMA driver\n");
 	return platform_driver_register(&fsldma_of_driver);
 }
 
@@ -1467,5 +1470,5 @@ static void __exit fsldma_exit(void)
 subsys_initcall(fsldma_init);
 module_exit(fsldma_exit);
 
-MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver");
+MODULE_DESCRIPTION("Freescale Elo series DMA driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index f5c3879..1ffc244 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -112,7 +112,7 @@ struct fsldma_chan_regs {
 };
 
 struct fsldma_chan;
-#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
+#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
 
 struct fsldma_device {
 	void __iomem *regs;	/* DGSR register base */
-- 
1.7.9.5

[PATCH v8 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 drivers/dma/Kconfig  |    9 +++++----
 drivers/dma/fsldma.c |    9 ++++++---
 drivers/dma/fsldma.h |    2 +-
 3 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6825957..3979c65 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -89,14 +89,15 @@ config AT_HDMAC
 	  Support the Atmel AHB DMA controller.
 
 config FSL_DMA
-	tristate "Freescale Elo and Elo Plus DMA support"
+	tristate "Freescale Elo series DMA support"
 	depends on FSL_SOC
 	select DMA_ENGINE
 	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
 	---help---
-	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
-	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
-	  Elo Plus is the DMA controller on 85xx and 86xx parts.
+	  Enable support for the Freescale Elo series DMA controllers.
+	  The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
+	  EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
+	  some Txxx and Bxxx parts.
 
 config MPC512X_DMA
 	tristate "Freescale MPC512x built-in DMA engine support"
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 49e8fbd..16a9a48 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev,
 	WARN_ON(fdev->feature != chan->feature);
 
 	chan->dev = fdev->dev;
-	chan->id = ((res.start - 0x100) & 0xfff) >> 7;
+	chan->id = (res.start & 0xfff) < 0x300 ?
+		   ((res.start - 0x100) & 0xfff) >> 7 :
+		   ((res.start - 0x200) & 0xfff) >> 7;
 	if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
 		dev_err(fdev->dev, "too many channels for device\n");
 		err = -EINVAL;
@@ -1434,6 +1436,7 @@ static int fsldma_of_remove(struct platform_device *op)
 }
 
 static const struct of_device_id fsldma_of_ids[] = {
+	{ .compatible = "fsl,elo3-dma", },
 	{ .compatible = "fsl,eloplus-dma", },
 	{ .compatible = "fsl,elo-dma", },
 	{}
@@ -1455,7 +1458,7 @@ static struct platform_driver fsldma_of_driver = {
 
 static __init int fsldma_init(void)
 {
-	pr_info("Freescale Elo / Elo Plus DMA driver\n");
+	pr_info("Freescale Elo series DMA driver\n");
 	return platform_driver_register(&fsldma_of_driver);
 }
 
@@ -1467,5 +1470,5 @@ static void __exit fsldma_exit(void)
 subsys_initcall(fsldma_init);
 module_exit(fsldma_exit);
 
-MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver");
+MODULE_DESCRIPTION("Freescale Elo series DMA driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index f5c3879..1ffc244 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -112,7 +112,7 @@ struct fsldma_chan_regs {
 };
 
 struct fsldma_chan;
-#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
+#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
 
 struct fsldma_device {
 	void __iomem *regs;	/* DGSR register base */
-- 
1.7.9.5

Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[Mark Rutland]

On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> 
> This patch updates the discription of each type of DMA controller and its
> channels, it is preparation for adding another new DMA controller binding, it
> also fixes some defects of indent for text alignment at the same time.
> 
> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> ---
>  .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
>  1 file changed, 27 insertions(+), 35 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> index 2a4b4bc..ddf17af 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> @@ -1,33 +1,29 @@
> -* Freescale 83xx DMA Controller
> +* Freescale DMA Controllers
>  
> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
> +** Freescale Elo DMA Controller
> +   This is a little-endian DMA controller, used in Freescale mpc83xx series
> +   chips such as mpc8315, mpc8349, mpc8379 etc.
>  
>  Required properties:
>  
> -- compatible        : compatible list, contains 2 entries, first is
> -		 "fsl,CHIP-dma", where CHIP is the processor
> -		 (mpc8349, mpc8360, etc.) and the second is
> -		 "fsl,elo-dma"
> -- reg               : <registers mapping for DMA general status reg>
> -- ranges		: Should be defined as specified in 1) to describe the
> -		  DMA controller channels.
> +- compatible        : must include "fsl,elo-dma"

We should list the other values that may be in the list also, unless
they are really of no consequence, in which case their presence in dt is
questionable.

> +- reg               : <registers specifier for DMA general status reg>
> +- ranges            : describes the mapping between the address space of the
> +                      DMA channels and the address space of the DMA controller
>  - cell-index        : controller index.  0 for controller @ 0x8100
> -- interrupts        : <interrupt mapping for DMA IRQ>
> +- interrupts        : <interrupt specifier for DMA IRQ>
>  - interrupt-parent  : optional, if needed for interrupt mapping
>  
> -
>  - DMA channel nodes:
> -        - compatible        : compatible list, contains 2 entries, first is
> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
> -			 (mpc8349, mpc8350, etc.) and the second is
> -			 "fsl,elo-dma-channel". However, see note below.
> -        - reg               : <registers mapping for channel>
> +        - compatible        : must include "fsl,elo-dma-channel"
> +                              However, see note below.

Again, I think we should list the other entries that may be in the list.
Otherwise it's not clear what the binding defines. Similarly for the
other compatible list definitions below...

> +        - reg               : <registers specifier for channel>
>          - cell-index        : dma channel index starts at 0.

I realise you haven't changed it, but it's unclear what the cell-index
property is (and somewhat confusingly there seem to be multiple
defnitions). It might be worth clarifying it while performing the other
cleanup.

>  
>  Optional properties:
> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
> -			  (on 83xx this is expected to be identical to
> -			   the interrupts property of the parent node)
> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> +                              (on 83xx this is expected to be identical to
> +                              the interrupts property of the parent node)
>          - interrupt-parent  : optional, if needed for interrupt mapping
>  
>  Example:
> @@ -70,30 +66,26 @@ Example:
>  		};
>  	};
>  
> -* Freescale 85xx/86xx DMA Controller
> -
> -Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
> +** Freescale EloPlus DMA Controller
> +   This is DMA controller with extended addresses and chaining, mainly used in
> +   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
> +   p4080, bsc9131 etc.
>  
>  Required properties:
>  
> -- compatible        : compatible list, contains 2 entries, first is
> -		 "fsl,CHIP-dma", where CHIP is the processor
> -		 (mpc8540, mpc8540, etc.) and the second is
> -		 "fsl,eloplus-dma"
> -- reg               : <registers mapping for DMA general status reg>
> +- compatible        : must include "fsl,eloplus-dma"
> +- reg               : <registers specifier for DMA general status reg>
>  - cell-index        : controller index.  0 for controller @ 0x21000,
>                                           1 for controller @ 0xc000
> -- ranges		: Should be defined as specified in 1) to describe the
> -		  DMA controller channels.
> +- ranges            : describes the mapping between the address space of the
> +                      DMA channels and the address space of the DMA controller
>  
>  - DMA channel nodes:
> -        - compatible        : compatible list, contains 2 entries, first is
> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
> -			 (mpc8540, mpc8560, etc.) and the second is
> -			 "fsl,eloplus-dma-channel". However, see note below.
> +        - compatible        : must include "fsl,eloplus-dma-channel"
> +                              However, see note below.
>          - cell-index        : dma channel index starts at 0.
> -        - reg               : <registers mapping for channel>
> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
> +        - reg               : <registers specifier for channel>
> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>          - interrupt-parent  : optional, if needed for interrupt mapping
>  
>  Example:
> -- 
> 1.7.9.5

Thanks,
Mark.

Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[Mark Rutland]

On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> 
> This patch updates the discription of each type of DMA controller and its
> channels, it is preparation for adding another new DMA controller binding, it
> also fixes some defects of indent for text alignment at the same time.
> 
> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> ---
>  .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
>  1 file changed, 27 insertions(+), 35 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> index 2a4b4bc..ddf17af 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> @@ -1,33 +1,29 @@
> -* Freescale 83xx DMA Controller
> +* Freescale DMA Controllers
>  
> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
> +** Freescale Elo DMA Controller
> +   This is a little-endian DMA controller, used in Freescale mpc83xx series
> +   chips such as mpc8315, mpc8349, mpc8379 etc.
>  
>  Required properties:
>  
> -- compatible        : compatible list, contains 2 entries, first is
> -		 "fsl,CHIP-dma", where CHIP is the processor
> -		 (mpc8349, mpc8360, etc.) and the second is
> -		 "fsl,elo-dma"
> -- reg               : <registers mapping for DMA general status reg>
> -- ranges		: Should be defined as specified in 1) to describe the
> -		  DMA controller channels.
> +- compatible        : must include "fsl,elo-dma"

We should list the other values that may be in the list also, unless
they are really of no consequence, in which case their presence in dt is
questionable.

> +- reg               : <registers specifier for DMA general status reg>
> +- ranges            : describes the mapping between the address space of the
> +                      DMA channels and the address space of the DMA controller
>  - cell-index        : controller index.  0 for controller @ 0x8100
> -- interrupts        : <interrupt mapping for DMA IRQ>
> +- interrupts        : <interrupt specifier for DMA IRQ>
>  - interrupt-parent  : optional, if needed for interrupt mapping
>  
> -
>  - DMA channel nodes:
> -        - compatible        : compatible list, contains 2 entries, first is
> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
> -			 (mpc8349, mpc8350, etc.) and the second is
> -			 "fsl,elo-dma-channel". However, see note below.
> -        - reg               : <registers mapping for channel>
> +        - compatible        : must include "fsl,elo-dma-channel"
> +                              However, see note below.

Again, I think we should list the other entries that may be in the list.
Otherwise it's not clear what the binding defines. Similarly for the
other compatible list definitions below...

> +        - reg               : <registers specifier for channel>
>          - cell-index        : dma channel index starts at 0.

I realise you haven't changed it, but it's unclear what the cell-index
property is (and somewhat confusingly there seem to be multiple
defnitions). It might be worth clarifying it while performing the other
cleanup.

>  
>  Optional properties:
> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
> -			  (on 83xx this is expected to be identical to
> -			   the interrupts property of the parent node)
> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> +                              (on 83xx this is expected to be identical to
> +                              the interrupts property of the parent node)
>          - interrupt-parent  : optional, if needed for interrupt mapping
>  
>  Example:
> @@ -70,30 +66,26 @@ Example:
>  		};
>  	};
>  
> -* Freescale 85xx/86xx DMA Controller
> -
> -Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
> +** Freescale EloPlus DMA Controller
> +   This is DMA controller with extended addresses and chaining, mainly used in
> +   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
> +   p4080, bsc9131 etc.
>  
>  Required properties:
>  
> -- compatible        : compatible list, contains 2 entries, first is
> -		 "fsl,CHIP-dma", where CHIP is the processor
> -		 (mpc8540, mpc8540, etc.) and the second is
> -		 "fsl,eloplus-dma"
> -- reg               : <registers mapping for DMA general status reg>
> +- compatible        : must include "fsl,eloplus-dma"
> +- reg               : <registers specifier for DMA general status reg>
>  - cell-index        : controller index.  0 for controller @ 0x21000,
>                                           1 for controller @ 0xc000
> -- ranges		: Should be defined as specified in 1) to describe the
> -		  DMA controller channels.
> +- ranges            : describes the mapping between the address space of the
> +                      DMA channels and the address space of the DMA controller
>  
>  - DMA channel nodes:
> -        - compatible        : compatible list, contains 2 entries, first is
> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
> -			 (mpc8540, mpc8560, etc.) and the second is
> -			 "fsl,eloplus-dma-channel". However, see note below.
> +        - compatible        : must include "fsl,eloplus-dma-channel"
> +                              However, see note below.
>          - cell-index        : dma channel index starts at 0.
> -        - reg               : <registers mapping for channel>
> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
> +        - reg               : <registers specifier for channel>
> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>          - interrupt-parent  : optional, if needed for interrupt mapping
>  
>  Example:
> -- 
> 1.7.9.5

Thanks,
Mark.

Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Mark Rutland]

On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> 
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> the device tree nodes for them.
> 
> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> ---
>  .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
>  arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
>  arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
>  arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
>  arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
>  5 files changed, 232 insertions(+), 4 deletions(-)
>  create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>  create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> 
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> index ddf17af..10fd031 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> @@ -126,6 +126,72 @@ Example:
>                 };
>         };
> 
> +** Freescale Elo3 DMA Controller
> +   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
> +   series chips, such as t1040, t4240, b4860.
> +
> +Required properties:
> +
> +- compatible        : must include "fsl,elo3-dma"
> +- reg               : <registers specifier for DMA general status reg>
> +- ranges            : describes the mapping between the address space of the
> +                      DMA channels and the address space of the DMA controller
> +
> +- DMA channel nodes:
> +        - compatible        : must include "fsl,eloplus-dma-channel"
> +        - reg               : <registers specifier for channel>
> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> +        - interrupt-parent  : optional, if needed for interrupt mapping
> +
> +Example:
> +dma@100300 {
> +       #address-cells = <1>;
> +       #size-cells = <1>;
> +       compatible = "fsl,elo3-dma";
> +       reg = <0x100300 0x4 0x100600 0x4>;

Is that one reg entry where #size-cells=2 and #address-cells=2?

That's what the binding implies (given it only describes a single reg
entry).

if it's two entries, we should make that explicit (both in the binding
and example):

	reg = <0x100300 0x4>,
	      <0x100600 0x4>;

> +       ranges = <0x0 0x100100 0x500>;

If it is one reg entry then the example ranges property isn't big enough
to contain the parent-bus-address.

> +       dma-channel@0 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x0 0x80>;
> +               interrupts = <28 2 0 0>;
> +       };
> +       dma-channel@80 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x80 0x80>;
> +               interrupts = <29 2 0 0>;
> +       };
> +       dma-channel@100 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x100 0x80>;
> +               interrupts = <30 2 0 0>;
> +       };
> +       dma-channel@180 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x180 0x80>;
> +               interrupts = <31 2 0 0>;
> +       };
> +       dma-channel@300 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x300 0x80>;
> +               interrupts = <76 2 0 0>;
> +       };
> +       dma-channel@380 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x380 0x80>;
> +               interrupts = <77 2 0 0>;
> +       };
> +       dma-channel@400 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x400 0x80>;
> +               interrupts = <78 2 0 0>;
> +       };
> +       dma-channel@480 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x480 0x80>;
> +               interrupts = <79 2 0 0>;
> +       };
> +};
> +
>  Note on DMA channel compatible properties: The compatible property must say
>  "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>  driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> index 7399154..ea53ea1 100644
> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> @@ -223,13 +223,13 @@
>                 reg = <0xe2000 0x1000>;
>         };
> 
> -/include/ "qoriq-dma-0.dtsi"
> +/include/ "elo3-dma-0.dtsi"
>         dma@100300 {
>                 fsl,iommu-parent = <&pamu0>;
>                 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>         };
> 
> -/include/ "qoriq-dma-1.dtsi"
> +/include/ "elo3-dma-1.dtsi"
>         dma@101300 {
>                 fsl,iommu-parent = <&pamu0>;
>                 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> new file mode 100644
> index 0000000..69a3277
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> @@ -0,0 +1,81 @@
> +/*
> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]

Copy-pasted?

Presumably should be "Elo3 DMA devicetree stub", or similar?

Similarly for elo3-dma-1.dtsi.

Thanks,
Mark.

Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Mark Rutland]

On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> 
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> the device tree nodes for them.
> 
> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> ---
>  .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
>  arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
>  arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
>  arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
>  arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
>  5 files changed, 232 insertions(+), 4 deletions(-)
>  create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>  create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> 
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> index ddf17af..10fd031 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> @@ -126,6 +126,72 @@ Example:
>                 };
>         };
> 
> +** Freescale Elo3 DMA Controller
> +   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
> +   series chips, such as t1040, t4240, b4860.
> +
> +Required properties:
> +
> +- compatible        : must include "fsl,elo3-dma"
> +- reg               : <registers specifier for DMA general status reg>
> +- ranges            : describes the mapping between the address space of the
> +                      DMA channels and the address space of the DMA controller
> +
> +- DMA channel nodes:
> +        - compatible        : must include "fsl,eloplus-dma-channel"
> +        - reg               : <registers specifier for channel>
> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> +        - interrupt-parent  : optional, if needed for interrupt mapping
> +
> +Example:
> +dma@100300 {
> +       #address-cells = <1>;
> +       #size-cells = <1>;
> +       compatible = "fsl,elo3-dma";
> +       reg = <0x100300 0x4 0x100600 0x4>;

Is that one reg entry where #size-cells=2 and #address-cells=2?

That's what the binding implies (given it only describes a single reg
entry).

if it's two entries, we should make that explicit (both in the binding
and example):

	reg = <0x100300 0x4>,
	      <0x100600 0x4>;

> +       ranges = <0x0 0x100100 0x500>;

If it is one reg entry then the example ranges property isn't big enough
to contain the parent-bus-address.

> +       dma-channel@0 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x0 0x80>;
> +               interrupts = <28 2 0 0>;
> +       };
> +       dma-channel@80 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x80 0x80>;
> +               interrupts = <29 2 0 0>;
> +       };
> +       dma-channel@100 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x100 0x80>;
> +               interrupts = <30 2 0 0>;
> +       };
> +       dma-channel@180 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x180 0x80>;
> +               interrupts = <31 2 0 0>;
> +       };
> +       dma-channel@300 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x300 0x80>;
> +               interrupts = <76 2 0 0>;
> +       };
> +       dma-channel@380 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x380 0x80>;
> +               interrupts = <77 2 0 0>;
> +       };
> +       dma-channel@400 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x400 0x80>;
> +               interrupts = <78 2 0 0>;
> +       };
> +       dma-channel@480 {
> +               compatible = "fsl,eloplus-dma-channel";
> +               reg = <0x480 0x80>;
> +               interrupts = <79 2 0 0>;
> +       };
> +};
> +
>  Note on DMA channel compatible properties: The compatible property must say
>  "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>  driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> index 7399154..ea53ea1 100644
> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> @@ -223,13 +223,13 @@
>                 reg = <0xe2000 0x1000>;
>         };
> 
> -/include/ "qoriq-dma-0.dtsi"
> +/include/ "elo3-dma-0.dtsi"
>         dma@100300 {
>                 fsl,iommu-parent = <&pamu0>;
>                 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>         };
> 
> -/include/ "qoriq-dma-1.dtsi"
> +/include/ "elo3-dma-1.dtsi"
>         dma@101300 {
>                 fsl,iommu-parent = <&pamu0>;
>                 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> new file mode 100644
> index 0000000..69a3277
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> @@ -0,0 +1,81 @@
> +/*
> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]

Copy-pasted?

Presumably should be "Elo3 DMA devicetree stub", or similar?

Similarly for elo3-dma-1.dtsi.

Thanks,
Mark.

Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Hongbo Zhang]

On 08/27/2013 07:35 PM, Mark Rutland wrote:
> On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>
>> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
>> the device tree nodes for them.
>>
>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>> ---
>>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
>>   arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
>>   arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
>>   arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
>>   arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
>>   5 files changed, 232 insertions(+), 4 deletions(-)
>>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>>
>> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> index ddf17af..10fd031 100644
>> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> @@ -126,6 +126,72 @@ Example:
>>                  };
>>          };
>>
>> +** Freescale Elo3 DMA Controller
>> +   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
>> +   series chips, such as t1040, t4240, b4860.
>> +
>> +Required properties:
>> +
>> +- compatible        : must include "fsl,elo3-dma"
>> +- reg               : <registers specifier for DMA general status reg>
>> +- ranges            : describes the mapping between the address space of the
>> +                      DMA channels and the address space of the DMA controller
>> +
>> +- DMA channel nodes:
>> +        - compatible        : must include "fsl,eloplus-dma-channel"
>> +        - reg               : <registers specifier for channel>
>> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>> +        - interrupt-parent  : optional, if needed for interrupt mapping
>> +
>> +Example:
>> +dma@100300 {
>> +       #address-cells = <1>;
>> +       #size-cells = <1>;
>> +       compatible = "fsl,elo3-dma";
>> +       reg = <0x100300 0x4 0x100600 0x4>;
> Is that one reg entry where #size-cells=2 and #address-cells=2?
>
> That's what the binding implies (given it only describes a single reg
> entry).
>
> if it's two entries, we should make that explicit (both in the binding
> and example):
>
> 	reg = <0x100300 0x4>,
> 	      <0x100600 0x4>;
Yes they are two entries, I will change it this way.
>> +       ranges = <0x0 0x100100 0x500>;
> If it is one reg entry then the example ranges property isn't big enough
> to contain the parent-bus-address.
They are two reg entries, so the range is big enough.
>
>> +       dma-channel@0 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x0 0x80>;
>> +               interrupts = <28 2 0 0>;
>> +       };
>> +       dma-channel@80 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x80 0x80>;
>> +               interrupts = <29 2 0 0>;
>> +       };
>> +       dma-channel@100 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x100 0x80>;
>> +               interrupts = <30 2 0 0>;
>> +       };
>> +       dma-channel@180 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x180 0x80>;
>> +               interrupts = <31 2 0 0>;
>> +       };
>> +       dma-channel@300 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x300 0x80>;
>> +               interrupts = <76 2 0 0>;
>> +       };
>> +       dma-channel@380 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x380 0x80>;
>> +               interrupts = <77 2 0 0>;
>> +       };
>> +       dma-channel@400 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x400 0x80>;
>> +               interrupts = <78 2 0 0>;
>> +       };
>> +       dma-channel@480 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x480 0x80>;
>> +               interrupts = <79 2 0 0>;
>> +       };
>> +};
>> +
>>   Note on DMA channel compatible properties: The compatible property must say
>>   "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>>   driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
>> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>> index 7399154..ea53ea1 100644
>> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>> @@ -223,13 +223,13 @@
>>                  reg = <0xe2000 0x1000>;
>>          };
>>
>> -/include/ "qoriq-dma-0.dtsi"
>> +/include/ "elo3-dma-0.dtsi"
>>          dma@100300 {
>>                  fsl,iommu-parent = <&pamu0>;
>>                  fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>>          };
>>
>> -/include/ "qoriq-dma-1.dtsi"
>> +/include/ "elo3-dma-1.dtsi"
>>          dma@101300 {
>>                  fsl,iommu-parent = <&pamu0>;
>>                  fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
>> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>> new file mode 100644
>> index 0000000..69a3277
>> --- /dev/null
>> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>> @@ -0,0 +1,81 @@
>> +/*
>> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
> Copy-pasted?
>
> Presumably should be "Elo3 DMA devicetree stub", or similar?
>
> Similarly for elo3-dma-1.dtsi.
Yes copy-pasted, but QorIQ isn't wrong, it is name of Freescale series 
chips.
To be more specific, I'd like to use "QorIQ Elo3 DMA devicetree stub"
> Thanks,
> Mark.
>

Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Hongbo Zhang]

On 08/27/2013 07:35 PM, Mark Rutland wrote:
> On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>
>> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
>> the device tree nodes for them.
>>
>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>> ---
>>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
>>   arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
>>   arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
>>   arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
>>   arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
>>   5 files changed, 232 insertions(+), 4 deletions(-)
>>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>>
>> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> index ddf17af..10fd031 100644
>> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> @@ -126,6 +126,72 @@ Example:
>>                  };
>>          };
>>
>> +** Freescale Elo3 DMA Controller
>> +   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
>> +   series chips, such as t1040, t4240, b4860.
>> +
>> +Required properties:
>> +
>> +- compatible        : must include "fsl,elo3-dma"
>> +- reg               : <registers specifier for DMA general status reg>
>> +- ranges            : describes the mapping between the address space of the
>> +                      DMA channels and the address space of the DMA controller
>> +
>> +- DMA channel nodes:
>> +        - compatible        : must include "fsl,eloplus-dma-channel"
>> +        - reg               : <registers specifier for channel>
>> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>> +        - interrupt-parent  : optional, if needed for interrupt mapping
>> +
>> +Example:
>> +dma@100300 {
>> +       #address-cells = <1>;
>> +       #size-cells = <1>;
>> +       compatible = "fsl,elo3-dma";
>> +       reg = <0x100300 0x4 0x100600 0x4>;
> Is that one reg entry where #size-cells=2 and #address-cells=2?
>
> That's what the binding implies (given it only describes a single reg
> entry).
>
> if it's two entries, we should make that explicit (both in the binding
> and example):
>
> 	reg = <0x100300 0x4>,
> 	      <0x100600 0x4>;
Yes they are two entries, I will change it this way.
>> +       ranges = <0x0 0x100100 0x500>;
> If it is one reg entry then the example ranges property isn't big enough
> to contain the parent-bus-address.
They are two reg entries, so the range is big enough.
>
>> +       dma-channel@0 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x0 0x80>;
>> +               interrupts = <28 2 0 0>;
>> +       };
>> +       dma-channel@80 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x80 0x80>;
>> +               interrupts = <29 2 0 0>;
>> +       };
>> +       dma-channel@100 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x100 0x80>;
>> +               interrupts = <30 2 0 0>;
>> +       };
>> +       dma-channel@180 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x180 0x80>;
>> +               interrupts = <31 2 0 0>;
>> +       };
>> +       dma-channel@300 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x300 0x80>;
>> +               interrupts = <76 2 0 0>;
>> +       };
>> +       dma-channel@380 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x380 0x80>;
>> +               interrupts = <77 2 0 0>;
>> +       };
>> +       dma-channel@400 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x400 0x80>;
>> +               interrupts = <78 2 0 0>;
>> +       };
>> +       dma-channel@480 {
>> +               compatible = "fsl,eloplus-dma-channel";
>> +               reg = <0x480 0x80>;
>> +               interrupts = <79 2 0 0>;
>> +       };
>> +};
>> +
>>   Note on DMA channel compatible properties: The compatible property must say
>>   "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>>   driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
>> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>> index 7399154..ea53ea1 100644
>> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>> @@ -223,13 +223,13 @@
>>                  reg = <0xe2000 0x1000>;
>>          };
>>
>> -/include/ "qoriq-dma-0.dtsi"
>> +/include/ "elo3-dma-0.dtsi"
>>          dma@100300 {
>>                  fsl,iommu-parent = <&pamu0>;
>>                  fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>>          };
>>
>> -/include/ "qoriq-dma-1.dtsi"
>> +/include/ "elo3-dma-1.dtsi"
>>          dma@101300 {
>>                  fsl,iommu-parent = <&pamu0>;
>>                  fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
>> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>> new file mode 100644
>> index 0000000..69a3277
>> --- /dev/null
>> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>> @@ -0,0 +1,81 @@
>> +/*
>> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
> Copy-pasted?
>
> Presumably should be "Elo3 DMA devicetree stub", or similar?
>
> Similarly for elo3-dma-1.dtsi.
Yes copy-pasted, but QorIQ isn't wrong, it is name of Freescale series 
chips.
To be more specific, I'd like to use "QorIQ Elo3 DMA devicetree stub"
> Thanks,
> Mark.
>

Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[Hongbo Zhang]

On 08/27/2013 07:25 PM, Mark Rutland wrote:
> On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>
>> This patch updates the discription of each type of DMA controller and its
>> channels, it is preparation for adding another new DMA controller binding, it
>> also fixes some defects of indent for text alignment at the same time.
>>
>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>> ---
>>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
>>   1 file changed, 27 insertions(+), 35 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> index 2a4b4bc..ddf17af 100644
>> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> @@ -1,33 +1,29 @@
>> -* Freescale 83xx DMA Controller
>> +* Freescale DMA Controllers
>>   
>> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
>> +** Freescale Elo DMA Controller
>> +   This is a little-endian DMA controller, used in Freescale mpc83xx series
>> +   chips such as mpc8315, mpc8349, mpc8379 etc.
>>   
>>   Required properties:
>>   
>> -- compatible        : compatible list, contains 2 entries, first is
>> -		 "fsl,CHIP-dma", where CHIP is the processor
>> -		 (mpc8349, mpc8360, etc.) and the second is
>> -		 "fsl,elo-dma"
>> -- reg               : <registers mapping for DMA general status reg>
>> -- ranges		: Should be defined as specified in 1) to describe the
>> -		  DMA controller channels.
>> +- compatible        : must include "fsl,elo-dma"
> We should list the other values that may be in the list also, unless
> they are really of no consequence, in which case their presence in dt is
> questionable.
Hmm.  Stephen questioned here too, it seems this is a default rule.
Although Scott@freescale had explained our thoughts, I'd like to edit 
this item like this:

"must include "fsl,eloplus-dma", and a "fsl,CHIP-dma" is optional, where 
CHIP is the processor name"

We don't list all the chip name because we have tens of them and we 
cannot list all of them, and it is unnecessary to list them because we 
even don't use "fsl,CHIP-dma" in the new driver, add "fsl,CHIP-dma" here 
just make it questionable when it presents in example and  old dts files.

I remove the examples in bracket "(mpc8349, mpc8360, etc.)" because we 
can see the real example below.
I don't say" if "fsl,CHIP-dma" presents, it should be the first one, and 
the "fsl,eloplus-dma" should be the second" because it is common rule.
the description language should be clear and concise too I think.
>> +- reg               : <registers specifier for DMA general status reg>
>> +- ranges            : describes the mapping between the address space of the
>> +                      DMA channels and the address space of the DMA controller
>>   - cell-index        : controller index.  0 for controller @ 0x8100
>> -- interrupts        : <interrupt mapping for DMA IRQ>
>> +- interrupts        : <interrupt specifier for DMA IRQ>
>>   - interrupt-parent  : optional, if needed for interrupt mapping
>>   
>> -
>>   - DMA channel nodes:
>> -        - compatible        : compatible list, contains 2 entries, first is
>> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
>> -			 (mpc8349, mpc8350, etc.) and the second is
>> -			 "fsl,elo-dma-channel". However, see note below.
>> -        - reg               : <registers mapping for channel>
>> +        - compatible        : must include "fsl,elo-dma-channel"
>> +                              However, see note below.
> Again, I think we should list the other entries that may be in the list.
> Otherwise it's not clear what the binding defines. Similarly for the
> other compatible list definitions below...
>
>> +        - reg               : <registers specifier for channel>
>>           - cell-index        : dma channel index starts at 0.
> I realise you haven't changed it, but it's unclear what the cell-index
> property is (and somewhat confusingly there seem to be multiple
> defnitions). It might be worth clarifying it while performing the other
> cleanup.
not clear with your point "multiple definitions", we really have 
multiple dma channels for one dma controller.
cell-index is used as channel index, this is an old method used by old 
driver, my patch didn't touch this part.
>>   
>>   Optional properties:
>> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
>> -			  (on 83xx this is expected to be identical to
>> -			   the interrupts property of the parent node)
>> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>> +                              (on 83xx this is expected to be identical to
>> +                              the interrupts property of the parent node)
>>           - interrupt-parent  : optional, if needed for interrupt mapping
>>   
>>   Example:
>> @@ -70,30 +66,26 @@ Example:
>>   		};
>>   	};
>>   
>> -* Freescale 85xx/86xx DMA Controller
>> -
>> -Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
>> +** Freescale EloPlus DMA Controller
>> +   This is DMA controller with extended addresses and chaining, mainly used in
>> +   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
>> +   p4080, bsc9131 etc.
>>   
>>   Required properties:
>>   
>> -- compatible        : compatible list, contains 2 entries, first is
>> -		 "fsl,CHIP-dma", where CHIP is the processor
>> -		 (mpc8540, mpc8540, etc.) and the second is
>> -		 "fsl,eloplus-dma"
>> -- reg               : <registers mapping for DMA general status reg>
>> +- compatible        : must include "fsl,eloplus-dma"
>> +- reg               : <registers specifier for DMA general status reg>
>>   - cell-index        : controller index.  0 for controller @ 0x21000,
>>                                            1 for controller @ 0xc000
>> -- ranges		: Should be defined as specified in 1) to describe the
>> -		  DMA controller channels.
>> +- ranges            : describes the mapping between the address space of the
>> +                      DMA channels and the address space of the DMA controller
>>   
>>   - DMA channel nodes:
>> -        - compatible        : compatible list, contains 2 entries, first is
>> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
>> -			 (mpc8540, mpc8560, etc.) and the second is
>> -			 "fsl,eloplus-dma-channel". However, see note below.
>> +        - compatible        : must include "fsl,eloplus-dma-channel"
>> +                              However, see note below.
>>           - cell-index        : dma channel index starts at 0.
>> -        - reg               : <registers mapping for channel>
>> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
>> +        - reg               : <registers specifier for channel>
>> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>>           - interrupt-parent  : optional, if needed for interrupt mapping
>>   
>>   Example:
>> -- 
>> 1.7.9.5
> Thanks,
> Mark.
>

Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[Hongbo Zhang]

On 08/27/2013 07:25 PM, Mark Rutland wrote:
> On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>
>> This patch updates the discription of each type of DMA controller and its
>> channels, it is preparation for adding another new DMA controller binding, it
>> also fixes some defects of indent for text alignment at the same time.
>>
>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>> ---
>>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
>>   1 file changed, 27 insertions(+), 35 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> index 2a4b4bc..ddf17af 100644
>> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>> @@ -1,33 +1,29 @@
>> -* Freescale 83xx DMA Controller
>> +* Freescale DMA Controllers
>>   
>> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
>> +** Freescale Elo DMA Controller
>> +   This is a little-endian DMA controller, used in Freescale mpc83xx series
>> +   chips such as mpc8315, mpc8349, mpc8379 etc.
>>   
>>   Required properties:
>>   
>> -- compatible        : compatible list, contains 2 entries, first is
>> -		 "fsl,CHIP-dma", where CHIP is the processor
>> -		 (mpc8349, mpc8360, etc.) and the second is
>> -		 "fsl,elo-dma"
>> -- reg               : <registers mapping for DMA general status reg>
>> -- ranges		: Should be defined as specified in 1) to describe the
>> -		  DMA controller channels.
>> +- compatible        : must include "fsl,elo-dma"
> We should list the other values that may be in the list also, unless
> they are really of no consequence, in which case their presence in dt is
> questionable.
Hmm.  Stephen questioned here too, it seems this is a default rule.
Although Scott@freescale had explained our thoughts, I'd like to edit 
this item like this:

"must include "fsl,eloplus-dma", and a "fsl,CHIP-dma" is optional, where 
CHIP is the processor name"

We don't list all the chip name because we have tens of them and we 
cannot list all of them, and it is unnecessary to list them because we 
even don't use "fsl,CHIP-dma" in the new driver, add "fsl,CHIP-dma" here 
just make it questionable when it presents in example and  old dts files.

I remove the examples in bracket "(mpc8349, mpc8360, etc.)" because we 
can see the real example below.
I don't say" if "fsl,CHIP-dma" presents, it should be the first one, and 
the "fsl,eloplus-dma" should be the second" because it is common rule.
the description language should be clear and concise too I think.
>> +- reg               : <registers specifier for DMA general status reg>
>> +- ranges            : describes the mapping between the address space of the
>> +                      DMA channels and the address space of the DMA controller
>>   - cell-index        : controller index.  0 for controller @ 0x8100
>> -- interrupts        : <interrupt mapping for DMA IRQ>
>> +- interrupts        : <interrupt specifier for DMA IRQ>
>>   - interrupt-parent  : optional, if needed for interrupt mapping
>>   
>> -
>>   - DMA channel nodes:
>> -        - compatible        : compatible list, contains 2 entries, first is
>> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
>> -			 (mpc8349, mpc8350, etc.) and the second is
>> -			 "fsl,elo-dma-channel". However, see note below.
>> -        - reg               : <registers mapping for channel>
>> +        - compatible        : must include "fsl,elo-dma-channel"
>> +                              However, see note below.
> Again, I think we should list the other entries that may be in the list.
> Otherwise it's not clear what the binding defines. Similarly for the
> other compatible list definitions below...
>
>> +        - reg               : <registers specifier for channel>
>>           - cell-index        : dma channel index starts at 0.
> I realise you haven't changed it, but it's unclear what the cell-index
> property is (and somewhat confusingly there seem to be multiple
> defnitions). It might be worth clarifying it while performing the other
> cleanup.
not clear with your point "multiple definitions", we really have 
multiple dma channels for one dma controller.
cell-index is used as channel index, this is an old method used by old 
driver, my patch didn't touch this part.
>>   
>>   Optional properties:
>> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
>> -			  (on 83xx this is expected to be identical to
>> -			   the interrupts property of the parent node)
>> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>> +                              (on 83xx this is expected to be identical to
>> +                              the interrupts property of the parent node)
>>           - interrupt-parent  : optional, if needed for interrupt mapping
>>   
>>   Example:
>> @@ -70,30 +66,26 @@ Example:
>>   		};
>>   	};
>>   
>> -* Freescale 85xx/86xx DMA Controller
>> -
>> -Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
>> +** Freescale EloPlus DMA Controller
>> +   This is DMA controller with extended addresses and chaining, mainly used in
>> +   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
>> +   p4080, bsc9131 etc.
>>   
>>   Required properties:
>>   
>> -- compatible        : compatible list, contains 2 entries, first is
>> -		 "fsl,CHIP-dma", where CHIP is the processor
>> -		 (mpc8540, mpc8540, etc.) and the second is
>> -		 "fsl,eloplus-dma"
>> -- reg               : <registers mapping for DMA general status reg>
>> +- compatible        : must include "fsl,eloplus-dma"
>> +- reg               : <registers specifier for DMA general status reg>
>>   - cell-index        : controller index.  0 for controller @ 0x21000,
>>                                            1 for controller @ 0xc000
>> -- ranges		: Should be defined as specified in 1) to describe the
>> -		  DMA controller channels.
>> +- ranges            : describes the mapping between the address space of the
>> +                      DMA channels and the address space of the DMA controller
>>   
>>   - DMA channel nodes:
>> -        - compatible        : compatible list, contains 2 entries, first is
>> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
>> -			 (mpc8540, mpc8560, etc.) and the second is
>> -			 "fsl,eloplus-dma-channel". However, see note below.
>> +        - compatible        : must include "fsl,eloplus-dma-channel"
>> +                              However, see note below.
>>           - cell-index        : dma channel index starts at 0.
>> -        - reg               : <registers mapping for channel>
>> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
>> +        - reg               : <registers specifier for channel>
>> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>>           - interrupt-parent  : optional, if needed for interrupt mapping
>>   
>>   Example:
>> -- 
>> 1.7.9.5
> Thanks,
> Mark.
>

Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[Mark Rutland]

On Wed, Aug 28, 2013 at 09:18:55AM +0100, Hongbo Zhang wrote:
> On 08/27/2013 07:25 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
> >> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> >>
> >> This patch updates the discription of each type of DMA controller and its
> >> channels, it is preparation for adding another new DMA controller binding, it
> >> also fixes some defects of indent for text alignment at the same time.
> >>
> >> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> >> ---
> >>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
> >>   1 file changed, 27 insertions(+), 35 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> index 2a4b4bc..ddf17af 100644
> >> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> @@ -1,33 +1,29 @@
> >> -* Freescale 83xx DMA Controller
> >> +* Freescale DMA Controllers
> >>   
> >> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
> >> +** Freescale Elo DMA Controller
> >> +   This is a little-endian DMA controller, used in Freescale mpc83xx series
> >> +   chips such as mpc8315, mpc8349, mpc8379 etc.
> >>   
> >>   Required properties:
> >>   
> >> -- compatible        : compatible list, contains 2 entries, first is
> >> -		 "fsl,CHIP-dma", where CHIP is the processor
> >> -		 (mpc8349, mpc8360, etc.) and the second is
> >> -		 "fsl,elo-dma"
> >> -- reg               : <registers mapping for DMA general status reg>
> >> -- ranges		: Should be defined as specified in 1) to describe the
> >> -		  DMA controller channels.
> >> +- compatible        : must include "fsl,elo-dma"
> > We should list the other values that may be in the list also, unless
> > they are really of no consequence, in which case their presence in dt is
> > questionable.
> Hmm.  Stephen questioned here too, it seems this is a default rule.
> Although Scott@freescale had explained our thoughts, I'd like to edit 
> this item like this:
> 
> "must include "fsl,eloplus-dma", and a "fsl,CHIP-dma" is optional, where 
> CHIP is the processor name"
> 
> We don't list all the chip name because we have tens of them and we 
> cannot list all of them, and it is unnecessary to list them because we 
> even don't use "fsl,CHIP-dma" in the new driver, add "fsl,CHIP-dma" here 
> just make it questionable when it presents in example and  old dts files.
> 
> I remove the examples in bracket "(mpc8349, mpc8360, etc.)" because we 
> can see the real example below.
> I don't say" if "fsl,CHIP-dma" presents, it should be the first one, and 
> the "fsl,eloplus-dma" should be the second" because it is common rule.
> the description language should be clear and concise too I think.

Actually, you've convinced me for the form as you originally converted
it (must include "fsl,elo-dma"), given that the other strings aren't
used to give information anywhere and "fsl,CHIP-dma" doesn't fully
define a valid string.

> >> +- reg               : <registers specifier for DMA general status reg>
> >> +- ranges            : describes the mapping between the address space of the
> >> +                      DMA channels and the address space of the DMA controller
> >>   - cell-index        : controller index.  0 for controller @ 0x8100
> >> -- interrupts        : <interrupt mapping for DMA IRQ>
> >> +- interrupts        : <interrupt specifier for DMA IRQ>
> >>   - interrupt-parent  : optional, if needed for interrupt mapping
> >>   
> >> -
> >>   - DMA channel nodes:
> >> -        - compatible        : compatible list, contains 2 entries, first is
> >> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
> >> -			 (mpc8349, mpc8350, etc.) and the second is
> >> -			 "fsl,elo-dma-channel". However, see note below.
> >> -        - reg               : <registers mapping for channel>
> >> +        - compatible        : must include "fsl,elo-dma-channel"
> >> +                              However, see note below.
> > Again, I think we should list the other entries that may be in the list.
> > Otherwise it's not clear what the binding defines. Similarly for the
> > other compatible list definitions below...
> >
> >> +        - reg               : <registers specifier for channel>
> >>           - cell-index        : dma channel index starts at 0.
> > I realise you haven't changed it, but it's unclear what the cell-index
> > property is (and somewhat confusingly there seem to be multiple
> > defnitions). It might be worth clarifying it while performing the other
> > cleanup.
> not clear with your point "multiple definitions", we really have 
> multiple dma channels for one dma controller.
> cell-index is used as channel index, this is an old method used by old 
> driver, my patch didn't touch this part.

Sorry, I'd misunderstood the cell-index property. More noise from me.

Given that, this looks fine to me.

Acked-by: Mark Rutland <mark.rutland@arm.com>

> >>   
> >>   Optional properties:
> >> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
> >> -			  (on 83xx this is expected to be identical to
> >> -			   the interrupts property of the parent node)
> >> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> >> +                              (on 83xx this is expected to be identical to
> >> +                              the interrupts property of the parent node)
> >>           - interrupt-parent  : optional, if needed for interrupt mapping
> >>   
> >>   Example:
> >> @@ -70,30 +66,26 @@ Example:
> >>   		};
> >>   	};
> >>   
> >> -* Freescale 85xx/86xx DMA Controller
> >> -
> >> -Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
> >> +** Freescale EloPlus DMA Controller
> >> +   This is DMA controller with extended addresses and chaining, mainly used in
> >> +   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
> >> +   p4080, bsc9131 etc.
> >>   
> >>   Required properties:
> >>   
> >> -- compatible        : compatible list, contains 2 entries, first is
> >> -		 "fsl,CHIP-dma", where CHIP is the processor
> >> -		 (mpc8540, mpc8540, etc.) and the second is
> >> -		 "fsl,eloplus-dma"
> >> -- reg               : <registers mapping for DMA general status reg>
> >> +- compatible        : must include "fsl,eloplus-dma"
> >> +- reg               : <registers specifier for DMA general status reg>
> >>   - cell-index        : controller index.  0 for controller @ 0x21000,
> >>                                            1 for controller @ 0xc000
> >> -- ranges		: Should be defined as specified in 1) to describe the
> >> -		  DMA controller channels.
> >> +- ranges            : describes the mapping between the address space of the
> >> +                      DMA channels and the address space of the DMA controller
> >>   
> >>   - DMA channel nodes:
> >> -        - compatible        : compatible list, contains 2 entries, first is
> >> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
> >> -			 (mpc8540, mpc8560, etc.) and the second is
> >> -			 "fsl,eloplus-dma-channel". However, see note below.
> >> +        - compatible        : must include "fsl,eloplus-dma-channel"
> >> +                              However, see note below.
> >>           - cell-index        : dma channel index starts at 0.
> >> -        - reg               : <registers mapping for channel>
> >> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
> >> +        - reg               : <registers specifier for channel>
> >> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> >>           - interrupt-parent  : optional, if needed for interrupt mapping
> >>   
> >>   Example:
> >> -- 
> >> 1.7.9.5
> > Thanks,
> > Mark.
> >
> 
> 
> 
> 

Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[Mark Rutland]

On Wed, Aug 28, 2013 at 09:18:55AM +0100, Hongbo Zhang wrote:
> On 08/27/2013 07:25 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
> >> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> >>
> >> This patch updates the discription of each type of DMA controller and its
> >> channels, it is preparation for adding another new DMA controller binding, it
> >> also fixes some defects of indent for text alignment at the same time.
> >>
> >> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> >> ---
> >>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
> >>   1 file changed, 27 insertions(+), 35 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> index 2a4b4bc..ddf17af 100644
> >> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> @@ -1,33 +1,29 @@
> >> -* Freescale 83xx DMA Controller
> >> +* Freescale DMA Controllers
> >>   
> >> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
> >> +** Freescale Elo DMA Controller
> >> +   This is a little-endian DMA controller, used in Freescale mpc83xx series
> >> +   chips such as mpc8315, mpc8349, mpc8379 etc.
> >>   
> >>   Required properties:
> >>   
> >> -- compatible        : compatible list, contains 2 entries, first is
> >> -		 "fsl,CHIP-dma", where CHIP is the processor
> >> -		 (mpc8349, mpc8360, etc.) and the second is
> >> -		 "fsl,elo-dma"
> >> -- reg               : <registers mapping for DMA general status reg>
> >> -- ranges		: Should be defined as specified in 1) to describe the
> >> -		  DMA controller channels.
> >> +- compatible        : must include "fsl,elo-dma"
> > We should list the other values that may be in the list also, unless
> > they are really of no consequence, in which case their presence in dt is
> > questionable.
> Hmm.  Stephen questioned here too, it seems this is a default rule.
> Although Scott@freescale had explained our thoughts, I'd like to edit 
> this item like this:
> 
> "must include "fsl,eloplus-dma", and a "fsl,CHIP-dma" is optional, where 
> CHIP is the processor name"
> 
> We don't list all the chip name because we have tens of them and we 
> cannot list all of them, and it is unnecessary to list them because we 
> even don't use "fsl,CHIP-dma" in the new driver, add "fsl,CHIP-dma" here 
> just make it questionable when it presents in example and  old dts files.
> 
> I remove the examples in bracket "(mpc8349, mpc8360, etc.)" because we 
> can see the real example below.
> I don't say" if "fsl,CHIP-dma" presents, it should be the first one, and 
> the "fsl,eloplus-dma" should be the second" because it is common rule.
> the description language should be clear and concise too I think.

Actually, you've convinced me for the form as you originally converted
it (must include "fsl,elo-dma"), given that the other strings aren't
used to give information anywhere and "fsl,CHIP-dma" doesn't fully
define a valid string.

> >> +- reg               : <registers specifier for DMA general status reg>
> >> +- ranges            : describes the mapping between the address space of the
> >> +                      DMA channels and the address space of the DMA controller
> >>   - cell-index        : controller index.  0 for controller @ 0x8100
> >> -- interrupts        : <interrupt mapping for DMA IRQ>
> >> +- interrupts        : <interrupt specifier for DMA IRQ>
> >>   - interrupt-parent  : optional, if needed for interrupt mapping
> >>   
> >> -
> >>   - DMA channel nodes:
> >> -        - compatible        : compatible list, contains 2 entries, first is
> >> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
> >> -			 (mpc8349, mpc8350, etc.) and the second is
> >> -			 "fsl,elo-dma-channel". However, see note below.
> >> -        - reg               : <registers mapping for channel>
> >> +        - compatible        : must include "fsl,elo-dma-channel"
> >> +                              However, see note below.
> > Again, I think we should list the other entries that may be in the list.
> > Otherwise it's not clear what the binding defines. Similarly for the
> > other compatible list definitions below...
> >
> >> +        - reg               : <registers specifier for channel>
> >>           - cell-index        : dma channel index starts at 0.
> > I realise you haven't changed it, but it's unclear what the cell-index
> > property is (and somewhat confusingly there seem to be multiple
> > defnitions). It might be worth clarifying it while performing the other
> > cleanup.
> not clear with your point "multiple definitions", we really have 
> multiple dma channels for one dma controller.
> cell-index is used as channel index, this is an old method used by old 
> driver, my patch didn't touch this part.

Sorry, I'd misunderstood the cell-index property. More noise from me.

Given that, this looks fine to me.

Acked-by: Mark Rutland <mark.rutland@arm.com>

> >>   
> >>   Optional properties:
> >> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
> >> -			  (on 83xx this is expected to be identical to
> >> -			   the interrupts property of the parent node)
> >> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> >> +                              (on 83xx this is expected to be identical to
> >> +                              the interrupts property of the parent node)
> >>           - interrupt-parent  : optional, if needed for interrupt mapping
> >>   
> >>   Example:
> >> @@ -70,30 +66,26 @@ Example:
> >>   		};
> >>   	};
> >>   
> >> -* Freescale 85xx/86xx DMA Controller
> >> -
> >> -Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
> >> +** Freescale EloPlus DMA Controller
> >> +   This is DMA controller with extended addresses and chaining, mainly used in
> >> +   Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
> >> +   p4080, bsc9131 etc.
> >>   
> >>   Required properties:
> >>   
> >> -- compatible        : compatible list, contains 2 entries, first is
> >> -		 "fsl,CHIP-dma", where CHIP is the processor
> >> -		 (mpc8540, mpc8540, etc.) and the second is
> >> -		 "fsl,eloplus-dma"
> >> -- reg               : <registers mapping for DMA general status reg>
> >> +- compatible        : must include "fsl,eloplus-dma"
> >> +- reg               : <registers specifier for DMA general status reg>
> >>   - cell-index        : controller index.  0 for controller @ 0x21000,
> >>                                            1 for controller @ 0xc000
> >> -- ranges		: Should be defined as specified in 1) to describe the
> >> -		  DMA controller channels.
> >> +- ranges            : describes the mapping between the address space of the
> >> +                      DMA channels and the address space of the DMA controller
> >>   
> >>   - DMA channel nodes:
> >> -        - compatible        : compatible list, contains 2 entries, first is
> >> -			 "fsl,CHIP-dma-channel", where CHIP is the processor
> >> -			 (mpc8540, mpc8560, etc.) and the second is
> >> -			 "fsl,eloplus-dma-channel". However, see note below.
> >> +        - compatible        : must include "fsl,eloplus-dma-channel"
> >> +                              However, see note below.
> >>           - cell-index        : dma channel index starts at 0.
> >> -        - reg               : <registers mapping for channel>
> >> -        - interrupts        : <interrupt mapping for DMA channel IRQ>
> >> +        - reg               : <registers specifier for channel>
> >> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> >>           - interrupt-parent  : optional, if needed for interrupt mapping
> >>   
> >>   Example:
> >> -- 
> >> 1.7.9.5
> > Thanks,
> > Mark.
> >
> 
> 
> 
> 

Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Mark Rutland]

On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
> On 08/27/2013 07:35 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
> >> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> >>
> >> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> >> the device tree nodes for them.
> >>
> >> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> >> ---
> >>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
> >>   arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
> >>   arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
> >>   arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
> >>   arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
> >>   5 files changed, 232 insertions(+), 4 deletions(-)
> >>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> >>
> >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> index ddf17af..10fd031 100644
> >> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> @@ -126,6 +126,72 @@ Example:
> >>                  };
> >>          };
> >>
> >> +** Freescale Elo3 DMA Controller
> >> +   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
> >> +   series chips, such as t1040, t4240, b4860.
> >> +
> >> +Required properties:
> >> +
> >> +- compatible        : must include "fsl,elo3-dma"
> >> +- reg               : <registers specifier for DMA general status reg>
> >> +- ranges            : describes the mapping between the address space of the
> >> +                      DMA channels and the address space of the DMA controller
> >> +
> >> +- DMA channel nodes:
> >> +        - compatible        : must include "fsl,eloplus-dma-channel"
> >> +        - reg               : <registers specifier for channel>
> >> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> >> +        - interrupt-parent  : optional, if needed for interrupt mapping
> >> +
> >> +Example:
> >> +dma@100300 {
> >> +       #address-cells = <1>;
> >> +       #size-cells = <1>;
> >> +       compatible = "fsl,elo3-dma";
> >> +       reg = <0x100300 0x4 0x100600 0x4>;
> > Is that one reg entry where #size-cells=2 and #address-cells=2?
> >
> > That's what the binding implies (given it only describes a single reg
> > entry).
> >
> > if it's two entries, we should make that explicit (both in the binding
> > and example):
> >
> > 	reg = <0x100300 0x4>,
> > 	      <0x100600 0x4>;
> Yes they are two entries, I will change it this way.

Ok. Could you make sure you document what the two reg entries correspond
to? That's not clear from "<registers specifier for channel>".

> >> +       ranges = <0x0 0x100100 0x500>;
> > If it is one reg entry then the example ranges property isn't big enough
> > to contain the parent-bus-address.
> They are two reg entries, so the range is big enough.

Ok.

> >
> >> +       dma-channel@0 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x0 0x80>;
> >> +               interrupts = <28 2 0 0>;
> >> +       };
> >> +       dma-channel@80 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x80 0x80>;
> >> +               interrupts = <29 2 0 0>;
> >> +       };
> >> +       dma-channel@100 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x100 0x80>;
> >> +               interrupts = <30 2 0 0>;
> >> +       };
> >> +       dma-channel@180 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x180 0x80>;
> >> +               interrupts = <31 2 0 0>;
> >> +       };
> >> +       dma-channel@300 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x300 0x80>;
> >> +               interrupts = <76 2 0 0>;
> >> +       };
> >> +       dma-channel@380 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x380 0x80>;
> >> +               interrupts = <77 2 0 0>;
> >> +       };
> >> +       dma-channel@400 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x400 0x80>;
> >> +               interrupts = <78 2 0 0>;
> >> +       };
> >> +       dma-channel@480 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x480 0x80>;
> >> +               interrupts = <79 2 0 0>;
> >> +       };
> >> +};
> >> +
> >>   Note on DMA channel compatible properties: The compatible property must say
> >>   "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
> >>   driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
> >> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> index 7399154..ea53ea1 100644
> >> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> @@ -223,13 +223,13 @@
> >>                  reg = <0xe2000 0x1000>;
> >>          };
> >>
> >> -/include/ "qoriq-dma-0.dtsi"
> >> +/include/ "elo3-dma-0.dtsi"
> >>          dma@100300 {
> >>                  fsl,iommu-parent = <&pamu0>;
> >>                  fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
> >>          };
> >>
> >> -/include/ "qoriq-dma-1.dtsi"
> >> +/include/ "elo3-dma-1.dtsi"
> >>          dma@101300 {
> >>                  fsl,iommu-parent = <&pamu0>;
> >>                  fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
> >> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >> new file mode 100644
> >> index 0000000..69a3277
> >> --- /dev/null
> >> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >> @@ -0,0 +1,81 @@
> >> +/*
> >> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
> > Copy-pasted?
> >
> > Presumably should be "Elo3 DMA devicetree stub", or similar?
> >
> > Similarly for elo3-dma-1.dtsi.
> Yes copy-pasted, but QorIQ isn't wrong, it is name of Freescale series 
> chips.
> To be more specific, I'd like to use "QorIQ Elo3 DMA devicetree stub"

That sounds good to me.

Cheers,
Mark.

Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Mark Rutland]

On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
> On 08/27/2013 07:35 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
> >> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> >>
> >> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> >> the device tree nodes for them.
> >>
> >> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> >> ---
> >>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
> >>   arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
> >>   arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
> >>   arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
> >>   arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
> >>   5 files changed, 232 insertions(+), 4 deletions(-)
> >>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> >>
> >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> index ddf17af..10fd031 100644
> >> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> @@ -126,6 +126,72 @@ Example:
> >>                  };
> >>          };
> >>
> >> +** Freescale Elo3 DMA Controller
> >> +   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
> >> +   series chips, such as t1040, t4240, b4860.
> >> +
> >> +Required properties:
> >> +
> >> +- compatible        : must include "fsl,elo3-dma"
> >> +- reg               : <registers specifier for DMA general status reg>
> >> +- ranges            : describes the mapping between the address space of the
> >> +                      DMA channels and the address space of the DMA controller
> >> +
> >> +- DMA channel nodes:
> >> +        - compatible        : must include "fsl,eloplus-dma-channel"
> >> +        - reg               : <registers specifier for channel>
> >> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
> >> +        - interrupt-parent  : optional, if needed for interrupt mapping
> >> +
> >> +Example:
> >> +dma@100300 {
> >> +       #address-cells = <1>;
> >> +       #size-cells = <1>;
> >> +       compatible = "fsl,elo3-dma";
> >> +       reg = <0x100300 0x4 0x100600 0x4>;
> > Is that one reg entry where #size-cells=2 and #address-cells=2?
> >
> > That's what the binding implies (given it only describes a single reg
> > entry).
> >
> > if it's two entries, we should make that explicit (both in the binding
> > and example):
> >
> > 	reg = <0x100300 0x4>,
> > 	      <0x100600 0x4>;
> Yes they are two entries, I will change it this way.

Ok. Could you make sure you document what the two reg entries correspond
to? That's not clear from "<registers specifier for channel>".

> >> +       ranges = <0x0 0x100100 0x500>;
> > If it is one reg entry then the example ranges property isn't big enough
> > to contain the parent-bus-address.
> They are two reg entries, so the range is big enough.

Ok.

> >
> >> +       dma-channel@0 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x0 0x80>;
> >> +               interrupts = <28 2 0 0>;
> >> +       };
> >> +       dma-channel@80 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x80 0x80>;
> >> +               interrupts = <29 2 0 0>;
> >> +       };
> >> +       dma-channel@100 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x100 0x80>;
> >> +               interrupts = <30 2 0 0>;
> >> +       };
> >> +       dma-channel@180 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x180 0x80>;
> >> +               interrupts = <31 2 0 0>;
> >> +       };
> >> +       dma-channel@300 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x300 0x80>;
> >> +               interrupts = <76 2 0 0>;
> >> +       };
> >> +       dma-channel@380 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x380 0x80>;
> >> +               interrupts = <77 2 0 0>;
> >> +       };
> >> +       dma-channel@400 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x400 0x80>;
> >> +               interrupts = <78 2 0 0>;
> >> +       };
> >> +       dma-channel@480 {
> >> +               compatible = "fsl,eloplus-dma-channel";
> >> +               reg = <0x480 0x80>;
> >> +               interrupts = <79 2 0 0>;
> >> +       };
> >> +};
> >> +
> >>   Note on DMA channel compatible properties: The compatible property must say
> >>   "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
> >>   driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
> >> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> index 7399154..ea53ea1 100644
> >> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> @@ -223,13 +223,13 @@
> >>                  reg = <0xe2000 0x1000>;
> >>          };
> >>
> >> -/include/ "qoriq-dma-0.dtsi"
> >> +/include/ "elo3-dma-0.dtsi"
> >>          dma@100300 {
> >>                  fsl,iommu-parent = <&pamu0>;
> >>                  fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
> >>          };
> >>
> >> -/include/ "qoriq-dma-1.dtsi"
> >> +/include/ "elo3-dma-1.dtsi"
> >>          dma@101300 {
> >>                  fsl,iommu-parent = <&pamu0>;
> >>                  fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
> >> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >> new file mode 100644
> >> index 0000000..69a3277
> >> --- /dev/null
> >> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >> @@ -0,0 +1,81 @@
> >> +/*
> >> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
> > Copy-pasted?
> >
> > Presumably should be "Elo3 DMA devicetree stub", or similar?
> >
> > Similarly for elo3-dma-1.dtsi.
> Yes copy-pasted, but QorIQ isn't wrong, it is name of Freescale series 
> chips.
> To be more specific, I'd like to use "QorIQ Elo3 DMA devicetree stub"

That sounds good to me.

Cheers,
Mark.

Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Hongbo Zhang]

On 08/28/2013 08:51 PM, Mark Rutland wrote:
> On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
>> On 08/27/2013 07:35 PM, Mark Rutland wrote:
>>> On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
>>>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>>>
>>>> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
>>>> the device tree nodes for them.
>>>>
>>>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>>>> ---
>>>>    .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
>>>>    arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
>>>>    arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
>>>>    arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
>>>>    arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
>>>>    5 files changed, 232 insertions(+), 4 deletions(-)
>>>>    create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>>    create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> index ddf17af..10fd031 100644
>>>> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> @@ -126,6 +126,72 @@ Example:
>>>>                   };
>>>>           };
>>>>
>>>> +** Freescale Elo3 DMA Controller
>>>> +   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
>>>> +   series chips, such as t1040, t4240, b4860.
>>>> +
>>>> +Required properties:
>>>> +
>>>> +- compatible        : must include "fsl,elo3-dma"
>>>> +- reg               : <registers specifier for DMA general status reg>
>>>> +- ranges            : describes the mapping between the address space of the
>>>> +                      DMA channels and the address space of the DMA controller
>>>> +
>>>> +- DMA channel nodes:
>>>> +        - compatible        : must include "fsl,eloplus-dma-channel"
>>>> +        - reg               : <registers specifier for channel>
>>>> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>>>> +        - interrupt-parent  : optional, if needed for interrupt mapping
>>>> +
>>>> +Example:
>>>> +dma@100300 {
>>>> +       #address-cells = <1>;
>>>> +       #size-cells = <1>;
>>>> +       compatible = "fsl,elo3-dma";
>>>> +       reg = <0x100300 0x4 0x100600 0x4>;
>>> Is that one reg entry where #size-cells=2 and #address-cells=2?
>>>
>>> That's what the binding implies (given it only describes a single reg
>>> entry).
>>>
>>> if it's two entries, we should make that explicit (both in the binding
>>> and example):
>>>
>>> 	reg = <0x100300 0x4>,
>>> 	      <0x100600 0x4>;
>> Yes they are two entries, I will change it this way.
> Ok. Could you make sure you document what the two reg entries correspond
> to? That's not clear from "<registers specifier for channel>".
Yes I am sure, we have reg for DMA controller and also reg for each DMA 
channel.
these two reg entries are "registers specifier for DMA general status 
reg", not "registers specifier for channel"
because this is an 8-channel DMA controller, we have two general status 
registers (vs. one status register for 4-chanel DMA controller previously )
>>>> +       ranges = <0x0 0x100100 0x500>;
>>> If it is one reg entry then the example ranges property isn't big enough
>>> to contain the parent-bus-address.
>> They are two reg entries, so the range is big enough.
> Ok.
>
>>>> +       dma-channel@0 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x0 0x80>;
>>>> +               interrupts = <28 2 0 0>;
>>>> +       };
>>>> +       dma-channel@80 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x80 0x80>;
>>>> +               interrupts = <29 2 0 0>;
>>>> +       };
>>>> +       dma-channel@100 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x100 0x80>;
>>>> +               interrupts = <30 2 0 0>;
>>>> +       };
>>>> +       dma-channel@180 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x180 0x80>;
>>>> +               interrupts = <31 2 0 0>;
>>>> +       };
>>>> +       dma-channel@300 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x300 0x80>;
>>>> +               interrupts = <76 2 0 0>;
>>>> +       };
>>>> +       dma-channel@380 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x380 0x80>;
>>>> +               interrupts = <77 2 0 0>;
>>>> +       };
>>>> +       dma-channel@400 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x400 0x80>;
>>>> +               interrupts = <78 2 0 0>;
>>>> +       };
>>>> +       dma-channel@480 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x480 0x80>;
>>>> +               interrupts = <79 2 0 0>;
>>>> +       };
>>>> +};
>>>> +
>>>>    Note on DMA channel compatible properties: The compatible property must say
>>>>    "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>>>>    driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
>>>> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> index 7399154..ea53ea1 100644
>>>> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> @@ -223,13 +223,13 @@
>>>>                   reg = <0xe2000 0x1000>;
>>>>           };
>>>>
>>>> -/include/ "qoriq-dma-0.dtsi"
>>>> +/include/ "elo3-dma-0.dtsi"
>>>>           dma@100300 {
>>>>                   fsl,iommu-parent = <&pamu0>;
>>>>                   fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>>>>           };
>>>>
>>>> -/include/ "qoriq-dma-1.dtsi"
>>>> +/include/ "elo3-dma-1.dtsi"
>>>>           dma@101300 {
>>>>                   fsl,iommu-parent = <&pamu0>;
>>>>                   fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
>>>> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>> new file mode 100644
>>>> index 0000000..69a3277
>>>> --- /dev/null
>>>> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>> @@ -0,0 +1,81 @@
>>>> +/*
>>>> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
>>> Copy-pasted?
>>>
>>> Presumably should be "Elo3 DMA devicetree stub", or similar?
>>>
>>> Similarly for elo3-dma-1.dtsi.
>> Yes copy-pasted, but QorIQ isn't wrong, it is name of Freescale series
>> chips.
>> To be more specific, I'd like to use "QorIQ Elo3 DMA devicetree stub"
> That sounds good to me.
>
> Cheers,
> Mark.
>

Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Hongbo Zhang]

On 08/28/2013 08:51 PM, Mark Rutland wrote:
> On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
>> On 08/27/2013 07:35 PM, Mark Rutland wrote:
>>> On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
>>>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>>>
>>>> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
>>>> the device tree nodes for them.
>>>>
>>>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>>>> ---
>>>>    .../devicetree/bindings/powerpc/fsl/dma.txt        |   66 ++++++++++++++++
>>>>    arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
>>>>    arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   81 ++++++++++++++++++++
>>>>    arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   81 ++++++++++++++++++++
>>>>    arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
>>>>    5 files changed, 232 insertions(+), 4 deletions(-)
>>>>    create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>>    create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> index ddf17af..10fd031 100644
>>>> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> @@ -126,6 +126,72 @@ Example:
>>>>                   };
>>>>           };
>>>>
>>>> +** Freescale Elo3 DMA Controller
>>>> +   This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
>>>> +   series chips, such as t1040, t4240, b4860.
>>>> +
>>>> +Required properties:
>>>> +
>>>> +- compatible        : must include "fsl,elo3-dma"
>>>> +- reg               : <registers specifier for DMA general status reg>
>>>> +- ranges            : describes the mapping between the address space of the
>>>> +                      DMA channels and the address space of the DMA controller
>>>> +
>>>> +- DMA channel nodes:
>>>> +        - compatible        : must include "fsl,eloplus-dma-channel"
>>>> +        - reg               : <registers specifier for channel>
>>>> +        - interrupts        : <interrupt specifier for DMA channel IRQ>
>>>> +        - interrupt-parent  : optional, if needed for interrupt mapping
>>>> +
>>>> +Example:
>>>> +dma@100300 {
>>>> +       #address-cells = <1>;
>>>> +       #size-cells = <1>;
>>>> +       compatible = "fsl,elo3-dma";
>>>> +       reg = <0x100300 0x4 0x100600 0x4>;
>>> Is that one reg entry where #size-cells=2 and #address-cells=2?
>>>
>>> That's what the binding implies (given it only describes a single reg
>>> entry).
>>>
>>> if it's two entries, we should make that explicit (both in the binding
>>> and example):
>>>
>>> 	reg = <0x100300 0x4>,
>>> 	      <0x100600 0x4>;
>> Yes they are two entries, I will change it this way.
> Ok. Could you make sure you document what the two reg entries correspond
> to? That's not clear from "<registers specifier for channel>".
Yes I am sure, we have reg for DMA controller and also reg for each DMA 
channel.
these two reg entries are "registers specifier for DMA general status 
reg", not "registers specifier for channel"
because this is an 8-channel DMA controller, we have two general status 
registers (vs. one status register for 4-chanel DMA controller previously )
>>>> +       ranges = <0x0 0x100100 0x500>;
>>> If it is one reg entry then the example ranges property isn't big enough
>>> to contain the parent-bus-address.
>> They are two reg entries, so the range is big enough.
> Ok.
>
>>>> +       dma-channel@0 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x0 0x80>;
>>>> +               interrupts = <28 2 0 0>;
>>>> +       };
>>>> +       dma-channel@80 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x80 0x80>;
>>>> +               interrupts = <29 2 0 0>;
>>>> +       };
>>>> +       dma-channel@100 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x100 0x80>;
>>>> +               interrupts = <30 2 0 0>;
>>>> +       };
>>>> +       dma-channel@180 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x180 0x80>;
>>>> +               interrupts = <31 2 0 0>;
>>>> +       };
>>>> +       dma-channel@300 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x300 0x80>;
>>>> +               interrupts = <76 2 0 0>;
>>>> +       };
>>>> +       dma-channel@380 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x380 0x80>;
>>>> +               interrupts = <77 2 0 0>;
>>>> +       };
>>>> +       dma-channel@400 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x400 0x80>;
>>>> +               interrupts = <78 2 0 0>;
>>>> +       };
>>>> +       dma-channel@480 {
>>>> +               compatible = "fsl,eloplus-dma-channel";
>>>> +               reg = <0x480 0x80>;
>>>> +               interrupts = <79 2 0 0>;
>>>> +       };
>>>> +};
>>>> +
>>>>    Note on DMA channel compatible properties: The compatible property must say
>>>>    "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>>>>    driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
>>>> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> index 7399154..ea53ea1 100644
>>>> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> @@ -223,13 +223,13 @@
>>>>                   reg = <0xe2000 0x1000>;
>>>>           };
>>>>
>>>> -/include/ "qoriq-dma-0.dtsi"
>>>> +/include/ "elo3-dma-0.dtsi"
>>>>           dma@100300 {
>>>>                   fsl,iommu-parent = <&pamu0>;
>>>>                   fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>>>>           };
>>>>
>>>> -/include/ "qoriq-dma-1.dtsi"
>>>> +/include/ "elo3-dma-1.dtsi"
>>>>           dma@101300 {
>>>>                   fsl,iommu-parent = <&pamu0>;
>>>>                   fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
>>>> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>> new file mode 100644
>>>> index 0000000..69a3277
>>>> --- /dev/null
>>>> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>> @@ -0,0 +1,81 @@
>>>> +/*
>>>> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
>>> Copy-pasted?
>>>
>>> Presumably should be "Elo3 DMA devicetree stub", or similar?
>>>
>>> Similarly for elo3-dma-1.dtsi.
>> Yes copy-pasted, but QorIQ isn't wrong, it is name of Freescale series
>> chips.
>> To be more specific, I'd like to use "QorIQ Elo3 DMA devicetree stub"
> That sounds good to me.
>
> Cheers,
> Mark.
>

Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[Scott Wood]

On Wed, 2013-08-28 at 13:48 +0100, Mark Rutland wrote:
> On Wed, Aug 28, 2013 at 09:18:55AM +0100, Hongbo Zhang wrote:
> > On 08/27/2013 07:25 PM, Mark Rutland wrote:
> > > On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
> > >> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> > >>
> > >> This patch updates the discription of each type of DMA controller and its
> > >> channels, it is preparation for adding another new DMA controller binding, it
> > >> also fixes some defects of indent for text alignment at the same time.
> > >>
> > >> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> > >> ---
> > >>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
> > >>   1 file changed, 27 insertions(+), 35 deletions(-)
> > >>
> > >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > >> index 2a4b4bc..ddf17af 100644
> > >> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > >> @@ -1,33 +1,29 @@
> > >> -* Freescale 83xx DMA Controller
> > >> +* Freescale DMA Controllers
> > >>   
> > >> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
> > >> +** Freescale Elo DMA Controller
> > >> +   This is a little-endian DMA controller, used in Freescale mpc83xx series
> > >> +   chips such as mpc8315, mpc8349, mpc8379 etc.
> > >>   
> > >>   Required properties:
> > >>   
> > >> -- compatible        : compatible list, contains 2 entries, first is
> > >> -		 "fsl,CHIP-dma", where CHIP is the processor
> > >> -		 (mpc8349, mpc8360, etc.) and the second is
> > >> -		 "fsl,elo-dma"
> > >> -- reg               : <registers mapping for DMA general status reg>
> > >> -- ranges		: Should be defined as specified in 1) to describe the
> > >> -		  DMA controller channels.
> > >> +- compatible        : must include "fsl,elo-dma"
> > > We should list the other values that may be in the list also, unless
> > > they are really of no consequence, in which case their presence in dt is
> > > questionable.
> > Hmm.  Stephen questioned here too, it seems this is a default rule.
> > Although Scott@freescale had explained our thoughts, I'd like to edit 
> > this item like this:
> > 
> > "must include "fsl,eloplus-dma", and a "fsl,CHIP-dma" is optional, where 
> > CHIP is the processor name"
> > 
> > We don't list all the chip name because we have tens of them and we 
> > cannot list all of them, and it is unnecessary to list them because we 
> > even don't use "fsl,CHIP-dma" in the new driver, add "fsl,CHIP-dma" here 
> > just make it questionable when it presents in example and  old dts files.
> > 
> > I remove the examples in bracket "(mpc8349, mpc8360, etc.)" because we 
> > can see the real example below.
> > I don't say" if "fsl,CHIP-dma" presents, it should be the first one, and 
> > the "fsl,eloplus-dma" should be the second" because it is common rule.
> > the description language should be clear and concise too I think.
> 
> Actually, you've convinced me for the form as you originally converted
> it (must include "fsl,elo-dma"), given that the other strings aren't
> used to give information anywhere and "fsl,CHIP-dma" doesn't fully
> define a valid string.

More generally, bindings should always specify "must include" rather
than "must be" for compatible, since by the nature of compatible you
could have a derivative device with more features that is compatible
with the device described in the binding, and the binding shouldn't
preclude identifying the derivative device.

-Scott

Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document

[Scott Wood]

On Wed, 2013-08-28 at 13:48 +0100, Mark Rutland wrote:
> On Wed, Aug 28, 2013 at 09:18:55AM +0100, Hongbo Zhang wrote:
> > On 08/27/2013 07:25 PM, Mark Rutland wrote:
> > > On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
> > >> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> > >>
> > >> This patch updates the discription of each type of DMA controller and its
> > >> channels, it is preparation for adding another new DMA controller binding, it
> > >> also fixes some defects of indent for text alignment at the same time.
> > >>
> > >> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> > >> ---
> > >>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   62 +++++++++-----------
> > >>   1 file changed, 27 insertions(+), 35 deletions(-)
> > >>
> > >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > >> index 2a4b4bc..ddf17af 100644
> > >> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > >> @@ -1,33 +1,29 @@
> > >> -* Freescale 83xx DMA Controller
> > >> +* Freescale DMA Controllers
> > >>   
> > >> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
> > >> +** Freescale Elo DMA Controller
> > >> +   This is a little-endian DMA controller, used in Freescale mpc83xx series
> > >> +   chips such as mpc8315, mpc8349, mpc8379 etc.
> > >>   
> > >>   Required properties:
> > >>   
> > >> -- compatible        : compatible list, contains 2 entries, first is
> > >> -		 "fsl,CHIP-dma", where CHIP is the processor
> > >> -		 (mpc8349, mpc8360, etc.) and the second is
> > >> -		 "fsl,elo-dma"
> > >> -- reg               : <registers mapping for DMA general status reg>
> > >> -- ranges		: Should be defined as specified in 1) to describe the
> > >> -		  DMA controller channels.
> > >> +- compatible        : must include "fsl,elo-dma"
> > > We should list the other values that may be in the list also, unless
> > > they are really of no consequence, in which case their presence in dt is
> > > questionable.
> > Hmm.  Stephen questioned here too, it seems this is a default rule.
> > Although Scott@freescale had explained our thoughts, I'd like to edit 
> > this item like this:
> > 
> > "must include "fsl,eloplus-dma", and a "fsl,CHIP-dma" is optional, where 
> > CHIP is the processor name"
> > 
> > We don't list all the chip name because we have tens of them and we 
> > cannot list all of them, and it is unnecessary to list them because we 
> > even don't use "fsl,CHIP-dma" in the new driver, add "fsl,CHIP-dma" here 
> > just make it questionable when it presents in example and  old dts files.
> > 
> > I remove the examples in bracket "(mpc8349, mpc8360, etc.)" because we 
> > can see the real example below.
> > I don't say" if "fsl,CHIP-dma" presents, it should be the first one, and 
> > the "fsl,eloplus-dma" should be the second" because it is common rule.
> > the description language should be clear and concise too I think.
> 
> Actually, you've convinced me for the form as you originally converted
> it (must include "fsl,elo-dma"), given that the other strings aren't
> used to give information anywhere and "fsl,CHIP-dma" doesn't fully
> define a valid string.

More generally, bindings should always specify "must include" rather
than "must be" for compatible, since by the nature of compatible you
could have a derivative device with more features that is compatible
with the device described in the binding, and the binding shouldn't
preclude identifying the derivative device.

-Scott