* [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
*changes v10 -> v11*
- [PATCH v10 04/10] replaced with newer [PATCH v11 04/11] so that
nand_scan_ident() is called only once.
discussion thread with Brian Norris <computersforpeace@gmail.com>
<http://lists.infradead.org/pipermail/linux-mtd/2013-October/049335.html>
- No change in any other patch
*changes v9 -> v10*
[PATCH 1/10], [PATCH 2/10]
swapped [PATCH v9 1/9] and [PATCH v9 2/9] so that DT parsing updates
(with backward compatibility) happen before the deprecation of DT values.
This way DTB does not break functionally between the patches.
[PATCH 3/10] <no update>
[PATCH 4/10]
dropped [PATCH v9 4/9] introducing NAND_BUSWIDTH_AUTO, instead
using DT 'nand-bus-width' for device bus-width. Refer discussion thread
<http://lists.infradead.org/pipermail/linux-mtd/2013-October/049198.html>
[PATCH 5/10] <no update>
[PATCH 6/10] <no update>
[PATCH 7/10]
separated out drivers/mtd/nand/Kconfig updates into separate [PATCH v10 10/10]
cleanup: s/info->nand\./nand_chip->
[PATCH 8/10] <no update>
[PATCH 9/10] cleanup: s/out_release_mem_region/return_error
[PATCH 10/10] <new> spawned from [PATCH v9 8/9] for Kconfig updates
*changes v8 -> v9*
[PATCH 1/9] <no update from [PATCH v8 1/6]>
[PATCH 2/9] <only commit log updated from [PATCH v8 2/6]>
As per feedbacks from Brian Norris <computersforpeace@gmail.com> previous
revision [PATCH v8 3/6] and [PATCH 4/6] are split into following sub-patches:
- [PATCH 3/9] <new> replaces local reference with generic names (mtd, nand_chip)
- [PATCH 4/9] <new> enables auto-detection of bus-width
- [PATCH 5/9] <new> removes omap3_init_bch: populates ecc-scheme data
- [PATCH 6/9] <new> removes omap3_init_bch_tail: populates ecc-layout
- [PATCH 7/9] <new> replaces lib/bch.c with nand_bch.c wrapper
[PATCH 8/9] <no update same as [PATCH v8 5/6]
[PATCH 9/9] removed devm_free_xx functions
*Changes v7 -> v8*
[PATCH 1/6] <no updates>
[PATCH 2/6]
- updated DT parsing of "ti,nand-ecc-opts" so that its "ham1" remains
compatible to "sw","hw","hw-romcode"
- updated DT parsing of "ti,elm-id" to retain compatibility to "elm_id"
- using of_parse_phandle() to get ELM device pointer from DT
[PATCH 3..6/6] <commit log updates>
*Changes v6 -> v7*
[PATCH 1/6] <NEW> split from [PATCH v6 2/4] as per feedbacks from Brian Norris <computersforpeace@gmail.com>
[PATCH 2/6] incorporated feedbacks from DT maintainers
[PATCH 3/6] cleaned and incorporated feedbacks from Brian Norris <computersforpeace@gmail.com>
[PATCH 4/6] rebasing changes and cleanup
[PATCH 5/6] updated omap3430-sdp.dts
[PATCH 6/6] <NEW> updated for devm_xx
*Changes v5 -> v6*
[PATCH 1/4]:
- updated DT binding for gpmc-nand based on 'Olof Johansson's feedbacks
http://lists.infradead.org/pipermail/linux-mtd/2013-August/048394.html
- detection of ELM device via ti,elm-id DT node, moved to gpmc.c driver
[PATCH 2/4]
- removed: support for following obselete ECC schemes
OMAP_ECC_HAMMING_CODE_DEFAULT (S/W based 1-bit Hamming ECC)
OMAP_ECC_HAMMING_CODE_HW_ROMCODE (H/W based 1-bit Hamming ECC scheme)
- updated: using omap_oobinfo as chip->ecc.layout for all ecc-schemes
- clean: error messages
[PATCH 3/4] cleaned to include changes for OMAP_ECC_BCH8_CODE_HW only
[PATCH 4/4] updated to include DT property changes
*Changes v4 -> v5*
- Rebased to linux-next
IMPORTANT: Need to revert commit fb1585b, [PATCH 2/4] part of previous version
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047441.html
- Swapped PATCH-1 & PATCH-2 to maintain bisectibility & compilation dependency
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047461.html
- PATCH-2: re-ordered call to is_elm_present() for later updates ELM driver
- dropped changes in include/linux/platform_data/elm.h (not needed)
- PATCH-3: re-ordered call to is_elm_present() for later updates ELM driver
- Re-formated patch description (replaced tabs with white-spaces)
*Changes v3 -> v4*
(Resent with CC: devicetree-discuss@lists.ozlabs.org)
- [Patch 1/3] removed MTD_NAND_OMAP_BCH8 & MTD_NAND_OMAP_BCH4 from nand/Kconfig
ECC scheme selectable via nand DT (nand-ecc-opt).
- [*] rebased for l2-mtd.git
*Changes v2 -> v3*
(Resent with Author Name fixed)
- PATCH-1: re-arranged code to remove redundancy, added NAND_BUSWIDTH_AUTO
- PATCH-2: updated nand-ecc-opt DT mapping and Documentation
- PATCH-3: code-cleaning + changes to match PATCH-1
- PATCH-4 <DROPPED> update DT attribute for ti,nand-ecc-opt
- received feedback to keep DT mapping independent of linuxism
- PATCH-4:<NEW> : ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
- independent patch for AM335x-evm.dts update based on PATCH-2
*Changes v1 -> v2*
added [PATCH 3/4] and [PATCH 4/4]
After this patch series, omap2-nand driver will supports following ECC schemes:
+---------------------------------------+---------------+---------------+
| ECC scheme |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id) | | |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id) | | |
+---------------------------------------+---------------+---------------+
Pekon Gupta (10):
ARM: OMAP2+: cleaned-up DT support of various ECC schemes
mtd: nand: omap: combine different flavours of 1-bit hamming ecc
schemes
mtd: nand: omap: cleanup: replace local references with generic
framework names
mtd: nand: omap: use DT specified bus-width only for scanning NAND
device
mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in
device_probe
mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC
instead of lib/bch.c
ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
mtd: nand: omap: updated devm_xx for all resource allocation and free
calls
mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig
.../devicetree/bindings/mtd/gpmc-nand.txt | 16 +-
arch/arm/boot/dts/am335x-evm.dts | 3 +-
arch/arm/boot/dts/omap3430-sdp.dts | 2 +-
arch/arm/mach-omap2/board-flash.c | 2 +-
arch/arm/mach-omap2/gpmc.c | 48 +-
drivers/mtd/nand/Kconfig | 40 +-
drivers/mtd/nand/omap2.c | 641 +++++++++------------
include/linux/platform_data/mtd-nand-omap2.h | 18 +-
8 files changed, 348 insertions(+), 422 deletions(-)
--
1.8.1
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
*changes v10 -> v11*
- [PATCH v10 04/10] replaced with newer [PATCH v11 04/11] so that
nand_scan_ident() is called only once.
discussion thread with Brian Norris <computersforpeace@gmail.com>
<http://lists.infradead.org/pipermail/linux-mtd/2013-October/049335.html>
- No change in any other patch
*changes v9 -> v10*
[PATCH 1/10], [PATCH 2/10]
swapped [PATCH v9 1/9] and [PATCH v9 2/9] so that DT parsing updates
(with backward compatibility) happen before the deprecation of DT values.
This way DTB does not break functionally between the patches.
[PATCH 3/10] <no update>
[PATCH 4/10]
dropped [PATCH v9 4/9] introducing NAND_BUSWIDTH_AUTO, instead
using DT 'nand-bus-width' for device bus-width. Refer discussion thread
<http://lists.infradead.org/pipermail/linux-mtd/2013-October/049198.html>
[PATCH 5/10] <no update>
[PATCH 6/10] <no update>
[PATCH 7/10]
separated out drivers/mtd/nand/Kconfig updates into separate [PATCH v10 10/10]
cleanup: s/info->nand\./nand_chip->
[PATCH 8/10] <no update>
[PATCH 9/10] cleanup: s/out_release_mem_region/return_error
[PATCH 10/10] <new> spawned from [PATCH v9 8/9] for Kconfig updates
*changes v8 -> v9*
[PATCH 1/9] <no update from [PATCH v8 1/6]>
[PATCH 2/9] <only commit log updated from [PATCH v8 2/6]>
As per feedbacks from Brian Norris <computersforpeace@gmail.com> previous
revision [PATCH v8 3/6] and [PATCH 4/6] are split into following sub-patches:
- [PATCH 3/9] <new> replaces local reference with generic names (mtd, nand_chip)
- [PATCH 4/9] <new> enables auto-detection of bus-width
- [PATCH 5/9] <new> removes omap3_init_bch: populates ecc-scheme data
- [PATCH 6/9] <new> removes omap3_init_bch_tail: populates ecc-layout
- [PATCH 7/9] <new> replaces lib/bch.c with nand_bch.c wrapper
[PATCH 8/9] <no update same as [PATCH v8 5/6]
[PATCH 9/9] removed devm_free_xx functions
*Changes v7 -> v8*
[PATCH 1/6] <no updates>
[PATCH 2/6]
- updated DT parsing of "ti,nand-ecc-opts" so that its "ham1" remains
compatible to "sw","hw","hw-romcode"
- updated DT parsing of "ti,elm-id" to retain compatibility to "elm_id"
- using of_parse_phandle() to get ELM device pointer from DT
[PATCH 3..6/6] <commit log updates>
*Changes v6 -> v7*
[PATCH 1/6] <NEW> split from [PATCH v6 2/4] as per feedbacks from Brian Norris <computersforpeace@gmail.com>
[PATCH 2/6] incorporated feedbacks from DT maintainers
[PATCH 3/6] cleaned and incorporated feedbacks from Brian Norris <computersforpeace@gmail.com>
[PATCH 4/6] rebasing changes and cleanup
[PATCH 5/6] updated omap3430-sdp.dts
[PATCH 6/6] <NEW> updated for devm_xx
*Changes v5 -> v6*
[PATCH 1/4]:
- updated DT binding for gpmc-nand based on 'Olof Johansson's feedbacks
http://lists.infradead.org/pipermail/linux-mtd/2013-August/048394.html
- detection of ELM device via ti,elm-id DT node, moved to gpmc.c driver
[PATCH 2/4]
- removed: support for following obselete ECC schemes
OMAP_ECC_HAMMING_CODE_DEFAULT (S/W based 1-bit Hamming ECC)
OMAP_ECC_HAMMING_CODE_HW_ROMCODE (H/W based 1-bit Hamming ECC scheme)
- updated: using omap_oobinfo as chip->ecc.layout for all ecc-schemes
- clean: error messages
[PATCH 3/4] cleaned to include changes for OMAP_ECC_BCH8_CODE_HW only
[PATCH 4/4] updated to include DT property changes
*Changes v4 -> v5*
- Rebased to linux-next
IMPORTANT: Need to revert commit fb1585b, [PATCH 2/4] part of previous version
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047441.html
- Swapped PATCH-1 & PATCH-2 to maintain bisectibility & compilation dependency
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047461.html
- PATCH-2: re-ordered call to is_elm_present() for later updates ELM driver
- dropped changes in include/linux/platform_data/elm.h (not needed)
- PATCH-3: re-ordered call to is_elm_present() for later updates ELM driver
- Re-formated patch description (replaced tabs with white-spaces)
*Changes v3 -> v4*
(Resent with CC: devicetree-discuss@lists.ozlabs.org)
- [Patch 1/3] removed MTD_NAND_OMAP_BCH8 & MTD_NAND_OMAP_BCH4 from nand/Kconfig
ECC scheme selectable via nand DT (nand-ecc-opt).
- [*] rebased for l2-mtd.git
*Changes v2 -> v3*
(Resent with Author Name fixed)
- PATCH-1: re-arranged code to remove redundancy, added NAND_BUSWIDTH_AUTO
- PATCH-2: updated nand-ecc-opt DT mapping and Documentation
- PATCH-3: code-cleaning + changes to match PATCH-1
- PATCH-4 <DROPPED> update DT attribute for ti,nand-ecc-opt
- received feedback to keep DT mapping independent of linuxism
- PATCH-4:<NEW> : ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
- independent patch for AM335x-evm.dts update based on PATCH-2
*Changes v1 -> v2*
added [PATCH 3/4] and [PATCH 4/4]
After this patch series, omap2-nand driver will supports following ECC schemes:
+---------------------------------------+---------------+---------------+
| ECC scheme |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id) | | |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id) | | |
+---------------------------------------+---------------+---------------+
Pekon Gupta (10):
ARM: OMAP2+: cleaned-up DT support of various ECC schemes
mtd: nand: omap: combine different flavours of 1-bit hamming ecc
schemes
mtd: nand: omap: cleanup: replace local references with generic
framework names
mtd: nand: omap: use DT specified bus-width only for scanning NAND
device
mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in
device_probe
mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC
instead of lib/bch.c
ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
mtd: nand: omap: updated devm_xx for all resource allocation and free
calls
mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig
.../devicetree/bindings/mtd/gpmc-nand.txt | 16 +-
arch/arm/boot/dts/am335x-evm.dts | 3 +-
arch/arm/boot/dts/omap3430-sdp.dts | 2 +-
arch/arm/mach-omap2/board-flash.c | 2 +-
arch/arm/mach-omap2/gpmc.c | 48 +-
drivers/mtd/nand/Kconfig | 40 +-
drivers/mtd/nand/omap2.c | 641 +++++++++------------
include/linux/platform_data/mtd-nand-omap2.h | 18 +-
8 files changed, 348 insertions(+), 422 deletions(-)
--
1.8.1
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v11 01/10] ARM: OMAP2+: cleaned-up DT support of various ECC schemes
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
OMAP NAND driver support multiple ECC scheme, which can used in different
flavours, depending on in-build Hardware engines present on SoC.
This patch updates following in DT bindings related to sectionion of ecc-schemes
- ti,elm-id: replaces elm_id (maintains backward compatibility)
- ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme
depends on ti,elm-id. (supported values ham1, bch4, and bch8)
- maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode)
Below table shows different flavours of ecc-schemes supported by OMAP devices
+---------------------------------------+---------------+---------------+
| ECC scheme |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W |
|(requires CONFIG_MTD_NAND_ECC_BCH) | | |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
|(requires CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id in DT) | | |
+---------------------------------------+---------------+---------------+
To optimize footprint of omap2-nand driver, selection of some ECC schemes
also require enabling following Kconfigs, in addition to setting appropriate
DT bindings
- Kconfig:CONFIG_MTD_NAND_ECC_BCH error detection done in software
- Kconfig:CONFIG_MTD_NAND_OMAP_BCH error detection done by h/w engine
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
---
.../devicetree/bindings/mtd/gpmc-nand.txt | 8 +++-
arch/arm/mach-omap2/gpmc.c | 48 +++++++++++++++-------
include/linux/platform_data/mtd-nand-omap2.h | 13 +++++-
3 files changed, 51 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index df338cb..bfe07e1 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -36,8 +36,12 @@ Optional properties:
"prefetch-dma" Prefetch enabled sDMA mode
"prefetch-irq" Prefetch enabled irq mode
- - elm_id: Specifies elm device node. This is required to support BCH
- error correction using ELM module.
+ - elm_id: <deprecated> use "ti,elm-id" instead
+ - ti,elm-id: Specifies phandle of the ELM devicetree node.
+ ELM is an on-chip hardware engine on TI SoC which is used for
+ locating ECC errors for BCHx algorithms. SoC devices which have
+ ELM hardware engines should specify this device node in .dtsi
+ Using ELM for ECC error correction frees some CPU cycles.
For inline partiton table parsing (optional):
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 579697a..c877129 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1341,14 +1341,6 @@ static void __maybe_unused gpmc_read_timings_dt(struct device_node *np,
#ifdef CONFIG_MTD_NAND
-static const char * const nand_ecc_opts[] = {
- [OMAP_ECC_HAMMING_CODE_DEFAULT] = "sw",
- [OMAP_ECC_HAMMING_CODE_HW] = "hw",
- [OMAP_ECC_HAMMING_CODE_HW_ROMCODE] = "hw-romcode",
- [OMAP_ECC_BCH4_CODE_HW] = "bch4",
- [OMAP_ECC_BCH8_CODE_HW] = "bch8",
-};
-
static const char * const nand_xfer_types[] = {
[NAND_OMAP_PREFETCH_POLLED] = "prefetch-polled",
[NAND_OMAP_POLLED] = "polled",
@@ -1378,13 +1370,41 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
gpmc_nand_data->cs = val;
gpmc_nand_data->of_node = child;
- if (!of_property_read_string(child, "ti,nand-ecc-opt", &s))
- for (val = 0; val < ARRAY_SIZE(nand_ecc_opts); val++)
- if (!strcasecmp(s, nand_ecc_opts[val])) {
- gpmc_nand_data->ecc_opt = val;
- break;
- }
+ /* Detect availability of ELM module */
+ gpmc_nand_data->elm_of_node = of_parse_phandle(child, "ti,elm-id", 0);
+ if (gpmc_nand_data->elm_of_node == NULL)
+ gpmc_nand_data->elm_of_node =
+ of_parse_phandle(child, "elm_id", 0);
+ if (gpmc_nand_data->elm_of_node == NULL)
+ pr_warn("%s: ti,elm-id property not found\n", __func__);
+
+ /* select ecc-scheme for NAND */
+ if (of_property_read_string(child, "ti,nand-ecc-opt", &s)) {
+ pr_err("%s: ti,nand-ecc-opt not found\n", __func__);
+ return -ENODEV;
+ }
+ if (!strcmp(s, "ham1") || !strcmp(s, "sw") ||
+ !strcmp(s, "hw") || !strcmp(s, "hw-romcode"))
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_HAM1_CODE_HW;
+ else if (!strcmp(s, "bch4"))
+ if (gpmc_nand_data->elm_of_node)
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_BCH4_CODE_HW;
+ else
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_BCH4_CODE_HW_DETECTION_SW;
+ else if (!strcmp(s, "bch8"))
+ if (gpmc_nand_data->elm_of_node)
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_BCH8_CODE_HW;
+ else
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_BCH8_CODE_HW_DETECTION_SW;
+ else
+ pr_err("%s: ti,nand-ecc-opt invalid value\n", __func__);
+ /* select data transfer mode for NAND controller */
if (!of_property_read_string(child, "ti,nand-xfer-type", &s))
for (val = 0; val < ARRAY_SIZE(nand_xfer_types); val++)
if (!strcasecmp(s, nand_xfer_types[val])) {
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 6bf9ef4..e4128f1 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -28,8 +28,16 @@ enum omap_ecc {
OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
/* 1-bit ecc: stored at beginning of spare area as romcode */
OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
- OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
- OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
+ /* 1-bit ECC calculation by GPMC, Error detection by Software */
+ OMAP_ECC_HAM1_CODE_HW,
+ /* 4-bit ECC calculation by GPMC, Error detection by Software */
+ OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
+ /* 4-bit ECC calculation by GPMC, Error detection by ELM */
+ OMAP_ECC_BCH4_CODE_HW,
+ /* 8-bit ECC calculation by GPMC, Error detection by Software */
+ OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
+ /* 8-bit ECC calculation by GPMC, Error detection by ELM */
+ OMAP_ECC_BCH8_CODE_HW,
};
struct gpmc_nand_regs {
@@ -63,5 +71,6 @@ struct omap_nand_platform_data {
/* for passing the partitions */
struct device_node *of_node;
+ struct device_node *elm_of_node;
};
#endif
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 01/10] ARM: OMAP2+: cleaned-up DT support of various ECC schemes
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
OMAP NAND driver support multiple ECC scheme, which can used in different
flavours, depending on in-build Hardware engines present on SoC.
This patch updates following in DT bindings related to sectionion of ecc-schemes
- ti,elm-id: replaces elm_id (maintains backward compatibility)
- ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme
depends on ti,elm-id. (supported values ham1, bch4, and bch8)
- maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode)
Below table shows different flavours of ecc-schemes supported by OMAP devices
+---------------------------------------+---------------+---------------+
| ECC scheme |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W |
|(requires CONFIG_MTD_NAND_ECC_BCH) | | |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
|(requires CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id in DT) | | |
+---------------------------------------+---------------+---------------+
To optimize footprint of omap2-nand driver, selection of some ECC schemes
also require enabling following Kconfigs, in addition to setting appropriate
DT bindings
- Kconfig:CONFIG_MTD_NAND_ECC_BCH error detection done in software
- Kconfig:CONFIG_MTD_NAND_OMAP_BCH error detection done by h/w engine
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
---
.../devicetree/bindings/mtd/gpmc-nand.txt | 8 +++-
arch/arm/mach-omap2/gpmc.c | 48 +++++++++++++++-------
include/linux/platform_data/mtd-nand-omap2.h | 13 +++++-
3 files changed, 51 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index df338cb..bfe07e1 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -36,8 +36,12 @@ Optional properties:
"prefetch-dma" Prefetch enabled sDMA mode
"prefetch-irq" Prefetch enabled irq mode
- - elm_id: Specifies elm device node. This is required to support BCH
- error correction using ELM module.
+ - elm_id: <deprecated> use "ti,elm-id" instead
+ - ti,elm-id: Specifies phandle of the ELM devicetree node.
+ ELM is an on-chip hardware engine on TI SoC which is used for
+ locating ECC errors for BCHx algorithms. SoC devices which have
+ ELM hardware engines should specify this device node in .dtsi
+ Using ELM for ECC error correction frees some CPU cycles.
For inline partiton table parsing (optional):
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 579697a..c877129 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1341,14 +1341,6 @@ static void __maybe_unused gpmc_read_timings_dt(struct device_node *np,
#ifdef CONFIG_MTD_NAND
-static const char * const nand_ecc_opts[] = {
- [OMAP_ECC_HAMMING_CODE_DEFAULT] = "sw",
- [OMAP_ECC_HAMMING_CODE_HW] = "hw",
- [OMAP_ECC_HAMMING_CODE_HW_ROMCODE] = "hw-romcode",
- [OMAP_ECC_BCH4_CODE_HW] = "bch4",
- [OMAP_ECC_BCH8_CODE_HW] = "bch8",
-};
-
static const char * const nand_xfer_types[] = {
[NAND_OMAP_PREFETCH_POLLED] = "prefetch-polled",
[NAND_OMAP_POLLED] = "polled",
@@ -1378,13 +1370,41 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
gpmc_nand_data->cs = val;
gpmc_nand_data->of_node = child;
- if (!of_property_read_string(child, "ti,nand-ecc-opt", &s))
- for (val = 0; val < ARRAY_SIZE(nand_ecc_opts); val++)
- if (!strcasecmp(s, nand_ecc_opts[val])) {
- gpmc_nand_data->ecc_opt = val;
- break;
- }
+ /* Detect availability of ELM module */
+ gpmc_nand_data->elm_of_node = of_parse_phandle(child, "ti,elm-id", 0);
+ if (gpmc_nand_data->elm_of_node == NULL)
+ gpmc_nand_data->elm_of_node =
+ of_parse_phandle(child, "elm_id", 0);
+ if (gpmc_nand_data->elm_of_node == NULL)
+ pr_warn("%s: ti,elm-id property not found\n", __func__);
+
+ /* select ecc-scheme for NAND */
+ if (of_property_read_string(child, "ti,nand-ecc-opt", &s)) {
+ pr_err("%s: ti,nand-ecc-opt not found\n", __func__);
+ return -ENODEV;
+ }
+ if (!strcmp(s, "ham1") || !strcmp(s, "sw") ||
+ !strcmp(s, "hw") || !strcmp(s, "hw-romcode"))
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_HAM1_CODE_HW;
+ else if (!strcmp(s, "bch4"))
+ if (gpmc_nand_data->elm_of_node)
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_BCH4_CODE_HW;
+ else
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_BCH4_CODE_HW_DETECTION_SW;
+ else if (!strcmp(s, "bch8"))
+ if (gpmc_nand_data->elm_of_node)
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_BCH8_CODE_HW;
+ else
+ gpmc_nand_data->ecc_opt =
+ OMAP_ECC_BCH8_CODE_HW_DETECTION_SW;
+ else
+ pr_err("%s: ti,nand-ecc-opt invalid value\n", __func__);
+ /* select data transfer mode for NAND controller */
if (!of_property_read_string(child, "ti,nand-xfer-type", &s))
for (val = 0; val < ARRAY_SIZE(nand_xfer_types); val++)
if (!strcasecmp(s, nand_xfer_types[val])) {
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 6bf9ef4..e4128f1 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -28,8 +28,16 @@ enum omap_ecc {
OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
/* 1-bit ecc: stored at beginning of spare area as romcode */
OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
- OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
- OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
+ /* 1-bit ECC calculation by GPMC, Error detection by Software */
+ OMAP_ECC_HAM1_CODE_HW,
+ /* 4-bit ECC calculation by GPMC, Error detection by Software */
+ OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
+ /* 4-bit ECC calculation by GPMC, Error detection by ELM */
+ OMAP_ECC_BCH4_CODE_HW,
+ /* 8-bit ECC calculation by GPMC, Error detection by Software */
+ OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
+ /* 8-bit ECC calculation by GPMC, Error detection by ELM */
+ OMAP_ECC_BCH8_CODE_HW,
};
struct gpmc_nand_regs {
@@ -63,5 +71,6 @@ struct omap_nand_platform_data {
/* for passing the partitions */
struct device_node *of_node;
+ struct device_node *elm_of_node;
};
#endif
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 02/10] mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming
ecc-scheme, like:
- OMAP_ECC_HAMMING_CODE_DEFAULT
1-bit hamming ecc code using software library
- OMAP_ECC_HAMMING_CODE_HW
1-bit hamming ecc-code using GPMC h/w engine
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE
1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible
to ROM code.
This patch combines above multiple ecc-schemes into single implementation:
- OMAP_ECC_HAM1_CODE_HW
1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible
ecc-layout.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
---
Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 8 ++++----
arch/arm/mach-omap2/board-flash.c | 2 +-
drivers/mtd/nand/omap2.c | 9 +++------
include/linux/platform_data/mtd-nand-omap2.h | 7 +------
4 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index bfe07e1..5e1f31b 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -22,10 +22,10 @@ Optional properties:
width of 8 is assumed.
- ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
-
- "sw" Software method (default)
- "hw" Hardware method
- "hw-romcode" gpmc hamming mode method & romcode layout
+ "sw" <deprecated> use "ham1" instead
+ "hw" <deprecated> use "ham1" instead
+ "hw-romcode" <deprecated> use "ham1" instead
+ "ham1" 1-bit Hamming ecc code
"bch4" 4-bit BCH ecc code
"bch8" 8-bit BCH ecc code
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index fc20a61..ac82512 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
board_nand_data.nr_parts = nr_parts;
board_nand_data.devsize = nand_type;
- board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
+ board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW;
gpmc_nand_init(&board_nand_data, gpmc_t);
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 4ecf0e5..8d521aa 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1993,10 +1993,7 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* select the ecc type */
- if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
- info->nand.ecc.mode = NAND_ECC_SOFT;
- else if ((pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) ||
- (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE)) {
+ if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
info->nand.ecc.bytes = 3;
info->nand.ecc.size = 512;
info->nand.ecc.strength = 1;
@@ -2025,7 +2022,7 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* rom code layout */
- if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE) {
+ if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
if (info->nand.options & NAND_BUSWIDTH_16)
offset = 2;
@@ -2033,7 +2030,7 @@ static int omap_nand_probe(struct platform_device *pdev)
offset = 1;
info->nand.badblock_pattern = &bb_descrip_flashbased;
}
- omap_oobinfo.eccbytes = 3 * (info->mtd.oobsize/16);
+ omap_oobinfo.eccbytes = 3 * (info->mtd.writesize / 512);
for (i = 0; i < omap_oobinfo.eccbytes; i++)
omap_oobinfo.eccpos[i] = i+offset;
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index e4128f1..4da5bfa 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -23,13 +23,8 @@ enum nand_io {
};
enum omap_ecc {
- /* 1-bit ecc: stored at end of spare area */
- OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
- OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
- /* 1-bit ecc: stored at beginning of spare area as romcode */
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
/* 1-bit ECC calculation by GPMC, Error detection by Software */
- OMAP_ECC_HAM1_CODE_HW,
+ OMAP_ECC_HAM1_CODE_HW = 0,
/* 4-bit ECC calculation by GPMC, Error detection by Software */
OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
/* 4-bit ECC calculation by GPMC, Error detection by ELM */
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 02/10] mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming
ecc-scheme, like:
- OMAP_ECC_HAMMING_CODE_DEFAULT
1-bit hamming ecc code using software library
- OMAP_ECC_HAMMING_CODE_HW
1-bit hamming ecc-code using GPMC h/w engine
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE
1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible
to ROM code.
This patch combines above multiple ecc-schemes into single implementation:
- OMAP_ECC_HAM1_CODE_HW
1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible
ecc-layout.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
---
Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 8 ++++----
arch/arm/mach-omap2/board-flash.c | 2 +-
drivers/mtd/nand/omap2.c | 9 +++------
include/linux/platform_data/mtd-nand-omap2.h | 7 +------
4 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index bfe07e1..5e1f31b 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -22,10 +22,10 @@ Optional properties:
width of 8 is assumed.
- ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
-
- "sw" Software method (default)
- "hw" Hardware method
- "hw-romcode" gpmc hamming mode method & romcode layout
+ "sw" <deprecated> use "ham1" instead
+ "hw" <deprecated> use "ham1" instead
+ "hw-romcode" <deprecated> use "ham1" instead
+ "ham1" 1-bit Hamming ecc code
"bch4" 4-bit BCH ecc code
"bch8" 8-bit BCH ecc code
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index fc20a61..ac82512 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
board_nand_data.nr_parts = nr_parts;
board_nand_data.devsize = nand_type;
- board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
+ board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW;
gpmc_nand_init(&board_nand_data, gpmc_t);
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 4ecf0e5..8d521aa 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1993,10 +1993,7 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* select the ecc type */
- if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
- info->nand.ecc.mode = NAND_ECC_SOFT;
- else if ((pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) ||
- (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE)) {
+ if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
info->nand.ecc.bytes = 3;
info->nand.ecc.size = 512;
info->nand.ecc.strength = 1;
@@ -2025,7 +2022,7 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* rom code layout */
- if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE) {
+ if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
if (info->nand.options & NAND_BUSWIDTH_16)
offset = 2;
@@ -2033,7 +2030,7 @@ static int omap_nand_probe(struct platform_device *pdev)
offset = 1;
info->nand.badblock_pattern = &bb_descrip_flashbased;
}
- omap_oobinfo.eccbytes = 3 * (info->mtd.oobsize/16);
+ omap_oobinfo.eccbytes = 3 * (info->mtd.writesize / 512);
for (i = 0; i < omap_oobinfo.eccbytes; i++)
omap_oobinfo.eccpos[i] = i+offset;
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index e4128f1..4da5bfa 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -23,13 +23,8 @@ enum nand_io {
};
enum omap_ecc {
- /* 1-bit ecc: stored at end of spare area */
- OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
- OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
- /* 1-bit ecc: stored at beginning of spare area as romcode */
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
/* 1-bit ECC calculation by GPMC, Error detection by Software */
- OMAP_ECC_HAM1_CODE_HW,
+ OMAP_ECC_HAM1_CODE_HW = 0,
/* 4-bit ECC calculation by GPMC, Error detection by Software */
OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
/* 4-bit ECC calculation by GPMC, Error detection by ELM */
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 03/10] mtd: nand: omap: cleanup: replace local references with generic framework names
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
This patch updates following in omap_nand_probe() and omap_nand_remove()
- replaces "info->nand" with "nand_chip" (struct nand_chip *nand_chip)
- replaces "info->mtd" with "mtd" (struct mtd_info *mtd)
- white-space and formatting cleanup
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 112 ++++++++++++++++++++++++-----------------------
1 file changed, 57 insertions(+), 55 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 8d521aa..5596368 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1824,10 +1824,12 @@ static int omap_nand_probe(struct platform_device *pdev)
{
struct omap_nand_info *info;
struct omap_nand_platform_data *pdata;
+ struct mtd_info *mtd;
+ struct nand_chip *nand_chip;
int err;
int i, offset;
- dma_cap_mask_t mask;
- unsigned sig;
+ dma_cap_mask_t mask;
+ unsigned sig;
struct resource *res;
struct mtd_part_parser_data ppdata = {};
@@ -1846,17 +1848,16 @@ static int omap_nand_probe(struct platform_device *pdev)
spin_lock_init(&info->controller.lock);
init_waitqueue_head(&info->controller.wq);
- info->pdev = pdev;
-
+ info->pdev = pdev;
info->gpmc_cs = pdata->cs;
info->reg = pdata->reg;
-
- info->mtd.priv = &info->nand;
- info->mtd.name = dev_name(&pdev->dev);
- info->mtd.owner = THIS_MODULE;
-
- info->nand.options = pdata->devsize;
- info->nand.options |= NAND_SKIP_BBTSCAN;
+ mtd = &info->mtd;
+ mtd->priv = &info->nand;
+ mtd->name = dev_name(&pdev->dev);
+ mtd->owner = THIS_MODULE;
+ nand_chip = &info->nand;
+ nand_chip->options = pdata->devsize;
+ nand_chip->options |= NAND_SKIP_BBTSCAN;
#ifdef CONFIG_MTD_NAND_OMAP_BCH
info->of_node = pdata->of_node;
#endif
@@ -1877,16 +1878,16 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_free_info;
}
- info->nand.IO_ADDR_R = ioremap(info->phys_base, info->mem_size);
- if (!info->nand.IO_ADDR_R) {
+ nand_chip->IO_ADDR_R = ioremap(info->phys_base, info->mem_size);
+ if (!nand_chip->IO_ADDR_R) {
err = -ENOMEM;
goto out_release_mem_region;
}
- info->nand.controller = &info->controller;
+ nand_chip->controller = &info->controller;
- info->nand.IO_ADDR_W = info->nand.IO_ADDR_R;
- info->nand.cmd_ctrl = omap_hwcontrol;
+ nand_chip->IO_ADDR_W = nand_chip->IO_ADDR_R;
+ nand_chip->cmd_ctrl = omap_hwcontrol;
/*
* If RDY/BSY line is connected to OMAP then use the omap ready
@@ -1896,26 +1897,26 @@ static int omap_nand_probe(struct platform_device *pdev)
* device and read status register until you get a failure or success
*/
if (pdata->dev_ready) {
- info->nand.dev_ready = omap_dev_ready;
- info->nand.chip_delay = 0;
+ nand_chip->dev_ready = omap_dev_ready;
+ nand_chip->chip_delay = 0;
} else {
- info->nand.waitfunc = omap_wait;
- info->nand.chip_delay = 50;
+ nand_chip->waitfunc = omap_wait;
+ nand_chip->chip_delay = 50;
}
switch (pdata->xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
- info->nand.read_buf = omap_read_buf_pref;
- info->nand.write_buf = omap_write_buf_pref;
+ nand_chip->read_buf = omap_read_buf_pref;
+ nand_chip->write_buf = omap_write_buf_pref;
break;
case NAND_OMAP_POLLED:
- if (info->nand.options & NAND_BUSWIDTH_16) {
- info->nand.read_buf = omap_read_buf16;
- info->nand.write_buf = omap_write_buf16;
+ if (nand_chip->options & NAND_BUSWIDTH_16) {
+ nand_chip->read_buf = omap_read_buf16;
+ nand_chip->write_buf = omap_write_buf16;
} else {
- info->nand.read_buf = omap_read_buf8;
- info->nand.write_buf = omap_write_buf8;
+ nand_chip->read_buf = omap_read_buf8;
+ nand_chip->write_buf = omap_write_buf8;
}
break;
@@ -1944,8 +1945,8 @@ static int omap_nand_probe(struct platform_device *pdev)
err);
goto out_release_mem_region;
}
- info->nand.read_buf = omap_read_buf_dma_pref;
- info->nand.write_buf = omap_write_buf_dma_pref;
+ nand_chip->read_buf = omap_read_buf_dma_pref;
+ nand_chip->write_buf = omap_write_buf_dma_pref;
}
break;
@@ -1980,8 +1981,8 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_release_mem_region;
}
- info->nand.read_buf = omap_read_buf_irq_pref;
- info->nand.write_buf = omap_write_buf_irq_pref;
+ nand_chip->read_buf = omap_read_buf_irq_pref;
+ nand_chip->write_buf = omap_write_buf_irq_pref;
break;
@@ -1994,16 +1995,16 @@ static int omap_nand_probe(struct platform_device *pdev)
/* select the ecc type */
if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
- info->nand.ecc.bytes = 3;
- info->nand.ecc.size = 512;
- info->nand.ecc.strength = 1;
- info->nand.ecc.calculate = omap_calculate_ecc;
- info->nand.ecc.hwctl = omap_enable_hwecc;
- info->nand.ecc.correct = omap_correct_data;
- info->nand.ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.bytes = 3;
+ nand_chip->ecc.size = 512;
+ nand_chip->ecc.strength = 1;
+ nand_chip->ecc.calculate = omap_calculate_ecc;
+ nand_chip->ecc.hwctl = omap_enable_hwecc;
+ nand_chip->ecc.correct = omap_correct_data;
+ nand_chip->ecc.mode = NAND_ECC_HW;
} else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
(pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
- err = omap3_init_bch(&info->mtd, pdata->ecc_opt);
+ err = omap3_init_bch(mtd, pdata->ecc_opt);
if (err) {
err = -EINVAL;
goto out_release_mem_region;
@@ -2013,9 +2014,9 @@ static int omap_nand_probe(struct platform_device *pdev)
/* DIP switches on some boards change between 8 and 16 bit
* bus widths for flash. Try the other width if the first try fails.
*/
- if (nand_scan_ident(&info->mtd, 1, NULL)) {
- info->nand.options ^= NAND_BUSWIDTH_16;
- if (nand_scan_ident(&info->mtd, 1, NULL)) {
+ if (nand_scan_ident(mtd, 1, NULL)) {
+ nand_chip->options ^= NAND_BUSWIDTH_16;
+ if (nand_scan_ident(mtd, 1, NULL)) {
err = -ENXIO;
goto out_release_mem_region;
}
@@ -2024,25 +2025,25 @@ static int omap_nand_probe(struct platform_device *pdev)
/* rom code layout */
if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
- if (info->nand.options & NAND_BUSWIDTH_16)
+ if (nand_chip->options & NAND_BUSWIDTH_16) {
offset = 2;
- else {
+ } else {
offset = 1;
- info->nand.badblock_pattern = &bb_descrip_flashbased;
+ nand_chip->badblock_pattern = &bb_descrip_flashbased;
}
- omap_oobinfo.eccbytes = 3 * (info->mtd.writesize / 512);
+ omap_oobinfo.eccbytes = 3 * (mtd->writesize / 512);
for (i = 0; i < omap_oobinfo.eccbytes; i++)
omap_oobinfo.eccpos[i] = i+offset;
omap_oobinfo.oobfree->offset = offset + omap_oobinfo.eccbytes;
- omap_oobinfo.oobfree->length = info->mtd.oobsize -
+ omap_oobinfo.oobfree->length = mtd->oobsize -
(offset + omap_oobinfo.eccbytes);
- info->nand.ecc.layout = &omap_oobinfo;
+ nand_chip->ecc.layout = &omap_oobinfo;
} else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
(pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
/* build OOB layout for BCH ECC correction */
- err = omap3_init_bch_tail(&info->mtd);
+ err = omap3_init_bch_tail(mtd);
if (err) {
err = -EINVAL;
goto out_release_mem_region;
@@ -2050,16 +2051,16 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* second phase scan */
- if (nand_scan_tail(&info->mtd)) {
+ if (nand_scan_tail(mtd)) {
err = -ENXIO;
goto out_release_mem_region;
}
ppdata.of_node = pdata->of_node;
- mtd_device_parse_register(&info->mtd, NULL, &ppdata, pdata->parts,
+ mtd_device_parse_register(mtd, NULL, &ppdata, pdata->parts,
pdata->nr_parts);
- platform_set_drvdata(pdev, &info->mtd);
+ platform_set_drvdata(pdev, mtd);
return 0;
@@ -2080,9 +2081,10 @@ out_free_info:
static int omap_nand_remove(struct platform_device *pdev)
{
struct mtd_info *mtd = platform_get_drvdata(pdev);
+ struct nand_chip *nand_chip = mtd->priv;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
- omap3_free_bch(&info->mtd);
+ omap3_free_bch(mtd);
if (info->dma)
dma_release_channel(info->dma);
@@ -2093,8 +2095,8 @@ static int omap_nand_remove(struct platform_device *pdev)
free_irq(info->gpmc_irq_fifo, info);
/* Release NAND device, its internal structures and partitions */
- nand_release(&info->mtd);
- iounmap(info->nand.IO_ADDR_R);
+ nand_release(mtd);
+ iounmap(nand_chip->IO_ADDR_R);
release_mem_region(info->phys_base, info->mem_size);
kfree(info);
return 0;
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 03/10] mtd: nand: omap: cleanup: replace local references with generic framework names
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
This patch updates following in omap_nand_probe() and omap_nand_remove()
- replaces "info->nand" with "nand_chip" (struct nand_chip *nand_chip)
- replaces "info->mtd" with "mtd" (struct mtd_info *mtd)
- white-space and formatting cleanup
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 112 ++++++++++++++++++++++++-----------------------
1 file changed, 57 insertions(+), 55 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 8d521aa..5596368 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1824,10 +1824,12 @@ static int omap_nand_probe(struct platform_device *pdev)
{
struct omap_nand_info *info;
struct omap_nand_platform_data *pdata;
+ struct mtd_info *mtd;
+ struct nand_chip *nand_chip;
int err;
int i, offset;
- dma_cap_mask_t mask;
- unsigned sig;
+ dma_cap_mask_t mask;
+ unsigned sig;
struct resource *res;
struct mtd_part_parser_data ppdata = {};
@@ -1846,17 +1848,16 @@ static int omap_nand_probe(struct platform_device *pdev)
spin_lock_init(&info->controller.lock);
init_waitqueue_head(&info->controller.wq);
- info->pdev = pdev;
-
+ info->pdev = pdev;
info->gpmc_cs = pdata->cs;
info->reg = pdata->reg;
-
- info->mtd.priv = &info->nand;
- info->mtd.name = dev_name(&pdev->dev);
- info->mtd.owner = THIS_MODULE;
-
- info->nand.options = pdata->devsize;
- info->nand.options |= NAND_SKIP_BBTSCAN;
+ mtd = &info->mtd;
+ mtd->priv = &info->nand;
+ mtd->name = dev_name(&pdev->dev);
+ mtd->owner = THIS_MODULE;
+ nand_chip = &info->nand;
+ nand_chip->options = pdata->devsize;
+ nand_chip->options |= NAND_SKIP_BBTSCAN;
#ifdef CONFIG_MTD_NAND_OMAP_BCH
info->of_node = pdata->of_node;
#endif
@@ -1877,16 +1878,16 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_free_info;
}
- info->nand.IO_ADDR_R = ioremap(info->phys_base, info->mem_size);
- if (!info->nand.IO_ADDR_R) {
+ nand_chip->IO_ADDR_R = ioremap(info->phys_base, info->mem_size);
+ if (!nand_chip->IO_ADDR_R) {
err = -ENOMEM;
goto out_release_mem_region;
}
- info->nand.controller = &info->controller;
+ nand_chip->controller = &info->controller;
- info->nand.IO_ADDR_W = info->nand.IO_ADDR_R;
- info->nand.cmd_ctrl = omap_hwcontrol;
+ nand_chip->IO_ADDR_W = nand_chip->IO_ADDR_R;
+ nand_chip->cmd_ctrl = omap_hwcontrol;
/*
* If RDY/BSY line is connected to OMAP then use the omap ready
@@ -1896,26 +1897,26 @@ static int omap_nand_probe(struct platform_device *pdev)
* device and read status register until you get a failure or success
*/
if (pdata->dev_ready) {
- info->nand.dev_ready = omap_dev_ready;
- info->nand.chip_delay = 0;
+ nand_chip->dev_ready = omap_dev_ready;
+ nand_chip->chip_delay = 0;
} else {
- info->nand.waitfunc = omap_wait;
- info->nand.chip_delay = 50;
+ nand_chip->waitfunc = omap_wait;
+ nand_chip->chip_delay = 50;
}
switch (pdata->xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
- info->nand.read_buf = omap_read_buf_pref;
- info->nand.write_buf = omap_write_buf_pref;
+ nand_chip->read_buf = omap_read_buf_pref;
+ nand_chip->write_buf = omap_write_buf_pref;
break;
case NAND_OMAP_POLLED:
- if (info->nand.options & NAND_BUSWIDTH_16) {
- info->nand.read_buf = omap_read_buf16;
- info->nand.write_buf = omap_write_buf16;
+ if (nand_chip->options & NAND_BUSWIDTH_16) {
+ nand_chip->read_buf = omap_read_buf16;
+ nand_chip->write_buf = omap_write_buf16;
} else {
- info->nand.read_buf = omap_read_buf8;
- info->nand.write_buf = omap_write_buf8;
+ nand_chip->read_buf = omap_read_buf8;
+ nand_chip->write_buf = omap_write_buf8;
}
break;
@@ -1944,8 +1945,8 @@ static int omap_nand_probe(struct platform_device *pdev)
err);
goto out_release_mem_region;
}
- info->nand.read_buf = omap_read_buf_dma_pref;
- info->nand.write_buf = omap_write_buf_dma_pref;
+ nand_chip->read_buf = omap_read_buf_dma_pref;
+ nand_chip->write_buf = omap_write_buf_dma_pref;
}
break;
@@ -1980,8 +1981,8 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_release_mem_region;
}
- info->nand.read_buf = omap_read_buf_irq_pref;
- info->nand.write_buf = omap_write_buf_irq_pref;
+ nand_chip->read_buf = omap_read_buf_irq_pref;
+ nand_chip->write_buf = omap_write_buf_irq_pref;
break;
@@ -1994,16 +1995,16 @@ static int omap_nand_probe(struct platform_device *pdev)
/* select the ecc type */
if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
- info->nand.ecc.bytes = 3;
- info->nand.ecc.size = 512;
- info->nand.ecc.strength = 1;
- info->nand.ecc.calculate = omap_calculate_ecc;
- info->nand.ecc.hwctl = omap_enable_hwecc;
- info->nand.ecc.correct = omap_correct_data;
- info->nand.ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.bytes = 3;
+ nand_chip->ecc.size = 512;
+ nand_chip->ecc.strength = 1;
+ nand_chip->ecc.calculate = omap_calculate_ecc;
+ nand_chip->ecc.hwctl = omap_enable_hwecc;
+ nand_chip->ecc.correct = omap_correct_data;
+ nand_chip->ecc.mode = NAND_ECC_HW;
} else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
(pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
- err = omap3_init_bch(&info->mtd, pdata->ecc_opt);
+ err = omap3_init_bch(mtd, pdata->ecc_opt);
if (err) {
err = -EINVAL;
goto out_release_mem_region;
@@ -2013,9 +2014,9 @@ static int omap_nand_probe(struct platform_device *pdev)
/* DIP switches on some boards change between 8 and 16 bit
* bus widths for flash. Try the other width if the first try fails.
*/
- if (nand_scan_ident(&info->mtd, 1, NULL)) {
- info->nand.options ^= NAND_BUSWIDTH_16;
- if (nand_scan_ident(&info->mtd, 1, NULL)) {
+ if (nand_scan_ident(mtd, 1, NULL)) {
+ nand_chip->options ^= NAND_BUSWIDTH_16;
+ if (nand_scan_ident(mtd, 1, NULL)) {
err = -ENXIO;
goto out_release_mem_region;
}
@@ -2024,25 +2025,25 @@ static int omap_nand_probe(struct platform_device *pdev)
/* rom code layout */
if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
- if (info->nand.options & NAND_BUSWIDTH_16)
+ if (nand_chip->options & NAND_BUSWIDTH_16) {
offset = 2;
- else {
+ } else {
offset = 1;
- info->nand.badblock_pattern = &bb_descrip_flashbased;
+ nand_chip->badblock_pattern = &bb_descrip_flashbased;
}
- omap_oobinfo.eccbytes = 3 * (info->mtd.writesize / 512);
+ omap_oobinfo.eccbytes = 3 * (mtd->writesize / 512);
for (i = 0; i < omap_oobinfo.eccbytes; i++)
omap_oobinfo.eccpos[i] = i+offset;
omap_oobinfo.oobfree->offset = offset + omap_oobinfo.eccbytes;
- omap_oobinfo.oobfree->length = info->mtd.oobsize -
+ omap_oobinfo.oobfree->length = mtd->oobsize -
(offset + omap_oobinfo.eccbytes);
- info->nand.ecc.layout = &omap_oobinfo;
+ nand_chip->ecc.layout = &omap_oobinfo;
} else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
(pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
/* build OOB layout for BCH ECC correction */
- err = omap3_init_bch_tail(&info->mtd);
+ err = omap3_init_bch_tail(mtd);
if (err) {
err = -EINVAL;
goto out_release_mem_region;
@@ -2050,16 +2051,16 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* second phase scan */
- if (nand_scan_tail(&info->mtd)) {
+ if (nand_scan_tail(mtd)) {
err = -ENXIO;
goto out_release_mem_region;
}
ppdata.of_node = pdata->of_node;
- mtd_device_parse_register(&info->mtd, NULL, &ppdata, pdata->parts,
+ mtd_device_parse_register(mtd, NULL, &ppdata, pdata->parts,
pdata->nr_parts);
- platform_set_drvdata(pdev, &info->mtd);
+ platform_set_drvdata(pdev, mtd);
return 0;
@@ -2080,9 +2081,10 @@ out_free_info:
static int omap_nand_remove(struct platform_device *pdev)
{
struct mtd_info *mtd = platform_get_drvdata(pdev);
+ struct nand_chip *nand_chip = mtd->priv;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
- omap3_free_bch(&info->mtd);
+ omap3_free_bch(mtd);
if (info->dma)
dma_release_channel(info->dma);
@@ -2093,8 +2095,8 @@ static int omap_nand_remove(struct platform_device *pdev)
free_irq(info->gpmc_irq_fifo, info);
/* Release NAND device, its internal structures and partitions */
- nand_release(&info->mtd);
- iounmap(info->nand.IO_ADDR_R);
+ nand_release(mtd);
+ iounmap(nand_chip->IO_ADDR_R);
release_mem_region(info->phys_base, info->mem_size);
kfree(info);
return 0;
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
This patch:
- calls nand_scan_ident() using bus-width as passed by DT
- removes double calls to nand_scan_ident(), incase first call fails
then omap_nand_probe just returns error.
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5596368..f464321 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1856,7 +1856,6 @@ static int omap_nand_probe(struct platform_device *pdev)
mtd->name = dev_name(&pdev->dev);
mtd->owner = THIS_MODULE;
nand_chip = &info->nand;
- nand_chip->options = pdata->devsize;
nand_chip->options |= NAND_SKIP_BBTSCAN;
#ifdef CONFIG_MTD_NAND_OMAP_BCH
info->of_node = pdata->of_node;
@@ -1904,6 +1903,15 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->chip_delay = 50;
}
+ /* scan NAND device connected to chip controller */
+ nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
+ if (nand_scan_ident(mtd, 1, NULL)) {
+ pr_err("nand device scan failed, may be bus-width mismatch\n");
+ err = -ENXIO;
+ goto out_release_mem_region;
+ }
+
+ /* re-populate low-level callbacks based on xfer modes */
switch (pdata->xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
nand_chip->read_buf = omap_read_buf_pref;
@@ -2011,17 +2019,6 @@ static int omap_nand_probe(struct platform_device *pdev)
}
}
- /* DIP switches on some boards change between 8 and 16 bit
- * bus widths for flash. Try the other width if the first try fails.
- */
- if (nand_scan_ident(mtd, 1, NULL)) {
- nand_chip->options ^= NAND_BUSWIDTH_16;
- if (nand_scan_ident(mtd, 1, NULL)) {
- err = -ENXIO;
- goto out_release_mem_region;
- }
- }
-
/* rom code layout */
if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
This patch:
- calls nand_scan_ident() using bus-width as passed by DT
- removes double calls to nand_scan_ident(), incase first call fails
then omap_nand_probe just returns error.
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5596368..f464321 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1856,7 +1856,6 @@ static int omap_nand_probe(struct platform_device *pdev)
mtd->name = dev_name(&pdev->dev);
mtd->owner = THIS_MODULE;
nand_chip = &info->nand;
- nand_chip->options = pdata->devsize;
nand_chip->options |= NAND_SKIP_BBTSCAN;
#ifdef CONFIG_MTD_NAND_OMAP_BCH
info->of_node = pdata->of_node;
@@ -1904,6 +1903,15 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->chip_delay = 50;
}
+ /* scan NAND device connected to chip controller */
+ nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
+ if (nand_scan_ident(mtd, 1, NULL)) {
+ pr_err("nand device scan failed, may be bus-width mismatch\n");
+ err = -ENXIO;
+ goto out_release_mem_region;
+ }
+
+ /* re-populate low-level callbacks based on xfer modes */
switch (pdata->xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
nand_chip->read_buf = omap_read_buf_pref;
@@ -2011,17 +2019,6 @@ static int omap_nand_probe(struct platform_device *pdev)
}
}
- /* DIP switches on some boards change between 8 and 16 bit
- * bus widths for flash. Try the other width if the first try fails.
- */
- if (nand_scan_ident(mtd, 1, NULL)) {
- nand_chip->options ^= NAND_BUSWIDTH_16;
- if (nand_scan_ident(mtd, 1, NULL)) {
- err = -ENXIO;
- goto out_release_mem_region;
- }
- }
-
/* rom code layout */
if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 05/10] mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
current implementation in omap3_init_bch() has some redundant code like:
(1) omap3_init_bch() re-probes the DT-binding to detect presence of ELM h/w
engine on SoC. And based on that it selects implemetation of ecc-scheme.
However, this is already done as part of GPMC DT parsing.
(2) As omap3_init_bch() serves as common function for configuring all types of
BCHx ecc-schemes, so there are multiple levels of redudant if..then..else
checks while populating nand_chip->ecc.
This patch make following changes to OMAP NAND driver:
(1) removes omap3_init_bch(): each ecc-scheme is individually configured in
omap_nand_probe() there by removing redundant if..then..else checks.
(2) adds is_elm_present(): re-probing of ELM device via DT is not required as
it's done in GPMC driver probe. Thus is_elm_present() just initializes ELM
driver with NAND probe data, when ecc-scheme with h/w based error-detection
is used.
(3) separates out configuration of different flavours of "BCH4" and "BCH8"
ecc-schemes as given in below table
(4) conditionally compiles callbacks implementations of ecc.hwctl(),
ecc.calculate(), ecc.correct() to avoid warning of un-used functions.
+---------------------------------------+---------------+---------------+
| ECC scheme |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id) | | |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id) | | |
+---------------------------------------+---------------+---------------+
- 'CONFIG_MTD_NAND_ECC_BCH' is generic KConfig required to build lib/bch.c
which is required for ECC error detection done in software.
(mainly used for legacy platforms which do not have on-chip ELM engine)
- 'CONFIG_MTD_NAND_OMAP_BCH' is OMAP specific Kconfig to detemine presence
on ELM h/w engine on SoC.
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 281 ++++++++++++++++++++++++++---------------------
1 file changed, 158 insertions(+), 123 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index f464321..86ce48b 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -25,10 +25,8 @@
#include <linux/of.h>
#include <linux/of_device.h>
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
#include <linux/bch.h>
#include <linux/platform_data/elm.h>
-#endif
#include <linux/platform_data/mtd-nand-omap2.h>
@@ -141,6 +139,8 @@
#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
#define BCH_ECC_SIZE1 0x20 /* ecc_size1 = 32 */
+#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
+
#ifdef CONFIG_MTD_NAND_OMAP_BCH
static u_char bch8_vector[] = {0xf3, 0xdb, 0x14, 0x16, 0x8b, 0xd2, 0xbe, 0xcc,
0xac, 0x6b, 0xff, 0x99, 0x7b};
@@ -182,14 +182,12 @@ struct omap_nand_info {
u_char *buf;
int buf_len;
struct gpmc_nand_regs reg;
-
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
+ /* fields specific for BCHx_HW ECC scheme */
struct bch_control *bch;
struct nand_ecclayout ecclayout;
bool is_elm_used;
struct device *elm_dev;
struct device_node *of_node;
-#endif
};
/**
@@ -1058,8 +1056,7 @@ static int omap_dev_ready(struct mtd_info *mtd)
}
}
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
-
+#if defined(CONFIG_MTD_NAND_ECC_BCH) || defined(CONFIG_MTD_NAND_OMAP_BCH)
/**
* omap3_enable_hwecc_bch - Program OMAP3 GPMC to perform BCH ECC correction
* @mtd: MTD device structure
@@ -1140,7 +1137,9 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
/* Clear ecc and enable bits */
writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
}
+#endif
+#ifdef CONFIG_MTD_NAND_ECC_BCH
/**
* omap3_calculate_ecc_bch4 - Generate 7 bytes of ECC bytes
* @mtd: MTD device structure
@@ -1225,7 +1224,9 @@ static int omap3_calculate_ecc_bch8(struct mtd_info *mtd, const u_char *dat,
return 0;
}
+#endif /* CONFIG_MTD_NAND_ECC_BCH */
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
/**
* omap3_calculate_ecc_bch - Generate bytes of ECC bytes
* @mtd: MTD device structure
@@ -1517,7 +1518,9 @@ static int omap_elm_correct_data(struct mtd_info *mtd, u_char *data,
return stat;
}
+#endif /* CONFIG_MTD_NAND_OMAP_BCH */
+#ifdef CONFIG_MTD_NAND_ECC_BCH
/**
* omap3_correct_data_bch - Decode received data and correct errors
* @mtd: MTD device structure
@@ -1549,7 +1552,9 @@ static int omap3_correct_data_bch(struct mtd_info *mtd, u_char *data,
}
return count;
}
+#endif /* CONFIG_MTD_NAND_ECC_BCH */
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
/**
* omap_write_page_bch - BCH ecc based write page function for entire page
* @mtd: mtd info structure
@@ -1637,118 +1642,48 @@ static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
}
/**
- * omap3_free_bch - Release BCH ecc resources
- * @mtd: MTD device structure
+ * is_elm_present - checks for presence of ELM module by scanning DT nodes
+ * @omap_nand_info: NAND device structure containing platform data
+ * @bch_type: 0x0=BCH4, 0x1=BCH8, 0x2=BCH16
*/
-static void omap3_free_bch(struct mtd_info *mtd)
+static int is_elm_present(struct omap_nand_info *info,
+ struct device_node *elm_node, enum bch_ecc bch_type)
{
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
- if (info->bch) {
- free_bch(info->bch);
- info->bch = NULL;
+ struct platform_device *pdev;
+ info->is_elm_used = false;
+ /* check whether elm-id is passed via DT */
+ if (!elm_node) {
+ pr_err("nand: error: ELM DT node not found\n");
+ return -ENODEV;
+ }
+ pdev = of_find_device_by_node(elm_node);
+ /* check whether ELM device is registered */
+ if (!pdev) {
+ pr_err("nand: error: ELM device not found\n");
+ return -ENODEV;
}
+ /* ELM module available, now configure it */
+ info->elm_dev = &pdev->dev;
+ if (elm_config(info->elm_dev, bch_type))
+ return -ENODEV;
+ info->is_elm_used = true;
+ return 0;
}
+#endif /* CONFIG_MTD_NAND_ECC_BCH */
+#ifdef CONFIG_MTD_NAND_ECC_BCH
/**
- * omap3_init_bch - Initialize BCH ECC
+ * omap3_free_bch - Release BCH ecc resources
* @mtd: MTD device structure
- * @ecc_opt: OMAP ECC mode (OMAP_ECC_BCH4_CODE_HW or OMAP_ECC_BCH8_CODE_HW)
*/
-static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
+static void omap3_free_bch(struct mtd_info *mtd)
{
- int max_errors;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
-#ifdef CONFIG_MTD_NAND_OMAP_BCH8
- const int hw_errors = BCH8_MAX_ERROR;
-#else
- const int hw_errors = BCH4_MAX_ERROR;
-#endif
- enum bch_ecc bch_type;
- const __be32 *parp;
- int lenp;
- struct device_node *elm_node;
-
- info->bch = NULL;
-
- max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ?
- BCH8_MAX_ERROR : BCH4_MAX_ERROR;
- if (max_errors != hw_errors) {
- pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported",
- max_errors, hw_errors);
- goto fail;
- }
-
- info->nand.ecc.size = 512;
- info->nand.ecc.hwctl = omap3_enable_hwecc_bch;
- info->nand.ecc.mode = NAND_ECC_HW;
- info->nand.ecc.strength = max_errors;
-
- if (hw_errors == BCH8_MAX_ERROR)
- bch_type = BCH8_ECC;
- else
- bch_type = BCH4_ECC;
-
- /* Detect availability of ELM module */
- parp = of_get_property(info->of_node, "elm_id", &lenp);
- if ((parp == NULL) && (lenp != (sizeof(void *) * 2))) {
- pr_err("Missing elm_id property, fall back to Software BCH\n");
- info->is_elm_used = false;
- } else {
- struct platform_device *pdev;
-
- elm_node = of_find_node_by_phandle(be32_to_cpup(parp));
- pdev = of_find_device_by_node(elm_node);
- info->elm_dev = &pdev->dev;
-
- if (elm_config(info->elm_dev, bch_type) == 0)
- info->is_elm_used = true;
- }
-
- if (info->is_elm_used && (mtd->writesize <= 4096)) {
-
- if (hw_errors == BCH8_MAX_ERROR)
- info->nand.ecc.bytes = BCH8_SIZE;
- else
- info->nand.ecc.bytes = BCH4_SIZE;
-
- info->nand.ecc.correct = omap_elm_correct_data;
- info->nand.ecc.calculate = omap3_calculate_ecc_bch;
- info->nand.ecc.read_page = omap_read_page_bch;
- info->nand.ecc.write_page = omap_write_page_bch;
- } else {
- /*
- * software bch library is only used to detect and
- * locate errors
- */
- info->bch = init_bch(13, max_errors,
- 0x201b /* hw polynomial */);
- if (!info->bch)
- goto fail;
-
- info->nand.ecc.correct = omap3_correct_data_bch;
-
- /*
- * The number of corrected errors in an ecc block that will
- * trigger block scrubbing defaults to the ecc strength (4 or 8)
- * Set mtd->bitflip_threshold here to define a custom threshold.
- */
-
- if (max_errors == 8) {
- info->nand.ecc.bytes = 13;
- info->nand.ecc.calculate = omap3_calculate_ecc_bch8;
- } else {
- info->nand.ecc.bytes = 7;
- info->nand.ecc.calculate = omap3_calculate_ecc_bch4;
- }
+ if (info->bch) {
+ free_bch(info->bch);
+ info->bch = NULL;
}
-
- pr_info("enabling NAND BCH ecc with %d-bit correction\n", max_errors);
- return 0;
-fail:
- omap3_free_bch(mtd);
- return -1;
}
/**
@@ -1806,11 +1741,6 @@ fail:
}
#else
-static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
-{
- pr_err("CONFIG_MTD_NAND_OMAP_BCH is not enabled\n");
- return -1;
-}
static int omap3_init_bch_tail(struct mtd_info *mtd)
{
return -1;
@@ -1818,7 +1748,7 @@ static int omap3_init_bch_tail(struct mtd_info *mtd)
static void omap3_free_bch(struct mtd_info *mtd)
{
}
-#endif /* CONFIG_MTD_NAND_OMAP_BCH */
+#endif /* CONFIG_MTD_NAND_ECC_BCH */
static int omap_nand_probe(struct platform_device *pdev)
{
@@ -1851,15 +1781,14 @@ static int omap_nand_probe(struct platform_device *pdev)
info->pdev = pdev;
info->gpmc_cs = pdata->cs;
info->reg = pdata->reg;
+ info->bch = NULL;
+ info->of_node = pdata->of_node;
mtd = &info->mtd;
mtd->priv = &info->nand;
mtd->name = dev_name(&pdev->dev);
mtd->owner = THIS_MODULE;
nand_chip = &info->nand;
nand_chip->options |= NAND_SKIP_BBTSCAN;
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
- info->of_node = pdata->of_node;
-#endif
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
@@ -2001,22 +1930,125 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_release_mem_region;
}
- /* select the ecc type */
- if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
+ /* populate MTD interface based on ECC scheme */
+ switch (pdata->ecc_opt) {
+ case OMAP_ECC_HAM1_CODE_HW:
+ pr_info("nand: using OMAP_ECC_HAM1_CODE_HW\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
nand_chip->ecc.bytes = 3;
nand_chip->ecc.size = 512;
nand_chip->ecc.strength = 1;
nand_chip->ecc.calculate = omap_calculate_ecc;
nand_chip->ecc.hwctl = omap_enable_hwecc;
nand_chip->ecc.correct = omap_correct_data;
- nand_chip->ecc.mode = NAND_ECC_HW;
- } else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
- (pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
- err = omap3_init_bch(mtd, pdata->ecc_opt);
- if (err) {
+ break;
+
+ case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
+#ifdef CONFIG_MTD_NAND_ECC_BCH
+ pr_info("nand: using OMAP_ECC_BCH4_CODE_HW_DETECTION_SW\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.size = 512;
+ nand_chip->ecc.bytes = 7;
+ nand_chip->ecc.strength = 4;
+ nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
+ nand_chip->ecc.correct = omap3_correct_data_bch;
+ nand_chip->ecc.calculate = omap3_calculate_ecc_bch4;
+ /* software bch library is used for locating errors */
+ info->bch = init_bch(nand_chip->ecc.bytes,
+ nand_chip->ecc.strength,
+ OMAP_ECC_BCH8_POLYNOMIAL);
+ if (!info->bch) {
+ pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
+ }
+ break;
+#else
+ pr_err("nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+#endif
+
+ case OMAP_ECC_BCH4_CODE_HW:
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
+ pr_info("nand: using OMAP_ECC_BCH4_CODE_HW ECC scheme\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.size = 512;
+ /* 14th bit is kept reserved for ROM-code compatibility */
+ nand_chip->ecc.bytes = 7 + 1;
+ nand_chip->ecc.strength = 4;
+ nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
+ nand_chip->ecc.correct = omap_elm_correct_data;
+ nand_chip->ecc.calculate = omap3_calculate_ecc_bch;
+ nand_chip->ecc.read_page = omap_read_page_bch;
+ nand_chip->ecc.write_page = omap_write_page_bch;
+ /* This ECC scheme requires ELM H/W block */
+ if (is_elm_present(info, pdata->elm_of_node, BCH4_ECC) < 0) {
+ pr_err("nand: error: could not initialize ELM\n");
+ err = -ENODEV;
goto out_release_mem_region;
}
+ break;
+#else
+ pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+#endif
+
+ case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
+#ifdef CONFIG_MTD_NAND_ECC_BCH
+ pr_info("nand: using OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.size = 512;
+ nand_chip->ecc.bytes = 13;
+ nand_chip->ecc.strength = 8;
+ nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
+ nand_chip->ecc.correct = omap3_correct_data_bch;
+ nand_chip->ecc.calculate = omap3_calculate_ecc_bch8;
+ /* software bch library is used for locating errors */
+ info->bch = init_bch(nand_chip->ecc.bytes,
+ nand_chip->ecc.strength,
+ OMAP_ECC_BCH8_POLYNOMIAL);
+ if (!info->bch) {
+ pr_err("nand: error: unable to use s/w BCH library\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+ }
+ break;
+#else
+ pr_err("nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+#endif
+
+ case OMAP_ECC_BCH8_CODE_HW:
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
+ pr_info("nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.size = 512;
+ /* 14th bit is kept reserved for ROM-code compatibility */
+ nand_chip->ecc.bytes = 13 + 1;
+ nand_chip->ecc.strength = 8;
+ nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
+ nand_chip->ecc.correct = omap_elm_correct_data;
+ nand_chip->ecc.calculate = omap3_calculate_ecc_bch;
+ nand_chip->ecc.read_page = omap_read_page_bch;
+ nand_chip->ecc.write_page = omap_write_page_bch;
+ /* This ECC scheme requires ELM H/W block */
+ if (is_elm_present(info, pdata->elm_of_node, BCH8_ECC) < 0) {
+ pr_err("nand: error: could not initialize ELM\n");
+ goto out_release_mem_region;
+ }
+ break;
+#else
+ pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+#endif
+
+ default:
+ pr_err("nand: error: invalid or unsupported ECC scheme\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
}
/* rom code layout */
@@ -2038,6 +2070,8 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.layout = &omap_oobinfo;
} else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
+ (pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) ||
+ (pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) ||
(pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
/* build OOB layout for BCH ECC correction */
err = omap3_init_bch_tail(mtd);
@@ -2070,6 +2104,7 @@ out_release_mem_region:
free_irq(info->gpmc_irq_fifo, info);
release_mem_region(info->phys_base, info->mem_size);
out_free_info:
+ omap3_free_bch(mtd);
kfree(info);
return err;
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 05/10] mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
current implementation in omap3_init_bch() has some redundant code like:
(1) omap3_init_bch() re-probes the DT-binding to detect presence of ELM h/w
engine on SoC. And based on that it selects implemetation of ecc-scheme.
However, this is already done as part of GPMC DT parsing.
(2) As omap3_init_bch() serves as common function for configuring all types of
BCHx ecc-schemes, so there are multiple levels of redudant if..then..else
checks while populating nand_chip->ecc.
This patch make following changes to OMAP NAND driver:
(1) removes omap3_init_bch(): each ecc-scheme is individually configured in
omap_nand_probe() there by removing redundant if..then..else checks.
(2) adds is_elm_present(): re-probing of ELM device via DT is not required as
it's done in GPMC driver probe. Thus is_elm_present() just initializes ELM
driver with NAND probe data, when ecc-scheme with h/w based error-detection
is used.
(3) separates out configuration of different flavours of "BCH4" and "BCH8"
ecc-schemes as given in below table
(4) conditionally compiles callbacks implementations of ecc.hwctl(),
ecc.calculate(), ecc.correct() to avoid warning of un-used functions.
+---------------------------------------+---------------+---------------+
| ECC scheme |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id) | | |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
| ti,elm-id) | | |
+---------------------------------------+---------------+---------------+
- 'CONFIG_MTD_NAND_ECC_BCH' is generic KConfig required to build lib/bch.c
which is required for ECC error detection done in software.
(mainly used for legacy platforms which do not have on-chip ELM engine)
- 'CONFIG_MTD_NAND_OMAP_BCH' is OMAP specific Kconfig to detemine presence
on ELM h/w engine on SoC.
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 281 ++++++++++++++++++++++++++---------------------
1 file changed, 158 insertions(+), 123 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index f464321..86ce48b 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -25,10 +25,8 @@
#include <linux/of.h>
#include <linux/of_device.h>
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
#include <linux/bch.h>
#include <linux/platform_data/elm.h>
-#endif
#include <linux/platform_data/mtd-nand-omap2.h>
@@ -141,6 +139,8 @@
#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
#define BCH_ECC_SIZE1 0x20 /* ecc_size1 = 32 */
+#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
+
#ifdef CONFIG_MTD_NAND_OMAP_BCH
static u_char bch8_vector[] = {0xf3, 0xdb, 0x14, 0x16, 0x8b, 0xd2, 0xbe, 0xcc,
0xac, 0x6b, 0xff, 0x99, 0x7b};
@@ -182,14 +182,12 @@ struct omap_nand_info {
u_char *buf;
int buf_len;
struct gpmc_nand_regs reg;
-
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
+ /* fields specific for BCHx_HW ECC scheme */
struct bch_control *bch;
struct nand_ecclayout ecclayout;
bool is_elm_used;
struct device *elm_dev;
struct device_node *of_node;
-#endif
};
/**
@@ -1058,8 +1056,7 @@ static int omap_dev_ready(struct mtd_info *mtd)
}
}
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
-
+#if defined(CONFIG_MTD_NAND_ECC_BCH) || defined(CONFIG_MTD_NAND_OMAP_BCH)
/**
* omap3_enable_hwecc_bch - Program OMAP3 GPMC to perform BCH ECC correction
* @mtd: MTD device structure
@@ -1140,7 +1137,9 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
/* Clear ecc and enable bits */
writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
}
+#endif
+#ifdef CONFIG_MTD_NAND_ECC_BCH
/**
* omap3_calculate_ecc_bch4 - Generate 7 bytes of ECC bytes
* @mtd: MTD device structure
@@ -1225,7 +1224,9 @@ static int omap3_calculate_ecc_bch8(struct mtd_info *mtd, const u_char *dat,
return 0;
}
+#endif /* CONFIG_MTD_NAND_ECC_BCH */
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
/**
* omap3_calculate_ecc_bch - Generate bytes of ECC bytes
* @mtd: MTD device structure
@@ -1517,7 +1518,9 @@ static int omap_elm_correct_data(struct mtd_info *mtd, u_char *data,
return stat;
}
+#endif /* CONFIG_MTD_NAND_OMAP_BCH */
+#ifdef CONFIG_MTD_NAND_ECC_BCH
/**
* omap3_correct_data_bch - Decode received data and correct errors
* @mtd: MTD device structure
@@ -1549,7 +1552,9 @@ static int omap3_correct_data_bch(struct mtd_info *mtd, u_char *data,
}
return count;
}
+#endif /* CONFIG_MTD_NAND_ECC_BCH */
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
/**
* omap_write_page_bch - BCH ecc based write page function for entire page
* @mtd: mtd info structure
@@ -1637,118 +1642,48 @@ static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
}
/**
- * omap3_free_bch - Release BCH ecc resources
- * @mtd: MTD device structure
+ * is_elm_present - checks for presence of ELM module by scanning DT nodes
+ * @omap_nand_info: NAND device structure containing platform data
+ * @bch_type: 0x0=BCH4, 0x1=BCH8, 0x2=BCH16
*/
-static void omap3_free_bch(struct mtd_info *mtd)
+static int is_elm_present(struct omap_nand_info *info,
+ struct device_node *elm_node, enum bch_ecc bch_type)
{
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
- if (info->bch) {
- free_bch(info->bch);
- info->bch = NULL;
+ struct platform_device *pdev;
+ info->is_elm_used = false;
+ /* check whether elm-id is passed via DT */
+ if (!elm_node) {
+ pr_err("nand: error: ELM DT node not found\n");
+ return -ENODEV;
+ }
+ pdev = of_find_device_by_node(elm_node);
+ /* check whether ELM device is registered */
+ if (!pdev) {
+ pr_err("nand: error: ELM device not found\n");
+ return -ENODEV;
}
+ /* ELM module available, now configure it */
+ info->elm_dev = &pdev->dev;
+ if (elm_config(info->elm_dev, bch_type))
+ return -ENODEV;
+ info->is_elm_used = true;
+ return 0;
}
+#endif /* CONFIG_MTD_NAND_ECC_BCH */
+#ifdef CONFIG_MTD_NAND_ECC_BCH
/**
- * omap3_init_bch - Initialize BCH ECC
+ * omap3_free_bch - Release BCH ecc resources
* @mtd: MTD device structure
- * @ecc_opt: OMAP ECC mode (OMAP_ECC_BCH4_CODE_HW or OMAP_ECC_BCH8_CODE_HW)
*/
-static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
+static void omap3_free_bch(struct mtd_info *mtd)
{
- int max_errors;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
-#ifdef CONFIG_MTD_NAND_OMAP_BCH8
- const int hw_errors = BCH8_MAX_ERROR;
-#else
- const int hw_errors = BCH4_MAX_ERROR;
-#endif
- enum bch_ecc bch_type;
- const __be32 *parp;
- int lenp;
- struct device_node *elm_node;
-
- info->bch = NULL;
-
- max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ?
- BCH8_MAX_ERROR : BCH4_MAX_ERROR;
- if (max_errors != hw_errors) {
- pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported",
- max_errors, hw_errors);
- goto fail;
- }
-
- info->nand.ecc.size = 512;
- info->nand.ecc.hwctl = omap3_enable_hwecc_bch;
- info->nand.ecc.mode = NAND_ECC_HW;
- info->nand.ecc.strength = max_errors;
-
- if (hw_errors == BCH8_MAX_ERROR)
- bch_type = BCH8_ECC;
- else
- bch_type = BCH4_ECC;
-
- /* Detect availability of ELM module */
- parp = of_get_property(info->of_node, "elm_id", &lenp);
- if ((parp == NULL) && (lenp != (sizeof(void *) * 2))) {
- pr_err("Missing elm_id property, fall back to Software BCH\n");
- info->is_elm_used = false;
- } else {
- struct platform_device *pdev;
-
- elm_node = of_find_node_by_phandle(be32_to_cpup(parp));
- pdev = of_find_device_by_node(elm_node);
- info->elm_dev = &pdev->dev;
-
- if (elm_config(info->elm_dev, bch_type) == 0)
- info->is_elm_used = true;
- }
-
- if (info->is_elm_used && (mtd->writesize <= 4096)) {
-
- if (hw_errors == BCH8_MAX_ERROR)
- info->nand.ecc.bytes = BCH8_SIZE;
- else
- info->nand.ecc.bytes = BCH4_SIZE;
-
- info->nand.ecc.correct = omap_elm_correct_data;
- info->nand.ecc.calculate = omap3_calculate_ecc_bch;
- info->nand.ecc.read_page = omap_read_page_bch;
- info->nand.ecc.write_page = omap_write_page_bch;
- } else {
- /*
- * software bch library is only used to detect and
- * locate errors
- */
- info->bch = init_bch(13, max_errors,
- 0x201b /* hw polynomial */);
- if (!info->bch)
- goto fail;
-
- info->nand.ecc.correct = omap3_correct_data_bch;
-
- /*
- * The number of corrected errors in an ecc block that will
- * trigger block scrubbing defaults to the ecc strength (4 or 8)
- * Set mtd->bitflip_threshold here to define a custom threshold.
- */
-
- if (max_errors == 8) {
- info->nand.ecc.bytes = 13;
- info->nand.ecc.calculate = omap3_calculate_ecc_bch8;
- } else {
- info->nand.ecc.bytes = 7;
- info->nand.ecc.calculate = omap3_calculate_ecc_bch4;
- }
+ if (info->bch) {
+ free_bch(info->bch);
+ info->bch = NULL;
}
-
- pr_info("enabling NAND BCH ecc with %d-bit correction\n", max_errors);
- return 0;
-fail:
- omap3_free_bch(mtd);
- return -1;
}
/**
@@ -1806,11 +1741,6 @@ fail:
}
#else
-static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
-{
- pr_err("CONFIG_MTD_NAND_OMAP_BCH is not enabled\n");
- return -1;
-}
static int omap3_init_bch_tail(struct mtd_info *mtd)
{
return -1;
@@ -1818,7 +1748,7 @@ static int omap3_init_bch_tail(struct mtd_info *mtd)
static void omap3_free_bch(struct mtd_info *mtd)
{
}
-#endif /* CONFIG_MTD_NAND_OMAP_BCH */
+#endif /* CONFIG_MTD_NAND_ECC_BCH */
static int omap_nand_probe(struct platform_device *pdev)
{
@@ -1851,15 +1781,14 @@ static int omap_nand_probe(struct platform_device *pdev)
info->pdev = pdev;
info->gpmc_cs = pdata->cs;
info->reg = pdata->reg;
+ info->bch = NULL;
+ info->of_node = pdata->of_node;
mtd = &info->mtd;
mtd->priv = &info->nand;
mtd->name = dev_name(&pdev->dev);
mtd->owner = THIS_MODULE;
nand_chip = &info->nand;
nand_chip->options |= NAND_SKIP_BBTSCAN;
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
- info->of_node = pdata->of_node;
-#endif
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
@@ -2001,22 +1930,125 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_release_mem_region;
}
- /* select the ecc type */
- if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
+ /* populate MTD interface based on ECC scheme */
+ switch (pdata->ecc_opt) {
+ case OMAP_ECC_HAM1_CODE_HW:
+ pr_info("nand: using OMAP_ECC_HAM1_CODE_HW\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
nand_chip->ecc.bytes = 3;
nand_chip->ecc.size = 512;
nand_chip->ecc.strength = 1;
nand_chip->ecc.calculate = omap_calculate_ecc;
nand_chip->ecc.hwctl = omap_enable_hwecc;
nand_chip->ecc.correct = omap_correct_data;
- nand_chip->ecc.mode = NAND_ECC_HW;
- } else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
- (pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
- err = omap3_init_bch(mtd, pdata->ecc_opt);
- if (err) {
+ break;
+
+ case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
+#ifdef CONFIG_MTD_NAND_ECC_BCH
+ pr_info("nand: using OMAP_ECC_BCH4_CODE_HW_DETECTION_SW\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.size = 512;
+ nand_chip->ecc.bytes = 7;
+ nand_chip->ecc.strength = 4;
+ nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
+ nand_chip->ecc.correct = omap3_correct_data_bch;
+ nand_chip->ecc.calculate = omap3_calculate_ecc_bch4;
+ /* software bch library is used for locating errors */
+ info->bch = init_bch(nand_chip->ecc.bytes,
+ nand_chip->ecc.strength,
+ OMAP_ECC_BCH8_POLYNOMIAL);
+ if (!info->bch) {
+ pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
+ }
+ break;
+#else
+ pr_err("nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+#endif
+
+ case OMAP_ECC_BCH4_CODE_HW:
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
+ pr_info("nand: using OMAP_ECC_BCH4_CODE_HW ECC scheme\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.size = 512;
+ /* 14th bit is kept reserved for ROM-code compatibility */
+ nand_chip->ecc.bytes = 7 + 1;
+ nand_chip->ecc.strength = 4;
+ nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
+ nand_chip->ecc.correct = omap_elm_correct_data;
+ nand_chip->ecc.calculate = omap3_calculate_ecc_bch;
+ nand_chip->ecc.read_page = omap_read_page_bch;
+ nand_chip->ecc.write_page = omap_write_page_bch;
+ /* This ECC scheme requires ELM H/W block */
+ if (is_elm_present(info, pdata->elm_of_node, BCH4_ECC) < 0) {
+ pr_err("nand: error: could not initialize ELM\n");
+ err = -ENODEV;
goto out_release_mem_region;
}
+ break;
+#else
+ pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+#endif
+
+ case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
+#ifdef CONFIG_MTD_NAND_ECC_BCH
+ pr_info("nand: using OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.size = 512;
+ nand_chip->ecc.bytes = 13;
+ nand_chip->ecc.strength = 8;
+ nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
+ nand_chip->ecc.correct = omap3_correct_data_bch;
+ nand_chip->ecc.calculate = omap3_calculate_ecc_bch8;
+ /* software bch library is used for locating errors */
+ info->bch = init_bch(nand_chip->ecc.bytes,
+ nand_chip->ecc.strength,
+ OMAP_ECC_BCH8_POLYNOMIAL);
+ if (!info->bch) {
+ pr_err("nand: error: unable to use s/w BCH library\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+ }
+ break;
+#else
+ pr_err("nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+#endif
+
+ case OMAP_ECC_BCH8_CODE_HW:
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
+ pr_info("nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme\n");
+ nand_chip->ecc.mode = NAND_ECC_HW;
+ nand_chip->ecc.size = 512;
+ /* 14th bit is kept reserved for ROM-code compatibility */
+ nand_chip->ecc.bytes = 13 + 1;
+ nand_chip->ecc.strength = 8;
+ nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
+ nand_chip->ecc.correct = omap_elm_correct_data;
+ nand_chip->ecc.calculate = omap3_calculate_ecc_bch;
+ nand_chip->ecc.read_page = omap_read_page_bch;
+ nand_chip->ecc.write_page = omap_write_page_bch;
+ /* This ECC scheme requires ELM H/W block */
+ if (is_elm_present(info, pdata->elm_of_node, BCH8_ECC) < 0) {
+ pr_err("nand: error: could not initialize ELM\n");
+ goto out_release_mem_region;
+ }
+ break;
+#else
+ pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+#endif
+
+ default:
+ pr_err("nand: error: invalid or unsupported ECC scheme\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
}
/* rom code layout */
@@ -2038,6 +2070,8 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.layout = &omap_oobinfo;
} else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
+ (pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) ||
+ (pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) ||
(pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
/* build OOB layout for BCH ECC correction */
err = omap3_init_bch_tail(mtd);
@@ -2070,6 +2104,7 @@ out_release_mem_region:
free_irq(info->gpmc_irq_fifo, info);
release_mem_region(info->phys_base, info->mem_size);
out_free_info:
+ omap3_free_bch(mtd);
kfree(info);
return err;
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 06/10] mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland-5wv7dgnIgG8, olof-nZhT3qVonbNeoWH0uzbU5w,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
dedekind1-Re5JQEeQqe8AvxtiuMwx3w
Cc: robherring2-Re5JQEeQqe8AvxtiuMwx3w, Pawel.Moll-5wv7dgnIgG8,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
swarren-3lzwWm7+Weoh9ZMKESR00Q, dwmw2-wEGCiKHe2LqWVfeAwA7xHQ,
arnd-r2nGTMty4D4, tony-4v6yS6AI5VpBDgjK7y7TUQ,
bcousson-rdvid1DuHRBWk0Htik3J/w,
avinashphilipk-Re5JQEeQqe8AvxtiuMwx3w, balbi-l0cyMroinI0,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
jp.francois-JOfcSVQZ0GHQT0dZR+AlfA,
ivan.djelic-ITF29qwbsa/QT0dZR+AlfA, Pekon Gupta
In current implementation omap3_init_bch_tail() is a common function to
define ecc layout for different BCHx ecc schemes.This patch:
(1) removes omap3_init_bch_tail() and defines ecc layout for individual
ecc-schemes along with populating their nand_chip->ecc data in
omap_nand_probe(). This improves the readability and scalability of
code for add new ecc schemes in future.
(2) removes 'struct nand_bbt_descr bb_descrip_flashbased' because default
nand_bbt_descr in nand_bbt.c matches the same (.len=1 for x8 devices).
(3) add the check to see if NAND device has enough OOB/Spare bytes to
store ECC signature of whole page, as defined by ecc-scheme.
Signed-off-by: Pekon Gupta <pekon-l0cyMroinI0@public.gmane.org>
---
drivers/mtd/nand/omap2.c | 161 ++++++++++++++++++-----------------------------
1 file changed, 62 insertions(+), 99 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 86ce48b..b6a08b2 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -139,6 +139,7 @@
#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
#define BCH_ECC_SIZE1 0x20 /* ecc_size1 = 32 */
+#define BADBLOCK_MARKER_LENGTH 2
#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
#ifdef CONFIG_MTD_NAND_OMAP_BCH
@@ -149,17 +150,6 @@ static u_char bch4_vector[] = {0x00, 0x6b, 0x31, 0xdd, 0x41, 0xbc, 0x10};
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
-/* Define some generic bad / good block scan pattern which are used
- * while scanning a device for factory marked good / bad blocks
- */
-static uint8_t scan_ff_pattern[] = { 0xff };
-static struct nand_bbt_descr bb_descrip_flashbased = {
- .options = NAND_BBT_SCANALLPAGES,
- .offs = 0,
- .len = 1,
- .pattern = scan_ff_pattern,
-};
-
struct omap_nand_info {
struct nand_hw_control controller;
@@ -184,7 +174,6 @@ struct omap_nand_info {
struct gpmc_nand_regs reg;
/* fields specific for BCHx_HW ECC scheme */
struct bch_control *bch;
- struct nand_ecclayout ecclayout;
bool is_elm_used;
struct device *elm_dev;
struct device_node *of_node;
@@ -1686,65 +1675,8 @@ static void omap3_free_bch(struct mtd_info *mtd)
}
}
-/**
- * omap3_init_bch_tail - Build an oob layout for BCH ECC correction.
- * @mtd: MTD device structure
- */
-static int omap3_init_bch_tail(struct mtd_info *mtd)
-{
- int i, steps, offset;
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
- struct nand_ecclayout *layout = &info->ecclayout;
-
- /* build oob layout */
- steps = mtd->writesize/info->nand.ecc.size;
- layout->eccbytes = steps*info->nand.ecc.bytes;
-
- /* do not bother creating special oob layouts for small page devices */
- if (mtd->oobsize < 64) {
- pr_err("BCH ecc is not supported on small page devices\n");
- goto fail;
- }
-
- /* reserve 2 bytes for bad block marker */
- if (layout->eccbytes+2 > mtd->oobsize) {
- pr_err("no oob layout available for oobsize %d eccbytes %u\n",
- mtd->oobsize, layout->eccbytes);
- goto fail;
- }
-
- /* ECC layout compatible with RBL for BCH8 */
- if (info->is_elm_used && (info->nand.ecc.bytes == BCH8_SIZE))
- offset = 2;
- else
- offset = mtd->oobsize - layout->eccbytes;
-
- /* put ecc bytes at oob tail */
- for (i = 0; i < layout->eccbytes; i++)
- layout->eccpos[i] = offset + i;
-
- if (info->is_elm_used && (info->nand.ecc.bytes == BCH8_SIZE))
- layout->oobfree[0].offset = 2 + layout->eccbytes * steps;
- else
- layout->oobfree[0].offset = 2;
-
- layout->oobfree[0].length = mtd->oobsize-2-layout->eccbytes;
- info->nand.ecc.layout = layout;
-
- if (!(info->nand.options & NAND_BUSWIDTH_16))
- info->nand.badblock_pattern = &bb_descrip_flashbased;
- return 0;
-fail:
- omap3_free_bch(mtd);
- return -1;
-}
-
#else
-static int omap3_init_bch_tail(struct mtd_info *mtd)
-{
- return -1;
-}
+
static void omap3_free_bch(struct mtd_info *mtd)
{
}
@@ -1756,8 +1688,9 @@ static int omap_nand_probe(struct platform_device *pdev)
struct omap_nand_platform_data *pdata;
struct mtd_info *mtd;
struct nand_chip *nand_chip;
+ struct nand_ecclayout *ecclayout;
int err;
- int i, offset;
+ int i;
dma_cap_mask_t mask;
unsigned sig;
struct resource *res;
@@ -1840,6 +1773,13 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_release_mem_region;
}
+ /* check for small page devices */
+ if ((mtd->oobsize < 64) && (pdata->ecc_opt != OMAP_ECC_HAM1_CODE_HW)) {
+ pr_err("small page devices are not supported\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+ }
+
/* re-populate low-level callbacks based on xfer modes */
switch (pdata->xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
@@ -1931,6 +1871,8 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* populate MTD interface based on ECC scheme */
+ nand_chip->ecc.layout = &omap_oobinfo;
+ ecclayout = &omap_oobinfo;
switch (pdata->ecc_opt) {
case OMAP_ECC_HAM1_CODE_HW:
pr_info("nand: using OMAP_ECC_HAM1_CODE_HW\n");
@@ -1941,6 +1883,16 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.calculate = omap_calculate_ecc;
nand_chip->ecc.hwctl = omap_enable_hwecc;
nand_chip->ecc.correct = omap_correct_data;
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ if (nand_chip->options & NAND_BUSWIDTH_16)
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ else
+ ecclayout->eccpos[0] = 1;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
break;
case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
@@ -1953,6 +1905,13 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
nand_chip->ecc.correct = omap3_correct_data_bch;
nand_chip->ecc.calculate = omap3_calculate_ecc_bch4;
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
/* software bch library is used for locating errors */
info->bch = init_bch(nand_chip->ecc.bytes,
nand_chip->ecc.strength,
@@ -1981,6 +1940,13 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.calculate = omap3_calculate_ecc_bch;
nand_chip->ecc.read_page = omap_read_page_bch;
nand_chip->ecc.write_page = omap_write_page_bch;
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
/* This ECC scheme requires ELM H/W block */
if (is_elm_present(info, pdata->elm_of_node, BCH4_ECC) < 0) {
pr_err("nand: error: could not initialize ELM\n");
@@ -2004,6 +1970,13 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
nand_chip->ecc.correct = omap3_correct_data_bch;
nand_chip->ecc.calculate = omap3_calculate_ecc_bch8;
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
/* software bch library is used for locating errors */
info->bch = init_bch(nand_chip->ecc.bytes,
nand_chip->ecc.strength,
@@ -2038,6 +2011,13 @@ static int omap_nand_probe(struct platform_device *pdev)
pr_err("nand: error: could not initialize ELM\n");
goto out_release_mem_region;
}
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
break;
#else
pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
@@ -2051,34 +2031,17 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_release_mem_region;
}
- /* rom code layout */
- if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
-
- if (nand_chip->options & NAND_BUSWIDTH_16) {
- offset = 2;
- } else {
- offset = 1;
- nand_chip->badblock_pattern = &bb_descrip_flashbased;
- }
- omap_oobinfo.eccbytes = 3 * (mtd->writesize / 512);
- for (i = 0; i < omap_oobinfo.eccbytes; i++)
- omap_oobinfo.eccpos[i] = i+offset;
-
- omap_oobinfo.oobfree->offset = offset + omap_oobinfo.eccbytes;
- omap_oobinfo.oobfree->length = mtd->oobsize -
- (offset + omap_oobinfo.eccbytes);
-
- nand_chip->ecc.layout = &omap_oobinfo;
- } else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
- (pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) ||
- (pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) ||
- (pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
- /* build OOB layout for BCH ECC correction */
- err = omap3_init_bch_tail(mtd);
- if (err) {
- err = -EINVAL;
- goto out_release_mem_region;
- }
+ /* populate remaining ECC layout data */
+ ecclayout->oobfree->length = mtd->oobsize - (BADBLOCK_MARKER_LENGTH +
+ ecclayout->eccbytes);
+ for (i = 1; i < ecclayout->eccbytes; i++)
+ ecclayout->eccpos[i] = ecclayout->eccpos[0] + i;
+ /* check if NAND device's OOB is enough to store ECC signatures */
+ if (mtd->oobsize < (ecclayout->eccbytes + BADBLOCK_MARKER_LENGTH)) {
+ pr_err("not enough OOB bytes required = %d, available=%d\n",
+ ecclayout->eccbytes, mtd->oobsize);
+ err = -EINVAL;
+ goto out_release_mem_region;
}
/* second phase scan */
--
1.8.1
--
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^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 06/10] mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
In current implementation omap3_init_bch_tail() is a common function to
define ecc layout for different BCHx ecc schemes.This patch:
(1) removes omap3_init_bch_tail() and defines ecc layout for individual
ecc-schemes along with populating their nand_chip->ecc data in
omap_nand_probe(). This improves the readability and scalability of
code for add new ecc schemes in future.
(2) removes 'struct nand_bbt_descr bb_descrip_flashbased' because default
nand_bbt_descr in nand_bbt.c matches the same (.len=1 for x8 devices).
(3) add the check to see if NAND device has enough OOB/Spare bytes to
store ECC signature of whole page, as defined by ecc-scheme.
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 161 ++++++++++++++++++-----------------------------
1 file changed, 62 insertions(+), 99 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 86ce48b..b6a08b2 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -139,6 +139,7 @@
#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
#define BCH_ECC_SIZE1 0x20 /* ecc_size1 = 32 */
+#define BADBLOCK_MARKER_LENGTH 2
#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
#ifdef CONFIG_MTD_NAND_OMAP_BCH
@@ -149,17 +150,6 @@ static u_char bch4_vector[] = {0x00, 0x6b, 0x31, 0xdd, 0x41, 0xbc, 0x10};
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
-/* Define some generic bad / good block scan pattern which are used
- * while scanning a device for factory marked good / bad blocks
- */
-static uint8_t scan_ff_pattern[] = { 0xff };
-static struct nand_bbt_descr bb_descrip_flashbased = {
- .options = NAND_BBT_SCANALLPAGES,
- .offs = 0,
- .len = 1,
- .pattern = scan_ff_pattern,
-};
-
struct omap_nand_info {
struct nand_hw_control controller;
@@ -184,7 +174,6 @@ struct omap_nand_info {
struct gpmc_nand_regs reg;
/* fields specific for BCHx_HW ECC scheme */
struct bch_control *bch;
- struct nand_ecclayout ecclayout;
bool is_elm_used;
struct device *elm_dev;
struct device_node *of_node;
@@ -1686,65 +1675,8 @@ static void omap3_free_bch(struct mtd_info *mtd)
}
}
-/**
- * omap3_init_bch_tail - Build an oob layout for BCH ECC correction.
- * @mtd: MTD device structure
- */
-static int omap3_init_bch_tail(struct mtd_info *mtd)
-{
- int i, steps, offset;
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
- struct nand_ecclayout *layout = &info->ecclayout;
-
- /* build oob layout */
- steps = mtd->writesize/info->nand.ecc.size;
- layout->eccbytes = steps*info->nand.ecc.bytes;
-
- /* do not bother creating special oob layouts for small page devices */
- if (mtd->oobsize < 64) {
- pr_err("BCH ecc is not supported on small page devices\n");
- goto fail;
- }
-
- /* reserve 2 bytes for bad block marker */
- if (layout->eccbytes+2 > mtd->oobsize) {
- pr_err("no oob layout available for oobsize %d eccbytes %u\n",
- mtd->oobsize, layout->eccbytes);
- goto fail;
- }
-
- /* ECC layout compatible with RBL for BCH8 */
- if (info->is_elm_used && (info->nand.ecc.bytes == BCH8_SIZE))
- offset = 2;
- else
- offset = mtd->oobsize - layout->eccbytes;
-
- /* put ecc bytes at oob tail */
- for (i = 0; i < layout->eccbytes; i++)
- layout->eccpos[i] = offset + i;
-
- if (info->is_elm_used && (info->nand.ecc.bytes == BCH8_SIZE))
- layout->oobfree[0].offset = 2 + layout->eccbytes * steps;
- else
- layout->oobfree[0].offset = 2;
-
- layout->oobfree[0].length = mtd->oobsize-2-layout->eccbytes;
- info->nand.ecc.layout = layout;
-
- if (!(info->nand.options & NAND_BUSWIDTH_16))
- info->nand.badblock_pattern = &bb_descrip_flashbased;
- return 0;
-fail:
- omap3_free_bch(mtd);
- return -1;
-}
-
#else
-static int omap3_init_bch_tail(struct mtd_info *mtd)
-{
- return -1;
-}
+
static void omap3_free_bch(struct mtd_info *mtd)
{
}
@@ -1756,8 +1688,9 @@ static int omap_nand_probe(struct platform_device *pdev)
struct omap_nand_platform_data *pdata;
struct mtd_info *mtd;
struct nand_chip *nand_chip;
+ struct nand_ecclayout *ecclayout;
int err;
- int i, offset;
+ int i;
dma_cap_mask_t mask;
unsigned sig;
struct resource *res;
@@ -1840,6 +1773,13 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_release_mem_region;
}
+ /* check for small page devices */
+ if ((mtd->oobsize < 64) && (pdata->ecc_opt != OMAP_ECC_HAM1_CODE_HW)) {
+ pr_err("small page devices are not supported\n");
+ err = -EINVAL;
+ goto out_release_mem_region;
+ }
+
/* re-populate low-level callbacks based on xfer modes */
switch (pdata->xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
@@ -1931,6 +1871,8 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* populate MTD interface based on ECC scheme */
+ nand_chip->ecc.layout = &omap_oobinfo;
+ ecclayout = &omap_oobinfo;
switch (pdata->ecc_opt) {
case OMAP_ECC_HAM1_CODE_HW:
pr_info("nand: using OMAP_ECC_HAM1_CODE_HW\n");
@@ -1941,6 +1883,16 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.calculate = omap_calculate_ecc;
nand_chip->ecc.hwctl = omap_enable_hwecc;
nand_chip->ecc.correct = omap_correct_data;
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ if (nand_chip->options & NAND_BUSWIDTH_16)
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ else
+ ecclayout->eccpos[0] = 1;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
break;
case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
@@ -1953,6 +1905,13 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
nand_chip->ecc.correct = omap3_correct_data_bch;
nand_chip->ecc.calculate = omap3_calculate_ecc_bch4;
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
/* software bch library is used for locating errors */
info->bch = init_bch(nand_chip->ecc.bytes,
nand_chip->ecc.strength,
@@ -1981,6 +1940,13 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.calculate = omap3_calculate_ecc_bch;
nand_chip->ecc.read_page = omap_read_page_bch;
nand_chip->ecc.write_page = omap_write_page_bch;
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
/* This ECC scheme requires ELM H/W block */
if (is_elm_present(info, pdata->elm_of_node, BCH4_ECC) < 0) {
pr_err("nand: error: could not initialize ELM\n");
@@ -2004,6 +1970,13 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
nand_chip->ecc.correct = omap3_correct_data_bch;
nand_chip->ecc.calculate = omap3_calculate_ecc_bch8;
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
/* software bch library is used for locating errors */
info->bch = init_bch(nand_chip->ecc.bytes,
nand_chip->ecc.strength,
@@ -2038,6 +2011,13 @@ static int omap_nand_probe(struct platform_device *pdev)
pr_err("nand: error: could not initialize ELM\n");
goto out_release_mem_region;
}
+ /* define ECC layout */
+ ecclayout->eccbytes = nand_chip->ecc.bytes *
+ (mtd->writesize /
+ nand_chip->ecc.size);
+ ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
+ ecclayout->oobfree->offset = ecclayout->eccpos[0] +
+ ecclayout->eccbytes;
break;
#else
pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
@@ -2051,34 +2031,17 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_release_mem_region;
}
- /* rom code layout */
- if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
-
- if (nand_chip->options & NAND_BUSWIDTH_16) {
- offset = 2;
- } else {
- offset = 1;
- nand_chip->badblock_pattern = &bb_descrip_flashbased;
- }
- omap_oobinfo.eccbytes = 3 * (mtd->writesize / 512);
- for (i = 0; i < omap_oobinfo.eccbytes; i++)
- omap_oobinfo.eccpos[i] = i+offset;
-
- omap_oobinfo.oobfree->offset = offset + omap_oobinfo.eccbytes;
- omap_oobinfo.oobfree->length = mtd->oobsize -
- (offset + omap_oobinfo.eccbytes);
-
- nand_chip->ecc.layout = &omap_oobinfo;
- } else if ((pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
- (pdata->ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) ||
- (pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) ||
- (pdata->ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {
- /* build OOB layout for BCH ECC correction */
- err = omap3_init_bch_tail(mtd);
- if (err) {
- err = -EINVAL;
- goto out_release_mem_region;
- }
+ /* populate remaining ECC layout data */
+ ecclayout->oobfree->length = mtd->oobsize - (BADBLOCK_MARKER_LENGTH +
+ ecclayout->eccbytes);
+ for (i = 1; i < ecclayout->eccbytes; i++)
+ ecclayout->eccpos[i] = ecclayout->eccpos[0] + i;
+ /* check if NAND device's OOB is enough to store ECC signatures */
+ if (mtd->oobsize < (ecclayout->eccbytes + BADBLOCK_MARKER_LENGTH)) {
+ pr_err("not enough OOB bytes required = %d, available=%d\n",
+ ecclayout->eccbytes, mtd->oobsize);
+ err = -EINVAL;
+ goto out_release_mem_region;
}
/* second phase scan */
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 07/10] mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
generic frame-work in mtd/nand/nand_bch.c is a wrapper above lib/bch.h which
encapsulates all control information specific to BCH ecc algorithm in software.
Thus this patch:
(1) replace omap specific implementations with equivalent wrapper in nand_bch.c
so that generic code from nand_bch.c is re-used. like;
omap3_correct_data_bch() -> nand_bch_correct_data()
omap3_free_bch() -> nand_bch_free()
(2) replace direct calls to lib/bch.c with wrapper functions defined in nand_bch.c
init_bch() -> nand_bch_init()
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 96 +++++++++++-------------------------------------
1 file changed, 22 insertions(+), 74 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index b6a08b2..93aa35c 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -25,7 +25,7 @@
#include <linux/of.h>
#include <linux/of_device.h>
-#include <linux/bch.h>
+#include <linux/mtd/nand_bch.h>
#include <linux/platform_data/elm.h>
#include <linux/platform_data/mtd-nand-omap2.h>
@@ -140,7 +140,6 @@
#define BCH_ECC_SIZE1 0x20 /* ecc_size1 = 32 */
#define BADBLOCK_MARKER_LENGTH 2
-#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
#ifdef CONFIG_MTD_NAND_OMAP_BCH
static u_char bch8_vector[] = {0xf3, 0xdb, 0x14, 0x16, 0x8b, 0xd2, 0xbe, 0xcc,
@@ -173,7 +172,6 @@ struct omap_nand_info {
int buf_len;
struct gpmc_nand_regs reg;
/* fields specific for BCHx_HW ECC scheme */
- struct bch_control *bch;
bool is_elm_used;
struct device *elm_dev;
struct device_node *of_node;
@@ -1507,43 +1505,7 @@ static int omap_elm_correct_data(struct mtd_info *mtd, u_char *data,
return stat;
}
-#endif /* CONFIG_MTD_NAND_OMAP_BCH */
-#ifdef CONFIG_MTD_NAND_ECC_BCH
-/**
- * omap3_correct_data_bch - Decode received data and correct errors
- * @mtd: MTD device structure
- * @data: page data
- * @read_ecc: ecc read from nand flash
- * @calc_ecc: ecc read from HW ECC registers
- */
-static int omap3_correct_data_bch(struct mtd_info *mtd, u_char *data,
- u_char *read_ecc, u_char *calc_ecc)
-{
- int i, count;
- /* cannot correct more than 8 errors */
- unsigned int errloc[8];
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
-
- count = decode_bch(info->bch, NULL, 512, read_ecc, calc_ecc, NULL,
- errloc);
- if (count > 0) {
- /* correct errors */
- for (i = 0; i < count; i++) {
- /* correct data only, not ecc bytes */
- if (errloc[i] < 8*512)
- data[errloc[i]/8] ^= 1 << (errloc[i] & 7);
- pr_debug("corrected bitflip %u\n", errloc[i]);
- }
- } else if (count < 0) {
- pr_err("ecc unrecoverable error\n");
- }
- return count;
-}
-#endif /* CONFIG_MTD_NAND_ECC_BCH */
-
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
/**
* omap_write_page_bch - BCH ecc based write page function for entire page
* @mtd: mtd info structure
@@ -1660,28 +1622,6 @@ static int is_elm_present(struct omap_nand_info *info,
}
#endif /* CONFIG_MTD_NAND_ECC_BCH */
-#ifdef CONFIG_MTD_NAND_ECC_BCH
-/**
- * omap3_free_bch - Release BCH ecc resources
- * @mtd: MTD device structure
- */
-static void omap3_free_bch(struct mtd_info *mtd)
-{
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
- if (info->bch) {
- free_bch(info->bch);
- info->bch = NULL;
- }
-}
-
-#else
-
-static void omap3_free_bch(struct mtd_info *mtd)
-{
-}
-#endif /* CONFIG_MTD_NAND_ECC_BCH */
-
static int omap_nand_probe(struct platform_device *pdev)
{
struct omap_nand_info *info;
@@ -1714,13 +1654,13 @@ static int omap_nand_probe(struct platform_device *pdev)
info->pdev = pdev;
info->gpmc_cs = pdata->cs;
info->reg = pdata->reg;
- info->bch = NULL;
info->of_node = pdata->of_node;
mtd = &info->mtd;
mtd->priv = &info->nand;
mtd->name = dev_name(&pdev->dev);
mtd->owner = THIS_MODULE;
nand_chip = &info->nand;
+ nand_chip->ecc.priv = NULL;
nand_chip->options |= NAND_SKIP_BBTSCAN;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1903,7 +1843,7 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.bytes = 7;
nand_chip->ecc.strength = 4;
nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
- nand_chip->ecc.correct = omap3_correct_data_bch;
+ nand_chip->ecc.correct = nand_bch_correct_data;
nand_chip->ecc.calculate = omap3_calculate_ecc_bch4;
/* define ECC layout */
ecclayout->eccbytes = nand_chip->ecc.bytes *
@@ -1913,10 +1853,11 @@ static int omap_nand_probe(struct platform_device *pdev)
ecclayout->oobfree->offset = ecclayout->eccpos[0] +
ecclayout->eccbytes;
/* software bch library is used for locating errors */
- info->bch = init_bch(nand_chip->ecc.bytes,
- nand_chip->ecc.strength,
- OMAP_ECC_BCH8_POLYNOMIAL);
- if (!info->bch) {
+ nand_chip->ecc.priv = nand_bch_init(mtd,
+ nand_chip->ecc.size,
+ nand_chip->ecc.bytes,
+ &nand_chip->ecc.layout);
+ if (!nand_chip->ecc.priv) {
pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
}
@@ -1968,7 +1909,7 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.bytes = 13;
nand_chip->ecc.strength = 8;
nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
- nand_chip->ecc.correct = omap3_correct_data_bch;
+ nand_chip->ecc.correct = nand_bch_correct_data;
nand_chip->ecc.calculate = omap3_calculate_ecc_bch8;
/* define ECC layout */
ecclayout->eccbytes = nand_chip->ecc.bytes *
@@ -1978,10 +1919,11 @@ static int omap_nand_probe(struct platform_device *pdev)
ecclayout->oobfree->offset = ecclayout->eccpos[0] +
ecclayout->eccbytes;
/* software bch library is used for locating errors */
- info->bch = init_bch(nand_chip->ecc.bytes,
- nand_chip->ecc.strength,
- OMAP_ECC_BCH8_POLYNOMIAL);
- if (!info->bch) {
+ nand_chip->ecc.priv = nand_bch_init(mtd,
+ nand_chip->ecc.size,
+ nand_chip->ecc.bytes,
+ &nand_chip->ecc.layout);
+ if (!nand_chip->ecc.priv) {
pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
goto out_release_mem_region;
@@ -2067,7 +2009,10 @@ out_release_mem_region:
free_irq(info->gpmc_irq_fifo, info);
release_mem_region(info->phys_base, info->mem_size);
out_free_info:
- omap3_free_bch(mtd);
+ if (nand_chip->ecc.priv) {
+ nand_bch_free(nand_chip->ecc.priv);
+ nand_chip->ecc.priv = NULL;
+ }
kfree(info);
return err;
@@ -2079,7 +2024,10 @@ static int omap_nand_remove(struct platform_device *pdev)
struct nand_chip *nand_chip = mtd->priv;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
- omap3_free_bch(mtd);
+ if (nand_chip->ecc.priv) {
+ nand_bch_free(nand_chip->ecc.priv);
+ nand_chip->ecc.priv = NULL;
+ }
if (info->dma)
dma_release_channel(info->dma);
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 07/10] mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
generic frame-work in mtd/nand/nand_bch.c is a wrapper above lib/bch.h which
encapsulates all control information specific to BCH ecc algorithm in software.
Thus this patch:
(1) replace omap specific implementations with equivalent wrapper in nand_bch.c
so that generic code from nand_bch.c is re-used. like;
omap3_correct_data_bch() -> nand_bch_correct_data()
omap3_free_bch() -> nand_bch_free()
(2) replace direct calls to lib/bch.c with wrapper functions defined in nand_bch.c
init_bch() -> nand_bch_init()
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 96 +++++++++++-------------------------------------
1 file changed, 22 insertions(+), 74 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index b6a08b2..93aa35c 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -25,7 +25,7 @@
#include <linux/of.h>
#include <linux/of_device.h>
-#include <linux/bch.h>
+#include <linux/mtd/nand_bch.h>
#include <linux/platform_data/elm.h>
#include <linux/platform_data/mtd-nand-omap2.h>
@@ -140,7 +140,6 @@
#define BCH_ECC_SIZE1 0x20 /* ecc_size1 = 32 */
#define BADBLOCK_MARKER_LENGTH 2
-#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
#ifdef CONFIG_MTD_NAND_OMAP_BCH
static u_char bch8_vector[] = {0xf3, 0xdb, 0x14, 0x16, 0x8b, 0xd2, 0xbe, 0xcc,
@@ -173,7 +172,6 @@ struct omap_nand_info {
int buf_len;
struct gpmc_nand_regs reg;
/* fields specific for BCHx_HW ECC scheme */
- struct bch_control *bch;
bool is_elm_used;
struct device *elm_dev;
struct device_node *of_node;
@@ -1507,43 +1505,7 @@ static int omap_elm_correct_data(struct mtd_info *mtd, u_char *data,
return stat;
}
-#endif /* CONFIG_MTD_NAND_OMAP_BCH */
-#ifdef CONFIG_MTD_NAND_ECC_BCH
-/**
- * omap3_correct_data_bch - Decode received data and correct errors
- * @mtd: MTD device structure
- * @data: page data
- * @read_ecc: ecc read from nand flash
- * @calc_ecc: ecc read from HW ECC registers
- */
-static int omap3_correct_data_bch(struct mtd_info *mtd, u_char *data,
- u_char *read_ecc, u_char *calc_ecc)
-{
- int i, count;
- /* cannot correct more than 8 errors */
- unsigned int errloc[8];
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
-
- count = decode_bch(info->bch, NULL, 512, read_ecc, calc_ecc, NULL,
- errloc);
- if (count > 0) {
- /* correct errors */
- for (i = 0; i < count; i++) {
- /* correct data only, not ecc bytes */
- if (errloc[i] < 8*512)
- data[errloc[i]/8] ^= 1 << (errloc[i] & 7);
- pr_debug("corrected bitflip %u\n", errloc[i]);
- }
- } else if (count < 0) {
- pr_err("ecc unrecoverable error\n");
- }
- return count;
-}
-#endif /* CONFIG_MTD_NAND_ECC_BCH */
-
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
/**
* omap_write_page_bch - BCH ecc based write page function for entire page
* @mtd: mtd info structure
@@ -1660,28 +1622,6 @@ static int is_elm_present(struct omap_nand_info *info,
}
#endif /* CONFIG_MTD_NAND_ECC_BCH */
-#ifdef CONFIG_MTD_NAND_ECC_BCH
-/**
- * omap3_free_bch - Release BCH ecc resources
- * @mtd: MTD device structure
- */
-static void omap3_free_bch(struct mtd_info *mtd)
-{
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
- if (info->bch) {
- free_bch(info->bch);
- info->bch = NULL;
- }
-}
-
-#else
-
-static void omap3_free_bch(struct mtd_info *mtd)
-{
-}
-#endif /* CONFIG_MTD_NAND_ECC_BCH */
-
static int omap_nand_probe(struct platform_device *pdev)
{
struct omap_nand_info *info;
@@ -1714,13 +1654,13 @@ static int omap_nand_probe(struct platform_device *pdev)
info->pdev = pdev;
info->gpmc_cs = pdata->cs;
info->reg = pdata->reg;
- info->bch = NULL;
info->of_node = pdata->of_node;
mtd = &info->mtd;
mtd->priv = &info->nand;
mtd->name = dev_name(&pdev->dev);
mtd->owner = THIS_MODULE;
nand_chip = &info->nand;
+ nand_chip->ecc.priv = NULL;
nand_chip->options |= NAND_SKIP_BBTSCAN;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1903,7 +1843,7 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.bytes = 7;
nand_chip->ecc.strength = 4;
nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
- nand_chip->ecc.correct = omap3_correct_data_bch;
+ nand_chip->ecc.correct = nand_bch_correct_data;
nand_chip->ecc.calculate = omap3_calculate_ecc_bch4;
/* define ECC layout */
ecclayout->eccbytes = nand_chip->ecc.bytes *
@@ -1913,10 +1853,11 @@ static int omap_nand_probe(struct platform_device *pdev)
ecclayout->oobfree->offset = ecclayout->eccpos[0] +
ecclayout->eccbytes;
/* software bch library is used for locating errors */
- info->bch = init_bch(nand_chip->ecc.bytes,
- nand_chip->ecc.strength,
- OMAP_ECC_BCH8_POLYNOMIAL);
- if (!info->bch) {
+ nand_chip->ecc.priv = nand_bch_init(mtd,
+ nand_chip->ecc.size,
+ nand_chip->ecc.bytes,
+ &nand_chip->ecc.layout);
+ if (!nand_chip->ecc.priv) {
pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
}
@@ -1968,7 +1909,7 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.bytes = 13;
nand_chip->ecc.strength = 8;
nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
- nand_chip->ecc.correct = omap3_correct_data_bch;
+ nand_chip->ecc.correct = nand_bch_correct_data;
nand_chip->ecc.calculate = omap3_calculate_ecc_bch8;
/* define ECC layout */
ecclayout->eccbytes = nand_chip->ecc.bytes *
@@ -1978,10 +1919,11 @@ static int omap_nand_probe(struct platform_device *pdev)
ecclayout->oobfree->offset = ecclayout->eccpos[0] +
ecclayout->eccbytes;
/* software bch library is used for locating errors */
- info->bch = init_bch(nand_chip->ecc.bytes,
- nand_chip->ecc.strength,
- OMAP_ECC_BCH8_POLYNOMIAL);
- if (!info->bch) {
+ nand_chip->ecc.priv = nand_bch_init(mtd,
+ nand_chip->ecc.size,
+ nand_chip->ecc.bytes,
+ &nand_chip->ecc.layout);
+ if (!nand_chip->ecc.priv) {
pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
goto out_release_mem_region;
@@ -2067,7 +2009,10 @@ out_release_mem_region:
free_irq(info->gpmc_irq_fifo, info);
release_mem_region(info->phys_base, info->mem_size);
out_free_info:
- omap3_free_bch(mtd);
+ if (nand_chip->ecc.priv) {
+ nand_bch_free(nand_chip->ecc.priv);
+ nand_chip->ecc.priv = NULL;
+ }
kfree(info);
return err;
@@ -2079,7 +2024,10 @@ static int omap_nand_remove(struct platform_device *pdev)
struct nand_chip *nand_chip = mtd->priv;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
- omap3_free_bch(mtd);
+ if (nand_chip->ecc.priv) {
+ nand_bch_free(nand_chip->ecc.priv);
+ nand_chip->ecc.priv = NULL;
+ }
if (info->dma)
dma_release_channel(info->dma);
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 08/10] ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
Updated DTS to replace deprecated binding with newer values
Refer: Documentation/devicetree/bindings/mtd/gpmc-nand.txt
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/boot/dts/am335x-evm.dts | 3 +--
arch/arm/boot/dts/omap3430-sdp.dts | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index e8ec875..1aee6ac 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -269,7 +269,6 @@
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
- gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
@@ -296,7 +295,7 @@
#address-cells = <1>;
#size-cells = <1>;
- elm_id = <&elm>;
+ ti,elm-id = <&elm>;
/* MTD partition table */
partition@0 {
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index e2249bc..501f863 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -105,7 +105,7 @@
reg = <1 0 0x08000000>;
nand-bus-width = <8>;
- ti,nand-ecc-opt = "sw";
+ ti,nand-ecc-opt = "ham1";
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <36>;
gpmc,cs-wr-off-ns = <36>;
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 08/10] ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
Updated DTS to replace deprecated binding with newer values
Refer: Documentation/devicetree/bindings/mtd/gpmc-nand.txt
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
---
arch/arm/boot/dts/am335x-evm.dts | 3 +--
arch/arm/boot/dts/omap3430-sdp.dts | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index e8ec875..1aee6ac 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -269,7 +269,6 @@
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
- gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
@@ -296,7 +295,7 @@
#address-cells = <1>;
#size-cells = <1>;
- elm_id = <&elm>;
+ ti,elm-id = <&elm>;
/* MTD partition table */
partition@0 {
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index e2249bc..501f863 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -105,7 +105,7 @@
reg = <1 0 0x08000000>;
nand-bus-width = <8>;
- ti,nand-ecc-opt = "sw";
+ ti,nand-ecc-opt = "ham1";
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <36>;
gpmc,cs-wr-off-ns = <36>;
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 09/10] mtd: nand: omap: updated devm_xx for all resource allocation and free calls
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: robherring2, Pawel.Moll, ijc+devicetree, swarren, dwmw2, arnd,
tony, bcousson, avinashphilipk, balbi, linux-mtd, linux-omap,
devicetree, jp.francois, ivan.djelic, Pekon Gupta
"Managed Device Resource" or devm_xx calls takes care of automatic freeing
of the resource in case of:
- failure during driver probe
- failure during resource allocation
- detaching or unloading of driver module (rmmod)
Reference: Documentation/driver-model/devres.txt
Though OMAP NAND driver handles freeing of resource allocation in most of
the cases, but using devm_xx provides more clean and effortless approach
to handle all such cases.
- simplifies label for exiting probe during error
s/out_release_mem_region/return_error
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 85 ++++++++++++++++++++----------------------------
1 file changed, 35 insertions(+), 50 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 93aa35c..ec40b8d 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1642,7 +1642,8 @@ static int omap_nand_probe(struct platform_device *pdev)
return -ENODEV;
}
- info = kzalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
+ info = devm_kzalloc(&pdev->dev, sizeof(struct omap_nand_info),
+ GFP_KERNEL);
if (!info)
return -ENOMEM;
@@ -1667,22 +1668,23 @@ static int omap_nand_probe(struct platform_device *pdev)
if (res == NULL) {
err = -EINVAL;
dev_err(&pdev->dev, "error getting memory resource\n");
- goto out_free_info;
+ goto return_error;
}
info->phys_base = res->start;
info->mem_size = resource_size(res);
- if (!request_mem_region(info->phys_base, info->mem_size,
- pdev->dev.driver->name)) {
+ if (!devm_request_mem_region(&pdev->dev, info->phys_base,
+ info->mem_size, pdev->dev.driver->name)) {
err = -EBUSY;
- goto out_free_info;
+ goto return_error;
}
- nand_chip->IO_ADDR_R = ioremap(info->phys_base, info->mem_size);
+ nand_chip->IO_ADDR_R = devm_ioremap(&pdev->dev, info->phys_base,
+ info->mem_size);
if (!nand_chip->IO_ADDR_R) {
err = -ENOMEM;
- goto out_release_mem_region;
+ goto return_error;
}
nand_chip->controller = &info->controller;
@@ -1710,14 +1712,14 @@ static int omap_nand_probe(struct platform_device *pdev)
if (nand_scan_ident(mtd, 1, NULL)) {
pr_err("nand device scan failed, may be bus-width mismatch\n");
err = -ENXIO;
- goto out_release_mem_region;
+ goto return_error;
}
/* check for small page devices */
if ((mtd->oobsize < 64) && (pdata->ecc_opt != OMAP_ECC_HAM1_CODE_HW)) {
pr_err("small page devices are not supported\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
/* re-populate low-level callbacks based on xfer modes */
@@ -1745,7 +1747,7 @@ static int omap_nand_probe(struct platform_device *pdev)
if (!info->dma) {
dev_err(&pdev->dev, "DMA engine request failed\n");
err = -ENXIO;
- goto out_release_mem_region;
+ goto return_error;
} else {
struct dma_slave_config cfg;
@@ -1760,7 +1762,7 @@ static int omap_nand_probe(struct platform_device *pdev)
if (err) {
dev_err(&pdev->dev, "DMA engine slave config failed: %d\n",
err);
- goto out_release_mem_region;
+ goto return_error;
}
nand_chip->read_buf = omap_read_buf_dma_pref;
nand_chip->write_buf = omap_write_buf_dma_pref;
@@ -1772,30 +1774,32 @@ static int omap_nand_probe(struct platform_device *pdev)
if (info->gpmc_irq_fifo <= 0) {
dev_err(&pdev->dev, "error getting fifo irq\n");
err = -ENODEV;
- goto out_release_mem_region;
+ goto return_error;
}
- err = request_irq(info->gpmc_irq_fifo, omap_nand_irq,
- IRQF_SHARED, "gpmc-nand-fifo", info);
+ err = devm_request_irq(&pdev->dev, info->gpmc_irq_fifo,
+ omap_nand_irq, IRQF_SHARED,
+ "gpmc-nand-fifo", info);
if (err) {
dev_err(&pdev->dev, "requesting irq(%d) error:%d",
info->gpmc_irq_fifo, err);
info->gpmc_irq_fifo = 0;
- goto out_release_mem_region;
+ goto return_error;
}
info->gpmc_irq_count = platform_get_irq(pdev, 1);
if (info->gpmc_irq_count <= 0) {
dev_err(&pdev->dev, "error getting count irq\n");
err = -ENODEV;
- goto out_release_mem_region;
+ goto return_error;
}
- err = request_irq(info->gpmc_irq_count, omap_nand_irq,
- IRQF_SHARED, "gpmc-nand-count", info);
+ err = devm_request_irq(&pdev->dev, info->gpmc_irq_count,
+ omap_nand_irq, IRQF_SHARED,
+ "gpmc-nand-count", info);
if (err) {
dev_err(&pdev->dev, "requesting irq(%d) error:%d",
info->gpmc_irq_count, err);
info->gpmc_irq_count = 0;
- goto out_release_mem_region;
+ goto return_error;
}
nand_chip->read_buf = omap_read_buf_irq_pref;
@@ -1807,7 +1811,7 @@ static int omap_nand_probe(struct platform_device *pdev)
dev_err(&pdev->dev,
"xfer_type(%d) not supported!\n", pdata->xfer_type);
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
/* populate MTD interface based on ECC scheme */
@@ -1865,7 +1869,7 @@ static int omap_nand_probe(struct platform_device *pdev)
#else
pr_err("nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
#endif
case OMAP_ECC_BCH4_CODE_HW:
@@ -1892,13 +1896,13 @@ static int omap_nand_probe(struct platform_device *pdev)
if (is_elm_present(info, pdata->elm_of_node, BCH4_ECC) < 0) {
pr_err("nand: error: could not initialize ELM\n");
err = -ENODEV;
- goto out_release_mem_region;
+ goto return_error;
}
break;
#else
pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
#endif
case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
@@ -1926,13 +1930,13 @@ static int omap_nand_probe(struct platform_device *pdev)
if (!nand_chip->ecc.priv) {
pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
break;
#else
pr_err("nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
#endif
case OMAP_ECC_BCH8_CODE_HW:
@@ -1951,7 +1955,7 @@ static int omap_nand_probe(struct platform_device *pdev)
/* This ECC scheme requires ELM H/W block */
if (is_elm_present(info, pdata->elm_of_node, BCH8_ECC) < 0) {
pr_err("nand: error: could not initialize ELM\n");
- goto out_release_mem_region;
+ goto return_error;
}
/* define ECC layout */
ecclayout->eccbytes = nand_chip->ecc.bytes *
@@ -1964,13 +1968,13 @@ static int omap_nand_probe(struct platform_device *pdev)
#else
pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
#endif
default:
pr_err("nand: error: invalid or unsupported ECC scheme\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
/* populate remaining ECC layout data */
@@ -1983,13 +1987,13 @@ static int omap_nand_probe(struct platform_device *pdev)
pr_err("not enough OOB bytes required = %d, available=%d\n",
ecclayout->eccbytes, mtd->oobsize);
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
/* second phase scan */
if (nand_scan_tail(mtd)) {
err = -ENXIO;
- goto out_release_mem_region;
+ goto return_error;
}
ppdata.of_node = pdata->of_node;
@@ -2000,21 +2004,13 @@ static int omap_nand_probe(struct platform_device *pdev)
return 0;
-out_release_mem_region:
+return_error:
if (info->dma)
dma_release_channel(info->dma);
- if (info->gpmc_irq_count > 0)
- free_irq(info->gpmc_irq_count, info);
- if (info->gpmc_irq_fifo > 0)
- free_irq(info->gpmc_irq_fifo, info);
- release_mem_region(info->phys_base, info->mem_size);
-out_free_info:
if (nand_chip->ecc.priv) {
nand_bch_free(nand_chip->ecc.priv);
nand_chip->ecc.priv = NULL;
}
- kfree(info);
-
return err;
}
@@ -2028,20 +2024,9 @@ static int omap_nand_remove(struct platform_device *pdev)
nand_bch_free(nand_chip->ecc.priv);
nand_chip->ecc.priv = NULL;
}
-
if (info->dma)
dma_release_channel(info->dma);
-
- if (info->gpmc_irq_count > 0)
- free_irq(info->gpmc_irq_count, info);
- if (info->gpmc_irq_fifo > 0)
- free_irq(info->gpmc_irq_fifo, info);
-
- /* Release NAND device, its internal structures and partitions */
nand_release(mtd);
- iounmap(nand_chip->IO_ADDR_R);
- release_mem_region(info->phys_base, info->mem_size);
- kfree(info);
return 0;
}
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 09/10] mtd: nand: omap: updated devm_xx for all resource allocation and free calls
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
"Managed Device Resource" or devm_xx calls takes care of automatic freeing
of the resource in case of:
- failure during driver probe
- failure during resource allocation
- detaching or unloading of driver module (rmmod)
Reference: Documentation/driver-model/devres.txt
Though OMAP NAND driver handles freeing of resource allocation in most of
the cases, but using devm_xx provides more clean and effortless approach
to handle all such cases.
- simplifies label for exiting probe during error
s/out_release_mem_region/return_error
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/omap2.c | 85 ++++++++++++++++++++----------------------------
1 file changed, 35 insertions(+), 50 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 93aa35c..ec40b8d 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1642,7 +1642,8 @@ static int omap_nand_probe(struct platform_device *pdev)
return -ENODEV;
}
- info = kzalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
+ info = devm_kzalloc(&pdev->dev, sizeof(struct omap_nand_info),
+ GFP_KERNEL);
if (!info)
return -ENOMEM;
@@ -1667,22 +1668,23 @@ static int omap_nand_probe(struct platform_device *pdev)
if (res == NULL) {
err = -EINVAL;
dev_err(&pdev->dev, "error getting memory resource\n");
- goto out_free_info;
+ goto return_error;
}
info->phys_base = res->start;
info->mem_size = resource_size(res);
- if (!request_mem_region(info->phys_base, info->mem_size,
- pdev->dev.driver->name)) {
+ if (!devm_request_mem_region(&pdev->dev, info->phys_base,
+ info->mem_size, pdev->dev.driver->name)) {
err = -EBUSY;
- goto out_free_info;
+ goto return_error;
}
- nand_chip->IO_ADDR_R = ioremap(info->phys_base, info->mem_size);
+ nand_chip->IO_ADDR_R = devm_ioremap(&pdev->dev, info->phys_base,
+ info->mem_size);
if (!nand_chip->IO_ADDR_R) {
err = -ENOMEM;
- goto out_release_mem_region;
+ goto return_error;
}
nand_chip->controller = &info->controller;
@@ -1710,14 +1712,14 @@ static int omap_nand_probe(struct platform_device *pdev)
if (nand_scan_ident(mtd, 1, NULL)) {
pr_err("nand device scan failed, may be bus-width mismatch\n");
err = -ENXIO;
- goto out_release_mem_region;
+ goto return_error;
}
/* check for small page devices */
if ((mtd->oobsize < 64) && (pdata->ecc_opt != OMAP_ECC_HAM1_CODE_HW)) {
pr_err("small page devices are not supported\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
/* re-populate low-level callbacks based on xfer modes */
@@ -1745,7 +1747,7 @@ static int omap_nand_probe(struct platform_device *pdev)
if (!info->dma) {
dev_err(&pdev->dev, "DMA engine request failed\n");
err = -ENXIO;
- goto out_release_mem_region;
+ goto return_error;
} else {
struct dma_slave_config cfg;
@@ -1760,7 +1762,7 @@ static int omap_nand_probe(struct platform_device *pdev)
if (err) {
dev_err(&pdev->dev, "DMA engine slave config failed: %d\n",
err);
- goto out_release_mem_region;
+ goto return_error;
}
nand_chip->read_buf = omap_read_buf_dma_pref;
nand_chip->write_buf = omap_write_buf_dma_pref;
@@ -1772,30 +1774,32 @@ static int omap_nand_probe(struct platform_device *pdev)
if (info->gpmc_irq_fifo <= 0) {
dev_err(&pdev->dev, "error getting fifo irq\n");
err = -ENODEV;
- goto out_release_mem_region;
+ goto return_error;
}
- err = request_irq(info->gpmc_irq_fifo, omap_nand_irq,
- IRQF_SHARED, "gpmc-nand-fifo", info);
+ err = devm_request_irq(&pdev->dev, info->gpmc_irq_fifo,
+ omap_nand_irq, IRQF_SHARED,
+ "gpmc-nand-fifo", info);
if (err) {
dev_err(&pdev->dev, "requesting irq(%d) error:%d",
info->gpmc_irq_fifo, err);
info->gpmc_irq_fifo = 0;
- goto out_release_mem_region;
+ goto return_error;
}
info->gpmc_irq_count = platform_get_irq(pdev, 1);
if (info->gpmc_irq_count <= 0) {
dev_err(&pdev->dev, "error getting count irq\n");
err = -ENODEV;
- goto out_release_mem_region;
+ goto return_error;
}
- err = request_irq(info->gpmc_irq_count, omap_nand_irq,
- IRQF_SHARED, "gpmc-nand-count", info);
+ err = devm_request_irq(&pdev->dev, info->gpmc_irq_count,
+ omap_nand_irq, IRQF_SHARED,
+ "gpmc-nand-count", info);
if (err) {
dev_err(&pdev->dev, "requesting irq(%d) error:%d",
info->gpmc_irq_count, err);
info->gpmc_irq_count = 0;
- goto out_release_mem_region;
+ goto return_error;
}
nand_chip->read_buf = omap_read_buf_irq_pref;
@@ -1807,7 +1811,7 @@ static int omap_nand_probe(struct platform_device *pdev)
dev_err(&pdev->dev,
"xfer_type(%d) not supported!\n", pdata->xfer_type);
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
/* populate MTD interface based on ECC scheme */
@@ -1865,7 +1869,7 @@ static int omap_nand_probe(struct platform_device *pdev)
#else
pr_err("nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
#endif
case OMAP_ECC_BCH4_CODE_HW:
@@ -1892,13 +1896,13 @@ static int omap_nand_probe(struct platform_device *pdev)
if (is_elm_present(info, pdata->elm_of_node, BCH4_ECC) < 0) {
pr_err("nand: error: could not initialize ELM\n");
err = -ENODEV;
- goto out_release_mem_region;
+ goto return_error;
}
break;
#else
pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
#endif
case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
@@ -1926,13 +1930,13 @@ static int omap_nand_probe(struct platform_device *pdev)
if (!nand_chip->ecc.priv) {
pr_err("nand: error: unable to use s/w BCH library\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
break;
#else
pr_err("nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
#endif
case OMAP_ECC_BCH8_CODE_HW:
@@ -1951,7 +1955,7 @@ static int omap_nand_probe(struct platform_device *pdev)
/* This ECC scheme requires ELM H/W block */
if (is_elm_present(info, pdata->elm_of_node, BCH8_ECC) < 0) {
pr_err("nand: error: could not initialize ELM\n");
- goto out_release_mem_region;
+ goto return_error;
}
/* define ECC layout */
ecclayout->eccbytes = nand_chip->ecc.bytes *
@@ -1964,13 +1968,13 @@ static int omap_nand_probe(struct platform_device *pdev)
#else
pr_err("nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
#endif
default:
pr_err("nand: error: invalid or unsupported ECC scheme\n");
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
/* populate remaining ECC layout data */
@@ -1983,13 +1987,13 @@ static int omap_nand_probe(struct platform_device *pdev)
pr_err("not enough OOB bytes required = %d, available=%d\n",
ecclayout->eccbytes, mtd->oobsize);
err = -EINVAL;
- goto out_release_mem_region;
+ goto return_error;
}
/* second phase scan */
if (nand_scan_tail(mtd)) {
err = -ENXIO;
- goto out_release_mem_region;
+ goto return_error;
}
ppdata.of_node = pdata->of_node;
@@ -2000,21 +2004,13 @@ static int omap_nand_probe(struct platform_device *pdev)
return 0;
-out_release_mem_region:
+return_error:
if (info->dma)
dma_release_channel(info->dma);
- if (info->gpmc_irq_count > 0)
- free_irq(info->gpmc_irq_count, info);
- if (info->gpmc_irq_fifo > 0)
- free_irq(info->gpmc_irq_fifo, info);
- release_mem_region(info->phys_base, info->mem_size);
-out_free_info:
if (nand_chip->ecc.priv) {
nand_bch_free(nand_chip->ecc.priv);
nand_chip->ecc.priv = NULL;
}
- kfree(info);
-
return err;
}
@@ -2028,20 +2024,9 @@ static int omap_nand_remove(struct platform_device *pdev)
nand_bch_free(nand_chip->ecc.priv);
nand_chip->ecc.priv = NULL;
}
-
if (info->dma)
dma_release_channel(info->dma);
-
- if (info->gpmc_irq_count > 0)
- free_irq(info->gpmc_irq_count, info);
- if (info->gpmc_irq_fifo > 0)
- free_irq(info->gpmc_irq_fifo, info);
-
- /* Release NAND device, its internal structures and partitions */
nand_release(mtd);
- iounmap(nand_chip->IO_ADDR_R);
- release_mem_region(info->phys_base, info->mem_size);
- kfree(info);
return 0;
}
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 10/10] mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 12:50 ` Pekon Gupta
-1 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland-5wv7dgnIgG8, olof-nZhT3qVonbNeoWH0uzbU5w,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
dedekind1-Re5JQEeQqe8AvxtiuMwx3w
Cc: robherring2-Re5JQEeQqe8AvxtiuMwx3w, Pawel.Moll-5wv7dgnIgG8,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
swarren-3lzwWm7+Weoh9ZMKESR00Q, dwmw2-wEGCiKHe2LqWVfeAwA7xHQ,
arnd-r2nGTMty4D4, tony-4v6yS6AI5VpBDgjK7y7TUQ,
bcousson-rdvid1DuHRBWk0Htik3J/w,
avinashphilipk-Re5JQEeQqe8AvxtiuMwx3w, balbi-l0cyMroinI0,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
jp.francois-JOfcSVQZ0GHQT0dZR+AlfA,
ivan.djelic-ITF29qwbsa/QT0dZR+AlfA, Pekon Gupta
With OMAP NAND driver updates, selection of ecc-scheme:
*DT enabled kernel*
depends on ti,nand-ecc-opt and ti,elm-id DT bindings.
*Non DT enabled kernel*
depends on elm_dev and ecc-scheme passed along with platform-data
from board file.
So, selection of ecc-scheme (BCH8 or BCH4) from KConfig can be removed
Signed-off-by: Pekon Gupta <pekon-l0cyMroinI0@public.gmane.org>
---
drivers/mtd/nand/Kconfig | 40 ++++++----------------------------------
1 file changed, 6 insertions(+), 34 deletions(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index d885298..93ae6a6 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -96,43 +96,15 @@ config MTD_NAND_OMAP2
config MTD_NAND_OMAP_BCH
depends on MTD_NAND && MTD_NAND_OMAP2 && ARCH_OMAP3
- tristate "Enable support for hardware BCH error correction"
+ tristate "Support hardware based BCH error correction"
default n
select BCH
- select BCH_CONST_PARAMS
help
- Support for hardware BCH error correction.
-
-choice
- prompt "BCH error correction capability"
- depends on MTD_NAND_OMAP_BCH
-
-config MTD_NAND_OMAP_BCH8
- bool "8 bits / 512 bytes (recommended)"
- help
- Support correcting up to 8 bitflips per 512-byte block.
- This will use 13 bytes of spare area per 512 bytes of page data.
- This is the recommended mode, as 4-bit mode does not work
- on some OMAP3 revisions, due to a hardware bug.
-
-config MTD_NAND_OMAP_BCH4
- bool "4 bits / 512 bytes"
- help
- Support correcting up to 4 bitflips per 512-byte block.
- This will use 7 bytes of spare area per 512 bytes of page data.
- Note that this mode does not work on some OMAP3 revisions, due to a
- hardware bug. Please check your OMAP datasheet before selecting this
- mode.
-
-endchoice
-
-if MTD_NAND_OMAP_BCH
-config BCH_CONST_M
- default 13
-config BCH_CONST_T
- default 4 if MTD_NAND_OMAP_BCH4
- default 8 if MTD_NAND_OMAP_BCH8
-endif
+ This config enables the ELM hardware engine, which can be used to
+ locate and correct errors when using BCH ECC scheme. This offloads
+ the cpu from doing ECC error searching and correction. However some
+ legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine
+ so they should not enable this config symbol.
config MTD_NAND_IDS
tristate
--
1.8.1
--
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^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v11 10/10] mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig
@ 2013-10-24 12:50 ` Pekon Gupta
0 siblings, 0 replies; 42+ messages in thread
From: Pekon Gupta @ 2013-10-24 12:50 UTC (permalink / raw)
To: mark.rutland, olof, computersforpeace, dedekind1
Cc: devicetree, Pawel.Moll, arnd, swarren, tony, jp.francois,
ijc+devicetree, avinashphilipk, balbi, robherring2, Pekon Gupta,
bcousson, linux-mtd, ivan.djelic, linux-omap, dwmw2
With OMAP NAND driver updates, selection of ecc-scheme:
*DT enabled kernel*
depends on ti,nand-ecc-opt and ti,elm-id DT bindings.
*Non DT enabled kernel*
depends on elm_dev and ecc-scheme passed along with platform-data
from board file.
So, selection of ecc-scheme (BCH8 or BCH4) from KConfig can be removed
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
drivers/mtd/nand/Kconfig | 40 ++++++----------------------------------
1 file changed, 6 insertions(+), 34 deletions(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index d885298..93ae6a6 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -96,43 +96,15 @@ config MTD_NAND_OMAP2
config MTD_NAND_OMAP_BCH
depends on MTD_NAND && MTD_NAND_OMAP2 && ARCH_OMAP3
- tristate "Enable support for hardware BCH error correction"
+ tristate "Support hardware based BCH error correction"
default n
select BCH
- select BCH_CONST_PARAMS
help
- Support for hardware BCH error correction.
-
-choice
- prompt "BCH error correction capability"
- depends on MTD_NAND_OMAP_BCH
-
-config MTD_NAND_OMAP_BCH8
- bool "8 bits / 512 bytes (recommended)"
- help
- Support correcting up to 8 bitflips per 512-byte block.
- This will use 13 bytes of spare area per 512 bytes of page data.
- This is the recommended mode, as 4-bit mode does not work
- on some OMAP3 revisions, due to a hardware bug.
-
-config MTD_NAND_OMAP_BCH4
- bool "4 bits / 512 bytes"
- help
- Support correcting up to 4 bitflips per 512-byte block.
- This will use 7 bytes of spare area per 512 bytes of page data.
- Note that this mode does not work on some OMAP3 revisions, due to a
- hardware bug. Please check your OMAP datasheet before selecting this
- mode.
-
-endchoice
-
-if MTD_NAND_OMAP_BCH
-config BCH_CONST_M
- default 13
-config BCH_CONST_T
- default 4 if MTD_NAND_OMAP_BCH4
- default 8 if MTD_NAND_OMAP_BCH8
-endif
+ This config enables the ELM hardware engine, which can be used to
+ locate and correct errors when using BCH ECC scheme. This offloads
+ the cpu from doing ECC error searching and correction. However some
+ legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine
+ so they should not enable this config symbol.
config MTD_NAND_IDS
tristate
--
1.8.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 13:52 ` Ezequiel Garcia
-1 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-24 13:52 UTC (permalink / raw)
To: Pekon Gupta
Cc: mark.rutland, olof, computersforpeace, dedekind1, devicetree,
Pawel.Moll, arnd, swarren, tony, jp.francois, ijc+devicetree,
avinashphilipk, balbi, robherring2, bcousson, linux-mtd,
ivan.djelic, linux-omap, dwmw2
Hi Pekon,
Just as suggestion, I think you should reconsider your 'upstream strategy'.
On Thu, Oct 24, 2013 at 06:20:16PM +0530, Pekon Gupta wrote:
[..]
>
> Pekon Gupta (10):
> ARM: OMAP2+: cleaned-up DT support of various ECC schemes
> mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
> mtd: nand: omap: cleanup: replace local references with generic framework names
IMHO, this patch about the dobule nand_scan_ident():
> mtd: nand: omap: use DT specified bus-width only for scanning NAND device
is a fix unrelated to this series and can be pushed independently.
Maybe you can try to send it as a one-patch fix?
> mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe
> mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
> mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c
> ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
And also this patch:
> mtd: nand: omap: updated devm_xx for all resource allocation and free calls
doesn't seem to belong to this series.
I think tou could send those two independently and ask Brian to merge them earlier
if appropriate.
But again, this is just a suggestion.
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-10-24 13:52 ` Ezequiel Garcia
0 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-24 13:52 UTC (permalink / raw)
To: Pekon Gupta
Cc: mark.rutland, devicetree, ijc+devicetree, linux-omap, arnd,
Pawel.Moll, dedekind1, tony, avinashphilipk, swarren,
jp.francois, balbi, robherring2, bcousson, olof, linux-mtd,
ivan.djelic, computersforpeace, dwmw2
Hi Pekon,
Just as suggestion, I think you should reconsider your 'upstream strategy'.
On Thu, Oct 24, 2013 at 06:20:16PM +0530, Pekon Gupta wrote:
[..]
>
> Pekon Gupta (10):
> ARM: OMAP2+: cleaned-up DT support of various ECC schemes
> mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
> mtd: nand: omap: cleanup: replace local references with generic framework names
IMHO, this patch about the dobule nand_scan_ident():
> mtd: nand: omap: use DT specified bus-width only for scanning NAND device
is a fix unrelated to this series and can be pushed independently.
Maybe you can try to send it as a one-patch fix?
> mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe
> mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
> mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c
> ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
And also this patch:
> mtd: nand: omap: updated devm_xx for all resource allocation and free calls
doesn't seem to belong to this series.
I think tou could send those two independently and ask Brian to merge them earlier
if appropriate.
But again, this is just a suggestion.
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-24 21:27 ` Ezequiel Garcia
-1 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-24 21:27 UTC (permalink / raw)
To: Pekon Gupta
Cc: mark.rutland, olof, computersforpeace, dedekind1, devicetree,
Pawel.Moll, arnd, swarren, tony, jp.francois, ijc+devicetree,
avinashphilipk, balbi, robherring2, bcousson, linux-mtd,
ivan.djelic, linux-omap, dwmw2
On Thu, Oct 24, 2013 at 06:20:20PM +0530, Pekon Gupta wrote:
> This patch:
> - calls nand_scan_ident() using bus-width as passed by DT
> - removes double calls to nand_scan_ident(), incase first call fails
> then omap_nand_probe just returns error.
>
> Signed-off-by: Pekon Gupta <pekon@ti.com>
> ---
> drivers/mtd/nand/omap2.c | 21 +++++++++------------
> 1 file changed, 9 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
> index 5596368..f464321 100644
> --- a/drivers/mtd/nand/omap2.c
> +++ b/drivers/mtd/nand/omap2.c
> @@ -1856,7 +1856,6 @@ static int omap_nand_probe(struct platform_device *pdev)
> mtd->name = dev_name(&pdev->dev);
> mtd->owner = THIS_MODULE;
> nand_chip = &info->nand;
> - nand_chip->options = pdata->devsize;
> nand_chip->options |= NAND_SKIP_BBTSCAN;
> #ifdef CONFIG_MTD_NAND_OMAP_BCH
> info->of_node = pdata->of_node;
> @@ -1904,6 +1903,15 @@ static int omap_nand_probe(struct platform_device *pdev)
> nand_chip->chip_delay = 50;
> }
>
> + /* scan NAND device connected to chip controller */
> + nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
Hm.. this only works if the device is listed in nand_flash_ids[] array,
so that ONFI detection is not used. To make ONFI detection work I think you
need to do as Brian suggested and use NAND_BUSWIDTH_AUTO.
(Odd: why is there no current user of that auto-width option?)
Anyway, I really think we should fix this now and independently
of the evolution of this ECC DT binding discussion.
That way you can keep sending a smaller ECC DT binding patchset and
make reviewers focus on what's really important in each case.
I have a few fixes (based on your work) and I'll send them now, after
I complete the tests. We can continue our discussion there.
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device
@ 2013-10-24 21:27 ` Ezequiel Garcia
0 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-24 21:27 UTC (permalink / raw)
To: Pekon Gupta
Cc: mark.rutland, devicetree, ijc+devicetree, linux-omap, arnd,
Pawel.Moll, dedekind1, tony, avinashphilipk, swarren,
jp.francois, balbi, robherring2, bcousson, olof, linux-mtd,
ivan.djelic, computersforpeace, dwmw2
On Thu, Oct 24, 2013 at 06:20:20PM +0530, Pekon Gupta wrote:
> This patch:
> - calls nand_scan_ident() using bus-width as passed by DT
> - removes double calls to nand_scan_ident(), incase first call fails
> then omap_nand_probe just returns error.
>
> Signed-off-by: Pekon Gupta <pekon@ti.com>
> ---
> drivers/mtd/nand/omap2.c | 21 +++++++++------------
> 1 file changed, 9 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
> index 5596368..f464321 100644
> --- a/drivers/mtd/nand/omap2.c
> +++ b/drivers/mtd/nand/omap2.c
> @@ -1856,7 +1856,6 @@ static int omap_nand_probe(struct platform_device *pdev)
> mtd->name = dev_name(&pdev->dev);
> mtd->owner = THIS_MODULE;
> nand_chip = &info->nand;
> - nand_chip->options = pdata->devsize;
> nand_chip->options |= NAND_SKIP_BBTSCAN;
> #ifdef CONFIG_MTD_NAND_OMAP_BCH
> info->of_node = pdata->of_node;
> @@ -1904,6 +1903,15 @@ static int omap_nand_probe(struct platform_device *pdev)
> nand_chip->chip_delay = 50;
> }
>
> + /* scan NAND device connected to chip controller */
> + nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
Hm.. this only works if the device is listed in nand_flash_ids[] array,
so that ONFI detection is not used. To make ONFI detection work I think you
need to do as Brian suggested and use NAND_BUSWIDTH_AUTO.
(Odd: why is there no current user of that auto-width option?)
Anyway, I really think we should fix this now and independently
of the evolution of this ECC DT binding discussion.
That way you can keep sending a smaller ECC DT binding patchset and
make reviewers focus on what's really important in each case.
I have a few fixes (based on your work) and I'll send them now, after
I complete the tests. We can continue our discussion there.
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device
2013-10-24 21:27 ` Ezequiel Garcia
@ 2013-10-24 22:43 ` Brian Norris
-1 siblings, 0 replies; 42+ messages in thread
From: Brian Norris @ 2013-10-24 22:43 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Pekon Gupta, mark.rutland, olof, dedekind1, devicetree,
Pawel.Moll, arnd, swarren, tony, jp.francois, ijc+devicetree,
avinashphilipk, balbi, robherring2, bcousson, linux-mtd,
ivan.djelic, linux-omap, dwmw2, Alexander Shiyan,
Matthieu Castet, Jon Hunter
On Thu, Oct 24, 2013 at 06:27:15PM -0300, Ezequiel Garcia wrote:
> On Thu, Oct 24, 2013 at 06:20:20PM +0530, Pekon Gupta wrote:
> > This patch:
> > - calls nand_scan_ident() using bus-width as passed by DT
> > - removes double calls to nand_scan_ident(), incase first call fails
> > then omap_nand_probe just returns error.
> >
> > Signed-off-by: Pekon Gupta <pekon@ti.com>
> > ---
> > drivers/mtd/nand/omap2.c | 21 +++++++++------------
> > 1 file changed, 9 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
> > index 5596368..f464321 100644
> > --- a/drivers/mtd/nand/omap2.c
> > +++ b/drivers/mtd/nand/omap2.c
> > @@ -1856,7 +1856,6 @@ static int omap_nand_probe(struct platform_device *pdev)
> > mtd->name = dev_name(&pdev->dev);
> > mtd->owner = THIS_MODULE;
> > nand_chip = &info->nand;
> > - nand_chip->options = pdata->devsize;
> > nand_chip->options |= NAND_SKIP_BBTSCAN;
> > #ifdef CONFIG_MTD_NAND_OMAP_BCH
> > info->of_node = pdata->of_node;
> > @@ -1904,6 +1903,15 @@ static int omap_nand_probe(struct platform_device *pdev)
> > nand_chip->chip_delay = 50;
> > }
> >
> > + /* scan NAND device connected to chip controller */
> > + nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
>
> Hm.. this only works if the device is listed in nand_flash_ids[] array,
> so that ONFI detection is not used.
But this is no more broken than it used to be, no? I mean, you would
never properly detect an x16 ONFI flash with the old
double-nand_scan_ident() method, right?
> To make ONFI detection work I think you
> need to do as Brian suggested and use NAND_BUSWIDTH_AUTO.
I think that is the correct way forward. But Pekon seems to think that
will require more invasive changes to the GPMC code. But I'm not sure
why.
> (Odd: why is there no current user of that auto-width option?)
Hmm, I could have sworn somebody was using that... I know there was some
pending work on using it for GPIO NAND, but Alexander Shiyan never
followed up on the latest comments. It also seems like the original
author (Matthieu Castet) was working on OMAP support about a year ago,
but things stalled when there wasn't proper mainline support for much of
it:
http://thread.gmane.org/gmane.linux.ports.arm.omap/88550/focus=44770
Personally, I've only ever used x8 NAND, so I don't have much to go on
here.
> Anyway, I really think we should fix this now and independently
> of the evolution of this ECC DT binding discussion.
> That way you can keep sending a smaller ECC DT binding patchset and
> make reviewers focus on what's really important in each case.
AFAIK, the ECC DT bindings were all approved, and the code looked OK to
my knowledge, except for this single patch. I had recommended either its
total removal or its simplification (i.e., this current patch).
I will be taking a last look and queueing this series up soon, I
believe.
> I have a few fixes (based on your work) and I'll send them now, after
> I complete the tests. We can continue our discussion there.
I'll take a look at those soon.
So am I to understand you have hardware for testing Pekon's work now,
Ezequiel? That will be great if we can have better Reviewed-by/Tested-by
results.
Brian
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device
@ 2013-10-24 22:43 ` Brian Norris
0 siblings, 0 replies; 42+ messages in thread
From: Brian Norris @ 2013-10-24 22:43 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: mark.rutland, tony, linux-mtd, Matthieu Castet, ivan.djelic,
Pawel.Moll, Alexander Shiyan, swarren, avinashphilipk,
robherring2, devicetree, arnd, ijc+devicetree, jp.francois,
Pekon Gupta, linux-omap, dedekind1, balbi, Jon Hunter, bcousson,
olof, dwmw2
On Thu, Oct 24, 2013 at 06:27:15PM -0300, Ezequiel Garcia wrote:
> On Thu, Oct 24, 2013 at 06:20:20PM +0530, Pekon Gupta wrote:
> > This patch:
> > - calls nand_scan_ident() using bus-width as passed by DT
> > - removes double calls to nand_scan_ident(), incase first call fails
> > then omap_nand_probe just returns error.
> >
> > Signed-off-by: Pekon Gupta <pekon@ti.com>
> > ---
> > drivers/mtd/nand/omap2.c | 21 +++++++++------------
> > 1 file changed, 9 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
> > index 5596368..f464321 100644
> > --- a/drivers/mtd/nand/omap2.c
> > +++ b/drivers/mtd/nand/omap2.c
> > @@ -1856,7 +1856,6 @@ static int omap_nand_probe(struct platform_device *pdev)
> > mtd->name = dev_name(&pdev->dev);
> > mtd->owner = THIS_MODULE;
> > nand_chip = &info->nand;
> > - nand_chip->options = pdata->devsize;
> > nand_chip->options |= NAND_SKIP_BBTSCAN;
> > #ifdef CONFIG_MTD_NAND_OMAP_BCH
> > info->of_node = pdata->of_node;
> > @@ -1904,6 +1903,15 @@ static int omap_nand_probe(struct platform_device *pdev)
> > nand_chip->chip_delay = 50;
> > }
> >
> > + /* scan NAND device connected to chip controller */
> > + nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
>
> Hm.. this only works if the device is listed in nand_flash_ids[] array,
> so that ONFI detection is not used.
But this is no more broken than it used to be, no? I mean, you would
never properly detect an x16 ONFI flash with the old
double-nand_scan_ident() method, right?
> To make ONFI detection work I think you
> need to do as Brian suggested and use NAND_BUSWIDTH_AUTO.
I think that is the correct way forward. But Pekon seems to think that
will require more invasive changes to the GPMC code. But I'm not sure
why.
> (Odd: why is there no current user of that auto-width option?)
Hmm, I could have sworn somebody was using that... I know there was some
pending work on using it for GPIO NAND, but Alexander Shiyan never
followed up on the latest comments. It also seems like the original
author (Matthieu Castet) was working on OMAP support about a year ago,
but things stalled when there wasn't proper mainline support for much of
it:
http://thread.gmane.org/gmane.linux.ports.arm.omap/88550/focus=44770
Personally, I've only ever used x8 NAND, so I don't have much to go on
here.
> Anyway, I really think we should fix this now and independently
> of the evolution of this ECC DT binding discussion.
> That way you can keep sending a smaller ECC DT binding patchset and
> make reviewers focus on what's really important in each case.
AFAIK, the ECC DT bindings were all approved, and the code looked OK to
my knowledge, except for this single patch. I had recommended either its
total removal or its simplification (i.e., this current patch).
I will be taking a last look and queueing this series up soon, I
believe.
> I have a few fixes (based on your work) and I'll send them now, after
> I complete the tests. We can continue our discussion there.
I'll take a look at those soon.
So am I to understand you have hardware for testing Pekon's work now,
Ezequiel? That will be great if we can have better Reviewed-by/Tested-by
results.
Brian
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device
2013-10-24 22:43 ` Brian Norris
@ 2013-10-24 22:49 ` Ezequiel Garcia
-1 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-24 22:49 UTC (permalink / raw)
To: Brian Norris
Cc: Pekon Gupta, mark.rutland, olof, dedekind1, devicetree,
Pawel.Moll, arnd, swarren, tony, jp.francois, ijc+devicetree,
avinashphilipk, balbi, robherring2, bcousson, linux-mtd,
ivan.djelic, linux-omap, dwmw2, Alexander Shiyan,
Matthieu Castet, Jon Hunter
On Thu, Oct 24, 2013 at 03:43:00PM -0700, Brian Norris wrote:
> On Thu, Oct 24, 2013 at 06:27:15PM -0300, Ezequiel Garcia wrote:
> > On Thu, Oct 24, 2013 at 06:20:20PM +0530, Pekon Gupta wrote:
> > > This patch:
> > > - calls nand_scan_ident() using bus-width as passed by DT
> > > - removes double calls to nand_scan_ident(), incase first call fails
> > > then omap_nand_probe just returns error.
> > >
> > > Signed-off-by: Pekon Gupta <pekon@ti.com>
> > > ---
> > > drivers/mtd/nand/omap2.c | 21 +++++++++------------
> > > 1 file changed, 9 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
> > > index 5596368..f464321 100644
> > > --- a/drivers/mtd/nand/omap2.c
> > > +++ b/drivers/mtd/nand/omap2.c
> > > @@ -1856,7 +1856,6 @@ static int omap_nand_probe(struct platform_device *pdev)
> > > mtd->name = dev_name(&pdev->dev);
> > > mtd->owner = THIS_MODULE;
> > > nand_chip = &info->nand;
> > > - nand_chip->options = pdata->devsize;
> > > nand_chip->options |= NAND_SKIP_BBTSCAN;
> > > #ifdef CONFIG_MTD_NAND_OMAP_BCH
> > > info->of_node = pdata->of_node;
> > > @@ -1904,6 +1903,15 @@ static int omap_nand_probe(struct platform_device *pdev)
> > > nand_chip->chip_delay = 50;
> > > }
> > >
> > > + /* scan NAND device connected to chip controller */
> > > + nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
> >
> > Hm.. this only works if the device is listed in nand_flash_ids[] array,
> > so that ONFI detection is not used.
>
> But this is no more broken than it used to be, no? I mean, you would
> never properly detect an x16 ONFI flash with the old
> double-nand_scan_ident() method, right?
>
That's right. But the issue is not really fixed either.
> > To make ONFI detection work I think you
> > need to do as Brian suggested and use NAND_BUSWIDTH_AUTO.
>
> I think that is the correct way forward. But Pekon seems to think that
> will require more invasive changes to the GPMC code. But I'm not sure
> why.
>
Hm... not sure. AFAIK, the GPMC should be *already* configured prior to the
NAND driver being probed.
> > (Odd: why is there no current user of that auto-width option?)
>
> Hmm, I could have sworn somebody was using that... I know there was some
> pending work on using it for GPIO NAND, but Alexander Shiyan never
> followed up on the latest comments. It also seems like the original
> author (Matthieu Castet) was working on OMAP support about a year ago,
> but things stalled when there wasn't proper mainline support for much of
> it:
>
> http://thread.gmane.org/gmane.linux.ports.arm.omap/88550/focus=44770
>
> Personally, I've only ever used x8 NAND, so I don't have much to go on
> here.
>
> > Anyway, I really think we should fix this now and independently
> > of the evolution of this ECC DT binding discussion.
> > That way you can keep sending a smaller ECC DT binding patchset and
> > make reviewers focus on what's really important in each case.
>
> AFAIK, the ECC DT bindings were all approved, and the code looked OK to
> my knowledge, except for this single patch. I had recommended either its
> total removal or its simplification (i.e., this current patch).
>
FWIW, I'm in favor of *completely* dropping whatever doesn't belong
to the ECC DT binding.
> I will be taking a last look and queueing this series up soon, I
> believe.
>
> > I have a few fixes (based on your work) and I'll send them now, after
> > I complete the tests. We can continue our discussion there.
>
> I'll take a look at those soon.
>
Ok, cool.
> So am I to understand you have hardware for testing Pekon's work now,
> Ezequiel? That will be great if we can have better Reviewed-by/Tested-by
> results.
>
Yup, I gave it quick test actually, but nothing deep. Let me test some
more maybe later today/tomorrow. I just wanted to sort this out first.
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device
@ 2013-10-24 22:49 ` Ezequiel Garcia
0 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-24 22:49 UTC (permalink / raw)
To: Brian Norris
Cc: mark.rutland, tony, linux-mtd, Matthieu Castet, ivan.djelic,
Pawel.Moll, Alexander Shiyan, swarren, avinashphilipk,
robherring2, devicetree, arnd, ijc+devicetree, jp.francois,
Pekon Gupta, linux-omap, dedekind1, balbi, Jon Hunter, bcousson,
olof, dwmw2
On Thu, Oct 24, 2013 at 03:43:00PM -0700, Brian Norris wrote:
> On Thu, Oct 24, 2013 at 06:27:15PM -0300, Ezequiel Garcia wrote:
> > On Thu, Oct 24, 2013 at 06:20:20PM +0530, Pekon Gupta wrote:
> > > This patch:
> > > - calls nand_scan_ident() using bus-width as passed by DT
> > > - removes double calls to nand_scan_ident(), incase first call fails
> > > then omap_nand_probe just returns error.
> > >
> > > Signed-off-by: Pekon Gupta <pekon@ti.com>
> > > ---
> > > drivers/mtd/nand/omap2.c | 21 +++++++++------------
> > > 1 file changed, 9 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
> > > index 5596368..f464321 100644
> > > --- a/drivers/mtd/nand/omap2.c
> > > +++ b/drivers/mtd/nand/omap2.c
> > > @@ -1856,7 +1856,6 @@ static int omap_nand_probe(struct platform_device *pdev)
> > > mtd->name = dev_name(&pdev->dev);
> > > mtd->owner = THIS_MODULE;
> > > nand_chip = &info->nand;
> > > - nand_chip->options = pdata->devsize;
> > > nand_chip->options |= NAND_SKIP_BBTSCAN;
> > > #ifdef CONFIG_MTD_NAND_OMAP_BCH
> > > info->of_node = pdata->of_node;
> > > @@ -1904,6 +1903,15 @@ static int omap_nand_probe(struct platform_device *pdev)
> > > nand_chip->chip_delay = 50;
> > > }
> > >
> > > + /* scan NAND device connected to chip controller */
> > > + nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
> >
> > Hm.. this only works if the device is listed in nand_flash_ids[] array,
> > so that ONFI detection is not used.
>
> But this is no more broken than it used to be, no? I mean, you would
> never properly detect an x16 ONFI flash with the old
> double-nand_scan_ident() method, right?
>
That's right. But the issue is not really fixed either.
> > To make ONFI detection work I think you
> > need to do as Brian suggested and use NAND_BUSWIDTH_AUTO.
>
> I think that is the correct way forward. But Pekon seems to think that
> will require more invasive changes to the GPMC code. But I'm not sure
> why.
>
Hm... not sure. AFAIK, the GPMC should be *already* configured prior to the
NAND driver being probed.
> > (Odd: why is there no current user of that auto-width option?)
>
> Hmm, I could have sworn somebody was using that... I know there was some
> pending work on using it for GPIO NAND, but Alexander Shiyan never
> followed up on the latest comments. It also seems like the original
> author (Matthieu Castet) was working on OMAP support about a year ago,
> but things stalled when there wasn't proper mainline support for much of
> it:
>
> http://thread.gmane.org/gmane.linux.ports.arm.omap/88550/focus=44770
>
> Personally, I've only ever used x8 NAND, so I don't have much to go on
> here.
>
> > Anyway, I really think we should fix this now and independently
> > of the evolution of this ECC DT binding discussion.
> > That way you can keep sending a smaller ECC DT binding patchset and
> > make reviewers focus on what's really important in each case.
>
> AFAIK, the ECC DT bindings were all approved, and the code looked OK to
> my knowledge, except for this single patch. I had recommended either its
> total removal or its simplification (i.e., this current patch).
>
FWIW, I'm in favor of *completely* dropping whatever doesn't belong
to the ECC DT binding.
> I will be taking a last look and queueing this series up soon, I
> believe.
>
> > I have a few fixes (based on your work) and I'll send them now, after
> > I complete the tests. We can continue our discussion there.
>
> I'll take a look at those soon.
>
Ok, cool.
> So am I to understand you have hardware for testing Pekon's work now,
> Ezequiel? That will be great if we can have better Reviewed-by/Tested-by
> results.
>
Yup, I gave it quick test actually, but nothing deep. Let me test some
more maybe later today/tomorrow. I just wanted to sort this out first.
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
2013-10-24 12:50 ` Pekon Gupta
@ 2013-10-25 10:56 ` Ezequiel Garcia
-1 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-25 10:56 UTC (permalink / raw)
To: Pekon Gupta
Cc: mark.rutland, olof, computersforpeace, dedekind1, devicetree,
Pawel.Moll, arnd, swarren, tony, jp.francois, ijc+devicetree,
avinashphilipk, balbi, robherring2, bcousson, linux-mtd,
ivan.djelic, linux-omap, dwmw2
Pekon,
On Thu, Oct 24, 2013 at 06:20:16PM +0530, Pekon Gupta wrote:
> *changes v10 -> v11*
> - [PATCH v10 04/10] replaced with newer [PATCH v11 04/11] so that
> nand_scan_ident() is called only once.
> discussion thread with Brian Norris <computersforpeace@gmail.com>
> <http://lists.infradead.org/pipermail/linux-mtd/2013-October/049335.html>
> - No change in any other patch
>
>
> *changes v9 -> v10*
> [PATCH 1/10], [PATCH 2/10]
> swapped [PATCH v9 1/9] and [PATCH v9 2/9] so that DT parsing updates
> (with backward compatibility) happen before the deprecation of DT values.
> This way DTB does not break functionally between the patches.
> [PATCH 3/10] <no update>
> [PATCH 4/10]
> dropped [PATCH v9 4/9] introducing NAND_BUSWIDTH_AUTO, instead
> using DT 'nand-bus-width' for device bus-width. Refer discussion thread
> <http://lists.infradead.org/pipermail/linux-mtd/2013-October/049198.html>
> [PATCH 5/10] <no update>
> [PATCH 6/10] <no update>
> [PATCH 7/10]
> separated out drivers/mtd/nand/Kconfig updates into separate [PATCH v10 10/10]
> cleanup: s/info->nand\./nand_chip->
> [PATCH 8/10] <no update>
> [PATCH 9/10] cleanup: s/out_release_mem_region/return_error
> [PATCH 10/10] <new> spawned from [PATCH v9 8/9] for Kconfig updates
>
>
> *changes v8 -> v9*
> [PATCH 1/9] <no update from [PATCH v8 1/6]>
> [PATCH 2/9] <only commit log updated from [PATCH v8 2/6]>
> As per feedbacks from Brian Norris <computersforpeace@gmail.com> previous
> revision [PATCH v8 3/6] and [PATCH 4/6] are split into following sub-patches:
> - [PATCH 3/9] <new> replaces local reference with generic names (mtd, nand_chip)
> - [PATCH 4/9] <new> enables auto-detection of bus-width
> - [PATCH 5/9] <new> removes omap3_init_bch: populates ecc-scheme data
> - [PATCH 6/9] <new> removes omap3_init_bch_tail: populates ecc-layout
> - [PATCH 7/9] <new> replaces lib/bch.c with nand_bch.c wrapper
> [PATCH 8/9] <no update same as [PATCH v8 5/6]
> [PATCH 9/9] removed devm_free_xx functions
>
>
> *Changes v7 -> v8*
> [PATCH 1/6] <no updates>
> [PATCH 2/6]
> - updated DT parsing of "ti,nand-ecc-opts" so that its "ham1" remains
> compatible to "sw","hw","hw-romcode"
> - updated DT parsing of "ti,elm-id" to retain compatibility to "elm_id"
> - using of_parse_phandle() to get ELM device pointer from DT
> [PATCH 3..6/6] <commit log updates>
>
>
> *Changes v6 -> v7*
> [PATCH 1/6] <NEW> split from [PATCH v6 2/4] as per feedbacks from Brian Norris <computersforpeace@gmail.com>
> [PATCH 2/6] incorporated feedbacks from DT maintainers
> [PATCH 3/6] cleaned and incorporated feedbacks from Brian Norris <computersforpeace@gmail.com>
> [PATCH 4/6] rebasing changes and cleanup
> [PATCH 5/6] updated omap3430-sdp.dts
> [PATCH 6/6] <NEW> updated for devm_xx
>
>
> *Changes v5 -> v6*
> [PATCH 1/4]:
> - updated DT binding for gpmc-nand based on 'Olof Johansson's feedbacks
> http://lists.infradead.org/pipermail/linux-mtd/2013-August/048394.html
> - detection of ELM device via ti,elm-id DT node, moved to gpmc.c driver
> [PATCH 2/4]
> - removed: support for following obselete ECC schemes
> OMAP_ECC_HAMMING_CODE_DEFAULT (S/W based 1-bit Hamming ECC)
> OMAP_ECC_HAMMING_CODE_HW_ROMCODE (H/W based 1-bit Hamming ECC scheme)
> - updated: using omap_oobinfo as chip->ecc.layout for all ecc-schemes
> - clean: error messages
> [PATCH 3/4] cleaned to include changes for OMAP_ECC_BCH8_CODE_HW only
> [PATCH 4/4] updated to include DT property changes
>
>
> *Changes v4 -> v5*
> - Rebased to linux-next
> IMPORTANT: Need to revert commit fb1585b, [PATCH 2/4] part of previous version
> http://lists.infradead.org/pipermail/linux-mtd/2013-July/047441.html
>
> - Swapped PATCH-1 & PATCH-2 to maintain bisectibility & compilation dependency
> http://lists.infradead.org/pipermail/linux-mtd/2013-July/047461.html
>
> - PATCH-2: re-ordered call to is_elm_present() for later updates ELM driver
> - dropped changes in include/linux/platform_data/elm.h (not needed)
> - PATCH-3: re-ordered call to is_elm_present() for later updates ELM driver
> - Re-formated patch description (replaced tabs with white-spaces)
>
>
> *Changes v3 -> v4*
> (Resent with CC: devicetree-discuss@lists.ozlabs.org)
> - [Patch 1/3] removed MTD_NAND_OMAP_BCH8 & MTD_NAND_OMAP_BCH4 from nand/Kconfig
> ECC scheme selectable via nand DT (nand-ecc-opt).
> - [*] rebased for l2-mtd.git
>
>
> *Changes v2 -> v3*
> (Resent with Author Name fixed)
> - PATCH-1: re-arranged code to remove redundancy, added NAND_BUSWIDTH_AUTO
> - PATCH-2: updated nand-ecc-opt DT mapping and Documentation
> - PATCH-3: code-cleaning + changes to match PATCH-1
> - PATCH-4 <DROPPED> update DT attribute for ti,nand-ecc-opt
> - received feedback to keep DT mapping independent of linuxism
> - PATCH-4:<NEW> : ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
> - independent patch for AM335x-evm.dts update based on PATCH-2
>
>
> *Changes v1 -> v2*
> added [PATCH 3/4] and [PATCH 4/4]
>
>
> After this patch series, omap2-nand driver will supports following ECC schemes:
> +---------------------------------------+---------------+---------------+
> | ECC scheme |ECC calculation|Error detection|
> +---------------------------------------+---------------+---------------+
> |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
> +---------------------------------------+---------------+---------------+
> |OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
> | (needs CONFIG_MTD_NAND_ECC_BCH) | | |
> | | | |
> |OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) |
> | (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
> | ti,elm-id) | | |
> +---------------------------------------+---------------+---------------+
> |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
> | (needs CONFIG_MTD_NAND_ECC_BCH) | | |
> | | | |
> |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
> | (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
> | ti,elm-id) | | |
> +---------------------------------------+---------------+---------------+
>
>
> Pekon Gupta (10):
> ARM: OMAP2+: cleaned-up DT support of various ECC schemes
> mtd: nand: omap: combine different flavours of 1-bit hamming ecc
> schemes
> mtd: nand: omap: cleanup: replace local references with generic
> framework names
> mtd: nand: omap: use DT specified bus-width only for scanning NAND
> device
> mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in
> device_probe
> mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
> mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC
> instead of lib/bch.c
> ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
> mtd: nand: omap: updated devm_xx for all resource allocation and free
> calls
> mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig
>
> .../devicetree/bindings/mtd/gpmc-nand.txt | 16 +-
> arch/arm/boot/dts/am335x-evm.dts | 3 +-
> arch/arm/boot/dts/omap3430-sdp.dts | 2 +-
> arch/arm/mach-omap2/board-flash.c | 2 +-
> arch/arm/mach-omap2/gpmc.c | 48 +-
> drivers/mtd/nand/Kconfig | 40 +-
> drivers/mtd/nand/omap2.c | 641 +++++++++------------
> include/linux/platform_data/mtd-nand-omap2.h | 18 +-
> 8 files changed, 348 insertions(+), 422 deletions(-)
>
I tested this using the AM335x device tree you posted earlier with
the 16-bit NAND Beaglebone cape. For all the patches:
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
The ECC bindings look much much cleaner now, nice job!
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-10-25 10:56 ` Ezequiel Garcia
0 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-25 10:56 UTC (permalink / raw)
To: Pekon Gupta
Cc: mark.rutland, devicetree, ijc+devicetree, linux-omap, arnd,
Pawel.Moll, dedekind1, tony, avinashphilipk, swarren,
jp.francois, balbi, robherring2, bcousson, olof, linux-mtd,
ivan.djelic, computersforpeace, dwmw2
Pekon,
On Thu, Oct 24, 2013 at 06:20:16PM +0530, Pekon Gupta wrote:
> *changes v10 -> v11*
> - [PATCH v10 04/10] replaced with newer [PATCH v11 04/11] so that
> nand_scan_ident() is called only once.
> discussion thread with Brian Norris <computersforpeace@gmail.com>
> <http://lists.infradead.org/pipermail/linux-mtd/2013-October/049335.html>
> - No change in any other patch
>
>
> *changes v9 -> v10*
> [PATCH 1/10], [PATCH 2/10]
> swapped [PATCH v9 1/9] and [PATCH v9 2/9] so that DT parsing updates
> (with backward compatibility) happen before the deprecation of DT values.
> This way DTB does not break functionally between the patches.
> [PATCH 3/10] <no update>
> [PATCH 4/10]
> dropped [PATCH v9 4/9] introducing NAND_BUSWIDTH_AUTO, instead
> using DT 'nand-bus-width' for device bus-width. Refer discussion thread
> <http://lists.infradead.org/pipermail/linux-mtd/2013-October/049198.html>
> [PATCH 5/10] <no update>
> [PATCH 6/10] <no update>
> [PATCH 7/10]
> separated out drivers/mtd/nand/Kconfig updates into separate [PATCH v10 10/10]
> cleanup: s/info->nand\./nand_chip->
> [PATCH 8/10] <no update>
> [PATCH 9/10] cleanup: s/out_release_mem_region/return_error
> [PATCH 10/10] <new> spawned from [PATCH v9 8/9] for Kconfig updates
>
>
> *changes v8 -> v9*
> [PATCH 1/9] <no update from [PATCH v8 1/6]>
> [PATCH 2/9] <only commit log updated from [PATCH v8 2/6]>
> As per feedbacks from Brian Norris <computersforpeace@gmail.com> previous
> revision [PATCH v8 3/6] and [PATCH 4/6] are split into following sub-patches:
> - [PATCH 3/9] <new> replaces local reference with generic names (mtd, nand_chip)
> - [PATCH 4/9] <new> enables auto-detection of bus-width
> - [PATCH 5/9] <new> removes omap3_init_bch: populates ecc-scheme data
> - [PATCH 6/9] <new> removes omap3_init_bch_tail: populates ecc-layout
> - [PATCH 7/9] <new> replaces lib/bch.c with nand_bch.c wrapper
> [PATCH 8/9] <no update same as [PATCH v8 5/6]
> [PATCH 9/9] removed devm_free_xx functions
>
>
> *Changes v7 -> v8*
> [PATCH 1/6] <no updates>
> [PATCH 2/6]
> - updated DT parsing of "ti,nand-ecc-opts" so that its "ham1" remains
> compatible to "sw","hw","hw-romcode"
> - updated DT parsing of "ti,elm-id" to retain compatibility to "elm_id"
> - using of_parse_phandle() to get ELM device pointer from DT
> [PATCH 3..6/6] <commit log updates>
>
>
> *Changes v6 -> v7*
> [PATCH 1/6] <NEW> split from [PATCH v6 2/4] as per feedbacks from Brian Norris <computersforpeace@gmail.com>
> [PATCH 2/6] incorporated feedbacks from DT maintainers
> [PATCH 3/6] cleaned and incorporated feedbacks from Brian Norris <computersforpeace@gmail.com>
> [PATCH 4/6] rebasing changes and cleanup
> [PATCH 5/6] updated omap3430-sdp.dts
> [PATCH 6/6] <NEW> updated for devm_xx
>
>
> *Changes v5 -> v6*
> [PATCH 1/4]:
> - updated DT binding for gpmc-nand based on 'Olof Johansson's feedbacks
> http://lists.infradead.org/pipermail/linux-mtd/2013-August/048394.html
> - detection of ELM device via ti,elm-id DT node, moved to gpmc.c driver
> [PATCH 2/4]
> - removed: support for following obselete ECC schemes
> OMAP_ECC_HAMMING_CODE_DEFAULT (S/W based 1-bit Hamming ECC)
> OMAP_ECC_HAMMING_CODE_HW_ROMCODE (H/W based 1-bit Hamming ECC scheme)
> - updated: using omap_oobinfo as chip->ecc.layout for all ecc-schemes
> - clean: error messages
> [PATCH 3/4] cleaned to include changes for OMAP_ECC_BCH8_CODE_HW only
> [PATCH 4/4] updated to include DT property changes
>
>
> *Changes v4 -> v5*
> - Rebased to linux-next
> IMPORTANT: Need to revert commit fb1585b, [PATCH 2/4] part of previous version
> http://lists.infradead.org/pipermail/linux-mtd/2013-July/047441.html
>
> - Swapped PATCH-1 & PATCH-2 to maintain bisectibility & compilation dependency
> http://lists.infradead.org/pipermail/linux-mtd/2013-July/047461.html
>
> - PATCH-2: re-ordered call to is_elm_present() for later updates ELM driver
> - dropped changes in include/linux/platform_data/elm.h (not needed)
> - PATCH-3: re-ordered call to is_elm_present() for later updates ELM driver
> - Re-formated patch description (replaced tabs with white-spaces)
>
>
> *Changes v3 -> v4*
> (Resent with CC: devicetree-discuss@lists.ozlabs.org)
> - [Patch 1/3] removed MTD_NAND_OMAP_BCH8 & MTD_NAND_OMAP_BCH4 from nand/Kconfig
> ECC scheme selectable via nand DT (nand-ecc-opt).
> - [*] rebased for l2-mtd.git
>
>
> *Changes v2 -> v3*
> (Resent with Author Name fixed)
> - PATCH-1: re-arranged code to remove redundancy, added NAND_BUSWIDTH_AUTO
> - PATCH-2: updated nand-ecc-opt DT mapping and Documentation
> - PATCH-3: code-cleaning + changes to match PATCH-1
> - PATCH-4 <DROPPED> update DT attribute for ti,nand-ecc-opt
> - received feedback to keep DT mapping independent of linuxism
> - PATCH-4:<NEW> : ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
> - independent patch for AM335x-evm.dts update based on PATCH-2
>
>
> *Changes v1 -> v2*
> added [PATCH 3/4] and [PATCH 4/4]
>
>
> After this patch series, omap2-nand driver will supports following ECC schemes:
> +---------------------------------------+---------------+---------------+
> | ECC scheme |ECC calculation|Error detection|
> +---------------------------------------+---------------+---------------+
> |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W |
> +---------------------------------------+---------------+---------------+
> |OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
> | (needs CONFIG_MTD_NAND_ECC_BCH) | | |
> | | | |
> |OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) |
> | (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
> | ti,elm-id) | | |
> +---------------------------------------+---------------+---------------+
> |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
> | (needs CONFIG_MTD_NAND_ECC_BCH) | | |
> | | | |
> |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
> | (needs CONFIG_MTD_NAND_OMAP_BCH && | | |
> | ti,elm-id) | | |
> +---------------------------------------+---------------+---------------+
>
>
> Pekon Gupta (10):
> ARM: OMAP2+: cleaned-up DT support of various ECC schemes
> mtd: nand: omap: combine different flavours of 1-bit hamming ecc
> schemes
> mtd: nand: omap: cleanup: replace local references with generic
> framework names
> mtd: nand: omap: use DT specified bus-width only for scanning NAND
> device
> mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in
> device_probe
> mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
> mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC
> instead of lib/bch.c
> ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
> mtd: nand: omap: updated devm_xx for all resource allocation and free
> calls
> mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig
>
> .../devicetree/bindings/mtd/gpmc-nand.txt | 16 +-
> arch/arm/boot/dts/am335x-evm.dts | 3 +-
> arch/arm/boot/dts/omap3430-sdp.dts | 2 +-
> arch/arm/mach-omap2/board-flash.c | 2 +-
> arch/arm/mach-omap2/gpmc.c | 48 +-
> drivers/mtd/nand/Kconfig | 40 +-
> drivers/mtd/nand/omap2.c | 641 +++++++++------------
> include/linux/platform_data/mtd-nand-omap2.h | 18 +-
> 8 files changed, 348 insertions(+), 422 deletions(-)
>
I tested this using the AM335x device tree you posted earlier with
the 16-bit NAND Beaglebone cape. For all the patches:
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
The ECC bindings look much much cleaner now, nice job!
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
2013-10-24 13:52 ` Ezequiel Garcia
@ 2013-10-30 3:59 ` Brian Norris
-1 siblings, 0 replies; 42+ messages in thread
From: Brian Norris @ 2013-10-30 3:59 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Pekon Gupta, Mark Rutland, olof, Artem Bityutskiy, devicetree,
Pawel Moll, Arnd Bergmann, Stephen Warren, tony, jp.francois,
Ian Campbell, Avinash Philip, Balbi, Felipe, Rob Herring,
Benoit Cousson, linux-mtd, Ivan Djelic, linux-omap,
David Woodhouse
On Thu, Oct 24, 2013 at 9:52 AM, Ezequiel Garcia
<ezequiel.garcia@free-electrons.com> wrote:
> Just as suggestion, I think you should reconsider your 'upstream strategy'.
>
> On Thu, Oct 24, 2013 at 06:20:16PM +0530, Pekon Gupta wrote:
> [..]
>>
>> Pekon Gupta (10):
>> ARM: OMAP2+: cleaned-up DT support of various ECC schemes
>> mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
>> mtd: nand: omap: cleanup: replace local references with generic framework names
>
> IMHO, this patch about the dobule nand_scan_ident():
>> mtd: nand: omap: use DT specified bus-width only for scanning NAND device
>
> is a fix unrelated to this series and can be pushed independently.
> Maybe you can try to send it as a one-patch fix?
>
>> mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe
>> mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
>> mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c
>> ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
>
> And also this patch:
>> mtd: nand: omap: updated devm_xx for all resource allocation and free calls
>
> doesn't seem to belong to this series.
>
> I think tou could send those two independently and ask Brian to merge them earlier
> if appropriate.
>
> But again, this is just a suggestion.
I agree with Ezequiel's thoughts, since the excessive amount of noise
in this patch series has delayed it significantly. But at this point,
I think it has stabilized; we have reviews from the DT folks (thanks
guys; please comment if you have an official "ack" to give), and I
think we've retained backwards compatibility properly; I've combed
through it a few times over the months; we have a third-party tester;
and at this point, I'm sure we're all sick of this.
So, without further delay: pushed all patches except path 8 to l2-mtd.git.
Tony, you mentioned the DTS update in patch 8 going in via an ARM
tree? This patch is not urgent, and it should probably wait until we
know what release the rest of the series makes it into. This may
depend on David Woodhouse's recommendation, but I'm not sure this
series will have enough time baking in linux-next before entering
mainline in 3.13 (the merge window is approaching).
Pekon/Ezequiel/others: please feel free to send any follow up cleanups
for this driver. I'll take a look at what Ezequiel has already sent
out and see if it's still applicable on top.
Thanks,
Brian
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-10-30 3:59 ` Brian Norris
0 siblings, 0 replies; 42+ messages in thread
From: Brian Norris @ 2013-10-30 3:59 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Mark Rutland, devicetree, Ian Campbell, Arnd Bergmann,
Pawel Moll, Artem Bityutskiy, tony, Avinash Philip,
Stephen Warren, jp.francois, Balbi, Felipe, Rob Herring,
Pekon Gupta, Benoit Cousson, olof, linux-mtd, Ivan Djelic,
linux-omap, David Woodhouse
On Thu, Oct 24, 2013 at 9:52 AM, Ezequiel Garcia
<ezequiel.garcia@free-electrons.com> wrote:
> Just as suggestion, I think you should reconsider your 'upstream strategy'.
>
> On Thu, Oct 24, 2013 at 06:20:16PM +0530, Pekon Gupta wrote:
> [..]
>>
>> Pekon Gupta (10):
>> ARM: OMAP2+: cleaned-up DT support of various ECC schemes
>> mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
>> mtd: nand: omap: cleanup: replace local references with generic framework names
>
> IMHO, this patch about the dobule nand_scan_ident():
>> mtd: nand: omap: use DT specified bus-width only for scanning NAND device
>
> is a fix unrelated to this series and can be pushed independently.
> Maybe you can try to send it as a one-patch fix?
>
>> mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe
>> mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
>> mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c
>> ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
>
> And also this patch:
>> mtd: nand: omap: updated devm_xx for all resource allocation and free calls
>
> doesn't seem to belong to this series.
>
> I think tou could send those two independently and ask Brian to merge them earlier
> if appropriate.
>
> But again, this is just a suggestion.
I agree with Ezequiel's thoughts, since the excessive amount of noise
in this patch series has delayed it significantly. But at this point,
I think it has stabilized; we have reviews from the DT folks (thanks
guys; please comment if you have an official "ack" to give), and I
think we've retained backwards compatibility properly; I've combed
through it a few times over the months; we have a third-party tester;
and at this point, I'm sure we're all sick of this.
So, without further delay: pushed all patches except path 8 to l2-mtd.git.
Tony, you mentioned the DTS update in patch 8 going in via an ARM
tree? This patch is not urgent, and it should probably wait until we
know what release the rest of the series makes it into. This may
depend on David Woodhouse's recommendation, but I'm not sure this
series will have enough time baking in linux-next before entering
mainline in 3.13 (the merge window is approaching).
Pekon/Ezequiel/others: please feel free to send any follow up cleanups
for this driver. I'll take a look at what Ezequiel has already sent
out and see if it's still applicable on top.
Thanks,
Brian
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
2013-10-30 3:59 ` Brian Norris
@ 2013-10-30 9:16 ` Ezequiel Garcia
-1 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-30 9:16 UTC (permalink / raw)
To: Brian Norris
Cc: Pekon Gupta, Mark Rutland, olof, Artem Bityutskiy, devicetree,
Pawel Moll, Arnd Bergmann, Stephen Warren, tony, jp.francois,
Ian Campbell, Avinash Philip, Balbi, Felipe, Rob Herring,
Benoit Cousson, linux-mtd, Ivan Djelic, linux-omap,
David Woodhouse
On Tue, Oct 29, 2013 at 11:59:57PM -0400, Brian Norris wrote:
>
> Pekon/Ezequiel/others: please feel free to send any follow up cleanups
> for this driver. I'll take a look at what Ezequiel has already sent
> out and see if it's still applicable on top.
>
They won't. I'll prepare a new patch in top of latest l2-mtd.
It's good to see this DT discussion finally coming to an end! Good job!
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-10-30 9:16 ` Ezequiel Garcia
0 siblings, 0 replies; 42+ messages in thread
From: Ezequiel Garcia @ 2013-10-30 9:16 UTC (permalink / raw)
To: Brian Norris
Cc: Mark Rutland, devicetree, Ian Campbell, Arnd Bergmann,
Pawel Moll, Artem Bityutskiy, tony, Avinash Philip,
Stephen Warren, jp.francois, Balbi, Felipe, Rob Herring,
Pekon Gupta, Benoit Cousson, olof, linux-mtd, Ivan Djelic,
linux-omap, David Woodhouse
On Tue, Oct 29, 2013 at 11:59:57PM -0400, Brian Norris wrote:
>
> Pekon/Ezequiel/others: please feel free to send any follow up cleanups
> for this driver. I'll take a look at what Ezequiel has already sent
> out and see if it's still applicable on top.
>
They won't. I'll prepare a new patch in top of latest l2-mtd.
It's good to see this DT discussion finally coming to an end! Good job!
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 42+ messages in thread
* RE: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
2013-10-30 3:59 ` Brian Norris
@ 2013-10-30 21:30 ` Gupta, Pekon
-1 siblings, 0 replies; 42+ messages in thread
From: Gupta, Pekon @ 2013-10-30 21:30 UTC (permalink / raw)
To: Brian Norris, Ezequiel Garcia
Cc: Mark Rutland, devicetree, Ian Campbell, Pawel Moll,
Arnd Bergmann, Artem Bityutskiy, tony, Avinash Philip,
Stephen Warren, jp.francois, Balbi, Felipe, Rob Herring,
Benoit Cousson, olof, linux-mtd, Ivan Djelic, linux-omap,
David Woodhouse
> From: Brian Norris [mailto:computersforpeace@gmail.com]
[...]
> I agree with Ezequiel's thoughts, since the excessive amount of noise
> in this patch series has delayed it significantly. But at this point,
> I think it has stabilized; we have reviews from the DT folks (thanks
> guys; please comment if you have an official "ack" to give), and I
> think we've retained backwards compatibility properly; I've combed
> through it a few times over the months; we have a third-party tester;
> and at this point, I'm sure we're all sick of this.
>
> So, without further delay: pushed all patches except path 8 to l2-mtd.git.
>
Thanks much ..
I'll ensure that my next series are more logically aligned.
> Tony, you mentioned the DTS update in patch 8 going in via an ARM
> tree? This patch is not urgent, and it should probably wait until we
> know what release the rest of the series makes it into. This may
> depend on David Woodhouse's recommendation, but I'm not sure this
> series will have enough time baking in linux-next before entering
> mainline in 3.13 (the merge window is approaching).
>
> Pekon/Ezequiel/others: please feel free to send any follow up cleanups
> for this driver. I'll take a look at what Ezequiel has already sent
> out and see if it's still applicable on top.
>
Yes, I have other pending series, which I'll resend after rebasing on
this v11. But those are limited to internal NAND driver clean-up only
And do not touch DT or any other dependent driver.
with regards, pekon
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 42+ messages in thread
* RE: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-10-30 21:30 ` Gupta, Pekon
0 siblings, 0 replies; 42+ messages in thread
From: Gupta, Pekon @ 2013-10-30 21:30 UTC (permalink / raw)
To: Brian Norris, Ezequiel Garcia
Cc: Mark Rutland, devicetree, Ian Campbell, Pawel Moll,
Arnd Bergmann, Artem Bityutskiy, tony, Avinash Philip,
Stephen Warren, jp.francois, Balbi, Felipe, Rob Herring,
Benoit Cousson, olof, linux-mtd, Ivan Djelic, linux-omap,
David Woodhouse
> From: Brian Norris [mailto:computersforpeace@gmail.com]
[...]
> I agree with Ezequiel's thoughts, since the excessive amount of noise
> in this patch series has delayed it significantly. But at this point,
> I think it has stabilized; we have reviews from the DT folks (thanks
> guys; please comment if you have an official "ack" to give), and I
> think we've retained backwards compatibility properly; I've combed
> through it a few times over the months; we have a third-party tester;
> and at this point, I'm sure we're all sick of this.
>
> So, without further delay: pushed all patches except path 8 to l2-mtd.git.
>
Thanks much ..
I'll ensure that my next series are more logically aligned.
> Tony, you mentioned the DTS update in patch 8 going in via an ARM
> tree? This patch is not urgent, and it should probably wait until we
> know what release the rest of the series makes it into. This may
> depend on David Woodhouse's recommendation, but I'm not sure this
> series will have enough time baking in linux-next before entering
> mainline in 3.13 (the merge window is approaching).
>
> Pekon/Ezequiel/others: please feel free to send any follow up cleanups
> for this driver. I'll take a look at what Ezequiel has already sent
> out and see if it's still applicable on top.
>
Yes, I have other pending series, which I'll resend after rebasing on
this v11. But those are limited to internal NAND driver clean-up only
And do not touch DT or any other dependent driver.
with regards, pekon
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
2013-10-30 3:59 ` Brian Norris
@ 2013-10-31 21:23 ` Tony Lindgren
-1 siblings, 0 replies; 42+ messages in thread
From: Tony Lindgren @ 2013-10-31 21:23 UTC (permalink / raw)
To: Brian Norris
Cc: Ezequiel Garcia, Pekon Gupta, Mark Rutland, olof,
Artem Bityutskiy, devicetree, Pawel Moll, Arnd Bergmann,
Stephen Warren, jp.francois, Ian Campbell, Avinash Philip, Balbi,
Felipe, Rob Herring, Benoit Cousson, linux-mtd, Ivan Djelic,
linux-omap, David Woodhouse
* Brian Norris <computersforpeace@gmail.com> [131029 21:00]:
>
> Tony, you mentioned the DTS update in patch 8 going in via an ARM
> tree? This patch is not urgent, and it should probably wait until we
> know what release the rest of the series makes it into. This may
> depend on David Woodhouse's recommendation, but I'm not sure this
> series will have enough time baking in linux-next before entering
> mainline in 3.13 (the merge window is approaching).
Yes Benoit or I can apply that patch if Pekon pings me or resends
that patch when it's OK to merge it.
Regards,
Tony
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-10-31 21:23 ` Tony Lindgren
0 siblings, 0 replies; 42+ messages in thread
From: Tony Lindgren @ 2013-10-31 21:23 UTC (permalink / raw)
To: Brian Norris
Cc: Mark Rutland, devicetree, Ian Campbell, Arnd Bergmann,
Pawel Moll, Artem Bityutskiy, Avinash Philip, Stephen Warren,
jp.francois, Balbi, Felipe, Rob Herring, Pekon Gupta,
Ezequiel Garcia, olof, Benoit Cousson, Ivan Djelic, linux-omap,
David Woodhouse, linux-mtd
* Brian Norris <computersforpeace@gmail.com> [131029 21:00]:
>
> Tony, you mentioned the DTS update in patch 8 going in via an ARM
> tree? This patch is not urgent, and it should probably wait until we
> know what release the rest of the series makes it into. This may
> depend on David Woodhouse's recommendation, but I'm not sure this
> series will have enough time baking in linux-next before entering
> mainline in 3.13 (the merge window is approaching).
Yes Benoit or I can apply that patch if Pekon pings me or resends
that patch when it's OK to merge it.
Regards,
Tony
^ permalink raw reply [flat|nested] 42+ messages in thread
* RE: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
2013-10-31 21:23 ` Tony Lindgren
@ 2013-11-01 20:10 ` Gupta, Pekon
-1 siblings, 0 replies; 42+ messages in thread
From: Gupta, Pekon @ 2013-11-01 20:10 UTC (permalink / raw)
To: Tony Lindgren, Brian Norris
Cc: Mark Rutland, devicetree, Ian Campbell, Arnd Bergmann,
Pawel Moll, Artem Bityutskiy, Avinash Philip, Stephen Warren,
jp.francois, Balbi, Felipe, Rob Herring, Ezequiel Garcia, olof,
Benoit Cousson, Ivan Djelic, linux-omap, David Woodhouse,
linux-mtd
Hi Tony,
> From: Tony Lindgren
> > * Brian Norris <computersforpeace@gmail.com> [131029 21:00]:
> > Tony, you mentioned the DTS update in patch 8 going in via an ARM
> > tree? This patch is not urgent, and it should probably wait until we
> > know what release the rest of the series makes it into. This may
> > depend on David Woodhouse's recommendation, but I'm not sure this
> > series will have enough time baking in linux-next before entering
> > mainline in 3.13 (the merge window is approaching).
>
> Yes Benoit or I can apply that patch if Pekon pings me or resends
> that patch when it's OK to merge it.
>
Yes, I'll keep track of this and would resend you and Benoit the .dts patch
separately when this these binding updates are merged in kernel.
with regards, pekon
^ permalink raw reply [flat|nested] 42+ messages in thread
* RE: [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes
@ 2013-11-01 20:10 ` Gupta, Pekon
0 siblings, 0 replies; 42+ messages in thread
From: Gupta, Pekon @ 2013-11-01 20:10 UTC (permalink / raw)
To: Tony Lindgren, Brian Norris
Cc: Mark Rutland, devicetree, Arnd Bergmann, Pawel Moll,
Artem Bityutskiy, jp.francois, Ian Campbell, Avinash Philip,
Balbi, Felipe, olof, Rob Herring, Ezequiel Garcia,
Stephen Warren, Benoit Cousson, Ivan Djelic, linux-omap,
David Woodhouse, linux-mtd
Hi Tony,
> From: Tony Lindgren
> > * Brian Norris <computersforpeace@gmail.com> [131029 21:00]:
> > Tony, you mentioned the DTS update in patch 8 going in via an ARM
> > tree? This patch is not urgent, and it should probably wait until we
> > know what release the rest of the series makes it into. This may
> > depend on David Woodhouse's recommendation, but I'm not sure this
> > series will have enough time baking in linux-next before entering
> > mainline in 3.13 (the merge window is approaching).
>
> Yes Benoit or I can apply that patch if Pekon pings me or resends
> that patch when it's OK to merge it.
>
Yes, I'll keep track of this and would resend you and Benoit the .dts patch
separately when this these binding updates are merged in kernel.
with regards, pekon
^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2013-11-01 20:10 UTC | newest]
Thread overview: 42+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-10-24 12:50 [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 12:50 ` [PATCH v11 01/10] ARM: OMAP2+: cleaned-up DT support of various " Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 12:50 ` [PATCH v11 02/10] mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 12:50 ` [PATCH v11 03/10] mtd: nand: omap: cleanup: replace local references with generic framework names Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 12:50 ` [PATCH v11 04/10] mtd: nand: omap: use DT specified bus-width only for scanning NAND device Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 21:27 ` Ezequiel Garcia
2013-10-24 21:27 ` Ezequiel Garcia
2013-10-24 22:43 ` Brian Norris
2013-10-24 22:43 ` Brian Norris
2013-10-24 22:49 ` Ezequiel Garcia
2013-10-24 22:49 ` Ezequiel Garcia
2013-10-24 12:50 ` [PATCH v11 05/10] mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 12:50 ` [PATCH v11 07/10] mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 12:50 ` [PATCH v11 08/10] ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 12:50 ` [PATCH v11 09/10] mtd: nand: omap: updated devm_xx for all resource allocation and free calls Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
[not found] ` <1382619026-4182-1-git-send-email-pekon-l0cyMroinI0@public.gmane.org>
2013-10-24 12:50 ` [PATCH v11 06/10] mtd: nand: omap: clean-up ecc layout for BCH ecc schemes Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 12:50 ` [PATCH v11 10/10] mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig Pekon Gupta
2013-10-24 12:50 ` Pekon Gupta
2013-10-24 13:52 ` [PATCH v11 00/10] [PATCH v10 00/10] mtd:nand:omap2: clean-up of supported ECC schemes Ezequiel Garcia
2013-10-24 13:52 ` Ezequiel Garcia
2013-10-30 3:59 ` Brian Norris
2013-10-30 3:59 ` Brian Norris
2013-10-30 9:16 ` Ezequiel Garcia
2013-10-30 9:16 ` Ezequiel Garcia
2013-10-30 21:30 ` Gupta, Pekon
2013-10-30 21:30 ` Gupta, Pekon
2013-10-31 21:23 ` Tony Lindgren
2013-10-31 21:23 ` Tony Lindgren
2013-11-01 20:10 ` Gupta, Pekon
2013-11-01 20:10 ` Gupta, Pekon
2013-10-25 10:56 ` Ezequiel Garcia
2013-10-25 10:56 ` Ezequiel Garcia
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