[PATCH 1/3] drm: Add LCD display clock polarity flags

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Marek Vasut]

Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
property can be properly handled by drivers using the DRM API.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
---
 drivers/gpu/drm/drm_modes.c | 5 +++++
 include/uapi/drm/drm_mode.h | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 85071a1..d1f3bfc 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -537,6 +537,11 @@ int drm_display_mode_from_videomode(const struct videomode *vm,
 		dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
 	if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
 		dmode->flags |= DRM_MODE_FLAG_DBLCLK;
+	if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
+		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_PPOL;
+	else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_NPOL;
+
 	drm_mode_set_name(dmode);
 
 	return 0;
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index f104c26..a6169ca 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -73,6 +73,9 @@
 #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
 
+/* CRTC LCD clock polarity flags. */
+#define DRM_MODE_FLAG_PIXELCLK_PPOL		(1<<19)
+#define DRM_MODE_FLAG_PIXELCLK_NPOL		(1<<20)
 
 /* DPMS flags */
 /* bit compatible with the xorg definitions. */
-- 
1.8.4.2

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Marek Vasut]

Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
property can be properly handled by drivers using the DRM API.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
---
 drivers/gpu/drm/drm_modes.c | 5 +++++
 include/uapi/drm/drm_mode.h | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 85071a1..d1f3bfc 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -537,6 +537,11 @@ int drm_display_mode_from_videomode(const struct videomode *vm,
 		dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
 	if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
 		dmode->flags |= DRM_MODE_FLAG_DBLCLK;
+	if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
+		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_PPOL;
+	else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_NPOL;
+
 	drm_mode_set_name(dmode);
 
 	return 0;
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index f104c26..a6169ca 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -73,6 +73,9 @@
 #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
 
+/* CRTC LCD clock polarity flags. */
+#define DRM_MODE_FLAG_PIXELCLK_PPOL		(1<<19)
+#define DRM_MODE_FLAG_PIXELCLK_NPOL		(1<<20)
 
 /* DPMS flags */
 /* bit compatible with the xorg definitions. */
-- 
1.8.4.2

[PATCH 2/3] imx-drm: ipuv3-crtc: Make DISP_CLK polarity configurable

[Marek Vasut]

This patch makes the LCD display clock polarity configurable via DT so in case
board needs different DISP_CLK clock polarity, it can use the 'pixelclk-active'
DT prop to do such adjustment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
---
 drivers/staging/imx-drm/ipuv3-crtc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c
index ce6ba98..1d8223e 100644
--- a/drivers/staging/imx-drm/ipuv3-crtc.c
+++ b/drivers/staging/imx-drm/ipuv3-crtc.c
@@ -157,7 +157,7 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc,
 		sig_cfg.Vsync_pol = 1;
 
 	sig_cfg.enable_pol = 1;
-	sig_cfg.clk_pol = 1;
+	sig_cfg.clk_pol = !!(mode->flags & DRM_MODE_FLAG_PIXELCLK_NPOL);
 	sig_cfg.width = mode->hdisplay;
 	sig_cfg.height = mode->vdisplay;
 	sig_cfg.pixel_fmt = out_pixel_fmt;
-- 
1.8.4.2

[PATCH 2/3] imx-drm: ipuv3-crtc: Make DISP_CLK polarity configurable

[Marek Vasut]

This patch makes the LCD display clock polarity configurable via DT so in case
board needs different DISP_CLK clock polarity, it can use the 'pixelclk-active'
DT prop to do such adjustment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
---
 drivers/staging/imx-drm/ipuv3-crtc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c
index ce6ba98..1d8223e 100644
--- a/drivers/staging/imx-drm/ipuv3-crtc.c
+++ b/drivers/staging/imx-drm/ipuv3-crtc.c
@@ -157,7 +157,7 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc,
 		sig_cfg.Vsync_pol = 1;
 
 	sig_cfg.enable_pol = 1;
-	sig_cfg.clk_pol = 1;
+	sig_cfg.clk_pol = !!(mode->flags & DRM_MODE_FLAG_PIXELCLK_NPOL);
 	sig_cfg.width = mode->hdisplay;
 	sig_cfg.height = mode->vdisplay;
 	sig_cfg.pixel_fmt = out_pixel_fmt;
-- 
1.8.4.2

[PATCH 3/3] ARM: dts: imx53: Switch DISP_CLK polarity on M53EVK

[Marek Vasut]

Change the DISP_CLK line polarity on M53EVK to work correctly after
the following commit:

commit f0ac9bebf19001f38afbb93e2dc719a15dfb75e5
Author: Fabio Estevam <fabio.estevam@freescale.com>
Date:   Tue Oct 29 19:42:22 2013 -0200

    imx-drm: ipuv3-crtc: Invert IPU DI0 clock polarity

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/boot/dts/imx53-m53evk.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index 84a2cdc..97ec9c7 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -41,6 +41,7 @@
 					vfront-porch = <9>;
 					vsync-len = <3>;
 					vsync-active = <1>;
+					pixelclk-active = <1>;
 				};
 			};
 		};
-- 
1.8.4.2

[PATCH 3/3] ARM: dts: imx53: Switch DISP_CLK polarity on M53EVK

[Marek Vasut]

Change the DISP_CLK line polarity on M53EVK to work correctly after
the following commit:

commit f0ac9bebf19001f38afbb93e2dc719a15dfb75e5
Author: Fabio Estevam <fabio.estevam@freescale.com>
Date:   Tue Oct 29 19:42:22 2013 -0200

    imx-drm: ipuv3-crtc: Invert IPU DI0 clock polarity

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm/boot/dts/imx53-m53evk.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index 84a2cdc..97ec9c7 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -41,6 +41,7 @@
 					vfront-porch = <9>;
 					vsync-len = <3>;
 					vsync-active = <1>;
+					pixelclk-active = <1>;
 				};
 			};
 		};
-- 
1.8.4.2

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Russell King - ARM Linux]

On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
> property can be properly handled by drivers using the DRM API.

I still say that not even this should be part of the DRM mode API to
userspace.  The hint that you're changing the user API is that you're
modifying a header file below a 'uapi' directory.

The settings of double scan, sync polarity etc are all part of the
display mode specification (check CEA-861 documents).  Things like
pixel clock polarity are not part of the mode specification, they're
a property of the display itself and are independent of the mode.

Therefore, they should not be part of struct drm_mode_modeinfo.

Re: [PATCH 1/3] drm: Add LCD display clock polarity flags

[Russell King - ARM Linux]

On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
> property can be properly handled by drivers using the DRM API.

I still say that not even this should be part of the DRM mode API to
userspace.  The hint that you're changing the user API is that you're
modifying a header file below a 'uapi' directory.

The settings of double scan, sync polarity etc are all part of the
display mode specification (check CEA-861 documents).  Things like
pixel clock polarity are not part of the mode specification, they're
a property of the display itself and are independent of the mode.

Therefore, they should not be part of struct drm_mode_modeinfo.

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Rob Clark]

On Mon, Dec 2, 2013 at 3:01 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
>> Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
>> property can be properly handled by drivers using the DRM API.
>
> I still say that not even this should be part of the DRM mode API to
> userspace.  The hint that you're changing the user API is that you're
> modifying a header file below a 'uapi' directory.
>
> The settings of double scan, sync polarity etc are all part of the
> display mode specification (check CEA-861 documents).  Things like
> pixel clock polarity are not part of the mode specification, they're
> a property of the display itself and are independent of the mode.
>
> Therefore, they should not be part of struct drm_mode_modeinfo.

Note that we could make them part of drm_display_mode (but
drm_crtc_convert_to_umode() should filter them out when copying from
drm_mode_modeinfo.. I agree this information should not be coming from
userspace).  Seems like the sort of thing that the bridge or encoder
could set on the adjusted_mode.

BR,
-R


> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/3] drm: Add LCD display clock polarity flags

[Rob Clark]

On Mon, Dec 2, 2013 at 3:01 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
>> Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
>> property can be properly handled by drivers using the DRM API.
>
> I still say that not even this should be part of the DRM mode API to
> userspace.  The hint that you're changing the user API is that you're
> modifying a header file below a 'uapi' directory.
>
> The settings of double scan, sync polarity etc are all part of the
> display mode specification (check CEA-861 documents).  Things like
> pixel clock polarity are not part of the mode specification, they're
> a property of the display itself and are independent of the mode.
>
> Therefore, they should not be part of struct drm_mode_modeinfo.

Note that we could make them part of drm_display_mode (but
drm_crtc_convert_to_umode() should filter them out when copying from
drm_mode_modeinfo.. I agree this information should not be coming from
userspace).  Seems like the sort of thing that the bridge or encoder
could set on the adjusted_mode.

BR,
-R


> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Marek Vasut]

Hello Russell,

> On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> > Add DRM flags for the LCD display clock polarity so the pixelclk-active
> > DT property can be properly handled by drivers using the DRM API.
> 
> I still say that not even this should be part of the DRM mode API to
> userspace.  The hint that you're changing the user API is that you're
> modifying a header file below a 'uapi' directory.

OK, you are right.

> The settings of double scan, sync polarity etc are all part of the
> display mode specification (check CEA-861 documents).  Things like
> pixel clock polarity are not part of the mode specification, they're
> a property of the display itself and are independent of the mode.
> 
> Therefore, they should not be part of struct drm_mode_modeinfo.

Can you please provide me with some more hint here ? As for as I understand, 
using the 'pixelclk-active' DT prop in the 'display-timings' node for this 
purpose is correct, yes ? What I don't quite grok down is how do I get this 
information from DT into the imx-drm driver.

Thanks!

Best regards,
Marek Vasut

Re: [PATCH 1/3] drm: Add LCD display clock polarity flags

[Marek Vasut]

Hello Russell,

> On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> > Add DRM flags for the LCD display clock polarity so the pixelclk-active
> > DT property can be properly handled by drivers using the DRM API.
> 
> I still say that not even this should be part of the DRM mode API to
> userspace.  The hint that you're changing the user API is that you're
> modifying a header file below a 'uapi' directory.

OK, you are right.

> The settings of double scan, sync polarity etc are all part of the
> display mode specification (check CEA-861 documents).  Things like
> pixel clock polarity are not part of the mode specification, they're
> a property of the display itself and are independent of the mode.
> 
> Therefore, they should not be part of struct drm_mode_modeinfo.

Can you please provide me with some more hint here ? As for as I understand, 
using the 'pixelclk-active' DT prop in the 'display-timings' node for this 
purpose is correct, yes ? What I don't quite grok down is how do I get this 
information from DT into the imx-drm driver.

Thanks!

Best regards,
Marek Vasut

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Ville Syrjälä]

On Mon, Dec 02, 2013 at 03:32:30PM -0500, Rob Clark wrote:
> On Mon, Dec 2, 2013 at 3:01 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> >> Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
> >> property can be properly handled by drivers using the DRM API.
> >
> > I still say that not even this should be part of the DRM mode API to
> > userspace.  The hint that you're changing the user API is that you're
> > modifying a header file below a 'uapi' directory.
> >
> > The settings of double scan, sync polarity etc are all part of the
> > display mode specification (check CEA-861 documents).  Things like
> > pixel clock polarity are not part of the mode specification, they're
> > a property of the display itself and are independent of the mode.
> >
> > Therefore, they should not be part of struct drm_mode_modeinfo.
> 
> Note that we could make them part of drm_display_mode (but
> drm_crtc_convert_to_umode() should filter them out when copying from
> drm_mode_modeinfo.. I agree this information should not be coming from
> userspace).  Seems like the sort of thing that the bridge or encoder
> could set on the adjusted_mode.

Probably better to not mix user visible and internal flags in
drm_display_mode.flags. Just makes it more difficult to add
real flags. Maybe just stick them into private_flags for the
drivers that care.

-- 
Ville Syrj?l?
Intel OTC

Re: [PATCH 1/3] drm: Add LCD display clock polarity flags

[Ville Syrjälä]

On Mon, Dec 02, 2013 at 03:32:30PM -0500, Rob Clark wrote:
> On Mon, Dec 2, 2013 at 3:01 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> >> Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
> >> property can be properly handled by drivers using the DRM API.
> >
> > I still say that not even this should be part of the DRM mode API to
> > userspace.  The hint that you're changing the user API is that you're
> > modifying a header file below a 'uapi' directory.
> >
> > The settings of double scan, sync polarity etc are all part of the
> > display mode specification (check CEA-861 documents).  Things like
> > pixel clock polarity are not part of the mode specification, they're
> > a property of the display itself and are independent of the mode.
> >
> > Therefore, they should not be part of struct drm_mode_modeinfo.
> 
> Note that we could make them part of drm_display_mode (but
> drm_crtc_convert_to_umode() should filter them out when copying from
> drm_mode_modeinfo.. I agree this information should not be coming from
> userspace).  Seems like the sort of thing that the bridge or encoder
> could set on the adjusted_mode.

Probably better to not mix user visible and internal flags in
drm_display_mode.flags. Just makes it more difficult to add
real flags. Maybe just stick them into private_flags for the
drivers that care.

-- 
Ville Syrjälä
Intel OTC

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Shawn Guo]

On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
> property can be properly handled by drivers using the DRM API.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Dave Airlie <airlied@gmail.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawn.guo@linaro.org>
> ---
>  drivers/gpu/drm/drm_modes.c | 5 +++++
>  include/uapi/drm/drm_mode.h | 3 +++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> index 85071a1..d1f3bfc 100644
> --- a/drivers/gpu/drm/drm_modes.c
> +++ b/drivers/gpu/drm/drm_modes.c
> @@ -537,6 +537,11 @@ int drm_display_mode_from_videomode(const struct videomode *vm,
>  		dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
>  	if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
>  		dmode->flags |= DRM_MODE_FLAG_DBLCLK;
> +	if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
> +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_PPOL;
> +	else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
> +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_NPOL;
> +
>  	drm_mode_set_name(dmode);
>  
>  	return 0;
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index f104c26..a6169ca 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -73,6 +73,9 @@
>  #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
>  #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
>  
> +/* CRTC LCD clock polarity flags. */
> +#define DRM_MODE_FLAG_PIXELCLK_PPOL		(1<<19)
> +#define DRM_MODE_FLAG_PIXELCLK_NPOL		(1<<20)

Marek,

It looks that Denis (copied) is working on the same problem, so you may
want to be aware of his effort [1][2].

Shawn

[1] http://thread.gmane.org/gmane.linux.drivers.driver-project.devel/42832
[2] http://thread.gmane.org/gmane.linux.drivers.driver-project.devel/42850/focus=279646

>  
>  /* DPMS flags */
>  /* bit compatible with the xorg definitions. */
> -- 
> 1.8.4.2
> 

Re: [PATCH 1/3] drm: Add LCD display clock polarity flags

[Shawn Guo]

On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
> property can be properly handled by drivers using the DRM API.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Dave Airlie <airlied@gmail.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawn.guo@linaro.org>
> ---
>  drivers/gpu/drm/drm_modes.c | 5 +++++
>  include/uapi/drm/drm_mode.h | 3 +++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> index 85071a1..d1f3bfc 100644
> --- a/drivers/gpu/drm/drm_modes.c
> +++ b/drivers/gpu/drm/drm_modes.c
> @@ -537,6 +537,11 @@ int drm_display_mode_from_videomode(const struct videomode *vm,
>  		dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
>  	if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
>  		dmode->flags |= DRM_MODE_FLAG_DBLCLK;
> +	if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
> +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_PPOL;
> +	else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
> +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_NPOL;
> +
>  	drm_mode_set_name(dmode);
>  
>  	return 0;
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index f104c26..a6169ca 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -73,6 +73,9 @@
>  #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
>  #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
>  
> +/* CRTC LCD clock polarity flags. */
> +#define DRM_MODE_FLAG_PIXELCLK_PPOL		(1<<19)
> +#define DRM_MODE_FLAG_PIXELCLK_NPOL		(1<<20)

Marek,

It looks that Denis (copied) is working on the same problem, so you may
want to be aware of his effort [1][2].

Shawn

[1] http://thread.gmane.org/gmane.linux.drivers.driver-project.devel/42832
[2] http://thread.gmane.org/gmane.linux.drivers.driver-project.devel/42850/focus=279646

>  
>  /* DPMS flags */
>  /* bit compatible with the xorg definitions. */
> -- 
> 1.8.4.2
> 

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Russell King - ARM Linux]

On Tue, Dec 03, 2013 at 07:44:52PM +0800, Shawn Guo wrote:
> On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> > Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
> > property can be properly handled by drivers using the DRM API.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Dave Airlie <airlied@gmail.com>
> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Shawn Guo <shawn.guo@linaro.org>
> > ---
> >  drivers/gpu/drm/drm_modes.c | 5 +++++
> >  include/uapi/drm/drm_mode.h | 3 +++
> >  2 files changed, 8 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> > index 85071a1..d1f3bfc 100644
> > --- a/drivers/gpu/drm/drm_modes.c
> > +++ b/drivers/gpu/drm/drm_modes.c
> > @@ -537,6 +537,11 @@ int drm_display_mode_from_videomode(const struct videomode *vm,
> >  		dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
> >  	if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
> >  		dmode->flags |= DRM_MODE_FLAG_DBLCLK;
> > +	if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
> > +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_PPOL;
> > +	else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
> > +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_NPOL;
> > +
> >  	drm_mode_set_name(dmode);
> >  
> >  	return 0;
> > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> > index f104c26..a6169ca 100644
> > --- a/include/uapi/drm/drm_mode.h
> > +++ b/include/uapi/drm/drm_mode.h
> > @@ -73,6 +73,9 @@
> >  #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
> >  #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
> >  
> > +/* CRTC LCD clock polarity flags. */
> > +#define DRM_MODE_FLAG_PIXELCLK_PPOL		(1<<19)
> > +#define DRM_MODE_FLAG_PIXELCLK_NPOL		(1<<20)
> 
> Marek,
> 
> It looks that Denis (copied) is working on the same problem, so you may
> want to be aware of his effort [1][2].

Indeed, and I made very similar comments in that thread.

Re: [PATCH 1/3] drm: Add LCD display clock polarity flags

[Russell King - ARM Linux]

On Tue, Dec 03, 2013 at 07:44:52PM +0800, Shawn Guo wrote:
> On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> > Add DRM flags for the LCD display clock polarity so the pixelclk-active DT
> > property can be properly handled by drivers using the DRM API.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Dave Airlie <airlied@gmail.com>
> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Shawn Guo <shawn.guo@linaro.org>
> > ---
> >  drivers/gpu/drm/drm_modes.c | 5 +++++
> >  include/uapi/drm/drm_mode.h | 3 +++
> >  2 files changed, 8 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> > index 85071a1..d1f3bfc 100644
> > --- a/drivers/gpu/drm/drm_modes.c
> > +++ b/drivers/gpu/drm/drm_modes.c
> > @@ -537,6 +537,11 @@ int drm_display_mode_from_videomode(const struct videomode *vm,
> >  		dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
> >  	if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
> >  		dmode->flags |= DRM_MODE_FLAG_DBLCLK;
> > +	if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
> > +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_PPOL;
> > +	else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
> > +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_NPOL;
> > +
> >  	drm_mode_set_name(dmode);
> >  
> >  	return 0;
> > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> > index f104c26..a6169ca 100644
> > --- a/include/uapi/drm/drm_mode.h
> > +++ b/include/uapi/drm/drm_mode.h
> > @@ -73,6 +73,9 @@
> >  #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
> >  #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
> >  
> > +/* CRTC LCD clock polarity flags. */
> > +#define DRM_MODE_FLAG_PIXELCLK_PPOL		(1<<19)
> > +#define DRM_MODE_FLAG_PIXELCLK_NPOL		(1<<20)
> 
> Marek,
> 
> It looks that Denis (copied) is working on the same problem, so you may
> want to be aware of his effort [1][2].

Indeed, and I made very similar comments in that thread.

[PATCH 1/3] drm: Add LCD display clock polarity flags

[Marek Vasut]

On Tuesday, December 03, 2013 at 12:44:52 PM, Shawn Guo wrote:
> On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> > Add DRM flags for the LCD display clock polarity so the pixelclk-active
> > DT property can be properly handled by drivers using the DRM API.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Dave Airlie <airlied@gmail.com>
> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Shawn Guo <shawn.guo@linaro.org>
> > ---
> > 
> >  drivers/gpu/drm/drm_modes.c | 5 +++++
> >  include/uapi/drm/drm_mode.h | 3 +++
> >  2 files changed, 8 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> > index 85071a1..d1f3bfc 100644
> > --- a/drivers/gpu/drm/drm_modes.c
> > +++ b/drivers/gpu/drm/drm_modes.c
> > @@ -537,6 +537,11 @@ int drm_display_mode_from_videomode(const struct
> > videomode *vm,
> > 
> >  		dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
> >  	
> >  	if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
> >  	
> >  		dmode->flags |= DRM_MODE_FLAG_DBLCLK;
> > 
> > +	if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
> > +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_PPOL;
> > +	else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
> > +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_NPOL;
> > +
> > 
> >  	drm_mode_set_name(dmode);
> >  	
> >  	return 0;
> > 
> > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> > index f104c26..a6169ca 100644
> > --- a/include/uapi/drm/drm_mode.h
> > +++ b/include/uapi/drm/drm_mode.h
> > @@ -73,6 +73,9 @@
> > 
> >  #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
> >  #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
> > 
> > +/* CRTC LCD clock polarity flags. */
> > +#define DRM_MODE_FLAG_PIXELCLK_PPOL		(1<<19)
> > +#define DRM_MODE_FLAG_PIXELCLK_NPOL		(1<<20)
> 
> Marek,
> 
> It looks that Denis (copied) is working on the same problem, so you may
> want to be aware of his effort [1][2].

He also just sent a new patchset, so I would focus on his work instead. It makes 
more sense as he is not breaking the userland stuff.

Thank you Shawn, Russell!

Best regards,
Marek Vasut

Re: [PATCH 1/3] drm: Add LCD display clock polarity flags

[Marek Vasut]

On Tuesday, December 03, 2013 at 12:44:52 PM, Shawn Guo wrote:
> On Mon, Dec 02, 2013 at 04:39:26PM +0100, Marek Vasut wrote:
> > Add DRM flags for the LCD display clock polarity so the pixelclk-active
> > DT property can be properly handled by drivers using the DRM API.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Dave Airlie <airlied@gmail.com>
> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Shawn Guo <shawn.guo@linaro.org>
> > ---
> > 
> >  drivers/gpu/drm/drm_modes.c | 5 +++++
> >  include/uapi/drm/drm_mode.h | 3 +++
> >  2 files changed, 8 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> > index 85071a1..d1f3bfc 100644
> > --- a/drivers/gpu/drm/drm_modes.c
> > +++ b/drivers/gpu/drm/drm_modes.c
> > @@ -537,6 +537,11 @@ int drm_display_mode_from_videomode(const struct
> > videomode *vm,
> > 
> >  		dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
> >  	
> >  	if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
> >  	
> >  		dmode->flags |= DRM_MODE_FLAG_DBLCLK;
> > 
> > +	if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
> > +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_PPOL;
> > +	else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
> > +		dmode->flags |= DRM_MODE_FLAG_PIXELCLK_NPOL;
> > +
> > 
> >  	drm_mode_set_name(dmode);
> >  	
> >  	return 0;
> > 
> > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> > index f104c26..a6169ca 100644
> > --- a/include/uapi/drm/drm_mode.h
> > +++ b/include/uapi/drm/drm_mode.h
> > @@ -73,6 +73,9 @@
> > 
> >  #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
> >  #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
> > 
> > +/* CRTC LCD clock polarity flags. */
> > +#define DRM_MODE_FLAG_PIXELCLK_PPOL		(1<<19)
> > +#define DRM_MODE_FLAG_PIXELCLK_NPOL		(1<<20)
> 
> Marek,
> 
> It looks that Denis (copied) is working on the same problem, so you may
> want to be aware of his effort [1][2].

He also just sent a new patchset, so I would focus on his work instead. It makes 
more sense as he is not breaking the userland stuff.

Thank you Shawn, Russell!

Best regards,
Marek Vasut