All of lore.kernel.org
 help / color / mirror / Atom feed
* 'power well on' trace in Linus current tree.
@ 2013-12-13 15:09 Dave Jones
  2013-12-13 17:37   ` Paulo Zanoni
  0 siblings, 1 reply; 7+ messages in thread
From: Dave Jones @ 2013-12-13 15:09 UTC (permalink / raw)
  To: daniel.vetter; +Cc: intel-gfx, Linux Kernel

I left this on overnight, and this morning this was in the log.

	Dave

WARNING: CPU: 1 PID: 131 at drivers/gpu/drm/i915/intel_display.c:6309 hsw_enable_pc8_work+0x6a9/0x6d0()
Power well on
Modules linked in: tun hidp bnep rfcomm can_raw can_bcm caif_socket caif phonet af_rxrpc bluetooth can llc2 pppoe pppox ppp_generic slhc af_key rose netrom snd_seq_dummy ipt_ULOG nfnetlink nfc af_802154 irda crc_ccitt rds scsi_transport_iscsi x25 atm appletalk ipx p8023 psnap p8022 llc ax25 cfg80211 rfkill snd_hda_codec_hdmi xfs snd_hda_codec_realtek snd_hda_intel snd_hda_codec coretemp snd_hwdep hwmon snd_seq snd_seq_device x86_pkg_temp_thermal snd_pcm libcrc32c snd_page_alloc e1000e snd_timer snd kvm_intel kvm crct10dif_pclmul crc32c_intel ghash_clmulni_intel shpchp serio_raw pcspkr ptp usb_debug soundcore microcode pps_core
CPU: 1 PID: 131 Comm: kworker/1:2 Not tainted 3.13.0-rc3+ #3
Workqueue: events hsw_enable_pc8_work
 ffffffff81a98b80 ffff88023d185c98 ffffffff8174cfd8 ffff88023d185ce0
 ffff88023d185cd0 ffffffff8105414d ffff88023e28d5f8 ffff88023e288000
 ffff88024155ef50 ffff88024155ef58 0000000000000080 ffff88023d185d30
Call Trace:
 [<ffffffff8174cfd8>] dump_stack+0x4e/0x7a
 [<ffffffff8105414d>] warn_slowpath_common+0x7d/0xa0
 [<ffffffff810541bc>] warn_slowpath_fmt+0x4c/0x50
 [<ffffffff81493339>] hsw_enable_pc8_work+0x6a9/0x6d0
 [<ffffffff81076611>] process_one_work+0x211/0x6f0
 [<ffffffff810765a5>] ? process_one_work+0x1a5/0x6f0
 [<ffffffff81076c0b>] worker_thread+0x11b/0x3a0
 [<ffffffff81076af0>] ? process_one_work+0x6f0/0x6f0
 [<ffffffff8107f55f>] kthread+0xff/0x120
 [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
 [<ffffffff817608ac>] ret_from_fork+0x7c/0xb0
 [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
---[ end trace 23d69c0f014b7eb8 ]---


00:02.0 8086:0412 VGA compatible controller: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor Integrated Graphics Controller (rev 06)


^ permalink raw reply	[flat|nested] 7+ messages in thread
* Re: [Intel-gfx] 'power well on' trace in Linus current tree.
  2013-12-13 15:09 'power well on' trace in Linus current tree Dave Jones
@ 2013-12-13 17:37   ` Paulo Zanoni
  0 siblings, 0 replies; 7+ messages in thread
From: Paulo Zanoni @ 2013-12-13 17:37 UTC (permalink / raw)
  To: Dave Jones, Daniel Vetter, Intel Graphics Development, Linux Kernel

Hi

2013/12/13 Dave Jones <davej@redhat.com>:
> I left this on overnight, and this morning this was in the log.
>
>         Dave
>
> WARNING: CPU: 1 PID: 131 at drivers/gpu/drm/i915/intel_display.c:6309 hsw_enable_pc8_work+0x6a9/0x6d0()
> Power well on
> Modules linked in: tun hidp bnep rfcomm can_raw can_bcm caif_socket caif phonet af_rxrpc bluetooth can llc2 pppoe pppox ppp_generic slhc af_key rose netrom snd_seq_dummy ipt_ULOG nfnetlink nfc af_802154 irda crc_ccitt rds scsi_transport_iscsi x25 atm appletalk ipx p8023 psnap p8022 llc ax25 cfg80211 rfkill snd_hda_codec_hdmi xfs snd_hda_codec_realtek snd_hda_intel snd_hda_codec coretemp snd_hwdep hwmon snd_seq snd_seq_device x86_pkg_temp_thermal snd_pcm libcrc32c snd_page_alloc e1000e snd_timer snd kvm_intel kvm crct10dif_pclmul crc32c_intel ghash_clmulni_intel shpchp serio_raw pcspkr ptp usb_debug soundcore microcode pps_core
> CPU: 1 PID: 131 Comm: kworker/1:2 Not tainted 3.13.0-rc3+ #3
> Workqueue: events hsw_enable_pc8_work
>  ffffffff81a98b80 ffff88023d185c98 ffffffff8174cfd8 ffff88023d185ce0
>  ffff88023d185cd0 ffffffff8105414d ffff88023e28d5f8 ffff88023e288000
>  ffff88024155ef50 ffff88024155ef58 0000000000000080 ffff88023d185d30
> Call Trace:
>  [<ffffffff8174cfd8>] dump_stack+0x4e/0x7a
>  [<ffffffff8105414d>] warn_slowpath_common+0x7d/0xa0
>  [<ffffffff810541bc>] warn_slowpath_fmt+0x4c/0x50
>  [<ffffffff81493339>] hsw_enable_pc8_work+0x6a9/0x6d0
>  [<ffffffff81076611>] process_one_work+0x211/0x6f0
>  [<ffffffff810765a5>] ? process_one_work+0x1a5/0x6f0
>  [<ffffffff81076c0b>] worker_thread+0x11b/0x3a0
>  [<ffffffff81076af0>] ? process_one_work+0x6f0/0x6f0
>  [<ffffffff8107f55f>] kthread+0xff/0x120
>  [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
>  [<ffffffff817608ac>] ret_from_fork+0x7c/0xb0
>  [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
> ---[ end trace 23d69c0f014b7eb8 ]---

It looks like we need "drm/i915: get a PC8 reference when enabling the
power well" in -fixes instead of -next. For completeness, we should
probably also move "drm/i915: change CRTC assertion on LCPLL disable"
to -fixes. My bad, I forgot to tag them as patches for -fixes. Or we
could just disable PC8 by default. Daniel, how do you want to proceed?

The mentioned patches:

http://cgit.freedesktop.org/~danvet/drm-intel/commit/?h=drm-intel-next-queued&id=d62292c8f778772d1b6ec125d461c8c16fdc0417
http://cgit.freedesktop.org/~danvet/drm-intel/commit/?h=drm-intel-next-queued&id=798183c54799fbe1e5a5bfabb3a8c0505ffd2149


>
>
> 00:02.0 8086:0412 VGA compatible controller: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor Integrated Graphics Controller (rev 06)
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

^ permalink raw reply	[flat|nested] 7+ messages in thread
* Re: 'power well on' trace in Linus current tree.
@ 2013-12-13 17:37   ` Paulo Zanoni
  0 siblings, 0 replies; 7+ messages in thread
From: Paulo Zanoni @ 2013-12-13 17:37 UTC (permalink / raw)
  To: Dave Jones, Daniel Vetter, Intel Graphics Development, Linux Kernel

Hi

2013/12/13 Dave Jones <davej@redhat.com>:
> I left this on overnight, and this morning this was in the log.
>
>         Dave
>
> WARNING: CPU: 1 PID: 131 at drivers/gpu/drm/i915/intel_display.c:6309 hsw_enable_pc8_work+0x6a9/0x6d0()
> Power well on
> Modules linked in: tun hidp bnep rfcomm can_raw can_bcm caif_socket caif phonet af_rxrpc bluetooth can llc2 pppoe pppox ppp_generic slhc af_key rose netrom snd_seq_dummy ipt_ULOG nfnetlink nfc af_802154 irda crc_ccitt rds scsi_transport_iscsi x25 atm appletalk ipx p8023 psnap p8022 llc ax25 cfg80211 rfkill snd_hda_codec_hdmi xfs snd_hda_codec_realtek snd_hda_intel snd_hda_codec coretemp snd_hwdep hwmon snd_seq snd_seq_device x86_pkg_temp_thermal snd_pcm libcrc32c snd_page_alloc e1000e snd_timer snd kvm_intel kvm crct10dif_pclmul crc32c_intel ghash_clmulni_intel shpchp serio_raw pcspkr ptp usb_debug soundcore microcode pps_core
> CPU: 1 PID: 131 Comm: kworker/1:2 Not tainted 3.13.0-rc3+ #3
> Workqueue: events hsw_enable_pc8_work
>  ffffffff81a98b80 ffff88023d185c98 ffffffff8174cfd8 ffff88023d185ce0
>  ffff88023d185cd0 ffffffff8105414d ffff88023e28d5f8 ffff88023e288000
>  ffff88024155ef50 ffff88024155ef58 0000000000000080 ffff88023d185d30
> Call Trace:
>  [<ffffffff8174cfd8>] dump_stack+0x4e/0x7a
>  [<ffffffff8105414d>] warn_slowpath_common+0x7d/0xa0
>  [<ffffffff810541bc>] warn_slowpath_fmt+0x4c/0x50
>  [<ffffffff81493339>] hsw_enable_pc8_work+0x6a9/0x6d0
>  [<ffffffff81076611>] process_one_work+0x211/0x6f0
>  [<ffffffff810765a5>] ? process_one_work+0x1a5/0x6f0
>  [<ffffffff81076c0b>] worker_thread+0x11b/0x3a0
>  [<ffffffff81076af0>] ? process_one_work+0x6f0/0x6f0
>  [<ffffffff8107f55f>] kthread+0xff/0x120
>  [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
>  [<ffffffff817608ac>] ret_from_fork+0x7c/0xb0
>  [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
> ---[ end trace 23d69c0f014b7eb8 ]---

It looks like we need "drm/i915: get a PC8 reference when enabling the
power well" in -fixes instead of -next. For completeness, we should
probably also move "drm/i915: change CRTC assertion on LCPLL disable"
to -fixes. My bad, I forgot to tag them as patches for -fixes. Or we
could just disable PC8 by default. Daniel, how do you want to proceed?

The mentioned patches:

http://cgit.freedesktop.org/~danvet/drm-intel/commit/?h=drm-intel-next-queued&id=d62292c8f778772d1b6ec125d461c8c16fdc0417
http://cgit.freedesktop.org/~danvet/drm-intel/commit/?h=drm-intel-next-queued&id=798183c54799fbe1e5a5bfabb3a8c0505ffd2149


>
>
> 00:02.0 8086:0412 VGA compatible controller: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor Integrated Graphics Controller (rev 06)
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

^ permalink raw reply	[flat|nested] 7+ messages in thread
* Re: [Intel-gfx] 'power well on' trace in Linus current tree.
  2013-12-13 17:37   ` Paulo Zanoni
@ 2013-12-13 17:46     ` Daniel Vetter
  -1 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2013-12-13 17:46 UTC (permalink / raw)
  To: Paulo Zanoni
  Cc: Dave Jones, Daniel Vetter, Intel Graphics Development, Linux Kernel

On Fri, Dec 13, 2013 at 03:37:07PM -0200, Paulo Zanoni wrote:
> Hi
> 
> 2013/12/13 Dave Jones <davej@redhat.com>:
> > I left this on overnight, and this morning this was in the log.
> >
> >         Dave
> >
> > WARNING: CPU: 1 PID: 131 at drivers/gpu/drm/i915/intel_display.c:6309 hsw_enable_pc8_work+0x6a9/0x6d0()
> > Power well on
> > Modules linked in: tun hidp bnep rfcomm can_raw can_bcm caif_socket caif phonet af_rxrpc bluetooth can llc2 pppoe pppox ppp_generic slhc af_key rose netrom snd_seq_dummy ipt_ULOG nfnetlink nfc af_802154 irda crc_ccitt rds scsi_transport_iscsi x25 atm appletalk ipx p8023 psnap p8022 llc ax25 cfg80211 rfkill snd_hda_codec_hdmi xfs snd_hda_codec_realtek snd_hda_intel snd_hda_codec coretemp snd_hwdep hwmon snd_seq snd_seq_device x86_pkg_temp_thermal snd_pcm libcrc32c snd_page_alloc e1000e snd_timer snd kvm_intel kvm crct10dif_pclmul crc32c_intel ghash_clmulni_intel shpchp serio_raw pcspkr ptp usb_debug soundcore microcode pps_core
> > CPU: 1 PID: 131 Comm: kworker/1:2 Not tainted 3.13.0-rc3+ #3
> > Workqueue: events hsw_enable_pc8_work
> >  ffffffff81a98b80 ffff88023d185c98 ffffffff8174cfd8 ffff88023d185ce0
> >  ffff88023d185cd0 ffffffff8105414d ffff88023e28d5f8 ffff88023e288000
> >  ffff88024155ef50 ffff88024155ef58 0000000000000080 ffff88023d185d30
> > Call Trace:
> >  [<ffffffff8174cfd8>] dump_stack+0x4e/0x7a
> >  [<ffffffff8105414d>] warn_slowpath_common+0x7d/0xa0
> >  [<ffffffff810541bc>] warn_slowpath_fmt+0x4c/0x50
> >  [<ffffffff81493339>] hsw_enable_pc8_work+0x6a9/0x6d0
> >  [<ffffffff81076611>] process_one_work+0x211/0x6f0
> >  [<ffffffff810765a5>] ? process_one_work+0x1a5/0x6f0
> >  [<ffffffff81076c0b>] worker_thread+0x11b/0x3a0
> >  [<ffffffff81076af0>] ? process_one_work+0x6f0/0x6f0
> >  [<ffffffff8107f55f>] kthread+0xff/0x120
> >  [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
> >  [<ffffffff817608ac>] ret_from_fork+0x7c/0xb0
> >  [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
> > ---[ end trace 23d69c0f014b7eb8 ]---
> 
> It looks like we need "drm/i915: get a PC8 reference when enabling the
> power well" in -fixes instead of -next. For completeness, we should
> probably also move "drm/i915: change CRTC assertion on LCPLL disable"
> to -fixes. My bad, I forgot to tag them as patches for -fixes. Or we
> could just disable PC8 by default. Daniel, how do you want to proceed?
> 
> The mentioned patches:
> 
> http://cgit.freedesktop.org/~danvet/drm-intel/commit/?h=drm-intel-next-queued&id=d62292c8f778772d1b6ec125d461c8c16fdc0417

This one here doesn't really apply on -fixes due to Imre's power well
rework. Care to send a rebased version?

> http://cgit.freedesktop.org/~danvet/drm-intel/commit/?h=drm-intel-next-queued&id=798183c54799fbe1e5a5bfabb3a8c0505ffd2149

I've tentatively moved this one to my -fixes queue, it's benign enough.

Thanks, Daniel
> 
> 
> >
> >
> > 00:02.0 8086:0412 VGA compatible controller: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor Integrated Graphics Controller (rev 06)
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 7+ messages in thread
* Re: 'power well on' trace in Linus current tree.
@ 2013-12-13 17:46     ` Daniel Vetter
  0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2013-12-13 17:46 UTC (permalink / raw)
  To: Paulo Zanoni
  Cc: Dave Jones, Intel Graphics Development, Linux Kernel, Daniel Vetter

On Fri, Dec 13, 2013 at 03:37:07PM -0200, Paulo Zanoni wrote:
> Hi
> 
> 2013/12/13 Dave Jones <davej@redhat.com>:
> > I left this on overnight, and this morning this was in the log.
> >
> >         Dave
> >
> > WARNING: CPU: 1 PID: 131 at drivers/gpu/drm/i915/intel_display.c:6309 hsw_enable_pc8_work+0x6a9/0x6d0()
> > Power well on
> > Modules linked in: tun hidp bnep rfcomm can_raw can_bcm caif_socket caif phonet af_rxrpc bluetooth can llc2 pppoe pppox ppp_generic slhc af_key rose netrom snd_seq_dummy ipt_ULOG nfnetlink nfc af_802154 irda crc_ccitt rds scsi_transport_iscsi x25 atm appletalk ipx p8023 psnap p8022 llc ax25 cfg80211 rfkill snd_hda_codec_hdmi xfs snd_hda_codec_realtek snd_hda_intel snd_hda_codec coretemp snd_hwdep hwmon snd_seq snd_seq_device x86_pkg_temp_thermal snd_pcm libcrc32c snd_page_alloc e1000e snd_timer snd kvm_intel kvm crct10dif_pclmul crc32c_intel ghash_clmulni_intel shpchp serio_raw pcspkr ptp usb_debug soundcore microcode pps_core
> > CPU: 1 PID: 131 Comm: kworker/1:2 Not tainted 3.13.0-rc3+ #3
> > Workqueue: events hsw_enable_pc8_work
> >  ffffffff81a98b80 ffff88023d185c98 ffffffff8174cfd8 ffff88023d185ce0
> >  ffff88023d185cd0 ffffffff8105414d ffff88023e28d5f8 ffff88023e288000
> >  ffff88024155ef50 ffff88024155ef58 0000000000000080 ffff88023d185d30
> > Call Trace:
> >  [<ffffffff8174cfd8>] dump_stack+0x4e/0x7a
> >  [<ffffffff8105414d>] warn_slowpath_common+0x7d/0xa0
> >  [<ffffffff810541bc>] warn_slowpath_fmt+0x4c/0x50
> >  [<ffffffff81493339>] hsw_enable_pc8_work+0x6a9/0x6d0
> >  [<ffffffff81076611>] process_one_work+0x211/0x6f0
> >  [<ffffffff810765a5>] ? process_one_work+0x1a5/0x6f0
> >  [<ffffffff81076c0b>] worker_thread+0x11b/0x3a0
> >  [<ffffffff81076af0>] ? process_one_work+0x6f0/0x6f0
> >  [<ffffffff8107f55f>] kthread+0xff/0x120
> >  [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
> >  [<ffffffff817608ac>] ret_from_fork+0x7c/0xb0
> >  [<ffffffff8107f460>] ? insert_kthread_work+0x80/0x80
> > ---[ end trace 23d69c0f014b7eb8 ]---
> 
> It looks like we need "drm/i915: get a PC8 reference when enabling the
> power well" in -fixes instead of -next. For completeness, we should
> probably also move "drm/i915: change CRTC assertion on LCPLL disable"
> to -fixes. My bad, I forgot to tag them as patches for -fixes. Or we
> could just disable PC8 by default. Daniel, how do you want to proceed?
> 
> The mentioned patches:
> 
> http://cgit.freedesktop.org/~danvet/drm-intel/commit/?h=drm-intel-next-queued&id=d62292c8f778772d1b6ec125d461c8c16fdc0417

This one here doesn't really apply on -fixes due to Imre's power well
rework. Care to send a rebased version?

> http://cgit.freedesktop.org/~danvet/drm-intel/commit/?h=drm-intel-next-queued&id=798183c54799fbe1e5a5bfabb3a8c0505ffd2149

I've tentatively moved this one to my -fixes queue, it's benign enough.

Thanks, Daniel
> 
> 
> >
> >
> > 00:02.0 8086:0412 VGA compatible controller: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor Integrated Graphics Controller (rev 06)
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 7+ messages in thread
* [PATCH] drm/i915: get a PC8 reference when enabling the power well
  2013-12-13 17:46     ` Daniel Vetter
  (?)
@ 2013-12-13 19:46     ` Paulo Zanoni
  2013-12-13 20:36       ` Daniel Vetter
  -1 siblings, 1 reply; 7+ messages in thread
From: Paulo Zanoni @ 2013-12-13 19:46 UTC (permalink / raw)
  To: intel-gfx; +Cc: Paulo Zanoni

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

In the current code, at haswell_modeset_global_resources, first we
decide if we want to enable/disable the power well, then we decide if
we want to enable/disable PC8. On the case where we're enabling PC8
this works fine, but on the case where we disable PC8 due to a non-eDP
monitor being enabled, we first enable the power well and then disable
PC8. Although wrong, this doesn't seem to be causing any problems now,
and we don't even see anything in dmesg. But the patches for runtime
D3 turn this problem into a real bug, so we need to fix it.

This fixes the "modeset-non-lpsp" subtest from the "pm_pc8" test from
intel-gpu-tools.

v2: - Rebase (i915_disable_power_well).
v3: - More reabase.
v4: - Rebase on top of -fixes instead of -nightly.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3657ab4..26c29c1 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5688,6 +5688,8 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
 	unsigned long irqflags;
 	uint32_t tmp;
 
+	WARN_ON(dev_priv->pc8.enabled);
+
 	tmp = I915_READ(HSW_PWR_WELL_DRIVER);
 	is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED;
 	enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST;
@@ -5747,16 +5749,24 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
 static void __intel_power_well_get(struct drm_device *dev,
 				   struct i915_power_well *power_well)
 {
-	if (!power_well->count++)
+	struct drm_i915_private *dev_priv = dev->dev_private;
+
+	if (!power_well->count++) {
+		hsw_disable_package_c8(dev_priv);
 		__intel_set_power_well(dev, true);
+	}
 }
 
 static void __intel_power_well_put(struct drm_device *dev,
 				   struct i915_power_well *power_well)
 {
+	struct drm_i915_private *dev_priv = dev->dev_private;
+
 	WARN_ON(!power_well->count);
-	if (!--power_well->count && i915_disable_power_well)
+	if (!--power_well->count && i915_disable_power_well) {
 		__intel_set_power_well(dev, false);
+		hsw_enable_package_c8(dev_priv);
+	}
 }
 
 void intel_display_power_get(struct drm_device *dev,
-- 
1.8.3.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: get a PC8 reference when enabling the power well
  2013-12-13 19:46     ` [PATCH] drm/i915: get a PC8 reference when enabling the power well Paulo Zanoni
@ 2013-12-13 20:36       ` Daniel Vetter
  0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2013-12-13 20:36 UTC (permalink / raw)
  To: Paulo Zanoni; +Cc: intel-gfx, Paulo Zanoni

On Fri, Dec 13, 2013 at 05:46:38PM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> In the current code, at haswell_modeset_global_resources, first we
> decide if we want to enable/disable the power well, then we decide if
> we want to enable/disable PC8. On the case where we're enabling PC8
> this works fine, but on the case where we disable PC8 due to a non-eDP
> monitor being enabled, we first enable the power well and then disable
> PC8. Although wrong, this doesn't seem to be causing any problems now,
> and we don't even see anything in dmesg. But the patches for runtime
> D3 turn this problem into a real bug, so we need to fix it.
> 
> This fixes the "modeset-non-lpsp" subtest from the "pm_pc8" test from
> intel-gpu-tools.
> 
> v2: - Rebase (i915_disable_power_well).
> v3: - More reabase.
> v4: - Rebase on top of -fixes instead of -nightly.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Applied to -fixes, thanks.
-Daniel
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 3657ab4..26c29c1 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5688,6 +5688,8 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
>  	unsigned long irqflags;
>  	uint32_t tmp;
>  
> +	WARN_ON(dev_priv->pc8.enabled);
> +
>  	tmp = I915_READ(HSW_PWR_WELL_DRIVER);
>  	is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED;
>  	enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST;
> @@ -5747,16 +5749,24 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
>  static void __intel_power_well_get(struct drm_device *dev,
>  				   struct i915_power_well *power_well)
>  {
> -	if (!power_well->count++)
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +
> +	if (!power_well->count++) {
> +		hsw_disable_package_c8(dev_priv);
>  		__intel_set_power_well(dev, true);
> +	}
>  }
>  
>  static void __intel_power_well_put(struct drm_device *dev,
>  				   struct i915_power_well *power_well)
>  {
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +
>  	WARN_ON(!power_well->count);
> -	if (!--power_well->count && i915_disable_power_well)
> +	if (!--power_well->count && i915_disable_power_well) {
>  		__intel_set_power_well(dev, false);
> +		hsw_enable_package_c8(dev_priv);
> +	}
>  }
>  
>  void intel_display_power_get(struct drm_device *dev,
> -- 
> 1.8.3.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 7+ messages in thread
end of thread, other threads:[~2013-12-13 20:35 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-12-13 15:09 'power well on' trace in Linus current tree Dave Jones
2013-12-13 17:37 ` [Intel-gfx] " Paulo Zanoni
2013-12-13 17:37   ` Paulo Zanoni
2013-12-13 17:46   ` [Intel-gfx] " Daniel Vetter
2013-12-13 17:46     ` Daniel Vetter
2013-12-13 19:46     ` [PATCH] drm/i915: get a PC8 reference when enabling the power well Paulo Zanoni
2013-12-13 20:36       ` Daniel Vetter

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.