[PATCH 1/2] MIPS: fix CONFIG_* error in fpu code

[PATCH 1/2] MIPS: fix CONFIG_* error in fpu code

[Huacai Chen]

Commit 597ce1723e0f (MIPS: Support for 64-bit FP with O32 binaries)
brings some CONFIG_MIPS64, but CONFIG_MIPS64 doesn't exist in any
Kconfig file. I guess the correct thing is CONFIG_64BIT, so fix it.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/include/asm/asmmacro.h |    4 ++--
 arch/mips/include/asm/fpu.h      |    2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 3220c93..69a9a22 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -106,7 +106,7 @@
 	.endm
 
 	.macro	fpu_save_double thread status tmp
-#if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2)
+#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
 	sll	\tmp, \status, 5
 	bgez	\tmp, 10f
 	fpu_save_16odd \thread
@@ -159,7 +159,7 @@
 	.endm
 
 	.macro	fpu_restore_double thread status tmp
-#if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2)
+#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
 	sll	\tmp, \status, 5
 	bgez	\tmp, 10f				# 16 register mode?
 
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index 6b97495..58e50cb 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -57,7 +57,7 @@ static inline int __enable_fpu(enum fpu_mode mode)
 		return 0;
 
 	case FPU_64BIT:
-#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_MIPS64))
+#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT))
 		/* we only have a 32-bit FPU */
 		return SIGFPE;
 #endif
-- 
1.7.7.3

[PATCH 2/2] MIPS: fpu: fix conflict of register usage

[Huacai Chen]

In _restore_fp_context/_restore_fp_context32, t0 is used for both
CP0_Status and CP1_FCSR. This is a mistake and cause FP exeception on
boot, so fix it.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/kernel/r4k_fpu.S |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 253b2fb..40bc159 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -146,7 +146,7 @@ LEAF(_save_fp_context32)
  *  - cp1 status/control register
  */
 LEAF(_restore_fp_context)
-	EX	lw t0, SC_FPC_CSR(a0)
+	EX	lw t1, SC_FPC_CSR(a0)
 
 #if defined(CONFIG_64BIT) || defined(CONFIG_MIPS32_R2)
 	.set	push
@@ -191,7 +191,7 @@ LEAF(_restore_fp_context)
 	EX	ldc1 $f26, SC_FPREGS+208(a0)
 	EX	ldc1 $f28, SC_FPREGS+224(a0)
 	EX	ldc1 $f30, SC_FPREGS+240(a0)
-	ctc1	t0, fcr31
+	ctc1	t1, fcr31
 	jr	ra
 	 li	v0, 0					# success
 	END(_restore_fp_context)
@@ -199,7 +199,7 @@ LEAF(_restore_fp_context)
 #ifdef CONFIG_MIPS32_COMPAT
 LEAF(_restore_fp_context32)
 	/* Restore an o32 sigcontext.  */
-	EX	lw t0, SC32_FPC_CSR(a0)
+	EX	lw t1, SC32_FPC_CSR(a0)
 
 	mfc0	t0, CP0_STATUS
 	sll	t0, t0, 5
@@ -239,7 +239,7 @@ LEAF(_restore_fp_context32)
 	EX	ldc1 $f26, SC32_FPREGS+208(a0)
 	EX	ldc1 $f28, SC32_FPREGS+224(a0)
 	EX	ldc1 $f30, SC32_FPREGS+240(a0)
-	ctc1	t0, fcr31
+	ctc1	t1, fcr31
 	jr	ra
 	 li	v0, 0					# success
 	END(_restore_fp_context32)
-- 
1.7.7.3

Re: [PATCH 1/2] MIPS: fix CONFIG_* error in fpu code

[Aaro Koskinen]

On Fri, Feb 07, 2014 at 10:31:32PM +0800, Huacai Chen wrote:
> Commit 597ce1723e0f (MIPS: Support for 64-bit FP with O32 binaries)
> brings some CONFIG_MIPS64, but CONFIG_MIPS64 doesn't exist in any
> Kconfig file. I guess the correct thing is CONFIG_64BIT, so fix it.
> 
> Signed-off-by: Huacai Chen <chenhc@lemote.com>

Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>

A.

Re: [PATCH 2/2] MIPS: fpu: fix conflict of register usage

[Aaro Koskinen]

On Fri, Feb 07, 2014 at 10:31:33PM +0800, Huacai Chen wrote:
> In _restore_fp_context/_restore_fp_context32, t0 is used for both
> CP0_Status and CP1_FCSR. This is a mistake and cause FP exeception on
> boot, so fix it.
> 
> Signed-off-by: Huacai Chen <chenhc@lemote.com>

Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>

This fixes a major regression (kernel panic during boot) on Loongson2.

Many thanks for the fix,

A.