* [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell.
@ 2014-02-27 7:59 Kenneth Graunke
2014-02-27 7:59 ` [PATCH 2/2] drm/i915: Add thread stall DOP clock gating " Kenneth Graunke
2014-02-27 8:43 ` [PATCH 1/2] drm/i915: Add a partial instruction shootdown " Ville Syrjälä
0 siblings, 2 replies; 7+ messages in thread
From: Kenneth Graunke @ 2014-02-27 7:59 UTC (permalink / raw)
To: intel-gfx; +Cc: ben
I believe this will be necessary on production hardware.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 4 ++++
2 files changed, 7 insertions(+)
I just realized tonight that my workarounds series never got merged.
After reviewing Ben and Chris's comments, I agree with all of them, so
I've dropped the unnecessary patches. I also believe I shouldn't need
the pre-production workarounds I sent last time, so I've dropped those.
These two should apply to production hardware, so we probably want them.
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ad75ff7..f36d5e0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5050,6 +5050,9 @@
#define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10)
#define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3)
+#define GEN8_ROW_CHICKEN 0xe4f0
+#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
+
#define GEN7_ROW_CHICKEN2 0xe4f4
#define GEN7_ROW_CHICKEN2_GT2 0xf4f4
#define DOP_CLOCK_GATING_DISABLE (1<<0)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4f01b04..df8ad21 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
/* FIXME(BDW): Check all the w/a, some might only apply to
* pre-production hw. */
+ /* WaDisablePartialInstShootdown */
+ I915_WRITE(GEN8_ROW_CHICKEN,
+ _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
+
/*
* This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
* pre-production hardware
--
1.8.4.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
2014-02-27 7:59 [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell Kenneth Graunke
@ 2014-02-27 7:59 ` Kenneth Graunke
2014-02-27 8:43 ` Ville Syrjälä
2014-02-27 8:43 ` [PATCH 1/2] drm/i915: Add a partial instruction shootdown " Ville Syrjälä
1 sibling, 1 reply; 7+ messages in thread
From: Kenneth Graunke @ 2014-02-27 7:59 UTC (permalink / raw)
To: intel-gfx; +Cc: ben
Ben and I believe this will be necessary on production hardware.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f36d5e0..ade1d71 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5052,6 +5052,7 @@
#define GEN8_ROW_CHICKEN 0xe4f0
#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
+#define STALL_DOP_GATING_DISABLE (1<<5)
#define GEN7_ROW_CHICKEN2 0xe4f4
#define GEN7_ROW_CHICKEN2_GT2 0xf4f4
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index df8ad21..226591d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4842,6 +4842,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
I915_WRITE(GEN8_ROW_CHICKEN,
_MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
+ /* WaDisableThreadStallDopClockGating:bdw */
+ I915_WRITE(GEN8_ROW_CHICKEN,
+ _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));
+
/*
* This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
* pre-production hardware
--
1.8.4.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell.
2014-02-27 7:59 [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell Kenneth Graunke
2014-02-27 7:59 ` [PATCH 2/2] drm/i915: Add thread stall DOP clock gating " Kenneth Graunke
@ 2014-02-27 8:43 ` Ville Syrjälä
2014-02-28 0:05 ` Ben Widawsky
1 sibling, 1 reply; 7+ messages in thread
From: Ville Syrjälä @ 2014-02-27 8:43 UTC (permalink / raw)
To: Kenneth Graunke; +Cc: intel-gfx, ben
On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote:
> I believe this will be necessary on production hardware.
>
> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 7 insertions(+)
>
> I just realized tonight that my workarounds series never got merged.
>
> After reviewing Ben and Chris's comments, I agree with all of them, so
> I've dropped the unnecessary patches. I also believe I shouldn't need
> the pre-production workarounds I sent last time, so I've dropped those.
>
> These two should apply to production hardware, so we probably want them.
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ad75ff7..f36d5e0 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5050,6 +5050,9 @@
> #define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10)
> #define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3)
>
> +#define GEN8_ROW_CHICKEN 0xe4f0
> +#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
> +
> #define GEN7_ROW_CHICKEN2 0xe4f4
> #define GEN7_ROW_CHICKEN2_GT2 0xf4f4
> #define DOP_CLOCK_GATING_DISABLE (1<<0)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4f01b04..df8ad21 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> /* FIXME(BDW): Check all the w/a, some might only apply to
> * pre-production hw. */
>
> + /* WaDisablePartialInstShootdown */
+:bdw
Apart from that:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> + I915_WRITE(GEN8_ROW_CHICKEN,
> + _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
> +
> /*
> * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
> * pre-production hardware
> --
> 1.8.4.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
2014-02-27 7:59 ` [PATCH 2/2] drm/i915: Add thread stall DOP clock gating " Kenneth Graunke
@ 2014-02-27 8:43 ` Ville Syrjälä
2014-02-27 9:08 ` Ville Syrjälä
0 siblings, 1 reply; 7+ messages in thread
From: Ville Syrjälä @ 2014-02-27 8:43 UTC (permalink / raw)
To: Kenneth Graunke; +Cc: intel-gfx, ben
On Wed, Feb 26, 2014 at 11:59:31PM -0800, Kenneth Graunke wrote:
> Ben and I believe this will be necessary on production hardware.
>
> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f36d5e0..ade1d71 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5052,6 +5052,7 @@
>
> #define GEN8_ROW_CHICKEN 0xe4f0
> #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
> +#define STALL_DOP_GATING_DISABLE (1<<5)
>
> #define GEN7_ROW_CHICKEN2 0xe4f4
> #define GEN7_ROW_CHICKEN2_GT2 0xf4f4
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index df8ad21..226591d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4842,6 +4842,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> I915_WRITE(GEN8_ROW_CHICKEN,
> _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
>
> + /* WaDisableThreadStallDopClockGating:bdw */
> + I915_WRITE(GEN8_ROW_CHICKEN,
> + _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));
The spec and w/a database are a bit confused on this, but I get the
impression that you're correct. So:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> +
> /*
> * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
> * pre-production hardware
> --
> 1.8.4.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
2014-02-27 8:43 ` Ville Syrjälä
@ 2014-02-27 9:08 ` Ville Syrjälä
0 siblings, 0 replies; 7+ messages in thread
From: Ville Syrjälä @ 2014-02-27 9:08 UTC (permalink / raw)
To: Kenneth Graunke; +Cc: intel-gfx, ben
On Thu, Feb 27, 2014 at 10:43:34AM +0200, Ville Syrjälä wrote:
> On Wed, Feb 26, 2014 at 11:59:31PM -0800, Kenneth Graunke wrote:
> > Ben and I believe this will be necessary on production hardware.
> >
> > Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> > 2 files changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index f36d5e0..ade1d71 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -5052,6 +5052,7 @@
> >
> > #define GEN8_ROW_CHICKEN 0xe4f0
> > #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
> > +#define STALL_DOP_GATING_DISABLE (1<<5)
> >
> > #define GEN7_ROW_CHICKEN2 0xe4f4
> > #define GEN7_ROW_CHICKEN2_GT2 0xf4f4
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index df8ad21..226591d 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4842,6 +4842,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> > I915_WRITE(GEN8_ROW_CHICKEN,
> > _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
> >
> > + /* WaDisableThreadStallDopClockGating:bdw */
> > + I915_WRITE(GEN8_ROW_CHICKEN,
> > + _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));
>
> The spec and w/a database are a bit confused on this, but I get the
> impression that you're correct. So:
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Actually I might have to take that back a bit. Looks more like it
shouldn't be needed for production hardware, but I'm guessing people
currently have hardware that needs it, so we should have it at least
for now.
>
> > +
> > /*
> > * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
> > * pre-production hardware
> > --
> > 1.8.4.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell.
2014-02-27 8:43 ` [PATCH 1/2] drm/i915: Add a partial instruction shootdown " Ville Syrjälä
@ 2014-02-28 0:05 ` Ben Widawsky
2014-03-05 14:48 ` Daniel Vetter
0 siblings, 1 reply; 7+ messages in thread
From: Ben Widawsky @ 2014-02-28 0:05 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Thu, Feb 27, 2014 at 10:43:24AM +0200, Ville Syrjälä wrote:
> On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote:
> > I believe this will be necessary on production hardware.
> >
> > Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> > 2 files changed, 7 insertions(+)
> >
> > I just realized tonight that my workarounds series never got merged.
> >
> > After reviewing Ben and Chris's comments, I agree with all of them, so
> > I've dropped the unnecessary patches. I also believe I shouldn't need
> > the pre-production workarounds I sent last time, so I've dropped those.
> >
> > These two should apply to production hardware, so we probably want them.
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index ad75ff7..f36d5e0 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -5050,6 +5050,9 @@
> > #define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10)
> > #define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3)
> >
> > +#define GEN8_ROW_CHICKEN 0xe4f0
> > +#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
> > +
> > #define GEN7_ROW_CHICKEN2 0xe4f4
> > #define GEN7_ROW_CHICKEN2_GT2 0xf4f4
> > #define DOP_CLOCK_GATING_DISABLE (1<<0)
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 4f01b04..df8ad21 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> > /* FIXME(BDW): Check all the w/a, some might only apply to
> > * pre-production hw. */
> >
> > + /* WaDisablePartialInstShootdown */
>
> +:bdw
>
> Apart from that:
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
I think they're both stable material.
And:
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
--
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell.
2014-02-28 0:05 ` Ben Widawsky
@ 2014-03-05 14:48 ` Daniel Vetter
0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2014-03-05 14:48 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx
On Thu, Feb 27, 2014 at 04:05:04PM -0800, Ben Widawsky wrote:
> On Thu, Feb 27, 2014 at 10:43:24AM +0200, Ville Syrjälä wrote:
> > On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote:
> > > I believe this will be necessary on production hardware.
> > >
> > > Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> > > ---
> > > drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > > drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> > > 2 files changed, 7 insertions(+)
> > >
> > > I just realized tonight that my workarounds series never got merged.
> > >
> > > After reviewing Ben and Chris's comments, I agree with all of them, so
> > > I've dropped the unnecessary patches. I also believe I shouldn't need
> > > the pre-production workarounds I sent last time, so I've dropped those.
> > >
> > > These two should apply to production hardware, so we probably want them.
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > > index ad75ff7..f36d5e0 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -5050,6 +5050,9 @@
> > > #define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10)
> > > #define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3)
> > >
> > > +#define GEN8_ROW_CHICKEN 0xe4f0
> > > +#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
> > > +
> > > #define GEN7_ROW_CHICKEN2 0xe4f4
> > > #define GEN7_ROW_CHICKEN2_GT2 0xf4f4
> > > #define DOP_CLOCK_GATING_DISABLE (1<<0)
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 4f01b04..df8ad21 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> > > /* FIXME(BDW): Check all the w/a, some might only apply to
> > > * pre-production hw. */
> > >
> > > + /* WaDisablePartialInstShootdown */
out of curiousity: Does ROW_CHICKEN survive a gpu reset? We've had fun
with this kind of stuff before ...
> >
> > +:bdw
> >
> > Apart from that:
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
>
> I think they're both stable material.
> And:
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Both merged to dinq. bdw in 3.13 is prelim, so would only need to go into
3.14-fixes. But there's too much bdw fixes floating (iirc 10 patches) that
some time to settle everything looks like the right approach.
I guess as the platform owner you're then signed up to assemeble a
backports branch for 3.14-bdw.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2014-03-05 14:48 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-02-27 7:59 [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell Kenneth Graunke
2014-02-27 7:59 ` [PATCH 2/2] drm/i915: Add thread stall DOP clock gating " Kenneth Graunke
2014-02-27 8:43 ` Ville Syrjälä
2014-02-27 9:08 ` Ville Syrjälä
2014-02-27 8:43 ` [PATCH 1/2] drm/i915: Add a partial instruction shootdown " Ville Syrjälä
2014-02-28 0:05 ` Ben Widawsky
2014-03-05 14:48 ` Daniel Vetter
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