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* [PATCH 0/2] Watchdog on Armada 375 SoC
@ 2014-02-26 12:50 ` Ezequiel Garcia
  0 siblings, 0 replies; 10+ messages in thread
From: Ezequiel Garcia @ 2014-02-26 12:50 UTC (permalink / raw)
  To: linux-arm-kernel, Jason Gunthorpe, linux-watchdog
  Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
	Thomas Petazzoni, Gregory Clement, Lior Amsalem, Tawfik Bayouk,
	Wim Van Sebroeck, Ezequiel Garcia

Now that we have watchdog support on Armada 370/XP SoC, and that the basic
infrastructure for Armada 375 SoC is in place, we can add watchdog support
on Armada 375 as well.

However, there's a specificity we need to handle in order to support watchdog,
related to the RSTOUT. First of all, let's review how we're currently handling
the RSTOUT in the SoCs supported by the orion-wdt driver.

Kirkwood/Dove
-------------

Has one bit for watchdog RSTOUT as part of the RSTOUT global register
that's shared with the system-controller. This could be handled by
mvebu/system-controller.c but instead it's handled in the driver, in order
to prevent a spurious wdt trigger.

In this patch [1] we suggested to handle RSTOUT in the system-controller,
but Jason Gunthorpe explained [2] it could cause a spurious trigger.

Armada 370/XP
-------------

Has a dedicated watchdog RSTOUT register. This is not shared but used by the
watchdog driver only, so in this case it's completely natural to deal with it
in the driver.

For the above reason, we decided to support the watchdog by extending the 'reg'
property to set the watchdog counter and the RSTOUT register offsets:

	watchdog-timer@20300 {
		compatible = "marvell,{soc}-wdt";
		reg = <0x20300 0x28>, <{RSOUT} 0x4>;
	};

Armada 375
----------

Here we found both the above RSTOUT:

1. It has the same dedicated register as A370/XP (0x20704)
2. Also has a bit in the shared RSTOUT register (0x18254)

Solutions
---------

1.

A possible solution is to extend the reg property in the watchdog devicetree
and allow for a new optional pair of cells to complete the specification of the
RSTOUT.

	watchdog-timer@20300 {
		compatible = "marvell,orion-wdt";
		reg = <0x20300 0x28
		       {shared RSOUT} 0x4
		       0x0 0x0>;
	};

	watchdog-timer@20300 {
		compatible = "marvell,armada-370-wdt";
		reg = <0x20300 0x28
		       0x0 0x0
		       {dedicated RSOUT} 0x4>;
	};

	watchdog-timer@20300 {
		compatible = "marvell,armada-375-wdt";
		reg = <0x20300 0x28>
		       shared RSTOUT 0x4
		       {dedicated RSOUT} 0x4>;
	};

2.

Another solution is to add a per-SoC initialization callback in
mvebu/system-controller.c and use it to unmask the Armada 375 shared
RSTOUT watchdog bit, allowing to use the already existent devicetree
binding.

In this scheme, the watchdog in A375 can be handled by the orion-wdt
driver, using the "armada-370-wdt" compatible string.

The current patchset goes with the latter, and implements such solution.

Patch 1 adds the devicetree node and depends on the mvebu/dt-3xx branch.
Patch 2 adds the system-controller RSTOUT unmask and depends on the
mvebu/soc-3xx branch.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-August/194958.html
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-August/195039.html

Ezequiel Garcia (2):
  ARM: mvebu: Enable Armada 375 watchdog in the devicetree
  ARM: mvebu: system-controller: Add A375 initialization

 arch/arm/boot/dts/armada-375.dtsi       |  6 ++++++
 arch/arm/mach-mvebu/system-controller.c | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)

-- 
1.8.1.5


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 0/2] Watchdog on Armada 375 SoC
@ 2014-02-26 12:50 ` Ezequiel Garcia
  0 siblings, 0 replies; 10+ messages in thread
From: Ezequiel Garcia @ 2014-02-26 12:50 UTC (permalink / raw)
  To: linux-arm-kernel

Now that we have watchdog support on Armada 370/XP SoC, and that the basic
infrastructure for Armada 375 SoC is in place, we can add watchdog support
on Armada 375 as well.

However, there's a specificity we need to handle in order to support watchdog,
related to the RSTOUT. First of all, let's review how we're currently handling
the RSTOUT in the SoCs supported by the orion-wdt driver.

Kirkwood/Dove
-------------

Has one bit for watchdog RSTOUT as part of the RSTOUT global register
that's shared with the system-controller. This could be handled by
mvebu/system-controller.c but instead it's handled in the driver, in order
to prevent a spurious wdt trigger.

In this patch [1] we suggested to handle RSTOUT in the system-controller,
but Jason Gunthorpe explained [2] it could cause a spurious trigger.

Armada 370/XP
-------------

Has a dedicated watchdog RSTOUT register. This is not shared but used by the
watchdog driver only, so in this case it's completely natural to deal with it
in the driver.

For the above reason, we decided to support the watchdog by extending the 'reg'
property to set the watchdog counter and the RSTOUT register offsets:

	watchdog-timer at 20300 {
		compatible = "marvell,{soc}-wdt";
		reg = <0x20300 0x28>, <{RSOUT} 0x4>;
	};

Armada 375
----------

Here we found both the above RSTOUT:

1. It has the same dedicated register as A370/XP (0x20704)
2. Also has a bit in the shared RSTOUT register (0x18254)

Solutions
---------

1.

A possible solution is to extend the reg property in the watchdog devicetree
and allow for a new optional pair of cells to complete the specification of the
RSTOUT.

	watchdog-timer at 20300 {
		compatible = "marvell,orion-wdt";
		reg = <0x20300 0x28
		       {shared RSOUT} 0x4
		       0x0 0x0>;
	};

	watchdog-timer at 20300 {
		compatible = "marvell,armada-370-wdt";
		reg = <0x20300 0x28
		       0x0 0x0
		       {dedicated RSOUT} 0x4>;
	};

	watchdog-timer at 20300 {
		compatible = "marvell,armada-375-wdt";
		reg = <0x20300 0x28>
		       shared RSTOUT 0x4
		       {dedicated RSOUT} 0x4>;
	};

2.

Another solution is to add a per-SoC initialization callback in
mvebu/system-controller.c and use it to unmask the Armada 375 shared
RSTOUT watchdog bit, allowing to use the already existent devicetree
binding.

In this scheme, the watchdog in A375 can be handled by the orion-wdt
driver, using the "armada-370-wdt" compatible string.

The current patchset goes with the latter, and implements such solution.

Patch 1 adds the devicetree node and depends on the mvebu/dt-3xx branch.
Patch 2 adds the system-controller RSTOUT unmask and depends on the
mvebu/soc-3xx branch.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-August/194958.html
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-August/195039.html

Ezequiel Garcia (2):
  ARM: mvebu: Enable Armada 375 watchdog in the devicetree
  ARM: mvebu: system-controller: Add A375 initialization

 arch/arm/boot/dts/armada-375.dtsi       |  6 ++++++
 arch/arm/mach-mvebu/system-controller.c | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)

-- 
1.8.1.5

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 1/2] ARM: mvebu: Enable Armada 375 watchdog in the devicetree
  2014-02-26 12:50 ` Ezequiel Garcia
@ 2014-02-26 12:50   ` Ezequiel Garcia
  -1 siblings, 0 replies; 10+ messages in thread
From: Ezequiel Garcia @ 2014-02-26 12:50 UTC (permalink / raw)
  To: linux-arm-kernel, Jason Gunthorpe, linux-watchdog
  Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
	Thomas Petazzoni, Gregory Clement, Lior Amsalem, Tawfik Bayouk,
	Wim Van Sebroeck, Ezequiel Garcia

Add the DT nodes to enable the watchdog support available on
Armada 375 SoC.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
 arch/arm/boot/dts/armada-375.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index 3877693f..a2003cb 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -320,6 +320,12 @@
 				clocks = <&coreclk 0>;
 			};
 
+			watchdog@20300 {
+				compatible = "marvell,armada-375-wdt", "marvell,armada-370-wdt";
+				reg = <0x20300 0x34>, <0x20704 0x4>;
+				clocks = <&coreclk 0>;
+			};
+
 			xor@60800 {
 				compatible = "marvell,orion-xor";
 				reg = <0x60800 0x100
-- 
1.8.1.5


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 1/2] ARM: mvebu: Enable Armada 375 watchdog in the devicetree
@ 2014-02-26 12:50   ` Ezequiel Garcia
  0 siblings, 0 replies; 10+ messages in thread
From: Ezequiel Garcia @ 2014-02-26 12:50 UTC (permalink / raw)
  To: linux-arm-kernel

Add the DT nodes to enable the watchdog support available on
Armada 375 SoC.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
 arch/arm/boot/dts/armada-375.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index 3877693f..a2003cb 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -320,6 +320,12 @@
 				clocks = <&coreclk 0>;
 			};
 
+			watchdog at 20300 {
+				compatible = "marvell,armada-375-wdt", "marvell,armada-370-wdt";
+				reg = <0x20300 0x34>, <0x20704 0x4>;
+				clocks = <&coreclk 0>;
+			};
+
 			xor at 60800 {
 				compatible = "marvell,orion-xor";
 				reg = <0x60800 0x100
-- 
1.8.1.5

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/2] ARM: mvebu: system-controller: Add A375 initialization
  2014-02-26 12:50 ` Ezequiel Garcia
@ 2014-02-26 12:50   ` Ezequiel Garcia
  -1 siblings, 0 replies; 10+ messages in thread
From: Ezequiel Garcia @ 2014-02-26 12:50 UTC (permalink / raw)
  To: linux-arm-kernel, Jason Gunthorpe, linux-watchdog
  Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
	Thomas Petazzoni, Gregory Clement, Lior Amsalem, Tawfik Bayouk,
	Wim Van Sebroeck, Ezequiel Garcia

The Armada 370/375/XP SoC family watchdog controller has a dedicated
RSTOUT register to mask/unmask the watchdog reset. However, the A375
SoC has also a bit to mask the watchdog reset (WDT_RSTOUT), in the RSTOUT
global register that is handled by the system-controller.

Therefore, let's add a per-SoC initialization routine to unmask the watchdog
reset in the shared system-controller register, in this initialization.
The dedicated register for watchdog RSTOUT is handled by the watchdog
driver, just as is done for the rest of mvebu SoCs.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
 arch/arm/mach-mvebu/system-controller.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index 614ba68..96c0a68 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -29,6 +29,8 @@
 #include <linux/reboot.h>
 #include "common.h"
 
+#define A375_RSTOUT_WDT_MASK BIT(10)
+
 static void __iomem *system_controller_base;
 
 struct mvebu_system_controller {
@@ -37,9 +39,33 @@ struct mvebu_system_controller {
 
 	u32 rstoutn_mask_reset_out_en;
 	u32 system_soft_reset;
+
+	int (*init)(void);
 };
 static struct mvebu_system_controller *mvebu_sc;
 
+int armada_375_system_controller_init(void)
+{
+	u32 reg;
+
+	/*
+	 * The Armada 370/375/XP SoC family watchdog controller has a
+	 * dedicated RSTOUT register to mask/unmask the watchdog reset.
+	 * However, the A375 SoC also has a bit to mask the watchdog reset
+	 * (WDT_RSTOUT), in the RSTOUT global register that is handled by the
+	 * system-controller.
+	 *
+	 * Therefore, we unmask the watchdog reset in the shared
+	 * system-controller register, in this initialization. The dedicated
+	 * register for watchdog RSTOUT is handled by the watchdog driver.
+	 */
+	reg = readl(system_controller_base + mvebu_sc->rstoutn_mask_offset);
+	reg &= ~A375_RSTOUT_WDT_MASK;
+	writel(reg, system_controller_base + mvebu_sc->rstoutn_mask_offset);
+
+	return 0;
+}
+
 static const struct mvebu_system_controller armada_370_xp_system_controller = {
 	.rstoutn_mask_offset = 0x60,
 	.system_soft_reset_offset = 0x64,
@@ -52,6 +78,7 @@ static const struct mvebu_system_controller armada_375_system_controller = {
 	.system_soft_reset_offset = 0x58,
 	.rstoutn_mask_reset_out_en = 0x1,
 	.system_soft_reset = 0x1,
+	.init = armada_375_system_controller_init,
 };
 
 static const struct mvebu_system_controller orion_system_controller = {
@@ -109,6 +136,9 @@ static int __init mvebu_system_controller_init(void)
 		system_controller_base = of_iomap(np, 0);
 		mvebu_sc = (struct mvebu_system_controller *)match->data;
 		of_node_put(np);
+
+		if (mvebu_sc->init)
+			mvebu_sc->init();
 	}
 
 	return 0;
-- 
1.8.1.5


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/2] ARM: mvebu: system-controller: Add A375 initialization
@ 2014-02-26 12:50   ` Ezequiel Garcia
  0 siblings, 0 replies; 10+ messages in thread
From: Ezequiel Garcia @ 2014-02-26 12:50 UTC (permalink / raw)
  To: linux-arm-kernel

The Armada 370/375/XP SoC family watchdog controller has a dedicated
RSTOUT register to mask/unmask the watchdog reset. However, the A375
SoC has also a bit to mask the watchdog reset (WDT_RSTOUT), in the RSTOUT
global register that is handled by the system-controller.

Therefore, let's add a per-SoC initialization routine to unmask the watchdog
reset in the shared system-controller register, in this initialization.
The dedicated register for watchdog RSTOUT is handled by the watchdog
driver, just as is done for the rest of mvebu SoCs.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
 arch/arm/mach-mvebu/system-controller.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index 614ba68..96c0a68 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -29,6 +29,8 @@
 #include <linux/reboot.h>
 #include "common.h"
 
+#define A375_RSTOUT_WDT_MASK BIT(10)
+
 static void __iomem *system_controller_base;
 
 struct mvebu_system_controller {
@@ -37,9 +39,33 @@ struct mvebu_system_controller {
 
 	u32 rstoutn_mask_reset_out_en;
 	u32 system_soft_reset;
+
+	int (*init)(void);
 };
 static struct mvebu_system_controller *mvebu_sc;
 
+int armada_375_system_controller_init(void)
+{
+	u32 reg;
+
+	/*
+	 * The Armada 370/375/XP SoC family watchdog controller has a
+	 * dedicated RSTOUT register to mask/unmask the watchdog reset.
+	 * However, the A375 SoC also has a bit to mask the watchdog reset
+	 * (WDT_RSTOUT), in the RSTOUT global register that is handled by the
+	 * system-controller.
+	 *
+	 * Therefore, we unmask the watchdog reset in the shared
+	 * system-controller register, in this initialization. The dedicated
+	 * register for watchdog RSTOUT is handled by the watchdog driver.
+	 */
+	reg = readl(system_controller_base + mvebu_sc->rstoutn_mask_offset);
+	reg &= ~A375_RSTOUT_WDT_MASK;
+	writel(reg, system_controller_base + mvebu_sc->rstoutn_mask_offset);
+
+	return 0;
+}
+
 static const struct mvebu_system_controller armada_370_xp_system_controller = {
 	.rstoutn_mask_offset = 0x60,
 	.system_soft_reset_offset = 0x64,
@@ -52,6 +78,7 @@ static const struct mvebu_system_controller armada_375_system_controller = {
 	.system_soft_reset_offset = 0x58,
 	.rstoutn_mask_reset_out_en = 0x1,
 	.system_soft_reset = 0x1,
+	.init = armada_375_system_controller_init,
 };
 
 static const struct mvebu_system_controller orion_system_controller = {
@@ -109,6 +136,9 @@ static int __init mvebu_system_controller_init(void)
 		system_controller_base = of_iomap(np, 0);
 		mvebu_sc = (struct mvebu_system_controller *)match->data;
 		of_node_put(np);
+
+		if (mvebu_sc->init)
+			mvebu_sc->init();
 	}
 
 	return 0;
-- 
1.8.1.5

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/2] Watchdog on Armada 375 SoC
  2014-02-26 12:50 ` Ezequiel Garcia
@ 2014-02-26 20:36   ` Jason Gunthorpe
  -1 siblings, 0 replies; 10+ messages in thread
From: Jason Gunthorpe @ 2014-02-26 20:36 UTC (permalink / raw)
  To: Ezequiel Garcia
  Cc: linux-arm-kernel, linux-watchdog, Jason Cooper, Andrew Lunn,
	Sebastian Hesselbarth, Thomas Petazzoni, Gregory Clement,
	Lior Amsalem, Tawfik Bayouk, Wim Van Sebroeck

On Wed, Feb 26, 2014 at 09:50:45AM -0300, Ezequiel Garcia wrote:
 
> Here we found both the above RSTOUT:
> 
> 1. It has the same dedicated register as A370/XP (0x20704)
> 2. Also has a bit in the shared RSTOUT register (0x18254)

Unless you know otherwise I think the same risk exists, RSTOUT could
be (or become) internally asserted when you unmask the bit in the
control register that drives the pin, which says the watchdog driver
should control to it.

> A possible solution is to extend the reg property in the watchdog
> devicetree and allow for a new optional pair of cells to complete
> the specification of the RSTOUT.
> 
> 	watchdog-timer@20300 {
> 		compatible = "marvell,orion-wdt";
> 		reg = <0x20300 0x28
> 		       {shared RSOUT} 0x4
> 		       0x0 0x0>;
> 	};

I wouldn't have the 0x0, if you want to go this way, just make the
375 compatible string require a 3 entry reg.

Jason

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 0/2] Watchdog on Armada 375 SoC
@ 2014-02-26 20:36   ` Jason Gunthorpe
  0 siblings, 0 replies; 10+ messages in thread
From: Jason Gunthorpe @ 2014-02-26 20:36 UTC (permalink / raw)
  To: linux-arm-kernel

On Wed, Feb 26, 2014 at 09:50:45AM -0300, Ezequiel Garcia wrote:
 
> Here we found both the above RSTOUT:
> 
> 1. It has the same dedicated register as A370/XP (0x20704)
> 2. Also has a bit in the shared RSTOUT register (0x18254)

Unless you know otherwise I think the same risk exists, RSTOUT could
be (or become) internally asserted when you unmask the bit in the
control register that drives the pin, which says the watchdog driver
should control to it.

> A possible solution is to extend the reg property in the watchdog
> devicetree and allow for a new optional pair of cells to complete
> the specification of the RSTOUT.
> 
> 	watchdog-timer at 20300 {
> 		compatible = "marvell,orion-wdt";
> 		reg = <0x20300 0x28
> 		       {shared RSOUT} 0x4
> 		       0x0 0x0>;
> 	};

I wouldn't have the 0x0, if you want to go this way, just make the
375 compatible string require a 3 entry reg.

Jason

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/2] Watchdog on Armada 375 SoC
  2014-02-26 20:36   ` Jason Gunthorpe
@ 2014-02-28 15:09     ` Ezequiel Garcia
  -1 siblings, 0 replies; 10+ messages in thread
From: Ezequiel Garcia @ 2014-02-28 15:09 UTC (permalink / raw)
  To: Jason Gunthorpe
  Cc: linux-arm-kernel, linux-watchdog, Jason Cooper, Andrew Lunn,
	Sebastian Hesselbarth, Thomas Petazzoni, Gregory Clement,
	Lior Amsalem, Tawfik Bayouk, Wim Van Sebroeck

On Wed, Feb 26, 2014 at 01:36:33PM -0700, Jason Gunthorpe wrote:
> On Wed, Feb 26, 2014 at 09:50:45AM -0300, Ezequiel Garcia wrote:
>  
> > Here we found both the above RSTOUT:
> > 
> > 1. It has the same dedicated register as A370/XP (0x20704)
> > 2. Also has a bit in the shared RSTOUT register (0x18254)
> 
> Unless you know otherwise I think the same risk exists, RSTOUT could
> be (or become) internally asserted when you unmask the bit in the
> control register that drives the pin, which says the watchdog driver
> should control to it.
> 

I guess it's also possible to have the system-controller ensure the
watchdog is fully stopped, before unmasking the shared RSTOUT.

However, it seems it would be too ugly and hackish.

> > 
> > 	watchdog-timer@20300 {
> > 		compatible = "marvell,orion-wdt";
> > 		reg = <0x20300 0x28
> > 		       {shared RSOUT} 0x4
> > 		       0x0 0x0>;
> > 	};
> 
> I wouldn't have the 0x0, if you want to go this way, just make the
> 375 compatible string require a 3 entry reg.
> 

Yes, this sounds like the right thing to do. It means we need to also
have per-SoC hooks for stop() and is_enabled(), but it's the price to
pay for changing the register semantic: the shared RSTOUT has unmask/mask
semantics on A375, while it's enable/disable on Kirkwood and friends.

Let me cook a new patch.
-- 
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
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^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 0/2] Watchdog on Armada 375 SoC
@ 2014-02-28 15:09     ` Ezequiel Garcia
  0 siblings, 0 replies; 10+ messages in thread
From: Ezequiel Garcia @ 2014-02-28 15:09 UTC (permalink / raw)
  To: linux-arm-kernel

On Wed, Feb 26, 2014 at 01:36:33PM -0700, Jason Gunthorpe wrote:
> On Wed, Feb 26, 2014 at 09:50:45AM -0300, Ezequiel Garcia wrote:
>  
> > Here we found both the above RSTOUT:
> > 
> > 1. It has the same dedicated register as A370/XP (0x20704)
> > 2. Also has a bit in the shared RSTOUT register (0x18254)
> 
> Unless you know otherwise I think the same risk exists, RSTOUT could
> be (or become) internally asserted when you unmask the bit in the
> control register that drives the pin, which says the watchdog driver
> should control to it.
> 

I guess it's also possible to have the system-controller ensure the
watchdog is fully stopped, before unmasking the shared RSTOUT.

However, it seems it would be too ugly and hackish.

> > 
> > 	watchdog-timer at 20300 {
> > 		compatible = "marvell,orion-wdt";
> > 		reg = <0x20300 0x28
> > 		       {shared RSOUT} 0x4
> > 		       0x0 0x0>;
> > 	};
> 
> I wouldn't have the 0x0, if you want to go this way, just make the
> 375 compatible string require a 3 entry reg.
> 

Yes, this sounds like the right thing to do. It means we need to also
have per-SoC hooks for stop() and is_enabled(), but it's the price to
pay for changing the register semantic: the shared RSTOUT has unmask/mask
semantics on A375, while it's enable/disable on Kirkwood and friends.

Let me cook a new patch.
-- 
Ezequiel Garc?a, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com

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2014-02-26 12:50 [PATCH 0/2] Watchdog on Armada 375 SoC Ezequiel Garcia
2014-02-26 12:50 ` Ezequiel Garcia
2014-02-26 12:50 ` [PATCH 1/2] ARM: mvebu: Enable Armada 375 watchdog in the devicetree Ezequiel Garcia
2014-02-26 12:50   ` Ezequiel Garcia
2014-02-26 12:50 ` [PATCH 2/2] ARM: mvebu: system-controller: Add A375 initialization Ezequiel Garcia
2014-02-26 12:50   ` Ezequiel Garcia
2014-02-26 20:36 ` [PATCH 0/2] Watchdog on Armada 375 SoC Jason Gunthorpe
2014-02-26 20:36   ` Jason Gunthorpe
2014-02-28 15:09   ` Ezequiel Garcia
2014-02-28 15:09     ` Ezequiel Garcia

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