* [PATCH] x86: set Pentium M as PAE capable @ 2014-02-25 6:01 Chris Bainbridge 2014-02-25 10:45 ` H. Peter Anvin 0 siblings, 1 reply; 40+ messages in thread From: Chris Bainbridge @ 2014-02-25 6:01 UTC (permalink / raw) To: x86; +Cc: linux-kernel Pentium M is PAE capable but does not indicate so in the CPUID response. This is an issue now that some distributions are no longer shipping non-PAE kernels (those distributions no longer boot on Pentium M). This small patch fixes the issue by forcing the PAE capability on Pentium M. For more discussion see https://bugs.launchpad.net/baltix/+bug/930447 Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> --- diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index bbe1b8b..97996aa 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -226,6 +226,12 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID bug: Pentium M reports no PAE but has PAE + */ + if ((c->x86 == 6) && ((c->x86_model == 9) || (c->x86_model == 13))) + set_cpu_cap(c, X86_FEATURE_PAE); + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-25 6:01 [PATCH] x86: set Pentium M as PAE capable Chris Bainbridge @ 2014-02-25 10:45 ` H. Peter Anvin 2014-02-25 11:35 ` Borislav Petkov ` (3 more replies) 0 siblings, 4 replies; 40+ messages in thread From: H. Peter Anvin @ 2014-02-25 10:45 UTC (permalink / raw) To: Chris Bainbridge, x86; +Cc: linux-kernel On 02/24/2014 10:01 PM, Chris Bainbridge wrote: > Pentium M is PAE capable but does not indicate so in the CPUID response. > This is an issue now that some distributions are no longer shipping > non-PAE kernels (those distributions no longer boot on Pentium M). This > small patch fixes the issue by forcing the PAE capability on Pentium M. > > For more discussion see https://bugs.launchpad.net/baltix/+bug/930447 > 1. This patch doesn't match the discussion in the link. 2. You would have to also enable this in the cpu testing code in arch/x86/boot. 3. At the very least we need to print a serious warning that the CPU is being run outside its specifications. I have no personal information about why this CPUID bit was disabled, but it could be that it was discovered in testing that it didn't work correctly in all circumstances (e.g. high temperature.) This is very much "use at your own risk..."; you could get data corruption or even hardware damage. We should probably also taint the kernel. -hpa ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-25 10:45 ` H. Peter Anvin @ 2014-02-25 11:35 ` Borislav Petkov 2014-02-25 12:06 ` Peter Hurley ` (2 subsequent siblings) 3 siblings, 0 replies; 40+ messages in thread From: Borislav Petkov @ 2014-02-25 11:35 UTC (permalink / raw) To: H. Peter Anvin; +Cc: Chris Bainbridge, x86, linux-kernel On Tue, Feb 25, 2014 at 02:45:57AM -0800, H. Peter Anvin wrote: > On 02/24/2014 10:01 PM, Chris Bainbridge wrote: > >Pentium M is PAE capable but does not indicate so in the CPUID response. > >This is an issue now that some distributions are no longer shipping > >non-PAE kernels (those distributions no longer boot on Pentium M). This > >small patch fixes the issue by forcing the PAE capability on Pentium M. > > > >For more discussion see https://bugs.launchpad.net/baltix/+bug/930447 > > > > 1. This patch doesn't match the discussion in the link. > 2. You would have to also enable this in the cpu testing code in > arch/x86/boot. > 3. At the very least we need to print a serious warning that the CPU > is being run outside its specifications. I have no personal > information about why this CPUID bit was disabled, but it could be > that it was discovered in testing that it didn't work correctly in > all circumstances (e.g. high temperature.) This is very much "use > at your own risk..."; you could get data corruption or even > hardware damage. > > We should probably also taint the kernel. Right, I was about to say that. And since there's no special bit for running "out-of-spec", we could probably repurpose TAINT_UNSAFE_SMP - 'S' - SMP with CPUs not designed for SMP. to TAINT_UNSAFE_OUT_OF_SPEC (the letter S fits still) and add that taint everytime we're enforcing functionality against doctor's orders, so to speak. :-) Hmm. -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-25 10:45 ` H. Peter Anvin 2014-02-25 11:35 ` Borislav Petkov @ 2014-02-25 12:06 ` Peter Hurley 2014-02-25 12:07 ` One Thousand Gnomes 2014-02-25 16:26 ` Dave Jones 3 siblings, 0 replies; 40+ messages in thread From: Peter Hurley @ 2014-02-25 12:06 UTC (permalink / raw) To: Chris Bainbridge; +Cc: H. Peter Anvin, x86, linux-kernel On 02/25/2014 05:45 AM, H. Peter Anvin wrote: > On 02/24/2014 10:01 PM, Chris Bainbridge wrote: >> Pentium M is PAE capable but does not indicate so in the CPUID response. >> This is an issue now that some distributions are no longer shipping >> non-PAE kernels (those distributions no longer boot on Pentium M). This >> small patch fixes the issue by forcing the PAE capability on Pentium M. >> >> For more discussion see https://bugs.launchpad.net/baltix/+bug/930447 >> > > 1. This patch doesn't match the discussion in the link. > 2. You would have to also enable this in the cpu testing code in > arch/x86/boot. > 3. At the very least we need to print a serious warning that the CPU > is being run outside its specifications. I have no personal > information about why this CPUID bit was disabled, but it could be > that it was discovered in testing that it didn't work correctly in > all circumstances (e.g. high temperature.) This is very much "use > at your own risk..."; you could get data corruption or even > hardware damage. > > We should probably also taint the kernel. Perhaps obviously, this should require either command line or build opt-in. Regards, Peter Hurley ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-25 10:45 ` H. Peter Anvin 2014-02-25 11:35 ` Borislav Petkov 2014-02-25 12:06 ` Peter Hurley @ 2014-02-25 12:07 ` One Thousand Gnomes 2014-02-25 16:26 ` Dave Jones 3 siblings, 0 replies; 40+ messages in thread From: One Thousand Gnomes @ 2014-02-25 12:07 UTC (permalink / raw) To: H. Peter Anvin; +Cc: Chris Bainbridge, x86, linux-kernel On Tue, 25 Feb 2014 02:45:57 -0800 "H. Peter Anvin" <hpa@zytor.com> wrote: > On 02/24/2014 10:01 PM, Chris Bainbridge wrote: > > Pentium M is PAE capable but does not indicate so in the CPUID response. > > This is an issue now that some distributions are no longer shipping > > non-PAE kernels (those distributions no longer boot on Pentium M). This > > small patch fixes the issue by forcing the PAE capability on Pentium M. > > > > For more discussion see https://bugs.launchpad.net/baltix/+bug/930447 > > > > 1. This patch doesn't match the discussion in the link. > 2. You would have to also enable this in the cpu testing code in > arch/x86/boot. > 3. At the very least we need to print a serious warning that the CPU > is being run outside its specifications. I have no personal > information about why this CPUID bit was disabled, but it could be > that it was discovered in testing that it didn't work correctly in > all circumstances (e.g. high temperature.) This is very much "use > at your own risk..."; you could get data corruption or even > hardware damage. A hang with an extended version of the no PAE message that warns you and then says "Boot with the option "forcepae" to bypass this check", would, IMHO, be a bit wiser, unless someone can actually dig out the reason it does not advertise the flag. Alan ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-25 10:45 ` H. Peter Anvin ` (2 preceding siblings ...) 2014-02-25 12:07 ` One Thousand Gnomes @ 2014-02-25 16:26 ` Dave Jones 2014-02-25 17:16 ` H. Peter Anvin 3 siblings, 1 reply; 40+ messages in thread From: Dave Jones @ 2014-02-25 16:26 UTC (permalink / raw) To: H. Peter Anvin; +Cc: Chris Bainbridge, x86, linux-kernel On Tue, Feb 25, 2014 at 02:45:57AM -0800, H. Peter Anvin wrote: > On 02/24/2014 10:01 PM, Chris Bainbridge wrote: > > Pentium M is PAE capable but does not indicate so in the CPUID response. > > This is an issue now that some distributions are no longer shipping > > non-PAE kernels (those distributions no longer boot on Pentium M). This > > small patch fixes the issue by forcing the PAE capability on Pentium M. > > > > For more discussion see https://bugs.launchpad.net/baltix/+bug/930447 > > > > 1. This patch doesn't match the discussion in the link. > 2. You would have to also enable this in the cpu testing code in > arch/x86/boot. > 3. At the very least we need to print a serious warning that the CPU > is being run outside its specifications. I have no personal > information about why this CPUID bit was disabled, but it could be > that it was discovered in testing that it didn't work correctly in > all circumstances (e.g. high temperature.) This is very much "use > at your own risk..."; you could get data corruption or even > hardware damage. About six years ago, we almost went down this same path for Fedora, and I'm fairly sure the only reason we backed off and decided to not pursue it was that we found some Pentium M's where it just didn't work. Dave ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-25 16:26 ` Dave Jones @ 2014-02-25 17:16 ` H. Peter Anvin 2014-02-26 12:12 ` Chris Bainbridge 0 siblings, 1 reply; 40+ messages in thread From: H. Peter Anvin @ 2014-02-25 17:16 UTC (permalink / raw) To: Dave Jones, Chris Bainbridge, x86, linux-kernel On 02/25/2014 08:26 AM, Dave Jones wrote: > On Tue, Feb 25, 2014 at 02:45:57AM -0800, H. Peter Anvin wrote: > > On 02/24/2014 10:01 PM, Chris Bainbridge wrote: > > > Pentium M is PAE capable but does not indicate so in the CPUID response. > > > This is an issue now that some distributions are no longer shipping > > > non-PAE kernels (those distributions no longer boot on Pentium M). This > > > small patch fixes the issue by forcing the PAE capability on Pentium M. > > > > > > For more discussion see https://bugs.launchpad.net/baltix/+bug/930447 > > > > > > > 1. This patch doesn't match the discussion in the link. > > 2. You would have to also enable this in the cpu testing code in > > arch/x86/boot. > > 3. At the very least we need to print a serious warning that the CPU > > is being run outside its specifications. I have no personal > > information about why this CPUID bit was disabled, but it could be > > that it was discovered in testing that it didn't work correctly in > > all circumstances (e.g. high temperature.) This is very much "use > > at your own risk..."; you could get data corruption or even > > hardware damage. > > About six years ago, we almost went down this same path for Fedora, > and I'm fairly sure the only reason we backed off and decided to not > pursue it was that we found some Pentium M's where it just didn't work. > OK, that *definitely* means that if we're doing this at all we're doing it via an explicit opt-in on the command line, and tainting the kernel in the process. I don't know if anyone (Chris?) is interested enough in the problem to do such a patch, though. I know I'm not too interested in spending a bunch of time on. -hpa ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-25 17:16 ` H. Peter Anvin @ 2014-02-26 12:12 ` Chris Bainbridge 2014-02-26 13:18 ` Borislav Petkov 2014-02-26 16:44 ` Matthew Garrett 0 siblings, 2 replies; 40+ messages in thread From: Chris Bainbridge @ 2014-02-26 12:12 UTC (permalink / raw) To: H. Peter Anvin; +Cc: davej, x86, linux-kernel On Tue, Feb 25, 2014 at 09:16:02AM -0800, H. Peter Anvin wrote: > On 02/25/2014 08:26 AM, Dave Jones wrote: > > On Tue, Feb 25, 2014 at 02:45:57AM -0800, H. Peter Anvin wrote: > > > On 02/24/2014 10:01 PM, Chris Bainbridge wrote: > > > > Pentium M is PAE capable but does not indicate so in the CPUID response. > > > > This is an issue now that some distributions are no longer shipping > > > > non-PAE kernels (those distributions no longer boot on Pentium M). This > > > > small patch fixes the issue by forcing the PAE capability on Pentium M. > > > > > > > > For more discussion see https://bugs.launchpad.net/baltix/+bug/930447 > > > > > > > > > > 1. This patch doesn't match the discussion in the link. > > > 2. You would have to also enable this in the cpu testing code in > > > arch/x86/boot. > > > 3. At the very least we need to print a serious warning that the CPU > > > is being run outside its specifications. I have no personal > > > information about why this CPUID bit was disabled, but it could be > > > that it was discovered in testing that it didn't work correctly in > > > all circumstances (e.g. high temperature.) This is very much "use > > > at your own risk..."; you could get data corruption or even > > > hardware damage. > > > > About six years ago, we almost went down this same path for Fedora, > > and I'm fairly sure the only reason we backed off and decided to not > > pursue it was that we found some Pentium M's where it just didn't work. > > > > OK, that *definitely* means that if we're doing this at all we're doing > it via an explicit opt-in on the command line, and tainting the kernel > in the process. > > I don't know if anyone (Chris?) is interested enough in the problem to > do such a patch, though. I know I'm not too interested in spending a > bunch of time on. > > -hpa > The basic findings of the bug discussion is that people are successfully running PAE kernels on Pentium M (for some unknown reason Grub skips the validate_cpu code in the kernel, so existing PAE kernels will run unmodified, although they do fail when booted with syslinux), and people are using a user-space hack to add "pae" to /proc/cpuinfo. In all of the testing reported on the Launchpad bug and elsewhere, every user who managed to boot a PAE kernel on Pentium M reported success. There was a single report of failure, but the user encountered the "This kernel requires the following features" message, so the failure was caused by some issue of his boot setup not skipping the cpu validation code, rather than a PAE failure in the Pentium M. It is possible that PAE was disabled for technical reasons, or for commercial reasons (e.g. to discourage vendors from building Pentium M servers). We don't know. What we do know is that people are using PAE kernels on Pentium M systems, and that not all are aware of the implications (for a user with an existing install of Debian who apt-gets a PAE kernel, it will install and boot (thanks to Grub) and no errors or warnings will have been shown to indicate that their system is now running "out of spec") I have made the requested changes to the patch: --- diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 4d3ff03..3220734 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -151,6 +151,16 @@ static void get_flags(void) : : "ebx"); } } + + if (cmdline_find_option_bool("forcepae")) { + puts("WARNING: Forcing PAE in CPU flags\n"); + set_bit(X86_FEATURE_PAE, cpu.flags); + } + else if ((cpu.level == 6) && ((cpu.model == 9) || (cpu.model == 13))) { + puts("Pentium M: PAE is disabled, " + "enable it with kernel argument \"forcepae\"\n" + "(\"forcepae\" is unsupported and will taint the kernel)\n"); + } } /* Returns a bitmask of which words we have error bits in */ diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index bbe1b8b..1047098 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -196,6 +196,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) } } +static int forcepae; +static int __init forcepae_setup(char *__unused) +{ + forcepae = 1; + return 1; +} +__setup("forcepae", forcepae_setup); + static void intel_workarounds(struct cpuinfo_x86 *c) { unsigned long lo, hi; @@ -226,6 +234,15 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID bug: Pentium M reports no PAE but has PAE + */ + if (forcepae) { + printk(KERN_WARNING "PAE forced!\n"); + set_cpu_cap(c, X86_FEATURE_PAE); + add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); + } + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 12:12 ` Chris Bainbridge @ 2014-02-26 13:18 ` Borislav Petkov 2014-02-26 15:49 ` Dave Jones 2014-02-26 16:46 ` [PATCH] x86: set Pentium M as PAE capable H. Peter Anvin 2014-02-26 16:44 ` Matthew Garrett 1 sibling, 2 replies; 40+ messages in thread From: Borislav Petkov @ 2014-02-26 13:18 UTC (permalink / raw) To: Chris Bainbridge; +Cc: H. Peter Anvin, davej, x86, linux-kernel On Wed, Feb 26, 2014 at 07:12:59PM +0700, Chris Bainbridge wrote: > @@ -226,6 +234,15 @@ static void intel_workarounds(struct cpuinfo_x86 *c) > clear_cpu_cap(c, X86_FEATURE_SEP); > > /* > + * PAE CPUID bug: Pentium M reports no PAE but has PAE > + */ > + if (forcepae) { > + printk(KERN_WARNING "PAE forced!\n"); > + set_cpu_cap(c, X86_FEATURE_PAE); > + add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); This is certainly the wrong taint flag. We'd need a new one or to repurpose another one as I suggested in a previous mail. -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 13:18 ` Borislav Petkov @ 2014-02-26 15:49 ` Dave Jones 2014-02-26 17:18 ` Borislav Petkov ` (2 more replies) 2014-02-26 16:46 ` [PATCH] x86: set Pentium M as PAE capable H. Peter Anvin 1 sibling, 3 replies; 40+ messages in thread From: Dave Jones @ 2014-02-26 15:49 UTC (permalink / raw) To: Borislav Petkov; +Cc: Chris Bainbridge, H. Peter Anvin, x86, linux-kernel On Wed, Feb 26, 2014 at 02:18:52PM +0100, Borislav Petkov wrote: > On Wed, Feb 26, 2014 at 07:12:59PM +0700, Chris Bainbridge wrote: > > @@ -226,6 +234,15 @@ static void intel_workarounds(struct cpuinfo_x86 *c) > > clear_cpu_cap(c, X86_FEATURE_SEP); > > > > /* > > + * PAE CPUID bug: Pentium M reports no PAE but has PAE > > + */ > > + if (forcepae) { > > + printk(KERN_WARNING "PAE forced!\n"); > > + set_cpu_cap(c, X86_FEATURE_PAE); > > + add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); > > This is certainly the wrong taint flag. We'd need a new one or to > repurpose another one as I suggested in a previous mail. I'd suggest repurposing 'S'. Instead of 'unsafe smp', it could mean "out of Spec". We currently only use that flag on some ancient athlon xp, so there's not going to be any kind of collision. Start with the below maybe ? Dave Rename TAINT_UNSAFE_SMP to TAINT_CPU_OUT_OF_SPEC, so we can repurpose the flag to encompass a wider range of problems. Signed-off-by: Dave Jones <davej@fedoraproject.org> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index c67ffa686064..7ec4119b381c 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -218,7 +218,7 @@ static void amd_k7_smp_check(struct cpuinfo_x86 *c) */ WARN_ONCE(1, "WARNING: This combination of AMD" " processors is not suitable for SMP.\n"); - add_taint(TAINT_UNSAFE_SMP, LOCKDEP_NOW_UNRELIABLE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); } static void init_amd_k7(struct cpuinfo_x86 *c) diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 196d1ea86df0..08fb02477641 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -458,7 +458,7 @@ extern enum system_states { #define TAINT_PROPRIETARY_MODULE 0 #define TAINT_FORCED_MODULE 1 -#define TAINT_UNSAFE_SMP 2 +#define TAINT_CPU_OUT_OF_SPEC 2 #define TAINT_FORCED_RMMOD 3 #define TAINT_MACHINE_CHECK 4 #define TAINT_BAD_PAGE 5 diff --git a/kernel/module.c b/kernel/module.c index d24fcf29cb64..ca2c1aded7ee 100644 --- a/kernel/module.c +++ b/kernel/module.c @@ -1015,7 +1015,7 @@ static size_t module_flags_taint(struct module *mod, char *buf) buf[l++] = 'C'; /* * TAINT_FORCED_RMMOD: could be added. - * TAINT_UNSAFE_SMP, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't + * TAINT_CPU_OUT_OF_SPEC, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't * apply to modules. */ return l; diff --git a/kernel/panic.c b/kernel/panic.c index 2feab00c73ba..6900b83d17f5 100644 --- a/kernel/panic.c +++ b/kernel/panic.c @@ -199,7 +199,7 @@ struct tnt { static const struct tnt tnts[] = { { TAINT_PROPRIETARY_MODULE, 'P', 'G' }, { TAINT_FORCED_MODULE, 'F', ' ' }, - { TAINT_UNSAFE_SMP, 'S', ' ' }, + { TAINT_CPU_OUT_OF_SPEC, 'S', ' ' }, { TAINT_FORCED_RMMOD, 'R', ' ' }, { TAINT_MACHINE_CHECK, 'M', ' ' }, { TAINT_BAD_PAGE, 'B', ' ' }, ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 15:49 ` Dave Jones @ 2014-02-26 17:18 ` Borislav Petkov 2014-02-26 17:20 ` Dave Jones 2014-02-28 7:30 ` Chris Bainbridge 2014-03-20 23:30 ` [tip:x86/cpu] Rename TAINT_UNSAFE_SMP to TAINT_CPU_OUT_OF_SPEC tip-bot for Dave Jones 2 siblings, 1 reply; 40+ messages in thread From: Borislav Petkov @ 2014-02-26 17:18 UTC (permalink / raw) To: Dave Jones; +Cc: Chris Bainbridge, H. Peter Anvin, x86, linux-kernel On Wed, Feb 26, 2014 at 10:49:49AM -0500, Dave Jones wrote: > I'd suggest repurposing 'S'. Instead of 'unsafe smp', it could mean > "out of Spec". We currently only use that flag on some ancient athlon > xp, so there's not going to be any kind of collision. Hahaa, I said that yesterday already: http://lkml.kernel.org/r/20140225113524.GA23256@pd.tnic -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 17:18 ` Borislav Petkov @ 2014-02-26 17:20 ` Dave Jones 2014-02-26 17:28 ` Borislav Petkov 0 siblings, 1 reply; 40+ messages in thread From: Dave Jones @ 2014-02-26 17:20 UTC (permalink / raw) To: Borislav Petkov; +Cc: Chris Bainbridge, H. Peter Anvin, x86, linux-kernel On Wed, Feb 26, 2014 at 06:18:17PM +0100, Borislav Petkov wrote: > On Wed, Feb 26, 2014 at 10:49:49AM -0500, Dave Jones wrote: > > I'd suggest repurposing 'S'. Instead of 'unsafe smp', it could mean > > "out of Spec". We currently only use that flag on some ancient athlon > > xp, so there's not going to be any kind of collision. > > Hahaa, I said that yesterday already: > > http://lkml.kernel.org/r/20140225113524.GA23256@pd.tnic Then it's definitely a good idea :-) Dave ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 17:20 ` Dave Jones @ 2014-02-26 17:28 ` Borislav Petkov 0 siblings, 0 replies; 40+ messages in thread From: Borislav Petkov @ 2014-02-26 17:28 UTC (permalink / raw) To: Dave Jones; +Cc: Chris Bainbridge, H. Peter Anvin, x86, linux-kernel On Wed, Feb 26, 2014 at 12:20:10PM -0500, Dave Jones wrote: > Then it's definitely a good idea :-) LOL! -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 15:49 ` Dave Jones 2014-02-26 17:18 ` Borislav Petkov @ 2014-02-28 7:30 ` Chris Bainbridge [not found] ` <CAKKYfmFgVjYwvThpB0FBB+ggOwULWKLpz7ADT1eojno_KtD9yw@mail.gmail.com> 2014-03-20 23:30 ` [tip:x86/cpu] Rename TAINT_UNSAFE_SMP to TAINT_CPU_OUT_OF_SPEC tip-bot for Dave Jones 2 siblings, 1 reply; 40+ messages in thread From: Chris Bainbridge @ 2014-02-28 7:30 UTC (permalink / raw) To: Dave Jones, Borislav Petkov, H. Peter Anvin, x86, linux-kernel On Wed, Feb 26, 2014 at 10:49:49AM -0500, Dave Jones wrote: > On Wed, Feb 26, 2014 at 02:18:52PM +0100, Borislav Petkov wrote: > > On Wed, Feb 26, 2014 at 07:12:59PM +0700, Chris Bainbridge wrote: > > > @@ -226,6 +234,15 @@ static void intel_workarounds(struct cpuinfo_x86 *c) > > > clear_cpu_cap(c, X86_FEATURE_SEP); > > > > > > /* > > > + * PAE CPUID bug: Pentium M reports no PAE but has PAE > > > + */ > > > + if (forcepae) { > > > + printk(KERN_WARNING "PAE forced!\n"); > > > + set_cpu_cap(c, X86_FEATURE_PAE); > > > + add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); > > > > This is certainly the wrong taint flag. We'd need a new one or to > > repurpose another one as I suggested in a previous mail. > > I'd suggest repurposing 'S'. Instead of 'unsafe smp', it could mean > "out of Spec". We currently only use that flag on some ancient athlon xp, > so there's not going to be any kind of collision. > > Start with the below maybe ? > > Dave Patch looks fine. Is the patch I previously posted, combined with this patch, sufficient for inclusion in the kernel? Or is there anything else I need to do? ^ permalink raw reply [flat|nested] 40+ messages in thread
[parent not found: <CAKKYfmFgVjYwvThpB0FBB+ggOwULWKLpz7ADT1eojno_KtD9yw@mail.gmail.com>]
* Re: [PATCH] x86: set Pentium M as PAE capable [not found] ` <CAKKYfmFgVjYwvThpB0FBB+ggOwULWKLpz7ADT1eojno_KtD9yw@mail.gmail.com> @ 2014-02-28 14:00 ` Chris Bainbridge 2014-03-02 20:56 ` Andreas Mohr 0 siblings, 1 reply; 40+ messages in thread From: Chris Bainbridge @ 2014-02-28 14:00 UTC (permalink / raw) To: Dennis Mungai Cc: Borislav Petkov, H. Peter Anvin, x86, Dave Jones, linux-kernel On Fri, Feb 28, 2014 at 03:27:50PM +0300, Dennis Mungai wrote: > Hello people, > > Note that revisions of the Dothan core were released in the first quarter > of 2005 with the *Sonoma* chipsets and supported a 533 MT/s FSB and NX-bit > (and PAE support required for it was enabled, unlike earlier Pentium Ms > that had it disabled). These processors include the 730M (1.6 GHz), 740M > (1.73 GHz), 750M (1.86 GHz), 760M (2.0 GHz) and 770M (2.13 GHz). These > models all have a TDP of 27 W and a 2 MB L2 cache. > > These CPUs should have PAE enabled. Only earlier versions of the Pentium M > ( Older Dothans and the Banias core) do not have PAE support, officially. > > -Dennis. Good point, patch updated to not show the warning if PAE is already enabled. Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> --- diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 4d3ff03..3fd12bc 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -69,6 +69,13 @@ static int is_transmeta(void) cpu_vendor[2] == A32('M', 'x', '8', '6'); } +static int is_intel(void) +{ + return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && + cpu_vendor[1] == A32('i', 'n', 'e', 'I') && + cpu_vendor[2] == A32('n', 't', 'e', 'l'); +} + static int has_fpu(void) { u16 fcw = -1, fsw = -1; @@ -239,6 +246,21 @@ int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); err = check_flags(); + } else if (err == 0x01 && + !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && + is_intel() && cpu.level == 6 && + (cpu.model == 9 || cpu.model == 13)) { + /* PAE is disabled on this Pentium M but can be forced */ + if (cmdline_find_option_bool("forcepae")) { + puts("WARNING: Forcing PAE in CPU flags\n"); + set_bit(X86_FEATURE_PAE, cpu.flags); + err = check_flags(); + } + else { + puts("Pentium M: PAE is disabled, " + "enable it with kernel argument \"forcepae\"\n" + "(this will taint the kernel)\n"); + } } if (err_flags_ptr) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index bbe1b8b..873cf3b 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -196,6 +196,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) } } +static int forcepae; +static int __init forcepae_setup(char *__unused) +{ + forcepae = 1; + return 1; +} +__setup("forcepae", forcepae_setup); + static void intel_workarounds(struct cpuinfo_x86 *c) { unsigned long lo, hi; @@ -226,6 +234,15 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID bug: Pentium M reports no PAE but has PAE + */ + if (forcepae) { + printk(KERN_WARNING "PAE forced!\n"); + set_cpu_cap(c, X86_FEATURE_PAE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); + } + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-28 14:00 ` Chris Bainbridge @ 2014-03-02 20:56 ` Andreas Mohr 2014-03-02 20:59 ` H. Peter Anvin ` (2 more replies) 0 siblings, 3 replies; 40+ messages in thread From: Andreas Mohr @ 2014-03-02 20:56 UTC (permalink / raw) To: Chris Bainbridge Cc: Dennis Mungai, Borislav Petkov, H. Peter Anvin, x86, Dave Jones, linux-kernel Hi, > /* > + * PAE CPUID bug: Pentium M reports no PAE but has PAE > + */ Ain't that a tad strongly/incorrectly worded? It's probably not certain whether that's a "bug". Prior content in this discussion suggested that the flag might have been intentionally not advertised, due to not being of sufficient quality yet in these revisions. Also, it's not definite that it has "PAE" in a usable form. So what about rewording it into an "issue", e.g. something like: "PAE CPUID issue: most Pentium M report no PAE but may have PAE implemented at a potentially usable quality level. Thank you very much for this important deescalation work of the quite annoying PAE compat issue! (Pentium M, AMD Geode, VIA C7, <(=?) Pentium II, ...) (BTW, would it be possible to transform Linux's PAE support into boot-config or even fully runtime-detectable boot switching to (non-)PAE, similar to or exceeding what XP offers with its static boot-time flag? Last time I checked PAE support config defines were spread over ~ 40 kernel source files though :-((() Andreas Mohr ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-02 20:56 ` Andreas Mohr @ 2014-03-02 20:59 ` H. Peter Anvin 2014-03-02 21:02 ` Dave Jones 2014-03-03 8:04 ` Chris Bainbridge 2 siblings, 0 replies; 40+ messages in thread From: H. Peter Anvin @ 2014-03-02 20:59 UTC (permalink / raw) To: Andreas Mohr, Chris Bainbridge Cc: Dennis Mungai, Borislav Petkov, x86, Dave Jones, linux-kernel On 03/02/2014 12:56 PM, Andreas Mohr wrote: > > (BTW, would it be possible to transform Linux's PAE support into > boot-config or even fully runtime-detectable boot switching to > (non-)PAE, similar to or exceeding what XP offers with its static > boot-time flag? > Last time I checked PAE support config defines were spread over ~ 40 > kernel source files though :-((() > As far as I know the "static boottime flag" in Windows simply loads one of several possible kernels. -hpa ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-02 20:56 ` Andreas Mohr 2014-03-02 20:59 ` H. Peter Anvin @ 2014-03-02 21:02 ` Dave Jones 2014-03-02 21:04 ` Borislav Petkov 2014-03-02 21:42 ` Gene Heskett 2014-03-03 8:04 ` Chris Bainbridge 2 siblings, 2 replies; 40+ messages in thread From: Dave Jones @ 2014-03-02 21:02 UTC (permalink / raw) To: Andreas Mohr Cc: Chris Bainbridge, Dennis Mungai, Borislav Petkov, H. Peter Anvin, x86, linux-kernel On Sun, Mar 02, 2014 at 09:56:19PM +0100, Andreas Mohr wrote: > (BTW, would it be possible to transform Linux's PAE support into > boot-config or even fully runtime-detectable boot switching to > (non-)PAE, similar to or exceeding what XP offers with its static > boot-time flag? > Last time I checked PAE support config defines were spread over ~ 40 > kernel source files though :-((() It would be a considerable amount of work to make it a runtime thing. Ten years ago, maybe it would be worth the effort perhaps, but I'd suggest just letting 32-bit slowly die instead of doing dramatic overhauls that will no doubt introduce a bunch of regressions in code that's been notoriously awful to debug issues in during the past. Dave ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-02 21:02 ` Dave Jones @ 2014-03-02 21:04 ` Borislav Petkov 2014-03-02 21:13 ` Andreas Mohr 2014-03-02 21:42 ` Gene Heskett 1 sibling, 1 reply; 40+ messages in thread From: Borislav Petkov @ 2014-03-02 21:04 UTC (permalink / raw) To: Dave Jones Cc: Andreas Mohr, Chris Bainbridge, Dennis Mungai, H. Peter Anvin, x86, linux-kernel On Sun, Mar 02, 2014 at 04:02:01PM -0500, Dave Jones wrote: > It would be a considerable amount of work to make it a runtime thing. > Ten years ago, maybe it would be worth the effort perhaps, but I'd > suggest just letting 32-bit slowly die instead of doing dramatic > overhauls that will no doubt introduce a bunch of regressions in code > that's been notoriously awful to debug issues in during the past. Amen! -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-02 21:04 ` Borislav Petkov @ 2014-03-02 21:13 ` Andreas Mohr 0 siblings, 0 replies; 40+ messages in thread From: Andreas Mohr @ 2014-03-02 21:13 UTC (permalink / raw) To: Borislav Petkov Cc: Dave Jones, Andreas Mohr, Chris Bainbridge, Dennis Mungai, H. Peter Anvin, x86, linux-kernel On Sun, Mar 02, 2014 at 10:04:19PM +0100, Borislav Petkov wrote: > On Sun, Mar 02, 2014 at 04:02:01PM -0500, Dave Jones wrote: > > It would be a considerable amount of work to make it a runtime thing. > > Ten years ago, maybe it would be worth the effort perhaps, but I'd > > suggest just letting 32-bit slowly die instead of doing dramatic > > overhauls that will no doubt introduce a bunch of regressions in code > > that's been notoriously awful to debug issues in during the past. > > Amen! Did I just smell two or three historically burnt fingers? ;) While that was slightly disheartening, thanks for the very fast clarification, Dave et al.! Andreas Mohr ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-02 21:02 ` Dave Jones 2014-03-02 21:04 ` Borislav Petkov @ 2014-03-02 21:42 ` Gene Heskett 2014-03-03 12:31 ` One Thousand Gnomes 1 sibling, 1 reply; 40+ messages in thread From: Gene Heskett @ 2014-03-02 21:42 UTC (permalink / raw) To: Dave Jones, linux-kernel On Sunday 02 March 2014, Dave Jones wrote: >On Sun, Mar 02, 2014 at 09:56:19PM +0100, Andreas Mohr wrote: > > (BTW, would it be possible to transform Linux's PAE support into > > boot-config or even fully runtime-detectable boot switching to > > (non-)PAE, similar to or exceeding what XP offers with its static > > boot-time flag? > > Last time I checked PAE support config defines were spread over ~ 40 > > kernel source files though :-((() > >It would be a considerable amount of work to make it a runtime thing. >Ten years ago, maybe it would be worth the effort perhaps, but I'd >suggest just letting 32-bit slowly die instead of doing dramatic >overhauls that will no doubt introduce a bunch of regressions in code >that's been notoriously awful to debug issues in during the past. > > Dave There is a fly in that soup Dave, and that is the speed in a truly real time required environment. IRQ latencies once the 32 bit scene have been left behind, either by PAE or a full 64 bit build are not at all well defined, and are of sufficient magnitudes in terms of the timing jitter, as to nearly destroy our ability to use software step generation to control our machine tools. A motor being stepped every 200 microseconds (thats actually slow) will lose 50% of its available torque if the timing jitter in the step issuance is 10% of the period. We routinely expect 2 to 3 u-s jitters on an Atom board running a 32 bit, RTAI enhanced build of what is by now a 5 year old kernel. This is extremely board sensitive, and that same kernel running on this 4 core phenom, cannot stay inside of 40 u-s. A case of more horsepower not being a good deal at all. OTOH, we (LinuxCNC) are a very small user group. I just want to make you aware that we exist. We do retrofits mostly, because our software can make the part faster, but I would estimate there are 5 to 10k machines out there in the major manufacturing scene running our software, and that they include some of the heaviest hitters in the auto making business. Cheers, Gene -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) Genes Web page <http://geneslinuxbox.net:6309/gene> NOTICE: Will pay 100 USD for an HP-4815A defective but complete probe assembly. ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-02 21:42 ` Gene Heskett @ 2014-03-03 12:31 ` One Thousand Gnomes 0 siblings, 0 replies; 40+ messages in thread From: One Thousand Gnomes @ 2014-03-03 12:31 UTC (permalink / raw) To: Gene Heskett; +Cc: Dave Jones, linux-kernel > We routinely expect 2 to 3 u-s jitters on an Atom board running a 32 bit, > RTAI enhanced build of what is by now a 5 year old kernel. This is > extremely board sensitive, and that same kernel running on this 4 core > phenom, cannot stay inside of 40 u-s. A case of more horsepower not being > a good deal at all. Can't speak for AMD devices but I would be curious to know more on the Intel side about this and how you measured and analysed it. Are you running with any hyperthreading disabled, a firmware which is not using SMM, and with any critical code pinned in cache ? How do you have power management set up ? (probably best taken off list) Alan ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-02 20:56 ` Andreas Mohr 2014-03-02 20:59 ` H. Peter Anvin 2014-03-02 21:02 ` Dave Jones @ 2014-03-03 8:04 ` Chris Bainbridge 2014-03-03 19:29 ` Borislav Petkov 2 siblings, 1 reply; 40+ messages in thread From: Chris Bainbridge @ 2014-03-03 8:04 UTC (permalink / raw) To: Andreas Mohr Cc: Dennis Mungai, Borislav Petkov, H. Peter Anvin, x86, Dave Jones, linux-kernel, devzero On Sun, Mar 02, 2014 at 09:56:19PM +0100, Andreas Mohr wrote: > Hi, > > > /* > > + * PAE CPUID bug: Pentium M reports no PAE but has PAE > > + */ > > Ain't that a tad strongly/incorrectly worded? I've updated the wording. On 3 March 2014 02:05, Roland Kletzing <devzero@web.de> wrote: > i would recommend adding the newly introduced param to > Documentation/kernel- > parameters.txt , though. Done. Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> --- diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index b9e9bd8..388b5e9 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -962,6 +962,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. parameter will force ia64_sal_cache_flush to call ia64_pal_cache_flush instead of SAL_CACHE_FLUSH. + forcepae [X86-32] + Forcefully enable Physical Address Extension (PAE). + Many Pentium M systems disable PAE but may have a + functionally usable PAE implementation. + Note: This parameter is unsupported, may cause unknown + problems, and will taint the kernel. + ftrace=[tracer] [FTRACE] will set and start the specified tracer as early as possible in order to facilitate early diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 4d3ff03..93ba160 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -69,6 +69,13 @@ static int is_transmeta(void) cpu_vendor[2] == A32('M', 'x', '8', '6'); } +static int is_intel(void) +{ + return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && + cpu_vendor[1] == A32('i', 'n', 'e', 'I') && + cpu_vendor[2] == A32('n', 't', 'e', 'l'); +} + static int has_fpu(void) { u16 fcw = -1, fsw = -1; @@ -239,6 +246,24 @@ int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); err = check_flags(); + } else if (err == 0x01 && + !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && + is_intel() && cpu.level == 6 && + (cpu.model == 9 || cpu.model == 13)) { + /* PAE is disabled on this Pentium M but can be forced */ + if (cmdline_find_option_bool("forcepae")) { + puts("WARNING: Forcing PAE in CPU flags\n"); + set_bit(X86_FEATURE_PAE, cpu.flags); + err = check_flags(); + } + else { + puts("ERROR: PAE is disabled on this Pentium M\n" + "(PAE can potentially be enabled with " + "kernel parameter\n" + "\"forcepae\" - this is unsupported, may " + "cause unknown\n" + "problems, and will taint the kernel)\n"); + } } if (err_flags_ptr) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index bbe1b8b..271686d 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -196,6 +196,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) } } +static int forcepae; +static int __init forcepae_setup(char *__unused) +{ + forcepae = 1; + return 1; +} +__setup("forcepae", forcepae_setup); + static void intel_workarounds(struct cpuinfo_x86 *c) { unsigned long lo, hi; @@ -226,6 +234,17 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID issue: many Pentium M report no PAE but may have a + * functionally usable PAE implementation. + * Forcefully enable PAE if kernel parameter "forcepae" is present. + */ + if (forcepae) { + printk(KERN_WARNING "PAE forced!\n"); + set_cpu_cap(c, X86_FEATURE_PAE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); + } + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-03 8:04 ` Chris Bainbridge @ 2014-03-03 19:29 ` Borislav Petkov 2014-03-04 5:01 ` Chris Bainbridge 0 siblings, 1 reply; 40+ messages in thread From: Borislav Petkov @ 2014-03-03 19:29 UTC (permalink / raw) To: Chris Bainbridge Cc: Andreas Mohr, Dennis Mungai, H. Peter Anvin, x86, Dave Jones, linux-kernel, devzero On Mon, Mar 03, 2014 at 03:04:35PM +0700, Chris Bainbridge wrote: > On 3 March 2014 02:05, Roland Kletzing <devzero@web.de> wrote: > > i would recommend adding the newly introduced param to > > Documentation/kernel- > > parameters.txt , though. > > Done. > > Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> > --- > diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt > index b9e9bd8..388b5e9 100644 > --- a/Documentation/kernel-parameters.txt > +++ b/Documentation/kernel-parameters.txt > @@ -962,6 +962,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. > parameter will force ia64_sal_cache_flush to call > ia64_pal_cache_flush instead of SAL_CACHE_FLUSH. > > + forcepae [X86-32] > + Forcefully enable Physical Address Extension (PAE). > + Many Pentium M systems disable PAE but may have a > + functionally usable PAE implementation. > + Note: This parameter is unsupported, may cause unknown What does "unsupported" mean here exactly? > + problems, and will taint the kernel. > + > ftrace=[tracer] > [FTRACE] will set and start the specified tracer > as early as possible in order to facilitate early > diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c > index 4d3ff03..93ba160 100644 > --- a/arch/x86/boot/cpucheck.c > +++ b/arch/x86/boot/cpucheck.c > @@ -69,6 +69,13 @@ static int is_transmeta(void) > cpu_vendor[2] == A32('M', 'x', '8', '6'); > } > > +static int is_intel(void) > +{ > + return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && > + cpu_vendor[1] == A32('i', 'n', 'e', 'I') && > + cpu_vendor[2] == A32('n', 't', 'e', 'l'); > +} > + > static int has_fpu(void) > { > u16 fcw = -1, fsw = -1; > @@ -239,6 +246,24 @@ int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) > asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); > > err = check_flags(); > + } else if (err == 0x01 && > + !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && > + is_intel() && cpu.level == 6 && > + (cpu.model == 9 || cpu.model == 13)) { > + /* PAE is disabled on this Pentium M but can be forced */ > + if (cmdline_find_option_bool("forcepae")) { > + puts("WARNING: Forcing PAE in CPU flags\n"); > + set_bit(X86_FEATURE_PAE, cpu.flags); > + err = check_flags(); This function is called check_cpuflags() now. You probably want to redo your patch against tip/master, i.e.: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git#master > + } > + else { > + puts("ERROR: PAE is disabled on this Pentium M\n" > + "(PAE can potentially be enabled with " > + "kernel parameter\n" > + "\"forcepae\" - this is unsupported, may " > + "cause unknown\n" > + "problems, and will taint the kernel)\n"); This string could definitely violate the 80 cols rule so that it is much more readable: } else puts("WARNING: PAE disabled. Use \"forcepae\" to enable at your own risk!\n"); I've shortened it to the most relevant info only. No need to say we're tainting the kernel because LOCKDEP_NOW_UNRELIABLE will cause that anyway below. > + } > } > > if (err_flags_ptr) > diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c > index bbe1b8b..271686d 100644 > --- a/arch/x86/kernel/cpu/intel.c > +++ b/arch/x86/kernel/cpu/intel.c > @@ -196,6 +196,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) > } > } > > +static int forcepae; > +static int __init forcepae_setup(char *__unused) > +{ > + forcepae = 1; > + return 1; > +} > +__setup("forcepae", forcepae_setup); Yeah, why not simply call it "pae"? It is smaller and the letter combination is not used yet and it means the same. > + > static void intel_workarounds(struct cpuinfo_x86 *c) > { > unsigned long lo, hi; > @@ -226,6 +234,17 @@ static void intel_workarounds(struct cpuinfo_x86 *c) > clear_cpu_cap(c, X86_FEATURE_SEP); > > /* > + * PAE CPUID issue: many Pentium M report no PAE but may have a > + * functionally usable PAE implementation. > + * Forcefully enable PAE if kernel parameter "forcepae" is present. > + */ > + if (forcepae) { > + printk(KERN_WARNING "PAE forced!\n"); > + set_cpu_cap(c, X86_FEATURE_PAE); > + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); Right, this implies Dave's patch is preceding yours. I guess hpa can fish it out from the thread when applying. -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-03 19:29 ` Borislav Petkov @ 2014-03-04 5:01 ` Chris Bainbridge 2014-03-04 5:04 ` H. Peter Anvin 0 siblings, 1 reply; 40+ messages in thread From: Chris Bainbridge @ 2014-03-04 5:01 UTC (permalink / raw) To: Borislav Petkov Cc: Andreas Mohr, Dennis Mungai, H. Peter Anvin, x86, Dave Jones, linux-kernel, devzero On Mon, Mar 03, 2014 at 08:29:39PM +0100, Borislav Petkov wrote: > On Mon, Mar 03, 2014 at 03:04:35PM +0700, Chris Bainbridge wrote: > > On 3 March 2014 02:05, Roland Kletzing <devzero@web.de> wrote: > > > i would recommend adding the newly introduced param to > > > Documentation/kernel- > > > parameters.txt , though. > > > > Done. > > > > Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> > > --- > > diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt > > index b9e9bd8..388b5e9 100644 > > --- a/Documentation/kernel-parameters.txt > > +++ b/Documentation/kernel-parameters.txt > > @@ -962,6 +962,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. > > parameter will force ia64_sal_cache_flush to call > > ia64_pal_cache_flush instead of SAL_CACHE_FLUSH. > > > > + forcepae [X86-32] > > + Forcefully enable Physical Address Extension (PAE). > > + Many Pentium M systems disable PAE but may have a > > + functionally usable PAE implementation. > > + Note: This parameter is unsupported, may cause unknown > > What does "unsupported" mean here exactly? It was supposed to have the dual meaning that neither the kernel developers or Intel are going to help you if it doesn't work. But perhaps it is unnecessary - being tainted implies that the kernel developers won't help, and Intel certainly won't be interested. > > This function is called check_cpuflags() now. You probably want to redo > your patch against tip/master, i.e.: > > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git#master > Done, new patch is against tip. > > + } > > + else { > > + puts("ERROR: PAE is disabled on this Pentium M\n" > > + "(PAE can potentially be enabled with " > > + "kernel parameter\n" > > + "\"forcepae\" - this is unsupported, may " > > + "cause unknown\n" > > + "problems, and will taint the kernel)\n"); > > This string could definitely violate the 80 cols rule so that it is much > more readable: > > } > else > puts("WARNING: PAE disabled. Use \"forcepae\" to enable at your own risk!\n"); > > I've shortened it to the most relevant info only. No need to say we're > tainting the kernel because LOCKDEP_NOW_UNRELIABLE will cause that > anyway below. Ok I changed it to: "WARNING: PAE disabled. Use parameter 'pae' to enable at your own risk!\n"" > > diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c > > index bbe1b8b..271686d 100644 > > --- a/arch/x86/kernel/cpu/intel.c > > +++ b/arch/x86/kernel/cpu/intel.c > > @@ -196,6 +196,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) > > } > > } > > > > +static int forcepae; > > +static int __init forcepae_setup(char *__unused) > > +{ > > + forcepae = 1; > > + return 1; > > +} > > +__setup("forcepae", forcepae_setup); > > Yeah, why not simply call it "pae"? It is smaller and the letter > combination is not used yet and it means the same. I don't see any reason not to just use "pae" "forcepae" is perhaps a bit more descriptive but the other text in the patch clearly describes the parameter so it doesn't really matter. > > static void intel_workarounds(struct cpuinfo_x86 *c) > > { > > unsigned long lo, hi; > > @@ -226,6 +234,17 @@ static void intel_workarounds(struct cpuinfo_x86 *c) > > clear_cpu_cap(c, X86_FEATURE_SEP); > > > > /* > > + * PAE CPUID issue: many Pentium M report no PAE but may have a > > + * functionally usable PAE implementation. > > + * Forcefully enable PAE if kernel parameter "forcepae" is present. > > + */ > > + if (forcepae) { > > + printk(KERN_WARNING "PAE forced!\n"); > > + set_cpu_cap(c, X86_FEATURE_PAE); > > + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); > > Right, this implies Dave's patch is preceding yours. I guess hpa can > fish it out from the thread when applying. I will include Dave's patch, it is trivial. New patch with all above changes follows. Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> --- diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 580a60c..7d57a5a 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -2307,6 +2307,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. OSS [HW,OSS] See Documentation/sound/oss/oss-parameters.txt + pae [X86-32] + Forcefully enable Physical Address Extension (PAE). + Many Pentium M systems disable PAE but may have a + functionally usable PAE implementation. + Warning: use of this parameter will taint the kernel + and may cause unknown problems. + panic= [KNL] Kernel behaviour on panic: delay <timeout> timeout > 0: seconds before rebooting timeout = 0: wait forever diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 100a9a1..740d2d1 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -67,6 +67,13 @@ static int is_transmeta(void) cpu_vendor[2] == A32('M', 'x', '8', '6'); } +static int is_intel(void) +{ + return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && + cpu_vendor[1] == A32('i', 'n', 'e', 'I') && + cpu_vendor[2] == A32('n', 't', 'e', 'l'); +} + /* Returns a bitmask of which words we have error bits in */ static int check_cpuflags(void) { @@ -153,6 +160,19 @@ int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); err = check_cpuflags(); + } else if (err == 0x01 && + !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && + is_intel() && cpu.level == 6 && + (cpu.model == 9 || cpu.model == 13)) { + /* PAE is disabled on this Pentium M but can be forced */ + if (cmdline_find_option_bool("pae")) { + puts("WARNING: Forcing PAE in CPU flags\n"); + set_bit(X86_FEATURE_PAE, cpu.flags); + err = check_cpuflags(); + } + else { + puts("WARNING: PAE disabled. Use parameter 'pae' to enable at your own risk!\n"); + } } if (err_flags_ptr) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index c67ffa6..7ec4119 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -218,7 +218,7 @@ static void amd_k7_smp_check(struct cpuinfo_x86 *c) */ WARN_ONCE(1, "WARNING: This combination of AMD" " processors is not suitable for SMP.\n"); - add_taint(TAINT_UNSAFE_SMP, LOCKDEP_NOW_UNRELIABLE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); } static void init_amd_k7(struct cpuinfo_x86 *c) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index ea56e7c..cc0d048 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -195,6 +195,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) } } +static int pae; +static int __init pae_setup(char *__unused) +{ + pae = 1; + return 1; +} +__setup("pae", pae_setup); + static void intel_workarounds(struct cpuinfo_x86 *c) { unsigned long lo, hi; @@ -225,6 +233,17 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID issue: many Pentium M report no PAE but may have a + * functionally usable PAE implementation. + * Forcefully enable PAE if kernel parameter "pae" is present. + */ + if (pae) { + printk(KERN_WARNING "PAE forced!\n"); + set_cpu_cap(c, X86_FEATURE_PAE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); + } + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 196d1ea..08fb024 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -458,7 +458,7 @@ extern enum system_states { #define TAINT_PROPRIETARY_MODULE 0 #define TAINT_FORCED_MODULE 1 -#define TAINT_UNSAFE_SMP 2 +#define TAINT_CPU_OUT_OF_SPEC 2 #define TAINT_FORCED_RMMOD 3 #define TAINT_MACHINE_CHECK 4 #define TAINT_BAD_PAGE 5 diff --git a/kernel/module.c b/kernel/module.c index b99e801..8dc7f5e 100644 --- a/kernel/module.c +++ b/kernel/module.c @@ -1015,7 +1015,7 @@ static size_t module_flags_taint(struct module *mod, char *buf) buf[l++] = 'C'; /* * TAINT_FORCED_RMMOD: could be added. - * TAINT_UNSAFE_SMP, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't + * TAINT_CPU_OUT_OF_SPEC, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't * apply to modules. */ return l; diff --git a/kernel/panic.c b/kernel/panic.c index 3eb0ffb..cca8a91 100644 --- a/kernel/panic.c +++ b/kernel/panic.c @@ -199,7 +199,7 @@ struct tnt { static const struct tnt tnts[] = { { TAINT_PROPRIETARY_MODULE, 'P', 'G' }, { TAINT_FORCED_MODULE, 'F', ' ' }, - { TAINT_UNSAFE_SMP, 'S', ' ' }, + { TAINT_CPU_OUT_OF_SPEC, 'S', ' ' }, { TAINT_FORCED_RMMOD, 'R', ' ' }, { TAINT_MACHINE_CHECK, 'M', ' ' }, { TAINT_BAD_PAGE, 'B', ' ' }, ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-04 5:01 ` Chris Bainbridge @ 2014-03-04 5:04 ` H. Peter Anvin 2014-03-04 6:06 ` Chris Bainbridge 0 siblings, 1 reply; 40+ messages in thread From: H. Peter Anvin @ 2014-03-04 5:04 UTC (permalink / raw) To: Chris Bainbridge, Borislav Petkov Cc: Andreas Mohr, Dennis Mungai, x86, Dave Jones, linux-kernel, devzero forcepae is descriptive. On March 3, 2014 9:01:30 PM PST, Chris Bainbridge <chris.bainbridge@gmail.com> wrote: >On Mon, Mar 03, 2014 at 08:29:39PM +0100, Borislav Petkov wrote: >> On Mon, Mar 03, 2014 at 03:04:35PM +0700, Chris Bainbridge wrote: >> > On 3 March 2014 02:05, Roland Kletzing <devzero@web.de> wrote: >> > > i would recommend adding the newly introduced param to >> > > Documentation/kernel- >> > > parameters.txt , though. >> > >> > Done. >> > >> > Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> >> > --- >> > diff --git a/Documentation/kernel-parameters.txt >b/Documentation/kernel-parameters.txt >> > index b9e9bd8..388b5e9 100644 >> > --- a/Documentation/kernel-parameters.txt >> > +++ b/Documentation/kernel-parameters.txt >> > @@ -962,6 +962,13 @@ bytes respectively. Such letter suffixes can >also be entirely omitted. >> > parameter will force ia64_sal_cache_flush to call >> > ia64_pal_cache_flush instead of SAL_CACHE_FLUSH. >> > >> > + forcepae [X86-32] >> > + Forcefully enable Physical Address Extension (PAE). >> > + Many Pentium M systems disable PAE but may have a >> > + functionally usable PAE implementation. >> > + Note: This parameter is unsupported, may cause unknown >> >> What does "unsupported" mean here exactly? > >It was supposed to have the dual meaning that neither the kernel >developers or Intel are going to help you if it doesn't work. But >perhaps it is unnecessary - being tainted implies that the kernel >developers won't help, and Intel certainly won't be interested. > >> >> This function is called check_cpuflags() now. You probably want to >redo >> your patch against tip/master, i.e.: >> >> git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git#master >> > >Done, new patch is against tip. > >> > + } >> > + else { >> > + puts("ERROR: PAE is disabled on this Pentium M\n" >> > + "(PAE can potentially be enabled with " >> > + "kernel parameter\n" >> > + "\"forcepae\" - this is unsupported, may " >> > + "cause unknown\n" >> > + "problems, and will taint the kernel)\n"); >> >> This string could definitely violate the 80 cols rule so that it is >much >> more readable: >> >> } >> else >> puts("WARNING: PAE disabled. Use \"forcepae\" to enable at your >own risk!\n"); >> >> I've shortened it to the most relevant info only. No need to say >we're >> tainting the kernel because LOCKDEP_NOW_UNRELIABLE will cause that >> anyway below. > >Ok I changed it to: "WARNING: PAE disabled. Use parameter 'pae' to >enable at your own risk!\n"" > >> > diff --git a/arch/x86/kernel/cpu/intel.c >b/arch/x86/kernel/cpu/intel.c >> > index bbe1b8b..271686d 100644 >> > --- a/arch/x86/kernel/cpu/intel.c >> > +++ b/arch/x86/kernel/cpu/intel.c >> > @@ -196,6 +196,14 @@ static void intel_smp_check(struct cpuinfo_x86 >*c) >> > } >> > } >> > >> > +static int forcepae; >> > +static int __init forcepae_setup(char *__unused) >> > +{ >> > + forcepae = 1; >> > + return 1; >> > +} >> > +__setup("forcepae", forcepae_setup); >> >> Yeah, why not simply call it "pae"? It is smaller and the letter >> combination is not used yet and it means the same. > >I don't see any reason not to just use "pae" "forcepae" is perhaps a >bit >more descriptive but the other text in the patch clearly describes the >parameter so it doesn't really matter. > >> > static void intel_workarounds(struct cpuinfo_x86 *c) >> > { >> > unsigned long lo, hi; >> > @@ -226,6 +234,17 @@ static void intel_workarounds(struct >cpuinfo_x86 *c) >> > clear_cpu_cap(c, X86_FEATURE_SEP); >> > >> > /* >> > + * PAE CPUID issue: many Pentium M report no PAE but may have a >> > + * functionally usable PAE implementation. >> > + * Forcefully enable PAE if kernel parameter "forcepae" is >present. >> > + */ >> > + if (forcepae) { >> > + printk(KERN_WARNING "PAE forced!\n"); >> > + set_cpu_cap(c, X86_FEATURE_PAE); >> > + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); >> >> Right, this implies Dave's patch is preceding yours. I guess hpa can >> fish it out from the thread when applying. > >I will include Dave's patch, it is trivial. > >New patch with all above changes follows. > >Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> >--- > >diff --git a/Documentation/kernel-parameters.txt >b/Documentation/kernel-parameters.txt >index 580a60c..7d57a5a 100644 >--- a/Documentation/kernel-parameters.txt >+++ b/Documentation/kernel-parameters.txt >@@ -2307,6 +2307,13 @@ bytes respectively. Such letter suffixes can >also be entirely omitted. > OSS [HW,OSS] > See Documentation/sound/oss/oss-parameters.txt > >+ pae [X86-32] >+ Forcefully enable Physical Address Extension (PAE). >+ Many Pentium M systems disable PAE but may have a >+ functionally usable PAE implementation. >+ Warning: use of this parameter will taint the kernel >+ and may cause unknown problems. >+ > panic= [KNL] Kernel behaviour on panic: delay <timeout> > timeout > 0: seconds before rebooting > timeout = 0: wait forever >diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c >index 100a9a1..740d2d1 100644 >--- a/arch/x86/boot/cpucheck.c >+++ b/arch/x86/boot/cpucheck.c >@@ -67,6 +67,13 @@ static int is_transmeta(void) > cpu_vendor[2] == A32('M', 'x', '8', '6'); > } > >+static int is_intel(void) >+{ >+ return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && >+ cpu_vendor[1] == A32('i', 'n', 'e', 'I') && >+ cpu_vendor[2] == A32('n', 't', 'e', 'l'); >+} >+ > /* Returns a bitmask of which words we have error bits in */ > static int check_cpuflags(void) > { >@@ -153,6 +160,19 @@ int check_cpu(int *cpu_level_ptr, int >*req_level_ptr, u32 **err_flags_ptr) > asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); > > err = check_cpuflags(); >+ } else if (err == 0x01 && >+ !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && >+ is_intel() && cpu.level == 6 && >+ (cpu.model == 9 || cpu.model == 13)) { >+ /* PAE is disabled on this Pentium M but can be forced */ >+ if (cmdline_find_option_bool("pae")) { >+ puts("WARNING: Forcing PAE in CPU flags\n"); >+ set_bit(X86_FEATURE_PAE, cpu.flags); >+ err = check_cpuflags(); >+ } >+ else { >+ puts("WARNING: PAE disabled. Use parameter 'pae' to enable at your >own risk!\n"); >+ } > } > > if (err_flags_ptr) >diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c >index c67ffa6..7ec4119 100644 >--- a/arch/x86/kernel/cpu/amd.c >+++ b/arch/x86/kernel/cpu/amd.c >@@ -218,7 +218,7 @@ static void amd_k7_smp_check(struct cpuinfo_x86 *c) > */ > WARN_ONCE(1, "WARNING: This combination of AMD" > " processors is not suitable for SMP.\n"); >- add_taint(TAINT_UNSAFE_SMP, LOCKDEP_NOW_UNRELIABLE); >+ add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); > } > > static void init_amd_k7(struct cpuinfo_x86 *c) >diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c >index ea56e7c..cc0d048 100644 >--- a/arch/x86/kernel/cpu/intel.c >+++ b/arch/x86/kernel/cpu/intel.c >@@ -195,6 +195,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) > } > } > >+static int pae; >+static int __init pae_setup(char *__unused) >+{ >+ pae = 1; >+ return 1; >+} >+__setup("pae", pae_setup); >+ > static void intel_workarounds(struct cpuinfo_x86 *c) > { > unsigned long lo, hi; >@@ -225,6 +233,17 @@ static void intel_workarounds(struct cpuinfo_x86 >*c) > clear_cpu_cap(c, X86_FEATURE_SEP); > > /* >+ * PAE CPUID issue: many Pentium M report no PAE but may have a >+ * functionally usable PAE implementation. >+ * Forcefully enable PAE if kernel parameter "pae" is present. >+ */ >+ if (pae) { >+ printk(KERN_WARNING "PAE forced!\n"); >+ set_cpu_cap(c, X86_FEATURE_PAE); >+ add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); >+ } >+ >+ /* > * P4 Xeon errata 037 workaround. > * Hardware prefetcher may cause stale data to be loaded into the >cache. > */ >diff --git a/include/linux/kernel.h b/include/linux/kernel.h >index 196d1ea..08fb024 100644 >--- a/include/linux/kernel.h >+++ b/include/linux/kernel.h >@@ -458,7 +458,7 @@ extern enum system_states { > > #define TAINT_PROPRIETARY_MODULE 0 > #define TAINT_FORCED_MODULE 1 >-#define TAINT_UNSAFE_SMP 2 >+#define TAINT_CPU_OUT_OF_SPEC 2 > #define TAINT_FORCED_RMMOD 3 > #define TAINT_MACHINE_CHECK 4 > #define TAINT_BAD_PAGE 5 >diff --git a/kernel/module.c b/kernel/module.c >index b99e801..8dc7f5e 100644 >--- a/kernel/module.c >+++ b/kernel/module.c >@@ -1015,7 +1015,7 @@ static size_t module_flags_taint(struct module >*mod, char *buf) > buf[l++] = 'C'; > /* > * TAINT_FORCED_RMMOD: could be added. >- * TAINT_UNSAFE_SMP, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't >+ * TAINT_CPU_OUT_OF_SPEC, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't > * apply to modules. > */ > return l; >diff --git a/kernel/panic.c b/kernel/panic.c >index 3eb0ffb..cca8a91 100644 >--- a/kernel/panic.c >+++ b/kernel/panic.c >@@ -199,7 +199,7 @@ struct tnt { > static const struct tnt tnts[] = { > { TAINT_PROPRIETARY_MODULE, 'P', 'G' }, > { TAINT_FORCED_MODULE, 'F', ' ' }, >- { TAINT_UNSAFE_SMP, 'S', ' ' }, >+ { TAINT_CPU_OUT_OF_SPEC, 'S', ' ' }, > { TAINT_FORCED_RMMOD, 'R', ' ' }, > { TAINT_MACHINE_CHECK, 'M', ' ' }, > { TAINT_BAD_PAGE, 'B', ' ' }, -- Sent from my mobile phone. Please pardon brevity and lack of formatting. ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-04 5:04 ` H. Peter Anvin @ 2014-03-04 6:06 ` Chris Bainbridge 2014-03-04 10:44 ` Borislav Petkov 0 siblings, 1 reply; 40+ messages in thread From: Chris Bainbridge @ 2014-03-04 6:06 UTC (permalink / raw) To: H. Peter Anvin Cc: Borislav Petkov, Andreas Mohr, Dennis Mungai, x86, Dave Jones, linux-kernel, devzero On Mon, Mar 03, 2014 at 09:04:19PM -0800, H. Peter Anvin wrote: > forcepae is descriptive. Back to forcepae. Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> --- diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 580a60c..67755ea 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1011,6 +1011,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. parameter will force ia64_sal_cache_flush to call ia64_pal_cache_flush instead of SAL_CACHE_FLUSH. + forcepae [X86-32] + Forcefully enable Physical Address Extension (PAE). + Many Pentium M systems disable PAE but may have a + functionally usable PAE implementation. + Warning: use of this parameter will taint the kernel + and may cause unknown problems. + ftrace=[tracer] [FTRACE] will set and start the specified tracer as early as possible in order to facilitate early diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 100a9a1..f0d0b20 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -67,6 +67,13 @@ static int is_transmeta(void) cpu_vendor[2] == A32('M', 'x', '8', '6'); } +static int is_intel(void) +{ + return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && + cpu_vendor[1] == A32('i', 'n', 'e', 'I') && + cpu_vendor[2] == A32('n', 't', 'e', 'l'); +} + /* Returns a bitmask of which words we have error bits in */ static int check_cpuflags(void) { @@ -153,6 +160,19 @@ int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); err = check_cpuflags(); + } else if (err == 0x01 && + !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && + is_intel() && cpu.level == 6 && + (cpu.model == 9 || cpu.model == 13)) { + /* PAE is disabled on this Pentium M but can be forced */ + if (cmdline_find_option_bool("forcepae")) { + puts("WARNING: Forcing PAE in CPU flags\n"); + set_bit(X86_FEATURE_PAE, cpu.flags); + err = check_cpuflags(); + } + else { + puts("WARNING: PAE disabled. Use parameter 'forcepae' to enable at your own risk!\n"); + } } if (err_flags_ptr) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index c67ffa6..7ec4119 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -218,7 +218,7 @@ static void amd_k7_smp_check(struct cpuinfo_x86 *c) */ WARN_ONCE(1, "WARNING: This combination of AMD" " processors is not suitable for SMP.\n"); - add_taint(TAINT_UNSAFE_SMP, LOCKDEP_NOW_UNRELIABLE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); } static void init_amd_k7(struct cpuinfo_x86 *c) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index ea56e7c..053cb59 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -195,6 +195,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) } } +static int forcepae; +static int __init forcepae_setup(char *__unused) +{ + forcepae = 1; + return 1; +} +__setup("forcepae", forcepae_setup); + static void intel_workarounds(struct cpuinfo_x86 *c) { unsigned long lo, hi; @@ -225,6 +233,17 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID issue: many Pentium M report no PAE but may have a + * functionally usable PAE implementation. + * Forcefully enable PAE if kernel parameter "forcepae" is present. + */ + if (forcepae) { + printk(KERN_WARNING "PAE forced!\n"); + set_cpu_cap(c, X86_FEATURE_PAE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); + } + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 196d1ea..08fb024 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -458,7 +458,7 @@ extern enum system_states { #define TAINT_PROPRIETARY_MODULE 0 #define TAINT_FORCED_MODULE 1 -#define TAINT_UNSAFE_SMP 2 +#define TAINT_CPU_OUT_OF_SPEC 2 #define TAINT_FORCED_RMMOD 3 #define TAINT_MACHINE_CHECK 4 #define TAINT_BAD_PAGE 5 diff --git a/kernel/module.c b/kernel/module.c index b99e801..8dc7f5e 100644 --- a/kernel/module.c +++ b/kernel/module.c @@ -1015,7 +1015,7 @@ static size_t module_flags_taint(struct module *mod, char *buf) buf[l++] = 'C'; /* * TAINT_FORCED_RMMOD: could be added. - * TAINT_UNSAFE_SMP, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't + * TAINT_CPU_OUT_OF_SPEC, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't * apply to modules. */ return l; diff --git a/kernel/panic.c b/kernel/panic.c index 3eb0ffb..cca8a91 100644 --- a/kernel/panic.c +++ b/kernel/panic.c @@ -199,7 +199,7 @@ struct tnt { static const struct tnt tnts[] = { { TAINT_PROPRIETARY_MODULE, 'P', 'G' }, { TAINT_FORCED_MODULE, 'F', ' ' }, - { TAINT_UNSAFE_SMP, 'S', ' ' }, + { TAINT_CPU_OUT_OF_SPEC, 'S', ' ' }, { TAINT_FORCED_RMMOD, 'R', ' ' }, { TAINT_MACHINE_CHECK, 'M', ' ' }, { TAINT_BAD_PAGE, 'B', ' ' }, ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-04 6:06 ` Chris Bainbridge @ 2014-03-04 10:44 ` Borislav Petkov 2014-03-05 4:17 ` Chris Bainbridge 2014-03-07 11:40 ` [PATCH] x86: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M Chris Bainbridge 0 siblings, 2 replies; 40+ messages in thread From: Borislav Petkov @ 2014-03-04 10:44 UTC (permalink / raw) To: Chris Bainbridge Cc: H. Peter Anvin, Andreas Mohr, Dennis Mungai, x86, Dave Jones, linux-kernel, devzero On Tue, Mar 04, 2014 at 01:06:03PM +0700, Chris Bainbridge wrote: > On Mon, Mar 03, 2014 at 09:04:19PM -0800, H. Peter Anvin wrote: > > forcepae is descriptive. > > Back to forcepae. Ok, it looks ok to me after a quick look. Now you only have to ask Dave whether he's fine with you merging his patch into yours, write a nice commit message explaining why this patch is needed and give it a final test on your machine. Look at Documentation/SubmittingPatches for how to properly prepare the patch. Oh, and use git if you don't do so already. :-) And feel free to ask questions at any point if something's not clear. Thanks. -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: Re: [PATCH] x86: set Pentium M as PAE capable 2014-03-04 10:44 ` Borislav Petkov @ 2014-03-05 4:17 ` Chris Bainbridge 2014-03-07 11:40 ` [PATCH] x86: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M Chris Bainbridge 1 sibling, 0 replies; 40+ messages in thread From: Chris Bainbridge @ 2014-03-05 4:17 UTC (permalink / raw) To: Borislav Petkov Cc: H. Peter Anvin, Andreas Mohr, Dennis Mungai, x86, Dave Jones, linux-kernel, devzero On 4 March 2014 17:44, Borislav Petkov <bp@alien8.de> wrote: > On Tue, Mar 04, 2014 at 01:06:03PM +0700, Chris Bainbridge wrote: >> On Mon, Mar 03, 2014 at 09:04:19PM -0800, H. Peter Anvin wrote: >> > forcepae is descriptive. >> >> Back to forcepae. > > Ok, it looks ok to me after a quick look. Now you only have to ask > Dave whether he's fine with you merging his patch into yours, write a > nice commit message explaining why this patch is needed and give it a > final test on your machine. Dave - are you ok with the merge? I take it I am expected to re-post the most recent patch plus changelog entry as a new thread (and with a subject that better reflects the new patch)? ^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH] x86: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M 2014-03-04 10:44 ` Borislav Petkov 2014-03-05 4:17 ` Chris Bainbridge @ 2014-03-07 11:40 ` Chris Bainbridge 2014-03-10 10:25 ` Borislav Petkov ` (2 more replies) 1 sibling, 3 replies; 40+ messages in thread From: Chris Bainbridge @ 2014-03-07 11:40 UTC (permalink / raw) To: x86 Cc: H. Peter Anvin, Andreas Mohr, Dennis Mungai, Dave Jones, linux-kernel, devzero, bp From: Chris Bainbridge <chris.bainbridge@gmail.com> Many Pentium M systems disable PAE but may have a functionally usable PAE implementation. This adds the "forcepae" parameter which bypasses the boot check for PAE, and sets the CPU as being PAE capable. Using this parameter will taint the kernel with TAINT_CPU_OUT_OF_SPEC. Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> --- This patch depends on Dave Jones's TAINT_CPU_OUT_OF_SPEC patch @ https://lkml.org/lkml/2014/2/26/394 diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 580a60c..67755ea 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1011,6 +1011,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. parameter will force ia64_sal_cache_flush to call ia64_pal_cache_flush instead of SAL_CACHE_FLUSH. + forcepae [X86-32] + Forcefully enable Physical Address Extension (PAE). + Many Pentium M systems disable PAE but may have a + functionally usable PAE implementation. + Warning: use of this parameter will taint the kernel + and may cause unknown problems. + ftrace=[tracer] [FTRACE] will set and start the specified tracer as early as possible in order to facilitate early diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 100a9a1..f0d0b20 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -67,6 +67,13 @@ static int is_transmeta(void) cpu_vendor[2] == A32('M', 'x', '8', '6'); } +static int is_intel(void) +{ + return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && + cpu_vendor[1] == A32('i', 'n', 'e', 'I') && + cpu_vendor[2] == A32('n', 't', 'e', 'l'); +} + /* Returns a bitmask of which words we have error bits in */ static int check_cpuflags(void) { @@ -153,6 +160,19 @@ int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); err = check_cpuflags(); + } else if (err == 0x01 && + !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && + is_intel() && cpu.level == 6 && + (cpu.model == 9 || cpu.model == 13)) { + /* PAE is disabled on this Pentium M but can be forced */ + if (cmdline_find_option_bool("forcepae")) { + puts("WARNING: Forcing PAE in CPU flags\n"); + set_bit(X86_FEATURE_PAE, cpu.flags); + err = check_cpuflags(); + } + else { + puts("WARNING: PAE disabled. Use parameter 'forcepae' to enable at your own risk!\n"); + } } if (err_flags_ptr) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index ea56e7c..053cb59 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -195,6 +195,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) } } +static int forcepae; +static int __init forcepae_setup(char *__unused) +{ + forcepae = 1; + return 1; +} +__setup("forcepae", forcepae_setup); + static void intel_workarounds(struct cpuinfo_x86 *c) { unsigned long lo, hi; @@ -225,6 +233,17 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID issue: many Pentium M report no PAE but may have a + * functionally usable PAE implementation. + * Forcefully enable PAE if kernel parameter "forcepae" is present. + */ + if (forcepae) { + printk(KERN_WARNING "PAE forced!\n"); + set_cpu_cap(c, X86_FEATURE_PAE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); + } + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M 2014-03-07 11:40 ` [PATCH] x86: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M Chris Bainbridge @ 2014-03-10 10:25 ` Borislav Petkov 2014-03-20 23:30 ` [tip:x86/cpu] x86, cpu: " tip-bot for Chris Bainbridge 2014-03-20 23:33 ` tip-bot for Chris Bainbridge 2 siblings, 0 replies; 40+ messages in thread From: Borislav Petkov @ 2014-03-10 10:25 UTC (permalink / raw) To: Chris Bainbridge Cc: x86, H. Peter Anvin, Andreas Mohr, Dennis Mungai, Dave Jones, linux-kernel, devzero On Fri, Mar 07, 2014 at 06:40:42PM +0700, Chris Bainbridge wrote: > From: Chris Bainbridge <chris.bainbridge@gmail.com> > > Many Pentium M systems disable PAE but may have a functionally usable PAE > implementation. This adds the "forcepae" parameter which bypasses the boot > check for PAE, and sets the CPU as being PAE capable. Using this parameter > will taint the kernel with TAINT_CPU_OUT_OF_SPEC. > > Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> Looks ok to me. Acked-by: Borislav Petkov <bp@suse.de> -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ^ permalink raw reply [flat|nested] 40+ messages in thread
* [tip:x86/cpu] x86, cpu: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M 2014-03-07 11:40 ` [PATCH] x86: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M Chris Bainbridge 2014-03-10 10:25 ` Borislav Petkov @ 2014-03-20 23:30 ` tip-bot for Chris Bainbridge 2014-03-20 23:33 ` tip-bot for Chris Bainbridge 2 siblings, 0 replies; 40+ messages in thread From: tip-bot for Chris Bainbridge @ 2014-03-20 23:30 UTC (permalink / raw) To: linux-tip-commits; +Cc: linux-kernel, hpa, mingo, tglx, chris.bainbridge Commit-ID: 3e2ae0fed2a12ef72dea787db4c25466f9d89207 Gitweb: http://git.kernel.org/tip/3e2ae0fed2a12ef72dea787db4c25466f9d89207 Author: Chris Bainbridge <chris.bainbridge@gmail.com> AuthorDate: Fri, 7 Mar 2014 18:40:42 +0700 Committer: H. Peter Anvin <hpa@zytor.com> CommitDate: Thu, 20 Mar 2014 16:28:43 -0700 x86, cpu: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M Many Pentium M systems disable PAE but may have a functionally usable PAE implementation. This adds the "forcepae" parameter which bypasses the boot check for PAE, and sets the CPU as being PAE capable. Using this parameter will taint the kernel with TAINT_CPU_OUT_OF_SPEC. Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> Link: http://lkml.kernel.org/r/20140307114040.GA4997@localhost Signed-off-by: H. Peter Anvin <hpa@zytor.com> --- Documentation/kernel-parameters.txt | 7 +++++++ arch/x86/boot/cpucheck.c | 20 ++++++++++++++++++++ arch/x86/kernel/cpu/intel.c | 19 +++++++++++++++++++ 3 files changed, 46 insertions(+) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 7116fda..06600cc 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1011,6 +1011,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. parameter will force ia64_sal_cache_flush to call ia64_pal_cache_flush instead of SAL_CACHE_FLUSH. + forcepae [X86-32] + Forcefully enable Physical Address Extension (PAE). + Many Pentium M systems disable PAE but may have a + functionally usable PAE implementation. + Warning: use of this parameter will taint the kernel + and may cause unknown problems. + ftrace=[tracer] [FTRACE] will set and start the specified tracer as early as possible in order to facilitate early diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 100a9a1..f0d0b20 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -67,6 +67,13 @@ static int is_transmeta(void) cpu_vendor[2] == A32('M', 'x', '8', '6'); } +static int is_intel(void) +{ + return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && + cpu_vendor[1] == A32('i', 'n', 'e', 'I') && + cpu_vendor[2] == A32('n', 't', 'e', 'l'); +} + /* Returns a bitmask of which words we have error bits in */ static int check_cpuflags(void) { @@ -153,6 +160,19 @@ int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); err = check_cpuflags(); + } else if (err == 0x01 && + !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && + is_intel() && cpu.level == 6 && + (cpu.model == 9 || cpu.model == 13)) { + /* PAE is disabled on this Pentium M but can be forced */ + if (cmdline_find_option_bool("forcepae")) { + puts("WARNING: Forcing PAE in CPU flags\n"); + set_bit(X86_FEATURE_PAE, cpu.flags); + err = check_cpuflags(); + } + else { + puts("WARNING: PAE disabled. Use parameter 'forcepae' to enable at your own risk!\n"); + } } if (err_flags_ptr) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 34bbb55..897d620 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -186,6 +186,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) } } +static int forcepae; +static int __init forcepae_setup(char *__unused) +{ + forcepae = 1; + return 1; +} +__setup("forcepae", forcepae_setup); + static void intel_workarounds(struct cpuinfo_x86 *c) { #ifdef CONFIG_X86_F00F_BUG @@ -214,6 +222,17 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID issue: many Pentium M report no PAE but may have a + * functionally usable PAE implementation. + * Forcefully enable PAE if kernel parameter "forcepae" is present. + */ + if (forcepae) { + printk(KERN_WARNING "PAE forced!\n"); + set_cpu_cap(c, X86_FEATURE_PAE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); + } + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ ^ permalink raw reply related [flat|nested] 40+ messages in thread
* [tip:x86/cpu] x86, cpu: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M 2014-03-07 11:40 ` [PATCH] x86: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M Chris Bainbridge 2014-03-10 10:25 ` Borislav Petkov 2014-03-20 23:30 ` [tip:x86/cpu] x86, cpu: " tip-bot for Chris Bainbridge @ 2014-03-20 23:33 ` tip-bot for Chris Bainbridge 2 siblings, 0 replies; 40+ messages in thread From: tip-bot for Chris Bainbridge @ 2014-03-20 23:33 UTC (permalink / raw) To: linux-tip-commits; +Cc: linux-kernel, hpa, mingo, tglx, bp, chris.bainbridge Commit-ID: 69f2366c9456d0ce784cf5aba87ee77eeadc1d5e Gitweb: http://git.kernel.org/tip/69f2366c9456d0ce784cf5aba87ee77eeadc1d5e Author: Chris Bainbridge <chris.bainbridge@gmail.com> AuthorDate: Fri, 7 Mar 2014 18:40:42 +0700 Committer: H. Peter Anvin <hpa@zytor.com> CommitDate: Thu, 20 Mar 2014 16:31:54 -0700 x86, cpu: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M Many Pentium M systems disable PAE but may have a functionally usable PAE implementation. This adds the "forcepae" parameter which bypasses the boot check for PAE, and sets the CPU as being PAE capable. Using this parameter will taint the kernel with TAINT_CPU_OUT_OF_SPEC. Signed-off-by: Chris Bainbridge <chris.bainbridge@gmail.com> Link: http://lkml.kernel.org/r/20140307114040.GA4997@localhost Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: H. Peter Anvin <hpa@zytor.com> --- Documentation/kernel-parameters.txt | 7 +++++++ arch/x86/boot/cpucheck.c | 20 ++++++++++++++++++++ arch/x86/kernel/cpu/intel.c | 19 +++++++++++++++++++ 3 files changed, 46 insertions(+) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 7116fda..06600cc 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1011,6 +1011,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. parameter will force ia64_sal_cache_flush to call ia64_pal_cache_flush instead of SAL_CACHE_FLUSH. + forcepae [X86-32] + Forcefully enable Physical Address Extension (PAE). + Many Pentium M systems disable PAE but may have a + functionally usable PAE implementation. + Warning: use of this parameter will taint the kernel + and may cause unknown problems. + ftrace=[tracer] [FTRACE] will set and start the specified tracer as early as possible in order to facilitate early diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 100a9a1..f0d0b20 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -67,6 +67,13 @@ static int is_transmeta(void) cpu_vendor[2] == A32('M', 'x', '8', '6'); } +static int is_intel(void) +{ + return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && + cpu_vendor[1] == A32('i', 'n', 'e', 'I') && + cpu_vendor[2] == A32('n', 't', 'e', 'l'); +} + /* Returns a bitmask of which words we have error bits in */ static int check_cpuflags(void) { @@ -153,6 +160,19 @@ int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); err = check_cpuflags(); + } else if (err == 0x01 && + !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && + is_intel() && cpu.level == 6 && + (cpu.model == 9 || cpu.model == 13)) { + /* PAE is disabled on this Pentium M but can be forced */ + if (cmdline_find_option_bool("forcepae")) { + puts("WARNING: Forcing PAE in CPU flags\n"); + set_bit(X86_FEATURE_PAE, cpu.flags); + err = check_cpuflags(); + } + else { + puts("WARNING: PAE disabled. Use parameter 'forcepae' to enable at your own risk!\n"); + } } if (err_flags_ptr) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 34bbb55..897d620 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -186,6 +186,14 @@ static void intel_smp_check(struct cpuinfo_x86 *c) } } +static int forcepae; +static int __init forcepae_setup(char *__unused) +{ + forcepae = 1; + return 1; +} +__setup("forcepae", forcepae_setup); + static void intel_workarounds(struct cpuinfo_x86 *c) { #ifdef CONFIG_X86_F00F_BUG @@ -214,6 +222,17 @@ static void intel_workarounds(struct cpuinfo_x86 *c) clear_cpu_cap(c, X86_FEATURE_SEP); /* + * PAE CPUID issue: many Pentium M report no PAE but may have a + * functionally usable PAE implementation. + * Forcefully enable PAE if kernel parameter "forcepae" is present. + */ + if (forcepae) { + printk(KERN_WARNING "PAE forced!\n"); + set_cpu_cap(c, X86_FEATURE_PAE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); + } + + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ ^ permalink raw reply related [flat|nested] 40+ messages in thread
* [tip:x86/cpu] Rename TAINT_UNSAFE_SMP to TAINT_CPU_OUT_OF_SPEC 2014-02-26 15:49 ` Dave Jones 2014-02-26 17:18 ` Borislav Petkov 2014-02-28 7:30 ` Chris Bainbridge @ 2014-03-20 23:30 ` tip-bot for Dave Jones 2 siblings, 0 replies; 40+ messages in thread From: tip-bot for Dave Jones @ 2014-03-20 23:30 UTC (permalink / raw) To: linux-tip-commits; +Cc: linux-kernel, hpa, mingo, davej, davej, tglx Commit-ID: 8c90487cdc64847b4fdd812ab3047f426fec4d13 Gitweb: http://git.kernel.org/tip/8c90487cdc64847b4fdd812ab3047f426fec4d13 Author: Dave Jones <davej@redhat.com> AuthorDate: Wed, 26 Feb 2014 10:49:49 -0500 Committer: H. Peter Anvin <hpa@zytor.com> CommitDate: Thu, 20 Mar 2014 16:28:09 -0700 Rename TAINT_UNSAFE_SMP to TAINT_CPU_OUT_OF_SPEC Rename TAINT_UNSAFE_SMP to TAINT_CPU_OUT_OF_SPEC, so we can repurpose the flag to encompass a wider range of pushing the CPU beyond its warrany. Signed-off-by: Dave Jones <davej@fedoraproject.org> Link: http://lkml.kernel.org/r/20140226154949.GA770@redhat.com Signed-off-by: H. Peter Anvin <hpa@zytor.com> --- arch/x86/kernel/cpu/amd.c | 2 +- include/linux/kernel.h | 2 +- kernel/module.c | 2 +- kernel/panic.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index b85e43a..ce8b8ff 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -218,7 +218,7 @@ static void amd_k7_smp_check(struct cpuinfo_x86 *c) */ WARN_ONCE(1, "WARNING: This combination of AMD" " processors is not suitable for SMP.\n"); - add_taint(TAINT_UNSAFE_SMP, LOCKDEP_NOW_UNRELIABLE); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_NOW_UNRELIABLE); } static void init_amd_k7(struct cpuinfo_x86 *c) diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 196d1ea..08fb024 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -458,7 +458,7 @@ extern enum system_states { #define TAINT_PROPRIETARY_MODULE 0 #define TAINT_FORCED_MODULE 1 -#define TAINT_UNSAFE_SMP 2 +#define TAINT_CPU_OUT_OF_SPEC 2 #define TAINT_FORCED_RMMOD 3 #define TAINT_MACHINE_CHECK 4 #define TAINT_BAD_PAGE 5 diff --git a/kernel/module.c b/kernel/module.c index d24fcf2..ca2c1ad 100644 --- a/kernel/module.c +++ b/kernel/module.c @@ -1015,7 +1015,7 @@ static size_t module_flags_taint(struct module *mod, char *buf) buf[l++] = 'C'; /* * TAINT_FORCED_RMMOD: could be added. - * TAINT_UNSAFE_SMP, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't + * TAINT_CPU_OUT_OF_SPEC, TAINT_MACHINE_CHECK, TAINT_BAD_PAGE don't * apply to modules. */ return l; diff --git a/kernel/panic.c b/kernel/panic.c index 6d63003..2270cfd 100644 --- a/kernel/panic.c +++ b/kernel/panic.c @@ -199,7 +199,7 @@ struct tnt { static const struct tnt tnts[] = { { TAINT_PROPRIETARY_MODULE, 'P', 'G' }, { TAINT_FORCED_MODULE, 'F', ' ' }, - { TAINT_UNSAFE_SMP, 'S', ' ' }, + { TAINT_CPU_OUT_OF_SPEC, 'S', ' ' }, { TAINT_FORCED_RMMOD, 'R', ' ' }, { TAINT_MACHINE_CHECK, 'M', ' ' }, { TAINT_BAD_PAGE, 'B', ' ' }, ^ permalink raw reply related [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 13:18 ` Borislav Petkov 2014-02-26 15:49 ` Dave Jones @ 2014-02-26 16:46 ` H. Peter Anvin 1 sibling, 0 replies; 40+ messages in thread From: H. Peter Anvin @ 2014-02-26 16:46 UTC (permalink / raw) To: Borislav Petkov, Chris Bainbridge; +Cc: davej, x86, linux-kernel On 02/26/2014 05:18 AM, Borislav Petkov wrote: > On Wed, Feb 26, 2014 at 07:12:59PM +0700, Chris Bainbridge wrote: >> @@ -226,6 +234,15 @@ static void intel_workarounds(struct cpuinfo_x86 *c) >> clear_cpu_cap(c, X86_FEATURE_SEP); >> >> /* >> + * PAE CPUID bug: Pentium M reports no PAE but has PAE >> + */ >> + if (forcepae) { >> + printk(KERN_WARNING "PAE forced!\n"); >> + set_cpu_cap(c, X86_FEATURE_PAE); >> + add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); > > This is certainly the wrong taint flag. We'd need a new one or to > repurpose another one as I suggested in a previous mail. > I liked your proposal: > Right, I was about to say that. And since there's no special bit for > running "out-of-spec", we could probably repurpose > > TAINT_UNSAFE_SMP - 'S' - SMP with CPUs not designed for SMP. > > to > > TAINT_UNSAFE_OUT_OF_SPEC (the letter S fits still) and add that taint > everytime we're enforcing functionality against doctor's orders, so to > speak. -hpa ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 12:12 ` Chris Bainbridge 2014-02-26 13:18 ` Borislav Petkov @ 2014-02-26 16:44 ` Matthew Garrett 2014-02-26 16:45 ` H. Peter Anvin 1 sibling, 1 reply; 40+ messages in thread From: Matthew Garrett @ 2014-02-26 16:44 UTC (permalink / raw) To: Chris Bainbridge; +Cc: H. Peter Anvin, davej, x86, linux-kernel On Wed, Feb 26, 2014 at 07:12:59PM +0700, Chris Bainbridge wrote: > The basic findings of the bug discussion is that people are successfully > running PAE kernels on Pentium M (for some unknown reason Grub skips the > validate_cpu code in the kernel, so existing PAE kernels will run > unmodified, although they do fail when booted with syslinux), and people > are using a user-space hack to add "pae" to /proc/cpuinfo. grub is jumping to the 32-bit entry point and skipping the entire real mode setup code. Bad grub. -- Matthew Garrett | mjg59@srcf.ucam.org ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 16:44 ` Matthew Garrett @ 2014-02-26 16:45 ` H. Peter Anvin 2014-02-26 17:10 ` Matthew Garrett 0 siblings, 1 reply; 40+ messages in thread From: H. Peter Anvin @ 2014-02-26 16:45 UTC (permalink / raw) To: Matthew Garrett, Chris Bainbridge; +Cc: davej, x86, linux-kernel On 02/26/2014 08:44 AM, Matthew Garrett wrote: > On Wed, Feb 26, 2014 at 07:12:59PM +0700, Chris Bainbridge wrote: > >> The basic findings of the bug discussion is that people are successfully >> running PAE kernels on Pentium M (for some unknown reason Grub skips the >> validate_cpu code in the kernel, so existing PAE kernels will run >> unmodified, although they do fail when booted with syslinux), and people >> are using a user-space hack to add "pae" to /proc/cpuinfo. > > grub is jumping to the 32-bit entry point and skipping the entire real > mode setup code. Bad grub. > Yes. Grub can be made to behave sanely by using "linux16" and "initrd16", but of course none of the distros do it that way. There are much worse problems with that. -hpa ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 16:45 ` H. Peter Anvin @ 2014-02-26 17:10 ` Matthew Garrett 2014-02-26 17:57 ` H. Peter Anvin 0 siblings, 1 reply; 40+ messages in thread From: Matthew Garrett @ 2014-02-26 17:10 UTC (permalink / raw) To: H. Peter Anvin; +Cc: Chris Bainbridge, davej, x86, linux-kernel On Wed, Feb 26, 2014 at 08:45:41AM -0800, H. Peter Anvin wrote: > Yes. Grub can be made to behave sanely by using "linux16" and > "initrd16", but of course none of the distros do it that way. Fedora does as of F20, but yeah, point taken. -- Matthew Garrett | mjg59@srcf.ucam.org ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 17:10 ` Matthew Garrett @ 2014-02-26 17:57 ` H. Peter Anvin 2014-03-03 0:11 ` H. Peter Anvin 0 siblings, 1 reply; 40+ messages in thread From: H. Peter Anvin @ 2014-02-26 17:57 UTC (permalink / raw) To: Matthew Garrett; +Cc: Chris Bainbridge, davej, x86, linux-kernel On 02/26/2014 09:10 AM, Matthew Garrett wrote: > On Wed, Feb 26, 2014 at 08:45:41AM -0800, H. Peter Anvin wrote: > >> Yes. Grub can be made to behave sanely by using "linux16" and >> "initrd16", but of course none of the distros do it that way. > > Fedora does as of F20, but yeah, point taken. > Oh, good to hear. -hpa ^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH] x86: set Pentium M as PAE capable 2014-02-26 17:57 ` H. Peter Anvin @ 2014-03-03 0:11 ` H. Peter Anvin 0 siblings, 0 replies; 40+ messages in thread From: H. Peter Anvin @ 2014-03-03 0:11 UTC (permalink / raw) To: Matthew Garrett; +Cc: Chris Bainbridge, davej, x86, linux-kernel On 02/26/2014 09:57 AM, H. Peter Anvin wrote: > On 02/26/2014 09:10 AM, Matthew Garrett wrote: >> On Wed, Feb 26, 2014 at 08:45:41AM -0800, H. Peter Anvin wrote: >> >>> Yes. Grub can be made to behave sanely by using "linux16" and >>> "initrd16", but of course none of the distros do it that way. >> >> Fedora does as of F20, but yeah, point taken. >> > > Oh, good to hear. > Hmm... this doesn't seem to actually be the case. I recently did a F20 install on a clean system, and it still uses linux/initrd. So unless you changed the meaning of linux/initrd inside of Grub2, it is still doing the pointless bypass. -hpa ^ permalink raw reply [flat|nested] 40+ messages in thread
end of thread, other threads:[~2014-03-20 23:33 UTC | newest] Thread overview: 40+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2014-02-25 6:01 [PATCH] x86: set Pentium M as PAE capable Chris Bainbridge 2014-02-25 10:45 ` H. Peter Anvin 2014-02-25 11:35 ` Borislav Petkov 2014-02-25 12:06 ` Peter Hurley 2014-02-25 12:07 ` One Thousand Gnomes 2014-02-25 16:26 ` Dave Jones 2014-02-25 17:16 ` H. Peter Anvin 2014-02-26 12:12 ` Chris Bainbridge 2014-02-26 13:18 ` Borislav Petkov 2014-02-26 15:49 ` Dave Jones 2014-02-26 17:18 ` Borislav Petkov 2014-02-26 17:20 ` Dave Jones 2014-02-26 17:28 ` Borislav Petkov 2014-02-28 7:30 ` Chris Bainbridge [not found] ` <CAKKYfmFgVjYwvThpB0FBB+ggOwULWKLpz7ADT1eojno_KtD9yw@mail.gmail.com> 2014-02-28 14:00 ` Chris Bainbridge 2014-03-02 20:56 ` Andreas Mohr 2014-03-02 20:59 ` H. Peter Anvin 2014-03-02 21:02 ` Dave Jones 2014-03-02 21:04 ` Borislav Petkov 2014-03-02 21:13 ` Andreas Mohr 2014-03-02 21:42 ` Gene Heskett 2014-03-03 12:31 ` One Thousand Gnomes 2014-03-03 8:04 ` Chris Bainbridge 2014-03-03 19:29 ` Borislav Petkov 2014-03-04 5:01 ` Chris Bainbridge 2014-03-04 5:04 ` H. Peter Anvin 2014-03-04 6:06 ` Chris Bainbridge 2014-03-04 10:44 ` Borislav Petkov 2014-03-05 4:17 ` Chris Bainbridge 2014-03-07 11:40 ` [PATCH] x86: Add forcepae parameter for booting PAE kernels on PAE-disabled Pentium M Chris Bainbridge 2014-03-10 10:25 ` Borislav Petkov 2014-03-20 23:30 ` [tip:x86/cpu] x86, cpu: " tip-bot for Chris Bainbridge 2014-03-20 23:33 ` tip-bot for Chris Bainbridge 2014-03-20 23:30 ` [tip:x86/cpu] Rename TAINT_UNSAFE_SMP to TAINT_CPU_OUT_OF_SPEC tip-bot for Dave Jones 2014-02-26 16:46 ` [PATCH] x86: set Pentium M as PAE capable H. Peter Anvin 2014-02-26 16:44 ` Matthew Garrett 2014-02-26 16:45 ` H. Peter Anvin 2014-02-26 17:10 ` Matthew Garrett 2014-02-26 17:57 ` H. Peter Anvin 2014-03-03 0:11 ` H. Peter Anvin
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