* [Qemu-devel] [PATCH v4 0/3] spapr: fix H_SET_MODE
@ 2014-03-07 4:37 Alexey Kardashevskiy
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 1/3] target-ppc: introduce powerisa-207-server flag Alexey Kardashevskiy
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Alexey Kardashevskiy @ 2014-03-07 4:37 UTC (permalink / raw)
To: qemu-devel
Cc: Alexey Kardashevskiy, qemu-ppc, Anton Blanchard, Alexander Graf
This fixes H_SET_MODE.
Changes:
v4:
* rebased on top of current ppc-next.
* changed PPC2_ISA207S flag value
Alexey Kardashevskiy (3):
target-ppc: introduce powerisa-207-server flag
spapr-hcall: fix little-endian resource handling in H_SET_MODE
spapr-hcall: add address-translation-mode-on-interrupt resource in
H_SET_MODE
hw/ppc/spapr_hcall.c | 64 +++++++++++++++++++++++++++++++++++++++------
include/hw/ppc/spapr.h | 9 +++++--
target-ppc/cpu.h | 4 +++
target-ppc/translate_init.c | 3 ++-
4 files changed, 69 insertions(+), 11 deletions(-)
--
1.8.4.rc4
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH v4 1/3] target-ppc: introduce powerisa-207-server flag
2014-03-07 4:37 [Qemu-devel] [PATCH v4 0/3] spapr: fix H_SET_MODE Alexey Kardashevskiy
@ 2014-03-07 4:37 ` Alexey Kardashevskiy
2014-03-19 9:19 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 2/3] spapr-hcall: fix little-endian resource handling in H_SET_MODE Alexey Kardashevskiy
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 3/3] spapr-hcall: add address-translation-mode-on-interrupt resource " Alexey Kardashevskiy
2 siblings, 1 reply; 6+ messages in thread
From: Alexey Kardashevskiy @ 2014-03-07 4:37 UTC (permalink / raw)
To: qemu-devel
Cc: Alexey Kardashevskiy, qemu-ppc, Anton Blanchard, Alexander Graf
This flag will be used to decide whether to emulate some bits of
H_SET_MODE hypercall because some are POWER8-only.
While we are here, add 2.05 flag to POWER8 family too. POWER7/7+ already
have it.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
target-ppc/cpu.h | 2 ++
target-ppc/translate_init.c | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index afab267..27a2cd9 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1900,6 +1900,8 @@ enum {
PPC2_LSQ_ISA207 = 0x0000000000002000ULL,
/* ISA 2.07 Altivec */
PPC2_ALTIVEC_207 = 0x0000000000004000ULL,
+ /* PowerISA 2.07 Book3s specification */
+ PPC2_ISA207S = 0x0000000000008000ULL,
#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 3eafbb0..9f896eb 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7172,7 +7172,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
- PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207;
+ PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
+ PPC2_ISA205 | PPC2_ISA207S;
pcc->msr_mask = 0x800000000284FF36ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
--
1.8.4.rc4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH v4 2/3] spapr-hcall: fix little-endian resource handling in H_SET_MODE
2014-03-07 4:37 [Qemu-devel] [PATCH v4 0/3] spapr: fix H_SET_MODE Alexey Kardashevskiy
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 1/3] target-ppc: introduce powerisa-207-server flag Alexey Kardashevskiy
@ 2014-03-07 4:37 ` Alexey Kardashevskiy
2014-03-19 9:22 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 3/3] spapr-hcall: add address-translation-mode-on-interrupt resource " Alexey Kardashevskiy
2 siblings, 1 reply; 6+ messages in thread
From: Alexey Kardashevskiy @ 2014-03-07 4:37 UTC (permalink / raw)
To: qemu-devel
Cc: Alexey Kardashevskiy, qemu-ppc, Anton Blanchard, Alexander Graf
This changes resource code definitions to ones used in the host kernel.
This fixes H_SET_MODE_RESOURCE_LE (switch between big endian and
little endian) to sync registers from KVM before changing LPCR value.
This adds a set_spr() helper to update an SPR in a CPU's context to avoid
possible races and makes use of it to change LPCR.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
hw/ppc/spapr_hcall.c | 38 ++++++++++++++++++++++++++++++--------
include/hw/ppc/spapr.h | 9 +++++++--
2 files changed, 37 insertions(+), 10 deletions(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index d918780..1bf19b2 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -4,6 +4,33 @@
#include "hw/ppc/spapr.h"
#include "mmu-hash64.h"
+struct spr_sync_struct {
+ CPUState *cs;
+ int spr;
+ target_ulong value;
+ target_ulong mask;
+};
+
+static void do_spr_sync(void *arg)
+{
+ struct spr_sync_struct *s = arg;
+ PowerPCCPU *cp = POWERPC_CPU(s->cs);
+ CPUPPCState *env = &cp->env;
+
+ cpu_synchronize_state(s->cs);
+ env->spr[s->spr] &= ~s->mask;
+ env->spr[s->spr] |= s->value;
+}
+
+static void set_spr(CPUState *cs, int spr, target_ulong value,
+ target_ulong mask)
+{
+ struct spr_sync_struct s = {
+ .cs = cs, .spr = spr, .value = value, .mask = mask
+ };
+ run_on_cpu(cs, do_spr_sync, &s);
+}
+
static target_ulong compute_tlbie_rb(target_ulong v, target_ulong r,
target_ulong pte_index)
{
@@ -690,7 +717,7 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong value2 = args[3];
target_ulong ret = H_P2;
- if (resource == H_SET_MODE_ENDIAN) {
+ if (resource == H_SET_MODE_RESOURCE_LE) {
if (value1) {
ret = H_P3;
goto out;
@@ -699,22 +726,17 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
ret = H_P4;
goto out;
}
-
switch (mflags) {
case H_SET_MODE_ENDIAN_BIG:
CPU_FOREACH(cs) {
- PowerPCCPU *cp = POWERPC_CPU(cs);
- CPUPPCState *env = &cp->env;
- env->spr[SPR_LPCR] &= ~LPCR_ILE;
+ set_spr(cs, SPR_LPCR, 0, LPCR_ILE);
}
ret = H_SUCCESS;
break;
case H_SET_MODE_ENDIAN_LITTLE:
CPU_FOREACH(cs) {
- PowerPCCPU *cp = POWERPC_CPU(cs);
- CPUPPCState *env = &cp->env;
- env->spr[SPR_LPCR] |= LPCR_ILE;
+ set_spr(cs, SPR_LPCR, LPCR_ILE, LPCR_ILE);
}
ret = H_SUCCESS;
break;
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 449fc7c..5fdac1e 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -153,8 +153,13 @@ typedef struct sPAPREnvironment {
#define H_PP1 (1ULL<<(63-62))
#define H_PP2 (1ULL<<(63-63))
-/* H_SET_MODE flags */
-#define H_SET_MODE_ENDIAN 4
+/* Values for 2nd argument to H_SET_MODE */
+#define H_SET_MODE_RESOURCE_SET_CIABR 1
+#define H_SET_MODE_RESOURCE_SET_DAWR 2
+#define H_SET_MODE_RESOURCE_ADDR_TRANS_MODE 3
+#define H_SET_MODE_RESOURCE_LE 4
+
+/* Flags for H_SET_MODE_RESOURCE_LE */
#define H_SET_MODE_ENDIAN_BIG 0
#define H_SET_MODE_ENDIAN_LITTLE 1
--
1.8.4.rc4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH v4 3/3] spapr-hcall: add address-translation-mode-on-interrupt resource in H_SET_MODE
2014-03-07 4:37 [Qemu-devel] [PATCH v4 0/3] spapr: fix H_SET_MODE Alexey Kardashevskiy
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 1/3] target-ppc: introduce powerisa-207-server flag Alexey Kardashevskiy
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 2/3] spapr-hcall: fix little-endian resource handling in H_SET_MODE Alexey Kardashevskiy
@ 2014-03-07 4:37 ` Alexey Kardashevskiy
2 siblings, 0 replies; 6+ messages in thread
From: Alexey Kardashevskiy @ 2014-03-07 4:37 UTC (permalink / raw)
To: qemu-devel
Cc: Alexey Kardashevskiy, qemu-ppc, Anton Blanchard, Alexander Graf
This adds handling of the RESOURCE_ADDR_TRANS_MODE resource from
the H_SET_MODE, for POWER8 (PowerISA 2.07) only.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
hw/ppc/spapr_hcall.c | 26 ++++++++++++++++++++++++++
target-ppc/cpu.h | 2 ++
2 files changed, 28 insertions(+)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 1bf19b2..d0e0889 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -744,6 +744,32 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
default:
ret = H_UNSUPPORTED_FLAG;
}
+ } else if (resource == H_SET_MODE_RESOURCE_ADDR_TRANS_MODE) {
+ PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
+
+ if (!(pcc->insns_flags2 & PPC2_ISA207S)) {
+ return H_P2;
+ }
+ if (value1) {
+ ret = H_P3;
+ goto out;
+ }
+ if (value2) {
+ ret = H_P4;
+ goto out;
+ }
+ switch (mflags) {
+ case 0:
+ case 2:
+ case 3:
+ CPU_FOREACH(cs) {
+ set_spr(cs, SPR_LPCR, mflags << LPCR_AIL_SH, LPCR_AIL);
+ }
+ return H_SUCCESS;
+
+ default:
+ return H_UNSUPPORTED_FLAG;
+ }
}
out:
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 27a2cd9..13fa6a3 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -462,6 +462,8 @@ struct ppc_slb_t {
#define MSR_LE 0 /* Little-endian mode 1 hflags */
#define LPCR_ILE (1 << (63-38))
+#define LPCR_AIL 0x01800000 /* Alternate interrupt location */
+#define LPCR_AIL_SH (63-40)
#define msr_sf ((env->msr >> MSR_SF) & 1)
#define msr_isf ((env->msr >> MSR_ISF) & 1)
--
1.8.4.rc4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v4 1/3] target-ppc: introduce powerisa-207-server flag
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 1/3] target-ppc: introduce powerisa-207-server flag Alexey Kardashevskiy
@ 2014-03-19 9:19 ` Greg Kurz
0 siblings, 0 replies; 6+ messages in thread
From: Greg Kurz @ 2014-03-19 9:19 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: qemu-ppc, qemu-devel
On Fri, 7 Mar 2014 15:37:39 +1100
Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
> This flag will be used to decide whether to emulate some bits of
> H_SET_MODE hypercall because some are POWER8-only.
>
> While we are here, add 2.05 flag to POWER8 family too. POWER7/7+ already
> have it.
>
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> ---
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
> target-ppc/cpu.h | 2 ++
> target-ppc/translate_init.c | 3 ++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index afab267..27a2cd9 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -1900,6 +1900,8 @@ enum {
> PPC2_LSQ_ISA207 = 0x0000000000002000ULL,
> /* ISA 2.07 Altivec */
> PPC2_ALTIVEC_207 = 0x0000000000004000ULL,
> + /* PowerISA 2.07 Book3s specification */
> + PPC2_ISA207S = 0x0000000000008000ULL,
>
> #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
> PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 3eafbb0..9f896eb 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -7172,7 +7172,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
> PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
> PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
> PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
> - PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207;
> + PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
> + PPC2_ISA205 | PPC2_ISA207S;
> pcc->msr_mask = 0x800000000284FF36ULL;
> pcc->mmu_model = POWERPC_MMU_2_06;
> #if defined(CONFIG_SOFTMMU)
--
Gregory Kurz kurzgreg@fr.ibm.com
gkurz@linux.vnet.ibm.com
Software Engineer @ IBM/Meiosys http://www.ibm.com
Tel +33 (0)562 165 496
"Anarchy is about taking complete responsibility for yourself."
Alan Moore.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v4 2/3] spapr-hcall: fix little-endian resource handling in H_SET_MODE
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 2/3] spapr-hcall: fix little-endian resource handling in H_SET_MODE Alexey Kardashevskiy
@ 2014-03-19 9:22 ` Greg Kurz
0 siblings, 0 replies; 6+ messages in thread
From: Greg Kurz @ 2014-03-19 9:22 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: qemu-ppc, qemu-devel, Andreas Färber
On Fri, 7 Mar 2014 15:37:40 +1100
Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
> This changes resource code definitions to ones used in the host kernel.
>
> This fixes H_SET_MODE_RESOURCE_LE (switch between big endian and
> little endian) to sync registers from KVM before changing LPCR value.
>
> This adds a set_spr() helper to update an SPR in a CPU's context to avoid
> possible races and makes use of it to change LPCR.
>
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> ---
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
> hw/ppc/spapr_hcall.c | 38 ++++++++++++++++++++++++++++++--------
> include/hw/ppc/spapr.h | 9 +++++++--
> 2 files changed, 37 insertions(+), 10 deletions(-)
>
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index d918780..1bf19b2 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -4,6 +4,33 @@
> #include "hw/ppc/spapr.h"
> #include "mmu-hash64.h"
>
> +struct spr_sync_struct {
> + CPUState *cs;
> + int spr;
> + target_ulong value;
> + target_ulong mask;
> +};
> +
> +static void do_spr_sync(void *arg)
> +{
> + struct spr_sync_struct *s = arg;
> + PowerPCCPU *cp = POWERPC_CPU(s->cs);
> + CPUPPCState *env = &cp->env;
> +
> + cpu_synchronize_state(s->cs);
> + env->spr[s->spr] &= ~s->mask;
> + env->spr[s->spr] |= s->value;
> +}
> +
> +static void set_spr(CPUState *cs, int spr, target_ulong value,
> + target_ulong mask)
> +{
> + struct spr_sync_struct s = {
> + .cs = cs, .spr = spr, .value = value, .mask = mask
> + };
> + run_on_cpu(cs, do_spr_sync, &s);
> +}
> +
> static target_ulong compute_tlbie_rb(target_ulong v, target_ulong r,
> target_ulong pte_index)
> {
> @@ -690,7 +717,7 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
> target_ulong value2 = args[3];
> target_ulong ret = H_P2;
>
> - if (resource == H_SET_MODE_ENDIAN) {
> + if (resource == H_SET_MODE_RESOURCE_LE) {
> if (value1) {
> ret = H_P3;
> goto out;
> @@ -699,22 +726,17 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
> ret = H_P4;
> goto out;
> }
> -
> switch (mflags) {
> case H_SET_MODE_ENDIAN_BIG:
> CPU_FOREACH(cs) {
> - PowerPCCPU *cp = POWERPC_CPU(cs);
> - CPUPPCState *env = &cp->env;
> - env->spr[SPR_LPCR] &= ~LPCR_ILE;
> + set_spr(cs, SPR_LPCR, 0, LPCR_ILE);
> }
> ret = H_SUCCESS;
> break;
>
> case H_SET_MODE_ENDIAN_LITTLE:
> CPU_FOREACH(cs) {
> - PowerPCCPU *cp = POWERPC_CPU(cs);
> - CPUPPCState *env = &cp->env;
> - env->spr[SPR_LPCR] |= LPCR_ILE;
> + set_spr(cs, SPR_LPCR, LPCR_ILE, LPCR_ILE);
> }
> ret = H_SUCCESS;
> break;
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 449fc7c..5fdac1e 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -153,8 +153,13 @@ typedef struct sPAPREnvironment {
> #define H_PP1 (1ULL<<(63-62))
> #define H_PP2 (1ULL<<(63-63))
>
> -/* H_SET_MODE flags */
> -#define H_SET_MODE_ENDIAN 4
> +/* Values for 2nd argument to H_SET_MODE */
> +#define H_SET_MODE_RESOURCE_SET_CIABR 1
> +#define H_SET_MODE_RESOURCE_SET_DAWR 2
> +#define H_SET_MODE_RESOURCE_ADDR_TRANS_MODE 3
> +#define H_SET_MODE_RESOURCE_LE 4
> +
> +/* Flags for H_SET_MODE_RESOURCE_LE */
> #define H_SET_MODE_ENDIAN_BIG 0
> #define H_SET_MODE_ENDIAN_LITTLE 1
>
--
Gregory Kurz kurzgreg@fr.ibm.com
gkurz@linux.vnet.ibm.com
Software Engineer @ IBM/Meiosys http://www.ibm.com
Tel +33 (0)562 165 496
"Anarchy is about taking complete responsibility for yourself."
Alan Moore.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-03-19 9:23 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-03-07 4:37 [Qemu-devel] [PATCH v4 0/3] spapr: fix H_SET_MODE Alexey Kardashevskiy
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 1/3] target-ppc: introduce powerisa-207-server flag Alexey Kardashevskiy
2014-03-19 9:19 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 2/3] spapr-hcall: fix little-endian resource handling in H_SET_MODE Alexey Kardashevskiy
2014-03-19 9:22 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2014-03-07 4:37 ` [Qemu-devel] [PATCH v4 3/3] spapr-hcall: add address-translation-mode-on-interrupt resource " Alexey Kardashevskiy
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