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From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: mrnuke <mr.nuke.me-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 1/2] v1 ARM: sun4i: spi: Allow Rx transfers larger than FIFO size
Date: Thu, 20 Mar 2014 16:08:45 +0100	[thread overview]
Message-ID: <20140320150845.GM27873@lukather> (raw)
In-Reply-To: <29069269.5VPQtL8a7I-joXr/IIKmbNbKQuZ0yLBSw@public.gmane.org>

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On Wed, Mar 19, 2014 at 01:03:45PM -0500, mrnuke wrote:
> > > -	/* We don't support transfer larger than the FIFO */
> > > -	if (tfr->len > SUN4I_FIFO_DEPTH)
> > > +	if (tfr->len > SUN4I_MAX_XFER_SIZE)
> > > +		return -EINVAL;
> > 
> > Why do you still need this test?
> > 
> SUN4I_MAX_XFER_SIZE is not the FIFO size. It is the max number we can write in 
> SUN4I_BURST_CNT_REG. That's the maximum SPI burst size (16 MiB - 1) that the 
> hardware supports. Anything larger, and we'd need to break up the transfer in 
> several bursts. That's a different problem than the one I'm addressing.

Ok, it makes sense.

> > > +	/* Receive FIFO 3/4 full */
> > > +	if (status & SUN4I_INT_CTL_RF_F34) {
> > > +		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
> > > +		/* Only clear the interrupt _after_ draining the FIFO */
> > > +		sun4i_spi_write(sspi, SUN4I_INT_STA_REG,
> > > SUN4I_INT_CTL_RF_F34);
> > 
> > Not that it's important, but it really doesn't matter to do it before
> > or after, the interrupts are disabled in the handler.
> > 
> I think this was one of those bits that keeps being set by hardware until the 
> Rx FIFO is under 48 bytes (less than 3/4 full).  I'll have to look into this 
> again.

Ok, it would deserve to be in the comments then :)

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] v1 ARM: sun4i: spi: Allow Rx transfers larger than FIFO size
Date: Thu, 20 Mar 2014 16:08:45 +0100	[thread overview]
Message-ID: <20140320150845.GM27873@lukather> (raw)
In-Reply-To: <29069269.5VPQtL8a7I@nukelap.gtech>

On Wed, Mar 19, 2014 at 01:03:45PM -0500, mrnuke wrote:
> > > -	/* We don't support transfer larger than the FIFO */
> > > -	if (tfr->len > SUN4I_FIFO_DEPTH)
> > > +	if (tfr->len > SUN4I_MAX_XFER_SIZE)
> > > +		return -EINVAL;
> > 
> > Why do you still need this test?
> > 
> SUN4I_MAX_XFER_SIZE is not the FIFO size. It is the max number we can write in 
> SUN4I_BURST_CNT_REG. That's the maximum SPI burst size (16 MiB - 1) that the 
> hardware supports. Anything larger, and we'd need to break up the transfer in 
> several bursts. That's a different problem than the one I'm addressing.

Ok, it makes sense.

> > > +	/* Receive FIFO 3/4 full */
> > > +	if (status & SUN4I_INT_CTL_RF_F34) {
> > > +		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
> > > +		/* Only clear the interrupt _after_ draining the FIFO */
> > > +		sun4i_spi_write(sspi, SUN4I_INT_STA_REG,
> > > SUN4I_INT_CTL_RF_F34);
> > 
> > Not that it's important, but it really doesn't matter to do it before
> > or after, the interrupts are disabled in the handler.
> > 
> I think this was one of those bits that keeps being set by hardware until the 
> Rx FIFO is under 48 bytes (less than 3/4 full).  I'll have to look into this 
> again.

Ok, it would deserve to be in the comments then :)

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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  parent reply	other threads:[~2014-03-20 15:08 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-18 22:04 [PATCH 1/2] v1 ARM: sun4i: spi: Allow Rx transfers larger than FIFO size Alexandru Gagniuc
2014-03-18 22:04 ` Alexandru Gagniuc
     [not found] ` <2167943.Zs1zPAMITN-joXr/IIKmbNbKQuZ0yLBSw@public.gmane.org>
2014-03-19 16:55   ` Maxime Ripard
2014-03-19 16:55     ` Maxime Ripard
2014-03-19 18:03     ` mrnuke
2014-03-19 18:03       ` mrnuke
     [not found]       ` <29069269.5VPQtL8a7I-joXr/IIKmbNbKQuZ0yLBSw@public.gmane.org>
2014-03-20 15:08         ` Maxime Ripard [this message]
2014-03-20 15:08           ` Maxime Ripard

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