[PATCH] arm: socfpga: reserve the region at start of phys mem

[PATCH] arm: socfpga: reserve the region at start of phys mem

[Sebastian Andrzej Siewior]

The SMP bringup code copies trampline code to the physical location 0x0.
If somebody allocated memory from this location then it will be
overwritten.
This patch reserves the few bytes so that it won't be used by the memory
allocator.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
 arch/arm/mach-socfpga/socfpga.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index a9050e6..2ba992a 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -26,6 +26,7 @@
 #include <linux/phy.h>
 #include <linux/micrel_phy.h>
 #include <linux/sys_soc.h>
+#include <linux/memblock.h>
 
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/arch.h>
@@ -315,6 +316,17 @@ static void __init socfpga_cyclone5_init(void)
 	socfpga_soc_device_init();
 }
 
+static void __init socfmpga_smp_reserve(void)
+{
+#ifdef CONFIG_SMP
+	int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
+	int ret;
+
+	ret = memblock_reserve(0, trampoline_size);
+	WARN_ON(ret);
+#endif
+}
+
 static const char *altera_dt_match[] = {
 	"altr,socfpga",
 	NULL
@@ -327,4 +339,5 @@ DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
 	.init_machine	= socfpga_cyclone5_init,
 	.restart	= socfpga_cyclone5_restart,
 	.dt_compat	= altera_dt_match,
+	.reserve	= socfmpga_smp_reserve,
 MACHINE_END
-- 
1.9.0.rc3

[PATCH] arm: socfpga: reserve the region at start of phys mem

[Dinh Nguyen]

On Tue, 2014-02-18 at 18:34 +0100, Sebastian Andrzej Siewior wrote:
> The SMP bringup code copies trampline code to the physical location 0x0.
> If somebody allocated memory from this location then it will be
> overwritten.
> This patch reserves the few bytes so that it won't be used by the memory
> allocator.
> 
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> ---
>  arch/arm/mach-socfpga/socfpga.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
> index a9050e6..2ba992a 100644
> --- a/arch/arm/mach-socfpga/socfpga.c
> +++ b/arch/arm/mach-socfpga/socfpga.c
> @@ -26,6 +26,7 @@
>  #include <linux/phy.h>
>  #include <linux/micrel_phy.h>
>  #include <linux/sys_soc.h>
> +#include <linux/memblock.h>
>  
>  #include <asm/hardware/cache-l2x0.h>
>  #include <asm/mach/arch.h>
> @@ -315,6 +316,17 @@ static void __init socfpga_cyclone5_init(void)
>  	socfpga_soc_device_init();
>  }
>  
> +static void __init socfmpga_smp_reserve(void)

s/socfmpga/socfpga
> +{
> +#ifdef CONFIG_SMP
> +	int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
> +	int ret;
> +
> +	ret = memblock_reserve(0, trampoline_size);
> +	WARN_ON(ret);
> +#endif
> +}
> +
>  static const char *altera_dt_match[] = {
>  	"altr,socfpga",
>  	NULL
> @@ -327,4 +339,5 @@ DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
>  	.init_machine	= socfpga_cyclone5_init,
>  	.restart	= socfpga_cyclone5_restart,
>  	.dt_compat	= altera_dt_match,
> +	.reserve	= socfmpga_smp_reserve,

same..

I've applied this patch with the above edits.

Thanks,
Dinh
>  MACHINE_END

[PATCH] arm: socfpga: reserve the region at start of phys mem

[Sebastian Andrzej Siewior]

On 03/14/2014 06:01 PM, Dinh Nguyen wrote:

> I've applied this patch with the above edits.

Thank you.

> 
> Thanks,
> Dinh

Sebastian

[PATCH] arm: socfpga: reserve the region at start of phys mem

[Sebastian Andrzej Siewior]

On 03/14/2014 06:01 PM, Dinh Nguyen wrote:
> I've applied this patch with the above edits.

I could find this patch v3.15-rc3 and I couldn't find it in your next
git tree. Did I miss something?

> 
> Thanks,
> Dinh

Sebastian

[PATCH] arm: socfpga: reserve the region at start of phys mem

[Josh Cartwright]

On Tue, Feb 18, 2014 at 06:34:57PM +0100, Sebastian Andrzej Siewior wrote:
> The SMP bringup code copies trampline code to the physical location 0x0.
> If somebody allocated memory from this location then it will be
> overwritten.
> This patch reserves the few bytes so that it won't be used by the memory
> allocator.
> 
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
[..]
> +static void __init socfmpga_smp_reserve(void)
> +{
> +#ifdef CONFIG_SMP
> +	int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
> +	int ret;
> +
> +	ret = memblock_reserve(0, trampoline_size);
> +	WARN_ON(ret);
> +#endif
> +}
> +
>  static const char *altera_dt_match[] = {
>  	"altr,socfpga",
>  	NULL
> @@ -327,4 +339,5 @@ DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
>  	.init_machine	= socfpga_cyclone5_init,
>  	.restart	= socfpga_cyclone5_restart,
>  	.dt_compat	= altera_dt_match,
> +	.reserve	= socfmpga_smp_reserve,
>  MACHINE_END

Is there a particular reason why you aren't describing this reservation
in devicetree using a /memreserve/ node?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

[PATCH] arm: socfpga: reserve the region at start of phys mem

[Sebastian Andrzej Siewior]

On 04/30/2014 06:17 PM, Josh Cartwright wrote:
> Is there a particular reason why you aren't describing this reservation
> in devicetree using a /memreserve/ node?

Because the kernel is using memory at a specific address it did not
allocate. If the memory address where the second CPU come up could be
set then this node wouldn't be required and a simple kmalloc() would do
it, too.

Sebastian

[PATCH] arm: socfpga: reserve the region at start of phys mem

[Josh Cartwright]

On Wed, Apr 30, 2014 at 07:01:36PM +0200, Sebastian Andrzej Siewior wrote:
> On 04/30/2014 06:17 PM, Josh Cartwright wrote:
> > Is there a particular reason why you aren't describing this reservation
> > in devicetree using a /memreserve/ node?
> 
> Because the kernel is using memory at a specific address it did not
> allocate. If the memory address where the second CPU come up could be
> set then this node wouldn't be required and a simple kmalloc() would do
> it, too.

I understand the need to reserve the area, but questioning the mechanism
used to do so.  How is the socfpga case different from Highbank, for
example, which makes use of /memreserve/ for what appears to be a very
similar purpose (see arch/arm/boot/dts/highbank.dts):

	/* First 4KB has pen for secondary cores. */
	/memreserve/ 0x00000000 0x0001000;

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

[PATCH] arm: socfpga: reserve the region at start of phys mem

[Dinh Nguyen]

Hi Sebastian,

On 4/30/14 12:32 PM, Josh Cartwright wrote:
> On Wed, Apr 30, 2014 at 07:01:36PM +0200, Sebastian Andrzej Siewior wrote:
>> On 04/30/2014 06:17 PM, Josh Cartwright wrote:
>>> Is there a particular reason why you aren't describing this reservation
>>> in devicetree using a /memreserve/ node?
>> Because the kernel is using memory at a specific address it did not
>> allocate. If the memory address where the second CPU come up could be
>> set then this node wouldn't be required and a simple kmalloc() would do
>> it, too.
> I understand the need to reserve the area, but questioning the mechanism
> used to do so.  How is the socfpga case different from Highbank, for
> example, which makes use of /memreserve/ for what appears to be a very
> similar purpose (see arch/arm/boot/dts/highbank.dts):
>
> 	/* First 4KB has pen for secondary cores. */
> 	/memreserve/ 0x00000000 0x0001000;
>
I apologize but it looks like I accidently dropped this patch. But in
light of Josh's
comments, I think doing the /memreserve/ is the correct way.

Dinh