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* [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G
@ 2014-07-03 20:46 Yinghai Lu
  2014-07-03 20:46 ` [PATCH v4 2/3] PCI: Fix bus align checking with 32bit bridge pref Yinghai Lu
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Yinghai Lu @ 2014-07-03 20:46 UTC (permalink / raw)
  To: Bjorn Helgaas, Guo Chao; +Cc: linux-pci, Yinghai Lu

Use 128G instead.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -925,7 +925,7 @@ static int pbus_size_mem(struct pci_bus
 {
 	struct pci_dev *dev;
 	resource_size_t min_align, align, size, size0, size1;
-	resource_size_t aligns[14];	/* Alignments from 1Mb to 8Gb */
+	resource_size_t aligns[18];	/* Alignments from 1Mb to 128Gb */
 	int order, max_order;
 	struct resource *b_res = find_free_bus_resource(bus,
 					mask | IORESOURCE_PREFETCH, type);

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH v4 2/3] PCI: Fix bus align checking with 32bit bridge pref
  2014-07-03 20:46 [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Yinghai Lu
@ 2014-07-03 20:46 ` Yinghai Lu
  2014-07-03 20:46 ` [PATCH v4 3/3] PCI: Avoid size overflow for bridge 32bit resource Yinghai Lu
  2014-07-08 22:24 ` [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Bjorn Helgaas
  2 siblings, 0 replies; 5+ messages in thread
From: Yinghai Lu @ 2014-07-03 20:46 UTC (permalink / raw)
  To: Bjorn Helgaas, Guo Chao; +Cc: linux-pci, Yinghai Lu

If the bridge does not support 64bit pref mmio, we should still
keep align to be 2G as old time.

So add mmio64 mask checking, keep that 2G checking in the loop.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |   11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -930,10 +930,17 @@ static int pbus_size_mem(struct pci_bus
 	struct resource *b_res = find_free_bus_resource(bus,
 					mask | IORESOURCE_PREFETCH, type);
 	resource_size_t children_add_size = 0;
+	unsigned int mem64_mask;
 
 	if (!b_res)
 		return -ENOSPC;
 
+	mem64_mask = b_res->flags & IORESOURCE_MEM_64;
+
+	/* kernel does not support 64bit res */
+	if (sizeof(resource_size_t) == 4)
+		mem64_mask &= ~IORESOURCE_MEM_64;
+
 	memset(aligns, 0, sizeof(aligns));
 	max_order = 0;
 	size = 0;
@@ -970,12 +977,14 @@ static int pbus_size_mem(struct pci_bus
 			order = __ffs(align) - 20;
 			if (order < 0)
 				order = 0;
-			if (order >= ARRAY_SIZE(aligns)) {
+			if (order >= ARRAY_SIZE(aligns) ||
+			    (!mem64_mask && order > 11 /* 2Gb */)) {
 				dev_warn(&dev->dev, "disabling BAR %d: %pR (bad alignment %#llx)\n",
 					 i, r, (unsigned long long) align);
 				r->flags = 0;
 				continue;
 			}
+
 			size += r_size;
 			/* Exclude ranges with size > align from
 			   calculation of the alignment. */

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH v4 3/3] PCI: Avoid size overflow for bridge 32bit resource
  2014-07-03 20:46 [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Yinghai Lu
  2014-07-03 20:46 ` [PATCH v4 2/3] PCI: Fix bus align checking with 32bit bridge pref Yinghai Lu
@ 2014-07-03 20:46 ` Yinghai Lu
  2014-07-08 22:24 ` [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Bjorn Helgaas
  2 siblings, 0 replies; 5+ messages in thread
From: Yinghai Lu @ 2014-07-03 20:46 UTC (permalink / raw)
  To: Bjorn Helgaas, Guo Chao; +Cc: linux-pci, Yinghai Lu

When mmio64_mask is not used, overall size should not bigger than 2G
for single bridge.
Get out early, so we could have chance to have some child resources get
assigned instead of failing all of them, as bridge resource assigned
is too small when overflow happens.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |   10 ++++++++++
 1 file changed, 10 insertions(+)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -957,6 +957,16 @@ static int pbus_size_mem(struct pci_bus
 					  (r->flags & mask) != type3))
 				continue;
 			r_size = resource_size(r);
+
+			/* reject oversize early */
+			if (!mem64_mask &&
+			    ((unsigned long long)size + r_size > (1ULL<<31))) {
+				dev_warn(&dev->dev, "disabling BAR %d: %pR size %#llx overflow bridge's)\n",
+					i, r, (unsigned long long)size);
+				r->flags = 0;
+				continue;
+			}
+
 #ifdef CONFIG_PCI_IOV
 			/* put SRIOV requested res to the optional list */
 			if (realloc_head && i >= PCI_IOV_RESOURCES &&

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G
  2014-07-03 20:46 [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Yinghai Lu
  2014-07-03 20:46 ` [PATCH v4 2/3] PCI: Fix bus align checking with 32bit bridge pref Yinghai Lu
  2014-07-03 20:46 ` [PATCH v4 3/3] PCI: Avoid size overflow for bridge 32bit resource Yinghai Lu
@ 2014-07-08 22:24 ` Bjorn Helgaas
  2014-07-08 22:50   ` Yinghai Lu
  2 siblings, 1 reply; 5+ messages in thread
From: Bjorn Helgaas @ 2014-07-08 22:24 UTC (permalink / raw)
  To: Yinghai Lu; +Cc: Guo Chao, linux-pci

On Thu, Jul 03, 2014 at 01:46:17PM -0700, Yinghai Lu wrote:
> Use 128G instead.
> 
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>

I applied this one to pci/resource for v3.17, thanks!

I didn't apply [2/3] or [3/3] because the questions I raised earlier
haven't been resolved.

> ---
>  drivers/pci/setup-bus.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Index: linux-2.6/drivers/pci/setup-bus.c
> ===================================================================
> --- linux-2.6.orig/drivers/pci/setup-bus.c
> +++ linux-2.6/drivers/pci/setup-bus.c
> @@ -925,7 +925,7 @@ static int pbus_size_mem(struct pci_bus
>  {
>  	struct pci_dev *dev;
>  	resource_size_t min_align, align, size, size0, size1;
> -	resource_size_t aligns[14];	/* Alignments from 1Mb to 8Gb */
> +	resource_size_t aligns[18];	/* Alignments from 1Mb to 128Gb */
>  	int order, max_order;
>  	struct resource *b_res = find_free_bus_resource(bus,
>  					mask | IORESOURCE_PREFETCH, type);

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G
  2014-07-08 22:24 ` [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Bjorn Helgaas
@ 2014-07-08 22:50   ` Yinghai Lu
  0 siblings, 0 replies; 5+ messages in thread
From: Yinghai Lu @ 2014-07-08 22:50 UTC (permalink / raw)
  To: Bjorn Helgaas; +Cc: Guo Chao, linux-pci

On Tue, Jul 8, 2014 at 3:24 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> On Thu, Jul 03, 2014 at 01:46:17PM -0700, Yinghai Lu wrote:
>> Use 128G instead.
>>
>> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>
> I applied this one to pci/resource for v3.17, thanks!
>
> I didn't apply [2/3] or [3/3] because the questions I raised earlier
> haven't been resolved.

That is fine. We can apply [2/3] later if there is any regression ...

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2014-07-08 22:50 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-07-03 20:46 [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Yinghai Lu
2014-07-03 20:46 ` [PATCH v4 2/3] PCI: Fix bus align checking with 32bit bridge pref Yinghai Lu
2014-07-03 20:46 ` [PATCH v4 3/3] PCI: Avoid size overflow for bridge 32bit resource Yinghai Lu
2014-07-08 22:24 ` [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Bjorn Helgaas
2014-07-08 22:50   ` Yinghai Lu

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