* [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-09 8:23 ` Tim Harvey
0 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-09 8:23 UTC (permalink / raw)
To: Shawn Guo
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Add support for the Gateworks GW5520 board.
Signed-off-by: Tim Harvey <tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-gw552x.dts | 20 +++
arch/arm/boot/dts/imx6q-gw552x.dts | 24 +++
arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 282 ++++++++++++++++++++++++++++++++++
4 files changed, 328 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index adb5ed9..99697b4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
+ imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
@@ -207,6 +208,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
+ imx6q-gw552x.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
new file mode 100644
index 0000000..a4b700c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
+ compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-gw552x.dts b/arch/arm/boot/dts/imx6q-gw552x.dts
new file mode 100644
index 0000000..f87a8fa
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw552x.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
+ compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
new file mode 100644
index 0000000..a117e5c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -0,0 +1,282 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ /* these are used by bootloader for disabling nodes */
+ aliases {
+ led0 = &led0;
+ led1 = &led1;
+ led2 = &led2;
+ nand = &gpmi;
+ usb0 = &usbh1;
+ usb1 = &usbotg;
+ };
+
+ chosen {
+ bootargs = "console=ttymxc1,115200";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led0: user1 {
+ label = "user1";
+ gpios = <&gpio4 6 0>; /* MX6_PANLEDG */
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led1: user2 {
+ label = "user2";
+ gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
+ default-state = "off";
+ };
+
+ led2: user3 {
+ label = "user3";
+ gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
+ default-state = "off";
+ };
+ };
+
+ memory {
+ reg = <0x10000000 0x20000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_1p0v: regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "1P0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_5p0v: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "5P0V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ eeprom1: eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom2: eeprom@51 {
+ compatible = "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+
+ eeprom3: eeprom@52 {
+ compatible = "atmel,24c02";
+ reg = <0x52>;
+ pagesize = <16>;
+ };
+
+ eeprom4: eeprom@53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+
+ gpio: pca9555@23 {
+ compatible = "nxp,pca9555";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ rtc: ds1672@68 {
+ compatible = "dallas,ds1672";
+ reg = <0x68>;
+ };
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ imx6qdl-gw552x {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* USBHUB_RST# */
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIESKT_WDIS# */
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ >;
+ };
+ };
+
+ gpio_leds {
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
+ >;
+ };
+ };
+
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio1 29 0>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ status = "okay";
+};
+
+&usbh1 {
+ status = "okay";
+};
--
1.8.3.2
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^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-09 8:23 ` Tim Harvey
0 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-09 8:23 UTC (permalink / raw)
To: linux-arm-kernel
Add support for the Gateworks GW5520 board.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-gw552x.dts | 20 +++
arch/arm/boot/dts/imx6q-gw552x.dts | 24 +++
arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 282 ++++++++++++++++++++++++++++++++++
4 files changed, 328 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index adb5ed9..99697b4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
+ imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
@@ -207,6 +208,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
+ imx6q-gw552x.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
new file mode 100644
index 0000000..a4b700c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
+ compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-gw552x.dts b/arch/arm/boot/dts/imx6q-gw552x.dts
new file mode 100644
index 0000000..f87a8fa
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw552x.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
+ compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
new file mode 100644
index 0000000..a117e5c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -0,0 +1,282 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ /* these are used by bootloader for disabling nodes */
+ aliases {
+ led0 = &led0;
+ led1 = &led1;
+ led2 = &led2;
+ nand = &gpmi;
+ usb0 = &usbh1;
+ usb1 = &usbotg;
+ };
+
+ chosen {
+ bootargs = "console=ttymxc1,115200";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led0: user1 {
+ label = "user1";
+ gpios = <&gpio4 6 0>; /* MX6_PANLEDG */
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led1: user2 {
+ label = "user2";
+ gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
+ default-state = "off";
+ };
+
+ led2: user3 {
+ label = "user3";
+ gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
+ default-state = "off";
+ };
+ };
+
+ memory {
+ reg = <0x10000000 0x20000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_1p0v: regulator at 0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "1P0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator at 2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_5p0v: regulator at 3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "5P0V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ eeprom1: eeprom at 50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom2: eeprom at 51 {
+ compatible = "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+
+ eeprom3: eeprom at 52 {
+ compatible = "atmel,24c02";
+ reg = <0x52>;
+ pagesize = <16>;
+ };
+
+ eeprom4: eeprom at 53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+
+ gpio: pca9555 at 23 {
+ compatible = "nxp,pca9555";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ rtc: ds1672 at 68 {
+ compatible = "dallas,ds1672";
+ reg = <0x68>;
+ };
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ imx6qdl-gw552x {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* USBHUB_RST# */
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIESKT_WDIS# */
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ >;
+ };
+ };
+
+ gpio_leds {
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
+ >;
+ };
+ };
+
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio1 29 0>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ status = "okay";
+};
+
+&usbh1 {
+ status = "okay";
+};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-09 8:23 ` Tim Harvey
@ 2014-08-09 9:20 ` Tony Prisk
-1 siblings, 0 replies; 22+ messages in thread
From: Tony Prisk @ 2014-08-09 9:20 UTC (permalink / raw)
To: Tim Harvey, Shawn Guo; +Cc: devicetree, linux-arm-kernel
On 09/08/14 20:23, Tim Harvey wrote:
> Add support for the Gateworks GW5520 board.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> arch/arm/boot/dts/Makefile | 2 +
> arch/arm/boot/dts/imx6dl-gw552x.dts | 20 +++
> arch/arm/boot/dts/imx6q-gw552x.dts | 24 +++
> arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 282 ++++++++++++++++++++++++++++++++++
> 4 files changed, 328 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
> create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
...
> diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
> new file mode 100644
> index 0000000..a4b700c
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
> @@ -0,0 +1,20 @@
> +/*
> + * Copyright 2014 Gateworks Corporation
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6dl.dtsi"
> +#include "imx6qdl-gw552x.dtsi"
> +
> +/ {
> + model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
> + compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
> +};
I don't see 'gw' in the device tree vendor prefixes, so it should to be
added to Documentation/devicetree/bindings/vendor-prefixes.txt as well.
Regards
Tony Prisk
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-09 9:20 ` Tony Prisk
0 siblings, 0 replies; 22+ messages in thread
From: Tony Prisk @ 2014-08-09 9:20 UTC (permalink / raw)
To: linux-arm-kernel
On 09/08/14 20:23, Tim Harvey wrote:
> Add support for the Gateworks GW5520 board.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> arch/arm/boot/dts/Makefile | 2 +
> arch/arm/boot/dts/imx6dl-gw552x.dts | 20 +++
> arch/arm/boot/dts/imx6q-gw552x.dts | 24 +++
> arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 282 ++++++++++++++++++++++++++++++++++
> 4 files changed, 328 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
> create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
...
> diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
> new file mode 100644
> index 0000000..a4b700c
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
> @@ -0,0 +1,20 @@
> +/*
> + * Copyright 2014 Gateworks Corporation
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6dl.dtsi"
> +#include "imx6qdl-gw552x.dtsi"
> +
> +/ {
> + model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
> + compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
> +};
I don't see 'gw' in the device tree vendor prefixes, so it should to be
added to Documentation/devicetree/bindings/vendor-prefixes.txt as well.
Regards
Tony Prisk
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-09 8:23 ` Tim Harvey
@ 2014-08-09 11:44 ` Javier Martinez Canillas
-1 siblings, 0 replies; 22+ messages in thread
From: Javier Martinez Canillas @ 2014-08-09 11:44 UTC (permalink / raw)
To: Tim Harvey
Cc: Shawn Guo, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hello Tim,
On Sat, Aug 9, 2014 at 10:23 AM, Tim Harvey <tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org> wrote:
> +/*
> + * Copyright 2014 Gateworks Corporation
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
There was a discussion [0] recently about what license(s) should be
used for Device Tree source files. It seems that we have been using
GPLv2-only just because is the Linux kernel license but unlike other
source files, the DTS could be used verbatim in other operating
systems / bootloaders so we have to better think the implications of
the licensing.
Of course this shouldn't hold your patch, I'm just mentioning so you
can keep an eye in case an agreement is made while you are pushing
this.
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + /* these are used by bootloader for disabling nodes */
> + aliases {
> + led0 = &led0;
> + led1 = &led1;
> + led2 = &led2;
> + nand = &gpmi;
> + usb0 = &usbh1;
> + usb1 = &usbotg;
> + };
> +
> + chosen {
> + bootargs = "console=ttymxc1,115200";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> + led0: user1 {
> + label = "user1";
> + gpios = <&gpio4 6 0>; /* MX6_PANLEDG */
You are already including <dt-bindings/gpio/gpio.h> so please use the
GPIO constants instead of magic numbers (e.g: GPIO_ACTIVE_HIGH in this
case). Same for others gpios properties.
> + default-state = "on";
> + linux,default-trigger = "heartbeat";
> + };
> +
> + led1: user2 {
> + label = "user2";
> + gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
> + default-state = "off";
> + };
> +
> + led2: user3 {
> + label = "user3";
> + gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
> + default-state = "off";
> + };
> + };
> +
Overall, looks good to me. After the changes mentioned above:
Reviewed-by: Javier Martinez Canillas <javier-0uQlZySMnqxg9hUCZPvPmw@public.gmane.org>
[0]: http://www.spinics.net/lists/devicetree/msg44439.html
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-09 11:44 ` Javier Martinez Canillas
0 siblings, 0 replies; 22+ messages in thread
From: Javier Martinez Canillas @ 2014-08-09 11:44 UTC (permalink / raw)
To: linux-arm-kernel
Hello Tim,
On Sat, Aug 9, 2014 at 10:23 AM, Tim Harvey <tharvey@gateworks.com> wrote:
> +/*
> + * Copyright 2014 Gateworks Corporation
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
There was a discussion [0] recently about what license(s) should be
used for Device Tree source files. It seems that we have been using
GPLv2-only just because is the Linux kernel license but unlike other
source files, the DTS could be used verbatim in other operating
systems / bootloaders so we have to better think the implications of
the licensing.
Of course this shouldn't hold your patch, I'm just mentioning so you
can keep an eye in case an agreement is made while you are pushing
this.
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + /* these are used by bootloader for disabling nodes */
> + aliases {
> + led0 = &led0;
> + led1 = &led1;
> + led2 = &led2;
> + nand = &gpmi;
> + usb0 = &usbh1;
> + usb1 = &usbotg;
> + };
> +
> + chosen {
> + bootargs = "console=ttymxc1,115200";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> + led0: user1 {
> + label = "user1";
> + gpios = <&gpio4 6 0>; /* MX6_PANLEDG */
You are already including <dt-bindings/gpio/gpio.h> so please use the
GPIO constants instead of magic numbers (e.g: GPIO_ACTIVE_HIGH in this
case). Same for others gpios properties.
> + default-state = "on";
> + linux,default-trigger = "heartbeat";
> + };
> +
> + led1: user2 {
> + label = "user2";
> + gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
> + default-state = "off";
> + };
> +
> + led2: user3 {
> + label = "user3";
> + gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
> + default-state = "off";
> + };
> + };
> +
Overall, looks good to me. After the changes mentioned above:
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
[0]: http://www.spinics.net/lists/devicetree/msg44439.html
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-09 11:44 ` Javier Martinez Canillas
@ 2014-08-10 8:01 ` Tim Harvey
-1 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-10 8:01 UTC (permalink / raw)
To: Javier Martinez Canillas
Cc: Shawn Guo, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Sat, Aug 9, 2014 at 4:44 AM, Javier Martinez Canillas
<javier-0uQlZySMnqxg9hUCZPvPmw@public.gmane.org> wrote:
> Hello Tim,
>
> On Sat, Aug 9, 2014 at 10:23 AM, Tim Harvey <tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org> wrote:
>> +/*
>> + * Copyright 2014 Gateworks Corporation
>> + *
>> + * The code contained herein is licensed under the GNU General Public
>> + * License. You may obtain a copy of the GNU General Public License
>> + * Version 2 or later at the following locations:
>> + *
>> + * http://www.opensource.org/licenses/gpl-license.html
>> + * http://www.gnu.org/copyleft/gpl.html
>> + */
>
> There was a discussion [0] recently about what license(s) should be
> used for Device Tree source files. It seems that we have been using
> GPLv2-only just because is the Linux kernel license but unlike other
> source files, the DTS could be used verbatim in other operating
> systems / bootloaders so we have to better think the implications of
> the licensing.
>
> Of course this shouldn't hold your patch, I'm just mentioning so you
> can keep an eye in case an agreement is made while you are pushing
> this.
Javier,
Thanks for pointing this out - The discussion makes sense. I'll try to
keep an eye on it.
>
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +
>> +/ {
>> + /* these are used by bootloader for disabling nodes */
>> + aliases {
>> + led0 = &led0;
>> + led1 = &led1;
>> + led2 = &led2;
>> + nand = &gpmi;
>> + usb0 = &usbh1;
>> + usb1 = &usbotg;
>> + };
>> +
>> + chosen {
>> + bootargs = "console=ttymxc1,115200";
>> + };
>> +
>> + leds {
>> + compatible = "gpio-leds";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_gpio_leds>;
>> +
>> + led0: user1 {
>> + label = "user1";
>> + gpios = <&gpio4 6 0>; /* MX6_PANLEDG */
>
> You are already including <dt-bindings/gpio/gpio.h> so please use the
> GPIO constants instead of magic numbers (e.g: GPIO_ACTIVE_HIGH in this
> case). Same for others gpios properties.
Agreed - I will change this for v2.
>
>> + default-state = "on";
>> + linux,default-trigger = "heartbeat";
>> + };
>> +
>> + led1: user2 {
>> + label = "user2";
>> + gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
>> + default-state = "off";
>> + };
>> +
>> + led2: user3 {
>> + label = "user3";
>> + gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
>> + default-state = "off";
>> + };
>> + };
>> +
>
> Overall, looks good to me. After the changes mentioned above:
>
> Reviewed-by: Javier Martinez Canillas <javier-0uQlZySMnqxg9hUCZPvPmw@public.gmane.org>
>
> [0]: http://www.spinics.net/lists/devicetree/msg44439.html
Thanks for the review.
Regards,
Tim
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-10 8:01 ` Tim Harvey
0 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-10 8:01 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Aug 9, 2014 at 4:44 AM, Javier Martinez Canillas
<javier@dowhile0.org> wrote:
> Hello Tim,
>
> On Sat, Aug 9, 2014 at 10:23 AM, Tim Harvey <tharvey@gateworks.com> wrote:
>> +/*
>> + * Copyright 2014 Gateworks Corporation
>> + *
>> + * The code contained herein is licensed under the GNU General Public
>> + * License. You may obtain a copy of the GNU General Public License
>> + * Version 2 or later at the following locations:
>> + *
>> + * http://www.opensource.org/licenses/gpl-license.html
>> + * http://www.gnu.org/copyleft/gpl.html
>> + */
>
> There was a discussion [0] recently about what license(s) should be
> used for Device Tree source files. It seems that we have been using
> GPLv2-only just because is the Linux kernel license but unlike other
> source files, the DTS could be used verbatim in other operating
> systems / bootloaders so we have to better think the implications of
> the licensing.
>
> Of course this shouldn't hold your patch, I'm just mentioning so you
> can keep an eye in case an agreement is made while you are pushing
> this.
Javier,
Thanks for pointing this out - The discussion makes sense. I'll try to
keep an eye on it.
>
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +
>> +/ {
>> + /* these are used by bootloader for disabling nodes */
>> + aliases {
>> + led0 = &led0;
>> + led1 = &led1;
>> + led2 = &led2;
>> + nand = &gpmi;
>> + usb0 = &usbh1;
>> + usb1 = &usbotg;
>> + };
>> +
>> + chosen {
>> + bootargs = "console=ttymxc1,115200";
>> + };
>> +
>> + leds {
>> + compatible = "gpio-leds";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_gpio_leds>;
>> +
>> + led0: user1 {
>> + label = "user1";
>> + gpios = <&gpio4 6 0>; /* MX6_PANLEDG */
>
> You are already including <dt-bindings/gpio/gpio.h> so please use the
> GPIO constants instead of magic numbers (e.g: GPIO_ACTIVE_HIGH in this
> case). Same for others gpios properties.
Agreed - I will change this for v2.
>
>> + default-state = "on";
>> + linux,default-trigger = "heartbeat";
>> + };
>> +
>> + led1: user2 {
>> + label = "user2";
>> + gpios = <&gpio4 7 0>; /* MX6_PANLEDR */
>> + default-state = "off";
>> + };
>> +
>> + led2: user3 {
>> + label = "user3";
>> + gpios = <&gpio4 15 1>; /* MX6_LOCLED# */
>> + default-state = "off";
>> + };
>> + };
>> +
>
> Overall, looks good to me. After the changes mentioned above:
>
> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
>
> [0]: http://www.spinics.net/lists/devicetree/msg44439.html
Thanks for the review.
Regards,
Tim
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-09 8:23 ` Tim Harvey
@ 2014-08-18 6:35 ` Shawn Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2014-08-18 6:35 UTC (permalink / raw)
To: Tim Harvey
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Sat, Aug 09, 2014 at 01:23:22AM -0700, Tim Harvey wrote:
> +&iomuxc {
If you do not mind, I would ask you to put iomuxc node at the bottom of
the file. Doing so makes the file a bit easier to read.
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + imx6qdl-gw552x {
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* USBHUB_RST# */
> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIESKT_WDIS# */
Please use a proper pad configuration value instead of 0x80000000, which
will rely on the hardware reset state or what bootloader configures.
Also, can these two pins be moved to some pinctrl entries used by
particular client device?
> + >;
> + };
> +
> + pinctrl_gpmi_nand: gpminandgrp {
> + fsl,pins = <
> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
> + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3: i2c3grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
Fix 0x80000000.
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
> + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart5: uart5grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
> + >;
> + };
> + };
> +
> + gpio_leds {
This node can just be saved by putting gpioledsgrp into imx6qdl-gw552x.
> + pinctrl_gpio_leds: gpioledsgrp {
> + fsl,pins = <
Use tab for indentation.
> + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
> + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
> + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
Fix 0x80000000.
Shawn
> + >;
> + };
> + };
> +
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio1 29 0>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + status = "okay";
> +};
> +
> +&uart5 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart5>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + status = "okay";
> +};
> --
> 1.8.3.2
>
--
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-18 6:35 ` Shawn Guo
0 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2014-08-18 6:35 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Aug 09, 2014 at 01:23:22AM -0700, Tim Harvey wrote:
> +&iomuxc {
If you do not mind, I would ask you to put iomuxc node at the bottom of
the file. Doing so makes the file a bit easier to read.
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + imx6qdl-gw552x {
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* USBHUB_RST# */
> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIESKT_WDIS# */
Please use a proper pad configuration value instead of 0x80000000, which
will rely on the hardware reset state or what bootloader configures.
Also, can these two pins be moved to some pinctrl entries used by
particular client device?
> + >;
> + };
> +
> + pinctrl_gpmi_nand: gpminandgrp {
> + fsl,pins = <
> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
> + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3: i2c3grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
Fix 0x80000000.
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
> + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart5: uart5grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
> + >;
> + };
> + };
> +
> + gpio_leds {
This node can just be saved by putting gpioledsgrp into imx6qdl-gw552x.
> + pinctrl_gpio_leds: gpioledsgrp {
> + fsl,pins = <
Use tab for indentation.
> + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
> + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
> + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
Fix 0x80000000.
Shawn
> + >;
> + };
> + };
> +
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio1 29 0>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + status = "okay";
> +};
> +
> +&uart5 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart5>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + status = "okay";
> +};
> --
> 1.8.3.2
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-18 6:35 ` Shawn Guo
@ 2014-08-19 15:17 ` Tim Harvey
-1 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-19 15:17 UTC (permalink / raw)
To: Shawn Guo; +Cc: devicetree, linux-arm-kernel
On Sun, Aug 17, 2014 at 11:35 PM, Shawn Guo <shawn.guo@freescale.com> wrote:
> On Sat, Aug 09, 2014 at 01:23:22AM -0700, Tim Harvey wrote:
>> +&iomuxc {
>
> If you do not mind, I would ask you to put iomuxc node at the bottom of
> the file. Doing so makes the file a bit easier to read.
will do
>
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_hog>;
>> +
>> + imx6qdl-gw552x {
>> + pinctrl_hog: hoggrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* USBHUB_RST# */
>> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIESKT_WDIS# */
>
> Please use a proper pad configuration value instead of 0x80000000, which
> will rely on the hardware reset state or what bootloader configures.
will do
>
> Also, can these two pins be moved to some pinctrl entries used by
> particular client device?
Do you know of any appropriate bindings for a USB hub reset signal?
This does get configured and used properly in the bootloader but I
thought the common belief was that GPIO's should get configured in the
kernel as well (and of course I will use a value other than 0x8000000
so that its pinmuxed and padconf'd).
The PCISKT_WDIS# is a gpio that routes to the miniPCIe socket(s) WDIS#
signal. While no kernel driver uses it I think its valuable to
document to users such that they can export it and use it for rfkill
of wireless devices that may be placed in those sockets. I'm not aware
of a proper binding for an rfkill pin either.
If no bindings exist, are you saying these should be dropped and thus
functionality hidden from a user possibly trying to use them from
userspace through gpio-sysfs or are you saying they should be moved
into pinctrl groups for logical grouping?
>
>> + >;
>> + };
>> +
>> + pinctrl_gpmi_nand: gpminandgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
>> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
>> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
>> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
>> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
>> + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
>> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
>> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
>> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
>> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
>> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
>> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
>> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
>> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
>> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
>> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c1: i2c1grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
>> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c2: i2c2grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c3: i2c3grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
>> + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_pcie: pciegrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
>
> Fix 0x80000000.
will do
>
>> + >;
>> + };
>> +
>> + pinctrl_uart2: uart2grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_uart3: uart3grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_uart5: uart5grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>> + >;
>> + };
>> + };
>> +
>> + gpio_leds {
>
> This node can just be saved by putting gpioledsgrp into imx6qdl-gw552x.
>> + pinctrl_gpio_leds: gpioledsgrp {
>> + fsl,pins = <
ok - that makes sense, will do.
>
> Use tab for indentation.
oops - I guess checkpatch.pl doesn't catch that on dts/dtsi files
>
>> + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
>> + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
>> + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
>
> Fix 0x80000000.
will do
>
> Shawn
>
Thanks for the review!
Tim
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-19 15:17 ` Tim Harvey
0 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-19 15:17 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Aug 17, 2014 at 11:35 PM, Shawn Guo <shawn.guo@freescale.com> wrote:
> On Sat, Aug 09, 2014 at 01:23:22AM -0700, Tim Harvey wrote:
>> +&iomuxc {
>
> If you do not mind, I would ask you to put iomuxc node at the bottom of
> the file. Doing so makes the file a bit easier to read.
will do
>
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_hog>;
>> +
>> + imx6qdl-gw552x {
>> + pinctrl_hog: hoggrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* USBHUB_RST# */
>> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIESKT_WDIS# */
>
> Please use a proper pad configuration value instead of 0x80000000, which
> will rely on the hardware reset state or what bootloader configures.
will do
>
> Also, can these two pins be moved to some pinctrl entries used by
> particular client device?
Do you know of any appropriate bindings for a USB hub reset signal?
This does get configured and used properly in the bootloader but I
thought the common belief was that GPIO's should get configured in the
kernel as well (and of course I will use a value other than 0x8000000
so that its pinmuxed and padconf'd).
The PCISKT_WDIS# is a gpio that routes to the miniPCIe socket(s) WDIS#
signal. While no kernel driver uses it I think its valuable to
document to users such that they can export it and use it for rfkill
of wireless devices that may be placed in those sockets. I'm not aware
of a proper binding for an rfkill pin either.
If no bindings exist, are you saying these should be dropped and thus
functionality hidden from a user possibly trying to use them from
userspace through gpio-sysfs or are you saying they should be moved
into pinctrl groups for logical grouping?
>
>> + >;
>> + };
>> +
>> + pinctrl_gpmi_nand: gpminandgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
>> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
>> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
>> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
>> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
>> + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
>> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
>> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
>> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
>> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
>> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
>> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
>> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
>> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
>> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
>> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c1: i2c1grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
>> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c2: i2c2grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c3: i2c3grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
>> + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_pcie: pciegrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
>
> Fix 0x80000000.
will do
>
>> + >;
>> + };
>> +
>> + pinctrl_uart2: uart2grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_uart3: uart3grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_uart5: uart5grp {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>> + >;
>> + };
>> + };
>> +
>> + gpio_leds {
>
> This node can just be saved by putting gpioledsgrp into imx6qdl-gw552x.
>> + pinctrl_gpio_leds: gpioledsgrp {
>> + fsl,pins = <
ok - that makes sense, will do.
>
> Use tab for indentation.
oops - I guess checkpatch.pl doesn't catch that on dts/dtsi files
>
>> + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
>> + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
>> + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
>
> Fix 0x80000000.
will do
>
> Shawn
>
Thanks for the review!
Tim
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-09 8:23 ` Tim Harvey
@ 2014-08-22 3:55 ` Tim Harvey
-1 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-22 3:55 UTC (permalink / raw)
To: Shawn Guo
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Tony Prisk
Add support for the Gateworks GW5520 board.
Cc: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
Reviewed-by: Javier Martinez Canillas <javier-0uQlZySMnqxg9hUCZPvPmw@public.gmane.org>
Signed-off-by: Tim Harvey <tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
---
Changes in v2:
- use GPIO constants
- move gpio pins from hoggrp to gpiogrp
- use proper pad conf instead of 0x80000000
- moved iomuxc to bottom for readability
- pulled gpioledsgrp into iomuxc
- fix whitespace errors
- Note that a patch was sent for adding the vendor prefix of 'gw' for
Gateworks and is queued for inclusion
Signed-off-by: Tim Harvey <tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-gw552x.dts | 20 +++
arch/arm/boot/dts/imx6q-gw552x.dts | 24 +++
arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 278 ++++++++++++++++++++++++++++++++++
4 files changed, 324 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index adb5ed9..99697b4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
+ imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
@@ -207,6 +208,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
+ imx6q-gw552x.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
new file mode 100644
index 0000000..a4b700c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
+ compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-gw552x.dts b/arch/arm/boot/dts/imx6q-gw552x.dts
new file mode 100644
index 0000000..f87a8fa
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw552x.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
+ compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
new file mode 100644
index 0000000..d75e22a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -0,0 +1,278 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ /* these are used by bootloader for disabling nodes */
+ aliases {
+ led0 = &led0;
+ led1 = &led1;
+ led2 = &led2;
+ nand = &gpmi;
+ usb0 = &usbh1;
+ usb1 = &usbotg;
+ };
+
+ chosen {
+ bootargs = "console=ttymxc1,115200";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led0: user1 {
+ label = "user1";
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led1: user2 {
+ label = "user2";
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
+ default-state = "off";
+ };
+
+ led2: user3 {
+ label = "user3";
+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
+ default-state = "off";
+ };
+ };
+
+ memory {
+ reg = <0x10000000 0x20000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_1p0v: regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "1P0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_5p0v: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "5P0V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ eeprom1: eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom2: eeprom@51 {
+ compatible = "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+
+ eeprom3: eeprom@52 {
+ compatible = "atmel,24c02";
+ reg = <0x52>;
+ pagesize = <16>;
+ };
+
+ eeprom4: eeprom@53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+
+ gpio: pca9555@23 {
+ compatible = "nxp,pca9555";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ rtc: ds1672@68 {
+ compatible = "dallas,ds1672";
+ reg = <0x68>;
+ };
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ status = "okay"; };
+
+&usbh1 {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ imx6qdl-gw552x {
+ pinctrl_gpio: gpiogrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
+ >;
+ };
+
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ >;
+ };
+ };
+};
--
1.8.3.2
--
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^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v2] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-22 3:55 ` Tim Harvey
0 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-22 3:55 UTC (permalink / raw)
To: linux-arm-kernel
Add support for the Gateworks GW5520 board.
Cc: Tony Prisk <linux@prisktech.co.nz>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
Changes in v2:
- use GPIO constants
- move gpio pins from hoggrp to gpiogrp
- use proper pad conf instead of 0x80000000
- moved iomuxc to bottom for readability
- pulled gpioledsgrp into iomuxc
- fix whitespace errors
- Note that a patch was sent for adding the vendor prefix of 'gw' for
Gateworks and is queued for inclusion
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-gw552x.dts | 20 +++
arch/arm/boot/dts/imx6q-gw552x.dts | 24 +++
arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 278 ++++++++++++++++++++++++++++++++++
4 files changed, 324 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index adb5ed9..99697b4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
+ imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
@@ -207,6 +208,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
+ imx6q-gw552x.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
new file mode 100644
index 0000000..a4b700c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
+ compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-gw552x.dts b/arch/arm/boot/dts/imx6q-gw552x.dts
new file mode 100644
index 0000000..f87a8fa
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw552x.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
+ compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
new file mode 100644
index 0000000..d75e22a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -0,0 +1,278 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ /* these are used by bootloader for disabling nodes */
+ aliases {
+ led0 = &led0;
+ led1 = &led1;
+ led2 = &led2;
+ nand = &gpmi;
+ usb0 = &usbh1;
+ usb1 = &usbotg;
+ };
+
+ chosen {
+ bootargs = "console=ttymxc1,115200";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led0: user1 {
+ label = "user1";
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led1: user2 {
+ label = "user2";
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
+ default-state = "off";
+ };
+
+ led2: user3 {
+ label = "user3";
+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
+ default-state = "off";
+ };
+ };
+
+ memory {
+ reg = <0x10000000 0x20000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_1p0v: regulator at 0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "1P0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator at 2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_5p0v: regulator at 3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "5P0V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ eeprom1: eeprom at 50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom2: eeprom at 51 {
+ compatible = "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+
+ eeprom3: eeprom at 52 {
+ compatible = "atmel,24c02";
+ reg = <0x52>;
+ pagesize = <16>;
+ };
+
+ eeprom4: eeprom at 53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+
+ gpio: pca9555 at 23 {
+ compatible = "nxp,pca9555";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ rtc: ds1672 at 68 {
+ compatible = "dallas,ds1672";
+ reg = <0x68>;
+ };
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ status = "okay"; };
+
+&usbh1 {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ imx6qdl-gw552x {
+ pinctrl_gpio: gpiogrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
+ >;
+ };
+
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ >;
+ };
+ };
+};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-19 15:17 ` Tim Harvey
@ 2014-08-22 7:43 ` Shawn Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2014-08-22 7:43 UTC (permalink / raw)
To: Tim Harvey
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Tue, Aug 19, 2014 at 08:17:03AM -0700, Tim Harvey wrote:
> Do you know of any appropriate bindings for a USB hub reset signal?
> This does get configured and used properly in the bootloader but I
> thought the common belief was that GPIO's should get configured in the
> kernel as well (and of course I will use a value other than 0x8000000
> so that its pinmuxed and padconf'd).
>
> The PCISKT_WDIS# is a gpio that routes to the miniPCIe socket(s) WDIS#
> signal. While no kernel driver uses it I think its valuable to
> document to users such that they can export it and use it for rfkill
> of wireless devices that may be placed in those sockets. I'm not aware
> of a proper binding for an rfkill pin either.
>
> If no bindings exist, are you saying these should be dropped and thus
> functionality hidden from a user possibly trying to use them from
> userspace through gpio-sysfs or are you saying they should be moved
> into pinctrl groups for logical grouping?
Oh, I was wondering if these GPIOs can be put into USB and PCIe
pingroup. But if you think it doesn't make sense to do so, I'm fine
with them being in hoggrp, after all it seems we do not have a proper
binding existing for them.
Shawn
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To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-22 7:43 ` Shawn Guo
0 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2014-08-22 7:43 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Aug 19, 2014 at 08:17:03AM -0700, Tim Harvey wrote:
> Do you know of any appropriate bindings for a USB hub reset signal?
> This does get configured and used properly in the bootloader but I
> thought the common belief was that GPIO's should get configured in the
> kernel as well (and of course I will use a value other than 0x8000000
> so that its pinmuxed and padconf'd).
>
> The PCISKT_WDIS# is a gpio that routes to the miniPCIe socket(s) WDIS#
> signal. While no kernel driver uses it I think its valuable to
> document to users such that they can export it and use it for rfkill
> of wireless devices that may be placed in those sockets. I'm not aware
> of a proper binding for an rfkill pin either.
>
> If no bindings exist, are you saying these should be dropped and thus
> functionality hidden from a user possibly trying to use them from
> userspace through gpio-sysfs or are you saying they should be moved
> into pinctrl groups for logical grouping?
Oh, I was wondering if these GPIOs can be put into USB and PCIe
pingroup. But if you think it doesn't make sense to do so, I'm fine
with them being in hoggrp, after all it seems we do not have a proper
binding existing for them.
Shawn
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-22 3:55 ` Tim Harvey
@ 2014-08-22 7:46 ` Shawn Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2014-08-22 7:46 UTC (permalink / raw)
To: Tim Harvey
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Tony Prisk
On Thu, Aug 21, 2014 at 08:55:06PM -0700, Tim Harvey wrote:
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
DTC arch/arm/boot/dts/imx6dl-gw552x.dtb
ERROR (phandle_references): Reference to non-existent node or label "pinctrl_hog"
> +
> + imx6qdl-gw552x {
> + pinctrl_gpio: gpiogrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */
> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
> + >;
> + };
pinctrl_gpio is not referenced by any client device, so kernel will not
set up these two pins.
Shawn
> +
> + pinctrl_gpio_leds: gpioledsgrp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
> + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
> + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
> + >;
> + };
> +
> + pinctrl_gpmi_nand: gpminandgrp {
> + fsl,pins = <
> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
> + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3: i2c3grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
> + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart5: uart5grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
> + >;
> + };
> + };
> +};
> --
> 1.8.3.2
>
--
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-22 7:46 ` Shawn Guo
0 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2014-08-22 7:46 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Aug 21, 2014 at 08:55:06PM -0700, Tim Harvey wrote:
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
DTC arch/arm/boot/dts/imx6dl-gw552x.dtb
ERROR (phandle_references): Reference to non-existent node or label "pinctrl_hog"
> +
> + imx6qdl-gw552x {
> + pinctrl_gpio: gpiogrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */
> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
> + >;
> + };
pinctrl_gpio is not referenced by any client device, so kernel will not
set up these two pins.
Shawn
> +
> + pinctrl_gpio_leds: gpioledsgrp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
> + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
> + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
> + >;
> + };
> +
> + pinctrl_gpmi_nand: gpminandgrp {
> + fsl,pins = <
> + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
> + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
> + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
> + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
> + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
> + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
> + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
> + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
> + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
> + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
> + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
> + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
> + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
> + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
> + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
> + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3: i2c3grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
> + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
> + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart5: uart5grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
> + >;
> + };
> + };
> +};
> --
> 1.8.3.2
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v3] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-09 8:23 ` Tim Harvey
@ 2014-08-22 21:52 ` Tim Harvey
-1 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-22 21:52 UTC (permalink / raw)
To: Shawn Guo
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Add support for the Gateworks GW5520 board.
Signed-off-by: Tim Harvey <tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
---
Changes in v3:
- remove gpiogrp and hog
- fix state on pcie reset
- remove unused input bindings include
Changes in v2:
- use GPIO constants
- move gpio pins from hoggrp to gpiogrp
- use proper pad conf instead of 0x80000000
- moved iomuxc to bottom for readability
- pulled gpioledsgrp into iomuxc
- fix whitespace errors
Signed-off-by: Tim Harvey <tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-gw552x.dts | 20 +++
arch/arm/boot/dts/imx6q-gw552x.dts | 24 +++
arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 267 ++++++++++++++++++++++++++++++++++
4 files changed, 313 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index adb5ed9..99697b4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
+ imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
@@ -207,6 +208,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
+ imx6q-gw552x.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
new file mode 100644
index 0000000..a4b700c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
+ compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-gw552x.dts b/arch/arm/boot/dts/imx6q-gw552x.dts
new file mode 100644
index 0000000..f87a8fa
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw552x.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
+ compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
new file mode 100644
index 0000000..5c6587f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -0,0 +1,267 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ /* these are used by bootloader for disabling nodes */
+ aliases {
+ led0 = &led0;
+ led1 = &led1;
+ led2 = &led2;
+ nand = &gpmi;
+ usb0 = &usbh1;
+ usb1 = &usbotg;
+ };
+
+ chosen {
+ bootargs = "console=ttymxc1,115200";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led0: user1 {
+ label = "user1";
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led1: user2 {
+ label = "user2";
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
+ default-state = "off";
+ };
+
+ led2: user3 {
+ label = "user3";
+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
+ default-state = "off";
+ };
+ };
+
+ memory {
+ reg = <0x10000000 0x20000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_1p0v: regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "1P0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_5p0v: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "5P0V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ eeprom1: eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom2: eeprom@51 {
+ compatible = "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+
+ eeprom3: eeprom@52 {
+ compatible = "atmel,24c02";
+ reg = <0x52>;
+ pagesize = <16>;
+ };
+
+ eeprom4: eeprom@53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+
+ gpio: pca9555@23 {
+ compatible = "nxp,pca9555";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ rtc: ds1672@68 {
+ compatible = "dallas,ds1672";
+ reg = <0x68>;
+ };
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ status = "okay"; };
+
+&usbh1 {
+ status = "okay";
+};
+
+&iomuxc {
+ imx6qdl-gw552x {
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ >;
+ };
+ };
+};
--
1.8.3.2
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^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v3] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-22 21:52 ` Tim Harvey
0 siblings, 0 replies; 22+ messages in thread
From: Tim Harvey @ 2014-08-22 21:52 UTC (permalink / raw)
To: linux-arm-kernel
Add support for the Gateworks GW5520 board.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
Changes in v3:
- remove gpiogrp and hog
- fix state on pcie reset
- remove unused input bindings include
Changes in v2:
- use GPIO constants
- move gpio pins from hoggrp to gpiogrp
- use proper pad conf instead of 0x80000000
- moved iomuxc to bottom for readability
- pulled gpioledsgrp into iomuxc
- fix whitespace errors
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-gw552x.dts | 20 +++
arch/arm/boot/dts/imx6q-gw552x.dts | 24 +++
arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 267 ++++++++++++++++++++++++++++++++++
4 files changed, 313 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6q-gw552x.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-gw552x.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index adb5ed9..99697b4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
+ imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
@@ -207,6 +208,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
+ imx6q-gw552x.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-gw552x.dts b/arch/arm/boot/dts/imx6dl-gw552x.dts
new file mode 100644
index 0000000..a4b700c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-gw552x.dts
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
+ compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6q-gw552x.dts b/arch/arm/boot/dts/imx6q-gw552x.dts
new file mode 100644
index 0000000..f87a8fa
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-gw552x.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-gw552x.dtsi"
+
+/ {
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
+ compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
new file mode 100644
index 0000000..5c6587f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -0,0 +1,267 @@
+/*
+ * Copyright 2014 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ /* these are used by bootloader for disabling nodes */
+ aliases {
+ led0 = &led0;
+ led1 = &led1;
+ led2 = &led2;
+ nand = &gpmi;
+ usb0 = &usbh1;
+ usb1 = &usbotg;
+ };
+
+ chosen {
+ bootargs = "console=ttymxc1,115200";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led0: user1 {
+ label = "user1";
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led1: user2 {
+ label = "user2";
+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
+ default-state = "off";
+ };
+
+ led2: user3 {
+ label = "user3";
+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
+ default-state = "off";
+ };
+ };
+
+ memory {
+ reg = <0x10000000 0x20000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_1p0v: regulator at 0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "1P0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator at 2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_5p0v: regulator at 3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "5P0V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c3>;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ eeprom1: eeprom at 50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom2: eeprom at 51 {
+ compatible = "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+
+ eeprom3: eeprom at 52 {
+ compatible = "atmel,24c02";
+ reg = <0x52>;
+ pagesize = <16>;
+ };
+
+ eeprom4: eeprom at 53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+
+ gpio: pca9555 at 23 {
+ compatible = "nxp,pca9555";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ rtc: ds1672 at 68 {
+ compatible = "dallas,ds1672";
+ reg = <0x68>;
+ };
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ status = "okay"; };
+
+&usbh1 {
+ status = "okay";
+};
+
+&iomuxc {
+ imx6qdl-gw552x {
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ >;
+ };
+ };
+};
--
1.8.3.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH v3] ARM: dts: Gateworks GW5520 support (i.MX6)
2014-08-22 21:52 ` Tim Harvey
@ 2014-08-25 2:02 ` Shawn Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2014-08-25 2:02 UTC (permalink / raw)
To: Tim Harvey
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Fri, Aug 22, 2014 at 02:52:54PM -0700, Tim Harvey wrote:
> Add support for the Gateworks GW5520 board.
>
> Signed-off-by: Tim Harvey <tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
Applied, thanks.
--
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v3] ARM: dts: Gateworks GW5520 support (i.MX6)
@ 2014-08-25 2:02 ` Shawn Guo
0 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2014-08-25 2:02 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Aug 22, 2014 at 02:52:54PM -0700, Tim Harvey wrote:
> Add support for the Gateworks GW5520 board.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2014-08-25 2:02 UTC | newest]
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2014-08-09 8:23 [PATCH] ARM: dts: Gateworks GW5520 support (i.MX6) Tim Harvey
2014-08-09 8:23 ` Tim Harvey
2014-08-09 9:20 ` Tony Prisk
2014-08-09 9:20 ` Tony Prisk
[not found] ` <1407572602-14017-1-git-send-email-tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
2014-08-09 11:44 ` Javier Martinez Canillas
2014-08-09 11:44 ` Javier Martinez Canillas
[not found] ` <CABxcv=kSfVoPgdDsodSPMSC7u_B6YiVuqHsh5T_Y4eucU6bQWw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-08-10 8:01 ` Tim Harvey
2014-08-10 8:01 ` Tim Harvey
2014-08-18 6:35 ` Shawn Guo
2014-08-18 6:35 ` Shawn Guo
2014-08-19 15:17 ` Tim Harvey
2014-08-19 15:17 ` Tim Harvey
[not found] ` <CAJ+vNU0qJrNtZMcPGWkGOPuHmyiV+3d-OM71PGDNRmnJZCS8SQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-08-22 7:43 ` Shawn Guo
2014-08-22 7:43 ` Shawn Guo
2014-08-22 3:55 ` [PATCH v2] " Tim Harvey
2014-08-22 3:55 ` Tim Harvey
[not found] ` <1408679706-18200-1-git-send-email-tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
2014-08-22 7:46 ` Shawn Guo
2014-08-22 7:46 ` Shawn Guo
2014-08-22 21:52 ` [PATCH v3] " Tim Harvey
2014-08-22 21:52 ` Tim Harvey
[not found] ` <1408744374-30800-1-git-send-email-tharvey-UMMOYl/HMS+akBO8gow8eQ@public.gmane.org>
2014-08-25 2:02 ` Shawn Guo
2014-08-25 2:02 ` Shawn Guo
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