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From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/6] arm64: Add support for hooks to handle undefined instructions
Date: Tue, 26 Aug 2014 15:30:11 +0100	[thread overview]
Message-ID: <20140826143011.GV23445@arm.com> (raw)
In-Reply-To: <CAKv+Gu8Nji0Jspk2cMCwVGKeODsiOb0NFUFWucm3rAbNdb_bTQ@mail.gmail.com>

On Tue, Aug 26, 2014 at 03:21:09PM +0100, Ard Biesheuvel wrote:
> On 26 August 2014 15:13, Will Deacon <will.deacon@arm.com> wrote:
> > On Tue, Aug 26, 2014 at 11:28:47AM +0100, Punit Agrawal wrote:
> >> Add support to register hooks for undefined instructions. The handlers
> >> will be called when the undefined instruction and the processor state
> >> (as contained in pstate) match criteria used at registration.
> >>
> >> Note: The patch only deals with ARM instruction encodings and needs
> >> fixing to handle thumb instructions as well.
> >
> > [...]
> >
> >> +static int call_undef_hook(struct pt_regs *regs)
> >> +{
> >> +     struct undef_hook *hook;
> >> +     unsigned long flags;
> >> +     u32 instr;
> >> +     int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
> >> +     void __user *pc = (void __user *)instruction_pointer(regs);
> >> +
> >> +     /*
> >> +      * Currently, undefined instruction patching is only supported
> >> +      * for user mode. Also, as we're not emulating any thumb
> >> +      * instructions lets not add thumb instruction decoding until
> >> +      * it is needed.
> >> +      */
> >> +     if (!compat_user_mode(regs) || compat_thumb_mode(regs))
> >> +             return 1;
> >
> > What do you mean by `undefined instruction patching'? I don't see anything
> > in the mechanism that means this can't be reused for kernel code, then we
> > just register the SWP emulation hook for userspace only using the mode (like
> > we do for kgdb).
> >
> 
> You need this patch in order to be able to return from an undef
> exception taken in EL1:
> 
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -287,7 +287,9 @@ el1_undef:
>          */
>         enable_dbg
>         mov     x0, sp
> -       b       do_undefinstr
> +       bl      do_undefinstr
> +
> +       kernel_exit 1
>  el1_dbg:
>         /*
>          * Debug exception handling

Hmm, I'm surprised we don't already need something like this for KGDB...

Will

  reply	other threads:[~2014-08-26 14:30 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-26 10:28 [PATCH 0/6] Legacy instruction emulation for arm64 Punit Agrawal
2014-08-26 10:28 ` [PATCH 1/6] arm: Fix in-correct barrier usage in SWP{B} emulation Punit Agrawal
2014-08-26 13:04   ` Will Deacon
2014-08-27 16:40   ` Catalin Marinas
2014-08-27 17:05     ` Punit Agrawal
2014-08-26 10:28 ` [PATCH 2/6] arm64: Create arch debugfs directory Punit Agrawal
2014-08-26 10:28 ` [PATCH 3/6] arm64: Add support for hooks to handle undefined instructions Punit Agrawal
2014-08-26 13:13   ` Will Deacon
2014-08-26 14:21     ` Ard Biesheuvel
2014-08-26 14:30       ` Will Deacon [this message]
2014-08-27 16:47         ` Catalin Marinas
2014-08-27 16:51           ` Will Deacon
2014-08-26 14:56     ` Punit Agrawal
2014-08-26 18:14       ` Will Deacon
2014-08-27 16:58       ` Catalin Marinas
2014-08-26 10:28 ` [PATCH 4/6] arm64: Add AArch32 instruction set condition code checks Punit Agrawal
2014-08-26 10:28 ` [PATCH 5/6] arm64: Port SWP/SWPB emulation support from arm Punit Agrawal
2014-08-26 11:32   ` Arnd Bergmann
2014-08-26 12:25     ` Will Deacon
2014-08-26 13:26       ` Arnd Bergmann
2014-08-26 13:56         ` Will Deacon
2014-08-27 17:35           ` Punit Agrawal
2014-08-27 18:30             ` Arnd Bergmann
2014-08-28 10:21               ` Punit Agrawal
2014-08-27 17:29   ` Catalin Marinas
2014-08-26 10:28 ` [PATCH 6/6] arm64: Emulate CP15 Barrier instructions Punit Agrawal
2014-08-26 13:16   ` Will Deacon
2014-08-27 17:40   ` Catalin Marinas
2014-08-28  9:34     ` Punit Agrawal
2014-08-28  9:42       ` Catalin Marinas

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