[U-Boot] [PATCH v3 0/6] Introduce low-level debug for ARM architecture

[U-Boot] [PATCH v3 0/6] Introduce low-level debug for ARM architecture

[Masahiro Yamada]

I have been in trouble for a while to debug some nasty problem
where neighter a debugger nor printf() function is available.

I found the lowlevel debug feature in ARM Linux can be used as is
in U-Boot too.

I tested this series on our SoCs (32bit ARM, specificly Coretex-A9).
Because I was not sure about aarch64, I have this feature
depend on "! ARM64".

1/6 and 2/6 refactor a bit and move CONFIG_ARM64 to Kconfig.

3/6 imports some source files from Linux 3.16 and
5/6 adds the Kconfig menu.



Masahiro Yamada (6):
  vexpress64: kconfig: consolidate CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI
  kconfig: armv8: move CONFIG_ARM64 to Kconfig
  arm: debug: import debug files from Linux 3.16
  arm: debug: replace license blocks with SPDX
  arm: debug: add Kconfig entries for lowlevel debug
  arm: debug: adjust for U-Boot

 arch/arm/Kconfig                       |  13 +-
 arch/arm/Kconfig.debug                 |  64 ++++++
 arch/arm/cpu/armv8/Kconfig             |   7 +
 arch/arm/include/debug/8250.S          |  52 +++++
 arch/arm/lib/Makefile                  |   2 +
 arch/arm/lib/debug.S                   | 136 ++++++++++++
 board/armltd/vexpress64/Kconfig        |  24 --
 board/freescale/ls2085a/Kconfig        |   8 -
 configs/ls2085a_emu_D4_defconfig       |   2 +-
 configs/ls2085a_emu_defconfig          |   2 +-
 configs/ls2085a_simu_defconfig         |   2 +-
 configs/vexpress_aemv8a_defconfig      |   1 -
 configs/vexpress_aemv8a_semi_defconfig |   4 +-
 include/linux/serial_reg.h             | 388 +++++++++++++++++++++++++++++++++
 14 files changed, 664 insertions(+), 41 deletions(-)
 create mode 100644 arch/arm/Kconfig.debug
 create mode 100644 arch/arm/cpu/armv8/Kconfig
 create mode 100644 arch/arm/include/debug/8250.S
 create mode 100644 arch/arm/lib/debug.S
 create mode 100644 include/linux/serial_reg.h

-- 
1.9.1

[U-Boot] [PATCH v3 1/6] vexpress64: kconfig: consolidate CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI

[Masahiro Yamada]

We do not have to distinguish CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI
from CONFIG_TARGET_VEXPRESS_AEMV8A.  Rename the former to the latter.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Cc: David Feng <fenghua@phytium.com.cn>
---

Changes in v3: None
Changes in v2: None

 arch/arm/Kconfig                       |  3 ---
 board/armltd/vexpress64/Kconfig        | 20 --------------------
 configs/vexpress_aemv8a_semi_defconfig |  2 +-
 3 files changed, 1 insertion(+), 24 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 22f0f09..1a4abde 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -461,9 +461,6 @@ config TEGRA
 config TARGET_VEXPRESS_AEMV8A
 	bool "Support vexpress_aemv8a"
 
-config TARGET_VEXPRESS_AEMV8A_SEMI
-	bool "Support vexpress_aemv8a_semi"
-
 config TARGET_LS2085A_EMU
 	bool "Support ls2085a_emu"
 
diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
index 91eb8d2..d8c4e21 100644
--- a/board/armltd/vexpress64/Kconfig
+++ b/board/armltd/vexpress64/Kconfig
@@ -17,23 +17,3 @@ config SYS_CONFIG_NAME
 	default "vexpress_aemv8a"
 
 endif
-
-if TARGET_VEXPRESS_AEMV8A_SEMI
-
-config SYS_CPU
-	string
-	default "armv8"
-
-config SYS_BOARD
-	string
-	default "vexpress64"
-
-config SYS_VENDOR
-	string
-	default "armltd"
-
-config SYS_CONFIG_NAME
-	string
-	default "vexpress_aemv8a"
-
-endif
diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index e6dd8e7..24b868c 100644
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -1,3 +1,3 @@
 CONFIG_SYS_EXTRA_OPTIONS="ARM64,SEMIHOSTING,BASE_FVP"
 CONFIG_ARM=y
-CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI=y
+CONFIG_TARGET_VEXPRESS_AEMV8A=y
-- 
1.9.1

[U-Boot] [PATCH v3 2/6] kconfig: armv8: move CONFIG_ARM64 to Kconfig

[Masahiro Yamada]

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---

Changes in v3:
  - Rebase on commit a1263632

Changes in v2: None

 arch/arm/Kconfig                       | 8 ++++++++
 arch/arm/cpu/armv8/Kconfig             | 7 +++++++
 board/armltd/vexpress64/Kconfig        | 4 ----
 board/freescale/ls2085a/Kconfig        | 8 --------
 configs/ls2085a_emu_D4_defconfig       | 2 +-
 configs/ls2085a_emu_defconfig          | 2 +-
 configs/ls2085a_simu_defconfig         | 2 +-
 configs/vexpress_aemv8a_defconfig      | 1 -
 configs/vexpress_aemv8a_semi_defconfig | 2 +-
 9 files changed, 19 insertions(+), 17 deletions(-)
 create mode 100644 arch/arm/cpu/armv8/Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1a4abde..e6bcec5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -5,6 +5,9 @@ config SYS_ARCH
 	string
 	default "arm"
 
+config ARM64
+	bool
+
 choice
 	prompt "Target select"
 
@@ -460,12 +463,15 @@ config TEGRA
 
 config TARGET_VEXPRESS_AEMV8A
 	bool "Support vexpress_aemv8a"
+	select ARM64
 
 config TARGET_LS2085A_EMU
 	bool "Support ls2085a_emu"
+	select ARM64
 
 config TARGET_LS2085A_SIMU
 	bool "Support ls2085a_simu"
+	select ARM64
 
 config TARGET_BALLOON3
 	bool "Support balloon3"
@@ -508,6 +514,8 @@ config TARGET_JORNADA
 
 endchoice
 
+source "arch/arm/cpu/armv8/Kconfig"
+
 source "arch/arm/cpu/arm926ejs/davinci/Kconfig"
 
 source "arch/arm/cpu/armv7/exynos/Kconfig"
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
new file mode 100644
index 0000000..af6a457
--- /dev/null
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -0,0 +1,7 @@
+if ARM64
+
+config SYS_CPU
+	string
+	default "armv8"
+
+endif
diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
index d8c4e21..519c544 100644
--- a/board/armltd/vexpress64/Kconfig
+++ b/board/armltd/vexpress64/Kconfig
@@ -1,9 +1,5 @@
 if TARGET_VEXPRESS_AEMV8A
 
-config SYS_CPU
-	string
-	default "armv8"
-
 config SYS_BOARD
 	string
 	default "vexpress64"
diff --git a/board/freescale/ls2085a/Kconfig b/board/freescale/ls2085a/Kconfig
index 5655e18..f33ebcb 100644
--- a/board/freescale/ls2085a/Kconfig
+++ b/board/freescale/ls2085a/Kconfig
@@ -1,9 +1,5 @@
 if TARGET_LS2085A_EMU
 
-config SYS_CPU
-	string
-	default "armv8"
-
 config SYS_BOARD
 	string
 	default "ls2085a"
@@ -24,10 +20,6 @@ endif
 
 if TARGET_LS2085A_SIMU
 
-config SYS_CPU
-	string
-	default "armv8"
-
 config SYS_BOARD
 	string
 	default "ls2085a"
diff --git a/configs/ls2085a_emu_D4_defconfig b/configs/ls2085a_emu_D4_defconfig
index f2f6882..0bc36ed 100644
--- a/configs/ls2085a_emu_D4_defconfig
+++ b/configs/ls2085a_emu_D4_defconfig
@@ -1,3 +1,3 @@
-CONFIG_SYS_EXTRA_OPTIONS="ARM64,EMU,SYS_FSL_DDR4"
+CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4"
 CONFIG_ARM=y
 CONFIG_TARGET_LS2085A_EMU=y
diff --git a/configs/ls2085a_emu_defconfig b/configs/ls2085a_emu_defconfig
index 51ffa56..a2efec3 100644
--- a/configs/ls2085a_emu_defconfig
+++ b/configs/ls2085a_emu_defconfig
@@ -1,3 +1,3 @@
-CONFIG_SYS_EXTRA_OPTIONS="ARM64,EMU"
+CONFIG_SYS_EXTRA_OPTIONS="EMU"
 CONFIG_ARM=y
 CONFIG_TARGET_LS2085A_EMU=y
diff --git a/configs/ls2085a_simu_defconfig b/configs/ls2085a_simu_defconfig
index efa8e74..7563a75 100644
--- a/configs/ls2085a_simu_defconfig
+++ b/configs/ls2085a_simu_defconfig
@@ -1,3 +1,3 @@
-CONFIG_SYS_EXTRA_OPTIONS="ARM64,SIMU"
+CONFIG_SYS_EXTRA_OPTIONS="SIMU"
 CONFIG_ARM=y
 CONFIG_TARGET_LS2085A_SIMU=y
diff --git a/configs/vexpress_aemv8a_defconfig b/configs/vexpress_aemv8a_defconfig
index a335abc..9e0a175 100644
--- a/configs/vexpress_aemv8a_defconfig
+++ b/configs/vexpress_aemv8a_defconfig
@@ -1,3 +1,2 @@
-CONFIG_SYS_EXTRA_OPTIONS="ARM64"
 CONFIG_ARM=y
 CONFIG_TARGET_VEXPRESS_AEMV8A=y
diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index 24b868c..8fdf4e0 100644
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -1,3 +1,3 @@
-CONFIG_SYS_EXTRA_OPTIONS="ARM64,SEMIHOSTING,BASE_FVP"
+CONFIG_SYS_EXTRA_OPTIONS="SEMIHOSTING,BASE_FVP"
 CONFIG_ARM=y
 CONFIG_TARGET_VEXPRESS_AEMV8A=y
-- 
1.9.1

[U-Boot] [PATCH v3 3/6] arm: debug: import debug files from Linux 3.16

[Masahiro Yamada]

U-Boot does not have arch/arm/kernel, include/uapi directories,
This commit copies files as follows:

  Location in Linux               -> Location in U-Boot

  arch/arm/kernel/debug.S         -> arch/arm/lib/debug.S
  arch/arm/include/debug/8250.S   -> arch/arm/include/debug/8250.S
  include/uapi/linux/serial_reg.h -> include/linux/serial_reg.h

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---

Changes in v3: None
Changes in v2: None

 arch/arm/include/debug/8250.S |  54 ++++++
 arch/arm/lib/debug.S          | 138 +++++++++++++++
 include/linux/serial_reg.h    | 389 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 581 insertions(+)
 create mode 100644 arch/arm/include/debug/8250.S
 create mode 100644 arch/arm/lib/debug.S
 create mode 100644 include/linux/serial_reg.h

diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
new file mode 100644
index 0000000..7a2baf9
--- /dev/null
+++ b/arch/arm/include/debug/8250.S
@@ -0,0 +1,54 @@
+/*
+ * arch/arm/include/debug/8250.S
+ *
+ *  Copyright (C) 1994-2013 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/serial_reg.h>
+
+		.macro	addruart, rp, rv, tmp
+		ldr	\rp, =CONFIG_DEBUG_UART_PHYS
+		ldr	\rv, =CONFIG_DEBUG_UART_VIRT
+		.endm
+
+#ifdef CONFIG_DEBUG_UART_8250_WORD
+		.macro	store, rd, rx:vararg
+		str	\rd, \rx
+		.endm
+
+		.macro	load, rd, rx:vararg
+		ldr	\rd, \rx
+		.endm
+#else
+		.macro	store, rd, rx:vararg
+		strb	\rd, \rx
+		.endm
+
+		.macro	load, rd, rx:vararg
+		ldrb	\rd, \rx
+		.endm
+#endif
+
+#define UART_SHIFT CONFIG_DEBUG_UART_8250_SHIFT
+
+		.macro	senduart,rd,rx
+		store	\rd, [\rx, #UART_TX << UART_SHIFT]
+		.endm
+
+		.macro	busyuart,rd,rx
+1002:		load	\rd, [\rx, #UART_LSR << UART_SHIFT]
+		and	\rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+		teq	\rd, #UART_LSR_TEMT | UART_LSR_THRE
+		bne	1002b
+		.endm
+
+		.macro	waituart,rd,rx
+#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
+1001:		load	\rd, [\rx, #UART_MSR << UART_SHIFT]
+		tst	\rd, #UART_MSR_CTS
+		beq	1001b
+#endif
+		.endm
diff --git a/arch/arm/lib/debug.S b/arch/arm/lib/debug.S
new file mode 100644
index 0000000..14f7c3b
--- /dev/null
+++ b/arch/arm/lib/debug.S
@@ -0,0 +1,138 @@
+/*
+ *  linux/arch/arm/kernel/debug.S
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  32-bit debugging code
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+		.text
+
+/*
+ * Some debugging routines (useful if you've got MM problems and
+ * printk isn't working).  For DEBUGGING ONLY!!!  Do not leave
+ * references to these in a production kernel!
+ */
+
+#if !defined(CONFIG_DEBUG_SEMIHOSTING)
+#include CONFIG_DEBUG_LL_INCLUDE
+#endif
+
+#ifdef CONFIG_MMU
+		.macro	addruart_current, rx, tmp1, tmp2
+		addruart	\tmp1, \tmp2, \rx
+		mrc		p15, 0, \rx, c1, c0
+		tst		\rx, #1
+		moveq		\rx, \tmp1
+		movne		\rx, \tmp2
+		.endm
+
+#else /* !CONFIG_MMU */
+		.macro	addruart_current, rx, tmp1, tmp2
+		addruart	\rx, \tmp1
+		.endm
+
+#endif /* CONFIG_MMU */
+
+/*
+ * Useful debugging routines
+ */
+ENTRY(printhex8)
+		mov	r1, #8
+		b	printhex
+ENDPROC(printhex8)
+
+ENTRY(printhex4)
+		mov	r1, #4
+		b	printhex
+ENDPROC(printhex4)
+
+ENTRY(printhex2)
+		mov	r1, #2
+printhex:	adr	r2, hexbuf
+		add	r3, r2, r1
+		mov	r1, #0
+		strb	r1, [r3]
+1:		and	r1, r0, #15
+		mov	r0, r0, lsr #4
+		cmp	r1, #10
+		addlt	r1, r1, #'0'
+		addge	r1, r1, #'a' - 10
+		strb	r1, [r3, #-1]!
+		teq	r3, r2
+		bne	1b
+		mov	r0, r2
+		b	printascii
+ENDPROC(printhex2)
+
+hexbuf:		.space 16
+
+		.ltorg
+
+#ifndef CONFIG_DEBUG_SEMIHOSTING
+
+ENTRY(printascii)
+		addruart_current r3, r1, r2
+		b	2f
+1:		waituart r2, r3
+		senduart r1, r3
+		busyuart r2, r3
+		teq	r1, #'\n'
+		moveq	r1, #'\r'
+		beq	1b
+2:		teq	r0, #0
+		ldrneb	r1, [r0], #1
+		teqne	r1, #0
+		bne	1b
+		mov	pc, lr
+ENDPROC(printascii)
+
+ENTRY(printch)
+		addruart_current r3, r1, r2
+		mov	r1, r0
+		mov	r0, #0
+		b	1b
+ENDPROC(printch)
+
+#ifdef CONFIG_MMU
+ENTRY(debug_ll_addr)
+		addruart r2, r3, ip
+		str	r2, [r0]
+		str	r3, [r1]
+		mov	pc, lr
+ENDPROC(debug_ll_addr)
+#endif
+
+#else
+
+ENTRY(printascii)
+		mov	r1, r0
+		mov	r0, #0x04		@ SYS_WRITE0
+	ARM(	svc	#0x123456	)
+	THUMB(	svc	#0xab		)
+		mov	pc, lr
+ENDPROC(printascii)
+
+ENTRY(printch)
+		adr	r1, hexbuf
+		strb	r0, [r1]
+		mov	r0, #0x03		@ SYS_WRITEC
+	ARM(	svc	#0x123456	)
+	THUMB(	svc	#0xab		)
+		mov	pc, lr
+ENDPROC(printch)
+
+ENTRY(debug_ll_addr)
+		mov	r2, #0
+		str	r2, [r0]
+		str	r2, [r1]
+		mov	pc, lr
+ENDPROC(debug_ll_addr)
+
+#endif
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h
new file mode 100644
index 0000000..99b4705
--- /dev/null
+++ b/include/linux/serial_reg.h
@@ -0,0 +1,389 @@
+/*
+ * include/linux/serial_reg.h
+ *
+ * Copyright (C) 1992, 1994 by Theodore Ts'o.
+ * 
+ * Redistribution of this file is permitted under the terms of the GNU 
+ * Public License (GPL)
+ * 
+ * These are the UART port assignments, expressed as offsets from the base
+ * register.  These assignments should hold for any serial port based on
+ * a 8250, 16450, or 16550(A).
+ */
+
+#ifndef _LINUX_SERIAL_REG_H
+#define _LINUX_SERIAL_REG_H
+
+/*
+ * DLAB=0
+ */
+#define UART_RX		0	/* In:  Receive buffer */
+#define UART_TX		0	/* Out: Transmit buffer */
+
+#define UART_IER	1	/* Out: Interrupt Enable Register */
+#define UART_IER_MSI		0x08 /* Enable Modem status interrupt */
+#define UART_IER_RLSI		0x04 /* Enable receiver line status interrupt */
+#define UART_IER_THRI		0x02 /* Enable Transmitter holding register int. */
+#define UART_IER_RDI		0x01 /* Enable receiver data interrupt */
+/*
+ * Sleep mode for ST16650 and TI16750.  For the ST16650, EFR[4]=1
+ */
+#define UART_IERX_SLEEP		0x10 /* Enable sleep mode */
+
+#define UART_IIR	2	/* In:  Interrupt ID Register */
+#define UART_IIR_NO_INT		0x01 /* No interrupts pending */
+#define UART_IIR_ID		0x0e /* Mask for the interrupt ID */
+#define UART_IIR_MSI		0x00 /* Modem status interrupt */
+#define UART_IIR_THRI		0x02 /* Transmitter holding register empty */
+#define UART_IIR_RDI		0x04 /* Receiver data interrupt */
+#define UART_IIR_RLSI		0x06 /* Receiver line status interrupt */
+
+#define UART_IIR_BUSY		0x07 /* DesignWare APB Busy Detect */
+
+#define UART_IIR_RX_TIMEOUT	0x0c /* OMAP RX Timeout interrupt */
+#define UART_IIR_XOFF		0x10 /* OMAP XOFF/Special Character */
+#define UART_IIR_CTS_RTS_DSR	0x20 /* OMAP CTS/RTS/DSR Change */
+
+#define UART_FCR	2	/* Out: FIFO Control Register */
+#define UART_FCR_ENABLE_FIFO	0x01 /* Enable the FIFO */
+#define UART_FCR_CLEAR_RCVR	0x02 /* Clear the RCVR FIFO */
+#define UART_FCR_CLEAR_XMIT	0x04 /* Clear the XMIT FIFO */
+#define UART_FCR_DMA_SELECT	0x08 /* For DMA applications */
+/*
+ * Note: The FIFO trigger levels are chip specific:
+ *	RX:76 = 00  01  10  11	TX:54 = 00  01  10  11
+ * PC16550D:	 1   4   8  14		xx  xx  xx  xx
+ * TI16C550A:	 1   4   8  14          xx  xx  xx  xx
+ * TI16C550C:	 1   4   8  14          xx  xx  xx  xx
+ * ST16C550:	 1   4   8  14		xx  xx  xx  xx
+ * ST16C650:	 8  16  24  28		16   8  24  30	PORT_16650V2
+ * NS16C552:	 1   4   8  14		xx  xx  xx  xx
+ * ST16C654:	 8  16  56  60		 8  16  32  56	PORT_16654
+ * TI16C750:	 1  16  32  56		xx  xx  xx  xx	PORT_16750
+ * TI16C752:	 8  16  56  60		 8  16  32  56
+ * Tegra:	 1   4   8  14		16   8   4   1	PORT_TEGRA
+ */
+#define UART_FCR_R_TRIG_00	0x00
+#define UART_FCR_R_TRIG_01	0x40
+#define UART_FCR_R_TRIG_10	0x80
+#define UART_FCR_R_TRIG_11	0xc0
+#define UART_FCR_T_TRIG_00	0x00
+#define UART_FCR_T_TRIG_01	0x10
+#define UART_FCR_T_TRIG_10	0x20
+#define UART_FCR_T_TRIG_11	0x30
+
+#define UART_FCR_TRIGGER_MASK	0xC0 /* Mask for the FIFO trigger range */
+#define UART_FCR_TRIGGER_1	0x00 /* Mask for trigger set at 1 */
+#define UART_FCR_TRIGGER_4	0x40 /* Mask for trigger set at 4 */
+#define UART_FCR_TRIGGER_8	0x80 /* Mask for trigger set at 8 */
+#define UART_FCR_TRIGGER_14	0xC0 /* Mask for trigger set at 14 */
+/* 16650 definitions */
+#define UART_FCR6_R_TRIGGER_8	0x00 /* Mask for receive trigger set at 1 */
+#define UART_FCR6_R_TRIGGER_16	0x40 /* Mask for receive trigger set at 4 */
+#define UART_FCR6_R_TRIGGER_24  0x80 /* Mask for receive trigger set at 8 */
+#define UART_FCR6_R_TRIGGER_28	0xC0 /* Mask for receive trigger set at 14 */
+#define UART_FCR6_T_TRIGGER_16	0x00 /* Mask for transmit trigger set at 16 */
+#define UART_FCR6_T_TRIGGER_8	0x10 /* Mask for transmit trigger set at 8 */
+#define UART_FCR6_T_TRIGGER_24  0x20 /* Mask for transmit trigger set at 24 */
+#define UART_FCR6_T_TRIGGER_30	0x30 /* Mask for transmit trigger set at 30 */
+#define UART_FCR7_64BYTE	0x20 /* Go into 64 byte mode (TI16C750) */
+
+#define UART_LCR	3	/* Out: Line Control Register */
+/*
+ * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting 
+ * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits.
+ */
+#define UART_LCR_DLAB		0x80 /* Divisor latch access bit */
+#define UART_LCR_SBC		0x40 /* Set break control */
+#define UART_LCR_SPAR		0x20 /* Stick parity (?) */
+#define UART_LCR_EPAR		0x10 /* Even parity select */
+#define UART_LCR_PARITY		0x08 /* Parity Enable */
+#define UART_LCR_STOP		0x04 /* Stop bits: 0=1 bit, 1=2 bits */
+#define UART_LCR_WLEN5		0x00 /* Wordlength: 5 bits */
+#define UART_LCR_WLEN6		0x01 /* Wordlength: 6 bits */
+#define UART_LCR_WLEN7		0x02 /* Wordlength: 7 bits */
+#define UART_LCR_WLEN8		0x03 /* Wordlength: 8 bits */
+
+/*
+ * Access to some registers depends on register access / configuration
+ * mode.
+ */
+#define UART_LCR_CONF_MODE_A	UART_LCR_DLAB	/* Configutation mode A */
+#define UART_LCR_CONF_MODE_B	0xBF		/* Configutation mode B */
+
+#define UART_MCR	4	/* Out: Modem Control Register */
+#define UART_MCR_CLKSEL		0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */
+#define UART_MCR_TCRTLR		0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */
+#define UART_MCR_XONANY		0x20 /* Enable Xon Any (TI16C752, EFR[4]=1) */
+#define UART_MCR_AFE		0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
+#define UART_MCR_LOOP		0x10 /* Enable loopback test mode */
+#define UART_MCR_OUT2		0x08 /* Out2 complement */
+#define UART_MCR_OUT1		0x04 /* Out1 complement */
+#define UART_MCR_RTS		0x02 /* RTS complement */
+#define UART_MCR_DTR		0x01 /* DTR complement */
+
+#define UART_LSR	5	/* In:  Line Status Register */
+#define UART_LSR_FIFOE		0x80 /* Fifo error */
+#define UART_LSR_TEMT		0x40 /* Transmitter empty */
+#define UART_LSR_THRE		0x20 /* Transmit-hold-register empty */
+#define UART_LSR_BI		0x10 /* Break interrupt indicator */
+#define UART_LSR_FE		0x08 /* Frame error indicator */
+#define UART_LSR_PE		0x04 /* Parity error indicator */
+#define UART_LSR_OE		0x02 /* Overrun error indicator */
+#define UART_LSR_DR		0x01 /* Receiver data ready */
+#define UART_LSR_BRK_ERROR_BITS	0x1E /* BI, FE, PE, OE bits */
+
+#define UART_MSR	6	/* In:  Modem Status Register */
+#define UART_MSR_DCD		0x80 /* Data Carrier Detect */
+#define UART_MSR_RI		0x40 /* Ring Indicator */
+#define UART_MSR_DSR		0x20 /* Data Set Ready */
+#define UART_MSR_CTS		0x10 /* Clear to Send */
+#define UART_MSR_DDCD		0x08 /* Delta DCD */
+#define UART_MSR_TERI		0x04 /* Trailing edge ring indicator */
+#define UART_MSR_DDSR		0x02 /* Delta DSR */
+#define UART_MSR_DCTS		0x01 /* Delta CTS */
+#define UART_MSR_ANY_DELTA	0x0F /* Any of the delta bits! */
+
+#define UART_SCR	7	/* I/O: Scratch Register */
+
+/*
+ * DLAB=1
+ */
+#define UART_DLL	0	/* Out: Divisor Latch Low */
+#define UART_DLM	1	/* Out: Divisor Latch High */
+
+/*
+ * LCR=0xBF (or DLAB=1 for 16C660)
+ */
+#define UART_EFR	2	/* I/O: Extended Features Register */
+#define UART_XR_EFR	9	/* I/O: Extended Features Register (XR17D15x) */
+#define UART_EFR_CTS		0x80 /* CTS flow control */
+#define UART_EFR_RTS		0x40 /* RTS flow control */
+#define UART_EFR_SCD		0x20 /* Special character detect */
+#define UART_EFR_ECB		0x10 /* Enhanced control bit */
+/*
+ * the low four bits control software flow control
+ */
+
+/*
+ * LCR=0xBF, TI16C752, ST16650, ST16650A, ST16654
+ */
+#define UART_XON1	4	/* I/O: Xon character 1 */
+#define UART_XON2	5	/* I/O: Xon character 2 */
+#define UART_XOFF1	6	/* I/O: Xoff character 1 */
+#define UART_XOFF2	7	/* I/O: Xoff character 2 */
+
+/*
+ * EFR[4]=1 MCR[6]=1, TI16C752
+ */
+#define UART_TI752_TCR	6	/* I/O: transmission control register */
+#define UART_TI752_TLR	7	/* I/O: trigger level register */
+
+/*
+ * LCR=0xBF, XR16C85x
+ */
+#define UART_TRG	0	/* FCTR bit 7 selects Rx or Tx
+				 * In: Fifo count
+				 * Out: Fifo custom trigger levels */
+/*
+ * These are the definitions for the Programmable Trigger Register
+ */
+#define UART_TRG_1		0x01
+#define UART_TRG_4		0x04
+#define UART_TRG_8		0x08
+#define UART_TRG_16		0x10
+#define UART_TRG_32		0x20
+#define UART_TRG_64		0x40
+#define UART_TRG_96		0x60
+#define UART_TRG_120		0x78
+#define UART_TRG_128		0x80
+
+#define UART_FCTR	1	/* Feature Control Register */
+#define UART_FCTR_RTS_NODELAY	0x00  /* RTS flow control delay */
+#define UART_FCTR_RTS_4DELAY	0x01
+#define UART_FCTR_RTS_6DELAY	0x02
+#define UART_FCTR_RTS_8DELAY	0x03
+#define UART_FCTR_IRDA		0x04  /* IrDa data encode select */
+#define UART_FCTR_TX_INT	0x08  /* Tx interrupt type select */
+#define UART_FCTR_TRGA		0x00  /* Tx/Rx 550 trigger table select */
+#define UART_FCTR_TRGB		0x10  /* Tx/Rx 650 trigger table select */
+#define UART_FCTR_TRGC		0x20  /* Tx/Rx 654 trigger table select */
+#define UART_FCTR_TRGD		0x30  /* Tx/Rx 850 programmable trigger select */
+#define UART_FCTR_SCR_SWAP	0x40  /* Scratch pad register swap */
+#define UART_FCTR_RX		0x00  /* Programmable trigger mode select */
+#define UART_FCTR_TX		0x80  /* Programmable trigger mode select */
+
+/*
+ * LCR=0xBF, FCTR[6]=1
+ */
+#define UART_EMSR	7	/* Extended Mode Select Register */
+#define UART_EMSR_FIFO_COUNT	0x01  /* Rx/Tx select */
+#define UART_EMSR_ALT_COUNT	0x02  /* Alternating count select */
+
+/*
+ * The Intel XScale on-chip UARTs define these bits
+ */
+#define UART_IER_DMAE	0x80	/* DMA Requests Enable */
+#define UART_IER_UUE	0x40	/* UART Unit Enable */
+#define UART_IER_NRZE	0x20	/* NRZ coding Enable */
+#define UART_IER_RTOIE	0x10	/* Receiver Time Out Interrupt Enable */
+
+#define UART_IIR_TOD	0x08	/* Character Timeout Indication Detected */
+
+#define UART_FCR_PXAR1	0x00	/* receive FIFO threshold = 1 */
+#define UART_FCR_PXAR8	0x40	/* receive FIFO threshold = 8 */
+#define UART_FCR_PXAR16	0x80	/* receive FIFO threshold = 16 */
+#define UART_FCR_PXAR32	0xc0	/* receive FIFO threshold = 32 */
+
+/*
+ * Intel MID on-chip HSU (High Speed UART) defined bits
+ */
+#define UART_FCR_HSU_64_1B	0x00	/* receive FIFO treshold = 1 */
+#define UART_FCR_HSU_64_16B	0x40	/* receive FIFO treshold = 16 */
+#define UART_FCR_HSU_64_32B	0x80	/* receive FIFO treshold = 32 */
+#define UART_FCR_HSU_64_56B	0xc0	/* receive FIFO treshold = 56 */
+
+#define UART_FCR_HSU_16_1B	0x00	/* receive FIFO treshold = 1 */
+#define UART_FCR_HSU_16_4B	0x40	/* receive FIFO treshold = 4 */
+#define UART_FCR_HSU_16_8B	0x80	/* receive FIFO treshold = 8 */
+#define UART_FCR_HSU_16_14B	0xc0	/* receive FIFO treshold = 14 */
+
+#define UART_FCR_HSU_64B_FIFO	0x20	/* chose 64 bytes FIFO */
+#define UART_FCR_HSU_16B_FIFO	0x00	/* chose 16 bytes FIFO */
+
+#define UART_FCR_HALF_EMPT_TXI	0x00	/* trigger TX_EMPT IRQ for half empty */
+#define UART_FCR_FULL_EMPT_TXI	0x08	/* trigger TX_EMPT IRQ for full empty */
+
+/*
+ * These register definitions are for the 16C950
+ */
+#define UART_ASR	0x01	/* Additional Status Register */
+#define UART_RFL	0x03	/* Receiver FIFO level */
+#define UART_TFL 	0x04	/* Transmitter FIFO level */
+#define UART_ICR	0x05	/* Index Control Register */
+
+/* The 16950 ICR registers */
+#define UART_ACR	0x00	/* Additional Control Register */
+#define UART_CPR	0x01	/* Clock Prescalar Register */
+#define UART_TCR	0x02	/* Times Clock Register */
+#define UART_CKS	0x03	/* Clock Select Register */
+#define UART_TTL	0x04	/* Transmitter Interrupt Trigger Level */
+#define UART_RTL	0x05	/* Receiver Interrupt Trigger Level */
+#define UART_FCL	0x06	/* Flow Control Level Lower */
+#define UART_FCH	0x07	/* Flow Control Level Higher */
+#define UART_ID1	0x08	/* ID #1 */
+#define UART_ID2	0x09	/* ID #2 */
+#define UART_ID3	0x0A	/* ID #3 */
+#define UART_REV	0x0B	/* Revision */
+#define UART_CSR	0x0C	/* Channel Software Reset */
+#define UART_NMR	0x0D	/* Nine-bit Mode Register */
+#define UART_CTR	0xFF
+
+/*
+ * The 16C950 Additional Control Register
+ */
+#define UART_ACR_RXDIS	0x01	/* Receiver disable */
+#define UART_ACR_TXDIS	0x02	/* Transmitter disable */
+#define UART_ACR_DSRFC	0x04	/* DSR Flow Control */
+#define UART_ACR_TLENB	0x20	/* 950 trigger levels enable */
+#define UART_ACR_ICRRD	0x40	/* ICR Read enable */
+#define UART_ACR_ASREN	0x80	/* Additional status enable */
+
+
+
+/*
+ * These definitions are for the RSA-DV II/S card, from
+ *
+ * Kiyokazu SUTO <suto@ks-and-ks.ne.jp>
+ */
+
+#define UART_RSA_BASE (-8)
+
+#define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */
+
+#define UART_RSA_MSR_SWAP (1 << 0) /* Swap low/high 8 bytes in I/O port addr */
+#define UART_RSA_MSR_FIFO (1 << 2) /* Enable the external FIFO */
+#define UART_RSA_MSR_FLOW (1 << 3) /* Enable the auto RTS/CTS flow control */
+#define UART_RSA_MSR_ITYP (1 << 4) /* Level (1) / Edge triger (0) */
+
+#define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */
+
+#define UART_RSA_IER_Rx_FIFO_H (1 << 0) /* Enable Rx FIFO half full int. */
+#define UART_RSA_IER_Tx_FIFO_H (1 << 1) /* Enable Tx FIFO half full int. */
+#define UART_RSA_IER_Tx_FIFO_E (1 << 2) /* Enable Tx FIFO empty int. */
+#define UART_RSA_IER_Rx_TOUT (1 << 3) /* Enable char receive timeout int */
+#define UART_RSA_IER_TIMER (1 << 4) /* Enable timer interrupt */
+
+#define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */
+
+#define UART_RSA_SRR_Tx_FIFO_NEMP (1 << 0) /* Tx FIFO is not empty (1) */
+#define UART_RSA_SRR_Tx_FIFO_NHFL (1 << 1) /* Tx FIFO is not half full (1) */
+#define UART_RSA_SRR_Tx_FIFO_NFUL (1 << 2) /* Tx FIFO is not full (1) */
+#define UART_RSA_SRR_Rx_FIFO_NEMP (1 << 3) /* Rx FIFO is not empty (1) */
+#define UART_RSA_SRR_Rx_FIFO_NHFL (1 << 4) /* Rx FIFO is not half full (1) */
+#define UART_RSA_SRR_Rx_FIFO_NFUL (1 << 5) /* Rx FIFO is not full (1) */
+#define UART_RSA_SRR_Rx_TOUT (1 << 6) /* Character reception timeout occurred (1) */
+#define UART_RSA_SRR_TIMER (1 << 7) /* Timer interrupt occurred */
+
+#define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */
+
+#define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */
+
+#define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */
+
+#define UART_RSA_TCR_SWITCH (1 << 0) /* Timer on */
+
+/*
+ * The RSA DSV/II board has two fixed clock frequencies.  One is the
+ * standard rate, and the other is 8 times faster.
+ */
+#define SERIAL_RSA_BAUD_BASE (921600)
+#define SERIAL_RSA_BAUD_BASE_LO (SERIAL_RSA_BAUD_BASE / 8)
+
+/*
+ * Extra serial register definitions for the internal UARTs
+ * in TI OMAP processors.
+ */
+#define UART_OMAP_MDR1		0x08	/* Mode definition register */
+#define UART_OMAP_MDR2		0x09	/* Mode definition register 2 */
+#define UART_OMAP_SCR		0x10	/* Supplementary control register */
+#define UART_OMAP_SSR		0x11	/* Supplementary status register */
+#define UART_OMAP_EBLR		0x12	/* BOF length register */
+#define UART_OMAP_OSC_12M_SEL	0x13	/* OMAP1510 12MHz osc select */
+#define UART_OMAP_MVER		0x14	/* Module version register */
+#define UART_OMAP_SYSC		0x15	/* System configuration register */
+#define UART_OMAP_SYSS		0x16	/* System status register */
+#define UART_OMAP_WER		0x17	/* Wake-up enable register */
+
+/*
+ * These are the definitions for the MDR1 register
+ */
+#define UART_OMAP_MDR1_16X_MODE		0x00	/* UART 16x mode */
+#define UART_OMAP_MDR1_SIR_MODE		0x01	/* SIR mode */
+#define UART_OMAP_MDR1_16X_ABAUD_MODE	0x02	/* UART 16x auto-baud */
+#define UART_OMAP_MDR1_13X_MODE		0x03	/* UART 13x mode */
+#define UART_OMAP_MDR1_MIR_MODE		0x04	/* MIR mode */
+#define UART_OMAP_MDR1_FIR_MODE		0x05	/* FIR mode */
+#define UART_OMAP_MDR1_CIR_MODE		0x06	/* CIR mode */
+#define UART_OMAP_MDR1_DISABLE		0x07	/* Disable (default state) */
+
+/*
+ * These are definitions for the Exar XR17V35X and XR17(C|D)15X
+ */
+#define UART_EXAR_8XMODE	0x88	/* 8X sampling rate select */
+#define UART_EXAR_SLEEP		0x8b	/* Sleep mode */
+#define UART_EXAR_DVID		0x8d	/* Device identification */
+
+#define UART_EXAR_FCTR		0x08	/* Feature Control Register */
+#define UART_FCTR_EXAR_IRDA	0x08	/* IrDa data encode select */
+#define UART_FCTR_EXAR_485	0x10	/* Auto 485 half duplex dir ctl */
+#define UART_FCTR_EXAR_TRGA	0x00	/* FIFO trigger table A */
+#define UART_FCTR_EXAR_TRGB	0x60	/* FIFO trigger table B */
+#define UART_FCTR_EXAR_TRGC	0x80	/* FIFO trigger table C */
+#define UART_FCTR_EXAR_TRGD	0xc0	/* FIFO trigger table D programmable */
+
+#define UART_EXAR_TXTRG		0x0a	/* Tx FIFO trigger level write-only */
+#define UART_EXAR_RXTRG		0x0b	/* Rx FIFO trigger level write-only */
+
+#endif /* _LINUX_SERIAL_REG_H */
+
-- 
1.9.1

[U-Boot] [PATCH v3 4/6] arm: debug: replace license blocks with SPDX

[Masahiro Yamada]

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---

Changes in v3: None
Changes in v2: None

 arch/arm/include/debug/8250.S | 4 +---
 arch/arm/lib/debug.S          | 4 +---
 include/linux/serial_reg.h    | 5 ++---
 3 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
index 7a2baf9..d47a892 100644
--- a/arch/arm/include/debug/8250.S
+++ b/arch/arm/include/debug/8250.S
@@ -3,9 +3,7 @@
  *
  *  Copyright (C) 1994-2013 Russell King
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <linux/serial_reg.h>
 
diff --git a/arch/arm/lib/debug.S b/arch/arm/lib/debug.S
index 14f7c3b..ddee7c0 100644
--- a/arch/arm/lib/debug.S
+++ b/arch/arm/lib/debug.S
@@ -3,9 +3,7 @@
  *
  *  Copyright (C) 1994-1999 Russell King
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * SPDX-License-Identifier:	GPL-2.0+
  *
  *  32-bit debugging code
  */
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h
index 99b4705..9214b67 100644
--- a/include/linux/serial_reg.h
+++ b/include/linux/serial_reg.h
@@ -2,9 +2,8 @@
  * include/linux/serial_reg.h
  *
  * Copyright (C) 1992, 1994 by Theodore Ts'o.
- * 
- * Redistribution of this file is permitted under the terms of the GNU 
- * Public License (GPL)
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
  * 
  * These are the UART port assignments, expressed as offsets from the base
  * register.  These assignments should hold for any serial port based on
-- 
1.9.1

[U-Boot] [PATCH v3 5/6] arm: debug: add Kconfig entries for lowlevel debug

[Masahiro Yamada]

We have not had a good method to debug the early boot stage such as
lowlevel_init function.  I guess developers generally use dedicated
debuggers for that, but it is difficult in some cases.
(For example, my debugger cannot connect to the ARM processor when
it is in the secure state.  It sometimes happens when I need to
debug the early boot stage on ARM SoCs with secure extension.)

The low level debug feature in Linux would be also helpful for U-boot
when we are stucking in nasty problems where the console is not
available yet.

You have to enable CONFIG_DEBUG_LL to use this feature.
For now, only 8250-compatible UART devices are supported.
You can add a header file under arch/arm/include/debug/ directory
to support your UART device if necessary.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---

Changes in v3: None
Changes in v2: None

 arch/arm/Kconfig       |  2 ++
 arch/arm/Kconfig.debug | 64 ++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/lib/Makefile  |  2 ++
 3 files changed, 68 insertions(+)
 create mode 100644 arch/arm/Kconfig.debug

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e6bcec5..9cdd5f0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -681,4 +681,6 @@ source "board/woodburn/Kconfig"
 source "board/xaeniax/Kconfig"
 source "board/zipitz2/Kconfig"
 
+source "arch/arm/Kconfig.debug"
+
 endmenu
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
new file mode 100644
index 0000000..624bcf4
--- /dev/null
+++ b/arch/arm/Kconfig.debug
@@ -0,0 +1,64 @@
+menu "ARM debug"
+
+config DEBUG_LL
+	bool "Low-level debugging functions"
+	depends on !ARM64
+	help
+	  Say Y here to include definitions of printascii, printch, printhex
+	  in U-Boot.  This is helpful if you are debugging code that
+	  executes before the console is initialized.
+
+choice
+	prompt "Low-level debugging port"
+	depends on DEBUG_LL
+
+	config DEBUG_LL_UART_8250
+		bool "Low-level debugging via 8250 UART"
+		help
+		  Say Y here if you wish the debug print routes to direct
+		  their output to an 8250 UART.  You can use this option
+		  to provide the parameters for the 8250 UART rather than
+		  selecting one of the platform specific options above if
+		  you know the parameters for the port.
+
+		  This option is preferred over the platform specific
+		  options; the platform specific options are deprecated
+		  and will be soon removed.
+
+endchoice
+
+config DEBUG_LL_INCLUDE
+	string
+	depends on DEBUG_LL
+	default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
+	default "mach/debug-macro.S"
+
+# Compatibility options for 8250
+config DEBUG_UART_8250
+	bool
+
+config DEBUG_UART_PHYS
+	hex "Physical base address of debug UART"
+	depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+
+# This is not used in U-Boot
+config DEBUG_UART_VIRT
+	hex
+	default DEBUG_UART_PHYS
+	depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+
+config DEBUG_UART_8250_SHIFT
+	int "Register offset shift for the 8250 debug UART"
+	depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+	default 2
+
+config DEBUG_UART_8250_WORD
+	bool "Use 32-bit accesses for 8250 UART"
+	depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+	depends on DEBUG_UART_8250_SHIFT >= 2
+
+config DEBUG_UART_8250_FLOW_CONTROL
+	bool "Enable flow control for 8250 UART"
+	depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+
+endmenu
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 1ef2400..d74e4b8 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -48,6 +48,8 @@ ifndef CONFIG_ARM64
 obj-y	+= cache-cp15.o
 endif
 
+obj-$(CONFIG_DEBUG_LL)	+= debug.o
+
 # For EABI conformant tool chains, provide eabi_compat()
 ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
 extra-y	+= eabi_compat.o
-- 
1.9.1

[U-Boot] [PATCH v3 6/6] arm: debug: adjust for U-Boot

[Masahiro Yamada]

Because CONFIG_MMU is never defined in U-Boot,
the non-MMU code in debug.S is always used.

Unfortunately, the number of arguments of the addruart macro
in Linux is different between MMU and non-MMU.
This causes a build error when importing some debug macros
using the third argument. (For ex. arch/arm/include/debug/exynos.S)
Pass the third argument to the non-MMU addruart to avoid such a problem.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
---

Changes in v3: None
Changes in v2:
  - Newly added

 arch/arm/lib/debug.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/debug.S b/arch/arm/lib/debug.S
index ddee7c0..760ba74 100644
--- a/arch/arm/lib/debug.S
+++ b/arch/arm/lib/debug.S
@@ -33,7 +33,7 @@
 
 #else /* !CONFIG_MMU */
 		.macro	addruart_current, rx, tmp1, tmp2
-		addruart	\rx, \tmp1
+		addruart	\rx, \tmp1, \tmp2
 		.endm
 
 #endif /* CONFIG_MMU */
-- 
1.9.1

[U-Boot] [PATCH v3 1/6] vexpress64: kconfig: consolidate CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI

[Masahiro YAMADA]

Tom,  (or Albert if he is ready)

Could you apply these two, please?
http://patchwork.ozlabs.org/patch/384614/
http://patchwork.ozlabs.org/patch/384616/

This kind of patches tend to cause conflicts.

-- 
Best Regards
Masahiro Yamada

[U-Boot] [PATCH v3 5/6] arm: debug: add Kconfig entries for lowlevel debug

[Simon Glass]

Hi Masahiro,

On 31 August 2014 20:06, Masahiro Yamada <yamada.m@jp.panasonic.com> wrote:
> We have not had a good method to debug the early boot stage such as
> lowlevel_init function.  I guess developers generally use dedicated
> debuggers for that, but it is difficult in some cases.
> (For example, my debugger cannot connect to the ARM processor when
> it is in the secure state.  It sometimes happens when I need to
> debug the early boot stage on ARM SoCs with secure extension.)
>
> The low level debug feature in Linux would be also helpful for U-boot
> when we are stucking in nasty problems where the console is not
> available yet.
>
> You have to enable CONFIG_DEBUG_LL to use this feature.
> For now, only 8250-compatible UART devices are supported.
> You can add a header file under arch/arm/include/debug/ directory
> to support your UART device if necessary.
>
> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

Is it possible to use the existing drivers for this? It seems
unfortunate to duplicate the ns16550 driver (if that is what has
happened).

E.g. I have had good luck just calling that driver code directly. I'm
not sure of an overall framework but it must be possible...

Regards,
Simon

[U-Boot] [PATCH v3 5/6] arm: debug: add Kconfig entries for lowlevel debug

[Masahiro Yamada]

Hi Simon,


On Wed, 3 Sep 2014 18:01:44 -0600
Simon Glass <sjg@chromium.org> wrote:

> Hi Masahiro,
> 
> On 31 August 2014 20:06, Masahiro Yamada <yamada.m@jp.panasonic.com> wrote:
> > We have not had a good method to debug the early boot stage such as
> > lowlevel_init function.  I guess developers generally use dedicated
> > debuggers for that, but it is difficult in some cases.
> > (For example, my debugger cannot connect to the ARM processor when
> > it is in the secure state.  It sometimes happens when I need to
> > debug the early boot stage on ARM SoCs with secure extension.)
> >
> > The low level debug feature in Linux would be also helpful for U-boot
> > when we are stucking in nasty problems where the console is not
> > available yet.
> >
> > You have to enable CONFIG_DEBUG_LL to use this feature.
> > For now, only 8250-compatible UART devices are supported.
> > You can add a header file under arch/arm/include/debug/ directory
> > to support your UART device if necessary.
> >
> > Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
> 
> Is it possible to use the existing drivers for this? It seems
> unfortunate to duplicate the ns16550 driver (if that is what has
> happened).

I am afraid it is difficult since the serial drivers are too
complicated and written in C.
Indeed, it is unfortunate, though.

This low level debug framework only uses r0, r1, r2, r3
registers and does not need stack.

I think it has an advantage over the serial drivers
for debugging the lowlevel_init where no stack is ready.



Best Regards
Masahiro Yamada

[U-Boot] [PATCH v3 5/6] arm: debug: add Kconfig entries for lowlevel debug

[Simon Glass]

Hi Masahiro,

On 4 September 2014 20:55, Masahiro Yamada <yamada.m@jp.panasonic.com> wrote:
> Hi Simon,
>
>
> On Wed, 3 Sep 2014 18:01:44 -0600
> Simon Glass <sjg@chromium.org> wrote:
>
>> Hi Masahiro,
>>
>> On 31 August 2014 20:06, Masahiro Yamada <yamada.m@jp.panasonic.com> wrote:
>> > We have not had a good method to debug the early boot stage such as
>> > lowlevel_init function.  I guess developers generally use dedicated
>> > debuggers for that, but it is difficult in some cases.
>> > (For example, my debugger cannot connect to the ARM processor when
>> > it is in the secure state.  It sometimes happens when I need to
>> > debug the early boot stage on ARM SoCs with secure extension.)
>> >
>> > The low level debug feature in Linux would be also helpful for U-boot
>> > when we are stucking in nasty problems where the console is not
>> > available yet.
>> >
>> > You have to enable CONFIG_DEBUG_LL to use this feature.
>> > For now, only 8250-compatible UART devices are supported.
>> > You can add a header file under arch/arm/include/debug/ directory
>> > to support your UART device if necessary.
>> >
>> > Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
>>
>> Is it possible to use the existing drivers for this? It seems
>> unfortunate to duplicate the ns16550 driver (if that is what has
>> happened).
>
> I am afraid it is difficult since the serial drivers are too
> complicated and written in C.
> Indeed, it is unfortunate, though.
>
> This low level debug framework only uses r0, r1, r2, r3
> registers and does not need stack.
>
> I think it has an advantage over the serial drivers
> for debugging the lowlevel_init where no stack is ready.

We have CONFIG_SYS_INIT_SP_ADDR and the like - if there is no RAM
available for a stack then I would question what RAM you are using to
hold your code :-)

As an example, for ns16500, you can do something like:

ldr r0, =UART_BASE
ldr r0, =UART_BAUD_DIVISOR
bl NS16550_init

ldr r0, =UART_BASE
mov r1, #'a'
bl NS16550_putc

At least for ARMv7, this actually uses no stack, so you could do that
now. I am pretty sure you would find the same with other serial
drivers as they are very simple. The cost is that we need to be able
to call the output function directly. With driver model we could
require this to be part of the API and I'm pretty sure it would be
easy enough. I still think this is far preferable to rewriting
duplicate drivers in assembler. May this is the only possible way in
Linux...

Also you can do:

ldr sp, =CONFIG_SYS_INIT_SP_ADDR

if needed.

Regards,
Simon

[U-Boot] [PATCH v3 5/6] arm: debug: add Kconfig entries for lowlevel debug

[Tom Rini]

On Wed, Sep 03, 2014 at 06:01:44PM -0600, Simon Glass wrote:
> Hi Masahiro,
> 
> On 31 August 2014 20:06, Masahiro Yamada <yamada.m@jp.panasonic.com> wrote:
> > We have not had a good method to debug the early boot stage such as
> > lowlevel_init function.  I guess developers generally use dedicated
> > debuggers for that, but it is difficult in some cases.
> > (For example, my debugger cannot connect to the ARM processor when
> > it is in the secure state.  It sometimes happens when I need to
> > debug the early boot stage on ARM SoCs with secure extension.)
> >
> > The low level debug feature in Linux would be also helpful for U-boot
> > when we are stucking in nasty problems where the console is not
> > available yet.
> >
> > You have to enable CONFIG_DEBUG_LL to use this feature.
> > For now, only 8250-compatible UART devices are supported.
> > You can add a header file under arch/arm/include/debug/ directory
> > to support your UART device if necessary.
> >
> > Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
> 
> Is it possible to use the existing drivers for this? It seems
> unfortunate to duplicate the ns16550 driver (if that is what has
> happened).

No, the point of this driver (and the similar ones that exist here and
elsewhere) is to have something small and seperate that we know is not
the cause of the problem.

-- 
Tom
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[U-Boot] [PATCH v3 5/6] arm: debug: add Kconfig entries for lowlevel debug

[Simon Glass]

Hi Tom,

On 6 September 2014 06:03, Tom Rini <trini@ti.com> wrote:

> On Wed, Sep 03, 2014 at 06:01:44PM -0600, Simon Glass wrote:
> > Hi Masahiro,
> >
> > On 31 August 2014 20:06, Masahiro Yamada <yamada.m@jp.panasonic.com>
> wrote:
> > > We have not had a good method to debug the early boot stage such as
> > > lowlevel_init function.  I guess developers generally use dedicated
> > > debuggers for that, but it is difficult in some cases.
> > > (For example, my debugger cannot connect to the ARM processor when
> > > it is in the secure state.  It sometimes happens when I need to
> > > debug the early boot stage on ARM SoCs with secure extension.)
> > >
> > > The low level debug feature in Linux would be also helpful for U-boot
> > > when we are stucking in nasty problems where the console is not
> > > available yet.
> > >
> > > You have to enable CONFIG_DEBUG_LL to use this feature.
> > > For now, only 8250-compatible UART devices are supported.
> > > You can add a header file under arch/arm/include/debug/ directory
> > > to support your UART device if necessary.
> > >
> > > Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
> >
> > Is it possible to use the existing drivers for this? It seems
> > unfortunate to duplicate the ns16550 driver (if that is what has
> > happened).
>
> No, the point of this driver (and the similar ones that exist here and
> elsewhere) is to have something small and seperate that we know is not
> the cause of the problem.
>

Please see my other email on this thread. I'm not talking about use the
driver in full, just directly calling the driver's init and putc functions
from assembler instead of duplicating them. It seems more scaleable to me
in that we can support any driver in principle. The cost is that each
driver needs to export these two functions with a defined signature.

Regards,
Simon

[U-Boot] [PATCH v3 0/6] Introduce low-level debug for ARM architecture

[Albert ARIBAUD]

Hello Masahiro,

On Mon,  1 Sep 2014 11:06:29 +0900, Masahiro Yamada
<yamada.m@jp.panasonic.com> wrote:
> I have been in trouble for a while to debug some nasty problem
> where neighter a debugger nor printf() function is available.
> 
> I found the lowlevel debug feature in ARM Linux can be used as is
> in U-Boot too.
> 
> I tested this series on our SoCs (32bit ARM, specificly Coretex-A9).
> Because I was not sure about aarch64, I have this feature
> depend on "! ARM64".
> 
> 1/6 and 2/6 refactor a bit and move CONFIG_ARM64 to Kconfig.
> 
> 3/6 imports some source files from Linux 3.16 and
> 5/6 adds the Kconfig menu.
> 
> 
> 
> Masahiro Yamada (6):
>   vexpress64: kconfig: consolidate CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI
>   kconfig: armv8: move CONFIG_ARM64 to Kconfig
>   arm: debug: import debug files from Linux 3.16
>   arm: debug: replace license blocks with SPDX
>   arm: debug: add Kconfig entries for lowlevel debug
>   arm: debug: adjust for U-Boot

Patches 3 through 6 also applied, to u-boot-arm/master. Thanks!

Amicalement,
-- 
Albert.