[PATCH v3 00/11] memory: add Atmel EBI (External Bus Interface) driver

[PATCH v3 00/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and
smc syscon regmaps.

The first 4 patches introduce 2 syscon devices needed to configure the
EBI bus, patch 5 and 6 adds support for the EBI bus, and the remaining
patches declares the EBI related nodes in sama5d3 dts[i] files.

Changes since v2:
- minor fixes int DT bindings doc
- fix SMC macros
- make use of SMC macros defined in include/linux/mfd/syscon/atmel-smc.h

Changes since v1:
- almost everything :-)

Boris Brezillon (11):
  mfd: syscon: Add atmel-matrix registers definition
  mfd: syscon: Add Atmel Matrix bus DT binding documentation
  mfd: syscon: Add atmel-smc registers definition
  mfd: syscon: Add Atmel SMC binding doc
  memory: add Atmel EBI (External Bus Interface) driver
  memory: atmel-ebi: add DT bindings documentation
  ARM: at91: select ATMEL_EBI when compiling a kernel for at91sam9 or
    sama5d3
  ARM: at91/dt: add HSMC (Static Memory Controller) node in sama5d3 dtsi
  ARM: at91/dt: add matrix node in sama5d3 dtsi
  ARM: at91/dt: add EBI (External Bus Interface) node in sama5d3 dtsi
  ARM: at91/dt: add NOR definition in sama5d3xcm dtsi

 .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++
 .../devicetree/bindings/mfd/atmel-matrix.txt       |  24 +
 .../devicetree/bindings/mfd/atmel-smc.txt          |  19 +
 arch/arm/boot/dts/sama5d3.dtsi                     |  93 +++
 arch/arm/boot/dts/sama5d3xcm.dtsi                  |  34 ++
 arch/arm/mach-at91/Kconfig                         |   2 +
 drivers/memory/Kconfig                             |  11 +
 drivers/memory/Makefile                            |   1 +
 drivers/memory/atmel-ebi.c                         | 627 +++++++++++++++++++++
 include/linux/mfd/syscon/atmel-matrix.h            | 114 ++++
 include/linux/mfd/syscon/atmel-smc.h               |  65 +++
 11 files changed, 1145 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-smc.txt
 create mode 100644 drivers/memory/atmel-ebi.c
 create mode 100644 include/linux/mfd/syscon/atmel-matrix.h
 create mode 100644 include/linux/mfd/syscon/atmel-smc.h

-- 
1.9.1

[PATCH v3 00/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and
smc syscon regmaps.

The first 4 patches introduce 2 syscon devices needed to configure the
EBI bus, patch 5 and 6 adds support for the EBI bus, and the remaining
patches declares the EBI related nodes in sama5d3 dts[i] files.

Changes since v2:
- minor fixes int DT bindings doc
- fix SMC macros
- make use of SMC macros defined in include/linux/mfd/syscon/atmel-smc.h

Changes since v1:
- almost everything :-)

Boris Brezillon (11):
  mfd: syscon: Add atmel-matrix registers definition
  mfd: syscon: Add Atmel Matrix bus DT binding documentation
  mfd: syscon: Add atmel-smc registers definition
  mfd: syscon: Add Atmel SMC binding doc
  memory: add Atmel EBI (External Bus Interface) driver
  memory: atmel-ebi: add DT bindings documentation
  ARM: at91: select ATMEL_EBI when compiling a kernel for at91sam9 or
    sama5d3
  ARM: at91/dt: add HSMC (Static Memory Controller) node in sama5d3 dtsi
  ARM: at91/dt: add matrix node in sama5d3 dtsi
  ARM: at91/dt: add EBI (External Bus Interface) node in sama5d3 dtsi
  ARM: at91/dt: add NOR definition in sama5d3xcm dtsi

 .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++
 .../devicetree/bindings/mfd/atmel-matrix.txt       |  24 +
 .../devicetree/bindings/mfd/atmel-smc.txt          |  19 +
 arch/arm/boot/dts/sama5d3.dtsi                     |  93 +++
 arch/arm/boot/dts/sama5d3xcm.dtsi                  |  34 ++
 arch/arm/mach-at91/Kconfig                         |   2 +
 drivers/memory/Kconfig                             |  11 +
 drivers/memory/Makefile                            |   1 +
 drivers/memory/atmel-ebi.c                         | 627 +++++++++++++++++++++
 include/linux/mfd/syscon/atmel-matrix.h            | 114 ++++
 include/linux/mfd/syscon/atmel-smc.h               |  65 +++
 11 files changed, 1145 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-smc.txt
 create mode 100644 drivers/memory/atmel-ebi.c
 create mode 100644 include/linux/mfd/syscon/atmel-matrix.h
 create mode 100644 include/linux/mfd/syscon/atmel-smc.h

-- 
1.9.1

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[PATCH v3 00/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and
smc syscon regmaps.

The first 4 patches introduce 2 syscon devices needed to configure the
EBI bus, patch 5 and 6 adds support for the EBI bus, and the remaining
patches declares the EBI related nodes in sama5d3 dts[i] files.

Changes since v2:
- minor fixes int DT bindings doc
- fix SMC macros
- make use of SMC macros defined in include/linux/mfd/syscon/atmel-smc.h

Changes since v1:
- almost everything :-)

Boris Brezillon (11):
  mfd: syscon: Add atmel-matrix registers definition
  mfd: syscon: Add Atmel Matrix bus DT binding documentation
  mfd: syscon: Add atmel-smc registers definition
  mfd: syscon: Add Atmel SMC binding doc
  memory: add Atmel EBI (External Bus Interface) driver
  memory: atmel-ebi: add DT bindings documentation
  ARM: at91: select ATMEL_EBI when compiling a kernel for at91sam9 or
    sama5d3
  ARM: at91/dt: add HSMC (Static Memory Controller) node in sama5d3 dtsi
  ARM: at91/dt: add matrix node in sama5d3 dtsi
  ARM: at91/dt: add EBI (External Bus Interface) node in sama5d3 dtsi
  ARM: at91/dt: add NOR definition in sama5d3xcm dtsi

 .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++
 .../devicetree/bindings/mfd/atmel-matrix.txt       |  24 +
 .../devicetree/bindings/mfd/atmel-smc.txt          |  19 +
 arch/arm/boot/dts/sama5d3.dtsi                     |  93 +++
 arch/arm/boot/dts/sama5d3xcm.dtsi                  |  34 ++
 arch/arm/mach-at91/Kconfig                         |   2 +
 drivers/memory/Kconfig                             |  11 +
 drivers/memory/Makefile                            |   1 +
 drivers/memory/atmel-ebi.c                         | 627 +++++++++++++++++++++
 include/linux/mfd/syscon/atmel-matrix.h            | 114 ++++
 include/linux/mfd/syscon/atmel-smc.h               |  65 +++
 11 files changed, 1145 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-smc.txt
 create mode 100644 drivers/memory/atmel-ebi.c
 create mode 100644 include/linux/mfd/syscon/atmel-matrix.h
 create mode 100644 include/linux/mfd/syscon/atmel-smc.h

-- 
1.9.1

[PATCH v3 01/11] mfd: syscon: Add atmel-matrix registers definition

[Boris Brezillon]

AT91 SoCs have a memory range reserved for internal bus configuration.
Expose those registers so that drivers can make use of the matrix syscon
declared in at91 DTs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 include/linux/mfd/syscon/atmel-matrix.h | 114 ++++++++++++++++++++++++++++++++
 1 file changed, 114 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-matrix.h

diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
new file mode 100644
index 0000000..d0da495
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-matrix.h
@@ -0,0 +1,114 @@
+/*
+ *  Copyright (C) 2014 Atmel Corporation.
+ *
+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+
+#define AT91SAM9260_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9260_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9260_MATRIX_PRS_OFF	0x80
+#define AT91SAM9260_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9260_MATRIX_EBICSA_OFF	0x11c
+
+#define AT91SAM9261_MATRIX_MRCR_OFF	0x0
+#define AT91SAM9261_MATRIX_SCFG_OFF	0x4
+#define AT91SAM9261_MATRIX_TCR_OFF	0x24
+#define AT91SAM9261_MATRIX_EBICSA_OFF	0x30
+#define AT91SAM9261_MATRIX_USBPUCR_OFF	0x34
+
+#define AT91SAM9263_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9263_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9263_MATRIX_PRS_OFF	0x80
+#define AT91SAM9263_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9263_MATRIX_TCR_OFF	0x114
+#define AT91SAM9263_MATRIX_EBI0CSA_OFF	0x120
+#define AT91SAM9263_MATRIX_EBI1CSA_OFF	0x124
+
+#define AT91SAM9G45_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9G45_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9G45_MATRIX_PRS_OFF	0x80
+#define AT91SAM9G45_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9G45_MATRIX_TCR_OFF	0x110
+#define AT91SAM9G45_MATRIX_DDRMPR_OFF	0x118
+#define AT91SAM9G45_MATRIX_EBICSA_OFF	0x128
+
+#define AT91SAM9N12_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9N12_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9N12_MATRIX_PRS_OFF	0x80
+#define AT91SAM9N12_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9N12_MATRIX_EBICSA_OFF	0x118
+
+#define AT91SAM9X5_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9X5_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9X5_MATRIX_PRS_OFF	0x80
+#define AT91SAM9X5_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9X5_MATRIX_EBICSA_OFF	0x120
+
+#define SAMA5D3_MATRIX_MCFG_OFF		0x00
+#define SAMA5D3_MATRIX_SCFG_OFF		0x40
+#define SAMA5D3_MATRIX_PRS_OFF		0x80
+#define SAMA5D3_MATRIX_MRCR_OFF		0x100
+
+#define AT91_MATRIX_MCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_ULBT		(7 << 0)
+#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
+#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
+#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
+#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
+#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
+
+#define AT91_MATRIX_SCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)
+#define AT91_MATRIX_DEFMSTR_TYPE	(3 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
+#define AT91_MATRIX_FIXED_DEFMSTR	(7 << 18)
+#define AT91_MATRIX_ARBT		(3 << 24)
+#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
+#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
+
+#define AT91_MATRIX_TCR(o)		(o)
+#define AT91_MATRIX_ITCM_SIZE		(0xf << 0)
+#define AT91_MATRIX_ITCM_0		(0 << 0)
+#define AT91_MATRIX_ITCM_16		(5 << 0)
+#define AT91_MATRIX_ITCM_32		(6 << 0)
+#define AT91_MATRIX_ITCM_64		(7 << 0)
+#define	AT91_MATRIX_DTCM_SIZE		(0xf << 4)
+#define	AT91_MATRIX_DTCM_0		(0 << 4)
+#define	AT91_MATRIX_DTCM_16		(5 << 4)
+#define AT91_MATRIX_DTCM_32		(6 << 4)
+#define AT91_MATRIX_DTCM_64		(7 << 4)
+
+#define AT91_MATRIX_PRAS(o, x)		((o) + ((x) * 0x8))
+#define AT91_MATRIX_PRBS(o, x)		((o) + ((x) * 0x8) + 0x4)
+#define AT91_MATRIX_MPR_MSK(x)		(3 << ((x) * 0x4))
+
+#define AT91_MATRIX_MRC(o)		(o)
+#define AT91_MATRIX_RCB(x)		BIT(x)
+
+#define AT91_MATRIX_EBICSA(o)		(o)
+#define AT91_MATRIX_CSA(cs, val)	(val << (cs))
+#define AT91_MATRIX_DBPUC		BIT(8)
+#define AT91_MATRIX_DBPDC		BIT(9)
+#define AT91_MATRIX_VDDIOMSEL		BIT(16)
+#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
+#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
+#define AT91_MATRIX_EBI_IOSR		BIT(17)
+#define AT91_MATRIX_DDR_IOSR		BIT(18)
+#define AT91_MATRIX_NFD0_SELECT		BIT(24)
+#define AT91_MATRIX_DDR_MP_EN		BIT(25)
+#define AT91_MATRIX_EBI_NUM_CS		8
+
+#define AT91_MATRIX_WPMR(o)		(o)
+#define AT91_MATRIX_WPSR(o)		(o)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
-- 
1.9.1

[PATCH v3 01/11] mfd: syscon: Add atmel-matrix registers definition

[Boris Brezillon]

AT91 SoCs have a memory range reserved for internal bus configuration.
Expose those registers so that drivers can make use of the matrix syscon
declared in at91 DTs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 include/linux/mfd/syscon/atmel-matrix.h | 114 ++++++++++++++++++++++++++++++++
 1 file changed, 114 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-matrix.h

diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
new file mode 100644
index 0000000..d0da495
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-matrix.h
@@ -0,0 +1,114 @@
+/*
+ *  Copyright (C) 2014 Atmel Corporation.
+ *
+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+
+#define AT91SAM9260_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9260_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9260_MATRIX_PRS_OFF	0x80
+#define AT91SAM9260_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9260_MATRIX_EBICSA_OFF	0x11c
+
+#define AT91SAM9261_MATRIX_MRCR_OFF	0x0
+#define AT91SAM9261_MATRIX_SCFG_OFF	0x4
+#define AT91SAM9261_MATRIX_TCR_OFF	0x24
+#define AT91SAM9261_MATRIX_EBICSA_OFF	0x30
+#define AT91SAM9261_MATRIX_USBPUCR_OFF	0x34
+
+#define AT91SAM9263_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9263_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9263_MATRIX_PRS_OFF	0x80
+#define AT91SAM9263_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9263_MATRIX_TCR_OFF	0x114
+#define AT91SAM9263_MATRIX_EBI0CSA_OFF	0x120
+#define AT91SAM9263_MATRIX_EBI1CSA_OFF	0x124
+
+#define AT91SAM9G45_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9G45_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9G45_MATRIX_PRS_OFF	0x80
+#define AT91SAM9G45_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9G45_MATRIX_TCR_OFF	0x110
+#define AT91SAM9G45_MATRIX_DDRMPR_OFF	0x118
+#define AT91SAM9G45_MATRIX_EBICSA_OFF	0x128
+
+#define AT91SAM9N12_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9N12_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9N12_MATRIX_PRS_OFF	0x80
+#define AT91SAM9N12_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9N12_MATRIX_EBICSA_OFF	0x118
+
+#define AT91SAM9X5_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9X5_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9X5_MATRIX_PRS_OFF	0x80
+#define AT91SAM9X5_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9X5_MATRIX_EBICSA_OFF	0x120
+
+#define SAMA5D3_MATRIX_MCFG_OFF		0x00
+#define SAMA5D3_MATRIX_SCFG_OFF		0x40
+#define SAMA5D3_MATRIX_PRS_OFF		0x80
+#define SAMA5D3_MATRIX_MRCR_OFF		0x100
+
+#define AT91_MATRIX_MCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_ULBT		(7 << 0)
+#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
+#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
+#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
+#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
+#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
+
+#define AT91_MATRIX_SCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)
+#define AT91_MATRIX_DEFMSTR_TYPE	(3 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
+#define AT91_MATRIX_FIXED_DEFMSTR	(7 << 18)
+#define AT91_MATRIX_ARBT		(3 << 24)
+#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
+#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
+
+#define AT91_MATRIX_TCR(o)		(o)
+#define AT91_MATRIX_ITCM_SIZE		(0xf << 0)
+#define AT91_MATRIX_ITCM_0		(0 << 0)
+#define AT91_MATRIX_ITCM_16		(5 << 0)
+#define AT91_MATRIX_ITCM_32		(6 << 0)
+#define AT91_MATRIX_ITCM_64		(7 << 0)
+#define	AT91_MATRIX_DTCM_SIZE		(0xf << 4)
+#define	AT91_MATRIX_DTCM_0		(0 << 4)
+#define	AT91_MATRIX_DTCM_16		(5 << 4)
+#define AT91_MATRIX_DTCM_32		(6 << 4)
+#define AT91_MATRIX_DTCM_64		(7 << 4)
+
+#define AT91_MATRIX_PRAS(o, x)		((o) + ((x) * 0x8))
+#define AT91_MATRIX_PRBS(o, x)		((o) + ((x) * 0x8) + 0x4)
+#define AT91_MATRIX_MPR_MSK(x)		(3 << ((x) * 0x4))
+
+#define AT91_MATRIX_MRC(o)		(o)
+#define AT91_MATRIX_RCB(x)		BIT(x)
+
+#define AT91_MATRIX_EBICSA(o)		(o)
+#define AT91_MATRIX_CSA(cs, val)	(val << (cs))
+#define AT91_MATRIX_DBPUC		BIT(8)
+#define AT91_MATRIX_DBPDC		BIT(9)
+#define AT91_MATRIX_VDDIOMSEL		BIT(16)
+#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
+#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
+#define AT91_MATRIX_EBI_IOSR		BIT(17)
+#define AT91_MATRIX_DDR_IOSR		BIT(18)
+#define AT91_MATRIX_NFD0_SELECT		BIT(24)
+#define AT91_MATRIX_DDR_MP_EN		BIT(25)
+#define AT91_MATRIX_EBI_NUM_CS		8
+
+#define AT91_MATRIX_WPMR(o)		(o)
+#define AT91_MATRIX_WPSR(o)		(o)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
-- 
1.9.1

[PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Boris Brezillon]

The Matrix registers are provided to configure internal bus behavior on
at91 SoCs.
Some registers might be access by several drivers (e.g. to configure
external memory bus timings), hence we declare this register set as a
syscon device.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
new file mode 100644
index 0000000..e56e27a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
@@ -0,0 +1,24 @@
+* Device tree bindings for Atmel Bus Matrix
+
+The Bus Matrix registers are used to configure Atmel SoCs internal bus
+behavior (master/slave priorities, undefined burst length type, ...)
+
+Required properties:
+- compatible:		Should be one of the following
+			"atmel,at91sam9260-matrix", "syscon"
+			"atmel,at91sam9261-matrix", "syscon"
+			"atmel,at91sam9263-matrix", "syscon"
+			"atmel,at91sam9263-matrix", "syscon"
+			"atmel,at91sam9g45-matrix", "syscon"
+			"atmel,at91sam9n12-matrix", "syscon"
+			"atmel,at91sam9x5-matrix", "syscon"
+			"atmel,sama5d3-matrix", "syscon"
+- reg:			Contains offset/length value of the Bus Matrix
+			memory region.
+
+Example:
+
+matrix: matrix@ffffec00 {
+	compatible = "atmel,sama5d3-matrix", "syscon";
+	reg = <0xffffec00 0x200>;
+};
-- 
1.9.1

[PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Boris Brezillon]

The Matrix registers are provided to configure internal bus behavior on
at91 SoCs.
Some registers might be access by several drivers (e.g. to configure
external memory bus timings), hence we declare this register set as a
syscon device.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
new file mode 100644
index 0000000..e56e27a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
@@ -0,0 +1,24 @@
+* Device tree bindings for Atmel Bus Matrix
+
+The Bus Matrix registers are used to configure Atmel SoCs internal bus
+behavior (master/slave priorities, undefined burst length type, ...)
+
+Required properties:
+- compatible:		Should be one of the following
+			"atmel,at91sam9260-matrix", "syscon"
+			"atmel,at91sam9261-matrix", "syscon"
+			"atmel,at91sam9263-matrix", "syscon"
+			"atmel,at91sam9263-matrix", "syscon"
+			"atmel,at91sam9g45-matrix", "syscon"
+			"atmel,at91sam9n12-matrix", "syscon"
+			"atmel,at91sam9x5-matrix", "syscon"
+			"atmel,sama5d3-matrix", "syscon"
+- reg:			Contains offset/length value of the Bus Matrix
+			memory region.
+
+Example:
+
+matrix: matrix@ffffec00 {
+	compatible = "atmel,sama5d3-matrix", "syscon";
+	reg = <0xffffec00 0x200>;
+};
-- 
1.9.1

[PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Boris Brezillon]

The Matrix registers are provided to configure internal bus behavior on
at91 SoCs.
Some registers might be access by several drivers (e.g. to configure
external memory bus timings), hence we declare this register set as a
syscon device.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
new file mode 100644
index 0000000..e56e27a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
@@ -0,0 +1,24 @@
+* Device tree bindings for Atmel Bus Matrix
+
+The Bus Matrix registers are used to configure Atmel SoCs internal bus
+behavior (master/slave priorities, undefined burst length type, ...)
+
+Required properties:
+- compatible:		Should be one of the following
+			"atmel,at91sam9260-matrix", "syscon"
+			"atmel,at91sam9261-matrix", "syscon"
+			"atmel,at91sam9263-matrix", "syscon"
+			"atmel,at91sam9263-matrix", "syscon"
+			"atmel,at91sam9g45-matrix", "syscon"
+			"atmel,at91sam9n12-matrix", "syscon"
+			"atmel,at91sam9x5-matrix", "syscon"
+			"atmel,sama5d3-matrix", "syscon"
+- reg:			Contains offset/length value of the Bus Matrix
+			memory region.
+
+Example:
+
+matrix: matrix at ffffec00 {
+	compatible = "atmel,sama5d3-matrix", "syscon";
+	reg = <0xffffec00 0x200>;
+};
-- 
1.9.1

[PATCH v3 03/11] mfd: syscon: Add atmel-smc registers definition

[Boris Brezillon]

Atmel AT91 SoCs have a memory range reserved for SMC (Static Memory
Controller) configuration.
Expose those registers so that drivers can make use of the smc syscon
declared in at91 DTs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 include/linux/mfd/syscon/atmel-smc.h | 65 ++++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-smc.h

diff --git a/include/linux/mfd/syscon/atmel-smc.h b/include/linux/mfd/syscon/atmel-smc.h
new file mode 100644
index 0000000..80dc15b
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-smc.h
@@ -0,0 +1,65 @@
+/*
+ * Atmel SMC (Static Memory Controller) register offsets and bit definitions.
+ *
+ * Copyright (C) 2014 Atmel
+ * Copyright (C) 2014 Free Electrons
+ *
+ * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_
+#define _LINUX_MFD_SYSCON_ATMEL_SMC_H_
+
+#include <linux/regmap.h>
+
+#define AT91SAM9_SMC_GENERIC_OFFSET	0x00
+#define AT91SAM9_SMC_GENERIC_BLK_SZ	0x10
+
+#define SAMA5_SMC_GENERIC_OFFSET	0x600
+#define SAMA5_SMC_GENERIC_BLK_SZ	0x14
+
+#define AT91SAM9_SMC_SETUP(o)		((o) + 0x00)
+#define AT91SAM9_SMC_NWESETUP_SHFT	0
+#define AT91SAM9_SMC_NCS_WRSETUP_SHFT	8
+#define AT91SAM9_SMC_NRDSETUP_SHFT	16
+#define AT91SAM9_SMC_NCS_NRDSETUP_SHFT	24
+
+#define AT91SAM9_SMC_PULSE(o)		((o) + 0x04)
+
+#define AT91SAM9_SMC_CYCLE(o)		((o) + 0x08)
+
+#define AT91SAM9_SMC_MODE(o)		((o) + 0x0c)
+#define SAMA5_SMC_MODE(o)		((o) + 0x10)
+#define AT91_SMC_READMODE		BIT(0)
+#define AT91_SMC_READMODE_NCS		(0 << 0)
+#define AT91_SMC_READMODE_NRD		(1 << 0)
+#define AT91_SMC_WRITEMODE		BIT(1)
+#define AT91_SMC_WRITEMODE_NCS		(0 << 1)
+#define AT91_SMC_WRITEMODE_NWE		(1 << 1)
+#define AT91_SMC_EXNWMODE		GENMASK(5, 4)
+#define AT91_SMC_EXNWMODE_DISABLE	(0 << 4)
+#define AT91_SMC_EXNWMODE_FROZEN	(2 << 4)
+#define AT91_SMC_EXNWMODE_READY		(3 << 4)
+#define AT91_SMC_BAT			BIT(8)
+#define AT91_SMC_BAT_SELECT		(0 << 8)
+#define AT91_SMC_BAT_WRITE		(1 << 8)
+#define AT91_SMC_DBW			GENMASK(13, 12)
+#define AT91_SMC_DBW_8			(0 << 12)
+#define AT91_SMC_DBW_16			(1 << 12)
+#define AT91_SMC_DBW_32			(2 << 12)
+#define AT91_SMC_TDF			GENMASK(19, 16)
+#define AT91_SMC_TDF_(x)		(((x) << 16) & AT91_SMC_TDF)
+#define AT91_SMC_TDFMODE		BIT(20)
+#define AT91_SMC_TDFMODE_OPTIMIZED	(1 << 20)
+#define AT91_SMC_PMEN			BIT(24)
+#define AT91_SMC_PS			GENMASK(29, 28)
+#define AT91_SMC_PS_4			(0 << 28)
+#define AT91_SMC_PS_8			(1 << 28)
+#define AT91_SMC_PS_16			(2 << 28)
+#define AT91_SMC_PS_32			(3 << 28)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_SMC_H_ */
-- 
1.9.1

[PATCH v3 03/11] mfd: syscon: Add atmel-smc registers definition

[Boris Brezillon]

Atmel AT91 SoCs have a memory range reserved for SMC (Static Memory
Controller) configuration.
Expose those registers so that drivers can make use of the smc syscon
declared in at91 DTs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 include/linux/mfd/syscon/atmel-smc.h | 65 ++++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-smc.h

diff --git a/include/linux/mfd/syscon/atmel-smc.h b/include/linux/mfd/syscon/atmel-smc.h
new file mode 100644
index 0000000..80dc15b
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-smc.h
@@ -0,0 +1,65 @@
+/*
+ * Atmel SMC (Static Memory Controller) register offsets and bit definitions.
+ *
+ * Copyright (C) 2014 Atmel
+ * Copyright (C) 2014 Free Electrons
+ *
+ * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_
+#define _LINUX_MFD_SYSCON_ATMEL_SMC_H_
+
+#include <linux/regmap.h>
+
+#define AT91SAM9_SMC_GENERIC_OFFSET	0x00
+#define AT91SAM9_SMC_GENERIC_BLK_SZ	0x10
+
+#define SAMA5_SMC_GENERIC_OFFSET	0x600
+#define SAMA5_SMC_GENERIC_BLK_SZ	0x14
+
+#define AT91SAM9_SMC_SETUP(o)		((o) + 0x00)
+#define AT91SAM9_SMC_NWESETUP_SHFT	0
+#define AT91SAM9_SMC_NCS_WRSETUP_SHFT	8
+#define AT91SAM9_SMC_NRDSETUP_SHFT	16
+#define AT91SAM9_SMC_NCS_NRDSETUP_SHFT	24
+
+#define AT91SAM9_SMC_PULSE(o)		((o) + 0x04)
+
+#define AT91SAM9_SMC_CYCLE(o)		((o) + 0x08)
+
+#define AT91SAM9_SMC_MODE(o)		((o) + 0x0c)
+#define SAMA5_SMC_MODE(o)		((o) + 0x10)
+#define AT91_SMC_READMODE		BIT(0)
+#define AT91_SMC_READMODE_NCS		(0 << 0)
+#define AT91_SMC_READMODE_NRD		(1 << 0)
+#define AT91_SMC_WRITEMODE		BIT(1)
+#define AT91_SMC_WRITEMODE_NCS		(0 << 1)
+#define AT91_SMC_WRITEMODE_NWE		(1 << 1)
+#define AT91_SMC_EXNWMODE		GENMASK(5, 4)
+#define AT91_SMC_EXNWMODE_DISABLE	(0 << 4)
+#define AT91_SMC_EXNWMODE_FROZEN	(2 << 4)
+#define AT91_SMC_EXNWMODE_READY		(3 << 4)
+#define AT91_SMC_BAT			BIT(8)
+#define AT91_SMC_BAT_SELECT		(0 << 8)
+#define AT91_SMC_BAT_WRITE		(1 << 8)
+#define AT91_SMC_DBW			GENMASK(13, 12)
+#define AT91_SMC_DBW_8			(0 << 12)
+#define AT91_SMC_DBW_16			(1 << 12)
+#define AT91_SMC_DBW_32			(2 << 12)
+#define AT91_SMC_TDF			GENMASK(19, 16)
+#define AT91_SMC_TDF_(x)		(((x) << 16) & AT91_SMC_TDF)
+#define AT91_SMC_TDFMODE		BIT(20)
+#define AT91_SMC_TDFMODE_OPTIMIZED	(1 << 20)
+#define AT91_SMC_PMEN			BIT(24)
+#define AT91_SMC_PS			GENMASK(29, 28)
+#define AT91_SMC_PS_4			(0 << 28)
+#define AT91_SMC_PS_8			(1 << 28)
+#define AT91_SMC_PS_16			(2 << 28)
+#define AT91_SMC_PS_32			(3 << 28)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_SMC_H_ */
-- 
1.9.1

[PATCH v3 03/11] mfd: syscon: Add atmel-smc registers definition

[Boris Brezillon]

Atmel AT91 SoCs have a memory range reserved for SMC (Static Memory
Controller) configuration.
Expose those registers so that drivers can make use of the smc syscon
declared in at91 DTs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 include/linux/mfd/syscon/atmel-smc.h | 65 ++++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-smc.h

diff --git a/include/linux/mfd/syscon/atmel-smc.h b/include/linux/mfd/syscon/atmel-smc.h
new file mode 100644
index 0000000..80dc15b
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-smc.h
@@ -0,0 +1,65 @@
+/*
+ * Atmel SMC (Static Memory Controller) register offsets and bit definitions.
+ *
+ * Copyright (C) 2014 Atmel
+ * Copyright (C) 2014 Free Electrons
+ *
+ * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_
+#define _LINUX_MFD_SYSCON_ATMEL_SMC_H_
+
+#include <linux/regmap.h>
+
+#define AT91SAM9_SMC_GENERIC_OFFSET	0x00
+#define AT91SAM9_SMC_GENERIC_BLK_SZ	0x10
+
+#define SAMA5_SMC_GENERIC_OFFSET	0x600
+#define SAMA5_SMC_GENERIC_BLK_SZ	0x14
+
+#define AT91SAM9_SMC_SETUP(o)		((o) + 0x00)
+#define AT91SAM9_SMC_NWESETUP_SHFT	0
+#define AT91SAM9_SMC_NCS_WRSETUP_SHFT	8
+#define AT91SAM9_SMC_NRDSETUP_SHFT	16
+#define AT91SAM9_SMC_NCS_NRDSETUP_SHFT	24
+
+#define AT91SAM9_SMC_PULSE(o)		((o) + 0x04)
+
+#define AT91SAM9_SMC_CYCLE(o)		((o) + 0x08)
+
+#define AT91SAM9_SMC_MODE(o)		((o) + 0x0c)
+#define SAMA5_SMC_MODE(o)		((o) + 0x10)
+#define AT91_SMC_READMODE		BIT(0)
+#define AT91_SMC_READMODE_NCS		(0 << 0)
+#define AT91_SMC_READMODE_NRD		(1 << 0)
+#define AT91_SMC_WRITEMODE		BIT(1)
+#define AT91_SMC_WRITEMODE_NCS		(0 << 1)
+#define AT91_SMC_WRITEMODE_NWE		(1 << 1)
+#define AT91_SMC_EXNWMODE		GENMASK(5, 4)
+#define AT91_SMC_EXNWMODE_DISABLE	(0 << 4)
+#define AT91_SMC_EXNWMODE_FROZEN	(2 << 4)
+#define AT91_SMC_EXNWMODE_READY		(3 << 4)
+#define AT91_SMC_BAT			BIT(8)
+#define AT91_SMC_BAT_SELECT		(0 << 8)
+#define AT91_SMC_BAT_WRITE		(1 << 8)
+#define AT91_SMC_DBW			GENMASK(13, 12)
+#define AT91_SMC_DBW_8			(0 << 12)
+#define AT91_SMC_DBW_16			(1 << 12)
+#define AT91_SMC_DBW_32			(2 << 12)
+#define AT91_SMC_TDF			GENMASK(19, 16)
+#define AT91_SMC_TDF_(x)		(((x) << 16) & AT91_SMC_TDF)
+#define AT91_SMC_TDFMODE		BIT(20)
+#define AT91_SMC_TDFMODE_OPTIMIZED	(1 << 20)
+#define AT91_SMC_PMEN			BIT(24)
+#define AT91_SMC_PS			GENMASK(29, 28)
+#define AT91_SMC_PS_4			(0 << 28)
+#define AT91_SMC_PS_8			(1 << 28)
+#define AT91_SMC_PS_16			(2 << 28)
+#define AT91_SMC_PS_32			(3 << 28)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_SMC_H_ */
-- 
1.9.1

[PATCH v3 04/11] mfd: syscon: Add Atmel SMC binding doc

[Boris Brezillon]

The SMC registers are used to configure Atmel EBI (External Bus Interface)
to interface with standard memory devices (NAND, NOR, SRAM or specialized
devices like FPGAs).

Declare this memory region as a syscon, so that different drivers can
configure the SMC interface (mostly timing configuration) according to
their need.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 Documentation/devicetree/bindings/mfd/atmel-smc.txt | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-smc.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-smc.txt b/Documentation/devicetree/bindings/mfd/atmel-smc.txt
new file mode 100644
index 0000000..26eeed3
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/atmel-smc.txt
@@ -0,0 +1,19 @@
+* Device tree bindings for Atmel SMC (Static Memory Controller)
+
+The SMC registers are used to configure Atmel EBI (External Bus Interface)
+to interface with standard memory devices (NAND, NOR, SRAM or specialized
+devices like FPGAs).
+
+Required properties:
+- compatible:		Should be one of the following
+			"atmel,at91sam9260-smc", "syscon"
+			"atmel,sama5d3-smc", "syscon"
+- reg:			Contains offset/length value of the SMC memory
+			region.
+
+Example:
+
+smc: smc@ffffc000 {
+	compatible = "atmel,sama5d3-smc", "syscon";
+	reg = <0xffffc000 0x1000>;
+};
-- 
1.9.1

[PATCH v3 04/11] mfd: syscon: Add Atmel SMC binding doc

[Boris Brezillon]

The SMC registers are used to configure Atmel EBI (External Bus Interface)
to interface with standard memory devices (NAND, NOR, SRAM or specialized
devices like FPGAs).

Declare this memory region as a syscon, so that different drivers can
configure the SMC interface (mostly timing configuration) according to
their need.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 Documentation/devicetree/bindings/mfd/atmel-smc.txt | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-smc.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-smc.txt b/Documentation/devicetree/bindings/mfd/atmel-smc.txt
new file mode 100644
index 0000000..26eeed3
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/atmel-smc.txt
@@ -0,0 +1,19 @@
+* Device tree bindings for Atmel SMC (Static Memory Controller)
+
+The SMC registers are used to configure Atmel EBI (External Bus Interface)
+to interface with standard memory devices (NAND, NOR, SRAM or specialized
+devices like FPGAs).
+
+Required properties:
+- compatible:		Should be one of the following
+			"atmel,at91sam9260-smc", "syscon"
+			"atmel,sama5d3-smc", "syscon"
+- reg:			Contains offset/length value of the SMC memory
+			region.
+
+Example:
+
+smc: smc@ffffc000 {
+	compatible = "atmel,sama5d3-smc", "syscon";
+	reg = <0xffffc000 0x1000>;
+};
-- 
1.9.1

[PATCH v3 04/11] mfd: syscon: Add Atmel SMC binding doc

[Boris Brezillon]

The SMC registers are used to configure Atmel EBI (External Bus Interface)
to interface with standard memory devices (NAND, NOR, SRAM or specialized
devices like FPGAs).

Declare this memory region as a syscon, so that different drivers can
configure the SMC interface (mostly timing configuration) according to
their need.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
 Documentation/devicetree/bindings/mfd/atmel-smc.txt | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/atmel-smc.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-smc.txt b/Documentation/devicetree/bindings/mfd/atmel-smc.txt
new file mode 100644
index 0000000..26eeed3
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/atmel-smc.txt
@@ -0,0 +1,19 @@
+* Device tree bindings for Atmel SMC (Static Memory Controller)
+
+The SMC registers are used to configure Atmel EBI (External Bus Interface)
+to interface with standard memory devices (NAND, NOR, SRAM or specialized
+devices like FPGAs).
+
+Required properties:
+- compatible:		Should be one of the following
+			"atmel,at91sam9260-smc", "syscon"
+			"atmel,sama5d3-smc", "syscon"
+- reg:			Contains offset/length value of the SMC memory
+			region.
+
+Example:
+
+smc: smc at ffffc000 {
+	compatible = "atmel,sama5d3-smc", "syscon";
+	reg = <0xffffc000 0x1000>;
+};
-- 
1.9.1

[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and
smc syscon regmaps.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 drivers/memory/Kconfig     |  11 +
 drivers/memory/Makefile    |   1 +
 drivers/memory/atmel-ebi.c | 627 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 639 insertions(+)
 create mode 100644 drivers/memory/atmel-ebi.c

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 6d91c27..dfe24a2 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -17,6 +17,17 @@ config ATMEL_SDRAMC
 	  Starting with the at91sam9g45, this controller supports SDR, DDR and
 	  LP-DDR memories.
 
+config ATMEL_EBI
+	bool "Atmel EBI driver"
+	default y
+	depends on ARCH_AT91 && OF
+	select MFD_SYSCON
+	help
+	  Driver for Atmel EBI controller.
+	  Used to configure the EBI (external bus interface) when the device-
+	  tree is used. This bus supports NANDs, external ethernet controller,
+	  SRAMs, ATA devices, etc.
+
 config TI_AEMIF
 	tristate "Texas Instruments AEMIF driver"
 	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index c32d319..7ca2c19 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
 obj-$(CONFIG_OF)		+= of_memory.o
 endif
 obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o
+obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o
 obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o
 obj-$(CONFIG_TI_EMIF)		+= emif.o
 obj-$(CONFIG_FSL_CORENET_CF)	+= fsl-corenet-cf.o
diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
new file mode 100644
index 0000000..6f45107
--- /dev/null
+++ b/drivers/memory/atmel-ebi.c
@@ -0,0 +1,627 @@
+/*
+ * EBI driver for Atmel SAM9 chips
+ * inspired by the fsl weim bus driver
+ *
+ * Copyright (C) 2013 JJ Hiblot.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-matrix.h>
+#include <linux/mfd/syscon/atmel-smc.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+
+#define AT91_EBICSA_REGFIELD(soc)			\
+	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
+		  AT91_MATRIX_EBI_NUM_CS - 1)
+
+#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
+	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
+		  0, AT91_MATRIX_EBI_NUM_CS - 1)
+
+struct at91sam9_smc_timings {
+	u32 ncs_rd_setup_ns;
+	u32 nrd_setup_ns;
+	u32 ncs_wr_setup_ns;
+	u32 nwe_setup_ns;
+	u32 ncs_rd_pulse_ns;
+	u32 nrd_pulse_ns;
+	u32 ncs_wr_pulse_ns;
+	u32 nwe_pulse_ns;
+	u32 nrd_cycle_ns;
+	u32 nwe_cycle_ns;
+	u32 tdf_ns;
+};
+
+struct at91sam9_smc_generic_fields {
+	struct regmap_field *setup;
+	struct regmap_field *pulse;
+	struct regmap_field *cycle;
+	struct regmap_field *mode;
+};
+
+struct at91sam9_ebi_dev_config {
+	struct at91sam9_smc_timings timings;
+	u32 mode;
+};
+
+struct at91_ebi;
+
+struct at91_ebi_dev {
+	struct device_node *np;
+	struct at91_smc_timings *timings;
+	struct at91_ebi *ebi;
+	u32 mode;
+	int cs;
+	void *config;
+};
+
+struct at91_ebi_caps {
+	unsigned int available_cs;
+	const struct reg_field *ebi_csa;
+	int (*xlate_config)(struct at91_ebi_dev *ebid);
+	int (*apply_config)(struct at91_ebi_dev *ebid);
+	int (*init)(struct at91_ebi *ebi);
+};
+
+struct at91_ebi {
+	struct clk *clk;
+	struct regmap *smc;
+	struct regmap *matrix;
+
+	struct regmap_field *ebi_csa;
+
+	struct device *dev;
+	const struct at91_ebi_caps *caps;
+	struct at91_ebi_dev *devs[AT91_MATRIX_EBI_NUM_CS];
+	void *priv;
+};
+
+static u32 at91sam9_smc_setup_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 32) {
+		coded_cycles |= 1 << 5;
+		if (cycles < 128)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 32;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_pulse_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 64) {
+		coded_cycles |= 1 << 6;
+		if (cycles < 256)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 64;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_cycle_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 128) {
+		coded_cycles = cycles / 256;
+		cycles %= 256;
+		if (cycles >= 128) {
+			coded_cycles++;
+			cycles = 0;
+		}
+
+		if (coded_cycles > 0x3) {
+			coded_cycles = 0x3;
+			cycles = 0x7f;
+		}
+
+		coded_cycles <<= 7;
+	}
+
+	coded_cycles |= cycles % 128;
+
+	return coded_cycles;
+}
+
+static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid)
+{
+	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings = &config->timings;
+	struct at91sam9_smc_generic_fields *fields = ebid->ebi->priv;
+	u32 val;
+
+	val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_setup_ns) << 24;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nrd_setup_ns) << 16;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_setup_ns) << 8;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nwe_setup_ns);
+	regmap_fields_write(fields->setup, ebid->cs, val);
+
+	val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_pulse_ns) << 24;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nrd_pulse_ns) << 16;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_pulse_ns) << 8;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nwe_pulse_ns);
+	regmap_fields_write(fields->pulse, ebid->cs, val);
+
+	val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					      timings->nrd_cycle_ns) << 16;
+	val |= at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					       timings->nwe_cycle_ns);
+	regmap_fields_write(fields->cycle, ebid->cs, val);
+
+	val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
+	if (val > 16)
+		val = 16;
+	regmap_fields_write(fields->mode, ebid->cs, config->mode | val << 16);
+
+	return 0;
+}
+
+static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings;
+	struct device_node *np = ebid->np;
+
+	timings = &config->timings;
+
+	of_property_read_u32(np, "atmel,ncs-rd-setup-ns",
+			     &timings->ncs_rd_setup_ns);
+	of_property_read_u32(np, "atmel,nrd-setup-ns",
+			     &timings->nrd_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-setup-ns",
+			     &timings->ncs_wr_setup_ns);
+	of_property_read_u32(np, "atmel,nwe-setup-ns",
+			     &timings->nwe_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-rd-pulse-ns",
+			     &timings->ncs_rd_pulse_ns);
+	of_property_read_u32(np, "atmel,nrd-pulse-ns",
+			     &timings->nrd_pulse_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-pulse-ns",
+			     &timings->ncs_wr_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-pulse-ns", &timings->nwe_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-cycle-ns", &timings->nwe_cycle_ns);
+	of_property_read_u32(np, "atmel,nrd-cycle-ns", &timings->nrd_cycle_ns);
+	of_property_read_u32(np, "atmel,tdf-ns", &timings->tdf_ns);
+
+	return 0;
+}
+
+static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct device_node *np = ebid->np;
+	const char *tmp_str;
+	u32 tmp;
+	int ret;
+
+	config = devm_kzalloc(ebid->ebi->dev, sizeof(*config), GFP_KERNEL);
+	if (!config)
+		return -ENOMEM;
+
+	ebid->config = config;
+
+	ret = of_property_read_u32(np, "atmel,bus-width", &tmp);
+	if (ret)
+		return ret;
+
+	switch (tmp) {
+	case 8:
+		config->mode |= AT91_SMC_DBW_8;
+		break;
+
+	case 16:
+		config->mode |= AT91_SMC_DBW_16;
+		break;
+
+	case 32:
+		config->mode |= AT91_SMC_DBW_32;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	if (of_property_read_bool(np, "atmel,tdf-optimized"))
+		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,byte-access-type", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "write"))
+		config->mode |= AT91_SMC_BAT_WRITE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,read-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nrd"))
+		config->mode |= AT91_SMC_READMODE_NRD;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,write-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nwe"))
+		config->mode |= AT91_SMC_WRITEMODE_NWE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,exnw-mode", &tmp_str);
+	if (tmp_str) {
+		if (!strcmp(tmp_str, "frozen"))
+			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
+		else if (!strcmp(tmp_str, "ready"))
+			config->mode |= AT91_SMC_EXNWMODE_READY;
+	}
+
+	tmp = 0;
+	ret = of_property_read_u32(np, "atmel,page-mode", &tmp);
+	if (!ret) {
+		switch (tmp) {
+		case 4:
+			config->mode |= AT91_SMC_PS_4;
+			break;
+
+		case 8:
+			config->mode |= AT91_SMC_PS_8;
+			break;
+
+		case 16:
+			config->mode |= AT91_SMC_PS_16;
+			break;
+
+		case 32:
+			config->mode |= AT91_SMC_PS_32;
+			break;
+
+		default:
+			return -EINVAL;
+		}
+
+		config->mode |= AT91_SMC_PMEN;
+	}
+
+	return at91sam9_smc_xslate_timings(ebid);
+}
+
+static int at91sam9_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = 0x10;
+
+	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int sama5d3_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
+
+	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np)
+{
+	struct device *dev = ebi->dev;
+	struct device_node *dev_np;
+	struct at91_ebi_dev *ebid;
+	u32 tmp;
+	int ret;
+
+	dev_np = of_get_next_child(np, NULL);
+	if (!dev_np)
+		return -EINVAL;
+
+	if (!of_device_is_available(dev_np))
+		return 0;
+
+	ebid = devm_kzalloc(ebi->dev, sizeof(*ebid), GFP_KERNEL);
+	if (!ebid)
+		return -ENOMEM;
+
+	ret = of_property_read_u32(dev_np, "reg" , &tmp);
+	if (ret < 0) {
+		dev_err(dev, "missing mandatory reg property\n");
+		return ret;
+	}
+
+	if (tmp > AT91_MATRIX_EBI_NUM_CS ||
+	    !(BIT(tmp) & ebi->caps->available_cs)) {
+		dev_err(dev, "invalid reg property\n");
+		return -EINVAL;
+	}
+
+	ebid->cs = tmp;
+	ebid->np = np;
+	ebid->ebi = ebi;
+
+	if (!of_property_read_bool(np, "atmel,generic-dev"))
+		goto populate;
+
+	if (ebid->ebi->ebi_csa)
+		regmap_field_update_bits(ebid->ebi->ebi_csa,
+					 BIT(ebid->cs),
+					 ~BIT(ebid->cs));
+
+	ret = ebid->ebi->caps->xlate_config(ebid);
+	if (ret)
+		return ret;
+
+	ret = ebid->ebi->caps->apply_config(ebid);
+	if (ret)
+		return ret;
+	ebi->devs[ebid->cs] = ebid;
+
+populate:
+	return of_platform_populate(np, of_default_bus_match_table, NULL, dev);
+}
+
+static const struct reg_field at91sam9260_ebi_csa =
+				AT91_EBICSA_REGFIELD(AT91SAM9260);
+
+static const struct at91_ebi_caps at91sam9260_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9260_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9261_ebi_csa =
+				AT91_EBICSA_REGFIELD(AT91SAM9261);
+
+static const struct at91_ebi_caps at91sam9261_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9261_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi0_csa =
+				AT91_MULTI_EBICSA_REGFIELD(AT91SAM9263, 0);
+
+static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi1_csa =
+				AT91_MULTI_EBICSA_REGFIELD(AT91SAM9263, 1);
+
+static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
+	.available_cs = 0x7,
+	.ebi_csa = &at91sam9263_ebi1_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9g45_ebi_csa =
+				AT91_EBICSA_REGFIELD(AT91SAM9G45);
+
+static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9g45_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps sama5d3_ebi_caps = {
+	.available_cs = 0xf,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = sama5d3_ebi_init,
+};
+
+static const struct of_device_id at91_ebi_id_table[] = {
+	{
+		.compatible = "atmel,at91sam9260-ebi",
+		.data = &at91sam9260_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9261-ebi",
+		.data = &at91sam9261_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi0",
+		.data = &at91sam9263_ebi0_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi1",
+		.data = &at91sam9263_ebi1_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9g45-ebi",
+		.data = &at91sam9g45_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9x5-ebi",
+		.data = &at91sam9x5_ebi_caps,
+	},
+	{
+		.compatible = "atmel,sama5d3-ebi",
+		.data = &sama5d3_ebi_caps,
+	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, at91_ebi_id_table);
+
+static int at91_ebi_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *match;
+	struct device_node *child;
+	struct device_node *np;
+	struct at91_ebi *ebi;
+	struct clk *clk;
+	int ret;
+
+	match = of_match_device(at91_ebi_id_table, &pdev->dev);
+	if (!match || !match->data)
+		return -EINVAL;
+
+	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
+	if (!ebi)
+		return -ENOMEM;
+
+	ebi->caps = match->data;
+	ebi->dev = &pdev->dev;
+
+	clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	ebi->clk = clk;
+
+	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
+	if (!np)
+		return -EINVAL;
+
+	ebi->smc = syscon_node_to_regmap(np);
+	if (IS_ERR(ebi->smc))
+		return PTR_ERR(ebi->smc);
+
+	/*
+	 * The sama5d3 does not provide an EBICSA register and thus does need
+	 * to access the matrix registers.
+	 */
+	if (ebi->caps->ebi_csa) {
+		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
+		if (np)
+			return -EINVAL;
+
+		ebi->matrix = syscon_node_to_regmap(np);
+		if (IS_ERR(ebi->matrix))
+			return PTR_ERR(ebi->matrix);
+
+		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
+						  *ebi->caps->ebi_csa);
+		if (IS_ERR(ebi->ebi_csa))
+			return PTR_ERR(ebi->ebi_csa);
+	}
+
+	ret = ebi->caps->init(ebi);
+	if (ret)
+		return ret;
+
+	for_each_child_of_node(pdev->dev.of_node, child) {
+		ret = at91_ebi_dev_setup(ebi, child);
+		if (ret)
+			return ret;
+	}
+
+	return ret;
+}
+
+static struct platform_driver at91_ebi_driver = {
+	.driver = {
+		.name = "atmel-ebi",
+		.of_match_table	= at91_ebi_id_table,
+	},
+};
+module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
+
+MODULE_AUTHOR("JJ Hiblot");
+MODULE_DESCRIPTION("Atmel's EBI driver");
+MODULE_LICENSE("GPL");
-- 
1.9.1

[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and
smc syscon regmaps.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 drivers/memory/Kconfig     |  11 +
 drivers/memory/Makefile    |   1 +
 drivers/memory/atmel-ebi.c | 627 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 639 insertions(+)
 create mode 100644 drivers/memory/atmel-ebi.c

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 6d91c27..dfe24a2 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -17,6 +17,17 @@ config ATMEL_SDRAMC
 	  Starting with the at91sam9g45, this controller supports SDR, DDR and
 	  LP-DDR memories.
 
+config ATMEL_EBI
+	bool "Atmel EBI driver"
+	default y
+	depends on ARCH_AT91 && OF
+	select MFD_SYSCON
+	help
+	  Driver for Atmel EBI controller.
+	  Used to configure the EBI (external bus interface) when the device-
+	  tree is used. This bus supports NANDs, external ethernet controller,
+	  SRAMs, ATA devices, etc.
+
 config TI_AEMIF
 	tristate "Texas Instruments AEMIF driver"
 	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index c32d319..7ca2c19 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
 obj-$(CONFIG_OF)		+= of_memory.o
 endif
 obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o
+obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o
 obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o
 obj-$(CONFIG_TI_EMIF)		+= emif.o
 obj-$(CONFIG_FSL_CORENET_CF)	+= fsl-corenet-cf.o
diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
new file mode 100644
index 0000000..6f45107
--- /dev/null
+++ b/drivers/memory/atmel-ebi.c
@@ -0,0 +1,627 @@
+/*
+ * EBI driver for Atmel SAM9 chips
+ * inspired by the fsl weim bus driver
+ *
+ * Copyright (C) 2013 JJ Hiblot.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-matrix.h>
+#include <linux/mfd/syscon/atmel-smc.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+
+#define AT91_EBICSA_REGFIELD(soc)			\
+	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
+		  AT91_MATRIX_EBI_NUM_CS - 1)
+
+#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
+	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
+		  0, AT91_MATRIX_EBI_NUM_CS - 1)
+
+struct at91sam9_smc_timings {
+	u32 ncs_rd_setup_ns;
+	u32 nrd_setup_ns;
+	u32 ncs_wr_setup_ns;
+	u32 nwe_setup_ns;
+	u32 ncs_rd_pulse_ns;
+	u32 nrd_pulse_ns;
+	u32 ncs_wr_pulse_ns;
+	u32 nwe_pulse_ns;
+	u32 nrd_cycle_ns;
+	u32 nwe_cycle_ns;
+	u32 tdf_ns;
+};
+
+struct at91sam9_smc_generic_fields {
+	struct regmap_field *setup;
+	struct regmap_field *pulse;
+	struct regmap_field *cycle;
+	struct regmap_field *mode;
+};
+
+struct at91sam9_ebi_dev_config {
+	struct at91sam9_smc_timings timings;
+	u32 mode;
+};
+
+struct at91_ebi;
+
+struct at91_ebi_dev {
+	struct device_node *np;
+	struct at91_smc_timings *timings;
+	struct at91_ebi *ebi;
+	u32 mode;
+	int cs;
+	void *config;
+};
+
+struct at91_ebi_caps {
+	unsigned int available_cs;
+	const struct reg_field *ebi_csa;
+	int (*xlate_config)(struct at91_ebi_dev *ebid);
+	int (*apply_config)(struct at91_ebi_dev *ebid);
+	int (*init)(struct at91_ebi *ebi);
+};
+
+struct at91_ebi {
+	struct clk *clk;
+	struct regmap *smc;
+	struct regmap *matrix;
+
+	struct regmap_field *ebi_csa;
+
+	struct device *dev;
+	const struct at91_ebi_caps *caps;
+	struct at91_ebi_dev *devs[AT91_MATRIX_EBI_NUM_CS];
+	void *priv;
+};
+
+static u32 at91sam9_smc_setup_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 32) {
+		coded_cycles |= 1 << 5;
+		if (cycles < 128)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 32;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_pulse_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 64) {
+		coded_cycles |= 1 << 6;
+		if (cycles < 256)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 64;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_cycle_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 128) {
+		coded_cycles = cycles / 256;
+		cycles %= 256;
+		if (cycles >= 128) {
+			coded_cycles++;
+			cycles = 0;
+		}
+
+		if (coded_cycles > 0x3) {
+			coded_cycles = 0x3;
+			cycles = 0x7f;
+		}
+
+		coded_cycles <<= 7;
+	}
+
+	coded_cycles |= cycles % 128;
+
+	return coded_cycles;
+}
+
+static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid)
+{
+	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings = &config->timings;
+	struct at91sam9_smc_generic_fields *fields = ebid->ebi->priv;
+	u32 val;
+
+	val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_setup_ns) << 24;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nrd_setup_ns) << 16;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_setup_ns) << 8;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nwe_setup_ns);
+	regmap_fields_write(fields->setup, ebid->cs, val);
+
+	val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_pulse_ns) << 24;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nrd_pulse_ns) << 16;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_pulse_ns) << 8;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nwe_pulse_ns);
+	regmap_fields_write(fields->pulse, ebid->cs, val);
+
+	val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					      timings->nrd_cycle_ns) << 16;
+	val |= at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					       timings->nwe_cycle_ns);
+	regmap_fields_write(fields->cycle, ebid->cs, val);
+
+	val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
+	if (val > 16)
+		val = 16;
+	regmap_fields_write(fields->mode, ebid->cs, config->mode | val << 16);
+
+	return 0;
+}
+
+static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings;
+	struct device_node *np = ebid->np;
+
+	timings = &config->timings;
+
+	of_property_read_u32(np, "atmel,ncs-rd-setup-ns",
+			     &timings->ncs_rd_setup_ns);
+	of_property_read_u32(np, "atmel,nrd-setup-ns",
+			     &timings->nrd_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-setup-ns",
+			     &timings->ncs_wr_setup_ns);
+	of_property_read_u32(np, "atmel,nwe-setup-ns",
+			     &timings->nwe_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-rd-pulse-ns",
+			     &timings->ncs_rd_pulse_ns);
+	of_property_read_u32(np, "atmel,nrd-pulse-ns",
+			     &timings->nrd_pulse_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-pulse-ns",
+			     &timings->ncs_wr_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-pulse-ns", &timings->nwe_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-cycle-ns", &timings->nwe_cycle_ns);
+	of_property_read_u32(np, "atmel,nrd-cycle-ns", &timings->nrd_cycle_ns);
+	of_property_read_u32(np, "atmel,tdf-ns", &timings->tdf_ns);
+
+	return 0;
+}
+
+static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct device_node *np = ebid->np;
+	const char *tmp_str;
+	u32 tmp;
+	int ret;
+
+	config = devm_kzalloc(ebid->ebi->dev, sizeof(*config), GFP_KERNEL);
+	if (!config)
+		return -ENOMEM;
+
+	ebid->config = config;
+
+	ret = of_property_read_u32(np, "atmel,bus-width", &tmp);
+	if (ret)
+		return ret;
+
+	switch (tmp) {
+	case 8:
+		config->mode |= AT91_SMC_DBW_8;
+		break;
+
+	case 16:
+		config->mode |= AT91_SMC_DBW_16;
+		break;
+
+	case 32:
+		config->mode |= AT91_SMC_DBW_32;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	if (of_property_read_bool(np, "atmel,tdf-optimized"))
+		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,byte-access-type", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "write"))
+		config->mode |= AT91_SMC_BAT_WRITE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,read-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nrd"))
+		config->mode |= AT91_SMC_READMODE_NRD;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,write-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nwe"))
+		config->mode |= AT91_SMC_WRITEMODE_NWE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,exnw-mode", &tmp_str);
+	if (tmp_str) {
+		if (!strcmp(tmp_str, "frozen"))
+			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
+		else if (!strcmp(tmp_str, "ready"))
+			config->mode |= AT91_SMC_EXNWMODE_READY;
+	}
+
+	tmp = 0;
+	ret = of_property_read_u32(np, "atmel,page-mode", &tmp);
+	if (!ret) {
+		switch (tmp) {
+		case 4:
+			config->mode |= AT91_SMC_PS_4;
+			break;
+
+		case 8:
+			config->mode |= AT91_SMC_PS_8;
+			break;
+
+		case 16:
+			config->mode |= AT91_SMC_PS_16;
+			break;
+
+		case 32:
+			config->mode |= AT91_SMC_PS_32;
+			break;
+
+		default:
+			return -EINVAL;
+		}
+
+		config->mode |= AT91_SMC_PMEN;
+	}
+
+	return at91sam9_smc_xslate_timings(ebid);
+}
+
+static int at91sam9_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = 0x10;
+
+	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int sama5d3_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
+
+	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np)
+{
+	struct device *dev = ebi->dev;
+	struct device_node *dev_np;
+	struct at91_ebi_dev *ebid;
+	u32 tmp;
+	int ret;
+
+	dev_np = of_get_next_child(np, NULL);
+	if (!dev_np)
+		return -EINVAL;
+
+	if (!of_device_is_available(dev_np))
+		return 0;
+
+	ebid = devm_kzalloc(ebi->dev, sizeof(*ebid), GFP_KERNEL);
+	if (!ebid)
+		return -ENOMEM;
+
+	ret = of_property_read_u32(dev_np, "reg" , &tmp);
+	if (ret < 0) {
+		dev_err(dev, "missing mandatory reg property\n");
+		return ret;
+	}
+
+	if (tmp > AT91_MATRIX_EBI_NUM_CS ||
+	    !(BIT(tmp) & ebi->caps->available_cs)) {
+		dev_err(dev, "invalid reg property\n");
+		return -EINVAL;
+	}
+
+	ebid->cs = tmp;
+	ebid->np = np;
+	ebid->ebi = ebi;
+
+	if (!of_property_read_bool(np, "atmel,generic-dev"))
+		goto populate;
+
+	if (ebid->ebi->ebi_csa)
+		regmap_field_update_bits(ebid->ebi->ebi_csa,
+					 BIT(ebid->cs),
+					 ~BIT(ebid->cs));
+
+	ret = ebid->ebi->caps->xlate_config(ebid);
+	if (ret)
+		return ret;
+
+	ret = ebid->ebi->caps->apply_config(ebid);
+	if (ret)
+		return ret;
+	ebi->devs[ebid->cs] = ebid;
+
+populate:
+	return of_platform_populate(np, of_default_bus_match_table, NULL, dev);
+}
+
+static const struct reg_field at91sam9260_ebi_csa =
+				AT91_EBICSA_REGFIELD(AT91SAM9260);
+
+static const struct at91_ebi_caps at91sam9260_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9260_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9261_ebi_csa =
+				AT91_EBICSA_REGFIELD(AT91SAM9261);
+
+static const struct at91_ebi_caps at91sam9261_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9261_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi0_csa =
+				AT91_MULTI_EBICSA_REGFIELD(AT91SAM9263, 0);
+
+static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi1_csa =
+				AT91_MULTI_EBICSA_REGFIELD(AT91SAM9263, 1);
+
+static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
+	.available_cs = 0x7,
+	.ebi_csa = &at91sam9263_ebi1_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9g45_ebi_csa =
+				AT91_EBICSA_REGFIELD(AT91SAM9G45);
+
+static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9g45_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps sama5d3_ebi_caps = {
+	.available_cs = 0xf,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = sama5d3_ebi_init,
+};
+
+static const struct of_device_id at91_ebi_id_table[] = {
+	{
+		.compatible = "atmel,at91sam9260-ebi",
+		.data = &at91sam9260_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9261-ebi",
+		.data = &at91sam9261_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi0",
+		.data = &at91sam9263_ebi0_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi1",
+		.data = &at91sam9263_ebi1_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9g45-ebi",
+		.data = &at91sam9g45_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9x5-ebi",
+		.data = &at91sam9x5_ebi_caps,
+	},
+	{
+		.compatible = "atmel,sama5d3-ebi",
+		.data = &sama5d3_ebi_caps,
+	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, at91_ebi_id_table);
+
+static int at91_ebi_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *match;
+	struct device_node *child;
+	struct device_node *np;
+	struct at91_ebi *ebi;
+	struct clk *clk;
+	int ret;
+
+	match = of_match_device(at91_ebi_id_table, &pdev->dev);
+	if (!match || !match->data)
+		return -EINVAL;
+
+	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
+	if (!ebi)
+		return -ENOMEM;
+
+	ebi->caps = match->data;
+	ebi->dev = &pdev->dev;
+
+	clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	ebi->clk = clk;
+
+	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
+	if (!np)
+		return -EINVAL;
+
+	ebi->smc = syscon_node_to_regmap(np);
+	if (IS_ERR(ebi->smc))
+		return PTR_ERR(ebi->smc);
+
+	/*
+	 * The sama5d3 does not provide an EBICSA register and thus does need
+	 * to access the matrix registers.
+	 */
+	if (ebi->caps->ebi_csa) {
+		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
+		if (np)
+			return -EINVAL;
+
+		ebi->matrix = syscon_node_to_regmap(np);
+		if (IS_ERR(ebi->matrix))
+			return PTR_ERR(ebi->matrix);
+
+		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
+						  *ebi->caps->ebi_csa);
+		if (IS_ERR(ebi->ebi_csa))
+			return PTR_ERR(ebi->ebi_csa);
+	}
+
+	ret = ebi->caps->init(ebi);
+	if (ret)
+		return ret;
+
+	for_each_child_of_node(pdev->dev.of_node, child) {
+		ret = at91_ebi_dev_setup(ebi, child);
+		if (ret)
+			return ret;
+	}
+
+	return ret;
+}
+
+static struct platform_driver at91_ebi_driver = {
+	.driver = {
+		.name = "atmel-ebi",
+		.of_match_table	= at91_ebi_id_table,
+	},
+};
+module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
+
+MODULE_AUTHOR("JJ Hiblot");
+MODULE_DESCRIPTION("Atmel's EBI driver");
+MODULE_LICENSE("GPL");
-- 
1.9.1

[PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and smc
syscon regmaps.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
 1 file changed, 155 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt

diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
new file mode 100644
index 0000000..3749ea1
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
@@ -0,0 +1,155 @@
+* Device tree bindings for Atmel EBI
+
+The External Bus Interface (EBI) controller is a bus where you can connect
+asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
+The EBI provides a glue-less interface to asynchronous memories though the SMC
+(Static Memory Controller).
+Synchronous memories (and some asynchronous memories like NANDs) can be
+attached to specialized controllers which are responsible for configuring the
+bus appropriately according to the connected device.
+In the other hand, the bus interface can be automated for simple asynchronous
+devices.
+
+Required properties:
+
+- compatible:		"atmel,at91sam9260-ebi"
+			"atmel,at91sam9261-ebi"
+			"atmel,at91sam9263-ebi0"
+			"atmel,at91sam9263-ebi1"
+			"atmel,at91sam9g45-ebi"
+			"atmel,at91sam9x5-ebi"
+			"atmel,sama5d3-ebi"
+
+- reg:			Contains offset/length value for EBI memory mapping.
+			This property might contain several entries if the EBI
+			memory range is not contiguous
+
+- #address-cells:	Must be 2.
+			The first cell encodes the CS.
+			The second cell encode the offset into the CS memory
+			range.
+
+- #size-cells:		Must be set to 1.
+
+- ranges:		Encodes CS to memory region association.
+
+- clocks:		Clock feeding the EBI controller.
+			See clock-bindings.txt
+
+Child chip-select (cs) nodes contain the memory devices nodes connected to
+such as NOR (e.g. cfi-flash) and NAND.
+There might be board specific devices like FPGAs.
+You'll define you device requirements in these child nodes.
+
+Required child cs node properties:
+
+- #address-cells:	Must be 2.
+
+- #size-cells:		Must be 1.
+
+- ranges:		Empty property indicating that child nodes can inherit
+			memory layout.
+
+Optional child cs node properties:
+- atmel,generic-dev		boolean property specifying if the device is
+				a generic device.
+				The following properties are only parsed if
+				this property is present.
+				Specialized devices are attached to specialized
+				controllers which are responsible for
+				configuring the bus appropriately.
+				Here are some examples of specialized
+				controllers: NAND, CompactFlash, SDR-SDRAM.
+
+- atmel,bus-width:		width of the asynchronous device's data bus
+				8, 16 or 32.
+				8 if not present.
+
+- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
+				"select" if not present.
+
+- atmel,read-mode		"nrd" or "ncs".
+				"ncs" is not present.
+
+- atmel,write-mode		"nwe" or "ncs".
+				"ncs" is not present.
+
+- atmel,exnw-mode		"disabled", "frozen" or "ready".
+				"disabled" if not present.
+
+- atmel,page-mode		enable page mode if present. The provided value
+				defines the page size (supported values: 4, 8,
+				16 and 32).
+
+Optional device timings expressed in nanoseconds (if the property is not
+present 0 is assumed):
+
+- atmel,ncs-rd-setup-ns
+- atmel,nrd-setup-ns
+- atmel,ncs-wr-setup-ns
+- atmel,nwe-setup-ns
+- atmel,ncs-rd-pulse-ns
+- atmel,nrd-pulse-ns
+- atmel,ncs-wr-pulse-ns
+- atmel,nwe-pulse-ns
+- atmel,nwe-cycle-ns
+- atmel,nrd-cycle-ns
+- atmel,tdf-ns
+
+- atmel,tdf-optimized		data float optimized mode. If present the data
+				float time is optimized depending on the next
+				device being accessed (next device setup
+				time is substracted to the current devive data
+				float time).
+
+
+
+Example:
+
+	ebi: ebi@10000000 {
+		compatible = "atmel,sama5d3-ebi", "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <1>;
+		atmel,smc = <&hsmc>;
+		atmel,matrix = <&matrix>;
+		reg = <0x10000000 0x10000000
+		       0x40000000 0x30000000>;
+		ranges = <0x0 0x0 0x10000000 0x10000000
+			  0x1 0x0 0x40000000 0x10000000
+			  0x2 0x0 0x50000000 0x10000000
+			  0x3 0x0 0x60000000 0x10000000>;
+		clocks = <&mck>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ebi_addr>;
+
+		cs@0 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges;
+			atmel,generic-dev;
+			atmel,read-mode = "nrd";
+			atmel,write-mode = "nwe";
+			atmel,bus-width = <16>;
+			atmel,ncs-rd-setup-ns = <0>;
+			atmel,ncs-wr-setup-ns = <0>;
+			atmel,nwe-setup-ns = <8>;
+			atmel,nrd-setup-ns = <16>;
+			atmel,ncs-rd-pulse-ns = <84>;
+			atmel,ncs-wr-pulse-ns = <84>;
+			atmel,nrd-pulse-ns = <76>;
+			atmel,nwe-pulse-ns = <76>;
+			atmel,nrd-cycle-ns = <107>;
+			atmel,nwe-cycle-ns = <84>;
+			atmel,tdf-ns = <16>;
+
+			nor: flash@0,0 {
+				compatible = "cfi-flash";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x0 0x0 0x1000000>;
+				bank-width = <2>;
+			};
+		};
+	};
+
-- 
1.9.1

[PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and smc
syscon regmaps.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
 1 file changed, 155 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt

diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
new file mode 100644
index 0000000..3749ea1
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
@@ -0,0 +1,155 @@
+* Device tree bindings for Atmel EBI
+
+The External Bus Interface (EBI) controller is a bus where you can connect
+asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
+The EBI provides a glue-less interface to asynchronous memories though the SMC
+(Static Memory Controller).
+Synchronous memories (and some asynchronous memories like NANDs) can be
+attached to specialized controllers which are responsible for configuring the
+bus appropriately according to the connected device.
+In the other hand, the bus interface can be automated for simple asynchronous
+devices.
+
+Required properties:
+
+- compatible:		"atmel,at91sam9260-ebi"
+			"atmel,at91sam9261-ebi"
+			"atmel,at91sam9263-ebi0"
+			"atmel,at91sam9263-ebi1"
+			"atmel,at91sam9g45-ebi"
+			"atmel,at91sam9x5-ebi"
+			"atmel,sama5d3-ebi"
+
+- reg:			Contains offset/length value for EBI memory mapping.
+			This property might contain several entries if the EBI
+			memory range is not contiguous
+
+- #address-cells:	Must be 2.
+			The first cell encodes the CS.
+			The second cell encode the offset into the CS memory
+			range.
+
+- #size-cells:		Must be set to 1.
+
+- ranges:		Encodes CS to memory region association.
+
+- clocks:		Clock feeding the EBI controller.
+			See clock-bindings.txt
+
+Child chip-select (cs) nodes contain the memory devices nodes connected to
+such as NOR (e.g. cfi-flash) and NAND.
+There might be board specific devices like FPGAs.
+You'll define you device requirements in these child nodes.
+
+Required child cs node properties:
+
+- #address-cells:	Must be 2.
+
+- #size-cells:		Must be 1.
+
+- ranges:		Empty property indicating that child nodes can inherit
+			memory layout.
+
+Optional child cs node properties:
+- atmel,generic-dev		boolean property specifying if the device is
+				a generic device.
+				The following properties are only parsed if
+				this property is present.
+				Specialized devices are attached to specialized
+				controllers which are responsible for
+				configuring the bus appropriately.
+				Here are some examples of specialized
+				controllers: NAND, CompactFlash, SDR-SDRAM.
+
+- atmel,bus-width:		width of the asynchronous device's data bus
+				8, 16 or 32.
+				8 if not present.
+
+- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
+				"select" if not present.
+
+- atmel,read-mode		"nrd" or "ncs".
+				"ncs" is not present.
+
+- atmel,write-mode		"nwe" or "ncs".
+				"ncs" is not present.
+
+- atmel,exnw-mode		"disabled", "frozen" or "ready".
+				"disabled" if not present.
+
+- atmel,page-mode		enable page mode if present. The provided value
+				defines the page size (supported values: 4, 8,
+				16 and 32).
+
+Optional device timings expressed in nanoseconds (if the property is not
+present 0 is assumed):
+
+- atmel,ncs-rd-setup-ns
+- atmel,nrd-setup-ns
+- atmel,ncs-wr-setup-ns
+- atmel,nwe-setup-ns
+- atmel,ncs-rd-pulse-ns
+- atmel,nrd-pulse-ns
+- atmel,ncs-wr-pulse-ns
+- atmel,nwe-pulse-ns
+- atmel,nwe-cycle-ns
+- atmel,nrd-cycle-ns
+- atmel,tdf-ns
+
+- atmel,tdf-optimized		data float optimized mode. If present the data
+				float time is optimized depending on the next
+				device being accessed (next device setup
+				time is substracted to the current devive data
+				float time).
+
+
+
+Example:
+
+	ebi: ebi at 10000000 {
+		compatible = "atmel,sama5d3-ebi", "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <1>;
+		atmel,smc = <&hsmc>;
+		atmel,matrix = <&matrix>;
+		reg = <0x10000000 0x10000000
+		       0x40000000 0x30000000>;
+		ranges = <0x0 0x0 0x10000000 0x10000000
+			  0x1 0x0 0x40000000 0x10000000
+			  0x2 0x0 0x50000000 0x10000000
+			  0x3 0x0 0x60000000 0x10000000>;
+		clocks = <&mck>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ebi_addr>;
+
+		cs at 0 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges;
+			atmel,generic-dev;
+			atmel,read-mode = "nrd";
+			atmel,write-mode = "nwe";
+			atmel,bus-width = <16>;
+			atmel,ncs-rd-setup-ns = <0>;
+			atmel,ncs-wr-setup-ns = <0>;
+			atmel,nwe-setup-ns = <8>;
+			atmel,nrd-setup-ns = <16>;
+			atmel,ncs-rd-pulse-ns = <84>;
+			atmel,ncs-wr-pulse-ns = <84>;
+			atmel,nrd-pulse-ns = <76>;
+			atmel,nwe-pulse-ns = <76>;
+			atmel,nrd-cycle-ns = <107>;
+			atmel,nwe-cycle-ns = <84>;
+			atmel,tdf-ns = <16>;
+
+			nor: flash at 0,0 {
+				compatible = "cfi-flash";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x0 0x0 0x1000000>;
+				bank-width = <2>;
+			};
+		};
+	};
+
-- 
1.9.1

[PATCH v3 07/11] ARM: at91: select ATMEL_EBI when compiling a kernel for at91sam9 or sama5d3

[Boris Brezillon]

at91sam9* and sama5d* SoCs have an EBI (External Bus Interface).
Select the ATMEL_EBI driver when support for these SoCs is selected.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/mach-at91/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 0e6d548..a72402a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -49,6 +49,7 @@ config SOC_AT91SAM9
 	select GENERIC_CLOCKEVENTS
 	select MEMORY if USE_OF
 	select ATMEL_SDRAMC if USE_OF
+	select ATMEL_EBI if USE_OF
 
 config SOC_SAMA5
 	bool
@@ -58,6 +59,7 @@ config SOC_SAMA5
 	select USE_OF
 	select MEMORY
 	select ATMEL_SDRAMC
+	select ATMEL_EBI
 
 menu "Atmel AT91 System-on-Chip"
 
-- 
1.9.1

[PATCH v3 07/11] ARM: at91: select ATMEL_EBI when compiling a kernel for at91sam9 or sama5d3

[Boris Brezillon]

at91sam9* and sama5d* SoCs have an EBI (External Bus Interface).
Select the ATMEL_EBI driver when support for these SoCs is selected.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/mach-at91/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 0e6d548..a72402a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -49,6 +49,7 @@ config SOC_AT91SAM9
 	select GENERIC_CLOCKEVENTS
 	select MEMORY if USE_OF
 	select ATMEL_SDRAMC if USE_OF
+	select ATMEL_EBI if USE_OF
 
 config SOC_SAMA5
 	bool
@@ -58,6 +59,7 @@ config SOC_SAMA5
 	select USE_OF
 	select MEMORY
 	select ATMEL_SDRAMC
+	select ATMEL_EBI
 
 menu "Atmel AT91 System-on-Chip"
 
-- 
1.9.1

[PATCH v3 08/11] ARM: at91/dt: add HSMC (Static Memory Controller) node in sama5d3 dtsi

[Boris Brezillon]

Add the SMC node in sama5d3 dtsi.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 5f4144d..9f1eed5 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -395,6 +395,11 @@
 				clock-names = "tdes_clk";
 			};
 
+			hsmc: hsmc@ffffc000 {
+				compatible = "atmel,sama5d3-smc", "syscon";
+				reg = <0xffffc000 0x1000>;
+			};
+
 			dma0: dma-controller@ffffe600 {
 				compatible = "atmel,at91sam9g45-dma";
 				reg = <0xffffe600 0x200>;
-- 
1.9.1

[PATCH v3 08/11] ARM: at91/dt: add HSMC (Static Memory Controller) node in sama5d3 dtsi

[Boris Brezillon]

Add the SMC node in sama5d3 dtsi.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 5f4144d..9f1eed5 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -395,6 +395,11 @@
 				clock-names = "tdes_clk";
 			};
 
+			hsmc: hsmc at ffffc000 {
+				compatible = "atmel,sama5d3-smc", "syscon";
+				reg = <0xffffc000 0x1000>;
+			};
+
 			dma0: dma-controller at ffffe600 {
 				compatible = "atmel,at91sam9g45-dma";
 				reg = <0xffffe600 0x200>;
-- 
1.9.1

[PATCH v3 09/11] ARM: at91/dt: add matrix node in sama5d3 dtsi

[Boris Brezillon]

Add matrix node in sama5d3 dtsi so that it can be referenced by other
devices.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 9f1eed5..d49dab7 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -425,6 +425,11 @@
 				clock-names = "ddrck", "mpddr";
 			};
 
+			matrix: matrix@ffffec00 {
+				compatible = "atmel,sama5d3-matrix", "syscon";
+				reg = <0xffffec00 0x200>;
+			};
+
 			dbgu: serial@ffffee00 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xffffee00 0x200>;
-- 
1.9.1

[PATCH v3 09/11] ARM: at91/dt: add matrix node in sama5d3 dtsi

[Boris Brezillon]

Add matrix node in sama5d3 dtsi so that it can be referenced by other
devices.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 9f1eed5..d49dab7 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -425,6 +425,11 @@
 				clock-names = "ddrck", "mpddr";
 			};
 
+			matrix: matrix at ffffec00 {
+				compatible = "atmel,sama5d3-matrix", "syscon";
+				reg = <0xffffec00 0x200>;
+			};
+
 			dbgu: serial at ffffee00 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xffffee00 0x200>;
-- 
1.9.1

[PATCH v3 10/11] ARM: at91/dt: add EBI (External Bus Interface) node in sama5d3 dtsi

[Boris Brezillon]

Add EBI node and EBI pin muxing.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3.dtsi | 83 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index d49dab7..d011ade 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -530,6 +530,63 @@
 					};
 				};
 
+				ebi {
+					pinctrl_ebi_addr: ebi-addr-0 {
+						atmel,pins =
+							<AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_cs0: ebi-cs0-0 {
+						atmel,pins =
+							<AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_cs1: ebi-cs1-0 {
+						atmel,pins =
+							<AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_cs2: ebi-cs2-0 {
+						atmel,pins =
+							<AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
+						atmel,pins =
+							<AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_nwait: ebi-nwait-0 {
+						atmel,pins =
+							<AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+				};
+
 				i2c0 {
 					pinctrl_i2c0: i2c0-0 {
 						atmel,pins =
@@ -1407,6 +1464,32 @@
 			status = "disabled";
 		};
 
+		ebi: ebi@10000000 {
+			compatible = "atmel,sama5d3-ebi", "simple-bus";
+			#address-cells = <2>;
+			#size-cells = <1>;
+			atmel,smc = <&hsmc>;
+			atmel,matrix = <&matrix>;
+			reg = <0x10000000 0x10000000
+			       0x40000000 0x30000000>;
+			ranges = <0x0 0x0 0x10000000 0x10000000
+				  0x1 0x0 0x40000000 0x10000000
+				  0x2 0x0 0x50000000 0x10000000
+				  0x3 0x0 0x60000000 0x10000000>;
+			clocks = <&mck>;
+
+			/*
+			 * TODO: EBI pins should be referenced here, but they
+			 * conflict with NAND pins, which should actually be a
+			 * sub device of the EBI bus and thus should not
+			 * request it's own set of pins as they are shared
+			 * with other devices connected on the EBI bus.
+			 *
+			 * pinctrl-names = "default";
+			 * pinctrl-0 = <&pinctrl_ebi_addr>;
+			 */
+		};
+
 		nand0: nand@60000000 {
 			compatible = "atmel,at91rm9200-nand";
 			#address-cells = <1>;
-- 
1.9.1

[PATCH v3 10/11] ARM: at91/dt: add EBI (External Bus Interface) node in sama5d3 dtsi

[Boris Brezillon]

Add EBI node and EBI pin muxing.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3.dtsi | 83 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index d49dab7..d011ade 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -530,6 +530,63 @@
 					};
 				};
 
+				ebi {
+					pinctrl_ebi_addr: ebi-addr-0 {
+						atmel,pins =
+							<AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE
+							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_cs0: ebi-cs0-0 {
+						atmel,pins =
+							<AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_cs1: ebi-cs1-0 {
+						atmel,pins =
+							<AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_cs2: ebi-cs2-0 {
+						atmel,pins =
+							<AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
+						atmel,pins =
+							<AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ebi_nwait: ebi-nwait-0 {
+						atmel,pins =
+							<AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+					};
+				};
+
 				i2c0 {
 					pinctrl_i2c0: i2c0-0 {
 						atmel,pins =
@@ -1407,6 +1464,32 @@
 			status = "disabled";
 		};
 
+		ebi: ebi at 10000000 {
+			compatible = "atmel,sama5d3-ebi", "simple-bus";
+			#address-cells = <2>;
+			#size-cells = <1>;
+			atmel,smc = <&hsmc>;
+			atmel,matrix = <&matrix>;
+			reg = <0x10000000 0x10000000
+			       0x40000000 0x30000000>;
+			ranges = <0x0 0x0 0x10000000 0x10000000
+				  0x1 0x0 0x40000000 0x10000000
+				  0x2 0x0 0x50000000 0x10000000
+				  0x3 0x0 0x60000000 0x10000000>;
+			clocks = <&mck>;
+
+			/*
+			 * TODO: EBI pins should be referenced here, but they
+			 * conflict with NAND pins, which should actually be a
+			 * sub device of the EBI bus and thus should not
+			 * request it's own set of pins as they are shared
+			 * with other devices connected on the EBI bus.
+			 *
+			 * pinctrl-names = "default";
+			 * pinctrl-0 = <&pinctrl_ebi_addr>;
+			 */
+		};
+
 		nand0: nand at 60000000 {
 			compatible = "atmel,at91rm9200-nand";
 			#address-cells = <1>;
-- 
1.9.1

[PATCH v3 11/11] ARM: at91/dt: add NOR definition in sama5d3xcm dtsi

[Boris Brezillon]

The sama5d3 evaluation kit embeds a NOR chip which is connected through
the EBI.
Define this NOR chip in the CPU module dtsi.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3xcm.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index cfcd200..92be776 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -75,6 +75,40 @@
 			};
 		};
 
+		ebi@10000000 {
+			pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>;
+
+			cs@0 {
+				#address-cells = <2>;
+				#size-cells = <1>;
+				ranges;
+				atmel,generic-dev;
+				atmel,read-mode = "nrd";
+				atmel,write-mode = "nwe";
+				atmel,bus-width = <16>;
+				atmel,ncs-rd-setup-ns = <0>;
+				atmel,ncs-wr-setup-ns = <0>;
+				atmel,nwe-setup-ns = <8>;
+				atmel,nrd-setup-ns = <16>;
+				atmel,ncs-rd-pulse-ns = <84>;
+				atmel,ncs-wr-pulse-ns = <84>;
+				atmel,nrd-pulse-ns = <76>;
+				atmel,nwe-pulse-ns = <76>;
+				atmel,nrd-cycle-ns = <107>;
+				atmel,nwe-cycle-ns = <84>;
+				atmel,tdf-ns = <16>;
+
+				nor: flash@0,0 {
+					compatible = "cfi-flash";
+					linux,mtd-name = "physmap-flash.0";
+					#address-cells = <1>;
+					#size-cells = <1>;
+					reg = <0x0 0x0 0x1000000>;
+					bank-width = <2>;
+				};
+			};
+		};
+
 		nand0: nand@60000000 {
 			nand-bus-width = <8>;
 			nand-ecc-mode = "hw";
-- 
1.9.1

[PATCH v3 11/11] ARM: at91/dt: add NOR definition in sama5d3xcm dtsi

[Boris Brezillon]

The sama5d3 evaluation kit embeds a NOR chip which is connected through
the EBI.
Define this NOR chip in the CPU module dtsi.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3xcm.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index cfcd200..92be776 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -75,6 +75,40 @@
 			};
 		};
 
+		ebi at 10000000 {
+			pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>;
+
+			cs at 0 {
+				#address-cells = <2>;
+				#size-cells = <1>;
+				ranges;
+				atmel,generic-dev;
+				atmel,read-mode = "nrd";
+				atmel,write-mode = "nwe";
+				atmel,bus-width = <16>;
+				atmel,ncs-rd-setup-ns = <0>;
+				atmel,ncs-wr-setup-ns = <0>;
+				atmel,nwe-setup-ns = <8>;
+				atmel,nrd-setup-ns = <16>;
+				atmel,ncs-rd-pulse-ns = <84>;
+				atmel,ncs-wr-pulse-ns = <84>;
+				atmel,nrd-pulse-ns = <76>;
+				atmel,nwe-pulse-ns = <76>;
+				atmel,nrd-cycle-ns = <107>;
+				atmel,nwe-cycle-ns = <84>;
+				atmel,tdf-ns = <16>;
+
+				nor: flash at 0,0 {
+					compatible = "cfi-flash";
+					linux,mtd-name = "physmap-flash.0";
+					#address-cells = <1>;
+					#size-cells = <1>;
+					reg = <0x0 0x0 0x1000000>;
+					bank-width = <2>;
+				};
+			};
+		};
+
 		nand0: nand at 60000000 {
 			nand-bus-width = <8>;
 			nand-ecc-mode = "hw";
-- 
1.9.1

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

Hi Boris,

On Monday 01 December 2014 11:27:21, Boris Brezillon wrote:
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.
> 
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  drivers/memory/Kconfig     |  11 +
>  drivers/memory/Makefile    |   1 +
>  drivers/memory/atmel-ebi.c | 627 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 639 insertions(+)
>  create mode 100644 drivers/memory/atmel-ebi.c

While I like this feature, shouldn't this driver go to drivers/bus/ like the imx-weim driver? The latter one does the same, so I wonder why one is in drivers/bus while the other is in drivers/memory.

Best regards,
Alexander
-- 
Dipl.-Inf. Alexander Stein

SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund
Tel.: 03765 38600-1156
Fax: 03765 38600-4100
Email: alexander.stein@systec-electronic.com
Website: www.systec-electronic.com
 
Managing Director: Dipl.-Phys. Siegmar Schmidt
Commercial registry: Amtsgericht Chemnitz, HRB 28082

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

Hi Boris,

On Monday 01 December 2014 11:27:21, Boris Brezillon wrote:
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.
> 
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot-dLKeG7h1OhBDOHtkgc7UlQ@public.gmane.org>
> Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
>  drivers/memory/Kconfig     |  11 +
>  drivers/memory/Makefile    |   1 +
>  drivers/memory/atmel-ebi.c | 627 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 639 insertions(+)
>  create mode 100644 drivers/memory/atmel-ebi.c

While I like this feature, shouldn't this driver go to drivers/bus/ like the imx-weim driver? The latter one does the same, so I wonder why one is in drivers/bus while the other is in drivers/memory.

Best regards,
Alexander
-- 
Dipl.-Inf. Alexander Stein

SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund
Tel.: 03765 38600-1156
Fax: 03765 38600-4100
Email: alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org
Website: www.systec-electronic.com
 
Managing Director: Dipl.-Phys. Siegmar Schmidt
Commercial registry: Amtsgericht Chemnitz, HRB 28082

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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

Hi Boris,

On Monday 01 December 2014 11:27:21, Boris Brezillon wrote:
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.
> 
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  drivers/memory/Kconfig     |  11 +
>  drivers/memory/Makefile    |   1 +
>  drivers/memory/atmel-ebi.c | 627 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 639 insertions(+)
>  create mode 100644 drivers/memory/atmel-ebi.c

While I like this feature, shouldn't this driver go to drivers/bus/ like the imx-weim driver? The latter one does the same, so I wonder why one is in drivers/bus while the other is in drivers/memory.

Best regards,
Alexander
-- 
Dipl.-Inf. Alexander Stein

SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund
Tel.: 03765 38600-1156
Fax: 03765 38600-4100
Email: alexander.stein at systec-electronic.com
Website: www.systec-electronic.com
 
Managing Director: Dipl.-Phys. Siegmar Schmidt
Commercial registry: Amtsgericht Chemnitz, HRB 28082

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Alexander,

On Mon, 01 Dec 2014 11:40:03 +0100
Alexander Stein <alexander.stein@systec-electronic.com> wrote:

> Hi Boris,
> 
> On Monday 01 December 2014 11:27:21, Boris Brezillon wrote:
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and
> > smc syscon regmaps.
> > 
> > Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > ---
> >  drivers/memory/Kconfig     |  11 +
> >  drivers/memory/Makefile    |   1 +
> >  drivers/memory/atmel-ebi.c | 627 +++++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 639 insertions(+)
> >  create mode 100644 drivers/memory/atmel-ebi.c
> 
> While I like this feature, shouldn't this driver go to drivers/bus/ like the imx-weim driver? The latter one does the same, so I wonder why one is in drivers/bus while the other is in drivers/memory.
> 

I don't have a strong opinion regarding where this driver should
live (I even considered putting it in drivers/bus) :-).
But note that there are other "external memory interface" drivers
in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).

Does anyone else think this driver should go in drivers/bus ?

Regards,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Alexander,

On Mon, 01 Dec 2014 11:40:03 +0100
Alexander Stein <alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org> wrote:

> Hi Boris,
> 
> On Monday 01 December 2014 11:27:21, Boris Brezillon wrote:
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and
> > smc syscon regmaps.
> > 
> > Signed-off-by: Jean-Jacques Hiblot <jjhiblot-dLKeG7h1OhBDOHtkgc7UlQ@public.gmane.org>
> > Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> > ---
> >  drivers/memory/Kconfig     |  11 +
> >  drivers/memory/Makefile    |   1 +
> >  drivers/memory/atmel-ebi.c | 627 +++++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 639 insertions(+)
> >  create mode 100644 drivers/memory/atmel-ebi.c
> 
> While I like this feature, shouldn't this driver go to drivers/bus/ like the imx-weim driver? The latter one does the same, so I wonder why one is in drivers/bus while the other is in drivers/memory.
> 

I don't have a strong opinion regarding where this driver should
live (I even considered putting it in drivers/bus) :-).
But note that there are other "external memory interface" drivers
in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).

Does anyone else think this driver should go in drivers/bus ?

Regards,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Alexander,

On Mon, 01 Dec 2014 11:40:03 +0100
Alexander Stein <alexander.stein@systec-electronic.com> wrote:

> Hi Boris,
> 
> On Monday 01 December 2014 11:27:21, Boris Brezillon wrote:
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and
> > smc syscon regmaps.
> > 
> > Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > ---
> >  drivers/memory/Kconfig     |  11 +
> >  drivers/memory/Makefile    |   1 +
> >  drivers/memory/atmel-ebi.c | 627 +++++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 639 insertions(+)
> >  create mode 100644 drivers/memory/atmel-ebi.c
> 
> While I like this feature, shouldn't this driver go to drivers/bus/ like the imx-weim driver? The latter one does the same, so I wonder why one is in drivers/bus while the other is in drivers/memory.
> 

I don't have a strong opinion regarding where this driver should
live (I even considered putting it in drivers/bus) :-).
But note that there are other "external memory interface" drivers
in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).

Does anyone else think this driver should go in drivers/bus ?

Regards,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 11:50:06 Boris Brezillon wrote:
> 
> I don't have a strong opinion regarding where this driver should
> live (I even considered putting it in drivers/bus) :-).
> But note that there are other "external memory interface" drivers
> in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).
> 
> Does anyone else think this driver should go in drivers/bus ?
> 

I think drivers/memory is better.

	Arnd

[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 11:50:06 Boris Brezillon wrote:
> 
> I don't have a strong opinion regarding where this driver should
> live (I even considered putting it in drivers/bus) :-).
> But note that there are other "external memory interface" drivers
> in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).
> 
> Does anyone else think this driver should go in drivers/bus ?
> 

I think drivers/memory is better.

	Arnd

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.

Nice!

> +
> +#define AT91_EBICSA_REGFIELD(soc)			\
> +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> +		  AT91_MATRIX_EBI_NUM_CS - 1)
> +
> +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> +		  0, AT91_MATRIX_EBI_NUM_CS - 1)

I don't like the use macros that concatenate symbol names like
this. Why not do either

- open-code the macro contents in the few uses, to allow
  grepping for them, or

- put the register number in the syscon reference and look it
  up from there (this would be slightly more complicated for the
  second macro)

> +
> +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> +	if (!np)
> +		return -EINVAL;
> +
> +	ebi->smc = syscon_node_to_regmap(np);
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);

I think this and the second instance of it can be shortened to

	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");


	Arnd

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.

Nice!

> +
> +#define AT91_EBICSA_REGFIELD(soc)			\
> +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> +		  AT91_MATRIX_EBI_NUM_CS - 1)
> +
> +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> +		  0, AT91_MATRIX_EBI_NUM_CS - 1)

I don't like the use macros that concatenate symbol names like
this. Why not do either

- open-code the macro contents in the few uses, to allow
  grepping for them, or

- put the register number in the syscon reference and look it
  up from there (this would be slightly more complicated for the
  second macro)

> +
> +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> +	if (!np)
> +		return -EINVAL;
> +
> +	ebi->smc = syscon_node_to_regmap(np);
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);

I think this and the second instance of it can be shortened to

	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");


	Arnd
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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.

Nice!

> +
> +#define AT91_EBICSA_REGFIELD(soc)			\
> +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> +		  AT91_MATRIX_EBI_NUM_CS - 1)
> +
> +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> +		  0, AT91_MATRIX_EBI_NUM_CS - 1)

I don't like the use macros that concatenate symbol names like
this. Why not do either

- open-code the macro contents in the few uses, to allow
  grepping for them, or

- put the register number in the syscon reference and look it
  up from there (this would be slightly more complicated for the
  second macro)

> +
> +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> +	if (!np)
> +		return -EINVAL;
> +
> +	ebi->smc = syscon_node_to_regmap(np);
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);

I think this and the second instance of it can be shortened to

	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");


	Arnd

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Arnd,

On Mon, 01 Dec 2014 17:26:27 +0100
Arnd Bergmann <arnd@arndb.de> wrote:

> On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and
> > smc syscon regmaps.
> 
> Nice!
> 
> > +
> > +#define AT91_EBICSA_REGFIELD(soc)			\
> > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > +
> > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> 
> I don't like the use macros that concatenate symbol names like
> this. Why not do either
> 
> - open-code the macro contents in the few uses, to allow
>   grepping for them, or

I'm not sure to get this one, are you suggesting to do something like
this:

#define AT91_EBICSA_REGFIELD(off)			\
	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)

> 
> - put the register number in the syscon reference and look it
>   up from there (this would be slightly more complicated for the
>   second macro)

I've told several times not to encode register offsets or register ids
in the DT :-) (and if I'm not mistaken that's what you're suggesting
here).

> 
> > +
> > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > +	if (!np)
> > +		return -EINVAL;
> > +
> > +	ebi->smc = syscon_node_to_regmap(np);
> > +	if (IS_ERR(ebi->smc))
> > +		return PTR_ERR(ebi->smc);
> 
> I think this and the second instance of it can be shortened to
> 
> 	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");

Sure.

Regards,

Boris


-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Arnd,

On Mon, 01 Dec 2014 17:26:27 +0100
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> wrote:

> On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and
> > smc syscon regmaps.
> 
> Nice!
> 
> > +
> > +#define AT91_EBICSA_REGFIELD(soc)			\
> > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > +
> > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> 
> I don't like the use macros that concatenate symbol names like
> this. Why not do either
> 
> - open-code the macro contents in the few uses, to allow
>   grepping for them, or

I'm not sure to get this one, are you suggesting to do something like
this:

#define AT91_EBICSA_REGFIELD(off)			\
	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)

> 
> - put the register number in the syscon reference and look it
>   up from there (this would be slightly more complicated for the
>   second macro)

I've told several times not to encode register offsets or register ids
in the DT :-) (and if I'm not mistaken that's what you're suggesting
here).

> 
> > +
> > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > +	if (!np)
> > +		return -EINVAL;
> > +
> > +	ebi->smc = syscon_node_to_regmap(np);
> > +	if (IS_ERR(ebi->smc))
> > +		return PTR_ERR(ebi->smc);
> 
> I think this and the second instance of it can be shortened to
> 
> 	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");

Sure.

Regards,

Boris


-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Arnd,

On Mon, 01 Dec 2014 17:26:27 +0100
Arnd Bergmann <arnd@arndb.de> wrote:

> On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and
> > smc syscon regmaps.
> 
> Nice!
> 
> > +
> > +#define AT91_EBICSA_REGFIELD(soc)			\
> > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > +
> > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> 
> I don't like the use macros that concatenate symbol names like
> this. Why not do either
> 
> - open-code the macro contents in the few uses, to allow
>   grepping for them, or

I'm not sure to get this one, are you suggesting to do something like
this:

#define AT91_EBICSA_REGFIELD(off)			\
	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)

> 
> - put the register number in the syscon reference and look it
>   up from there (this would be slightly more complicated for the
>   second macro)

I've told several times not to encode register offsets or register ids
in the DT :-) (and if I'm not mistaken that's what you're suggesting
here).

> 
> > +
> > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > +	if (!np)
> > +		return -EINVAL;
> > +
> > +	ebi->smc = syscon_node_to_regmap(np);
> > +	if (IS_ERR(ebi->smc))
> > +		return PTR_ERR(ebi->smc);
> 
> I think this and the second instance of it can be shortened to
> 
> 	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");

Sure.

Regards,

Boris


-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 19:29:23 Boris Brezillon wrote:
> Hi Arnd,
> 
> On Mon, 01 Dec 2014 17:26:27 +0100
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > > The EBI (External Bus Interface) is used to access external peripherals
> > > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > > Each device is assigned a CS line and an address range and can have its
> > > own configuration (timings, access mode, bus width, ...).
> > > This driver provides a generic DT binding to configure a device according
> > > to its requirements.
> > > For specific device controllers (like the NAND one) the SMC timings
> > > should be configured by the controller driver through the matrix and
> > > smc syscon regmaps.
> > 
> > Nice!
> > 
> > > +
> > > +#define AT91_EBICSA_REGFIELD(soc)			\
> > > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > > +
> > > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> > 
> > I don't like the use macros that concatenate symbol names like
> > this. Why not do either
> > 
> > - open-code the macro contents in the few uses, to allow
> >   grepping for them, or
> 
> I'm not sure to get this one, are you suggesting to do something like
> this:
> 
> #define AT91_EBICSA_REGFIELD(off)			\
> 	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)
> 

That would be acceptable too, but what I really meant is one step further:

static const struct reg_field at91sam9260_ebi_csa = 
	REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0, AT91_MATRIX_EBI_NUM_CS - 1);

> > - put the register number in the syscon reference and look it
> >   up from there (this would be slightly more complicated for the
> >   second macro)
> 
> I've told several times not to encode register offsets or register ids
> in the DT :-) (and if I'm not mistaken that's what you're suggesting
> here).

I think it's actually fine for syscon references, although in general
I would agree with that. The difference in my opinion is that syscon
by nature is a set of registers.

	Arnd

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 19:29:23 Boris Brezillon wrote:
> Hi Arnd,
> 
> On Mon, 01 Dec 2014 17:26:27 +0100
> Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> wrote:
> 
> > On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > > The EBI (External Bus Interface) is used to access external peripherals
> > > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > > Each device is assigned a CS line and an address range and can have its
> > > own configuration (timings, access mode, bus width, ...).
> > > This driver provides a generic DT binding to configure a device according
> > > to its requirements.
> > > For specific device controllers (like the NAND one) the SMC timings
> > > should be configured by the controller driver through the matrix and
> > > smc syscon regmaps.
> > 
> > Nice!
> > 
> > > +
> > > +#define AT91_EBICSA_REGFIELD(soc)			\
> > > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > > +
> > > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> > 
> > I don't like the use macros that concatenate symbol names like
> > this. Why not do either
> > 
> > - open-code the macro contents in the few uses, to allow
> >   grepping for them, or
> 
> I'm not sure to get this one, are you suggesting to do something like
> this:
> 
> #define AT91_EBICSA_REGFIELD(off)			\
> 	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)
> 

That would be acceptable too, but what I really meant is one step further:

static const struct reg_field at91sam9260_ebi_csa = 
	REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0, AT91_MATRIX_EBI_NUM_CS - 1);

> > - put the register number in the syscon reference and look it
> >   up from there (this would be slightly more complicated for the
> >   second macro)
> 
> I've told several times not to encode register offsets or register ids
> in the DT :-) (and if I'm not mistaken that's what you're suggesting
> here).

I think it's actually fine for syscon references, although in general
I would agree with that. The difference in my opinion is that syscon
by nature is a set of registers.

	Arnd
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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 19:29:23 Boris Brezillon wrote:
> Hi Arnd,
> 
> On Mon, 01 Dec 2014 17:26:27 +0100
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > > The EBI (External Bus Interface) is used to access external peripherals
> > > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > > Each device is assigned a CS line and an address range and can have its
> > > own configuration (timings, access mode, bus width, ...).
> > > This driver provides a generic DT binding to configure a device according
> > > to its requirements.
> > > For specific device controllers (like the NAND one) the SMC timings
> > > should be configured by the controller driver through the matrix and
> > > smc syscon regmaps.
> > 
> > Nice!
> > 
> > > +
> > > +#define AT91_EBICSA_REGFIELD(soc)			\
> > > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > > +
> > > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> > 
> > I don't like the use macros that concatenate symbol names like
> > this. Why not do either
> > 
> > - open-code the macro contents in the few uses, to allow
> >   grepping for them, or
> 
> I'm not sure to get this one, are you suggesting to do something like
> this:
> 
> #define AT91_EBICSA_REGFIELD(off)			\
> 	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)
> 

That would be acceptable too, but what I really meant is one step further:

static const struct reg_field at91sam9260_ebi_csa = 
	REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0, AT91_MATRIX_EBI_NUM_CS - 1);

> > - put the register number in the syscon reference and look it
> >   up from there (this would be slightly more complicated for the
> >   second macro)
> 
> I've told several times not to encode register offsets or register ids
> in the DT :-) (and if I'm not mistaken that's what you're suggesting
> here).

I think it's actually fine for syscon references, although in general
I would agree with that. The difference in my opinion is that syscon
by nature is a set of registers.

	Arnd

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

On Mon, 01 Dec 2014 20:43:31 +0100
Arnd Bergmann <arnd@arndb.de> wrote:

> On Monday 01 December 2014 19:29:23 Boris Brezillon wrote:
> > Hi Arnd,
> > 
> > On Mon, 01 Dec 2014 17:26:27 +0100
> > Arnd Bergmann <arnd@arndb.de> wrote:
> > 
> > > On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > > > The EBI (External Bus Interface) is used to access external peripherals
> > > > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > > > Each device is assigned a CS line and an address range and can have its
> > > > own configuration (timings, access mode, bus width, ...).
> > > > This driver provides a generic DT binding to configure a device according
> > > > to its requirements.
> > > > For specific device controllers (like the NAND one) the SMC timings
> > > > should be configured by the controller driver through the matrix and
> > > > smc syscon regmaps.
> > > 
> > > Nice!
> > > 
> > > > +
> > > > +#define AT91_EBICSA_REGFIELD(soc)			\
> > > > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > > > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > > > +
> > > > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > > > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > > > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> > > 
> > > I don't like the use macros that concatenate symbol names like
> > > this. Why not do either
> > > 
> > > - open-code the macro contents in the few uses, to allow
> > >   grepping for them, or
> > 
> > I'm not sure to get this one, are you suggesting to do something like
> > this:
> > 
> > #define AT91_EBICSA_REGFIELD(off)			\
> > 	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)
> > 
> 
> That would be acceptable too, but what I really meant is one step further:
> 
> static const struct reg_field at91sam9260_ebi_csa = 
> 	REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0, AT91_MATRIX_EBI_NUM_CS - 1);

That's what I did in the first place (in a version I didn't submitted),
and I guess I'll go for that one unless you really prefer the
alternative (I ran into a lot of trouble with DT bindings ABI
stability, and I'd prefer to keep DT bindings as simple as
possible).

> 
> > > - put the register number in the syscon reference and look it
> > >   up from there (this would be slightly more complicated for the
> > >   second macro)
> > 
> > I've told several times not to encode register offsets or register ids

    ^ "I've been told" :-).

> > in the DT :-) (and if I'm not mistaken that's what you're suggesting
> > here).
> 
> I think it's actually fine for syscon references, although in general
> I would agree with that. The difference in my opinion is that syscon
> by nature is a set of registers.

Okay, good to know.



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

On Mon, 01 Dec 2014 20:43:31 +0100
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> wrote:

> On Monday 01 December 2014 19:29:23 Boris Brezillon wrote:
> > Hi Arnd,
> > 
> > On Mon, 01 Dec 2014 17:26:27 +0100
> > Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> wrote:
> > 
> > > On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > > > The EBI (External Bus Interface) is used to access external peripherals
> > > > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > > > Each device is assigned a CS line and an address range and can have its
> > > > own configuration (timings, access mode, bus width, ...).
> > > > This driver provides a generic DT binding to configure a device according
> > > > to its requirements.
> > > > For specific device controllers (like the NAND one) the SMC timings
> > > > should be configured by the controller driver through the matrix and
> > > > smc syscon regmaps.
> > > 
> > > Nice!
> > > 
> > > > +
> > > > +#define AT91_EBICSA_REGFIELD(soc)			\
> > > > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > > > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > > > +
> > > > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > > > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > > > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> > > 
> > > I don't like the use macros that concatenate symbol names like
> > > this. Why not do either
> > > 
> > > - open-code the macro contents in the few uses, to allow
> > >   grepping for them, or
> > 
> > I'm not sure to get this one, are you suggesting to do something like
> > this:
> > 
> > #define AT91_EBICSA_REGFIELD(off)			\
> > 	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)
> > 
> 
> That would be acceptable too, but what I really meant is one step further:
> 
> static const struct reg_field at91sam9260_ebi_csa = 
> 	REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0, AT91_MATRIX_EBI_NUM_CS - 1);

That's what I did in the first place (in a version I didn't submitted),
and I guess I'll go for that one unless you really prefer the
alternative (I ran into a lot of trouble with DT bindings ABI
stability, and I'd prefer to keep DT bindings as simple as
possible).

> 
> > > - put the register number in the syscon reference and look it
> > >   up from there (this would be slightly more complicated for the
> > >   second macro)
> > 
> > I've told several times not to encode register offsets or register ids

    ^ "I've been told" :-).

> > in the DT :-) (and if I'm not mistaken that's what you're suggesting
> > here).
> 
> I think it's actually fine for syscon references, although in general
> I would agree with that. The difference in my opinion is that syscon
> by nature is a set of registers.

Okay, good to know.



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

On Mon, 01 Dec 2014 20:43:31 +0100
Arnd Bergmann <arnd@arndb.de> wrote:

> On Monday 01 December 2014 19:29:23 Boris Brezillon wrote:
> > Hi Arnd,
> > 
> > On Mon, 01 Dec 2014 17:26:27 +0100
> > Arnd Bergmann <arnd@arndb.de> wrote:
> > 
> > > On Monday 01 December 2014 11:27:21 Boris Brezillon wrote:
> > > > The EBI (External Bus Interface) is used to access external peripherals
> > > > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > > > Each device is assigned a CS line and an address range and can have its
> > > > own configuration (timings, access mode, bus width, ...).
> > > > This driver provides a generic DT binding to configure a device according
> > > > to its requirements.
> > > > For specific device controllers (like the NAND one) the SMC timings
> > > > should be configured by the controller driver through the matrix and
> > > > smc syscon regmaps.
> > > 
> > > Nice!
> > > 
> > > > +
> > > > +#define AT91_EBICSA_REGFIELD(soc)			\
> > > > +	REG_FIELD(soc ## _MATRIX_EBICSA_OFF, 0,		\
> > > > +		  AT91_MATRIX_EBI_NUM_CS - 1)
> > > > +
> > > > +#define AT91_MULTI_EBICSA_REGFIELD(soc, n)		\
> > > > +	REG_FIELD(soc ## _MATRIX_EBI ## n ## CSA_OFF,	\
> > > > +		  0, AT91_MATRIX_EBI_NUM_CS - 1)
> > > 
> > > I don't like the use macros that concatenate symbol names like
> > > this. Why not do either
> > > 
> > > - open-code the macro contents in the few uses, to allow
> > >   grepping for them, or
> > 
> > I'm not sure to get this one, are you suggesting to do something like
> > this:
> > 
> > #define AT91_EBICSA_REGFIELD(off)			\
> > 	REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)
> > 
> 
> That would be acceptable too, but what I really meant is one step further:
> 
> static const struct reg_field at91sam9260_ebi_csa = 
> 	REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0, AT91_MATRIX_EBI_NUM_CS - 1);

That's what I did in the first place (in a version I didn't submitted),
and I guess I'll go for that one unless you really prefer the
alternative (I ran into a lot of trouble with DT bindings ABI
stability, and I'd prefer to keep DT bindings as simple as
possible).

> 
> > > - put the register number in the syscon reference and look it
> > >   up from there (this would be slightly more complicated for the
> > >   second macro)
> > 
> > I've told several times not to encode register offsets or register ids

    ^ "I've been told" :-).

> > in the DT :-) (and if I'm not mistaken that's what you're suggesting
> > here).
> 
> I think it's actually fine for syscon references, although in general
> I would agree with that. The difference in my opinion is that syscon
> by nature is a set of registers.

Okay, good to know.



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 21:28:20 Boris Brezillon wrote:
> > On Monday 01 December 2014 19:29:23 Boris Brezillon wrote:
> > > On Mon, 01 Dec 2014 17:26:27 +0100 Arnd Bergmann <arnd@arndb.de> wrote:
> > > 
> > > #define AT91_EBICSA_REGFIELD(off)                   \
> > >     REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)
> > > 
> > 
> > That would be acceptable too, but what I really meant is one step further:
> > 
> > static const struct reg_field at91sam9260_ebi_csa = 
> >       REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0, AT91_MATRIX_EBI_NUM_CS - 1);
> 
> That's what I did in the first place (in a version I didn't submitted),
> and I guess I'll go for that one unless you really prefer the
> alternative (I ran into a lot of trouble with DT bindings ABI
> stability, and I'd prefer to keep DT bindings as simple as
> possible).

Ok, that's good then.

	Arnd

[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Monday 01 December 2014 21:28:20 Boris Brezillon wrote:
> > On Monday 01 December 2014 19:29:23 Boris Brezillon wrote:
> > > On Mon, 01 Dec 2014 17:26:27 +0100 Arnd Bergmann <arnd@arndb.de> wrote:
> > > 
> > > #define AT91_EBICSA_REGFIELD(off)                   \
> > >     REG_FIELD(ebicsa_off, AT91_MATRIX_EBI_NUM_CS - 1)
> > > 
> > 
> > That would be acceptable too, but what I really meant is one step further:
> > 
> > static const struct reg_field at91sam9260_ebi_csa = 
> >       REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0, AT91_MATRIX_EBI_NUM_CS - 1);
> 
> That's what I did in the first place (in a version I didn't submitted),
> and I guess I'll go for that one unless you really prefer the
> alternative (I ran into a lot of trouble with DT bindings ABI
> stability, and I'd prefer to keep DT bindings as simple as
> possible).

Ok, that's good then.

	Arnd

[PATCH v4 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and
smc syscon regmaps.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---

Changes since v3:
 - use syscon_regmap_lookup_by_phandle instead of of_parse_phandle +
   syscon_node_to_regmap
 - drop AT91_EBICSA_REGFIELD and AT91_MULTI_EBICSA_REGFIELD macros

 drivers/memory/Kconfig     |  11 +
 drivers/memory/Makefile    |   1 +
 drivers/memory/atmel-ebi.c | 618 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 630 insertions(+)
 create mode 100644 drivers/memory/atmel-ebi.c

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 6d91c27..dfe24a2 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -17,6 +17,17 @@ config ATMEL_SDRAMC
 	  Starting with the at91sam9g45, this controller supports SDR, DDR and
 	  LP-DDR memories.
 
+config ATMEL_EBI
+	bool "Atmel EBI driver"
+	default y
+	depends on ARCH_AT91 && OF
+	select MFD_SYSCON
+	help
+	  Driver for Atmel EBI controller.
+	  Used to configure the EBI (external bus interface) when the device-
+	  tree is used. This bus supports NANDs, external ethernet controller,
+	  SRAMs, ATA devices, etc.
+
 config TI_AEMIF
 	tristate "Texas Instruments AEMIF driver"
 	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index c32d319..7ca2c19 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
 obj-$(CONFIG_OF)		+= of_memory.o
 endif
 obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o
+obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o
 obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o
 obj-$(CONFIG_TI_EMIF)		+= emif.o
 obj-$(CONFIG_FSL_CORENET_CF)	+= fsl-corenet-cf.o
diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
new file mode 100644
index 0000000..8702694
--- /dev/null
+++ b/drivers/memory/atmel-ebi.c
@@ -0,0 +1,618 @@
+/*
+ * EBI driver for Atmel SAM9 chips
+ * inspired by the fsl weim bus driver
+ *
+ * Copyright (C) 2013 JJ Hiblot.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-matrix.h>
+#include <linux/mfd/syscon/atmel-smc.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+
+struct at91sam9_smc_timings {
+	u32 ncs_rd_setup_ns;
+	u32 nrd_setup_ns;
+	u32 ncs_wr_setup_ns;
+	u32 nwe_setup_ns;
+	u32 ncs_rd_pulse_ns;
+	u32 nrd_pulse_ns;
+	u32 ncs_wr_pulse_ns;
+	u32 nwe_pulse_ns;
+	u32 nrd_cycle_ns;
+	u32 nwe_cycle_ns;
+	u32 tdf_ns;
+};
+
+struct at91sam9_smc_generic_fields {
+	struct regmap_field *setup;
+	struct regmap_field *pulse;
+	struct regmap_field *cycle;
+	struct regmap_field *mode;
+};
+
+struct at91sam9_ebi_dev_config {
+	struct at91sam9_smc_timings timings;
+	u32 mode;
+};
+
+struct at91_ebi;
+
+struct at91_ebi_dev {
+	struct device_node *np;
+	struct at91_smc_timings *timings;
+	struct at91_ebi *ebi;
+	u32 mode;
+	int cs;
+	void *config;
+};
+
+struct at91_ebi_caps {
+	unsigned int available_cs;
+	const struct reg_field *ebi_csa;
+	int (*xlate_config)(struct at91_ebi_dev *ebid);
+	int (*apply_config)(struct at91_ebi_dev *ebid);
+	int (*init)(struct at91_ebi *ebi);
+};
+
+struct at91_ebi {
+	struct clk *clk;
+	struct regmap *smc;
+	struct regmap *matrix;
+
+	struct regmap_field *ebi_csa;
+
+	struct device *dev;
+	const struct at91_ebi_caps *caps;
+	struct at91_ebi_dev *devs[AT91_MATRIX_EBI_NUM_CS];
+	void *priv;
+};
+
+static u32 at91sam9_smc_setup_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 32) {
+		coded_cycles |= 1 << 5;
+		if (cycles < 128)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 32;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_pulse_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 64) {
+		coded_cycles |= 1 << 6;
+		if (cycles < 256)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 64;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_cycle_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 128) {
+		coded_cycles = cycles / 256;
+		cycles %= 256;
+		if (cycles >= 128) {
+			coded_cycles++;
+			cycles = 0;
+		}
+
+		if (coded_cycles > 0x3) {
+			coded_cycles = 0x3;
+			cycles = 0x7f;
+		}
+
+		coded_cycles <<= 7;
+	}
+
+	coded_cycles |= cycles % 128;
+
+	return coded_cycles;
+}
+
+static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid)
+{
+	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings = &config->timings;
+	struct at91sam9_smc_generic_fields *fields = ebid->ebi->priv;
+	u32 val;
+
+	val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_setup_ns) << 24;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nrd_setup_ns) << 16;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_setup_ns) << 8;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nwe_setup_ns);
+	regmap_fields_write(fields->setup, ebid->cs, val);
+
+	val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_pulse_ns) << 24;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nrd_pulse_ns) << 16;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_pulse_ns) << 8;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nwe_pulse_ns);
+	regmap_fields_write(fields->pulse, ebid->cs, val);
+
+	val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					      timings->nrd_cycle_ns) << 16;
+	val |= at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					       timings->nwe_cycle_ns);
+	regmap_fields_write(fields->cycle, ebid->cs, val);
+
+	val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
+	if (val > 16)
+		val = 16;
+	regmap_fields_write(fields->mode, ebid->cs, config->mode | val << 16);
+
+	return 0;
+}
+
+static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings;
+	struct device_node *np = ebid->np;
+
+	timings = &config->timings;
+
+	of_property_read_u32(np, "atmel,ncs-rd-setup-ns",
+			     &timings->ncs_rd_setup_ns);
+	of_property_read_u32(np, "atmel,nrd-setup-ns",
+			     &timings->nrd_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-setup-ns",
+			     &timings->ncs_wr_setup_ns);
+	of_property_read_u32(np, "atmel,nwe-setup-ns",
+			     &timings->nwe_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-rd-pulse-ns",
+			     &timings->ncs_rd_pulse_ns);
+	of_property_read_u32(np, "atmel,nrd-pulse-ns",
+			     &timings->nrd_pulse_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-pulse-ns",
+			     &timings->ncs_wr_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-pulse-ns", &timings->nwe_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-cycle-ns", &timings->nwe_cycle_ns);
+	of_property_read_u32(np, "atmel,nrd-cycle-ns", &timings->nrd_cycle_ns);
+	of_property_read_u32(np, "atmel,tdf-ns", &timings->tdf_ns);
+
+	return 0;
+}
+
+static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct device_node *np = ebid->np;
+	const char *tmp_str;
+	u32 tmp;
+	int ret;
+
+	config = devm_kzalloc(ebid->ebi->dev, sizeof(*config), GFP_KERNEL);
+	if (!config)
+		return -ENOMEM;
+
+	ebid->config = config;
+
+	ret = of_property_read_u32(np, "atmel,bus-width", &tmp);
+	if (ret)
+		return ret;
+
+	switch (tmp) {
+	case 8:
+		config->mode |= AT91_SMC_DBW_8;
+		break;
+
+	case 16:
+		config->mode |= AT91_SMC_DBW_16;
+		break;
+
+	case 32:
+		config->mode |= AT91_SMC_DBW_32;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	if (of_property_read_bool(np, "atmel,tdf-optimized"))
+		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,byte-access-type", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "write"))
+		config->mode |= AT91_SMC_BAT_WRITE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,read-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nrd"))
+		config->mode |= AT91_SMC_READMODE_NRD;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,write-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nwe"))
+		config->mode |= AT91_SMC_WRITEMODE_NWE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,exnw-mode", &tmp_str);
+	if (tmp_str) {
+		if (!strcmp(tmp_str, "frozen"))
+			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
+		else if (!strcmp(tmp_str, "ready"))
+			config->mode |= AT91_SMC_EXNWMODE_READY;
+	}
+
+	tmp = 0;
+	ret = of_property_read_u32(np, "atmel,page-mode", &tmp);
+	if (!ret) {
+		switch (tmp) {
+		case 4:
+			config->mode |= AT91_SMC_PS_4;
+			break;
+
+		case 8:
+			config->mode |= AT91_SMC_PS_8;
+			break;
+
+		case 16:
+			config->mode |= AT91_SMC_PS_16;
+			break;
+
+		case 32:
+			config->mode |= AT91_SMC_PS_32;
+			break;
+
+		default:
+			return -EINVAL;
+		}
+
+		config->mode |= AT91_SMC_PMEN;
+	}
+
+	return at91sam9_smc_xslate_timings(ebid);
+}
+
+static int at91sam9_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = 0x10;
+
+	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int sama5d3_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
+
+	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np)
+{
+	struct device *dev = ebi->dev;
+	struct device_node *dev_np;
+	struct at91_ebi_dev *ebid;
+	u32 tmp;
+	int ret;
+
+	dev_np = of_get_next_child(np, NULL);
+	if (!dev_np)
+		return -EINVAL;
+
+	if (!of_device_is_available(dev_np))
+		return 0;
+
+	ebid = devm_kzalloc(ebi->dev, sizeof(*ebid), GFP_KERNEL);
+	if (!ebid)
+		return -ENOMEM;
+
+	ret = of_property_read_u32(dev_np, "reg" , &tmp);
+	if (ret < 0) {
+		dev_err(dev, "missing mandatory reg property\n");
+		return ret;
+	}
+
+	if (tmp > AT91_MATRIX_EBI_NUM_CS ||
+	    !(BIT(tmp) & ebi->caps->available_cs)) {
+		dev_err(dev, "invalid reg property\n");
+		return -EINVAL;
+	}
+
+	ebid->cs = tmp;
+	ebid->np = np;
+	ebid->ebi = ebi;
+
+	if (!of_property_read_bool(np, "atmel,generic-dev"))
+		goto populate;
+
+	if (ebid->ebi->ebi_csa)
+		regmap_field_update_bits(ebid->ebi->ebi_csa,
+					 BIT(ebid->cs),
+					 ~BIT(ebid->cs));
+
+	ret = ebid->ebi->caps->xlate_config(ebid);
+	if (ret)
+		return ret;
+
+	ret = ebid->ebi->caps->apply_config(ebid);
+	if (ret)
+		return ret;
+	ebi->devs[ebid->cs] = ebid;
+
+populate:
+	return of_platform_populate(np, of_default_bus_match_table, NULL, dev);
+}
+
+static const struct reg_field at91sam9260_ebi_csa =
+				REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9260_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9260_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9261_ebi_csa =
+				REG_FIELD(AT91SAM9261_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9261_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9261_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi0_csa =
+				REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi1_csa =
+				REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
+	.available_cs = 0x7,
+	.ebi_csa = &at91sam9263_ebi1_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9g45_ebi_csa =
+				REG_FIELD(AT91SAM9G45_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9g45_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps sama5d3_ebi_caps = {
+	.available_cs = 0xf,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = sama5d3_ebi_init,
+};
+
+static const struct of_device_id at91_ebi_id_table[] = {
+	{
+		.compatible = "atmel,at91sam9260-ebi",
+		.data = &at91sam9260_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9261-ebi",
+		.data = &at91sam9261_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi0",
+		.data = &at91sam9263_ebi0_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi1",
+		.data = &at91sam9263_ebi1_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9g45-ebi",
+		.data = &at91sam9g45_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9x5-ebi",
+		.data = &at91sam9x5_ebi_caps,
+	},
+	{
+		.compatible = "atmel,sama5d3-ebi",
+		.data = &sama5d3_ebi_caps,
+	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, at91_ebi_id_table);
+
+static int at91_ebi_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *match;
+	struct device_node *child;
+	struct at91_ebi *ebi;
+	struct clk *clk;
+	int ret;
+
+	match = of_match_device(at91_ebi_id_table, &pdev->dev);
+	if (!match || !match->data)
+		return -EINVAL;
+
+	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
+	if (!ebi)
+		return -ENOMEM;
+
+	ebi->caps = match->data;
+	ebi->dev = &pdev->dev;
+
+	clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	ebi->clk = clk;
+
+	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+						   "atmel,smc");
+	if (IS_ERR(ebi->smc))
+		return PTR_ERR(ebi->smc);
+
+	/*
+	 * The sama5d3 does not provide an EBICSA register and thus does need
+	 * to access the matrix registers.
+	 */
+	if (ebi->caps->ebi_csa) {
+		ebi->matrix =
+			syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+							"atmel,matrix");
+		if (IS_ERR(ebi->matrix))
+			return PTR_ERR(ebi->matrix);
+
+		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
+						  *ebi->caps->ebi_csa);
+		if (IS_ERR(ebi->ebi_csa))
+			return PTR_ERR(ebi->ebi_csa);
+	}
+
+	ret = ebi->caps->init(ebi);
+	if (ret)
+		return ret;
+
+	for_each_child_of_node(pdev->dev.of_node, child) {
+		ret = at91_ebi_dev_setup(ebi, child);
+		if (ret)
+			return ret;
+	}
+
+	return ret;
+}
+
+static struct platform_driver at91_ebi_driver = {
+	.driver = {
+		.name = "atmel-ebi",
+		.of_match_table	= at91_ebi_id_table,
+	},
+};
+module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
+
+MODULE_AUTHOR("JJ Hiblot");
+MODULE_DESCRIPTION("Atmel's EBI driver");
+MODULE_LICENSE("GPL");
-- 
1.9.1

[PATCH v4 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and
smc syscon regmaps.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot-dLKeG7h1OhBDOHtkgc7UlQ@public.gmane.org>
Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---

Changes since v3:
 - use syscon_regmap_lookup_by_phandle instead of of_parse_phandle +
   syscon_node_to_regmap
 - drop AT91_EBICSA_REGFIELD and AT91_MULTI_EBICSA_REGFIELD macros

 drivers/memory/Kconfig     |  11 +
 drivers/memory/Makefile    |   1 +
 drivers/memory/atmel-ebi.c | 618 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 630 insertions(+)
 create mode 100644 drivers/memory/atmel-ebi.c

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 6d91c27..dfe24a2 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -17,6 +17,17 @@ config ATMEL_SDRAMC
 	  Starting with the at91sam9g45, this controller supports SDR, DDR and
 	  LP-DDR memories.
 
+config ATMEL_EBI
+	bool "Atmel EBI driver"
+	default y
+	depends on ARCH_AT91 && OF
+	select MFD_SYSCON
+	help
+	  Driver for Atmel EBI controller.
+	  Used to configure the EBI (external bus interface) when the device-
+	  tree is used. This bus supports NANDs, external ethernet controller,
+	  SRAMs, ATA devices, etc.
+
 config TI_AEMIF
 	tristate "Texas Instruments AEMIF driver"
 	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index c32d319..7ca2c19 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
 obj-$(CONFIG_OF)		+= of_memory.o
 endif
 obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o
+obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o
 obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o
 obj-$(CONFIG_TI_EMIF)		+= emif.o
 obj-$(CONFIG_FSL_CORENET_CF)	+= fsl-corenet-cf.o
diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
new file mode 100644
index 0000000..8702694
--- /dev/null
+++ b/drivers/memory/atmel-ebi.c
@@ -0,0 +1,618 @@
+/*
+ * EBI driver for Atmel SAM9 chips
+ * inspired by the fsl weim bus driver
+ *
+ * Copyright (C) 2013 JJ Hiblot.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-matrix.h>
+#include <linux/mfd/syscon/atmel-smc.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+
+struct at91sam9_smc_timings {
+	u32 ncs_rd_setup_ns;
+	u32 nrd_setup_ns;
+	u32 ncs_wr_setup_ns;
+	u32 nwe_setup_ns;
+	u32 ncs_rd_pulse_ns;
+	u32 nrd_pulse_ns;
+	u32 ncs_wr_pulse_ns;
+	u32 nwe_pulse_ns;
+	u32 nrd_cycle_ns;
+	u32 nwe_cycle_ns;
+	u32 tdf_ns;
+};
+
+struct at91sam9_smc_generic_fields {
+	struct regmap_field *setup;
+	struct regmap_field *pulse;
+	struct regmap_field *cycle;
+	struct regmap_field *mode;
+};
+
+struct at91sam9_ebi_dev_config {
+	struct at91sam9_smc_timings timings;
+	u32 mode;
+};
+
+struct at91_ebi;
+
+struct at91_ebi_dev {
+	struct device_node *np;
+	struct at91_smc_timings *timings;
+	struct at91_ebi *ebi;
+	u32 mode;
+	int cs;
+	void *config;
+};
+
+struct at91_ebi_caps {
+	unsigned int available_cs;
+	const struct reg_field *ebi_csa;
+	int (*xlate_config)(struct at91_ebi_dev *ebid);
+	int (*apply_config)(struct at91_ebi_dev *ebid);
+	int (*init)(struct at91_ebi *ebi);
+};
+
+struct at91_ebi {
+	struct clk *clk;
+	struct regmap *smc;
+	struct regmap *matrix;
+
+	struct regmap_field *ebi_csa;
+
+	struct device *dev;
+	const struct at91_ebi_caps *caps;
+	struct at91_ebi_dev *devs[AT91_MATRIX_EBI_NUM_CS];
+	void *priv;
+};
+
+static u32 at91sam9_smc_setup_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 32) {
+		coded_cycles |= 1 << 5;
+		if (cycles < 128)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 32;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_pulse_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 64) {
+		coded_cycles |= 1 << 6;
+		if (cycles < 256)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 64;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_cycle_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 128) {
+		coded_cycles = cycles / 256;
+		cycles %= 256;
+		if (cycles >= 128) {
+			coded_cycles++;
+			cycles = 0;
+		}
+
+		if (coded_cycles > 0x3) {
+			coded_cycles = 0x3;
+			cycles = 0x7f;
+		}
+
+		coded_cycles <<= 7;
+	}
+
+	coded_cycles |= cycles % 128;
+
+	return coded_cycles;
+}
+
+static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid)
+{
+	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings = &config->timings;
+	struct at91sam9_smc_generic_fields *fields = ebid->ebi->priv;
+	u32 val;
+
+	val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_setup_ns) << 24;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nrd_setup_ns) << 16;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_setup_ns) << 8;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nwe_setup_ns);
+	regmap_fields_write(fields->setup, ebid->cs, val);
+
+	val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_pulse_ns) << 24;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nrd_pulse_ns) << 16;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_pulse_ns) << 8;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nwe_pulse_ns);
+	regmap_fields_write(fields->pulse, ebid->cs, val);
+
+	val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					      timings->nrd_cycle_ns) << 16;
+	val |= at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					       timings->nwe_cycle_ns);
+	regmap_fields_write(fields->cycle, ebid->cs, val);
+
+	val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
+	if (val > 16)
+		val = 16;
+	regmap_fields_write(fields->mode, ebid->cs, config->mode | val << 16);
+
+	return 0;
+}
+
+static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings;
+	struct device_node *np = ebid->np;
+
+	timings = &config->timings;
+
+	of_property_read_u32(np, "atmel,ncs-rd-setup-ns",
+			     &timings->ncs_rd_setup_ns);
+	of_property_read_u32(np, "atmel,nrd-setup-ns",
+			     &timings->nrd_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-setup-ns",
+			     &timings->ncs_wr_setup_ns);
+	of_property_read_u32(np, "atmel,nwe-setup-ns",
+			     &timings->nwe_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-rd-pulse-ns",
+			     &timings->ncs_rd_pulse_ns);
+	of_property_read_u32(np, "atmel,nrd-pulse-ns",
+			     &timings->nrd_pulse_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-pulse-ns",
+			     &timings->ncs_wr_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-pulse-ns", &timings->nwe_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-cycle-ns", &timings->nwe_cycle_ns);
+	of_property_read_u32(np, "atmel,nrd-cycle-ns", &timings->nrd_cycle_ns);
+	of_property_read_u32(np, "atmel,tdf-ns", &timings->tdf_ns);
+
+	return 0;
+}
+
+static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct device_node *np = ebid->np;
+	const char *tmp_str;
+	u32 tmp;
+	int ret;
+
+	config = devm_kzalloc(ebid->ebi->dev, sizeof(*config), GFP_KERNEL);
+	if (!config)
+		return -ENOMEM;
+
+	ebid->config = config;
+
+	ret = of_property_read_u32(np, "atmel,bus-width", &tmp);
+	if (ret)
+		return ret;
+
+	switch (tmp) {
+	case 8:
+		config->mode |= AT91_SMC_DBW_8;
+		break;
+
+	case 16:
+		config->mode |= AT91_SMC_DBW_16;
+		break;
+
+	case 32:
+		config->mode |= AT91_SMC_DBW_32;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	if (of_property_read_bool(np, "atmel,tdf-optimized"))
+		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,byte-access-type", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "write"))
+		config->mode |= AT91_SMC_BAT_WRITE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,read-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nrd"))
+		config->mode |= AT91_SMC_READMODE_NRD;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,write-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nwe"))
+		config->mode |= AT91_SMC_WRITEMODE_NWE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,exnw-mode", &tmp_str);
+	if (tmp_str) {
+		if (!strcmp(tmp_str, "frozen"))
+			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
+		else if (!strcmp(tmp_str, "ready"))
+			config->mode |= AT91_SMC_EXNWMODE_READY;
+	}
+
+	tmp = 0;
+	ret = of_property_read_u32(np, "atmel,page-mode", &tmp);
+	if (!ret) {
+		switch (tmp) {
+		case 4:
+			config->mode |= AT91_SMC_PS_4;
+			break;
+
+		case 8:
+			config->mode |= AT91_SMC_PS_8;
+			break;
+
+		case 16:
+			config->mode |= AT91_SMC_PS_16;
+			break;
+
+		case 32:
+			config->mode |= AT91_SMC_PS_32;
+			break;
+
+		default:
+			return -EINVAL;
+		}
+
+		config->mode |= AT91_SMC_PMEN;
+	}
+
+	return at91sam9_smc_xslate_timings(ebid);
+}
+
+static int at91sam9_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = 0x10;
+
+	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int sama5d3_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
+
+	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np)
+{
+	struct device *dev = ebi->dev;
+	struct device_node *dev_np;
+	struct at91_ebi_dev *ebid;
+	u32 tmp;
+	int ret;
+
+	dev_np = of_get_next_child(np, NULL);
+	if (!dev_np)
+		return -EINVAL;
+
+	if (!of_device_is_available(dev_np))
+		return 0;
+
+	ebid = devm_kzalloc(ebi->dev, sizeof(*ebid), GFP_KERNEL);
+	if (!ebid)
+		return -ENOMEM;
+
+	ret = of_property_read_u32(dev_np, "reg" , &tmp);
+	if (ret < 0) {
+		dev_err(dev, "missing mandatory reg property\n");
+		return ret;
+	}
+
+	if (tmp > AT91_MATRIX_EBI_NUM_CS ||
+	    !(BIT(tmp) & ebi->caps->available_cs)) {
+		dev_err(dev, "invalid reg property\n");
+		return -EINVAL;
+	}
+
+	ebid->cs = tmp;
+	ebid->np = np;
+	ebid->ebi = ebi;
+
+	if (!of_property_read_bool(np, "atmel,generic-dev"))
+		goto populate;
+
+	if (ebid->ebi->ebi_csa)
+		regmap_field_update_bits(ebid->ebi->ebi_csa,
+					 BIT(ebid->cs),
+					 ~BIT(ebid->cs));
+
+	ret = ebid->ebi->caps->xlate_config(ebid);
+	if (ret)
+		return ret;
+
+	ret = ebid->ebi->caps->apply_config(ebid);
+	if (ret)
+		return ret;
+	ebi->devs[ebid->cs] = ebid;
+
+populate:
+	return of_platform_populate(np, of_default_bus_match_table, NULL, dev);
+}
+
+static const struct reg_field at91sam9260_ebi_csa =
+				REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9260_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9260_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9261_ebi_csa =
+				REG_FIELD(AT91SAM9261_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9261_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9261_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi0_csa =
+				REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi1_csa =
+				REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
+	.available_cs = 0x7,
+	.ebi_csa = &at91sam9263_ebi1_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9g45_ebi_csa =
+				REG_FIELD(AT91SAM9G45_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9g45_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps sama5d3_ebi_caps = {
+	.available_cs = 0xf,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = sama5d3_ebi_init,
+};
+
+static const struct of_device_id at91_ebi_id_table[] = {
+	{
+		.compatible = "atmel,at91sam9260-ebi",
+		.data = &at91sam9260_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9261-ebi",
+		.data = &at91sam9261_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi0",
+		.data = &at91sam9263_ebi0_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi1",
+		.data = &at91sam9263_ebi1_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9g45-ebi",
+		.data = &at91sam9g45_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9x5-ebi",
+		.data = &at91sam9x5_ebi_caps,
+	},
+	{
+		.compatible = "atmel,sama5d3-ebi",
+		.data = &sama5d3_ebi_caps,
+	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, at91_ebi_id_table);
+
+static int at91_ebi_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *match;
+	struct device_node *child;
+	struct at91_ebi *ebi;
+	struct clk *clk;
+	int ret;
+
+	match = of_match_device(at91_ebi_id_table, &pdev->dev);
+	if (!match || !match->data)
+		return -EINVAL;
+
+	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
+	if (!ebi)
+		return -ENOMEM;
+
+	ebi->caps = match->data;
+	ebi->dev = &pdev->dev;
+
+	clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	ebi->clk = clk;
+
+	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+						   "atmel,smc");
+	if (IS_ERR(ebi->smc))
+		return PTR_ERR(ebi->smc);
+
+	/*
+	 * The sama5d3 does not provide an EBICSA register and thus does need
+	 * to access the matrix registers.
+	 */
+	if (ebi->caps->ebi_csa) {
+		ebi->matrix =
+			syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+							"atmel,matrix");
+		if (IS_ERR(ebi->matrix))
+			return PTR_ERR(ebi->matrix);
+
+		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
+						  *ebi->caps->ebi_csa);
+		if (IS_ERR(ebi->ebi_csa))
+			return PTR_ERR(ebi->ebi_csa);
+	}
+
+	ret = ebi->caps->init(ebi);
+	if (ret)
+		return ret;
+
+	for_each_child_of_node(pdev->dev.of_node, child) {
+		ret = at91_ebi_dev_setup(ebi, child);
+		if (ret)
+			return ret;
+	}
+
+	return ret;
+}
+
+static struct platform_driver at91_ebi_driver = {
+	.driver = {
+		.name = "atmel-ebi",
+		.of_match_table	= at91_ebi_id_table,
+	},
+};
+module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
+
+MODULE_AUTHOR("JJ Hiblot");
+MODULE_DESCRIPTION("Atmel's EBI driver");
+MODULE_LICENSE("GPL");
-- 
1.9.1

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[PATCH v4 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

The EBI (External Bus Interface) is used to access external peripherals
(NOR, SRAM, NAND, and other specific devices like ethernet controllers).
Each device is assigned a CS line and an address range and can have its
own configuration (timings, access mode, bus width, ...).
This driver provides a generic DT binding to configure a device according
to its requirements.
For specific device controllers (like the NAND one) the SMC timings
should be configured by the controller driver through the matrix and
smc syscon regmaps.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---

Changes since v3:
 - use syscon_regmap_lookup_by_phandle instead of of_parse_phandle +
   syscon_node_to_regmap
 - drop AT91_EBICSA_REGFIELD and AT91_MULTI_EBICSA_REGFIELD macros

 drivers/memory/Kconfig     |  11 +
 drivers/memory/Makefile    |   1 +
 drivers/memory/atmel-ebi.c | 618 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 630 insertions(+)
 create mode 100644 drivers/memory/atmel-ebi.c

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 6d91c27..dfe24a2 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -17,6 +17,17 @@ config ATMEL_SDRAMC
 	  Starting with the at91sam9g45, this controller supports SDR, DDR and
 	  LP-DDR memories.
 
+config ATMEL_EBI
+	bool "Atmel EBI driver"
+	default y
+	depends on ARCH_AT91 && OF
+	select MFD_SYSCON
+	help
+	  Driver for Atmel EBI controller.
+	  Used to configure the EBI (external bus interface) when the device-
+	  tree is used. This bus supports NANDs, external ethernet controller,
+	  SRAMs, ATA devices, etc.
+
 config TI_AEMIF
 	tristate "Texas Instruments AEMIF driver"
 	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index c32d319..7ca2c19 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
 obj-$(CONFIG_OF)		+= of_memory.o
 endif
 obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o
+obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o
 obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o
 obj-$(CONFIG_TI_EMIF)		+= emif.o
 obj-$(CONFIG_FSL_CORENET_CF)	+= fsl-corenet-cf.o
diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
new file mode 100644
index 0000000..8702694
--- /dev/null
+++ b/drivers/memory/atmel-ebi.c
@@ -0,0 +1,618 @@
+/*
+ * EBI driver for Atmel SAM9 chips
+ * inspired by the fsl weim bus driver
+ *
+ * Copyright (C) 2013 JJ Hiblot.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/atmel-matrix.h>
+#include <linux/mfd/syscon/atmel-smc.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+
+struct at91sam9_smc_timings {
+	u32 ncs_rd_setup_ns;
+	u32 nrd_setup_ns;
+	u32 ncs_wr_setup_ns;
+	u32 nwe_setup_ns;
+	u32 ncs_rd_pulse_ns;
+	u32 nrd_pulse_ns;
+	u32 ncs_wr_pulse_ns;
+	u32 nwe_pulse_ns;
+	u32 nrd_cycle_ns;
+	u32 nwe_cycle_ns;
+	u32 tdf_ns;
+};
+
+struct at91sam9_smc_generic_fields {
+	struct regmap_field *setup;
+	struct regmap_field *pulse;
+	struct regmap_field *cycle;
+	struct regmap_field *mode;
+};
+
+struct at91sam9_ebi_dev_config {
+	struct at91sam9_smc_timings timings;
+	u32 mode;
+};
+
+struct at91_ebi;
+
+struct at91_ebi_dev {
+	struct device_node *np;
+	struct at91_smc_timings *timings;
+	struct at91_ebi *ebi;
+	u32 mode;
+	int cs;
+	void *config;
+};
+
+struct at91_ebi_caps {
+	unsigned int available_cs;
+	const struct reg_field *ebi_csa;
+	int (*xlate_config)(struct at91_ebi_dev *ebid);
+	int (*apply_config)(struct at91_ebi_dev *ebid);
+	int (*init)(struct at91_ebi *ebi);
+};
+
+struct at91_ebi {
+	struct clk *clk;
+	struct regmap *smc;
+	struct regmap *matrix;
+
+	struct regmap_field *ebi_csa;
+
+	struct device *dev;
+	const struct at91_ebi_caps *caps;
+	struct at91_ebi_dev *devs[AT91_MATRIX_EBI_NUM_CS];
+	void *priv;
+};
+
+static u32 at91sam9_smc_setup_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 32) {
+		coded_cycles |= 1 << 5;
+		if (cycles < 128)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 32;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_pulse_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 64) {
+		coded_cycles |= 1 << 6;
+		if (cycles < 256)
+			cycles = 0;
+	}
+
+	coded_cycles |= cycles % 64;
+
+	return coded_cycles;
+}
+
+static u32 at91sam9_smc_cycle_ns_to_cycles(unsigned int clk_rate,
+					   u32 timing_ns)
+{
+	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
+	u32 coded_cycles = 0;
+	u32 cycles;
+
+	cycles = DIV_ROUND_UP(timing_ns, clk_period);
+	if (cycles / 128) {
+		coded_cycles = cycles / 256;
+		cycles %= 256;
+		if (cycles >= 128) {
+			coded_cycles++;
+			cycles = 0;
+		}
+
+		if (coded_cycles > 0x3) {
+			coded_cycles = 0x3;
+			cycles = 0x7f;
+		}
+
+		coded_cycles <<= 7;
+	}
+
+	coded_cycles |= cycles % 128;
+
+	return coded_cycles;
+}
+
+static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid)
+{
+	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings = &config->timings;
+	struct at91sam9_smc_generic_fields *fields = ebid->ebi->priv;
+	u32 val;
+
+	val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_setup_ns) << 24;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nrd_setup_ns) << 16;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_setup_ns) << 8;
+	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
+					       timings->nwe_setup_ns);
+	regmap_fields_write(fields->setup, ebid->cs, val);
+
+	val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					      timings->ncs_rd_pulse_ns) << 24;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nrd_pulse_ns) << 16;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->ncs_wr_pulse_ns) << 8;
+	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
+					       timings->nwe_pulse_ns);
+	regmap_fields_write(fields->pulse, ebid->cs, val);
+
+	val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					      timings->nrd_cycle_ns) << 16;
+	val |= at91sam9_smc_cycle_ns_to_cycles(clk_rate,
+					       timings->nwe_cycle_ns);
+	regmap_fields_write(fields->cycle, ebid->cs, val);
+
+	val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
+	if (val > 16)
+		val = 16;
+	regmap_fields_write(fields->mode, ebid->cs, config->mode | val << 16);
+
+	return 0;
+}
+
+static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct at91sam9_smc_timings *timings;
+	struct device_node *np = ebid->np;
+
+	timings = &config->timings;
+
+	of_property_read_u32(np, "atmel,ncs-rd-setup-ns",
+			     &timings->ncs_rd_setup_ns);
+	of_property_read_u32(np, "atmel,nrd-setup-ns",
+			     &timings->nrd_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-setup-ns",
+			     &timings->ncs_wr_setup_ns);
+	of_property_read_u32(np, "atmel,nwe-setup-ns",
+			     &timings->nwe_setup_ns);
+	of_property_read_u32(np, "atmel,ncs-rd-pulse-ns",
+			     &timings->ncs_rd_pulse_ns);
+	of_property_read_u32(np, "atmel,nrd-pulse-ns",
+			     &timings->nrd_pulse_ns);
+	of_property_read_u32(np, "atmel,ncs-wr-pulse-ns",
+			     &timings->ncs_wr_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-pulse-ns", &timings->nwe_pulse_ns);
+	of_property_read_u32(np, "atmel,nwe-cycle-ns", &timings->nwe_cycle_ns);
+	of_property_read_u32(np, "atmel,nrd-cycle-ns", &timings->nrd_cycle_ns);
+	of_property_read_u32(np, "atmel,tdf-ns", &timings->tdf_ns);
+
+	return 0;
+}
+
+static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid)
+{
+	struct at91sam9_ebi_dev_config *config = ebid->config;
+	struct device_node *np = ebid->np;
+	const char *tmp_str;
+	u32 tmp;
+	int ret;
+
+	config = devm_kzalloc(ebid->ebi->dev, sizeof(*config), GFP_KERNEL);
+	if (!config)
+		return -ENOMEM;
+
+	ebid->config = config;
+
+	ret = of_property_read_u32(np, "atmel,bus-width", &tmp);
+	if (ret)
+		return ret;
+
+	switch (tmp) {
+	case 8:
+		config->mode |= AT91_SMC_DBW_8;
+		break;
+
+	case 16:
+		config->mode |= AT91_SMC_DBW_16;
+		break;
+
+	case 32:
+		config->mode |= AT91_SMC_DBW_32;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	if (of_property_read_bool(np, "atmel,tdf-optimized"))
+		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,byte-access-type", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "write"))
+		config->mode |= AT91_SMC_BAT_WRITE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,read-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nrd"))
+		config->mode |= AT91_SMC_READMODE_NRD;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,write-mode", &tmp_str);
+	if (tmp_str && !strcmp(tmp_str, "nwe"))
+		config->mode |= AT91_SMC_WRITEMODE_NWE;
+
+	tmp_str = NULL;
+	of_property_read_string(np, "atmel,exnw-mode", &tmp_str);
+	if (tmp_str) {
+		if (!strcmp(tmp_str, "frozen"))
+			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
+		else if (!strcmp(tmp_str, "ready"))
+			config->mode |= AT91_SMC_EXNWMODE_READY;
+	}
+
+	tmp = 0;
+	ret = of_property_read_u32(np, "atmel,page-mode", &tmp);
+	if (!ret) {
+		switch (tmp) {
+		case 4:
+			config->mode |= AT91_SMC_PS_4;
+			break;
+
+		case 8:
+			config->mode |= AT91_SMC_PS_8;
+			break;
+
+		case 16:
+			config->mode |= AT91_SMC_PS_16;
+			break;
+
+		case 32:
+			config->mode |= AT91_SMC_PS_32;
+			break;
+
+		default:
+			return -EINVAL;
+		}
+
+		config->mode |= AT91_SMC_PMEN;
+	}
+
+	return at91sam9_smc_xslate_timings(ebid);
+}
+
+static int at91sam9_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = 0x10;
+
+	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int sama5d3_ebi_init(struct at91_ebi *ebi)
+{
+	struct at91sam9_smc_generic_fields *fields;
+	struct reg_field field = REG_FIELD(0, 0, 31);
+
+	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
+	if (!fields)
+		return -ENOMEM;
+
+	field.id_size = fls(ebi->caps->available_cs);
+	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
+
+	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC_OFFSET);
+	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->setup))
+		return PTR_ERR(fields->setup);
+
+	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->pulse))
+		return PTR_ERR(fields->pulse);
+
+	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->cycle))
+		return PTR_ERR(fields->cycle);
+
+	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC_OFFSET);
+	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
+	if (IS_ERR(fields->mode))
+		return PTR_ERR(fields->mode);
+
+	ebi->priv = fields;
+
+	return 0;
+}
+
+static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np)
+{
+	struct device *dev = ebi->dev;
+	struct device_node *dev_np;
+	struct at91_ebi_dev *ebid;
+	u32 tmp;
+	int ret;
+
+	dev_np = of_get_next_child(np, NULL);
+	if (!dev_np)
+		return -EINVAL;
+
+	if (!of_device_is_available(dev_np))
+		return 0;
+
+	ebid = devm_kzalloc(ebi->dev, sizeof(*ebid), GFP_KERNEL);
+	if (!ebid)
+		return -ENOMEM;
+
+	ret = of_property_read_u32(dev_np, "reg" , &tmp);
+	if (ret < 0) {
+		dev_err(dev, "missing mandatory reg property\n");
+		return ret;
+	}
+
+	if (tmp > AT91_MATRIX_EBI_NUM_CS ||
+	    !(BIT(tmp) & ebi->caps->available_cs)) {
+		dev_err(dev, "invalid reg property\n");
+		return -EINVAL;
+	}
+
+	ebid->cs = tmp;
+	ebid->np = np;
+	ebid->ebi = ebi;
+
+	if (!of_property_read_bool(np, "atmel,generic-dev"))
+		goto populate;
+
+	if (ebid->ebi->ebi_csa)
+		regmap_field_update_bits(ebid->ebi->ebi_csa,
+					 BIT(ebid->cs),
+					 ~BIT(ebid->cs));
+
+	ret = ebid->ebi->caps->xlate_config(ebid);
+	if (ret)
+		return ret;
+
+	ret = ebid->ebi->caps->apply_config(ebid);
+	if (ret)
+		return ret;
+	ebi->devs[ebid->cs] = ebid;
+
+populate:
+	return of_platform_populate(np, of_default_bus_match_table, NULL, dev);
+}
+
+static const struct reg_field at91sam9260_ebi_csa =
+				REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9260_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9260_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9261_ebi_csa =
+				REG_FIELD(AT91SAM9261_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9261_ebi_caps = {
+	.available_cs = 0xff,
+	.ebi_csa = &at91sam9261_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi0_csa =
+				REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9263_ebi1_csa =
+				REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
+	.available_cs = 0x7,
+	.ebi_csa = &at91sam9263_ebi1_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct reg_field at91sam9g45_ebi_csa =
+				REG_FIELD(AT91SAM9G45_MATRIX_EBICSA_OFF, 0,
+					  AT91_MATRIX_EBI_NUM_CS - 1);
+
+static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9g45_ebi_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
+	.available_cs = 0x3f,
+	.ebi_csa = &at91sam9263_ebi0_csa,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = at91sam9_ebi_init,
+};
+
+static const struct at91_ebi_caps sama5d3_ebi_caps = {
+	.available_cs = 0xf,
+	.xlate_config = at91sam9_ebi_xslate_config,
+	.apply_config = at91sam9_ebi_apply_config,
+	.init = sama5d3_ebi_init,
+};
+
+static const struct of_device_id at91_ebi_id_table[] = {
+	{
+		.compatible = "atmel,at91sam9260-ebi",
+		.data = &at91sam9260_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9261-ebi",
+		.data = &at91sam9261_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi0",
+		.data = &at91sam9263_ebi0_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9263-ebi1",
+		.data = &at91sam9263_ebi1_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9g45-ebi",
+		.data = &at91sam9g45_ebi_caps,
+	},
+	{
+		.compatible = "atmel,at91sam9x5-ebi",
+		.data = &at91sam9x5_ebi_caps,
+	},
+	{
+		.compatible = "atmel,sama5d3-ebi",
+		.data = &sama5d3_ebi_caps,
+	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, at91_ebi_id_table);
+
+static int at91_ebi_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *match;
+	struct device_node *child;
+	struct at91_ebi *ebi;
+	struct clk *clk;
+	int ret;
+
+	match = of_match_device(at91_ebi_id_table, &pdev->dev);
+	if (!match || !match->data)
+		return -EINVAL;
+
+	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
+	if (!ebi)
+		return -ENOMEM;
+
+	ebi->caps = match->data;
+	ebi->dev = &pdev->dev;
+
+	clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	ebi->clk = clk;
+
+	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+						   "atmel,smc");
+	if (IS_ERR(ebi->smc))
+		return PTR_ERR(ebi->smc);
+
+	/*
+	 * The sama5d3 does not provide an EBICSA register and thus does need
+	 * to access the matrix registers.
+	 */
+	if (ebi->caps->ebi_csa) {
+		ebi->matrix =
+			syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+							"atmel,matrix");
+		if (IS_ERR(ebi->matrix))
+			return PTR_ERR(ebi->matrix);
+
+		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
+						  *ebi->caps->ebi_csa);
+		if (IS_ERR(ebi->ebi_csa))
+			return PTR_ERR(ebi->ebi_csa);
+	}
+
+	ret = ebi->caps->init(ebi);
+	if (ret)
+		return ret;
+
+	for_each_child_of_node(pdev->dev.of_node, child) {
+		ret = at91_ebi_dev_setup(ebi, child);
+		if (ret)
+			return ret;
+	}
+
+	return ret;
+}
+
+static struct platform_driver at91_ebi_driver = {
+	.driver = {
+		.name = "atmel-ebi",
+		.of_match_table	= at91_ebi_id_table,
+	},
+};
+module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
+
+MODULE_AUTHOR("JJ Hiblot");
+MODULE_DESCRIPTION("Atmel's EBI driver");
+MODULE_LICENSE("GPL");
-- 
1.9.1

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

On Monday 01 December 2014 17:17:30, Arnd Bergmann wrote:
> On Monday 01 December 2014 11:50:06 Boris Brezillon wrote:
> > 
> > I don't have a strong opinion regarding where this driver should
> > live (I even considered putting it in drivers/bus) :-).
> > But note that there are other "external memory interface" drivers
> > in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).
> > 
> > Does anyone else think this driver should go in drivers/bus ?
> > 
> 
> I think drivers/memory is better.

I don't mind if it's drivers/bus or drivers/memory. But I'm wondering: When is a driver a bus driver when it is a memory driver? See imx-weim and atmel-ebi. Apparently both add support for devices attached on a bus which can be accessed through memory addresses :)

Best regards,
Alexander
-- 
Dipl.-Inf. Alexander Stein

SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund
Tel.: 03765 38600-1156
Fax: 03765 38600-4100
Email: alexander.stein@systec-electronic.com
Website: www.systec-electronic.com
 
Managing Director: Dipl.-Phys. Siegmar Schmidt
Commercial registry: Amtsgericht Chemnitz, HRB 28082

[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

On Monday 01 December 2014 17:17:30, Arnd Bergmann wrote:
> On Monday 01 December 2014 11:50:06 Boris Brezillon wrote:
> > 
> > I don't have a strong opinion regarding where this driver should
> > live (I even considered putting it in drivers/bus) :-).
> > But note that there are other "external memory interface" drivers
> > in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).
> > 
> > Does anyone else think this driver should go in drivers/bus ?
> > 
> 
> I think drivers/memory is better.

I don't mind if it's drivers/bus or drivers/memory. But I'm wondering: When is a driver a bus driver when it is a memory driver? See imx-weim and atmel-ebi. Apparently both add support for devices attached on a bus which can be accessed through memory addresses :)

Best regards,
Alexander
-- 
Dipl.-Inf. Alexander Stein

SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund
Tel.: 03765 38600-1156
Fax: 03765 38600-4100
Email: alexander.stein at systec-electronic.com
Website: www.systec-electronic.com
 
Managing Director: Dipl.-Phys. Siegmar Schmidt
Commercial registry: Amtsgericht Chemnitz, HRB 28082

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Tuesday 02 December 2014 10:18:45 Alexander Stein wrote:
> On Monday 01 December 2014 17:17:30, Arnd Bergmann wrote:
> > On Monday 01 December 2014 11:50:06 Boris Brezillon wrote:
> > > 
> > > I don't have a strong opinion regarding where this driver should
> > > live (I even considered putting it in drivers/bus) :-).
> > > But note that there are other "external memory interface" drivers
> > > in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).
> > > 
> > > Does anyone else think this driver should go in drivers/bus ?
> > > 
> > 
> > I think drivers/memory is better.
> 
> I don't mind if it's drivers/bus or drivers/memory. But I'm 
> wondering: When is a driver a bus driver when it is a memory
> driver? See imx-weim and atmel-ebi. Apparently both add support
> for devices attached on a bus which can be accessed through memory
> addresses.

I think drivers/memory should be used for external buses with an
SRAM or DRAM interface that need to configure the timings.

drivers/bus is more a collection for random other buses, usually
internal to a chip, but it's less well-defined.

	Arnd

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Tuesday 02 December 2014 10:18:45 Alexander Stein wrote:
> On Monday 01 December 2014 17:17:30, Arnd Bergmann wrote:
> > On Monday 01 December 2014 11:50:06 Boris Brezillon wrote:
> > > 
> > > I don't have a strong opinion regarding where this driver should
> > > live (I even considered putting it in drivers/bus) :-).
> > > But note that there are other "external memory interface" drivers
> > > in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).
> > > 
> > > Does anyone else think this driver should go in drivers/bus ?
> > > 
> > 
> > I think drivers/memory is better.
> 
> I don't mind if it's drivers/bus or drivers/memory. But I'm 
> wondering: When is a driver a bus driver when it is a memory
> driver? See imx-weim and atmel-ebi. Apparently both add support
> for devices attached on a bus which can be accessed through memory
> addresses.

I think drivers/memory should be used for external buses with an
SRAM or DRAM interface that need to configure the timings.

drivers/bus is more a collection for random other buses, usually
internal to a chip, but it's less well-defined.

	Arnd

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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Arnd Bergmann]

On Tuesday 02 December 2014 10:18:45 Alexander Stein wrote:
> On Monday 01 December 2014 17:17:30, Arnd Bergmann wrote:
> > On Monday 01 December 2014 11:50:06 Boris Brezillon wrote:
> > > 
> > > I don't have a strong opinion regarding where this driver should
> > > live (I even considered putting it in drivers/bus) :-).
> > > But note that there are other "external memory interface" drivers
> > > in drivers/memory too: TI AEMIF and Marvell DEVBUS  ;-).
> > > 
> > > Does anyone else think this driver should go in drivers/bus ?
> > > 
> > 
> > I think drivers/memory is better.
> 
> I don't mind if it's drivers/bus or drivers/memory. But I'm 
> wondering: When is a driver a bus driver when it is a memory
> driver? See imx-weim and atmel-ebi. Apparently both add support
> for devices attached on a bus which can be accessed through memory
> addresses.

I think drivers/memory should be used for external buses with an
SRAM or DRAM interface that need to configure the timings.

drivers/bus is more a collection for random other buses, usually
internal to a chip, but it's less well-defined.

	Arnd

[PATCH v4 01/11] mfd: syscon: Add atmel-matrix registers definition

[Boris Brezillon]

AT91 SoCs have a memory range reserved for internal bus configuration.
Expose those registers so that drivers can make use of the matrix syscon
declared in at91 DTs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
Changes since v3:
 - added AT91_MATRIX_USBPUCR_PUON definition
 - removed useless macros (those directly returning SoC specific register
   offsets)

 include/linux/mfd/syscon/atmel-matrix.h | 110 ++++++++++++++++++++++++++++++++
 1 file changed, 110 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-matrix.h

diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
new file mode 100644
index 0000000..fc9bdca
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-matrix.h
@@ -0,0 +1,110 @@
+/*
+ *  Copyright (C) 2014 Atmel Corporation.
+ *
+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+
+#define AT91SAM9260_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9260_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9260_MATRIX_PRS_OFF	0x80
+#define AT91SAM9260_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9260_MATRIX_EBICSA_OFF	0x11c
+
+#define AT91SAM9261_MATRIX_MRCR_OFF	0x0
+#define AT91SAM9261_MATRIX_SCFG_OFF	0x4
+#define AT91SAM9261_MATRIX_TCR_OFF	0x24
+#define AT91SAM9261_MATRIX_EBICSA_OFF	0x30
+#define AT91SAM9261_MATRIX_USBPUCR_OFF	0x34
+
+#define AT91SAM9263_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9263_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9263_MATRIX_PRS_OFF	0x80
+#define AT91SAM9263_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9263_MATRIX_TCR_OFF	0x114
+#define AT91SAM9263_MATRIX_EBI0CSA_OFF	0x120
+#define AT91SAM9263_MATRIX_EBI1CSA_OFF	0x124
+
+#define AT91SAM9G45_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9G45_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9G45_MATRIX_PRS_OFF	0x80
+#define AT91SAM9G45_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9G45_MATRIX_TCR_OFF	0x110
+#define AT91SAM9G45_MATRIX_DDRMPR_OFF	0x118
+#define AT91SAM9G45_MATRIX_EBICSA_OFF	0x128
+
+#define AT91SAM9N12_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9N12_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9N12_MATRIX_PRS_OFF	0x80
+#define AT91SAM9N12_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9N12_MATRIX_EBICSA_OFF	0x118
+
+#define AT91SAM9X5_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9X5_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9X5_MATRIX_PRS_OFF	0x80
+#define AT91SAM9X5_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9X5_MATRIX_EBICSA_OFF	0x120
+
+#define SAMA5D3_MATRIX_MCFG_OFF		0x00
+#define SAMA5D3_MATRIX_SCFG_OFF		0x40
+#define SAMA5D3_MATRIX_PRS_OFF		0x80
+#define SAMA5D3_MATRIX_MRCR_OFF		0x100
+
+#define AT91_MATRIX_MCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_ULBT		(7 << 0)
+#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
+#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
+#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
+#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
+#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
+
+#define AT91_MATRIX_SCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)
+#define AT91_MATRIX_DEFMSTR_TYPE	(3 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
+#define AT91_MATRIX_FIXED_DEFMSTR	(7 << 18)
+#define AT91_MATRIX_ARBT		(3 << 24)
+#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
+#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
+
+#define AT91_MATRIX_ITCM_SIZE		(0xf << 0)
+#define AT91_MATRIX_ITCM_0		(0 << 0)
+#define AT91_MATRIX_ITCM_16		(5 << 0)
+#define AT91_MATRIX_ITCM_32		(6 << 0)
+#define AT91_MATRIX_ITCM_64		(7 << 0)
+#define	AT91_MATRIX_DTCM_SIZE		(0xf << 4)
+#define	AT91_MATRIX_DTCM_0		(0 << 4)
+#define	AT91_MATRIX_DTCM_16		(5 << 4)
+#define AT91_MATRIX_DTCM_32		(6 << 4)
+#define AT91_MATRIX_DTCM_64		(7 << 4)
+
+#define AT91_MATRIX_PRAS(o, x)		((o) + ((x) * 0x8))
+#define AT91_MATRIX_PRBS(o, x)		((o) + ((x) * 0x8) + 0x4)
+#define AT91_MATRIX_MPR_MSK(x)		(3 << ((x) * 0x4))
+
+#define AT91_MATRIX_RCB(x)		BIT(x)
+
+#define AT91_MATRIX_CSA(cs, val)	(val << (cs))
+#define AT91_MATRIX_DBPUC		BIT(8)
+#define AT91_MATRIX_DBPDC		BIT(9)
+#define AT91_MATRIX_VDDIOMSEL		BIT(16)
+#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
+#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
+#define AT91_MATRIX_EBI_IOSR		BIT(17)
+#define AT91_MATRIX_DDR_IOSR		BIT(18)
+#define AT91_MATRIX_NFD0_SELECT		BIT(24)
+#define AT91_MATRIX_DDR_MP_EN		BIT(25)
+#define AT91_MATRIX_EBI_NUM_CS		8
+
+#define AT91_MATRIX_USBPUCR_PUON	BIT(30)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
-- 
1.9.1

[PATCH v4 01/11] mfd: syscon: Add atmel-matrix registers definition

[Boris Brezillon]

AT91 SoCs have a memory range reserved for internal bus configuration.
Expose those registers so that drivers can make use of the matrix syscon
declared in at91 DTs.

Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
Changes since v3:
 - added AT91_MATRIX_USBPUCR_PUON definition
 - removed useless macros (those directly returning SoC specific register
   offsets)

 include/linux/mfd/syscon/atmel-matrix.h | 110 ++++++++++++++++++++++++++++++++
 1 file changed, 110 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-matrix.h

diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
new file mode 100644
index 0000000..fc9bdca
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-matrix.h
@@ -0,0 +1,110 @@
+/*
+ *  Copyright (C) 2014 Atmel Corporation.
+ *
+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+
+#define AT91SAM9260_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9260_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9260_MATRIX_PRS_OFF	0x80
+#define AT91SAM9260_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9260_MATRIX_EBICSA_OFF	0x11c
+
+#define AT91SAM9261_MATRIX_MRCR_OFF	0x0
+#define AT91SAM9261_MATRIX_SCFG_OFF	0x4
+#define AT91SAM9261_MATRIX_TCR_OFF	0x24
+#define AT91SAM9261_MATRIX_EBICSA_OFF	0x30
+#define AT91SAM9261_MATRIX_USBPUCR_OFF	0x34
+
+#define AT91SAM9263_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9263_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9263_MATRIX_PRS_OFF	0x80
+#define AT91SAM9263_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9263_MATRIX_TCR_OFF	0x114
+#define AT91SAM9263_MATRIX_EBI0CSA_OFF	0x120
+#define AT91SAM9263_MATRIX_EBI1CSA_OFF	0x124
+
+#define AT91SAM9G45_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9G45_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9G45_MATRIX_PRS_OFF	0x80
+#define AT91SAM9G45_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9G45_MATRIX_TCR_OFF	0x110
+#define AT91SAM9G45_MATRIX_DDRMPR_OFF	0x118
+#define AT91SAM9G45_MATRIX_EBICSA_OFF	0x128
+
+#define AT91SAM9N12_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9N12_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9N12_MATRIX_PRS_OFF	0x80
+#define AT91SAM9N12_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9N12_MATRIX_EBICSA_OFF	0x118
+
+#define AT91SAM9X5_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9X5_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9X5_MATRIX_PRS_OFF	0x80
+#define AT91SAM9X5_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9X5_MATRIX_EBICSA_OFF	0x120
+
+#define SAMA5D3_MATRIX_MCFG_OFF		0x00
+#define SAMA5D3_MATRIX_SCFG_OFF		0x40
+#define SAMA5D3_MATRIX_PRS_OFF		0x80
+#define SAMA5D3_MATRIX_MRCR_OFF		0x100
+
+#define AT91_MATRIX_MCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_ULBT		(7 << 0)
+#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
+#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
+#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
+#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
+#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
+
+#define AT91_MATRIX_SCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)
+#define AT91_MATRIX_DEFMSTR_TYPE	(3 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
+#define AT91_MATRIX_FIXED_DEFMSTR	(7 << 18)
+#define AT91_MATRIX_ARBT		(3 << 24)
+#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
+#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
+
+#define AT91_MATRIX_ITCM_SIZE		(0xf << 0)
+#define AT91_MATRIX_ITCM_0		(0 << 0)
+#define AT91_MATRIX_ITCM_16		(5 << 0)
+#define AT91_MATRIX_ITCM_32		(6 << 0)
+#define AT91_MATRIX_ITCM_64		(7 << 0)
+#define	AT91_MATRIX_DTCM_SIZE		(0xf << 4)
+#define	AT91_MATRIX_DTCM_0		(0 << 4)
+#define	AT91_MATRIX_DTCM_16		(5 << 4)
+#define AT91_MATRIX_DTCM_32		(6 << 4)
+#define AT91_MATRIX_DTCM_64		(7 << 4)
+
+#define AT91_MATRIX_PRAS(o, x)		((o) + ((x) * 0x8))
+#define AT91_MATRIX_PRBS(o, x)		((o) + ((x) * 0x8) + 0x4)
+#define AT91_MATRIX_MPR_MSK(x)		(3 << ((x) * 0x4))
+
+#define AT91_MATRIX_RCB(x)		BIT(x)
+
+#define AT91_MATRIX_CSA(cs, val)	(val << (cs))
+#define AT91_MATRIX_DBPUC		BIT(8)
+#define AT91_MATRIX_DBPDC		BIT(9)
+#define AT91_MATRIX_VDDIOMSEL		BIT(16)
+#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
+#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
+#define AT91_MATRIX_EBI_IOSR		BIT(17)
+#define AT91_MATRIX_DDR_IOSR		BIT(18)
+#define AT91_MATRIX_NFD0_SELECT		BIT(24)
+#define AT91_MATRIX_DDR_MP_EN		BIT(25)
+#define AT91_MATRIX_EBI_NUM_CS		8
+
+#define AT91_MATRIX_USBPUCR_PUON	BIT(30)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
-- 
1.9.1

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[PATCH v4 01/11] mfd: syscon: Add atmel-matrix registers definition

[Boris Brezillon]

AT91 SoCs have a memory range reserved for internal bus configuration.
Expose those registers so that drivers can make use of the matrix syscon
declared in at91 DTs.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
---
Changes since v3:
 - added AT91_MATRIX_USBPUCR_PUON definition
 - removed useless macros (those directly returning SoC specific register
   offsets)

 include/linux/mfd/syscon/atmel-matrix.h | 110 ++++++++++++++++++++++++++++++++
 1 file changed, 110 insertions(+)
 create mode 100644 include/linux/mfd/syscon/atmel-matrix.h

diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
new file mode 100644
index 0000000..fc9bdca
--- /dev/null
+++ b/include/linux/mfd/syscon/atmel-matrix.h
@@ -0,0 +1,110 @@
+/*
+ *  Copyright (C) 2014 Atmel Corporation.
+ *
+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
+
+#define AT91SAM9260_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9260_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9260_MATRIX_PRS_OFF	0x80
+#define AT91SAM9260_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9260_MATRIX_EBICSA_OFF	0x11c
+
+#define AT91SAM9261_MATRIX_MRCR_OFF	0x0
+#define AT91SAM9261_MATRIX_SCFG_OFF	0x4
+#define AT91SAM9261_MATRIX_TCR_OFF	0x24
+#define AT91SAM9261_MATRIX_EBICSA_OFF	0x30
+#define AT91SAM9261_MATRIX_USBPUCR_OFF	0x34
+
+#define AT91SAM9263_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9263_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9263_MATRIX_PRS_OFF	0x80
+#define AT91SAM9263_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9263_MATRIX_TCR_OFF	0x114
+#define AT91SAM9263_MATRIX_EBI0CSA_OFF	0x120
+#define AT91SAM9263_MATRIX_EBI1CSA_OFF	0x124
+
+#define AT91SAM9G45_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9G45_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9G45_MATRIX_PRS_OFF	0x80
+#define AT91SAM9G45_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9G45_MATRIX_TCR_OFF	0x110
+#define AT91SAM9G45_MATRIX_DDRMPR_OFF	0x118
+#define AT91SAM9G45_MATRIX_EBICSA_OFF	0x128
+
+#define AT91SAM9N12_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9N12_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9N12_MATRIX_PRS_OFF	0x80
+#define AT91SAM9N12_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9N12_MATRIX_EBICSA_OFF	0x118
+
+#define AT91SAM9X5_MATRIX_MCFG_OFF	0x00
+#define AT91SAM9X5_MATRIX_SCFG_OFF	0x40
+#define AT91SAM9X5_MATRIX_PRS_OFF	0x80
+#define AT91SAM9X5_MATRIX_MRCR_OFF	0x100
+#define AT91SAM9X5_MATRIX_EBICSA_OFF	0x120
+
+#define SAMA5D3_MATRIX_MCFG_OFF		0x00
+#define SAMA5D3_MATRIX_SCFG_OFF		0x40
+#define SAMA5D3_MATRIX_PRS_OFF		0x80
+#define SAMA5D3_MATRIX_MRCR_OFF		0x100
+
+#define AT91_MATRIX_MCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_ULBT		(7 << 0)
+#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
+#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
+#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
+#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
+#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
+
+#define AT91_MATRIX_SCFG(o, x)		((o) + ((x) * 0x4))
+#define AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)
+#define AT91_MATRIX_DEFMSTR_TYPE	(3 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
+#define AT91_MATRIX_FIXED_DEFMSTR	(7 << 18)
+#define AT91_MATRIX_ARBT		(3 << 24)
+#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
+#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
+
+#define AT91_MATRIX_ITCM_SIZE		(0xf << 0)
+#define AT91_MATRIX_ITCM_0		(0 << 0)
+#define AT91_MATRIX_ITCM_16		(5 << 0)
+#define AT91_MATRIX_ITCM_32		(6 << 0)
+#define AT91_MATRIX_ITCM_64		(7 << 0)
+#define	AT91_MATRIX_DTCM_SIZE		(0xf << 4)
+#define	AT91_MATRIX_DTCM_0		(0 << 4)
+#define	AT91_MATRIX_DTCM_16		(5 << 4)
+#define AT91_MATRIX_DTCM_32		(6 << 4)
+#define AT91_MATRIX_DTCM_64		(7 << 4)
+
+#define AT91_MATRIX_PRAS(o, x)		((o) + ((x) * 0x8))
+#define AT91_MATRIX_PRBS(o, x)		((o) + ((x) * 0x8) + 0x4)
+#define AT91_MATRIX_MPR_MSK(x)		(3 << ((x) * 0x4))
+
+#define AT91_MATRIX_RCB(x)		BIT(x)
+
+#define AT91_MATRIX_CSA(cs, val)	(val << (cs))
+#define AT91_MATRIX_DBPUC		BIT(8)
+#define AT91_MATRIX_DBPDC		BIT(9)
+#define AT91_MATRIX_VDDIOMSEL		BIT(16)
+#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
+#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
+#define AT91_MATRIX_EBI_IOSR		BIT(17)
+#define AT91_MATRIX_DDR_IOSR		BIT(18)
+#define AT91_MATRIX_NFD0_SELECT		BIT(24)
+#define AT91_MATRIX_DDR_MP_EN		BIT(25)
+#define AT91_MATRIX_EBI_NUM_CS		8
+
+#define AT91_MATRIX_USBPUCR_PUON	BIT(30)
+
+#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
-- 
1.9.1

Re: [PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a écrit :
> The Matrix registers are provided to configure internal bus behavior on
> at91 SoCs.
> Some registers might be access by several drivers (e.g. to configure
> external memory bus timings), hence we declare this register set as a
> syscon device.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Acked-by: Lee Jones <lee.jones@linaro.org>
> ---
>  .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> 
> diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> new file mode 100644
> index 0000000..e56e27a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> @@ -0,0 +1,24 @@
> +* Device tree bindings for Atmel Bus Matrix
> +
> +The Bus Matrix registers are used to configure Atmel SoCs internal bus
> +behavior (master/slave priorities, undefined burst length type, ...)
> +
> +Required properties:
> +- compatible:		Should be one of the following
> +			"atmel,at91sam9260-matrix", "syscon"
> +			"atmel,at91sam9261-matrix", "syscon"
> +			"atmel,at91sam9263-matrix", "syscon"
> +			"atmel,at91sam9263-matrix", "syscon"

Same string as the preceding one: shouldn't it be at91sam9rl?


> +			"atmel,at91sam9g45-matrix", "syscon"
> +			"atmel,at91sam9n12-matrix", "syscon"
> +			"atmel,at91sam9x5-matrix", "syscon"
> +			"atmel,sama5d3-matrix", "syscon"
> +- reg:			Contains offset/length value of the Bus Matrix
> +			memory region.
> +
> +Example:
> +
> +matrix: matrix@ffffec00 {
> +	compatible = "atmel,sama5d3-matrix", "syscon";
> +	reg = <0xffffec00 0x200>;
> +};
> 


-- 
Nicolas Ferre

Re: [PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a écrit :
> The Matrix registers are provided to configure internal bus behavior on
> at91 SoCs.
> Some registers might be access by several drivers (e.g. to configure
> external memory bus timings), hence we declare this register set as a
> syscon device.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> Acked-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---
>  .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> 
> diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> new file mode 100644
> index 0000000..e56e27a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> @@ -0,0 +1,24 @@
> +* Device tree bindings for Atmel Bus Matrix
> +
> +The Bus Matrix registers are used to configure Atmel SoCs internal bus
> +behavior (master/slave priorities, undefined burst length type, ...)
> +
> +Required properties:
> +- compatible:		Should be one of the following
> +			"atmel,at91sam9260-matrix", "syscon"
> +			"atmel,at91sam9261-matrix", "syscon"
> +			"atmel,at91sam9263-matrix", "syscon"
> +			"atmel,at91sam9263-matrix", "syscon"

Same string as the preceding one: shouldn't it be at91sam9rl?


> +			"atmel,at91sam9g45-matrix", "syscon"
> +			"atmel,at91sam9n12-matrix", "syscon"
> +			"atmel,at91sam9x5-matrix", "syscon"
> +			"atmel,sama5d3-matrix", "syscon"
> +- reg:			Contains offset/length value of the Bus Matrix
> +			memory region.
> +
> +Example:
> +
> +matrix: matrix@ffffec00 {
> +	compatible = "atmel,sama5d3-matrix", "syscon";
> +	reg = <0xffffec00 0x200>;
> +};
> 


-- 
Nicolas Ferre
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[PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a ?crit :
> The Matrix registers are provided to configure internal bus behavior on
> at91 SoCs.
> Some registers might be access by several drivers (e.g. to configure
> external memory bus timings), hence we declare this register set as a
> syscon device.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Acked-by: Lee Jones <lee.jones@linaro.org>
> ---
>  .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> 
> diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> new file mode 100644
> index 0000000..e56e27a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> @@ -0,0 +1,24 @@
> +* Device tree bindings for Atmel Bus Matrix
> +
> +The Bus Matrix registers are used to configure Atmel SoCs internal bus
> +behavior (master/slave priorities, undefined burst length type, ...)
> +
> +Required properties:
> +- compatible:		Should be one of the following
> +			"atmel,at91sam9260-matrix", "syscon"
> +			"atmel,at91sam9261-matrix", "syscon"
> +			"atmel,at91sam9263-matrix", "syscon"
> +			"atmel,at91sam9263-matrix", "syscon"

Same string as the preceding one: shouldn't it be at91sam9rl?


> +			"atmel,at91sam9g45-matrix", "syscon"
> +			"atmel,at91sam9n12-matrix", "syscon"
> +			"atmel,at91sam9x5-matrix", "syscon"
> +			"atmel,sama5d3-matrix", "syscon"
> +- reg:			Contains offset/length value of the Bus Matrix
> +			memory region.
> +
> +Example:
> +
> +matrix: matrix at ffffec00 {
> +	compatible = "atmel,sama5d3-matrix", "syscon";
> +	reg = <0xffffec00 0x200>;
> +};
> 


-- 
Nicolas Ferre

Re: [PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Boris Brezillon]

Hi Nicolas,

On Wed, 3 Dec 2014 15:32:49 +0100
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:

> Le 01/12/2014 11:27, Boris Brezillon a écrit :
> > The Matrix registers are provided to configure internal bus behavior on
> > at91 SoCs.
> > Some registers might be access by several drivers (e.g. to configure
> > external memory bus timings), hence we declare this register set as a
> > syscon device.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > Acked-by: Lee Jones <lee.jones@linaro.org>
> > ---
> >  .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
> >  1 file changed, 24 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > new file mode 100644
> > index 0000000..e56e27a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > @@ -0,0 +1,24 @@
> > +* Device tree bindings for Atmel Bus Matrix
> > +
> > +The Bus Matrix registers are used to configure Atmel SoCs internal bus
> > +behavior (master/slave priorities, undefined burst length type, ...)
> > +
> > +Required properties:
> > +- compatible:		Should be one of the following
> > +			"atmel,at91sam9260-matrix", "syscon"
> > +			"atmel,at91sam9261-matrix", "syscon"
> > +			"atmel,at91sam9263-matrix", "syscon"
> > +			"atmel,at91sam9263-matrix", "syscon"
> 
> Same string as the preceding one: shouldn't it be at91sam9rl?

Indeed, and macro definitions for the 9rl are also missing in the
atmel-matrix.h header.

Thanks,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Boris Brezillon]

Hi Nicolas,

On Wed, 3 Dec 2014 15:32:49 +0100
Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org> wrote:

> Le 01/12/2014 11:27, Boris Brezillon a écrit :
> > The Matrix registers are provided to configure internal bus behavior on
> > at91 SoCs.
> > Some registers might be access by several drivers (e.g. to configure
> > external memory bus timings), hence we declare this register set as a
> > syscon device.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> > Acked-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > ---
> >  .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
> >  1 file changed, 24 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > new file mode 100644
> > index 0000000..e56e27a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > @@ -0,0 +1,24 @@
> > +* Device tree bindings for Atmel Bus Matrix
> > +
> > +The Bus Matrix registers are used to configure Atmel SoCs internal bus
> > +behavior (master/slave priorities, undefined burst length type, ...)
> > +
> > +Required properties:
> > +- compatible:		Should be one of the following
> > +			"atmel,at91sam9260-matrix", "syscon"
> > +			"atmel,at91sam9261-matrix", "syscon"
> > +			"atmel,at91sam9263-matrix", "syscon"
> > +			"atmel,at91sam9263-matrix", "syscon"
> 
> Same string as the preceding one: shouldn't it be at91sam9rl?

Indeed, and macro definitions for the 9rl are also missing in the
atmel-matrix.h header.

Thanks,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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[PATCH v3 02/11] mfd: syscon: Add Atmel Matrix bus DT binding documentation

[Boris Brezillon]

Hi Nicolas,

On Wed, 3 Dec 2014 15:32:49 +0100
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:

> Le 01/12/2014 11:27, Boris Brezillon a ?crit :
> > The Matrix registers are provided to configure internal bus behavior on
> > at91 SoCs.
> > Some registers might be access by several drivers (e.g. to configure
> > external memory bus timings), hence we declare this register set as a
> > syscon device.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > Acked-by: Lee Jones <lee.jones@linaro.org>
> > ---
> >  .../devicetree/bindings/mfd/atmel-matrix.txt       | 24 ++++++++++++++++++++++
> >  1 file changed, 24 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > new file mode 100644
> > index 0000000..e56e27a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
> > @@ -0,0 +1,24 @@
> > +* Device tree bindings for Atmel Bus Matrix
> > +
> > +The Bus Matrix registers are used to configure Atmel SoCs internal bus
> > +behavior (master/slave priorities, undefined burst length type, ...)
> > +
> > +Required properties:
> > +- compatible:		Should be one of the following
> > +			"atmel,at91sam9260-matrix", "syscon"
> > +			"atmel,at91sam9261-matrix", "syscon"
> > +			"atmel,at91sam9263-matrix", "syscon"
> > +			"atmel,at91sam9263-matrix", "syscon"
> 
> Same string as the preceding one: shouldn't it be at91sam9rl?

Indeed, and macro definitions for the 9rl are also missing in the
atmel-matrix.h header.

Thanks,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a écrit :
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and smc
> syscon regmaps.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
>  1 file changed, 155 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> new file mode 100644
> index 0000000..3749ea1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> @@ -0,0 +1,155 @@
> +* Device tree bindings for Atmel EBI
> +
> +The External Bus Interface (EBI) controller is a bus where you can connect
> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> +(Static Memory Controller).
> +Synchronous memories (and some asynchronous memories like NANDs) can be
> +attached to specialized controllers which are responsible for configuring the
> +bus appropriately according to the connected device.
> +In the other hand, the bus interface can be automated for simple asynchronous
> +devices.
> +
> +Required properties:
> +
> +- compatible:		"atmel,at91sam9260-ebi"
> +			"atmel,at91sam9261-ebi"
> +			"atmel,at91sam9263-ebi0"
> +			"atmel,at91sam9263-ebi1"

Ditto: 9263 twice.

> +			"atmel,at91sam9g45-ebi"
> +			"atmel,at91sam9x5-ebi"
> +			"atmel,sama5d3-ebi"
> +
> +- reg:			Contains offset/length value for EBI memory mapping.
> +			This property might contain several entries if the EBI
> +			memory range is not contiguous
> +
> +- #address-cells:	Must be 2.
> +			The first cell encodes the CS.
> +			The second cell encode the offset into the CS memory
> +			range.
> +
> +- #size-cells:		Must be set to 1.
> +
> +- ranges:		Encodes CS to memory region association.
> +
> +- clocks:		Clock feeding the EBI controller.
> +			See clock-bindings.txt
> +
> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> +such as NOR (e.g. cfi-flash) and NAND.
> +There might be board specific devices like FPGAs.
> +You'll define you device requirements in these child nodes.
> +
> +Required child cs node properties:
> +
> +- #address-cells:	Must be 2.
> +
> +- #size-cells:		Must be 1.
> +
> +- ranges:		Empty property indicating that child nodes can inherit
> +			memory layout.
> +
> +Optional child cs node properties:
> +- atmel,generic-dev		boolean property specifying if the device is
> +				a generic device.
> +				The following properties are only parsed if
> +				this property is present.
> +				Specialized devices are attached to specialized
> +				controllers which are responsible for
> +				configuring the bus appropriately.
> +				Here are some examples of specialized
> +				controllers: NAND, CompactFlash, SDR-SDRAM.
> +
> +- atmel,bus-width:		width of the asynchronous device's data bus
> +				8, 16 or 32.
> +				8 if not present.
> +
> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> +				"select" if not present.
> +
> +- atmel,read-mode		"nrd" or "ncs".
> +				"ncs" is not present.
> +
> +- atmel,write-mode		"nwe" or "ncs".
> +				"ncs" is not present.
> +
> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> +				"disabled" if not present.
> +
> +- atmel,page-mode		enable page mode if present. The provided value
> +				defines the page size (supported values: 4, 8,
> +				16 and 32).
> +
> +Optional device timings expressed in nanoseconds (if the property is not
> +present 0 is assumed):
> +
> +- atmel,ncs-rd-setup-ns
> +- atmel,nrd-setup-ns
> +- atmel,ncs-wr-setup-ns
> +- atmel,nwe-setup-ns
> +- atmel,ncs-rd-pulse-ns
> +- atmel,nrd-pulse-ns
> +- atmel,ncs-wr-pulse-ns
> +- atmel,nwe-pulse-ns
> +- atmel,nwe-cycle-ns
> +- atmel,nrd-cycle-ns
> +- atmel,tdf-ns
> +
> +- atmel,tdf-optimized		data float optimized mode. If present the data
> +				float time is optimized depending on the next
> +				device being accessed (next device setup
> +				time is substracted to the current devive data

Typo: subtract, device

> +				float time).
> +
> +
> +
> +Example:
> +
> +	ebi: ebi@10000000 {
> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <1>;
> +		atmel,smc = <&hsmc>;
> +		atmel,matrix = <&matrix>;
> +		reg = <0x10000000 0x10000000
> +		       0x40000000 0x30000000>;
> +		ranges = <0x0 0x0 0x10000000 0x10000000
> +			  0x1 0x0 0x40000000 0x10000000
> +			  0x2 0x0 0x50000000 0x10000000
> +			  0x3 0x0 0x60000000 0x10000000>;
> +		clocks = <&mck>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_ebi_addr>;
> +
> +		cs@0 {
> +			#address-cells = <2>;
> +			#size-cells = <1>;
> +			ranges;
> +			atmel,generic-dev;
> +			atmel,read-mode = "nrd";
> +			atmel,write-mode = "nwe";
> +			atmel,bus-width = <16>;
> +			atmel,ncs-rd-setup-ns = <0>;
> +			atmel,ncs-wr-setup-ns = <0>;
> +			atmel,nwe-setup-ns = <8>;
> +			atmel,nrd-setup-ns = <16>;
> +			atmel,ncs-rd-pulse-ns = <84>;
> +			atmel,ncs-wr-pulse-ns = <84>;
> +			atmel,nrd-pulse-ns = <76>;
> +			atmel,nwe-pulse-ns = <76>;
> +			atmel,nrd-cycle-ns = <107>;
> +			atmel,nwe-cycle-ns = <84>;
> +			atmel,tdf-ns = <16>;
> +
> +			nor: flash@0,0 {
> +				compatible = "cfi-flash";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				reg = <0x0 0x0 0x1000000>;
> +				bank-width = <2>;
> +			};
> +		};
> +	};
> +
> 


-- 
Nicolas Ferre

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a écrit :
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and smc
> syscon regmaps.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
>  1 file changed, 155 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> new file mode 100644
> index 0000000..3749ea1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> @@ -0,0 +1,155 @@
> +* Device tree bindings for Atmel EBI
> +
> +The External Bus Interface (EBI) controller is a bus where you can connect
> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> +(Static Memory Controller).
> +Synchronous memories (and some asynchronous memories like NANDs) can be
> +attached to specialized controllers which are responsible for configuring the
> +bus appropriately according to the connected device.
> +In the other hand, the bus interface can be automated for simple asynchronous
> +devices.
> +
> +Required properties:
> +
> +- compatible:		"atmel,at91sam9260-ebi"
> +			"atmel,at91sam9261-ebi"
> +			"atmel,at91sam9263-ebi0"
> +			"atmel,at91sam9263-ebi1"

Ditto: 9263 twice.

> +			"atmel,at91sam9g45-ebi"
> +			"atmel,at91sam9x5-ebi"
> +			"atmel,sama5d3-ebi"
> +
> +- reg:			Contains offset/length value for EBI memory mapping.
> +			This property might contain several entries if the EBI
> +			memory range is not contiguous
> +
> +- #address-cells:	Must be 2.
> +			The first cell encodes the CS.
> +			The second cell encode the offset into the CS memory
> +			range.
> +
> +- #size-cells:		Must be set to 1.
> +
> +- ranges:		Encodes CS to memory region association.
> +
> +- clocks:		Clock feeding the EBI controller.
> +			See clock-bindings.txt
> +
> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> +such as NOR (e.g. cfi-flash) and NAND.
> +There might be board specific devices like FPGAs.
> +You'll define you device requirements in these child nodes.
> +
> +Required child cs node properties:
> +
> +- #address-cells:	Must be 2.
> +
> +- #size-cells:		Must be 1.
> +
> +- ranges:		Empty property indicating that child nodes can inherit
> +			memory layout.
> +
> +Optional child cs node properties:
> +- atmel,generic-dev		boolean property specifying if the device is
> +				a generic device.
> +				The following properties are only parsed if
> +				this property is present.
> +				Specialized devices are attached to specialized
> +				controllers which are responsible for
> +				configuring the bus appropriately.
> +				Here are some examples of specialized
> +				controllers: NAND, CompactFlash, SDR-SDRAM.
> +
> +- atmel,bus-width:		width of the asynchronous device's data bus
> +				8, 16 or 32.
> +				8 if not present.
> +
> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> +				"select" if not present.
> +
> +- atmel,read-mode		"nrd" or "ncs".
> +				"ncs" is not present.
> +
> +- atmel,write-mode		"nwe" or "ncs".
> +				"ncs" is not present.
> +
> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> +				"disabled" if not present.
> +
> +- atmel,page-mode		enable page mode if present. The provided value
> +				defines the page size (supported values: 4, 8,
> +				16 and 32).
> +
> +Optional device timings expressed in nanoseconds (if the property is not
> +present 0 is assumed):
> +
> +- atmel,ncs-rd-setup-ns
> +- atmel,nrd-setup-ns
> +- atmel,ncs-wr-setup-ns
> +- atmel,nwe-setup-ns
> +- atmel,ncs-rd-pulse-ns
> +- atmel,nrd-pulse-ns
> +- atmel,ncs-wr-pulse-ns
> +- atmel,nwe-pulse-ns
> +- atmel,nwe-cycle-ns
> +- atmel,nrd-cycle-ns
> +- atmel,tdf-ns
> +
> +- atmel,tdf-optimized		data float optimized mode. If present the data
> +				float time is optimized depending on the next
> +				device being accessed (next device setup
> +				time is substracted to the current devive data

Typo: subtract, device

> +				float time).
> +
> +
> +
> +Example:
> +
> +	ebi: ebi@10000000 {
> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <1>;
> +		atmel,smc = <&hsmc>;
> +		atmel,matrix = <&matrix>;
> +		reg = <0x10000000 0x10000000
> +		       0x40000000 0x30000000>;
> +		ranges = <0x0 0x0 0x10000000 0x10000000
> +			  0x1 0x0 0x40000000 0x10000000
> +			  0x2 0x0 0x50000000 0x10000000
> +			  0x3 0x0 0x60000000 0x10000000>;
> +		clocks = <&mck>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_ebi_addr>;
> +
> +		cs@0 {
> +			#address-cells = <2>;
> +			#size-cells = <1>;
> +			ranges;
> +			atmel,generic-dev;
> +			atmel,read-mode = "nrd";
> +			atmel,write-mode = "nwe";
> +			atmel,bus-width = <16>;
> +			atmel,ncs-rd-setup-ns = <0>;
> +			atmel,ncs-wr-setup-ns = <0>;
> +			atmel,nwe-setup-ns = <8>;
> +			atmel,nrd-setup-ns = <16>;
> +			atmel,ncs-rd-pulse-ns = <84>;
> +			atmel,ncs-wr-pulse-ns = <84>;
> +			atmel,nrd-pulse-ns = <76>;
> +			atmel,nwe-pulse-ns = <76>;
> +			atmel,nrd-cycle-ns = <107>;
> +			atmel,nwe-cycle-ns = <84>;
> +			atmel,tdf-ns = <16>;
> +
> +			nor: flash@0,0 {
> +				compatible = "cfi-flash";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				reg = <0x0 0x0 0x1000000>;
> +				bank-width = <2>;
> +			};
> +		};
> +	};
> +
> 


-- 
Nicolas Ferre
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[PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a ?crit :
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and smc
> syscon regmaps.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
>  1 file changed, 155 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> new file mode 100644
> index 0000000..3749ea1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> @@ -0,0 +1,155 @@
> +* Device tree bindings for Atmel EBI
> +
> +The External Bus Interface (EBI) controller is a bus where you can connect
> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> +(Static Memory Controller).
> +Synchronous memories (and some asynchronous memories like NANDs) can be
> +attached to specialized controllers which are responsible for configuring the
> +bus appropriately according to the connected device.
> +In the other hand, the bus interface can be automated for simple asynchronous
> +devices.
> +
> +Required properties:
> +
> +- compatible:		"atmel,at91sam9260-ebi"
> +			"atmel,at91sam9261-ebi"
> +			"atmel,at91sam9263-ebi0"
> +			"atmel,at91sam9263-ebi1"

Ditto: 9263 twice.

> +			"atmel,at91sam9g45-ebi"
> +			"atmel,at91sam9x5-ebi"
> +			"atmel,sama5d3-ebi"
> +
> +- reg:			Contains offset/length value for EBI memory mapping.
> +			This property might contain several entries if the EBI
> +			memory range is not contiguous
> +
> +- #address-cells:	Must be 2.
> +			The first cell encodes the CS.
> +			The second cell encode the offset into the CS memory
> +			range.
> +
> +- #size-cells:		Must be set to 1.
> +
> +- ranges:		Encodes CS to memory region association.
> +
> +- clocks:		Clock feeding the EBI controller.
> +			See clock-bindings.txt
> +
> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> +such as NOR (e.g. cfi-flash) and NAND.
> +There might be board specific devices like FPGAs.
> +You'll define you device requirements in these child nodes.
> +
> +Required child cs node properties:
> +
> +- #address-cells:	Must be 2.
> +
> +- #size-cells:		Must be 1.
> +
> +- ranges:		Empty property indicating that child nodes can inherit
> +			memory layout.
> +
> +Optional child cs node properties:
> +- atmel,generic-dev		boolean property specifying if the device is
> +				a generic device.
> +				The following properties are only parsed if
> +				this property is present.
> +				Specialized devices are attached to specialized
> +				controllers which are responsible for
> +				configuring the bus appropriately.
> +				Here are some examples of specialized
> +				controllers: NAND, CompactFlash, SDR-SDRAM.
> +
> +- atmel,bus-width:		width of the asynchronous device's data bus
> +				8, 16 or 32.
> +				8 if not present.
> +
> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> +				"select" if not present.
> +
> +- atmel,read-mode		"nrd" or "ncs".
> +				"ncs" is not present.
> +
> +- atmel,write-mode		"nwe" or "ncs".
> +				"ncs" is not present.
> +
> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> +				"disabled" if not present.
> +
> +- atmel,page-mode		enable page mode if present. The provided value
> +				defines the page size (supported values: 4, 8,
> +				16 and 32).
> +
> +Optional device timings expressed in nanoseconds (if the property is not
> +present 0 is assumed):
> +
> +- atmel,ncs-rd-setup-ns
> +- atmel,nrd-setup-ns
> +- atmel,ncs-wr-setup-ns
> +- atmel,nwe-setup-ns
> +- atmel,ncs-rd-pulse-ns
> +- atmel,nrd-pulse-ns
> +- atmel,ncs-wr-pulse-ns
> +- atmel,nwe-pulse-ns
> +- atmel,nwe-cycle-ns
> +- atmel,nrd-cycle-ns
> +- atmel,tdf-ns
> +
> +- atmel,tdf-optimized		data float optimized mode. If present the data
> +				float time is optimized depending on the next
> +				device being accessed (next device setup
> +				time is substracted to the current devive data

Typo: subtract, device

> +				float time).
> +
> +
> +
> +Example:
> +
> +	ebi: ebi at 10000000 {
> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <1>;
> +		atmel,smc = <&hsmc>;
> +		atmel,matrix = <&matrix>;
> +		reg = <0x10000000 0x10000000
> +		       0x40000000 0x30000000>;
> +		ranges = <0x0 0x0 0x10000000 0x10000000
> +			  0x1 0x0 0x40000000 0x10000000
> +			  0x2 0x0 0x50000000 0x10000000
> +			  0x3 0x0 0x60000000 0x10000000>;
> +		clocks = <&mck>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_ebi_addr>;
> +
> +		cs at 0 {
> +			#address-cells = <2>;
> +			#size-cells = <1>;
> +			ranges;
> +			atmel,generic-dev;
> +			atmel,read-mode = "nrd";
> +			atmel,write-mode = "nwe";
> +			atmel,bus-width = <16>;
> +			atmel,ncs-rd-setup-ns = <0>;
> +			atmel,ncs-wr-setup-ns = <0>;
> +			atmel,nwe-setup-ns = <8>;
> +			atmel,nrd-setup-ns = <16>;
> +			atmel,ncs-rd-pulse-ns = <84>;
> +			atmel,ncs-wr-pulse-ns = <84>;
> +			atmel,nrd-pulse-ns = <76>;
> +			atmel,nwe-pulse-ns = <76>;
> +			atmel,nrd-cycle-ns = <107>;
> +			atmel,nwe-cycle-ns = <84>;
> +			atmel,tdf-ns = <16>;
> +
> +			nor: flash at 0,0 {
> +				compatible = "cfi-flash";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				reg = <0x0 0x0 0x1000000>;
> +				bank-width = <2>;
> +			};
> +		};
> +	};
> +
> 


-- 
Nicolas Ferre

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Nicolas Ferre]

Le 03/12/2014 15:56, Nicolas Ferre a écrit :
> Le 01/12/2014 11:27, Boris Brezillon a écrit :
>> The EBI (External Bus Interface) is used to access external peripherals
>> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
>> Each device is assigned a CS line and an address range and can have its
>> own configuration (timings, access mode, bus width, ...).
>> This driver provides a generic DT binding to configure a device according
>> to its requirements.
>> For specific device controllers (like the NAND one) the SMC timings
>> should be configured by the controller driver through the matrix and smc
>> syscon regmaps.
>>
>> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
>> ---
>>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
>>  1 file changed, 155 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>> new file mode 100644
>> index 0000000..3749ea1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>> @@ -0,0 +1,155 @@
>> +* Device tree bindings for Atmel EBI
>> +
>> +The External Bus Interface (EBI) controller is a bus where you can connect
>> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
>> +The EBI provides a glue-less interface to asynchronous memories though the SMC
>> +(Static Memory Controller).
>> +Synchronous memories (and some asynchronous memories like NANDs) can be
>> +attached to specialized controllers which are responsible for configuring the
>> +bus appropriately according to the connected device.
>> +In the other hand, the bus interface can be automated for simple asynchronous
>> +devices.
>> +
>> +Required properties:
>> +
>> +- compatible:		"atmel,at91sam9260-ebi"
>> +			"atmel,at91sam9261-ebi"
>> +			"atmel,at91sam9263-ebi0"
>> +			"atmel,at91sam9263-ebi1"
> 
> Ditto: 9263 twice.
> 
>> +			"atmel,at91sam9g45-ebi"
>> +			"atmel,at91sam9x5-ebi"
>> +			"atmel,sama5d3-ebi"
>> +
>> +- reg:			Contains offset/length value for EBI memory mapping.
>> +			This property might contain several entries if the EBI
>> +			memory range is not contiguous
>> +
>> +- #address-cells:	Must be 2.
>> +			The first cell encodes the CS.
>> +			The second cell encode the offset into the CS memory
>> +			range.
>> +
>> +- #size-cells:		Must be set to 1.
>> +
>> +- ranges:		Encodes CS to memory region association.
>> +
>> +- clocks:		Clock feeding the EBI controller.
>> +			See clock-bindings.txt
>> +
>> +Child chip-select (cs) nodes contain the memory devices nodes connected to
>> +such as NOR (e.g. cfi-flash) and NAND.
>> +There might be board specific devices like FPGAs.
>> +You'll define you device requirements in these child nodes.
>> +
>> +Required child cs node properties:
>> +
>> +- #address-cells:	Must be 2.
>> +
>> +- #size-cells:		Must be 1.
>> +
>> +- ranges:		Empty property indicating that child nodes can inherit
>> +			memory layout.
>> +
>> +Optional child cs node properties:
>> +- atmel,generic-dev		boolean property specifying if the device is
>> +				a generic device.

Well... no real information, specify right here what a "generic device" is.

>> +				The following properties are only parsed if
>> +				this property is present.
>> +				Specialized devices are attached to specialized
>> +				controllers which are responsible for
>> +				configuring the bus appropriately.
>> +				Here are some examples of specialized
>> +				controllers: NAND, CompactFlash, SDR-SDRAM.
>> +
>> +- atmel,bus-width:		width of the asynchronous device's data bus
>> +				8, 16 or 32.
>> +				8 if not present.
>> +
>> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
>> +				"select" if not present.
>> +
>> +- atmel,read-mode		"nrd" or "ncs".
>> +				"ncs" is not present.
>> +
>> +- atmel,write-mode		"nwe" or "ncs".
>> +				"ncs" is not present.
>> +
>> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
>> +				"disabled" if not present.
>> +
>> +- atmel,page-mode		enable page mode if present. The provided value
>> +				defines the page size (supported values: 4, 8,
>> +				16 and 32).
>> +
>> +Optional device timings expressed in nanoseconds (if the property is not
>> +present 0 is assumed):
>> +
>> +- atmel,ncs-rd-setup-ns
>> +- atmel,nrd-setup-ns
>> +- atmel,ncs-wr-setup-ns
>> +- atmel,nwe-setup-ns
>> +- atmel,ncs-rd-pulse-ns
>> +- atmel,nrd-pulse-ns
>> +- atmel,ncs-wr-pulse-ns
>> +- atmel,nwe-pulse-ns
>> +- atmel,nwe-cycle-ns
>> +- atmel,nrd-cycle-ns
>> +- atmel,tdf-ns
>> +
>> +- atmel,tdf-optimized		data float optimized mode. If present the data
>> +				float time is optimized depending on the next
>> +				device being accessed (next device setup
>> +				time is substracted to the current devive data
> 
> Typo: subtract, device
> 
>> +				float time).
>> +
>> +
>> +
>> +Example:
>> +
>> +	ebi: ebi@10000000 {
>> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
>> +		#address-cells = <2>;
>> +		#size-cells = <1>;
>> +		atmel,smc = <&hsmc>;
>> +		atmel,matrix = <&matrix>;
>> +		reg = <0x10000000 0x10000000
>> +		       0x40000000 0x30000000>;
>> +		ranges = <0x0 0x0 0x10000000 0x10000000
>> +			  0x1 0x0 0x40000000 0x10000000
>> +			  0x2 0x0 0x50000000 0x10000000
>> +			  0x3 0x0 0x60000000 0x10000000>;
>> +		clocks = <&mck>;
>> +
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&pinctrl_ebi_addr>;
>> +
>> +		cs@0 {
>> +			#address-cells = <2>;
>> +			#size-cells = <1>;
>> +			ranges;
>> +			atmel,generic-dev;
>> +			atmel,read-mode = "nrd";
>> +			atmel,write-mode = "nwe";
>> +			atmel,bus-width = <16>;
>> +			atmel,ncs-rd-setup-ns = <0>;
>> +			atmel,ncs-wr-setup-ns = <0>;
>> +			atmel,nwe-setup-ns = <8>;
>> +			atmel,nrd-setup-ns = <16>;
>> +			atmel,ncs-rd-pulse-ns = <84>;
>> +			atmel,ncs-wr-pulse-ns = <84>;
>> +			atmel,nrd-pulse-ns = <76>;
>> +			atmel,nwe-pulse-ns = <76>;
>> +			atmel,nrd-cycle-ns = <107>;
>> +			atmel,nwe-cycle-ns = <84>;
>> +			atmel,tdf-ns = <16>;
>> +
>> +			nor: flash@0,0 {
>> +				compatible = "cfi-flash";
>> +				#address-cells = <1>;
>> +				#size-cells = <1>;
>> +				reg = <0x0 0x0 0x1000000>;
>> +				bank-width = <2>;
>> +			};
>> +		};
>> +	};
>> +
>>
> 
> 


-- 
Nicolas Ferre

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Nicolas Ferre]

Le 03/12/2014 15:56, Nicolas Ferre a écrit :
> Le 01/12/2014 11:27, Boris Brezillon a écrit :
>> The EBI (External Bus Interface) is used to access external peripherals
>> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
>> Each device is assigned a CS line and an address range and can have its
>> own configuration (timings, access mode, bus width, ...).
>> This driver provides a generic DT binding to configure a device according
>> to its requirements.
>> For specific device controllers (like the NAND one) the SMC timings
>> should be configured by the controller driver through the matrix and smc
>> syscon regmaps.
>>
>> Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>> ---
>>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
>>  1 file changed, 155 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>> new file mode 100644
>> index 0000000..3749ea1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>> @@ -0,0 +1,155 @@
>> +* Device tree bindings for Atmel EBI
>> +
>> +The External Bus Interface (EBI) controller is a bus where you can connect
>> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
>> +The EBI provides a glue-less interface to asynchronous memories though the SMC
>> +(Static Memory Controller).
>> +Synchronous memories (and some asynchronous memories like NANDs) can be
>> +attached to specialized controllers which are responsible for configuring the
>> +bus appropriately according to the connected device.
>> +In the other hand, the bus interface can be automated for simple asynchronous
>> +devices.
>> +
>> +Required properties:
>> +
>> +- compatible:		"atmel,at91sam9260-ebi"
>> +			"atmel,at91sam9261-ebi"
>> +			"atmel,at91sam9263-ebi0"
>> +			"atmel,at91sam9263-ebi1"
> 
> Ditto: 9263 twice.
> 
>> +			"atmel,at91sam9g45-ebi"
>> +			"atmel,at91sam9x5-ebi"
>> +			"atmel,sama5d3-ebi"
>> +
>> +- reg:			Contains offset/length value for EBI memory mapping.
>> +			This property might contain several entries if the EBI
>> +			memory range is not contiguous
>> +
>> +- #address-cells:	Must be 2.
>> +			The first cell encodes the CS.
>> +			The second cell encode the offset into the CS memory
>> +			range.
>> +
>> +- #size-cells:		Must be set to 1.
>> +
>> +- ranges:		Encodes CS to memory region association.
>> +
>> +- clocks:		Clock feeding the EBI controller.
>> +			See clock-bindings.txt
>> +
>> +Child chip-select (cs) nodes contain the memory devices nodes connected to
>> +such as NOR (e.g. cfi-flash) and NAND.
>> +There might be board specific devices like FPGAs.
>> +You'll define you device requirements in these child nodes.
>> +
>> +Required child cs node properties:
>> +
>> +- #address-cells:	Must be 2.
>> +
>> +- #size-cells:		Must be 1.
>> +
>> +- ranges:		Empty property indicating that child nodes can inherit
>> +			memory layout.
>> +
>> +Optional child cs node properties:
>> +- atmel,generic-dev		boolean property specifying if the device is
>> +				a generic device.

Well... no real information, specify right here what a "generic device" is.

>> +				The following properties are only parsed if
>> +				this property is present.
>> +				Specialized devices are attached to specialized
>> +				controllers which are responsible for
>> +				configuring the bus appropriately.
>> +				Here are some examples of specialized
>> +				controllers: NAND, CompactFlash, SDR-SDRAM.
>> +
>> +- atmel,bus-width:		width of the asynchronous device's data bus
>> +				8, 16 or 32.
>> +				8 if not present.
>> +
>> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
>> +				"select" if not present.
>> +
>> +- atmel,read-mode		"nrd" or "ncs".
>> +				"ncs" is not present.
>> +
>> +- atmel,write-mode		"nwe" or "ncs".
>> +				"ncs" is not present.
>> +
>> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
>> +				"disabled" if not present.
>> +
>> +- atmel,page-mode		enable page mode if present. The provided value
>> +				defines the page size (supported values: 4, 8,
>> +				16 and 32).
>> +
>> +Optional device timings expressed in nanoseconds (if the property is not
>> +present 0 is assumed):
>> +
>> +- atmel,ncs-rd-setup-ns
>> +- atmel,nrd-setup-ns
>> +- atmel,ncs-wr-setup-ns
>> +- atmel,nwe-setup-ns
>> +- atmel,ncs-rd-pulse-ns
>> +- atmel,nrd-pulse-ns
>> +- atmel,ncs-wr-pulse-ns
>> +- atmel,nwe-pulse-ns
>> +- atmel,nwe-cycle-ns
>> +- atmel,nrd-cycle-ns
>> +- atmel,tdf-ns
>> +
>> +- atmel,tdf-optimized		data float optimized mode. If present the data
>> +				float time is optimized depending on the next
>> +				device being accessed (next device setup
>> +				time is substracted to the current devive data
> 
> Typo: subtract, device
> 
>> +				float time).
>> +
>> +
>> +
>> +Example:
>> +
>> +	ebi: ebi@10000000 {
>> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
>> +		#address-cells = <2>;
>> +		#size-cells = <1>;
>> +		atmel,smc = <&hsmc>;
>> +		atmel,matrix = <&matrix>;
>> +		reg = <0x10000000 0x10000000
>> +		       0x40000000 0x30000000>;
>> +		ranges = <0x0 0x0 0x10000000 0x10000000
>> +			  0x1 0x0 0x40000000 0x10000000
>> +			  0x2 0x0 0x50000000 0x10000000
>> +			  0x3 0x0 0x60000000 0x10000000>;
>> +		clocks = <&mck>;
>> +
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&pinctrl_ebi_addr>;
>> +
>> +		cs@0 {
>> +			#address-cells = <2>;
>> +			#size-cells = <1>;
>> +			ranges;
>> +			atmel,generic-dev;
>> +			atmel,read-mode = "nrd";
>> +			atmel,write-mode = "nwe";
>> +			atmel,bus-width = <16>;
>> +			atmel,ncs-rd-setup-ns = <0>;
>> +			atmel,ncs-wr-setup-ns = <0>;
>> +			atmel,nwe-setup-ns = <8>;
>> +			atmel,nrd-setup-ns = <16>;
>> +			atmel,ncs-rd-pulse-ns = <84>;
>> +			atmel,ncs-wr-pulse-ns = <84>;
>> +			atmel,nrd-pulse-ns = <76>;
>> +			atmel,nwe-pulse-ns = <76>;
>> +			atmel,nrd-cycle-ns = <107>;
>> +			atmel,nwe-cycle-ns = <84>;
>> +			atmel,tdf-ns = <16>;
>> +
>> +			nor: flash@0,0 {
>> +				compatible = "cfi-flash";
>> +				#address-cells = <1>;
>> +				#size-cells = <1>;
>> +				reg = <0x0 0x0 0x1000000>;
>> +				bank-width = <2>;
>> +			};
>> +		};
>> +	};
>> +
>>
> 
> 


-- 
Nicolas Ferre
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[PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Nicolas Ferre]

Le 03/12/2014 15:56, Nicolas Ferre a ?crit :
> Le 01/12/2014 11:27, Boris Brezillon a ?crit :
>> The EBI (External Bus Interface) is used to access external peripherals
>> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
>> Each device is assigned a CS line and an address range and can have its
>> own configuration (timings, access mode, bus width, ...).
>> This driver provides a generic DT binding to configure a device according
>> to its requirements.
>> For specific device controllers (like the NAND one) the SMC timings
>> should be configured by the controller driver through the matrix and smc
>> syscon regmaps.
>>
>> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
>> ---
>>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
>>  1 file changed, 155 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>> new file mode 100644
>> index 0000000..3749ea1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
>> @@ -0,0 +1,155 @@
>> +* Device tree bindings for Atmel EBI
>> +
>> +The External Bus Interface (EBI) controller is a bus where you can connect
>> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
>> +The EBI provides a glue-less interface to asynchronous memories though the SMC
>> +(Static Memory Controller).
>> +Synchronous memories (and some asynchronous memories like NANDs) can be
>> +attached to specialized controllers which are responsible for configuring the
>> +bus appropriately according to the connected device.
>> +In the other hand, the bus interface can be automated for simple asynchronous
>> +devices.
>> +
>> +Required properties:
>> +
>> +- compatible:		"atmel,at91sam9260-ebi"
>> +			"atmel,at91sam9261-ebi"
>> +			"atmel,at91sam9263-ebi0"
>> +			"atmel,at91sam9263-ebi1"
> 
> Ditto: 9263 twice.
> 
>> +			"atmel,at91sam9g45-ebi"
>> +			"atmel,at91sam9x5-ebi"
>> +			"atmel,sama5d3-ebi"
>> +
>> +- reg:			Contains offset/length value for EBI memory mapping.
>> +			This property might contain several entries if the EBI
>> +			memory range is not contiguous
>> +
>> +- #address-cells:	Must be 2.
>> +			The first cell encodes the CS.
>> +			The second cell encode the offset into the CS memory
>> +			range.
>> +
>> +- #size-cells:		Must be set to 1.
>> +
>> +- ranges:		Encodes CS to memory region association.
>> +
>> +- clocks:		Clock feeding the EBI controller.
>> +			See clock-bindings.txt
>> +
>> +Child chip-select (cs) nodes contain the memory devices nodes connected to
>> +such as NOR (e.g. cfi-flash) and NAND.
>> +There might be board specific devices like FPGAs.
>> +You'll define you device requirements in these child nodes.
>> +
>> +Required child cs node properties:
>> +
>> +- #address-cells:	Must be 2.
>> +
>> +- #size-cells:		Must be 1.
>> +
>> +- ranges:		Empty property indicating that child nodes can inherit
>> +			memory layout.
>> +
>> +Optional child cs node properties:
>> +- atmel,generic-dev		boolean property specifying if the device is
>> +				a generic device.

Well... no real information, specify right here what a "generic device" is.

>> +				The following properties are only parsed if
>> +				this property is present.
>> +				Specialized devices are attached to specialized
>> +				controllers which are responsible for
>> +				configuring the bus appropriately.
>> +				Here are some examples of specialized
>> +				controllers: NAND, CompactFlash, SDR-SDRAM.
>> +
>> +- atmel,bus-width:		width of the asynchronous device's data bus
>> +				8, 16 or 32.
>> +				8 if not present.
>> +
>> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
>> +				"select" if not present.
>> +
>> +- atmel,read-mode		"nrd" or "ncs".
>> +				"ncs" is not present.
>> +
>> +- atmel,write-mode		"nwe" or "ncs".
>> +				"ncs" is not present.
>> +
>> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
>> +				"disabled" if not present.
>> +
>> +- atmel,page-mode		enable page mode if present. The provided value
>> +				defines the page size (supported values: 4, 8,
>> +				16 and 32).
>> +
>> +Optional device timings expressed in nanoseconds (if the property is not
>> +present 0 is assumed):
>> +
>> +- atmel,ncs-rd-setup-ns
>> +- atmel,nrd-setup-ns
>> +- atmel,ncs-wr-setup-ns
>> +- atmel,nwe-setup-ns
>> +- atmel,ncs-rd-pulse-ns
>> +- atmel,nrd-pulse-ns
>> +- atmel,ncs-wr-pulse-ns
>> +- atmel,nwe-pulse-ns
>> +- atmel,nwe-cycle-ns
>> +- atmel,nrd-cycle-ns
>> +- atmel,tdf-ns
>> +
>> +- atmel,tdf-optimized		data float optimized mode. If present the data
>> +				float time is optimized depending on the next
>> +				device being accessed (next device setup
>> +				time is substracted to the current devive data
> 
> Typo: subtract, device
> 
>> +				float time).
>> +
>> +
>> +
>> +Example:
>> +
>> +	ebi: ebi at 10000000 {
>> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
>> +		#address-cells = <2>;
>> +		#size-cells = <1>;
>> +		atmel,smc = <&hsmc>;
>> +		atmel,matrix = <&matrix>;
>> +		reg = <0x10000000 0x10000000
>> +		       0x40000000 0x30000000>;
>> +		ranges = <0x0 0x0 0x10000000 0x10000000
>> +			  0x1 0x0 0x40000000 0x10000000
>> +			  0x2 0x0 0x50000000 0x10000000
>> +			  0x3 0x0 0x60000000 0x10000000>;
>> +		clocks = <&mck>;
>> +
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&pinctrl_ebi_addr>;
>> +
>> +		cs at 0 {
>> +			#address-cells = <2>;
>> +			#size-cells = <1>;
>> +			ranges;
>> +			atmel,generic-dev;
>> +			atmel,read-mode = "nrd";
>> +			atmel,write-mode = "nwe";
>> +			atmel,bus-width = <16>;
>> +			atmel,ncs-rd-setup-ns = <0>;
>> +			atmel,ncs-wr-setup-ns = <0>;
>> +			atmel,nwe-setup-ns = <8>;
>> +			atmel,nrd-setup-ns = <16>;
>> +			atmel,ncs-rd-pulse-ns = <84>;
>> +			atmel,ncs-wr-pulse-ns = <84>;
>> +			atmel,nrd-pulse-ns = <76>;
>> +			atmel,nwe-pulse-ns = <76>;
>> +			atmel,nrd-cycle-ns = <107>;
>> +			atmel,nwe-cycle-ns = <84>;
>> +			atmel,tdf-ns = <16>;
>> +
>> +			nor: flash at 0,0 {
>> +				compatible = "cfi-flash";
>> +				#address-cells = <1>;
>> +				#size-cells = <1>;
>> +				reg = <0x0 0x0 0x1000000>;
>> +				bank-width = <2>;
>> +			};
>> +		};
>> +	};
>> +
>>
> 
> 


-- 
Nicolas Ferre

Re: [PATCH v4 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Nicolas Ferre]

Le 02/12/2014 09:47, Boris Brezillon a écrit :
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.
> 
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
> 
> Changes since v3:
>  - use syscon_regmap_lookup_by_phandle instead of of_parse_phandle +
>    syscon_node_to_regmap
>  - drop AT91_EBICSA_REGFIELD and AT91_MULTI_EBICSA_REGFIELD macros
> 
>  drivers/memory/Kconfig     |  11 +
>  drivers/memory/Makefile    |   1 +
>  drivers/memory/atmel-ebi.c | 618 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 630 insertions(+)
>  create mode 100644 drivers/memory/atmel-ebi.c
> 
> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index 6d91c27..dfe24a2 100644
> --- a/drivers/memory/Kconfig
> +++ b/drivers/memory/Kconfig
> @@ -17,6 +17,17 @@ config ATMEL_SDRAMC
>  	  Starting with the at91sam9g45, this controller supports SDR, DDR and
>  	  LP-DDR memories.
>  
> +config ATMEL_EBI
> +	bool "Atmel EBI driver"
> +	default y
> +	depends on ARCH_AT91 && OF
> +	select MFD_SYSCON
> +	help
> +	  Driver for Atmel EBI controller.
> +	  Used to configure the EBI (external bus interface) when the device-
> +	  tree is used. This bus supports NANDs, external ethernet controller,
> +	  SRAMs, ATA devices, etc.
> +
>  config TI_AEMIF
>  	tristate "Texas Instruments AEMIF driver"
>  	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index c32d319..7ca2c19 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
>  obj-$(CONFIG_OF)		+= of_memory.o
>  endif
>  obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o
> +obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o
>  obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o
>  obj-$(CONFIG_TI_EMIF)		+= emif.o
>  obj-$(CONFIG_FSL_CORENET_CF)	+= fsl-corenet-cf.o
> diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
> new file mode 100644
> index 0000000..8702694
> --- /dev/null
> +++ b/drivers/memory/atmel-ebi.c
> @@ -0,0 +1,618 @@
> +/*
> + * EBI driver for Atmel SAM9 chips

Not only SAM9: remove it or add SAMA5.

> + * inspired by the fsl weim bus driver
> + *
> + * Copyright (C) 2013 JJ Hiblot.
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/mfd/syscon/atmel-matrix.h>
> +#include <linux/mfd/syscon/atmel-smc.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/regmap.h>
> +
> +struct at91sam9_smc_timings {
> +	u32 ncs_rd_setup_ns;
> +	u32 nrd_setup_ns;
> +	u32 ncs_wr_setup_ns;
> +	u32 nwe_setup_ns;
> +	u32 ncs_rd_pulse_ns;
> +	u32 nrd_pulse_ns;
> +	u32 ncs_wr_pulse_ns;
> +	u32 nwe_pulse_ns;
> +	u32 nrd_cycle_ns;
> +	u32 nwe_cycle_ns;
> +	u32 tdf_ns;
> +};
> +
> +struct at91sam9_smc_generic_fields {
> +	struct regmap_field *setup;
> +	struct regmap_field *pulse;
> +	struct regmap_field *cycle;
> +	struct regmap_field *mode;
> +};
> +
> +struct at91sam9_ebi_dev_config {
> +	struct at91sam9_smc_timings timings;
> +	u32 mode;
> +};
> +
> +struct at91_ebi;
> +
> +struct at91_ebi_dev {
> +	struct device_node *np;
> +	struct at91_smc_timings *timings;
> +	struct at91_ebi *ebi;
> +	u32 mode;
> +	int cs;
> +	void *config;
> +};
> +
> +struct at91_ebi_caps {
> +	unsigned int available_cs;
> +	const struct reg_field *ebi_csa;
> +	int (*xlate_config)(struct at91_ebi_dev *ebid);
> +	int (*apply_config)(struct at91_ebi_dev *ebid);
> +	int (*init)(struct at91_ebi *ebi);
> +};
> +
> +struct at91_ebi {
> +	struct clk *clk;
> +	struct regmap *smc;
> +	struct regmap *matrix;
> +
> +	struct regmap_field *ebi_csa;
> +
> +	struct device *dev;
> +	const struct at91_ebi_caps *caps;
> +	struct at91_ebi_dev *devs[AT91_MATRIX_EBI_NUM_CS];
> +	void *priv;
> +};
> +
> +static u32 at91sam9_smc_setup_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 32) {

I know it is the formula from the datasheet but please add a note to
refer to it.
So, a comment here or at the beginning of the function is needed.

> +		coded_cycles |= 1 << 5;
> +		if (cycles < 128)
> +			cycles = 0;
> +	}
> +
> +	coded_cycles |= cycles % 32;
> +
> +	return coded_cycles;
> +}
> +
> +static u32 at91sam9_smc_pulse_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 64) {

Ditto.

> +		coded_cycles |= 1 << 6;
> +		if (cycles < 256)
> +			cycles = 0;
> +	}
> +
> +	coded_cycles |= cycles % 64;
> +
> +	return coded_cycles;
> +}
> +
> +static u32 at91sam9_smc_cycle_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 128) {

Ditto.

> +		coded_cycles = cycles / 256;
> +		cycles %= 256;
> +		if (cycles >= 128) {
> +			coded_cycles++;
> +			cycles = 0;
> +		}
> +
> +		if (coded_cycles > 0x3) {
> +			coded_cycles = 0x3;
> +			cycles = 0x7f;
> +		}
> +
> +		coded_cycles <<= 7;
> +	}
> +
> +	coded_cycles |= cycles % 128;
> +
> +	return coded_cycles;
> +}
> +
> +static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid)
> +{
> +	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct at91sam9_smc_timings *timings = &config->timings;
> +	struct at91sam9_smc_generic_fields *fields = ebid->ebi->priv;
> +	u32 val;
> +
> +	val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					      timings->ncs_rd_setup_ns) << 24;
> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->nrd_setup_ns) << 16;
> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->ncs_wr_setup_ns) << 8;

Well, I know it's easy to retrieve the meaning of these constants but
please I want a #define'd constant everywhere.


> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->nwe_setup_ns);
> +	regmap_fields_write(fields->setup, ebid->cs, val);
> +
> +	val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					      timings->ncs_rd_pulse_ns) << 24;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->nrd_pulse_ns) << 16;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->ncs_wr_pulse_ns) << 8;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->nwe_pulse_ns);
> +	regmap_fields_write(fields->pulse, ebid->cs, val);
> +
> +	val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
> +					      timings->nrd_cycle_ns) << 16;
> +	val |= at91sam9_smc_cycle_ns_to_cycles(clk_rate,
> +					       timings->nwe_cycle_ns);
> +	regmap_fields_write(fields->cycle, ebid->cs, val);
> +
> +	val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
> +	if (val > 16)
> +		val = 16;

Ditto.


> +	regmap_fields_write(fields->mode, ebid->cs, config->mode | val << 16);
> +
> +	return 0;
> +}
> +
> +static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid)
> +{
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct at91sam9_smc_timings *timings;
> +	struct device_node *np = ebid->np;
> +
> +	timings = &config->timings;
> +
> +	of_property_read_u32(np, "atmel,ncs-rd-setup-ns",
> +			     &timings->ncs_rd_setup_ns);
> +	of_property_read_u32(np, "atmel,nrd-setup-ns",
> +			     &timings->nrd_setup_ns);
> +	of_property_read_u32(np, "atmel,ncs-wr-setup-ns",
> +			     &timings->ncs_wr_setup_ns);
> +	of_property_read_u32(np, "atmel,nwe-setup-ns",
> +			     &timings->nwe_setup_ns);
> +	of_property_read_u32(np, "atmel,ncs-rd-pulse-ns",
> +			     &timings->ncs_rd_pulse_ns);
> +	of_property_read_u32(np, "atmel,nrd-pulse-ns",
> +			     &timings->nrd_pulse_ns);
> +	of_property_read_u32(np, "atmel,ncs-wr-pulse-ns",
> +			     &timings->ncs_wr_pulse_ns);
> +	of_property_read_u32(np, "atmel,nwe-pulse-ns", &timings->nwe_pulse_ns);
> +	of_property_read_u32(np, "atmel,nwe-cycle-ns", &timings->nwe_cycle_ns);
> +	of_property_read_u32(np, "atmel,nrd-cycle-ns", &timings->nrd_cycle_ns);
> +	of_property_read_u32(np, "atmel,tdf-ns", &timings->tdf_ns);
> +
> +	return 0;
> +}
> +
> +static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid)
> +{
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct device_node *np = ebid->np;
> +	const char *tmp_str;
> +	u32 tmp;
> +	int ret;
> +
> +	config = devm_kzalloc(ebid->ebi->dev, sizeof(*config), GFP_KERNEL);
> +	if (!config)
> +		return -ENOMEM;
> +
> +	ebid->config = config;
> +
> +	ret = of_property_read_u32(np, "atmel,bus-width", &tmp);
> +	if (ret)
> +		return ret;
> +
> +	switch (tmp) {
> +	case 8:
> +		config->mode |= AT91_SMC_DBW_8;
> +		break;
> +
> +	case 16:
> +		config->mode |= AT91_SMC_DBW_16;
> +		break;
> +
> +	case 32:
> +		config->mode |= AT91_SMC_DBW_32;
> +		break;
> +
> +	default:
> +		return -EINVAL;
> +	}
> +
> +	if (of_property_read_bool(np, "atmel,tdf-optimized"))
> +		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,byte-access-type", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "write"))
> +		config->mode |= AT91_SMC_BAT_WRITE;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,read-mode", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "nrd"))
> +		config->mode |= AT91_SMC_READMODE_NRD;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,write-mode", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "nwe"))
> +		config->mode |= AT91_SMC_WRITEMODE_NWE;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,exnw-mode", &tmp_str);
> +	if (tmp_str) {
> +		if (!strcmp(tmp_str, "frozen"))
> +			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
> +		else if (!strcmp(tmp_str, "ready"))
> +			config->mode |= AT91_SMC_EXNWMODE_READY;
> +	}
> +
> +	tmp = 0;
> +	ret = of_property_read_u32(np, "atmel,page-mode", &tmp);
> +	if (!ret) {
> +		switch (tmp) {
> +		case 4:
> +			config->mode |= AT91_SMC_PS_4;
> +			break;
> +
> +		case 8:
> +			config->mode |= AT91_SMC_PS_8;
> +			break;
> +
> +		case 16:
> +			config->mode |= AT91_SMC_PS_16;
> +			break;
> +
> +		case 32:
> +			config->mode |= AT91_SMC_PS_32;
> +			break;
> +
> +		default:
> +			return -EINVAL;
> +		}
> +
> +		config->mode |= AT91_SMC_PMEN;
> +	}
> +
> +	return at91sam9_smc_xslate_timings(ebid);
> +}
> +
> +static int at91sam9_ebi_init(struct at91_ebi *ebi)
> +{
> +	struct at91sam9_smc_generic_fields *fields;
> +	struct reg_field field = REG_FIELD(0, 0, 31);
> +
> +	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
> +	if (!fields)
> +		return -ENOMEM;
> +
> +	field.id_size = fls(ebi->caps->available_cs);
> +	field.id_offset = 0x10;

A #define'd constant here please...

> +
> +	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->setup))
> +		return PTR_ERR(fields->setup);
> +
> +	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->pulse))
> +		return PTR_ERR(fields->pulse);
> +
> +	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->cycle))
> +		return PTR_ERR(fields->cycle);
> +
> +	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->mode))
> +		return PTR_ERR(fields->mode);
> +
> +	ebi->priv = fields;
> +
> +	return 0;
> +}
> +
> +static int sama5d3_ebi_init(struct at91_ebi *ebi)
> +{
> +	struct at91sam9_smc_generic_fields *fields;
> +	struct reg_field field = REG_FIELD(0, 0, 31);
> +
> +	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
> +	if (!fields)
> +		return -ENOMEM;
> +
> +	field.id_size = fls(ebi->caps->available_cs);
> +	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;

...Just like here ^^^

> +
> +	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->setup))
> +		return PTR_ERR(fields->setup);
> +
> +	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->pulse))
> +		return PTR_ERR(fields->pulse);
> +
> +	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->cycle))
> +		return PTR_ERR(fields->cycle);
> +
> +	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->mode))
> +		return PTR_ERR(fields->mode);
> +
> +	ebi->priv = fields;
> +
> +	return 0;
> +}
> +
> +static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np)
> +{
> +	struct device *dev = ebi->dev;
> +	struct device_node *dev_np;
> +	struct at91_ebi_dev *ebid;
> +	u32 tmp;
> +	int ret;
> +
> +	dev_np = of_get_next_child(np, NULL);
> +	if (!dev_np)
> +		return -EINVAL;
> +
> +	if (!of_device_is_available(dev_np))
> +		return 0;
> +
> +	ebid = devm_kzalloc(ebi->dev, sizeof(*ebid), GFP_KERNEL);
> +	if (!ebid)
> +		return -ENOMEM;
> +
> +	ret = of_property_read_u32(dev_np, "reg" , &tmp);
> +	if (ret < 0) {
> +		dev_err(dev, "missing mandatory reg property\n");
> +		return ret;
> +	}
> +
> +	if (tmp > AT91_MATRIX_EBI_NUM_CS ||
> +	    !(BIT(tmp) & ebi->caps->available_cs)) {
> +		dev_err(dev, "invalid reg property\n");
> +		return -EINVAL;
> +	}
> +
> +	ebid->cs = tmp;
> +	ebid->np = np;
> +	ebid->ebi = ebi;
> +
> +	if (!of_property_read_bool(np, "atmel,generic-dev"))
> +		goto populate;
> +
> +	if (ebid->ebi->ebi_csa)
> +		regmap_field_update_bits(ebid->ebi->ebi_csa,
> +					 BIT(ebid->cs),
> +					 ~BIT(ebid->cs));
> +
> +	ret = ebid->ebi->caps->xlate_config(ebid);
> +	if (ret)
> +		return ret;
> +
> +	ret = ebid->ebi->caps->apply_config(ebid);
> +	if (ret)
> +		return ret;
> +	ebi->devs[ebid->cs] = ebid;
> +
> +populate:
> +	return of_platform_populate(np, of_default_bus_match_table, NULL, dev);
> +}
> +
> +static const struct reg_field at91sam9260_ebi_csa =
> +				REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9260_ebi_caps = {
> +	.available_cs = 0xff,
> +	.ebi_csa = &at91sam9260_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9261_ebi_csa =
> +				REG_FIELD(AT91SAM9261_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9261_ebi_caps = {
> +	.available_cs = 0xff,
> +	.ebi_csa = &at91sam9261_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9263_ebi0_csa =
> +				REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9263_ebi0_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9263_ebi1_csa =
> +				REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
> +	.available_cs = 0x7,
> +	.ebi_csa = &at91sam9263_ebi1_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9g45_ebi_csa =
> +				REG_FIELD(AT91SAM9G45_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9g45_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9263_ebi0_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct at91_ebi_caps sama5d3_ebi_caps = {
> +	.available_cs = 0xf,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = sama5d3_ebi_init,
> +};
> +
> +static const struct of_device_id at91_ebi_id_table[] = {
> +	{
> +		.compatible = "atmel,at91sam9260-ebi",
> +		.data = &at91sam9260_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9261-ebi",
> +		.data = &at91sam9261_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9263-ebi0",
> +		.data = &at91sam9263_ebi0_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9263-ebi1",
> +		.data = &at91sam9263_ebi1_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9g45-ebi",
> +		.data = &at91sam9g45_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9x5-ebi",
> +		.data = &at91sam9x5_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,sama5d3-ebi",
> +		.data = &sama5d3_ebi_caps,
> +	},
> +	{ /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, at91_ebi_id_table);
> +
> +static int at91_ebi_probe(struct platform_device *pdev)
> +{
> +	const struct of_device_id *match;
> +	struct device_node *child;
> +	struct at91_ebi *ebi;
> +	struct clk *clk;
> +	int ret;
> +
> +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> +	if (!match || !match->data)
> +		return -EINVAL;
> +
> +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> +	if (!ebi)
> +		return -ENOMEM;
> +
> +	ebi->caps = match->data;
> +	ebi->dev = &pdev->dev;
> +
> +	clk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(clk))
> +		return PTR_ERR(clk);
> +
> +	ebi->clk = clk;
> +
> +	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
> +						   "atmel,smc");
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);
> +
> +	/*
> +	 * The sama5d3 does not provide an EBICSA register and thus does need
> +	 * to access the matrix registers.
> +	 */
> +	if (ebi->caps->ebi_csa) {
> +		ebi->matrix =
> +			syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
> +							"atmel,matrix");
> +		if (IS_ERR(ebi->matrix))
> +			return PTR_ERR(ebi->matrix);
> +
> +		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
> +						  *ebi->caps->ebi_csa);
> +		if (IS_ERR(ebi->ebi_csa))
> +			return PTR_ERR(ebi->ebi_csa);
> +	}
> +
> +	ret = ebi->caps->init(ebi);
> +	if (ret)
> +		return ret;
> +
> +	for_each_child_of_node(pdev->dev.of_node, child) {
> +		ret = at91_ebi_dev_setup(ebi, child);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return ret;
> +}
> +
> +static struct platform_driver at91_ebi_driver = {
> +	.driver = {
> +		.name = "atmel-ebi",
> +		.of_match_table	= at91_ebi_id_table,
> +	},
> +};
> +module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
> +
> +MODULE_AUTHOR("JJ Hiblot");
> +MODULE_DESCRIPTION("Atmel's EBI driver");
> +MODULE_LICENSE("GPL");
> 


-- 
Nicolas Ferre

Re: [PATCH v4 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Nicolas Ferre]

Le 02/12/2014 09:47, Boris Brezillon a écrit :
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.
> 
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot-dLKeG7h1OhBDOHtkgc7UlQ@public.gmane.org>
> Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
> 
> Changes since v3:
>  - use syscon_regmap_lookup_by_phandle instead of of_parse_phandle +
>    syscon_node_to_regmap
>  - drop AT91_EBICSA_REGFIELD and AT91_MULTI_EBICSA_REGFIELD macros
> 
>  drivers/memory/Kconfig     |  11 +
>  drivers/memory/Makefile    |   1 +
>  drivers/memory/atmel-ebi.c | 618 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 630 insertions(+)
>  create mode 100644 drivers/memory/atmel-ebi.c
> 
> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index 6d91c27..dfe24a2 100644
> --- a/drivers/memory/Kconfig
> +++ b/drivers/memory/Kconfig
> @@ -17,6 +17,17 @@ config ATMEL_SDRAMC
>  	  Starting with the at91sam9g45, this controller supports SDR, DDR and
>  	  LP-DDR memories.
>  
> +config ATMEL_EBI
> +	bool "Atmel EBI driver"
> +	default y
> +	depends on ARCH_AT91 && OF
> +	select MFD_SYSCON
> +	help
> +	  Driver for Atmel EBI controller.
> +	  Used to configure the EBI (external bus interface) when the device-
> +	  tree is used. This bus supports NANDs, external ethernet controller,
> +	  SRAMs, ATA devices, etc.
> +
>  config TI_AEMIF
>  	tristate "Texas Instruments AEMIF driver"
>  	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index c32d319..7ca2c19 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
>  obj-$(CONFIG_OF)		+= of_memory.o
>  endif
>  obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o
> +obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o
>  obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o
>  obj-$(CONFIG_TI_EMIF)		+= emif.o
>  obj-$(CONFIG_FSL_CORENET_CF)	+= fsl-corenet-cf.o
> diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
> new file mode 100644
> index 0000000..8702694
> --- /dev/null
> +++ b/drivers/memory/atmel-ebi.c
> @@ -0,0 +1,618 @@
> +/*
> + * EBI driver for Atmel SAM9 chips

Not only SAM9: remove it or add SAMA5.

> + * inspired by the fsl weim bus driver
> + *
> + * Copyright (C) 2013 JJ Hiblot.
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/mfd/syscon/atmel-matrix.h>
> +#include <linux/mfd/syscon/atmel-smc.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/regmap.h>
> +
> +struct at91sam9_smc_timings {
> +	u32 ncs_rd_setup_ns;
> +	u32 nrd_setup_ns;
> +	u32 ncs_wr_setup_ns;
> +	u32 nwe_setup_ns;
> +	u32 ncs_rd_pulse_ns;
> +	u32 nrd_pulse_ns;
> +	u32 ncs_wr_pulse_ns;
> +	u32 nwe_pulse_ns;
> +	u32 nrd_cycle_ns;
> +	u32 nwe_cycle_ns;
> +	u32 tdf_ns;
> +};
> +
> +struct at91sam9_smc_generic_fields {
> +	struct regmap_field *setup;
> +	struct regmap_field *pulse;
> +	struct regmap_field *cycle;
> +	struct regmap_field *mode;
> +};
> +
> +struct at91sam9_ebi_dev_config {
> +	struct at91sam9_smc_timings timings;
> +	u32 mode;
> +};
> +
> +struct at91_ebi;
> +
> +struct at91_ebi_dev {
> +	struct device_node *np;
> +	struct at91_smc_timings *timings;
> +	struct at91_ebi *ebi;
> +	u32 mode;
> +	int cs;
> +	void *config;
> +};
> +
> +struct at91_ebi_caps {
> +	unsigned int available_cs;
> +	const struct reg_field *ebi_csa;
> +	int (*xlate_config)(struct at91_ebi_dev *ebid);
> +	int (*apply_config)(struct at91_ebi_dev *ebid);
> +	int (*init)(struct at91_ebi *ebi);
> +};
> +
> +struct at91_ebi {
> +	struct clk *clk;
> +	struct regmap *smc;
> +	struct regmap *matrix;
> +
> +	struct regmap_field *ebi_csa;
> +
> +	struct device *dev;
> +	const struct at91_ebi_caps *caps;
> +	struct at91_ebi_dev *devs[AT91_MATRIX_EBI_NUM_CS];
> +	void *priv;
> +};
> +
> +static u32 at91sam9_smc_setup_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 32) {

I know it is the formula from the datasheet but please add a note to
refer to it.
So, a comment here or at the beginning of the function is needed.

> +		coded_cycles |= 1 << 5;
> +		if (cycles < 128)
> +			cycles = 0;
> +	}
> +
> +	coded_cycles |= cycles % 32;
> +
> +	return coded_cycles;
> +}
> +
> +static u32 at91sam9_smc_pulse_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 64) {

Ditto.

> +		coded_cycles |= 1 << 6;
> +		if (cycles < 256)
> +			cycles = 0;
> +	}
> +
> +	coded_cycles |= cycles % 64;
> +
> +	return coded_cycles;
> +}
> +
> +static u32 at91sam9_smc_cycle_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 128) {

Ditto.

> +		coded_cycles = cycles / 256;
> +		cycles %= 256;
> +		if (cycles >= 128) {
> +			coded_cycles++;
> +			cycles = 0;
> +		}
> +
> +		if (coded_cycles > 0x3) {
> +			coded_cycles = 0x3;
> +			cycles = 0x7f;
> +		}
> +
> +		coded_cycles <<= 7;
> +	}
> +
> +	coded_cycles |= cycles % 128;
> +
> +	return coded_cycles;
> +}
> +
> +static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid)
> +{
> +	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct at91sam9_smc_timings *timings = &config->timings;
> +	struct at91sam9_smc_generic_fields *fields = ebid->ebi->priv;
> +	u32 val;
> +
> +	val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					      timings->ncs_rd_setup_ns) << 24;
> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->nrd_setup_ns) << 16;
> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->ncs_wr_setup_ns) << 8;

Well, I know it's easy to retrieve the meaning of these constants but
please I want a #define'd constant everywhere.


> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->nwe_setup_ns);
> +	regmap_fields_write(fields->setup, ebid->cs, val);
> +
> +	val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					      timings->ncs_rd_pulse_ns) << 24;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->nrd_pulse_ns) << 16;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->ncs_wr_pulse_ns) << 8;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->nwe_pulse_ns);
> +	regmap_fields_write(fields->pulse, ebid->cs, val);
> +
> +	val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
> +					      timings->nrd_cycle_ns) << 16;
> +	val |= at91sam9_smc_cycle_ns_to_cycles(clk_rate,
> +					       timings->nwe_cycle_ns);
> +	regmap_fields_write(fields->cycle, ebid->cs, val);
> +
> +	val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
> +	if (val > 16)
> +		val = 16;

Ditto.


> +	regmap_fields_write(fields->mode, ebid->cs, config->mode | val << 16);
> +
> +	return 0;
> +}
> +
> +static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid)
> +{
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct at91sam9_smc_timings *timings;
> +	struct device_node *np = ebid->np;
> +
> +	timings = &config->timings;
> +
> +	of_property_read_u32(np, "atmel,ncs-rd-setup-ns",
> +			     &timings->ncs_rd_setup_ns);
> +	of_property_read_u32(np, "atmel,nrd-setup-ns",
> +			     &timings->nrd_setup_ns);
> +	of_property_read_u32(np, "atmel,ncs-wr-setup-ns",
> +			     &timings->ncs_wr_setup_ns);
> +	of_property_read_u32(np, "atmel,nwe-setup-ns",
> +			     &timings->nwe_setup_ns);
> +	of_property_read_u32(np, "atmel,ncs-rd-pulse-ns",
> +			     &timings->ncs_rd_pulse_ns);
> +	of_property_read_u32(np, "atmel,nrd-pulse-ns",
> +			     &timings->nrd_pulse_ns);
> +	of_property_read_u32(np, "atmel,ncs-wr-pulse-ns",
> +			     &timings->ncs_wr_pulse_ns);
> +	of_property_read_u32(np, "atmel,nwe-pulse-ns", &timings->nwe_pulse_ns);
> +	of_property_read_u32(np, "atmel,nwe-cycle-ns", &timings->nwe_cycle_ns);
> +	of_property_read_u32(np, "atmel,nrd-cycle-ns", &timings->nrd_cycle_ns);
> +	of_property_read_u32(np, "atmel,tdf-ns", &timings->tdf_ns);
> +
> +	return 0;
> +}
> +
> +static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid)
> +{
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct device_node *np = ebid->np;
> +	const char *tmp_str;
> +	u32 tmp;
> +	int ret;
> +
> +	config = devm_kzalloc(ebid->ebi->dev, sizeof(*config), GFP_KERNEL);
> +	if (!config)
> +		return -ENOMEM;
> +
> +	ebid->config = config;
> +
> +	ret = of_property_read_u32(np, "atmel,bus-width", &tmp);
> +	if (ret)
> +		return ret;
> +
> +	switch (tmp) {
> +	case 8:
> +		config->mode |= AT91_SMC_DBW_8;
> +		break;
> +
> +	case 16:
> +		config->mode |= AT91_SMC_DBW_16;
> +		break;
> +
> +	case 32:
> +		config->mode |= AT91_SMC_DBW_32;
> +		break;
> +
> +	default:
> +		return -EINVAL;
> +	}
> +
> +	if (of_property_read_bool(np, "atmel,tdf-optimized"))
> +		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,byte-access-type", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "write"))
> +		config->mode |= AT91_SMC_BAT_WRITE;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,read-mode", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "nrd"))
> +		config->mode |= AT91_SMC_READMODE_NRD;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,write-mode", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "nwe"))
> +		config->mode |= AT91_SMC_WRITEMODE_NWE;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,exnw-mode", &tmp_str);
> +	if (tmp_str) {
> +		if (!strcmp(tmp_str, "frozen"))
> +			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
> +		else if (!strcmp(tmp_str, "ready"))
> +			config->mode |= AT91_SMC_EXNWMODE_READY;
> +	}
> +
> +	tmp = 0;
> +	ret = of_property_read_u32(np, "atmel,page-mode", &tmp);
> +	if (!ret) {
> +		switch (tmp) {
> +		case 4:
> +			config->mode |= AT91_SMC_PS_4;
> +			break;
> +
> +		case 8:
> +			config->mode |= AT91_SMC_PS_8;
> +			break;
> +
> +		case 16:
> +			config->mode |= AT91_SMC_PS_16;
> +			break;
> +
> +		case 32:
> +			config->mode |= AT91_SMC_PS_32;
> +			break;
> +
> +		default:
> +			return -EINVAL;
> +		}
> +
> +		config->mode |= AT91_SMC_PMEN;
> +	}
> +
> +	return at91sam9_smc_xslate_timings(ebid);
> +}
> +
> +static int at91sam9_ebi_init(struct at91_ebi *ebi)
> +{
> +	struct at91sam9_smc_generic_fields *fields;
> +	struct reg_field field = REG_FIELD(0, 0, 31);
> +
> +	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
> +	if (!fields)
> +		return -ENOMEM;
> +
> +	field.id_size = fls(ebi->caps->available_cs);
> +	field.id_offset = 0x10;

A #define'd constant here please...

> +
> +	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->setup))
> +		return PTR_ERR(fields->setup);
> +
> +	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->pulse))
> +		return PTR_ERR(fields->pulse);
> +
> +	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->cycle))
> +		return PTR_ERR(fields->cycle);
> +
> +	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->mode))
> +		return PTR_ERR(fields->mode);
> +
> +	ebi->priv = fields;
> +
> +	return 0;
> +}
> +
> +static int sama5d3_ebi_init(struct at91_ebi *ebi)
> +{
> +	struct at91sam9_smc_generic_fields *fields;
> +	struct reg_field field = REG_FIELD(0, 0, 31);
> +
> +	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
> +	if (!fields)
> +		return -ENOMEM;
> +
> +	field.id_size = fls(ebi->caps->available_cs);
> +	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;

...Just like here ^^^

> +
> +	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->setup))
> +		return PTR_ERR(fields->setup);
> +
> +	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->pulse))
> +		return PTR_ERR(fields->pulse);
> +
> +	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->cycle))
> +		return PTR_ERR(fields->cycle);
> +
> +	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->mode))
> +		return PTR_ERR(fields->mode);
> +
> +	ebi->priv = fields;
> +
> +	return 0;
> +}
> +
> +static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np)
> +{
> +	struct device *dev = ebi->dev;
> +	struct device_node *dev_np;
> +	struct at91_ebi_dev *ebid;
> +	u32 tmp;
> +	int ret;
> +
> +	dev_np = of_get_next_child(np, NULL);
> +	if (!dev_np)
> +		return -EINVAL;
> +
> +	if (!of_device_is_available(dev_np))
> +		return 0;
> +
> +	ebid = devm_kzalloc(ebi->dev, sizeof(*ebid), GFP_KERNEL);
> +	if (!ebid)
> +		return -ENOMEM;
> +
> +	ret = of_property_read_u32(dev_np, "reg" , &tmp);
> +	if (ret < 0) {
> +		dev_err(dev, "missing mandatory reg property\n");
> +		return ret;
> +	}
> +
> +	if (tmp > AT91_MATRIX_EBI_NUM_CS ||
> +	    !(BIT(tmp) & ebi->caps->available_cs)) {
> +		dev_err(dev, "invalid reg property\n");
> +		return -EINVAL;
> +	}
> +
> +	ebid->cs = tmp;
> +	ebid->np = np;
> +	ebid->ebi = ebi;
> +
> +	if (!of_property_read_bool(np, "atmel,generic-dev"))
> +		goto populate;
> +
> +	if (ebid->ebi->ebi_csa)
> +		regmap_field_update_bits(ebid->ebi->ebi_csa,
> +					 BIT(ebid->cs),
> +					 ~BIT(ebid->cs));
> +
> +	ret = ebid->ebi->caps->xlate_config(ebid);
> +	if (ret)
> +		return ret;
> +
> +	ret = ebid->ebi->caps->apply_config(ebid);
> +	if (ret)
> +		return ret;
> +	ebi->devs[ebid->cs] = ebid;
> +
> +populate:
> +	return of_platform_populate(np, of_default_bus_match_table, NULL, dev);
> +}
> +
> +static const struct reg_field at91sam9260_ebi_csa =
> +				REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9260_ebi_caps = {
> +	.available_cs = 0xff,
> +	.ebi_csa = &at91sam9260_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9261_ebi_csa =
> +				REG_FIELD(AT91SAM9261_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9261_ebi_caps = {
> +	.available_cs = 0xff,
> +	.ebi_csa = &at91sam9261_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9263_ebi0_csa =
> +				REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9263_ebi0_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9263_ebi1_csa =
> +				REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
> +	.available_cs = 0x7,
> +	.ebi_csa = &at91sam9263_ebi1_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9g45_ebi_csa =
> +				REG_FIELD(AT91SAM9G45_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9g45_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9263_ebi0_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct at91_ebi_caps sama5d3_ebi_caps = {
> +	.available_cs = 0xf,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = sama5d3_ebi_init,
> +};
> +
> +static const struct of_device_id at91_ebi_id_table[] = {
> +	{
> +		.compatible = "atmel,at91sam9260-ebi",
> +		.data = &at91sam9260_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9261-ebi",
> +		.data = &at91sam9261_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9263-ebi0",
> +		.data = &at91sam9263_ebi0_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9263-ebi1",
> +		.data = &at91sam9263_ebi1_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9g45-ebi",
> +		.data = &at91sam9g45_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9x5-ebi",
> +		.data = &at91sam9x5_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,sama5d3-ebi",
> +		.data = &sama5d3_ebi_caps,
> +	},
> +	{ /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, at91_ebi_id_table);
> +
> +static int at91_ebi_probe(struct platform_device *pdev)
> +{
> +	const struct of_device_id *match;
> +	struct device_node *child;
> +	struct at91_ebi *ebi;
> +	struct clk *clk;
> +	int ret;
> +
> +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> +	if (!match || !match->data)
> +		return -EINVAL;
> +
> +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> +	if (!ebi)
> +		return -ENOMEM;
> +
> +	ebi->caps = match->data;
> +	ebi->dev = &pdev->dev;
> +
> +	clk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(clk))
> +		return PTR_ERR(clk);
> +
> +	ebi->clk = clk;
> +
> +	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
> +						   "atmel,smc");
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);
> +
> +	/*
> +	 * The sama5d3 does not provide an EBICSA register and thus does need
> +	 * to access the matrix registers.
> +	 */
> +	if (ebi->caps->ebi_csa) {
> +		ebi->matrix =
> +			syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
> +							"atmel,matrix");
> +		if (IS_ERR(ebi->matrix))
> +			return PTR_ERR(ebi->matrix);
> +
> +		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
> +						  *ebi->caps->ebi_csa);
> +		if (IS_ERR(ebi->ebi_csa))
> +			return PTR_ERR(ebi->ebi_csa);
> +	}
> +
> +	ret = ebi->caps->init(ebi);
> +	if (ret)
> +		return ret;
> +
> +	for_each_child_of_node(pdev->dev.of_node, child) {
> +		ret = at91_ebi_dev_setup(ebi, child);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return ret;
> +}
> +
> +static struct platform_driver at91_ebi_driver = {
> +	.driver = {
> +		.name = "atmel-ebi",
> +		.of_match_table	= at91_ebi_id_table,
> +	},
> +};
> +module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
> +
> +MODULE_AUTHOR("JJ Hiblot");
> +MODULE_DESCRIPTION("Atmel's EBI driver");
> +MODULE_LICENSE("GPL");
> 


-- 
Nicolas Ferre
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[PATCH v4 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Nicolas Ferre]

Le 02/12/2014 09:47, Boris Brezillon a ?crit :
> The EBI (External Bus Interface) is used to access external peripherals
> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> Each device is assigned a CS line and an address range and can have its
> own configuration (timings, access mode, bus width, ...).
> This driver provides a generic DT binding to configure a device according
> to its requirements.
> For specific device controllers (like the NAND one) the SMC timings
> should be configured by the controller driver through the matrix and
> smc syscon regmaps.
> 
> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
> 
> Changes since v3:
>  - use syscon_regmap_lookup_by_phandle instead of of_parse_phandle +
>    syscon_node_to_regmap
>  - drop AT91_EBICSA_REGFIELD and AT91_MULTI_EBICSA_REGFIELD macros
> 
>  drivers/memory/Kconfig     |  11 +
>  drivers/memory/Makefile    |   1 +
>  drivers/memory/atmel-ebi.c | 618 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 630 insertions(+)
>  create mode 100644 drivers/memory/atmel-ebi.c
> 
> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index 6d91c27..dfe24a2 100644
> --- a/drivers/memory/Kconfig
> +++ b/drivers/memory/Kconfig
> @@ -17,6 +17,17 @@ config ATMEL_SDRAMC
>  	  Starting with the at91sam9g45, this controller supports SDR, DDR and
>  	  LP-DDR memories.
>  
> +config ATMEL_EBI
> +	bool "Atmel EBI driver"
> +	default y
> +	depends on ARCH_AT91 && OF
> +	select MFD_SYSCON
> +	help
> +	  Driver for Atmel EBI controller.
> +	  Used to configure the EBI (external bus interface) when the device-
> +	  tree is used. This bus supports NANDs, external ethernet controller,
> +	  SRAMs, ATA devices, etc.
> +
>  config TI_AEMIF
>  	tristate "Texas Instruments AEMIF driver"
>  	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index c32d319..7ca2c19 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
>  obj-$(CONFIG_OF)		+= of_memory.o
>  endif
>  obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o
> +obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o
>  obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o
>  obj-$(CONFIG_TI_EMIF)		+= emif.o
>  obj-$(CONFIG_FSL_CORENET_CF)	+= fsl-corenet-cf.o
> diff --git a/drivers/memory/atmel-ebi.c b/drivers/memory/atmel-ebi.c
> new file mode 100644
> index 0000000..8702694
> --- /dev/null
> +++ b/drivers/memory/atmel-ebi.c
> @@ -0,0 +1,618 @@
> +/*
> + * EBI driver for Atmel SAM9 chips

Not only SAM9: remove it or add SAMA5.

> + * inspired by the fsl weim bus driver
> + *
> + * Copyright (C) 2013 JJ Hiblot.
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/mfd/syscon/atmel-matrix.h>
> +#include <linux/mfd/syscon/atmel-smc.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/regmap.h>
> +
> +struct at91sam9_smc_timings {
> +	u32 ncs_rd_setup_ns;
> +	u32 nrd_setup_ns;
> +	u32 ncs_wr_setup_ns;
> +	u32 nwe_setup_ns;
> +	u32 ncs_rd_pulse_ns;
> +	u32 nrd_pulse_ns;
> +	u32 ncs_wr_pulse_ns;
> +	u32 nwe_pulse_ns;
> +	u32 nrd_cycle_ns;
> +	u32 nwe_cycle_ns;
> +	u32 tdf_ns;
> +};
> +
> +struct at91sam9_smc_generic_fields {
> +	struct regmap_field *setup;
> +	struct regmap_field *pulse;
> +	struct regmap_field *cycle;
> +	struct regmap_field *mode;
> +};
> +
> +struct at91sam9_ebi_dev_config {
> +	struct at91sam9_smc_timings timings;
> +	u32 mode;
> +};
> +
> +struct at91_ebi;
> +
> +struct at91_ebi_dev {
> +	struct device_node *np;
> +	struct at91_smc_timings *timings;
> +	struct at91_ebi *ebi;
> +	u32 mode;
> +	int cs;
> +	void *config;
> +};
> +
> +struct at91_ebi_caps {
> +	unsigned int available_cs;
> +	const struct reg_field *ebi_csa;
> +	int (*xlate_config)(struct at91_ebi_dev *ebid);
> +	int (*apply_config)(struct at91_ebi_dev *ebid);
> +	int (*init)(struct at91_ebi *ebi);
> +};
> +
> +struct at91_ebi {
> +	struct clk *clk;
> +	struct regmap *smc;
> +	struct regmap *matrix;
> +
> +	struct regmap_field *ebi_csa;
> +
> +	struct device *dev;
> +	const struct at91_ebi_caps *caps;
> +	struct at91_ebi_dev *devs[AT91_MATRIX_EBI_NUM_CS];
> +	void *priv;
> +};
> +
> +static u32 at91sam9_smc_setup_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 32) {

I know it is the formula from the datasheet but please add a note to
refer to it.
So, a comment here or at the beginning of the function is needed.

> +		coded_cycles |= 1 << 5;
> +		if (cycles < 128)
> +			cycles = 0;
> +	}
> +
> +	coded_cycles |= cycles % 32;
> +
> +	return coded_cycles;
> +}
> +
> +static u32 at91sam9_smc_pulse_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 64) {

Ditto.

> +		coded_cycles |= 1 << 6;
> +		if (cycles < 256)
> +			cycles = 0;
> +	}
> +
> +	coded_cycles |= cycles % 64;
> +
> +	return coded_cycles;
> +}
> +
> +static u32 at91sam9_smc_cycle_ns_to_cycles(unsigned int clk_rate,
> +					   u32 timing_ns)
> +{
> +	u32 clk_period = DIV_ROUND_UP(NSEC_PER_SEC, clk_rate);
> +	u32 coded_cycles = 0;
> +	u32 cycles;
> +
> +	cycles = DIV_ROUND_UP(timing_ns, clk_period);
> +	if (cycles / 128) {

Ditto.

> +		coded_cycles = cycles / 256;
> +		cycles %= 256;
> +		if (cycles >= 128) {
> +			coded_cycles++;
> +			cycles = 0;
> +		}
> +
> +		if (coded_cycles > 0x3) {
> +			coded_cycles = 0x3;
> +			cycles = 0x7f;
> +		}
> +
> +		coded_cycles <<= 7;
> +	}
> +
> +	coded_cycles |= cycles % 128;
> +
> +	return coded_cycles;
> +}
> +
> +static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid)
> +{
> +	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct at91sam9_smc_timings *timings = &config->timings;
> +	struct at91sam9_smc_generic_fields *fields = ebid->ebi->priv;
> +	u32 val;
> +
> +	val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					      timings->ncs_rd_setup_ns) << 24;
> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->nrd_setup_ns) << 16;
> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->ncs_wr_setup_ns) << 8;

Well, I know it's easy to retrieve the meaning of these constants but
please I want a #define'd constant everywhere.


> +	val |= at91sam9_smc_setup_ns_to_cycles(clk_rate,
> +					       timings->nwe_setup_ns);
> +	regmap_fields_write(fields->setup, ebid->cs, val);
> +
> +	val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					      timings->ncs_rd_pulse_ns) << 24;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->nrd_pulse_ns) << 16;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->ncs_wr_pulse_ns) << 8;
> +	val |= at91sam9_smc_pulse_ns_to_cycles(clk_rate,
> +					       timings->nwe_pulse_ns);
> +	regmap_fields_write(fields->pulse, ebid->cs, val);
> +
> +	val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
> +					      timings->nrd_cycle_ns) << 16;
> +	val |= at91sam9_smc_cycle_ns_to_cycles(clk_rate,
> +					       timings->nwe_cycle_ns);
> +	regmap_fields_write(fields->cycle, ebid->cs, val);
> +
> +	val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
> +	if (val > 16)
> +		val = 16;

Ditto.


> +	regmap_fields_write(fields->mode, ebid->cs, config->mode | val << 16);
> +
> +	return 0;
> +}
> +
> +static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid)
> +{
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct at91sam9_smc_timings *timings;
> +	struct device_node *np = ebid->np;
> +
> +	timings = &config->timings;
> +
> +	of_property_read_u32(np, "atmel,ncs-rd-setup-ns",
> +			     &timings->ncs_rd_setup_ns);
> +	of_property_read_u32(np, "atmel,nrd-setup-ns",
> +			     &timings->nrd_setup_ns);
> +	of_property_read_u32(np, "atmel,ncs-wr-setup-ns",
> +			     &timings->ncs_wr_setup_ns);
> +	of_property_read_u32(np, "atmel,nwe-setup-ns",
> +			     &timings->nwe_setup_ns);
> +	of_property_read_u32(np, "atmel,ncs-rd-pulse-ns",
> +			     &timings->ncs_rd_pulse_ns);
> +	of_property_read_u32(np, "atmel,nrd-pulse-ns",
> +			     &timings->nrd_pulse_ns);
> +	of_property_read_u32(np, "atmel,ncs-wr-pulse-ns",
> +			     &timings->ncs_wr_pulse_ns);
> +	of_property_read_u32(np, "atmel,nwe-pulse-ns", &timings->nwe_pulse_ns);
> +	of_property_read_u32(np, "atmel,nwe-cycle-ns", &timings->nwe_cycle_ns);
> +	of_property_read_u32(np, "atmel,nrd-cycle-ns", &timings->nrd_cycle_ns);
> +	of_property_read_u32(np, "atmel,tdf-ns", &timings->tdf_ns);
> +
> +	return 0;
> +}
> +
> +static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid)
> +{
> +	struct at91sam9_ebi_dev_config *config = ebid->config;
> +	struct device_node *np = ebid->np;
> +	const char *tmp_str;
> +	u32 tmp;
> +	int ret;
> +
> +	config = devm_kzalloc(ebid->ebi->dev, sizeof(*config), GFP_KERNEL);
> +	if (!config)
> +		return -ENOMEM;
> +
> +	ebid->config = config;
> +
> +	ret = of_property_read_u32(np, "atmel,bus-width", &tmp);
> +	if (ret)
> +		return ret;
> +
> +	switch (tmp) {
> +	case 8:
> +		config->mode |= AT91_SMC_DBW_8;
> +		break;
> +
> +	case 16:
> +		config->mode |= AT91_SMC_DBW_16;
> +		break;
> +
> +	case 32:
> +		config->mode |= AT91_SMC_DBW_32;
> +		break;
> +
> +	default:
> +		return -EINVAL;
> +	}
> +
> +	if (of_property_read_bool(np, "atmel,tdf-optimized"))
> +		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,byte-access-type", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "write"))
> +		config->mode |= AT91_SMC_BAT_WRITE;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,read-mode", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "nrd"))
> +		config->mode |= AT91_SMC_READMODE_NRD;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,write-mode", &tmp_str);
> +	if (tmp_str && !strcmp(tmp_str, "nwe"))
> +		config->mode |= AT91_SMC_WRITEMODE_NWE;
> +
> +	tmp_str = NULL;
> +	of_property_read_string(np, "atmel,exnw-mode", &tmp_str);
> +	if (tmp_str) {
> +		if (!strcmp(tmp_str, "frozen"))
> +			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
> +		else if (!strcmp(tmp_str, "ready"))
> +			config->mode |= AT91_SMC_EXNWMODE_READY;
> +	}
> +
> +	tmp = 0;
> +	ret = of_property_read_u32(np, "atmel,page-mode", &tmp);
> +	if (!ret) {
> +		switch (tmp) {
> +		case 4:
> +			config->mode |= AT91_SMC_PS_4;
> +			break;
> +
> +		case 8:
> +			config->mode |= AT91_SMC_PS_8;
> +			break;
> +
> +		case 16:
> +			config->mode |= AT91_SMC_PS_16;
> +			break;
> +
> +		case 32:
> +			config->mode |= AT91_SMC_PS_32;
> +			break;
> +
> +		default:
> +			return -EINVAL;
> +		}
> +
> +		config->mode |= AT91_SMC_PMEN;
> +	}
> +
> +	return at91sam9_smc_xslate_timings(ebid);
> +}
> +
> +static int at91sam9_ebi_init(struct at91_ebi *ebi)
> +{
> +	struct at91sam9_smc_generic_fields *fields;
> +	struct reg_field field = REG_FIELD(0, 0, 31);
> +
> +	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
> +	if (!fields)
> +		return -ENOMEM;
> +
> +	field.id_size = fls(ebi->caps->available_cs);
> +	field.id_offset = 0x10;

A #define'd constant here please...

> +
> +	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->setup))
> +		return PTR_ERR(fields->setup);
> +
> +	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->pulse))
> +		return PTR_ERR(fields->pulse);
> +
> +	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->cycle))
> +		return PTR_ERR(fields->cycle);
> +
> +	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC_OFFSET);
> +	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->mode))
> +		return PTR_ERR(fields->mode);
> +
> +	ebi->priv = fields;
> +
> +	return 0;
> +}
> +
> +static int sama5d3_ebi_init(struct at91_ebi *ebi)
> +{
> +	struct at91sam9_smc_generic_fields *fields;
> +	struct reg_field field = REG_FIELD(0, 0, 31);
> +
> +	fields = devm_kzalloc(ebi->dev, sizeof(*fields), GFP_KERNEL);
> +	if (!fields)
> +		return -ENOMEM;
> +
> +	field.id_size = fls(ebi->caps->available_cs);
> +	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;

...Just like here ^^^

> +
> +	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->setup))
> +		return PTR_ERR(fields->setup);
> +
> +	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->pulse))
> +		return PTR_ERR(fields->pulse);
> +
> +	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->cycle))
> +		return PTR_ERR(fields->cycle);
> +
> +	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC_OFFSET);
> +	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
> +	if (IS_ERR(fields->mode))
> +		return PTR_ERR(fields->mode);
> +
> +	ebi->priv = fields;
> +
> +	return 0;
> +}
> +
> +static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np)
> +{
> +	struct device *dev = ebi->dev;
> +	struct device_node *dev_np;
> +	struct at91_ebi_dev *ebid;
> +	u32 tmp;
> +	int ret;
> +
> +	dev_np = of_get_next_child(np, NULL);
> +	if (!dev_np)
> +		return -EINVAL;
> +
> +	if (!of_device_is_available(dev_np))
> +		return 0;
> +
> +	ebid = devm_kzalloc(ebi->dev, sizeof(*ebid), GFP_KERNEL);
> +	if (!ebid)
> +		return -ENOMEM;
> +
> +	ret = of_property_read_u32(dev_np, "reg" , &tmp);
> +	if (ret < 0) {
> +		dev_err(dev, "missing mandatory reg property\n");
> +		return ret;
> +	}
> +
> +	if (tmp > AT91_MATRIX_EBI_NUM_CS ||
> +	    !(BIT(tmp) & ebi->caps->available_cs)) {
> +		dev_err(dev, "invalid reg property\n");
> +		return -EINVAL;
> +	}
> +
> +	ebid->cs = tmp;
> +	ebid->np = np;
> +	ebid->ebi = ebi;
> +
> +	if (!of_property_read_bool(np, "atmel,generic-dev"))
> +		goto populate;
> +
> +	if (ebid->ebi->ebi_csa)
> +		regmap_field_update_bits(ebid->ebi->ebi_csa,
> +					 BIT(ebid->cs),
> +					 ~BIT(ebid->cs));
> +
> +	ret = ebid->ebi->caps->xlate_config(ebid);
> +	if (ret)
> +		return ret;
> +
> +	ret = ebid->ebi->caps->apply_config(ebid);
> +	if (ret)
> +		return ret;
> +	ebi->devs[ebid->cs] = ebid;
> +
> +populate:
> +	return of_platform_populate(np, of_default_bus_match_table, NULL, dev);
> +}
> +
> +static const struct reg_field at91sam9260_ebi_csa =
> +				REG_FIELD(AT91SAM9260_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9260_ebi_caps = {
> +	.available_cs = 0xff,
> +	.ebi_csa = &at91sam9260_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9261_ebi_csa =
> +				REG_FIELD(AT91SAM9261_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9261_ebi_caps = {
> +	.available_cs = 0xff,
> +	.ebi_csa = &at91sam9261_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9263_ebi0_csa =
> +				REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9263_ebi0_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9263_ebi1_csa =
> +				REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
> +	.available_cs = 0x7,
> +	.ebi_csa = &at91sam9263_ebi1_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct reg_field at91sam9g45_ebi_csa =
> +				REG_FIELD(AT91SAM9G45_MATRIX_EBICSA_OFF, 0,
> +					  AT91_MATRIX_EBI_NUM_CS - 1);
> +
> +static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9g45_ebi_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
> +	.available_cs = 0x3f,
> +	.ebi_csa = &at91sam9263_ebi0_csa,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = at91sam9_ebi_init,
> +};
> +
> +static const struct at91_ebi_caps sama5d3_ebi_caps = {
> +	.available_cs = 0xf,
> +	.xlate_config = at91sam9_ebi_xslate_config,
> +	.apply_config = at91sam9_ebi_apply_config,
> +	.init = sama5d3_ebi_init,
> +};
> +
> +static const struct of_device_id at91_ebi_id_table[] = {
> +	{
> +		.compatible = "atmel,at91sam9260-ebi",
> +		.data = &at91sam9260_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9261-ebi",
> +		.data = &at91sam9261_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9263-ebi0",
> +		.data = &at91sam9263_ebi0_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9263-ebi1",
> +		.data = &at91sam9263_ebi1_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9g45-ebi",
> +		.data = &at91sam9g45_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,at91sam9x5-ebi",
> +		.data = &at91sam9x5_ebi_caps,
> +	},
> +	{
> +		.compatible = "atmel,sama5d3-ebi",
> +		.data = &sama5d3_ebi_caps,
> +	},
> +	{ /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, at91_ebi_id_table);
> +
> +static int at91_ebi_probe(struct platform_device *pdev)
> +{
> +	const struct of_device_id *match;
> +	struct device_node *child;
> +	struct at91_ebi *ebi;
> +	struct clk *clk;
> +	int ret;
> +
> +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> +	if (!match || !match->data)
> +		return -EINVAL;
> +
> +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> +	if (!ebi)
> +		return -ENOMEM;
> +
> +	ebi->caps = match->data;
> +	ebi->dev = &pdev->dev;
> +
> +	clk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(clk))
> +		return PTR_ERR(clk);
> +
> +	ebi->clk = clk;
> +
> +	ebi->smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
> +						   "atmel,smc");
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);
> +
> +	/*
> +	 * The sama5d3 does not provide an EBICSA register and thus does need
> +	 * to access the matrix registers.
> +	 */
> +	if (ebi->caps->ebi_csa) {
> +		ebi->matrix =
> +			syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
> +							"atmel,matrix");
> +		if (IS_ERR(ebi->matrix))
> +			return PTR_ERR(ebi->matrix);
> +
> +		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
> +						  *ebi->caps->ebi_csa);
> +		if (IS_ERR(ebi->ebi_csa))
> +			return PTR_ERR(ebi->ebi_csa);
> +	}
> +
> +	ret = ebi->caps->init(ebi);
> +	if (ret)
> +		return ret;
> +
> +	for_each_child_of_node(pdev->dev.of_node, child) {
> +		ret = at91_ebi_dev_setup(ebi, child);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return ret;
> +}
> +
> +static struct platform_driver at91_ebi_driver = {
> +	.driver = {
> +		.name = "atmel-ebi",
> +		.of_match_table	= at91_ebi_id_table,
> +	},
> +};
> +module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
> +
> +MODULE_AUTHOR("JJ Hiblot");
> +MODULE_DESCRIPTION("Atmel's EBI driver");
> +MODULE_LICENSE("GPL");
> 


-- 
Nicolas Ferre

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

On Wed, 3 Dec 2014 16:15:36 +0100
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:

> Le 03/12/2014 15:56, Nicolas Ferre a écrit :
> > Le 01/12/2014 11:27, Boris Brezillon a écrit :
> >> The EBI (External Bus Interface) is used to access external peripherals
> >> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> >> Each device is assigned a CS line and an address range and can have its
> >> own configuration (timings, access mode, bus width, ...).
> >> This driver provides a generic DT binding to configure a device according
> >> to its requirements.
> >> For specific device controllers (like the NAND one) the SMC timings
> >> should be configured by the controller driver through the matrix and smc
> >> syscon regmaps.
> >>
> >> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> >> ---
> >>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> >>  1 file changed, 155 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >> new file mode 100644
> >> index 0000000..3749ea1
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >> @@ -0,0 +1,155 @@
> >> +* Device tree bindings for Atmel EBI
> >> +
> >> +The External Bus Interface (EBI) controller is a bus where you can connect
> >> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> >> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> >> +(Static Memory Controller).
> >> +Synchronous memories (and some asynchronous memories like NANDs) can be
> >> +attached to specialized controllers which are responsible for configuring the
> >> +bus appropriately according to the connected device.
> >> +In the other hand, the bus interface can be automated for simple asynchronous
> >> +devices.
> >> +
> >> +Required properties:
> >> +
> >> +- compatible:		"atmel,at91sam9260-ebi"
> >> +			"atmel,at91sam9261-ebi"
> >> +			"atmel,at91sam9263-ebi0"
> >> +			"atmel,at91sam9263-ebi1"
> > 
> > Ditto: 9263 twice.
> > 
> >> +			"atmel,at91sam9g45-ebi"
> >> +			"atmel,at91sam9x5-ebi"
> >> +			"atmel,sama5d3-ebi"
> >> +
> >> +- reg:			Contains offset/length value for EBI memory mapping.
> >> +			This property might contain several entries if the EBI
> >> +			memory range is not contiguous
> >> +
> >> +- #address-cells:	Must be 2.
> >> +			The first cell encodes the CS.
> >> +			The second cell encode the offset into the CS memory
> >> +			range.
> >> +
> >> +- #size-cells:		Must be set to 1.
> >> +
> >> +- ranges:		Encodes CS to memory region association.
> >> +
> >> +- clocks:		Clock feeding the EBI controller.
> >> +			See clock-bindings.txt
> >> +
> >> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> >> +such as NOR (e.g. cfi-flash) and NAND.
> >> +There might be board specific devices like FPGAs.
> >> +You'll define you device requirements in these child nodes.
> >> +
> >> +Required child cs node properties:
> >> +
> >> +- #address-cells:	Must be 2.
> >> +
> >> +- #size-cells:		Must be 1.
> >> +
> >> +- ranges:		Empty property indicating that child nodes can inherit
> >> +			memory layout.
> >> +
> >> +Optional child cs node properties:
> >> +- atmel,generic-dev		boolean property specifying if the device is
> >> +				a generic device.
> 
> Well... no real information, specify right here what a "generic device" is.

I do not describe what a generic device is, but the description of a
specialized device is given just below.

Maybe I haven't chosen the appropriate word here.
The datasheet gives the following description:


> 
> >> +				The following properties are only parsed if
> >> +				this property is present.
> >> +				Specialized devices are attached to specialized
> >> +				controllers which are responsible for
> >> +				configuring the bus appropriately.
> >> +				Here are some examples of specialized
> >> +				controllers: NAND, CompactFlash, SDR-SDRAM.
> >> +
> >> +- atmel,bus-width:		width of the asynchronous device's data bus
> >> +				8, 16 or 32.
> >> +				8 if not present.
> >> +
> >> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> >> +				"select" if not present.
> >> +
> >> +- atmel,read-mode		"nrd" or "ncs".
> >> +				"ncs" is not present.
> >> +
> >> +- atmel,write-mode		"nwe" or "ncs".
> >> +				"ncs" is not present.
> >> +
> >> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> >> +				"disabled" if not present.
> >> +
> >> +- atmel,page-mode		enable page mode if present. The provided value
> >> +				defines the page size (supported values: 4, 8,
> >> +				16 and 32).
> >> +
> >> +Optional device timings expressed in nanoseconds (if the property is not
> >> +present 0 is assumed):
> >> +
> >> +- atmel,ncs-rd-setup-ns
> >> +- atmel,nrd-setup-ns
> >> +- atmel,ncs-wr-setup-ns
> >> +- atmel,nwe-setup-ns
> >> +- atmel,ncs-rd-pulse-ns
> >> +- atmel,nrd-pulse-ns
> >> +- atmel,ncs-wr-pulse-ns
> >> +- atmel,nwe-pulse-ns
> >> +- atmel,nwe-cycle-ns
> >> +- atmel,nrd-cycle-ns
> >> +- atmel,tdf-ns
> >> +
> >> +- atmel,tdf-optimized		data float optimized mode. If present the data
> >> +				float time is optimized depending on the next
> >> +				device being accessed (next device setup
> >> +				time is substracted to the current devive data
> > 
> > Typo: subtract, device
> > 
> >> +				float time).
> >> +
> >> +
> >> +
> >> +Example:
> >> +
> >> +	ebi: ebi@10000000 {
> >> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
> >> +		#address-cells = <2>;
> >> +		#size-cells = <1>;
> >> +		atmel,smc = <&hsmc>;
> >> +		atmel,matrix = <&matrix>;
> >> +		reg = <0x10000000 0x10000000
> >> +		       0x40000000 0x30000000>;
> >> +		ranges = <0x0 0x0 0x10000000 0x10000000
> >> +			  0x1 0x0 0x40000000 0x10000000
> >> +			  0x2 0x0 0x50000000 0x10000000
> >> +			  0x3 0x0 0x60000000 0x10000000>;
> >> +		clocks = <&mck>;
> >> +
> >> +		pinctrl-names = "default";
> >> +		pinctrl-0 = <&pinctrl_ebi_addr>;
> >> +
> >> +		cs@0 {
> >> +			#address-cells = <2>;
> >> +			#size-cells = <1>;
> >> +			ranges;
> >> +			atmel,generic-dev;
> >> +			atmel,read-mode = "nrd";
> >> +			atmel,write-mode = "nwe";
> >> +			atmel,bus-width = <16>;
> >> +			atmel,ncs-rd-setup-ns = <0>;
> >> +			atmel,ncs-wr-setup-ns = <0>;
> >> +			atmel,nwe-setup-ns = <8>;
> >> +			atmel,nrd-setup-ns = <16>;
> >> +			atmel,ncs-rd-pulse-ns = <84>;
> >> +			atmel,ncs-wr-pulse-ns = <84>;
> >> +			atmel,nrd-pulse-ns = <76>;
> >> +			atmel,nwe-pulse-ns = <76>;
> >> +			atmel,nrd-cycle-ns = <107>;
> >> +			atmel,nwe-cycle-ns = <84>;
> >> +			atmel,tdf-ns = <16>;
> >> +
> >> +			nor: flash@0,0 {
> >> +				compatible = "cfi-flash";
> >> +				#address-cells = <1>;
> >> +				#size-cells = <1>;
> >> +				reg = <0x0 0x0 0x1000000>;
> >> +				bank-width = <2>;
> >> +			};
> >> +		};
> >> +	};
> >> +
> >>
> > 
> > 
> 
> 



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

On Wed, 3 Dec 2014 16:15:36 +0100
Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org> wrote:

> Le 03/12/2014 15:56, Nicolas Ferre a écrit :
> > Le 01/12/2014 11:27, Boris Brezillon a écrit :
> >> The EBI (External Bus Interface) is used to access external peripherals
> >> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> >> Each device is assigned a CS line and an address range and can have its
> >> own configuration (timings, access mode, bus width, ...).
> >> This driver provides a generic DT binding to configure a device according
> >> to its requirements.
> >> For specific device controllers (like the NAND one) the SMC timings
> >> should be configured by the controller driver through the matrix and smc
> >> syscon regmaps.
> >>
> >> Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> >> ---
> >>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> >>  1 file changed, 155 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >> new file mode 100644
> >> index 0000000..3749ea1
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >> @@ -0,0 +1,155 @@
> >> +* Device tree bindings for Atmel EBI
> >> +
> >> +The External Bus Interface (EBI) controller is a bus where you can connect
> >> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> >> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> >> +(Static Memory Controller).
> >> +Synchronous memories (and some asynchronous memories like NANDs) can be
> >> +attached to specialized controllers which are responsible for configuring the
> >> +bus appropriately according to the connected device.
> >> +In the other hand, the bus interface can be automated for simple asynchronous
> >> +devices.
> >> +
> >> +Required properties:
> >> +
> >> +- compatible:		"atmel,at91sam9260-ebi"
> >> +			"atmel,at91sam9261-ebi"
> >> +			"atmel,at91sam9263-ebi0"
> >> +			"atmel,at91sam9263-ebi1"
> > 
> > Ditto: 9263 twice.
> > 
> >> +			"atmel,at91sam9g45-ebi"
> >> +			"atmel,at91sam9x5-ebi"
> >> +			"atmel,sama5d3-ebi"
> >> +
> >> +- reg:			Contains offset/length value for EBI memory mapping.
> >> +			This property might contain several entries if the EBI
> >> +			memory range is not contiguous
> >> +
> >> +- #address-cells:	Must be 2.
> >> +			The first cell encodes the CS.
> >> +			The second cell encode the offset into the CS memory
> >> +			range.
> >> +
> >> +- #size-cells:		Must be set to 1.
> >> +
> >> +- ranges:		Encodes CS to memory region association.
> >> +
> >> +- clocks:		Clock feeding the EBI controller.
> >> +			See clock-bindings.txt
> >> +
> >> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> >> +such as NOR (e.g. cfi-flash) and NAND.
> >> +There might be board specific devices like FPGAs.
> >> +You'll define you device requirements in these child nodes.
> >> +
> >> +Required child cs node properties:
> >> +
> >> +- #address-cells:	Must be 2.
> >> +
> >> +- #size-cells:		Must be 1.
> >> +
> >> +- ranges:		Empty property indicating that child nodes can inherit
> >> +			memory layout.
> >> +
> >> +Optional child cs node properties:
> >> +- atmel,generic-dev		boolean property specifying if the device is
> >> +				a generic device.
> 
> Well... no real information, specify right here what a "generic device" is.

I do not describe what a generic device is, but the description of a
specialized device is given just below.

Maybe I haven't chosen the appropriate word here.
The datasheet gives the following description:


> 
> >> +				The following properties are only parsed if
> >> +				this property is present.
> >> +				Specialized devices are attached to specialized
> >> +				controllers which are responsible for
> >> +				configuring the bus appropriately.
> >> +				Here are some examples of specialized
> >> +				controllers: NAND, CompactFlash, SDR-SDRAM.
> >> +
> >> +- atmel,bus-width:		width of the asynchronous device's data bus
> >> +				8, 16 or 32.
> >> +				8 if not present.
> >> +
> >> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> >> +				"select" if not present.
> >> +
> >> +- atmel,read-mode		"nrd" or "ncs".
> >> +				"ncs" is not present.
> >> +
> >> +- atmel,write-mode		"nwe" or "ncs".
> >> +				"ncs" is not present.
> >> +
> >> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> >> +				"disabled" if not present.
> >> +
> >> +- atmel,page-mode		enable page mode if present. The provided value
> >> +				defines the page size (supported values: 4, 8,
> >> +				16 and 32).
> >> +
> >> +Optional device timings expressed in nanoseconds (if the property is not
> >> +present 0 is assumed):
> >> +
> >> +- atmel,ncs-rd-setup-ns
> >> +- atmel,nrd-setup-ns
> >> +- atmel,ncs-wr-setup-ns
> >> +- atmel,nwe-setup-ns
> >> +- atmel,ncs-rd-pulse-ns
> >> +- atmel,nrd-pulse-ns
> >> +- atmel,ncs-wr-pulse-ns
> >> +- atmel,nwe-pulse-ns
> >> +- atmel,nwe-cycle-ns
> >> +- atmel,nrd-cycle-ns
> >> +- atmel,tdf-ns
> >> +
> >> +- atmel,tdf-optimized		data float optimized mode. If present the data
> >> +				float time is optimized depending on the next
> >> +				device being accessed (next device setup
> >> +				time is substracted to the current devive data
> > 
> > Typo: subtract, device
> > 
> >> +				float time).
> >> +
> >> +
> >> +
> >> +Example:
> >> +
> >> +	ebi: ebi@10000000 {
> >> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
> >> +		#address-cells = <2>;
> >> +		#size-cells = <1>;
> >> +		atmel,smc = <&hsmc>;
> >> +		atmel,matrix = <&matrix>;
> >> +		reg = <0x10000000 0x10000000
> >> +		       0x40000000 0x30000000>;
> >> +		ranges = <0x0 0x0 0x10000000 0x10000000
> >> +			  0x1 0x0 0x40000000 0x10000000
> >> +			  0x2 0x0 0x50000000 0x10000000
> >> +			  0x3 0x0 0x60000000 0x10000000>;
> >> +		clocks = <&mck>;
> >> +
> >> +		pinctrl-names = "default";
> >> +		pinctrl-0 = <&pinctrl_ebi_addr>;
> >> +
> >> +		cs@0 {
> >> +			#address-cells = <2>;
> >> +			#size-cells = <1>;
> >> +			ranges;
> >> +			atmel,generic-dev;
> >> +			atmel,read-mode = "nrd";
> >> +			atmel,write-mode = "nwe";
> >> +			atmel,bus-width = <16>;
> >> +			atmel,ncs-rd-setup-ns = <0>;
> >> +			atmel,ncs-wr-setup-ns = <0>;
> >> +			atmel,nwe-setup-ns = <8>;
> >> +			atmel,nrd-setup-ns = <16>;
> >> +			atmel,ncs-rd-pulse-ns = <84>;
> >> +			atmel,ncs-wr-pulse-ns = <84>;
> >> +			atmel,nrd-pulse-ns = <76>;
> >> +			atmel,nwe-pulse-ns = <76>;
> >> +			atmel,nrd-cycle-ns = <107>;
> >> +			atmel,nwe-cycle-ns = <84>;
> >> +			atmel,tdf-ns = <16>;
> >> +
> >> +			nor: flash@0,0 {
> >> +				compatible = "cfi-flash";
> >> +				#address-cells = <1>;
> >> +				#size-cells = <1>;
> >> +				reg = <0x0 0x0 0x1000000>;
> >> +				bank-width = <2>;
> >> +			};
> >> +		};
> >> +	};
> >> +
> >>
> > 
> > 
> 
> 



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

On Wed, 3 Dec 2014 16:15:36 +0100
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:

> Le 03/12/2014 15:56, Nicolas Ferre a ?crit :
> > Le 01/12/2014 11:27, Boris Brezillon a ?crit :
> >> The EBI (External Bus Interface) is used to access external peripherals
> >> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> >> Each device is assigned a CS line and an address range and can have its
> >> own configuration (timings, access mode, bus width, ...).
> >> This driver provides a generic DT binding to configure a device according
> >> to its requirements.
> >> For specific device controllers (like the NAND one) the SMC timings
> >> should be configured by the controller driver through the matrix and smc
> >> syscon regmaps.
> >>
> >> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> >> ---
> >>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> >>  1 file changed, 155 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >>
> >> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >> new file mode 100644
> >> index 0000000..3749ea1
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> >> @@ -0,0 +1,155 @@
> >> +* Device tree bindings for Atmel EBI
> >> +
> >> +The External Bus Interface (EBI) controller is a bus where you can connect
> >> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> >> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> >> +(Static Memory Controller).
> >> +Synchronous memories (and some asynchronous memories like NANDs) can be
> >> +attached to specialized controllers which are responsible for configuring the
> >> +bus appropriately according to the connected device.
> >> +In the other hand, the bus interface can be automated for simple asynchronous
> >> +devices.
> >> +
> >> +Required properties:
> >> +
> >> +- compatible:		"atmel,at91sam9260-ebi"
> >> +			"atmel,at91sam9261-ebi"
> >> +			"atmel,at91sam9263-ebi0"
> >> +			"atmel,at91sam9263-ebi1"
> > 
> > Ditto: 9263 twice.
> > 
> >> +			"atmel,at91sam9g45-ebi"
> >> +			"atmel,at91sam9x5-ebi"
> >> +			"atmel,sama5d3-ebi"
> >> +
> >> +- reg:			Contains offset/length value for EBI memory mapping.
> >> +			This property might contain several entries if the EBI
> >> +			memory range is not contiguous
> >> +
> >> +- #address-cells:	Must be 2.
> >> +			The first cell encodes the CS.
> >> +			The second cell encode the offset into the CS memory
> >> +			range.
> >> +
> >> +- #size-cells:		Must be set to 1.
> >> +
> >> +- ranges:		Encodes CS to memory region association.
> >> +
> >> +- clocks:		Clock feeding the EBI controller.
> >> +			See clock-bindings.txt
> >> +
> >> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> >> +such as NOR (e.g. cfi-flash) and NAND.
> >> +There might be board specific devices like FPGAs.
> >> +You'll define you device requirements in these child nodes.
> >> +
> >> +Required child cs node properties:
> >> +
> >> +- #address-cells:	Must be 2.
> >> +
> >> +- #size-cells:		Must be 1.
> >> +
> >> +- ranges:		Empty property indicating that child nodes can inherit
> >> +			memory layout.
> >> +
> >> +Optional child cs node properties:
> >> +- atmel,generic-dev		boolean property specifying if the device is
> >> +				a generic device.
> 
> Well... no real information, specify right here what a "generic device" is.

I do not describe what a generic device is, but the description of a
specialized device is given just below.

Maybe I haven't chosen the appropriate word here.
The datasheet gives the following description:


> 
> >> +				The following properties are only parsed if
> >> +				this property is present.
> >> +				Specialized devices are attached to specialized
> >> +				controllers which are responsible for
> >> +				configuring the bus appropriately.
> >> +				Here are some examples of specialized
> >> +				controllers: NAND, CompactFlash, SDR-SDRAM.
> >> +
> >> +- atmel,bus-width:		width of the asynchronous device's data bus
> >> +				8, 16 or 32.
> >> +				8 if not present.
> >> +
> >> +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> >> +				"select" if not present.
> >> +
> >> +- atmel,read-mode		"nrd" or "ncs".
> >> +				"ncs" is not present.
> >> +
> >> +- atmel,write-mode		"nwe" or "ncs".
> >> +				"ncs" is not present.
> >> +
> >> +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> >> +				"disabled" if not present.
> >> +
> >> +- atmel,page-mode		enable page mode if present. The provided value
> >> +				defines the page size (supported values: 4, 8,
> >> +				16 and 32).
> >> +
> >> +Optional device timings expressed in nanoseconds (if the property is not
> >> +present 0 is assumed):
> >> +
> >> +- atmel,ncs-rd-setup-ns
> >> +- atmel,nrd-setup-ns
> >> +- atmel,ncs-wr-setup-ns
> >> +- atmel,nwe-setup-ns
> >> +- atmel,ncs-rd-pulse-ns
> >> +- atmel,nrd-pulse-ns
> >> +- atmel,ncs-wr-pulse-ns
> >> +- atmel,nwe-pulse-ns
> >> +- atmel,nwe-cycle-ns
> >> +- atmel,nrd-cycle-ns
> >> +- atmel,tdf-ns
> >> +
> >> +- atmel,tdf-optimized		data float optimized mode. If present the data
> >> +				float time is optimized depending on the next
> >> +				device being accessed (next device setup
> >> +				time is substracted to the current devive data
> > 
> > Typo: subtract, device
> > 
> >> +				float time).
> >> +
> >> +
> >> +
> >> +Example:
> >> +
> >> +	ebi: ebi at 10000000 {
> >> +		compatible = "atmel,sama5d3-ebi", "simple-bus";
> >> +		#address-cells = <2>;
> >> +		#size-cells = <1>;
> >> +		atmel,smc = <&hsmc>;
> >> +		atmel,matrix = <&matrix>;
> >> +		reg = <0x10000000 0x10000000
> >> +		       0x40000000 0x30000000>;
> >> +		ranges = <0x0 0x0 0x10000000 0x10000000
> >> +			  0x1 0x0 0x40000000 0x10000000
> >> +			  0x2 0x0 0x50000000 0x10000000
> >> +			  0x3 0x0 0x60000000 0x10000000>;
> >> +		clocks = <&mck>;
> >> +
> >> +		pinctrl-names = "default";
> >> +		pinctrl-0 = <&pinctrl_ebi_addr>;
> >> +
> >> +		cs at 0 {
> >> +			#address-cells = <2>;
> >> +			#size-cells = <1>;
> >> +			ranges;
> >> +			atmel,generic-dev;
> >> +			atmel,read-mode = "nrd";
> >> +			atmel,write-mode = "nwe";
> >> +			atmel,bus-width = <16>;
> >> +			atmel,ncs-rd-setup-ns = <0>;
> >> +			atmel,ncs-wr-setup-ns = <0>;
> >> +			atmel,nwe-setup-ns = <8>;
> >> +			atmel,nrd-setup-ns = <16>;
> >> +			atmel,ncs-rd-pulse-ns = <84>;
> >> +			atmel,ncs-wr-pulse-ns = <84>;
> >> +			atmel,nrd-pulse-ns = <76>;
> >> +			atmel,nwe-pulse-ns = <76>;
> >> +			atmel,nrd-cycle-ns = <107>;
> >> +			atmel,nwe-cycle-ns = <84>;
> >> +			atmel,tdf-ns = <16>;
> >> +
> >> +			nor: flash at 0,0 {
> >> +				compatible = "cfi-flash";
> >> +				#address-cells = <1>;
> >> +				#size-cells = <1>;
> >> +				reg = <0x0 0x0 0x1000000>;
> >> +				bank-width = <2>;
> >> +			};
> >> +		};
> >> +	};
> >> +
> >>
> > 
> > 
> 
> 



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

Sorry for the noise, I sent the email before finishing my answer.

On Wed, 3 Dec 2014 16:34:49 +0100
Boris Brezillon <boris.brezillon@free-electrons.com> wrote:

> On Wed, 3 Dec 2014 16:15:36 +0100
> Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
> 
> > Le 03/12/2014 15:56, Nicolas Ferre a écrit :
> > > Le 01/12/2014 11:27, Boris Brezillon a écrit :
> > >> The EBI (External Bus Interface) is used to access external peripherals
> > >> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > >> Each device is assigned a CS line and an address range and can have its
> > >> own configuration (timings, access mode, bus width, ...).
> > >> This driver provides a generic DT binding to configure a device according
> > >> to its requirements.
> > >> For specific device controllers (like the NAND one) the SMC timings
> > >> should be configured by the controller driver through the matrix and smc
> > >> syscon regmaps.
> > >>
> > >> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > >> ---
> > >>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> > >>  1 file changed, 155 insertions(+)
> > >>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >>
> > >> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >> new file mode 100644
> > >> index 0000000..3749ea1
> > >> --- /dev/null
> > >> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >> @@ -0,0 +1,155 @@
> > >> +* Device tree bindings for Atmel EBI
> > >> +
> > >> +The External Bus Interface (EBI) controller is a bus where you can connect
> > >> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> > >> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> > >> +(Static Memory Controller).
> > >> +Synchronous memories (and some asynchronous memories like NANDs) can be
> > >> +attached to specialized controllers which are responsible for configuring the
> > >> +bus appropriately according to the connected device.
> > >> +In the other hand, the bus interface can be automated for simple asynchronous
> > >> +devices.
> > >> +
> > >> +Required properties:
> > >> +
> > >> +- compatible:		"atmel,at91sam9260-ebi"
> > >> +			"atmel,at91sam9261-ebi"
> > >> +			"atmel,at91sam9263-ebi0"
> > >> +			"atmel,at91sam9263-ebi1"
> > > 
> > > Ditto: 9263 twice.
> > > 
> > >> +			"atmel,at91sam9g45-ebi"
> > >> +			"atmel,at91sam9x5-ebi"
> > >> +			"atmel,sama5d3-ebi"
> > >> +
> > >> +- reg:			Contains offset/length value for EBI memory mapping.
> > >> +			This property might contain several entries if the EBI
> > >> +			memory range is not contiguous
> > >> +
> > >> +- #address-cells:	Must be 2.
> > >> +			The first cell encodes the CS.
> > >> +			The second cell encode the offset into the CS memory
> > >> +			range.
> > >> +
> > >> +- #size-cells:		Must be set to 1.
> > >> +
> > >> +- ranges:		Encodes CS to memory region association.
> > >> +
> > >> +- clocks:		Clock feeding the EBI controller.
> > >> +			See clock-bindings.txt
> > >> +
> > >> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> > >> +such as NOR (e.g. cfi-flash) and NAND.
> > >> +There might be board specific devices like FPGAs.
> > >> +You'll define you device requirements in these child nodes.
> > >> +
> > >> +Required child cs node properties:
> > >> +
> > >> +- #address-cells:	Must be 2.
> > >> +
> > >> +- #size-cells:		Must be 1.
> > >> +
> > >> +- ranges:		Empty property indicating that child nodes can inherit
> > >> +			memory layout.
> > >> +
> > >> +Optional child cs node properties:
> > >> +- atmel,generic-dev		boolean property specifying if the device is
> > >> +				a generic device.
> > 
> > Well... no real information, specify right here what a "generic device" is.
> 
> I do not describe what a generic device is, but the description of a
> specialized device is given just below.
> 
> Maybe I haven't chosen the appropriate word here.
> The datasheet gives the following description:

• EBI_CS4A: EBI Chip Select 4 Assignment
0 = EBI Chip Select 4 is only assigned to the Static Memory Controller
    and EBI_NCS4 behaves as defined by the SMC.
1 = EBI Chip Select 4 is assigned to the Static Memory Controller and
    the CompactFlash Logic (first slot) is activated.

What about using "atmel,generic-logic" instead of
"atmel,generic-dev" ?


-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

Sorry for the noise, I sent the email before finishing my answer.

On Wed, 3 Dec 2014 16:34:49 +0100
Boris Brezillon <boris.brezillon@free-electrons.com> wrote:

> On Wed, 3 Dec 2014 16:15:36 +0100
> Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
> 
> > Le 03/12/2014 15:56, Nicolas Ferre a écrit :
> > > Le 01/12/2014 11:27, Boris Brezillon a écrit :
> > >> The EBI (External Bus Interface) is used to access external peripherals
> > >> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > >> Each device is assigned a CS line and an address range and can have its
> > >> own configuration (timings, access mode, bus width, ...).
> > >> This driver provides a generic DT binding to configure a device according
> > >> to its requirements.
> > >> For specific device controllers (like the NAND one) the SMC timings
> > >> should be configured by the controller driver through the matrix and smc
> > >> syscon regmaps.
> > >>
> > >> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > >> ---
> > >>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> > >>  1 file changed, 155 insertions(+)
> > >>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >>
> > >> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >> new file mode 100644
> > >> index 0000000..3749ea1
> > >> --- /dev/null
> > >> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >> @@ -0,0 +1,155 @@
> > >> +* Device tree bindings for Atmel EBI
> > >> +
> > >> +The External Bus Interface (EBI) controller is a bus where you can connect
> > >> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> > >> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> > >> +(Static Memory Controller).
> > >> +Synchronous memories (and some asynchronous memories like NANDs) can be
> > >> +attached to specialized controllers which are responsible for configuring the
> > >> +bus appropriately according to the connected device.
> > >> +In the other hand, the bus interface can be automated for simple asynchronous
> > >> +devices.
> > >> +
> > >> +Required properties:
> > >> +
> > >> +- compatible:		"atmel,at91sam9260-ebi"
> > >> +			"atmel,at91sam9261-ebi"
> > >> +			"atmel,at91sam9263-ebi0"
> > >> +			"atmel,at91sam9263-ebi1"
> > > 
> > > Ditto: 9263 twice.
> > > 
> > >> +			"atmel,at91sam9g45-ebi"
> > >> +			"atmel,at91sam9x5-ebi"
> > >> +			"atmel,sama5d3-ebi"
> > >> +
> > >> +- reg:			Contains offset/length value for EBI memory mapping.
> > >> +			This property might contain several entries if the EBI
> > >> +			memory range is not contiguous
> > >> +
> > >> +- #address-cells:	Must be 2.
> > >> +			The first cell encodes the CS.
> > >> +			The second cell encode the offset into the CS memory
> > >> +			range.
> > >> +
> > >> +- #size-cells:		Must be set to 1.
> > >> +
> > >> +- ranges:		Encodes CS to memory region association.
> > >> +
> > >> +- clocks:		Clock feeding the EBI controller.
> > >> +			See clock-bindings.txt
> > >> +
> > >> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> > >> +such as NOR (e.g. cfi-flash) and NAND.
> > >> +There might be board specific devices like FPGAs.
> > >> +You'll define you device requirements in these child nodes.
> > >> +
> > >> +Required child cs node properties:
> > >> +
> > >> +- #address-cells:	Must be 2.
> > >> +
> > >> +- #size-cells:		Must be 1.
> > >> +
> > >> +- ranges:		Empty property indicating that child nodes can inherit
> > >> +			memory layout.
> > >> +
> > >> +Optional child cs node properties:
> > >> +- atmel,generic-dev		boolean property specifying if the device is
> > >> +				a generic device.
> > 
> > Well... no real information, specify right here what a "generic device" is.
> 
> I do not describe what a generic device is, but the description of a
> specialized device is given just below.
> 
> Maybe I haven't chosen the appropriate word here.
> The datasheet gives the following description:

• EBI_CS4A: EBI Chip Select 4 Assignment
0 = EBI Chip Select 4 is only assigned to the Static Memory Controller
    and EBI_NCS4 behaves as defined by the SMC.
1 = EBI Chip Select 4 is assigned to the Static Memory Controller and
    the CompactFlash Logic (first slot) is activated.

What about using "atmel,generic-logic" instead of
"atmel,generic-dev" ?


-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

Sorry for the noise, I sent the email before finishing my answer.

On Wed, 3 Dec 2014 16:34:49 +0100
Boris Brezillon <boris.brezillon@free-electrons.com> wrote:

> On Wed, 3 Dec 2014 16:15:36 +0100
> Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
> 
> > Le 03/12/2014 15:56, Nicolas Ferre a ?crit :
> > > Le 01/12/2014 11:27, Boris Brezillon a ?crit :
> > >> The EBI (External Bus Interface) is used to access external peripherals
> > >> (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > >> Each device is assigned a CS line and an address range and can have its
> > >> own configuration (timings, access mode, bus width, ...).
> > >> This driver provides a generic DT binding to configure a device according
> > >> to its requirements.
> > >> For specific device controllers (like the NAND one) the SMC timings
> > >> should be configured by the controller driver through the matrix and smc
> > >> syscon regmaps.
> > >>
> > >> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > >> ---
> > >>  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> > >>  1 file changed, 155 insertions(+)
> > >>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >>
> > >> diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >> new file mode 100644
> > >> index 0000000..3749ea1
> > >> --- /dev/null
> > >> +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > >> @@ -0,0 +1,155 @@
> > >> +* Device tree bindings for Atmel EBI
> > >> +
> > >> +The External Bus Interface (EBI) controller is a bus where you can connect
> > >> +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> > >> +The EBI provides a glue-less interface to asynchronous memories though the SMC
> > >> +(Static Memory Controller).
> > >> +Synchronous memories (and some asynchronous memories like NANDs) can be
> > >> +attached to specialized controllers which are responsible for configuring the
> > >> +bus appropriately according to the connected device.
> > >> +In the other hand, the bus interface can be automated for simple asynchronous
> > >> +devices.
> > >> +
> > >> +Required properties:
> > >> +
> > >> +- compatible:		"atmel,at91sam9260-ebi"
> > >> +			"atmel,at91sam9261-ebi"
> > >> +			"atmel,at91sam9263-ebi0"
> > >> +			"atmel,at91sam9263-ebi1"
> > > 
> > > Ditto: 9263 twice.
> > > 
> > >> +			"atmel,at91sam9g45-ebi"
> > >> +			"atmel,at91sam9x5-ebi"
> > >> +			"atmel,sama5d3-ebi"
> > >> +
> > >> +- reg:			Contains offset/length value for EBI memory mapping.
> > >> +			This property might contain several entries if the EBI
> > >> +			memory range is not contiguous
> > >> +
> > >> +- #address-cells:	Must be 2.
> > >> +			The first cell encodes the CS.
> > >> +			The second cell encode the offset into the CS memory
> > >> +			range.
> > >> +
> > >> +- #size-cells:		Must be set to 1.
> > >> +
> > >> +- ranges:		Encodes CS to memory region association.
> > >> +
> > >> +- clocks:		Clock feeding the EBI controller.
> > >> +			See clock-bindings.txt
> > >> +
> > >> +Child chip-select (cs) nodes contain the memory devices nodes connected to
> > >> +such as NOR (e.g. cfi-flash) and NAND.
> > >> +There might be board specific devices like FPGAs.
> > >> +You'll define you device requirements in these child nodes.
> > >> +
> > >> +Required child cs node properties:
> > >> +
> > >> +- #address-cells:	Must be 2.
> > >> +
> > >> +- #size-cells:		Must be 1.
> > >> +
> > >> +- ranges:		Empty property indicating that child nodes can inherit
> > >> +			memory layout.
> > >> +
> > >> +Optional child cs node properties:
> > >> +- atmel,generic-dev		boolean property specifying if the device is
> > >> +				a generic device.
> > 
> > Well... no real information, specify right here what a "generic device" is.
> 
> I do not describe what a generic device is, but the description of a
> specialized device is given just below.
> 
> Maybe I haven't chosen the appropriate word here.
> The datasheet gives the following description:

? EBI_CS4A: EBI Chip Select 4 Assignment
0 = EBI Chip Select 4 is only assigned to the Static Memory Controller
    and EBI_NCS4 behaves as defined by the SMC.
1 = EBI Chip Select 4 is assigned to the Static Memory Controller and
    the CompactFlash Logic (first slot) is activated.

What about using "atmel,generic-logic" instead of
"atmel,generic-dev" ?


-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 01/11] mfd: syscon: Add atmel-matrix registers definition

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a écrit :
> AT91 SoCs have a memory range reserved for internal bus configuration.
> Expose those registers so that drivers can make use of the matrix syscon
> declared in at91 DTs.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Acked-by: Lee Jones <lee.jones@linaro.org>
> ---
>  include/linux/mfd/syscon/atmel-matrix.h | 114 ++++++++++++++++++++++++++++++++
>  1 file changed, 114 insertions(+)
>  create mode 100644 include/linux/mfd/syscon/atmel-matrix.h
> 
> diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
> new file mode 100644
> index 0000000..d0da495
> --- /dev/null
> +++ b/include/linux/mfd/syscon/atmel-matrix.h
> @@ -0,0 +1,114 @@
> +/*
> + *  Copyright (C) 2014 Atmel Corporation.
> + *
> + * Memory Controllers (MATRIX, EBI) - System peripherals registers.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
> +#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
> +
> +#define AT91SAM9260_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9260_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9260_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9260_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9260_MATRIX_EBICSA_OFF	0x11c
> +
> +#define AT91SAM9261_MATRIX_MRCR_OFF	0x0
> +#define AT91SAM9261_MATRIX_SCFG_OFF	0x4
> +#define AT91SAM9261_MATRIX_TCR_OFF	0x24
> +#define AT91SAM9261_MATRIX_EBICSA_OFF	0x30
> +#define AT91SAM9261_MATRIX_USBPUCR_OFF	0x34
> +
> +#define AT91SAM9263_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9263_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9263_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9263_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9263_MATRIX_TCR_OFF	0x114
> +#define AT91SAM9263_MATRIX_EBI0CSA_OFF	0x120
> +#define AT91SAM9263_MATRIX_EBI1CSA_OFF	0x124
> +
> +#define AT91SAM9G45_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9G45_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9G45_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9G45_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9G45_MATRIX_TCR_OFF	0x110
> +#define AT91SAM9G45_MATRIX_DDRMPR_OFF	0x118
> +#define AT91SAM9G45_MATRIX_EBICSA_OFF	0x128
> +
> +#define AT91SAM9N12_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9N12_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9N12_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9N12_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9N12_MATRIX_EBICSA_OFF	0x118
> +
> +#define AT91SAM9X5_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9X5_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9X5_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9X5_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9X5_MATRIX_EBICSA_OFF	0x120
> +
> +#define SAMA5D3_MATRIX_MCFG_OFF		0x00
> +#define SAMA5D3_MATRIX_SCFG_OFF		0x40
> +#define SAMA5D3_MATRIX_PRS_OFF		0x80
> +#define SAMA5D3_MATRIX_MRCR_OFF		0x100
> +
> +#define AT91_MATRIX_MCFG(o, x)		((o) + ((x) * 0x4))
> +#define AT91_MATRIX_ULBT		(7 << 0)
> +#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
> +#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
> +#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
> +#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
> +#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
> +
> +#define AT91_MATRIX_SCFG(o, x)		((o) + ((x) * 0x4))
> +#define AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)
> +#define AT91_MATRIX_DEFMSTR_TYPE	(3 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
> +#define AT91_MATRIX_FIXED_DEFMSTR	(7 << 18)
> +#define AT91_MATRIX_ARBT		(3 << 24)
> +#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
> +#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
> +
> +#define AT91_MATRIX_TCR(o)		(o)
> +#define AT91_MATRIX_ITCM_SIZE		(0xf << 0)
> +#define AT91_MATRIX_ITCM_0		(0 << 0)
> +#define AT91_MATRIX_ITCM_16		(5 << 0)
> +#define AT91_MATRIX_ITCM_32		(6 << 0)
> +#define AT91_MATRIX_ITCM_64		(7 << 0)
> +#define	AT91_MATRIX_DTCM_SIZE		(0xf << 4)
> +#define	AT91_MATRIX_DTCM_0		(0 << 4)
> +#define	AT91_MATRIX_DTCM_16		(5 << 4)
> +#define AT91_MATRIX_DTCM_32		(6 << 4)
> +#define AT91_MATRIX_DTCM_64		(7 << 4)
> +
> +#define AT91_MATRIX_PRAS(o, x)		((o) + ((x) * 0x8))
> +#define AT91_MATRIX_PRBS(o, x)		((o) + ((x) * 0x8) + 0x4)
> +#define AT91_MATRIX_MPR_MSK(x)		(3 << ((x) * 0x4))
> +
> +#define AT91_MATRIX_MRC(o)		(o)
> +#define AT91_MATRIX_RCB(x)		BIT(x)
> +
> +#define AT91_MATRIX_EBICSA(o)		(o)
> +#define AT91_MATRIX_CSA(cs, val)	(val << (cs))
> +#define AT91_MATRIX_DBPUC		BIT(8)
> +#define AT91_MATRIX_DBPDC		BIT(9)
> +#define AT91_MATRIX_VDDIOMSEL		BIT(16)
> +#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
> +#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
> +#define AT91_MATRIX_EBI_IOSR		BIT(17)
> +#define AT91_MATRIX_DDR_IOSR		BIT(18)
> +#define AT91_MATRIX_NFD0_SELECT		BIT(24)
> +#define AT91_MATRIX_DDR_MP_EN		BIT(25)
> +#define AT91_MATRIX_EBI_NUM_CS		8
> +
> +#define AT91_MATRIX_WPMR(o)		(o)
> +#define AT91_MATRIX_WPSR(o)		(o)
> +
> +#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
> 

General comment on the register descriptions of this series:
please be consistent:
1/ use BIT(x) marco *or* (1 << 16) not both
2/ use GENMASK(x,y) macro *or* (3 << 16) not both
3/ SAMA5D3_MATRIX_SCFG_OFF <== what is the meaning of _OFF offset of the
register? if it's not used in a macro (and a macro is not desirable),
please remove this suffix.
4/ same for the suffix _OFFSET in the SMC register definition file
5/ same for the _SHFT suffix in SMC register definition file
6/ what is the purpose of these macros? #defineAT91_MATRIX_WPMR(o) (o)

Thanks, bye.
-- 
Nicolas Ferre

Re: [PATCH v3 01/11] mfd: syscon: Add atmel-matrix registers definition

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a écrit :
> AT91 SoCs have a memory range reserved for internal bus configuration.
> Expose those registers so that drivers can make use of the matrix syscon
> declared in at91 DTs.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> Acked-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---
>  include/linux/mfd/syscon/atmel-matrix.h | 114 ++++++++++++++++++++++++++++++++
>  1 file changed, 114 insertions(+)
>  create mode 100644 include/linux/mfd/syscon/atmel-matrix.h
> 
> diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
> new file mode 100644
> index 0000000..d0da495
> --- /dev/null
> +++ b/include/linux/mfd/syscon/atmel-matrix.h
> @@ -0,0 +1,114 @@
> +/*
> + *  Copyright (C) 2014 Atmel Corporation.
> + *
> + * Memory Controllers (MATRIX, EBI) - System peripherals registers.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
> +#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
> +
> +#define AT91SAM9260_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9260_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9260_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9260_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9260_MATRIX_EBICSA_OFF	0x11c
> +
> +#define AT91SAM9261_MATRIX_MRCR_OFF	0x0
> +#define AT91SAM9261_MATRIX_SCFG_OFF	0x4
> +#define AT91SAM9261_MATRIX_TCR_OFF	0x24
> +#define AT91SAM9261_MATRIX_EBICSA_OFF	0x30
> +#define AT91SAM9261_MATRIX_USBPUCR_OFF	0x34
> +
> +#define AT91SAM9263_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9263_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9263_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9263_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9263_MATRIX_TCR_OFF	0x114
> +#define AT91SAM9263_MATRIX_EBI0CSA_OFF	0x120
> +#define AT91SAM9263_MATRIX_EBI1CSA_OFF	0x124
> +
> +#define AT91SAM9G45_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9G45_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9G45_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9G45_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9G45_MATRIX_TCR_OFF	0x110
> +#define AT91SAM9G45_MATRIX_DDRMPR_OFF	0x118
> +#define AT91SAM9G45_MATRIX_EBICSA_OFF	0x128
> +
> +#define AT91SAM9N12_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9N12_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9N12_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9N12_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9N12_MATRIX_EBICSA_OFF	0x118
> +
> +#define AT91SAM9X5_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9X5_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9X5_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9X5_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9X5_MATRIX_EBICSA_OFF	0x120
> +
> +#define SAMA5D3_MATRIX_MCFG_OFF		0x00
> +#define SAMA5D3_MATRIX_SCFG_OFF		0x40
> +#define SAMA5D3_MATRIX_PRS_OFF		0x80
> +#define SAMA5D3_MATRIX_MRCR_OFF		0x100
> +
> +#define AT91_MATRIX_MCFG(o, x)		((o) + ((x) * 0x4))
> +#define AT91_MATRIX_ULBT		(7 << 0)
> +#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
> +#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
> +#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
> +#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
> +#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
> +
> +#define AT91_MATRIX_SCFG(o, x)		((o) + ((x) * 0x4))
> +#define AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)
> +#define AT91_MATRIX_DEFMSTR_TYPE	(3 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
> +#define AT91_MATRIX_FIXED_DEFMSTR	(7 << 18)
> +#define AT91_MATRIX_ARBT		(3 << 24)
> +#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
> +#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
> +
> +#define AT91_MATRIX_TCR(o)		(o)
> +#define AT91_MATRIX_ITCM_SIZE		(0xf << 0)
> +#define AT91_MATRIX_ITCM_0		(0 << 0)
> +#define AT91_MATRIX_ITCM_16		(5 << 0)
> +#define AT91_MATRIX_ITCM_32		(6 << 0)
> +#define AT91_MATRIX_ITCM_64		(7 << 0)
> +#define	AT91_MATRIX_DTCM_SIZE		(0xf << 4)
> +#define	AT91_MATRIX_DTCM_0		(0 << 4)
> +#define	AT91_MATRIX_DTCM_16		(5 << 4)
> +#define AT91_MATRIX_DTCM_32		(6 << 4)
> +#define AT91_MATRIX_DTCM_64		(7 << 4)
> +
> +#define AT91_MATRIX_PRAS(o, x)		((o) + ((x) * 0x8))
> +#define AT91_MATRIX_PRBS(o, x)		((o) + ((x) * 0x8) + 0x4)
> +#define AT91_MATRIX_MPR_MSK(x)		(3 << ((x) * 0x4))
> +
> +#define AT91_MATRIX_MRC(o)		(o)
> +#define AT91_MATRIX_RCB(x)		BIT(x)
> +
> +#define AT91_MATRIX_EBICSA(o)		(o)
> +#define AT91_MATRIX_CSA(cs, val)	(val << (cs))
> +#define AT91_MATRIX_DBPUC		BIT(8)
> +#define AT91_MATRIX_DBPDC		BIT(9)
> +#define AT91_MATRIX_VDDIOMSEL		BIT(16)
> +#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
> +#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
> +#define AT91_MATRIX_EBI_IOSR		BIT(17)
> +#define AT91_MATRIX_DDR_IOSR		BIT(18)
> +#define AT91_MATRIX_NFD0_SELECT		BIT(24)
> +#define AT91_MATRIX_DDR_MP_EN		BIT(25)
> +#define AT91_MATRIX_EBI_NUM_CS		8
> +
> +#define AT91_MATRIX_WPMR(o)		(o)
> +#define AT91_MATRIX_WPSR(o)		(o)
> +
> +#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
> 

General comment on the register descriptions of this series:
please be consistent:
1/ use BIT(x) marco *or* (1 << 16) not both
2/ use GENMASK(x,y) macro *or* (3 << 16) not both
3/ SAMA5D3_MATRIX_SCFG_OFF <== what is the meaning of _OFF offset of the
register? if it's not used in a macro (and a macro is not desirable),
please remove this suffix.
4/ same for the suffix _OFFSET in the SMC register definition file
5/ same for the _SHFT suffix in SMC register definition file
6/ what is the purpose of these macros? #defineAT91_MATRIX_WPMR(o) (o)

Thanks, bye.
-- 
Nicolas Ferre
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[PATCH v3 01/11] mfd: syscon: Add atmel-matrix registers definition

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a ?crit :
> AT91 SoCs have a memory range reserved for internal bus configuration.
> Expose those registers so that drivers can make use of the matrix syscon
> declared in at91 DTs.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Acked-by: Lee Jones <lee.jones@linaro.org>
> ---
>  include/linux/mfd/syscon/atmel-matrix.h | 114 ++++++++++++++++++++++++++++++++
>  1 file changed, 114 insertions(+)
>  create mode 100644 include/linux/mfd/syscon/atmel-matrix.h
> 
> diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h
> new file mode 100644
> index 0000000..d0da495
> --- /dev/null
> +++ b/include/linux/mfd/syscon/atmel-matrix.h
> @@ -0,0 +1,114 @@
> +/*
> + *  Copyright (C) 2014 Atmel Corporation.
> + *
> + * Memory Controllers (MATRIX, EBI) - System peripherals registers.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
> +#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H
> +
> +#define AT91SAM9260_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9260_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9260_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9260_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9260_MATRIX_EBICSA_OFF	0x11c
> +
> +#define AT91SAM9261_MATRIX_MRCR_OFF	0x0
> +#define AT91SAM9261_MATRIX_SCFG_OFF	0x4
> +#define AT91SAM9261_MATRIX_TCR_OFF	0x24
> +#define AT91SAM9261_MATRIX_EBICSA_OFF	0x30
> +#define AT91SAM9261_MATRIX_USBPUCR_OFF	0x34
> +
> +#define AT91SAM9263_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9263_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9263_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9263_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9263_MATRIX_TCR_OFF	0x114
> +#define AT91SAM9263_MATRIX_EBI0CSA_OFF	0x120
> +#define AT91SAM9263_MATRIX_EBI1CSA_OFF	0x124
> +
> +#define AT91SAM9G45_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9G45_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9G45_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9G45_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9G45_MATRIX_TCR_OFF	0x110
> +#define AT91SAM9G45_MATRIX_DDRMPR_OFF	0x118
> +#define AT91SAM9G45_MATRIX_EBICSA_OFF	0x128
> +
> +#define AT91SAM9N12_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9N12_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9N12_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9N12_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9N12_MATRIX_EBICSA_OFF	0x118
> +
> +#define AT91SAM9X5_MATRIX_MCFG_OFF	0x00
> +#define AT91SAM9X5_MATRIX_SCFG_OFF	0x40
> +#define AT91SAM9X5_MATRIX_PRS_OFF	0x80
> +#define AT91SAM9X5_MATRIX_MRCR_OFF	0x100
> +#define AT91SAM9X5_MATRIX_EBICSA_OFF	0x120
> +
> +#define SAMA5D3_MATRIX_MCFG_OFF		0x00
> +#define SAMA5D3_MATRIX_SCFG_OFF		0x40
> +#define SAMA5D3_MATRIX_PRS_OFF		0x80
> +#define SAMA5D3_MATRIX_MRCR_OFF		0x100
> +
> +#define AT91_MATRIX_MCFG(o, x)		((o) + ((x) * 0x4))
> +#define AT91_MATRIX_ULBT		(7 << 0)
> +#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
> +#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
> +#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
> +#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
> +#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
> +
> +#define AT91_MATRIX_SCFG(o, x)		((o) + ((x) * 0x4))
> +#define AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)
> +#define AT91_MATRIX_DEFMSTR_TYPE	(3 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
> +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
> +#define AT91_MATRIX_FIXED_DEFMSTR	(7 << 18)
> +#define AT91_MATRIX_ARBT		(3 << 24)
> +#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
> +#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
> +
> +#define AT91_MATRIX_TCR(o)		(o)
> +#define AT91_MATRIX_ITCM_SIZE		(0xf << 0)
> +#define AT91_MATRIX_ITCM_0		(0 << 0)
> +#define AT91_MATRIX_ITCM_16		(5 << 0)
> +#define AT91_MATRIX_ITCM_32		(6 << 0)
> +#define AT91_MATRIX_ITCM_64		(7 << 0)
> +#define	AT91_MATRIX_DTCM_SIZE		(0xf << 4)
> +#define	AT91_MATRIX_DTCM_0		(0 << 4)
> +#define	AT91_MATRIX_DTCM_16		(5 << 4)
> +#define AT91_MATRIX_DTCM_32		(6 << 4)
> +#define AT91_MATRIX_DTCM_64		(7 << 4)
> +
> +#define AT91_MATRIX_PRAS(o, x)		((o) + ((x) * 0x8))
> +#define AT91_MATRIX_PRBS(o, x)		((o) + ((x) * 0x8) + 0x4)
> +#define AT91_MATRIX_MPR_MSK(x)		(3 << ((x) * 0x4))
> +
> +#define AT91_MATRIX_MRC(o)		(o)
> +#define AT91_MATRIX_RCB(x)		BIT(x)
> +
> +#define AT91_MATRIX_EBICSA(o)		(o)
> +#define AT91_MATRIX_CSA(cs, val)	(val << (cs))
> +#define AT91_MATRIX_DBPUC		BIT(8)
> +#define AT91_MATRIX_DBPDC		BIT(9)
> +#define AT91_MATRIX_VDDIOMSEL		BIT(16)
> +#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
> +#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
> +#define AT91_MATRIX_EBI_IOSR		BIT(17)
> +#define AT91_MATRIX_DDR_IOSR		BIT(18)
> +#define AT91_MATRIX_NFD0_SELECT		BIT(24)
> +#define AT91_MATRIX_DDR_MP_EN		BIT(25)
> +#define AT91_MATRIX_EBI_NUM_CS		8
> +
> +#define AT91_MATRIX_WPMR(o)		(o)
> +#define AT91_MATRIX_WPSR(o)		(o)
> +
> +#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */
> 

General comment on the register descriptions of this series:
please be consistent:
1/ use BIT(x) marco *or* (1 << 16) not both
2/ use GENMASK(x,y) macro *or* (3 << 16) not both
3/ SAMA5D3_MATRIX_SCFG_OFF <== what is the meaning of _OFF offset of the
register? if it's not used in a macro (and a macro is not desirable),
please remove this suffix.
4/ same for the suffix _OFFSET in the SMC register definition file
5/ same for the _SHFT suffix in SMC register definition file
6/ what is the purpose of these macros? #defineAT91_MATRIX_WPMR(o) (o)

Thanks, bye.
-- 
Nicolas Ferre

Re: [PATCH v3 07/11] ARM: at91: select ATMEL_EBI when compiling a kernel for at91sam9 or sama5d3

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a écrit :
> at91sam9* and sama5d* SoCs have an EBI (External Bus Interface).
> Select the ATMEL_EBI driver when support for these SoCs is selected.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  arch/arm/mach-at91/Kconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index 0e6d548..a72402a 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -49,6 +49,7 @@ config SOC_AT91SAM9
>  	select GENERIC_CLOCKEVENTS
>  	select MEMORY if USE_OF
>  	select ATMEL_SDRAMC if USE_OF
> +	select ATMEL_EBI if USE_OF

We can remove "USE_OF" for next version.

>  config SOC_SAMA5
>  	bool
> @@ -58,6 +59,7 @@ config SOC_SAMA5
>  	select USE_OF
>  	select MEMORY
>  	select ATMEL_SDRAMC
> +	select ATMEL_EBI
>  
>  menu "Atmel AT91 System-on-Chip"
>  
> 


-- 
Nicolas Ferre

Re: [PATCH v3 07/11] ARM: at91: select ATMEL_EBI when compiling a kernel for at91sam9 or sama5d3

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a écrit :
> at91sam9* and sama5d* SoCs have an EBI (External Bus Interface).
> Select the ATMEL_EBI driver when support for these SoCs is selected.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  arch/arm/mach-at91/Kconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index 0e6d548..a72402a 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -49,6 +49,7 @@ config SOC_AT91SAM9
>  	select GENERIC_CLOCKEVENTS
>  	select MEMORY if USE_OF
>  	select ATMEL_SDRAMC if USE_OF
> +	select ATMEL_EBI if USE_OF

We can remove "USE_OF" for next version.

>  config SOC_SAMA5
>  	bool
> @@ -58,6 +59,7 @@ config SOC_SAMA5
>  	select USE_OF
>  	select MEMORY
>  	select ATMEL_SDRAMC
> +	select ATMEL_EBI
>  
>  menu "Atmel AT91 System-on-Chip"
>  
> 


-- 
Nicolas Ferre

[PATCH v3 07/11] ARM: at91: select ATMEL_EBI when compiling a kernel for at91sam9 or sama5d3

[Nicolas Ferre]

Le 01/12/2014 11:27, Boris Brezillon a ?crit :
> at91sam9* and sama5d* SoCs have an EBI (External Bus Interface).
> Select the ATMEL_EBI driver when support for these SoCs is selected.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  arch/arm/mach-at91/Kconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index 0e6d548..a72402a 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -49,6 +49,7 @@ config SOC_AT91SAM9
>  	select GENERIC_CLOCKEVENTS
>  	select MEMORY if USE_OF
>  	select ATMEL_SDRAMC if USE_OF
> +	select ATMEL_EBI if USE_OF

We can remove "USE_OF" for next version.

>  config SOC_SAMA5
>  	bool
> @@ -58,6 +59,7 @@ config SOC_SAMA5
>  	select USE_OF
>  	select MEMORY
>  	select ATMEL_SDRAMC
> +	select ATMEL_EBI
>  
>  menu "Atmel AT91 System-on-Chip"
>  
> 


-- 
Nicolas Ferre

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

On Wed, 3 Dec 2014 15:56:54 +0100
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:

> Le 01/12/2014 11:27, Boris Brezillon a écrit :
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and smc
> > syscon regmaps.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > ---
> >  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> >  1 file changed, 155 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > new file mode 100644
> > index 0000000..3749ea1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > @@ -0,0 +1,155 @@
> > +* Device tree bindings for Atmel EBI
> > +
> > +The External Bus Interface (EBI) controller is a bus where you can connect
> > +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> > +The EBI provides a glue-less interface to asynchronous memories though the SMC
> > +(Static Memory Controller).
> > +Synchronous memories (and some asynchronous memories like NANDs) can be
> > +attached to specialized controllers which are responsible for configuring the
> > +bus appropriately according to the connected device.
> > +In the other hand, the bus interface can be automated for simple asynchronous
> > +devices.
> > +
> > +Required properties:
> > +
> > +- compatible:		"atmel,at91sam9260-ebi"
> > +			"atmel,at91sam9261-ebi"
> > +			"atmel,at91sam9263-ebi0"
> > +			"atmel,at91sam9263-ebi1"
> 
> Ditto: 9263 twice.

Actually that's not a duplicated compatible (see the ebi0/ebi1 at the
end): sam9263 embeds 2 EBIs, and they have different numbers of chip
selects, hence the different compatible string.

I'll add an "atmel,at91sam9rl-ebi" string.

> 
> > +			"atmel,at91sam9g45-ebi"
> > +			"atmel,at91sam9x5-ebi"
> > +			"atmel,sama5d3-ebi"
> > +
> > +- reg:			Contains offset/length value for EBI memory mapping.
> > +			This property might contain several entries if the EBI
> > +			memory range is not contiguous
> > +
> > +- #address-cells:	Must be 2.
> > +			The first cell encodes the CS.
> > +			The second cell encode the offset into the CS memory
> > +			range.
> > +
> > +- #size-cells:		Must be set to 1.
> > +
> > +- ranges:		Encodes CS to memory region association.
> > +
> > +- clocks:		Clock feeding the EBI controller.
> > +			See clock-bindings.txt
> > +
> > +Child chip-select (cs) nodes contain the memory devices nodes connected to
> > +such as NOR (e.g. cfi-flash) and NAND.
> > +There might be board specific devices like FPGAs.
> > +You'll define you device requirements in these child nodes.
> > +
> > +Required child cs node properties:
> > +
> > +- #address-cells:	Must be 2.
> > +
> > +- #size-cells:		Must be 1.
> > +
> > +- ranges:		Empty property indicating that child nodes can inherit
> > +			memory layout.
> > +
> > +Optional child cs node properties:
> > +- atmel,generic-dev		boolean property specifying if the device is
> > +				a generic device.
> > +				The following properties are only parsed if
> > +				this property is present.
> > +				Specialized devices are attached to specialized
> > +				controllers which are responsible for
> > +				configuring the bus appropriately.
> > +				Here are some examples of specialized
> > +				controllers: NAND, CompactFlash, SDR-SDRAM.
> > +
> > +- atmel,bus-width:		width of the asynchronous device's data bus
> > +				8, 16 or 32.
> > +				8 if not present.
> > +
> > +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> > +				"select" if not present.
> > +
> > +- atmel,read-mode		"nrd" or "ncs".
> > +				"ncs" is not present.
> > +
> > +- atmel,write-mode		"nwe" or "ncs".
> > +				"ncs" is not present.
> > +
> > +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> > +				"disabled" if not present.
> > +
> > +- atmel,page-mode		enable page mode if present. The provided value
> > +				defines the page size (supported values: 4, 8,
> > +				16 and 32).
> > +
> > +Optional device timings expressed in nanoseconds (if the property is not
> > +present 0 is assumed):
> > +
> > +- atmel,ncs-rd-setup-ns
> > +- atmel,nrd-setup-ns
> > +- atmel,ncs-wr-setup-ns
> > +- atmel,nwe-setup-ns
> > +- atmel,ncs-rd-pulse-ns
> > +- atmel,nrd-pulse-ns
> > +- atmel,ncs-wr-pulse-ns
> > +- atmel,nwe-pulse-ns
> > +- atmel,nwe-cycle-ns
> > +- atmel,nrd-cycle-ns
> > +- atmel,tdf-ns
> > +
> > +- atmel,tdf-optimized		data float optimized mode. If present the data
> > +				float time is optimized depending on the next
> > +				device being accessed (next device setup
> > +				time is substracted to the current devive data
> 
> Typo: subtract, device

Yep, I'll those typos.




-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

On Wed, 3 Dec 2014 15:56:54 +0100
Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org> wrote:

> Le 01/12/2014 11:27, Boris Brezillon a écrit :
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and smc
> > syscon regmaps.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> > ---
> >  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> >  1 file changed, 155 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > new file mode 100644
> > index 0000000..3749ea1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > @@ -0,0 +1,155 @@
> > +* Device tree bindings for Atmel EBI
> > +
> > +The External Bus Interface (EBI) controller is a bus where you can connect
> > +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> > +The EBI provides a glue-less interface to asynchronous memories though the SMC
> > +(Static Memory Controller).
> > +Synchronous memories (and some asynchronous memories like NANDs) can be
> > +attached to specialized controllers which are responsible for configuring the
> > +bus appropriately according to the connected device.
> > +In the other hand, the bus interface can be automated for simple asynchronous
> > +devices.
> > +
> > +Required properties:
> > +
> > +- compatible:		"atmel,at91sam9260-ebi"
> > +			"atmel,at91sam9261-ebi"
> > +			"atmel,at91sam9263-ebi0"
> > +			"atmel,at91sam9263-ebi1"
> 
> Ditto: 9263 twice.

Actually that's not a duplicated compatible (see the ebi0/ebi1 at the
end): sam9263 embeds 2 EBIs, and they have different numbers of chip
selects, hence the different compatible string.

I'll add an "atmel,at91sam9rl-ebi" string.

> 
> > +			"atmel,at91sam9g45-ebi"
> > +			"atmel,at91sam9x5-ebi"
> > +			"atmel,sama5d3-ebi"
> > +
> > +- reg:			Contains offset/length value for EBI memory mapping.
> > +			This property might contain several entries if the EBI
> > +			memory range is not contiguous
> > +
> > +- #address-cells:	Must be 2.
> > +			The first cell encodes the CS.
> > +			The second cell encode the offset into the CS memory
> > +			range.
> > +
> > +- #size-cells:		Must be set to 1.
> > +
> > +- ranges:		Encodes CS to memory region association.
> > +
> > +- clocks:		Clock feeding the EBI controller.
> > +			See clock-bindings.txt
> > +
> > +Child chip-select (cs) nodes contain the memory devices nodes connected to
> > +such as NOR (e.g. cfi-flash) and NAND.
> > +There might be board specific devices like FPGAs.
> > +You'll define you device requirements in these child nodes.
> > +
> > +Required child cs node properties:
> > +
> > +- #address-cells:	Must be 2.
> > +
> > +- #size-cells:		Must be 1.
> > +
> > +- ranges:		Empty property indicating that child nodes can inherit
> > +			memory layout.
> > +
> > +Optional child cs node properties:
> > +- atmel,generic-dev		boolean property specifying if the device is
> > +				a generic device.
> > +				The following properties are only parsed if
> > +				this property is present.
> > +				Specialized devices are attached to specialized
> > +				controllers which are responsible for
> > +				configuring the bus appropriately.
> > +				Here are some examples of specialized
> > +				controllers: NAND, CompactFlash, SDR-SDRAM.
> > +
> > +- atmel,bus-width:		width of the asynchronous device's data bus
> > +				8, 16 or 32.
> > +				8 if not present.
> > +
> > +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> > +				"select" if not present.
> > +
> > +- atmel,read-mode		"nrd" or "ncs".
> > +				"ncs" is not present.
> > +
> > +- atmel,write-mode		"nwe" or "ncs".
> > +				"ncs" is not present.
> > +
> > +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> > +				"disabled" if not present.
> > +
> > +- atmel,page-mode		enable page mode if present. The provided value
> > +				defines the page size (supported values: 4, 8,
> > +				16 and 32).
> > +
> > +Optional device timings expressed in nanoseconds (if the property is not
> > +present 0 is assumed):
> > +
> > +- atmel,ncs-rd-setup-ns
> > +- atmel,nrd-setup-ns
> > +- atmel,ncs-wr-setup-ns
> > +- atmel,nwe-setup-ns
> > +- atmel,ncs-rd-pulse-ns
> > +- atmel,nrd-pulse-ns
> > +- atmel,ncs-wr-pulse-ns
> > +- atmel,nwe-pulse-ns
> > +- atmel,nwe-cycle-ns
> > +- atmel,nrd-cycle-ns
> > +- atmel,tdf-ns
> > +
> > +- atmel,tdf-optimized		data float optimized mode. If present the data
> > +				float time is optimized depending on the next
> > +				device being accessed (next device setup
> > +				time is substracted to the current devive data
> 
> Typo: subtract, device

Yep, I'll those typos.




-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH v3 06/11] memory: atmel-ebi: add DT bindings documentation

[Boris Brezillon]

On Wed, 3 Dec 2014 15:56:54 +0100
Nicolas Ferre <nicolas.ferre@atmel.com> wrote:

> Le 01/12/2014 11:27, Boris Brezillon a ?crit :
> > The EBI (External Bus Interface) is used to access external peripherals
> > (NOR, SRAM, NAND, and other specific devices like ethernet controllers).
> > Each device is assigned a CS line and an address range and can have its
> > own configuration (timings, access mode, bus width, ...).
> > This driver provides a generic DT binding to configure a device according
> > to its requirements.
> > For specific device controllers (like the NAND one) the SMC timings
> > should be configured by the controller driver through the matrix and smc
> > syscon regmaps.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> > ---
> >  .../bindings/memory-controllers/atmel-ebi.txt      | 155 +++++++++++++++++++++
> >  1 file changed, 155 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > new file mode 100644
> > index 0000000..3749ea1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/memory-controllers/atmel-ebi.txt
> > @@ -0,0 +1,155 @@
> > +* Device tree bindings for Atmel EBI
> > +
> > +The External Bus Interface (EBI) controller is a bus where you can connect
> > +asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
> > +The EBI provides a glue-less interface to asynchronous memories though the SMC
> > +(Static Memory Controller).
> > +Synchronous memories (and some asynchronous memories like NANDs) can be
> > +attached to specialized controllers which are responsible for configuring the
> > +bus appropriately according to the connected device.
> > +In the other hand, the bus interface can be automated for simple asynchronous
> > +devices.
> > +
> > +Required properties:
> > +
> > +- compatible:		"atmel,at91sam9260-ebi"
> > +			"atmel,at91sam9261-ebi"
> > +			"atmel,at91sam9263-ebi0"
> > +			"atmel,at91sam9263-ebi1"
> 
> Ditto: 9263 twice.

Actually that's not a duplicated compatible (see the ebi0/ebi1 at the
end): sam9263 embeds 2 EBIs, and they have different numbers of chip
selects, hence the different compatible string.

I'll add an "atmel,at91sam9rl-ebi" string.

> 
> > +			"atmel,at91sam9g45-ebi"
> > +			"atmel,at91sam9x5-ebi"
> > +			"atmel,sama5d3-ebi"
> > +
> > +- reg:			Contains offset/length value for EBI memory mapping.
> > +			This property might contain several entries if the EBI
> > +			memory range is not contiguous
> > +
> > +- #address-cells:	Must be 2.
> > +			The first cell encodes the CS.
> > +			The second cell encode the offset into the CS memory
> > +			range.
> > +
> > +- #size-cells:		Must be set to 1.
> > +
> > +- ranges:		Encodes CS to memory region association.
> > +
> > +- clocks:		Clock feeding the EBI controller.
> > +			See clock-bindings.txt
> > +
> > +Child chip-select (cs) nodes contain the memory devices nodes connected to
> > +such as NOR (e.g. cfi-flash) and NAND.
> > +There might be board specific devices like FPGAs.
> > +You'll define you device requirements in these child nodes.
> > +
> > +Required child cs node properties:
> > +
> > +- #address-cells:	Must be 2.
> > +
> > +- #size-cells:		Must be 1.
> > +
> > +- ranges:		Empty property indicating that child nodes can inherit
> > +			memory layout.
> > +
> > +Optional child cs node properties:
> > +- atmel,generic-dev		boolean property specifying if the device is
> > +				a generic device.
> > +				The following properties are only parsed if
> > +				this property is present.
> > +				Specialized devices are attached to specialized
> > +				controllers which are responsible for
> > +				configuring the bus appropriately.
> > +				Here are some examples of specialized
> > +				controllers: NAND, CompactFlash, SDR-SDRAM.
> > +
> > +- atmel,bus-width:		width of the asynchronous device's data bus
> > +				8, 16 or 32.
> > +				8 if not present.
> > +
> > +- atmel,byte-access-type	"write" or "select" (see Atmel datasheet).
> > +				"select" if not present.
> > +
> > +- atmel,read-mode		"nrd" or "ncs".
> > +				"ncs" is not present.
> > +
> > +- atmel,write-mode		"nwe" or "ncs".
> > +				"ncs" is not present.
> > +
> > +- atmel,exnw-mode		"disabled", "frozen" or "ready".
> > +				"disabled" if not present.
> > +
> > +- atmel,page-mode		enable page mode if present. The provided value
> > +				defines the page size (supported values: 4, 8,
> > +				16 and 32).
> > +
> > +Optional device timings expressed in nanoseconds (if the property is not
> > +present 0 is assumed):
> > +
> > +- atmel,ncs-rd-setup-ns
> > +- atmel,nrd-setup-ns
> > +- atmel,ncs-wr-setup-ns
> > +- atmel,nwe-setup-ns
> > +- atmel,ncs-rd-pulse-ns
> > +- atmel,nrd-pulse-ns
> > +- atmel,ncs-wr-pulse-ns
> > +- atmel,nwe-pulse-ns
> > +- atmel,nwe-cycle-ns
> > +- atmel,nrd-cycle-ns
> > +- atmel,tdf-ns
> > +
> > +- atmel,tdf-optimized		data float optimized mode. If present the data
> > +				float time is optimized depending on the next
> > +				device being accessed (next device setup
> > +				time is substracted to the current devive data
> 
> Typo: subtract, device

Yep, I'll those typos.




-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

Hi,

On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> +static int at91_ebi_probe(struct platform_device *pdev)
> +{
> +	const struct of_device_id *match;
> +	struct device_node *child;
> +	struct device_node *np;
> +	struct at91_ebi *ebi;
> +	struct clk *clk;
> +	int ret;
> +
> +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> +	if (!match || !match->data)
> +		return -EINVAL;
> +
> +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> +	if (!ebi)
> +		return -ENOMEM;
> +
> +	ebi->caps = match->data;
> +	ebi->dev = &pdev->dev;
> +
> +	clk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(clk))
> +		return PTR_ERR(clk);
> +
> +	ebi->clk = clk;
> +
> +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> +	if (!np)
> +		return -EINVAL;
> +
> +	ebi->smc = syscon_node_to_regmap(np);
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);
> +
> +	/*
> +	 * The sama5d3 does not provide an EBICSA register and thus does need
> +	 * to access the matrix registers.
> +	 */
> +	if (ebi->caps->ebi_csa) {
> +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> +		if (np)
         ^^^^^^^
Shouldn't this be if (!np)?

> +			return -EINVAL;
> +
> +		ebi->matrix = syscon_node_to_regmap(np);
> +		if (IS_ERR(ebi->matrix))
> +			return PTR_ERR(ebi->matrix);
> +
> +		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
> +						  *ebi->caps->ebi_csa);
> +		if (IS_ERR(ebi->ebi_csa))
> +			return PTR_ERR(ebi->ebi_csa);
> +	}
> +
> +	ret = ebi->caps->init(ebi);
> +	if (ret)
> +		return ret;
> +
> +	for_each_child_of_node(pdev->dev.of_node, child) {
> +		ret = at91_ebi_dev_setup(ebi, child);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return ret;
> +}
> +
> +static struct platform_driver at91_ebi_driver = {
> +	.driver = {
> +		.name = "atmel-ebi",
> +		.of_match_table	= at91_ebi_id_table,
> +	},
> +};
> +module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
> +
> +MODULE_AUTHOR("JJ Hiblot");
> +MODULE_DESCRIPTION("Atmel's EBI driver");
> +MODULE_LICENSE("GPL");


Best regards,
Alexander

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

Hi,

On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> +static int at91_ebi_probe(struct platform_device *pdev)
> +{
> +	const struct of_device_id *match;
> +	struct device_node *child;
> +	struct device_node *np;
> +	struct at91_ebi *ebi;
> +	struct clk *clk;
> +	int ret;
> +
> +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> +	if (!match || !match->data)
> +		return -EINVAL;
> +
> +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> +	if (!ebi)
> +		return -ENOMEM;
> +
> +	ebi->caps = match->data;
> +	ebi->dev = &pdev->dev;
> +
> +	clk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(clk))
> +		return PTR_ERR(clk);
> +
> +	ebi->clk = clk;
> +
> +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> +	if (!np)
> +		return -EINVAL;
> +
> +	ebi->smc = syscon_node_to_regmap(np);
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);
> +
> +	/*
> +	 * The sama5d3 does not provide an EBICSA register and thus does need
> +	 * to access the matrix registers.
> +	 */
> +	if (ebi->caps->ebi_csa) {
> +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> +		if (np)
         ^^^^^^^
Shouldn't this be if (!np)?

> +			return -EINVAL;
> +
> +		ebi->matrix = syscon_node_to_regmap(np);
> +		if (IS_ERR(ebi->matrix))
> +			return PTR_ERR(ebi->matrix);
> +
> +		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
> +						  *ebi->caps->ebi_csa);
> +		if (IS_ERR(ebi->ebi_csa))
> +			return PTR_ERR(ebi->ebi_csa);
> +	}
> +
> +	ret = ebi->caps->init(ebi);
> +	if (ret)
> +		return ret;
> +
> +	for_each_child_of_node(pdev->dev.of_node, child) {
> +		ret = at91_ebi_dev_setup(ebi, child);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return ret;
> +}
> +
> +static struct platform_driver at91_ebi_driver = {
> +	.driver = {
> +		.name = "atmel-ebi",
> +		.of_match_table	= at91_ebi_id_table,
> +	},
> +};
> +module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
> +
> +MODULE_AUTHOR("JJ Hiblot");
> +MODULE_DESCRIPTION("Atmel's EBI driver");
> +MODULE_LICENSE("GPL");


Best regards,
Alexander

[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

Hi,

On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> +static int at91_ebi_probe(struct platform_device *pdev)
> +{
> +	const struct of_device_id *match;
> +	struct device_node *child;
> +	struct device_node *np;
> +	struct at91_ebi *ebi;
> +	struct clk *clk;
> +	int ret;
> +
> +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> +	if (!match || !match->data)
> +		return -EINVAL;
> +
> +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> +	if (!ebi)
> +		return -ENOMEM;
> +
> +	ebi->caps = match->data;
> +	ebi->dev = &pdev->dev;
> +
> +	clk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(clk))
> +		return PTR_ERR(clk);
> +
> +	ebi->clk = clk;
> +
> +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> +	if (!np)
> +		return -EINVAL;
> +
> +	ebi->smc = syscon_node_to_regmap(np);
> +	if (IS_ERR(ebi->smc))
> +		return PTR_ERR(ebi->smc);
> +
> +	/*
> +	 * The sama5d3 does not provide an EBICSA register and thus does need
> +	 * to access the matrix registers.
> +	 */
> +	if (ebi->caps->ebi_csa) {
> +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> +		if (np)
         ^^^^^^^
Shouldn't this be if (!np)?

> +			return -EINVAL;
> +
> +		ebi->matrix = syscon_node_to_regmap(np);
> +		if (IS_ERR(ebi->matrix))
> +			return PTR_ERR(ebi->matrix);
> +
> +		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
> +						  *ebi->caps->ebi_csa);
> +		if (IS_ERR(ebi->ebi_csa))
> +			return PTR_ERR(ebi->ebi_csa);
> +	}
> +
> +	ret = ebi->caps->init(ebi);
> +	if (ret)
> +		return ret;
> +
> +	for_each_child_of_node(pdev->dev.of_node, child) {
> +		ret = at91_ebi_dev_setup(ebi, child);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return ret;
> +}
> +
> +static struct platform_driver at91_ebi_driver = {
> +	.driver = {
> +		.name = "atmel-ebi",
> +		.of_match_table	= at91_ebi_id_table,
> +	},
> +};
> +module_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
> +
> +MODULE_AUTHOR("JJ Hiblot");
> +MODULE_DESCRIPTION("Atmel's EBI driver");
> +MODULE_LICENSE("GPL");


Best regards,
Alexander

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Alexander,

On Tue, 09 Dec 2014 21:53:12 +0100
Alexander Stein <alexanders83@web.de> wrote:

> Hi,
> 
> On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > +static int at91_ebi_probe(struct platform_device *pdev)
> > +{
> > +	const struct of_device_id *match;
> > +	struct device_node *child;
> > +	struct device_node *np;
> > +	struct at91_ebi *ebi;
> > +	struct clk *clk;
> > +	int ret;
> > +
> > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > +	if (!match || !match->data)
> > +		return -EINVAL;
> > +
> > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > +	if (!ebi)
> > +		return -ENOMEM;
> > +
> > +	ebi->caps = match->data;
> > +	ebi->dev = &pdev->dev;
> > +
> > +	clk = devm_clk_get(&pdev->dev, NULL);
> > +	if (IS_ERR(clk))
> > +		return PTR_ERR(clk);
> > +
> > +	ebi->clk = clk;
> > +
> > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > +	if (!np)
> > +		return -EINVAL;
> > +
> > +	ebi->smc = syscon_node_to_regmap(np);
> > +	if (IS_ERR(ebi->smc))
> > +		return PTR_ERR(ebi->smc);
> > +
> > +	/*
> > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > +	 * to access the matrix registers.
> > +	 */
> > +	if (ebi->caps->ebi_csa) {
> > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > +		if (np)
>          ^^^^^^^
> Shouldn't this be if (!np)?

Absolutely, thanks for pointing this out.
I'll test on other at91 platforms (I currently only test on sama5d3
boards, which do not have this EBICSA register) before submitting a new
version.

Regards,

Boris



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Alexander,

On Tue, 09 Dec 2014 21:53:12 +0100
Alexander Stein <alexanders83-S0/GAf8tV78@public.gmane.org> wrote:

> Hi,
> 
> On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > +static int at91_ebi_probe(struct platform_device *pdev)
> > +{
> > +	const struct of_device_id *match;
> > +	struct device_node *child;
> > +	struct device_node *np;
> > +	struct at91_ebi *ebi;
> > +	struct clk *clk;
> > +	int ret;
> > +
> > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > +	if (!match || !match->data)
> > +		return -EINVAL;
> > +
> > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > +	if (!ebi)
> > +		return -ENOMEM;
> > +
> > +	ebi->caps = match->data;
> > +	ebi->dev = &pdev->dev;
> > +
> > +	clk = devm_clk_get(&pdev->dev, NULL);
> > +	if (IS_ERR(clk))
> > +		return PTR_ERR(clk);
> > +
> > +	ebi->clk = clk;
> > +
> > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > +	if (!np)
> > +		return -EINVAL;
> > +
> > +	ebi->smc = syscon_node_to_regmap(np);
> > +	if (IS_ERR(ebi->smc))
> > +		return PTR_ERR(ebi->smc);
> > +
> > +	/*
> > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > +	 * to access the matrix registers.
> > +	 */
> > +	if (ebi->caps->ebi_csa) {
> > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > +		if (np)
>          ^^^^^^^
> Shouldn't this be if (!np)?

Absolutely, thanks for pointing this out.
I'll test on other at91 platforms (I currently only test on sama5d3
boards, which do not have this EBICSA register) before submitting a new
version.

Regards,

Boris



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

Hi Alexander,

On Tue, 09 Dec 2014 21:53:12 +0100
Alexander Stein <alexanders83@web.de> wrote:

> Hi,
> 
> On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > +static int at91_ebi_probe(struct platform_device *pdev)
> > +{
> > +	const struct of_device_id *match;
> > +	struct device_node *child;
> > +	struct device_node *np;
> > +	struct at91_ebi *ebi;
> > +	struct clk *clk;
> > +	int ret;
> > +
> > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > +	if (!match || !match->data)
> > +		return -EINVAL;
> > +
> > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > +	if (!ebi)
> > +		return -ENOMEM;
> > +
> > +	ebi->caps = match->data;
> > +	ebi->dev = &pdev->dev;
> > +
> > +	clk = devm_clk_get(&pdev->dev, NULL);
> > +	if (IS_ERR(clk))
> > +		return PTR_ERR(clk);
> > +
> > +	ebi->clk = clk;
> > +
> > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > +	if (!np)
> > +		return -EINVAL;
> > +
> > +	ebi->smc = syscon_node_to_regmap(np);
> > +	if (IS_ERR(ebi->smc))
> > +		return PTR_ERR(ebi->smc);
> > +
> > +	/*
> > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > +	 * to access the matrix registers.
> > +	 */
> > +	if (ebi->caps->ebi_csa) {
> > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > +		if (np)
>          ^^^^^^^
> Shouldn't this be if (!np)?

Absolutely, thanks for pointing this out.
I'll test on other at91 platforms (I currently only test on sama5d3
boards, which do not have this EBICSA register) before submitting a new
version.

Regards,

Boris



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

On Monday 15 December 2014 11:22:30, Boris Brezillon wrote:
> Hi Alexander,
> 
> On Tue, 09 Dec 2014 21:53:12 +0100
> Alexander Stein <alexanders83@web.de> wrote:
> 
> > Hi,
> > 
> > On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > > +static int at91_ebi_probe(struct platform_device *pdev)
> > > +{
> > > +	const struct of_device_id *match;
> > > +	struct device_node *child;
> > > +	struct device_node *np;
> > > +	struct at91_ebi *ebi;
> > > +	struct clk *clk;
> > > +	int ret;
> > > +
> > > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > > +	if (!match || !match->data)
> > > +		return -EINVAL;
> > > +
> > > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > > +	if (!ebi)
> > > +		return -ENOMEM;
> > > +
> > > +	ebi->caps = match->data;
> > > +	ebi->dev = &pdev->dev;
> > > +
> > > +	clk = devm_clk_get(&pdev->dev, NULL);
> > > +	if (IS_ERR(clk))
> > > +		return PTR_ERR(clk);
> > > +
> > > +	ebi->clk = clk;
> > > +
> > > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > > +	if (!np)
> > > +		return -EINVAL;
> > > +
> > > +	ebi->smc = syscon_node_to_regmap(np);
> > > +	if (IS_ERR(ebi->smc))
> > > +		return PTR_ERR(ebi->smc);
> > > +
> > > +	/*
> > > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > > +	 * to access the matrix registers.
> > > +	 */
> > > +	if (ebi->caps->ebi_csa) {
> > > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > > +		if (np)
> >          ^^^^^^^
> > Shouldn't this be if (!np)?
> 
> Absolutely, thanks for pointing this out.
> I'll test on other at91 platforms (I currently only test on sama5d3
> boards, which do not have this EBICSA register) before submitting a new
> version.

Oh, well. I've noticed you posted a v4 of this patch which changed this specific code. I didn't noticed this.
I'll replace the old v3 and retry. I'm using this code on 9263 so far configuring EBI1 for a PSRAM. Works so far.
Once I exchanged patch 05/11 with your v4 I'll send my DT changes for 9263 to support this feature.

Best regards,
Alexander

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

On Monday 15 December 2014 11:22:30, Boris Brezillon wrote:
> Hi Alexander,
> 
> On Tue, 09 Dec 2014 21:53:12 +0100
> Alexander Stein <alexanders83-S0/GAf8tV78@public.gmane.org> wrote:
> 
> > Hi,
> > 
> > On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > > +static int at91_ebi_probe(struct platform_device *pdev)
> > > +{
> > > +	const struct of_device_id *match;
> > > +	struct device_node *child;
> > > +	struct device_node *np;
> > > +	struct at91_ebi *ebi;
> > > +	struct clk *clk;
> > > +	int ret;
> > > +
> > > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > > +	if (!match || !match->data)
> > > +		return -EINVAL;
> > > +
> > > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > > +	if (!ebi)
> > > +		return -ENOMEM;
> > > +
> > > +	ebi->caps = match->data;
> > > +	ebi->dev = &pdev->dev;
> > > +
> > > +	clk = devm_clk_get(&pdev->dev, NULL);
> > > +	if (IS_ERR(clk))
> > > +		return PTR_ERR(clk);
> > > +
> > > +	ebi->clk = clk;
> > > +
> > > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > > +	if (!np)
> > > +		return -EINVAL;
> > > +
> > > +	ebi->smc = syscon_node_to_regmap(np);
> > > +	if (IS_ERR(ebi->smc))
> > > +		return PTR_ERR(ebi->smc);
> > > +
> > > +	/*
> > > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > > +	 * to access the matrix registers.
> > > +	 */
> > > +	if (ebi->caps->ebi_csa) {
> > > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > > +		if (np)
> >          ^^^^^^^
> > Shouldn't this be if (!np)?
> 
> Absolutely, thanks for pointing this out.
> I'll test on other at91 platforms (I currently only test on sama5d3
> boards, which do not have this EBICSA register) before submitting a new
> version.

Oh, well. I've noticed you posted a v4 of this patch which changed this specific code. I didn't noticed this.
I'll replace the old v3 and retry. I'm using this code on 9263 so far configuring EBI1 for a PSRAM. Works so far.
Once I exchanged patch 05/11 with your v4 I'll send my DT changes for 9263 to support this feature.

Best regards,
Alexander

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To unsubscribe from this list: send the line "unsubscribe devicetree" in
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[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Alexander Stein]

On Monday 15 December 2014 11:22:30, Boris Brezillon wrote:
> Hi Alexander,
> 
> On Tue, 09 Dec 2014 21:53:12 +0100
> Alexander Stein <alexanders83@web.de> wrote:
> 
> > Hi,
> > 
> > On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > > +static int at91_ebi_probe(struct platform_device *pdev)
> > > +{
> > > +	const struct of_device_id *match;
> > > +	struct device_node *child;
> > > +	struct device_node *np;
> > > +	struct at91_ebi *ebi;
> > > +	struct clk *clk;
> > > +	int ret;
> > > +
> > > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > > +	if (!match || !match->data)
> > > +		return -EINVAL;
> > > +
> > > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > > +	if (!ebi)
> > > +		return -ENOMEM;
> > > +
> > > +	ebi->caps = match->data;
> > > +	ebi->dev = &pdev->dev;
> > > +
> > > +	clk = devm_clk_get(&pdev->dev, NULL);
> > > +	if (IS_ERR(clk))
> > > +		return PTR_ERR(clk);
> > > +
> > > +	ebi->clk = clk;
> > > +
> > > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > > +	if (!np)
> > > +		return -EINVAL;
> > > +
> > > +	ebi->smc = syscon_node_to_regmap(np);
> > > +	if (IS_ERR(ebi->smc))
> > > +		return PTR_ERR(ebi->smc);
> > > +
> > > +	/*
> > > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > > +	 * to access the matrix registers.
> > > +	 */
> > > +	if (ebi->caps->ebi_csa) {
> > > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > > +		if (np)
> >          ^^^^^^^
> > Shouldn't this be if (!np)?
> 
> Absolutely, thanks for pointing this out.
> I'll test on other at91 platforms (I currently only test on sama5d3
> boards, which do not have this EBICSA register) before submitting a new
> version.

Oh, well. I've noticed you posted a v4 of this patch which changed this specific code. I didn't noticed this.
I'll replace the old v3 and retry. I'm using this code on 9263 so far configuring EBI1 for a PSRAM. Works so far.
Once I exchanged patch 05/11 with your v4 I'll send my DT changes for 9263 to support this feature.

Best regards,
Alexander

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

On Mon, 15 Dec 2014 11:29:14 +0100
Alexander Stein <alexanders83@web.de> wrote:

> On Monday 15 December 2014 11:22:30, Boris Brezillon wrote:
> > Hi Alexander,
> > 
> > On Tue, 09 Dec 2014 21:53:12 +0100
> > Alexander Stein <alexanders83@web.de> wrote:
> > 
> > > Hi,
> > > 
> > > On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > > > +static int at91_ebi_probe(struct platform_device *pdev)
> > > > +{
> > > > +	const struct of_device_id *match;
> > > > +	struct device_node *child;
> > > > +	struct device_node *np;
> > > > +	struct at91_ebi *ebi;
> > > > +	struct clk *clk;
> > > > +	int ret;
> > > > +
> > > > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > > > +	if (!match || !match->data)
> > > > +		return -EINVAL;
> > > > +
> > > > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > > > +	if (!ebi)
> > > > +		return -ENOMEM;
> > > > +
> > > > +	ebi->caps = match->data;
> > > > +	ebi->dev = &pdev->dev;
> > > > +
> > > > +	clk = devm_clk_get(&pdev->dev, NULL);
> > > > +	if (IS_ERR(clk))
> > > > +		return PTR_ERR(clk);
> > > > +
> > > > +	ebi->clk = clk;
> > > > +
> > > > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > > > +	if (!np)
> > > > +		return -EINVAL;
> > > > +
> > > > +	ebi->smc = syscon_node_to_regmap(np);
> > > > +	if (IS_ERR(ebi->smc))
> > > > +		return PTR_ERR(ebi->smc);
> > > > +
> > > > +	/*
> > > > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > > > +	 * to access the matrix registers.
> > > > +	 */
> > > > +	if (ebi->caps->ebi_csa) {
> > > > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > > > +		if (np)
> > >          ^^^^^^^
> > > Shouldn't this be if (!np)?
> > 
> > Absolutely, thanks for pointing this out.
> > I'll test on other at91 platforms (I currently only test on sama5d3
> > boards, which do not have this EBICSA register) before submitting a new
> > version.
> 
> Oh, well. I've noticed you posted a v4 of this patch which changed this specific code. I didn't noticed this.

Indeed, calling syscon_regmap_lookup_by_phandle fixed the problem.

Actually there is a v5 [1], and you should use this version because the
DT binding has slightly changed).
I'll add you in Cc of my future versions ;-).

> I'll replace the old v3 and retry. I'm using this code on 9263 so far configuring EBI1 for a PSRAM. Works so far.
> Once I exchanged patch 05/11 with your v4 I'll send my DT changes for 9263 to support this feature.

Thanks for testing that part, I'm looking forward to your DT
patches :-).

Regards,

Boris

[1]https://lkml.org/lkml/2014/12/3/806

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Re: [PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

On Mon, 15 Dec 2014 11:29:14 +0100
Alexander Stein <alexanders83-S0/GAf8tV78@public.gmane.org> wrote:

> On Monday 15 December 2014 11:22:30, Boris Brezillon wrote:
> > Hi Alexander,
> > 
> > On Tue, 09 Dec 2014 21:53:12 +0100
> > Alexander Stein <alexanders83-S0/GAf8tV78@public.gmane.org> wrote:
> > 
> > > Hi,
> > > 
> > > On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > > > +static int at91_ebi_probe(struct platform_device *pdev)
> > > > +{
> > > > +	const struct of_device_id *match;
> > > > +	struct device_node *child;
> > > > +	struct device_node *np;
> > > > +	struct at91_ebi *ebi;
> > > > +	struct clk *clk;
> > > > +	int ret;
> > > > +
> > > > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > > > +	if (!match || !match->data)
> > > > +		return -EINVAL;
> > > > +
> > > > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > > > +	if (!ebi)
> > > > +		return -ENOMEM;
> > > > +
> > > > +	ebi->caps = match->data;
> > > > +	ebi->dev = &pdev->dev;
> > > > +
> > > > +	clk = devm_clk_get(&pdev->dev, NULL);
> > > > +	if (IS_ERR(clk))
> > > > +		return PTR_ERR(clk);
> > > > +
> > > > +	ebi->clk = clk;
> > > > +
> > > > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > > > +	if (!np)
> > > > +		return -EINVAL;
> > > > +
> > > > +	ebi->smc = syscon_node_to_regmap(np);
> > > > +	if (IS_ERR(ebi->smc))
> > > > +		return PTR_ERR(ebi->smc);
> > > > +
> > > > +	/*
> > > > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > > > +	 * to access the matrix registers.
> > > > +	 */
> > > > +	if (ebi->caps->ebi_csa) {
> > > > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > > > +		if (np)
> > >          ^^^^^^^
> > > Shouldn't this be if (!np)?
> > 
> > Absolutely, thanks for pointing this out.
> > I'll test on other at91 platforms (I currently only test on sama5d3
> > boards, which do not have this EBICSA register) before submitting a new
> > version.
> 
> Oh, well. I've noticed you posted a v4 of this patch which changed this specific code. I didn't noticed this.

Indeed, calling syscon_regmap_lookup_by_phandle fixed the problem.

Actually there is a v5 [1], and you should use this version because the
DT binding has slightly changed).
I'll add you in Cc of my future versions ;-).

> I'll replace the old v3 and retry. I'm using this code on 9263 so far configuring EBI1 for a PSRAM. Works so far.
> Once I exchanged patch 05/11 with your v4 I'll send my DT changes for 9263 to support this feature.

Thanks for testing that part, I'm looking forward to your DT
patches :-).

Regards,

Boris

[1]https://lkml.org/lkml/2014/12/3/806

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v3 05/11] memory: add Atmel EBI (External Bus Interface) driver

[Boris Brezillon]

On Mon, 15 Dec 2014 11:29:14 +0100
Alexander Stein <alexanders83@web.de> wrote:

> On Monday 15 December 2014 11:22:30, Boris Brezillon wrote:
> > Hi Alexander,
> > 
> > On Tue, 09 Dec 2014 21:53:12 +0100
> > Alexander Stein <alexanders83@web.de> wrote:
> > 
> > > Hi,
> > > 
> > > On Monday 01 December 2014, 11:27:21 wrote Boris Brezillon:
> > > > +static int at91_ebi_probe(struct platform_device *pdev)
> > > > +{
> > > > +	const struct of_device_id *match;
> > > > +	struct device_node *child;
> > > > +	struct device_node *np;
> > > > +	struct at91_ebi *ebi;
> > > > +	struct clk *clk;
> > > > +	int ret;
> > > > +
> > > > +	match = of_match_device(at91_ebi_id_table, &pdev->dev);
> > > > +	if (!match || !match->data)
> > > > +		return -EINVAL;
> > > > +
> > > > +	ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
> > > > +	if (!ebi)
> > > > +		return -ENOMEM;
> > > > +
> > > > +	ebi->caps = match->data;
> > > > +	ebi->dev = &pdev->dev;
> > > > +
> > > > +	clk = devm_clk_get(&pdev->dev, NULL);
> > > > +	if (IS_ERR(clk))
> > > > +		return PTR_ERR(clk);
> > > > +
> > > > +	ebi->clk = clk;
> > > > +
> > > > +	np = of_parse_phandle(pdev->dev.of_node, "atmel,smc", 0);
> > > > +	if (!np)
> > > > +		return -EINVAL;
> > > > +
> > > > +	ebi->smc = syscon_node_to_regmap(np);
> > > > +	if (IS_ERR(ebi->smc))
> > > > +		return PTR_ERR(ebi->smc);
> > > > +
> > > > +	/*
> > > > +	 * The sama5d3 does not provide an EBICSA register and thus does need
> > > > +	 * to access the matrix registers.
> > > > +	 */
> > > > +	if (ebi->caps->ebi_csa) {
> > > > +		np = of_parse_phandle(pdev->dev.of_node, "atmel,matrix", 0);
> > > > +		if (np)
> > >          ^^^^^^^
> > > Shouldn't this be if (!np)?
> > 
> > Absolutely, thanks for pointing this out.
> > I'll test on other at91 platforms (I currently only test on sama5d3
> > boards, which do not have this EBICSA register) before submitting a new
> > version.
> 
> Oh, well. I've noticed you posted a v4 of this patch which changed this specific code. I didn't noticed this.

Indeed, calling syscon_regmap_lookup_by_phandle fixed the problem.

Actually there is a v5 [1], and you should use this version because the
DT binding has slightly changed).
I'll add you in Cc of my future versions ;-).

> I'll replace the old v3 and retry. I'm using this code on 9263 so far configuring EBI1 for a PSRAM. Works so far.
> Once I exchanged patch 05/11 with your v4 I'll send my DT changes for 9263 to support this feature.

Thanks for testing that part, I'm looking forward to your DT
patches :-).

Regards,

Boris

[1]https://lkml.org/lkml/2014/12/3/806

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com