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From: James Hogan <james.hogan@imgtec.com>
To: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Paul Burton <paul.burton@imgtec.com>,
	Ralf Baechle <ralf@linux-mips.org>, <linux-mips@linux-mips.org>,
	Alexander Viro <viro@zeniv.linux.org.uk>,
	<linux-fsdevel@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 07/10] MIPS: support for hybrid FPRs
Date: Tue, 23 Dec 2014 23:31:54 +0000	[thread overview]
Message-ID: <20141223233154.GA4171@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <20141223232111.GA593@fuloong-minipc.musicnaut.iki.fi>

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On Wed, Dec 24, 2014 at 01:21:11AM +0200, Aaro Koskinen wrote:
> Hi,
> 
> On Thu, Sep 11, 2014 at 08:30:20AM +0100, Paul Burton wrote:
> > Hybrid FPRs is a scheme where scalar FP registers are 64b wide, but
> > accesses to odd indexed single registers use bits 63:32 of the
> > preceeding even indexed 64b register. In this mode all FP code
> > except that built for the plain FP64 ABI can execute correctly. Most
> > notably a combination of FP64A & FP32 code can execute correctly,
> > allowing for existing FP32 binaries to be linked with new FP64A binaries
> > that can make use of 64 bit FP & MSA.
> 
> This commit (4227a2d4efc9c84f35826dc4d1e6dc183f6c1c05, bisected)
> in 3.19-rc1 breaks my Loongson-2F system. I get endless amount
> of "Reserved instruction in kernel code" exceptions when booting.
> See some examples below. Nothing crashes, and there is some forward
> progress, but obviously it's completely unusable.
> 
> Any ideas?
> 
> [    2.872000] Reserved instruction in kernel code[#1]:
...
> Code: 30420001  2c420001  0040202d <40038005> 2405feff  00651824  40838005  3c032000  3c052400 

0x40038005 = mfc0 v1,$16,5 = mfc0 v1,Config5

Does this help (in linux-next)?:
http://git.linux-mips.org/cgit/ralf/upstream-sfr.git/commit/?id=5bba8dec735f18fe7a2fcd8327f28ef095337ff2

Cheers
James

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WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Paul Burton <paul.burton@imgtec.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	linux-mips@linux-mips.org,
	Alexander Viro <viro@zeniv.linux.org.uk>,
	linux-fsdevel@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 07/10] MIPS: support for hybrid FPRs
Date: Tue, 23 Dec 2014 23:31:54 +0000	[thread overview]
Message-ID: <20141223233154.GA4171@jhogan-linux.le.imgtec.org> (raw)
Message-ID: <20141223233154.5_f_35z4K-JX42lFhS5tcSJXUC88CjEWOCd_wTcI3GY@z> (raw)
In-Reply-To: <20141223232111.GA593@fuloong-minipc.musicnaut.iki.fi>

[-- Attachment #1: Type: text/plain, Size: 1337 bytes --]

On Wed, Dec 24, 2014 at 01:21:11AM +0200, Aaro Koskinen wrote:
> Hi,
> 
> On Thu, Sep 11, 2014 at 08:30:20AM +0100, Paul Burton wrote:
> > Hybrid FPRs is a scheme where scalar FP registers are 64b wide, but
> > accesses to odd indexed single registers use bits 63:32 of the
> > preceeding even indexed 64b register. In this mode all FP code
> > except that built for the plain FP64 ABI can execute correctly. Most
> > notably a combination of FP64A & FP32 code can execute correctly,
> > allowing for existing FP32 binaries to be linked with new FP64A binaries
> > that can make use of 64 bit FP & MSA.
> 
> This commit (4227a2d4efc9c84f35826dc4d1e6dc183f6c1c05, bisected)
> in 3.19-rc1 breaks my Loongson-2F system. I get endless amount
> of "Reserved instruction in kernel code" exceptions when booting.
> See some examples below. Nothing crashes, and there is some forward
> progress, but obviously it's completely unusable.
> 
> Any ideas?
> 
> [    2.872000] Reserved instruction in kernel code[#1]:
...
> Code: 30420001  2c420001  0040202d <40038005> 2405feff  00651824  40838005  3c032000  3c052400 

0x40038005 = mfc0 v1,$16,5 = mfc0 v1,Config5

Does this help (in linux-next)?:
http://git.linux-mips.org/cgit/ralf/upstream-sfr.git/commit/?id=5bba8dec735f18fe7a2fcd8327f28ef095337ff2

Cheers
James

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  reply	other threads:[~2014-12-23 23:32 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-11  7:30 [PATCH 00/10] MIPS O32 new FP ABI support Paul Burton
2014-09-11  7:30 ` Paul Burton
2014-09-11  7:30 ` [PATCH 01/10] binfmt_elf: hoist ELF program header loading to a function Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-09-11  7:30 ` [PATCH 02/10] binfmt_elf: load interpreter program headers earlier Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-11-13 12:20   ` Thierry Reding
2014-11-13 17:29     ` Ralf Baechle
2014-09-11  7:30 ` [PATCH 03/10] binfmt_elf: allow arch code to examine PT_LOPROC ... PT_HIPROC headers Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-11-12 13:41   ` Thierry Reding
2014-11-13  0:16     ` Ralf Baechle
2014-11-13 12:25       ` Thierry Reding
2014-09-11  7:30 ` [PATCH 04/10] MIPS: define bits introduced for hybrid FPRs Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-09-11  7:30 ` [PATCH 05/10] MIPS: detect presence of the FRE & UFR bits Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-09-11  7:30 ` [PATCH 06/10] MIPS: ensure Config5.UFE is clear on boot Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-09-11  7:30 ` [PATCH 07/10] MIPS: support for hybrid FPRs Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-12-23 23:21   ` Aaro Koskinen
2014-12-23 23:31     ` James Hogan [this message]
2014-12-23 23:31       ` James Hogan
2014-12-23 23:51       ` Aaro Koskinen
2014-09-11  7:30 ` [PATCH 08/10] MIPS: ELF: add definition for the .MIPS.abiflags section Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-09-11  7:30 ` [PATCH 09/10] MIPS: ELF: set FP mode according to .MIPS.abiflags Paul Burton
2014-09-11  7:30   ` Paul Burton
2014-09-11  7:30 ` [PATCH 10/10] MIPS: Kconfig option to better exercise/debug hybrid FPRs Paul Burton
2014-09-11  7:30   ` Paul Burton

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