* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-21 4:52 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:52 UTC (permalink / raw)
To: linux-arm-kernel
ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
[PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
[PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
[PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
[PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
[PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
[PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
[PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
[PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
[PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
[PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
[PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
[PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
[PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
Remove legacy board and SoC support for Mackerel and sh7372. Both the
ARM mach-shmobile code base and the PINCTRL subsystem is affected.
Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
utility that has no user once sh7372 is gone.
The Cortex-A8 based sh7372 SoC is rather old and never went into mass
production anyway, so these patches that remove SoC and board support
will only affect a few selected developers.
I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
without any board or SoC code it makes little sense to keep it.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Built on top of renesas-devel-20150121-v3.19-rc5
Documentation/arm/Makefile | 2
Documentation/arm/SH-Mobile/Makefile | 7
Documentation/arm/SH-Mobile/vrl4.c | 170
Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt | 29
Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt | 42
Documentation/devicetree/bindings/arm/shmobile.txt | 4
Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 8
arch/arm/Kconfig | 29
arch/arm/Kconfig.debug | 7
arch/arm/boot/compressed/Makefile | 15
arch/arm/boot/compressed/head-shmobile.S | 30
arch/arm/boot/compressed/mmcif-sh7372.c | 88
arch/arm/boot/compressed/sdhi-sh7372.c | 95
arch/arm/boot/compressed/sdhi-shmobile.c | 449 -
arch/arm/boot/compressed/sdhi-shmobile.h | 11
arch/arm/boot/dts/Makefile | 1
arch/arm/boot/dts/sh7372-mackerel.dts | 26
arch/arm/boot/dts/sh7372.dtsi | 35
arch/arm/configs/mackerel_defconfig | 157
arch/arm/mach-shmobile/Kconfig | 16
arch/arm/mach-shmobile/Makefile | 6
arch/arm/mach-shmobile/Makefile.boot | 1
arch/arm/mach-shmobile/board-mackerel.c | 1522 -----
arch/arm/mach-shmobile/clock-sh7372.c | 620 --
arch/arm/mach-shmobile/common.h | 1
arch/arm/mach-shmobile/entry-intc.S | 54
arch/arm/mach-shmobile/include/mach/head-mackerel.txt | 93
arch/arm/mach-shmobile/include/mach/mmc-mackerel.h | 38
arch/arm/mach-shmobile/include/mach/mmc.h | 16
arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h | 21
arch/arm/mach-shmobile/include/mach/sdhi.h | 16
arch/arm/mach-shmobile/include/mach/zboot.h | 5
arch/arm/mach-shmobile/intc-sh7372.c | 672 --
arch/arm/mach-shmobile/pm-sh7372.c | 549 --
arch/arm/mach-shmobile/setup-sh7372.c | 1016 ---
arch/arm/mach-shmobile/sh7372.h | 84
arch/arm/mach-shmobile/sleep-sh7372.S | 98
arch/arm/tools/mach-types | 1
drivers/pinctrl/sh-pfc/Kconfig | 5
drivers/pinctrl/sh-pfc/Makefile | 1
drivers/pinctrl/sh-pfc/core.c | 9
drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 ----------
42 files changed, 8 insertions(+), 8686 deletions(-)
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:53 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove ZBOOT support code for Mackerel. With this patch in place
it is no longer possible to boot a self-contained kernel directly
from the reset vector. ZBOOT is still supported on kzm9g.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/mach-shmobile/include/mach/head-mackerel.txt | 93 -----------------
arch/arm/mach-shmobile/include/mach/mmc-mackerel.h | 38 ------
arch/arm/mach-shmobile/include/mach/mmc.h | 5
arch/arm/mach-shmobile/include/mach/zboot.h | 5
4 files changed, 1 insertion(+), 140 deletions(-)
--- 0001/arch/arm/mach-shmobile/include/mach/head-mackerel.txt
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,93 +0,0 @@
-LIST "partner-jet-setup.txt"
-LIST "(C) Copyright 2010 Renesas Solutions Corp"
-LIST "Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>"
-
-LIST "RWT Setting"
-EW 0xE6020004, 0xA500
-EW 0xE6030004, 0xA500
-
-LIST "GPIO Setting"
-EB 0xE6051013, 0xA2
-
-LIST "CPG"
-ED 0xE61500C0, 0x00000002
-
-WAIT 1, 0xFE40009C
-
-LIST "FRQCR"
-ED 0xE6150000, 0x2D1305C3
-ED 0xE61500E0, 0x9E40358E
-ED 0xE6150004, 0x80331050
-
-WAIT 1, 0xFE40009C
-
-ED 0xE61500E4, 0x00002000
-
-WAIT 1, 0xFE40009C
-
-LIST "PLL"
-ED 0xE6150028, 0x00004000
-
-WAIT 1, 0xFE40009C
-
-ED 0xE615002C, 0x93000040
-
-WAIT 1, 0xFE40009C
-
-LIST "SUB/USBClk"
-ED 0xE6150080, 0x00000180
-
-LIST "BSC"
-ED 0xFEC10000, 0x00E0001B
-
-LIST "SBSC1"
-ED 0xFE400354, 0x01AD8000
-ED 0xFE400354, 0x01AD8001
-
-WAIT 5, 0xFE40009C
-
-ED 0xFE400008, 0xBCC90151
-ED 0xFE400040, 0x41774113
-ED 0xFE400044, 0x2712E229
-ED 0xFE400048, 0x20C18505
-ED 0xFE40004C, 0x00110209
-ED 0xFE400010, 0x00000087
-
-WAIT 30, 0xFE40009C
-
-ED 0xFE400084, 0x0000003F
-EB 0xFE500000, 0x00
-
-WAIT 5, 0xFE40009C
-
-ED 0xFE400084, 0x0000FF0A
-EB 0xFE500000, 0x00
-
-WAIT 1, 0xFE40009C
-
-ED 0xFE400084, 0x00002201
-EB 0xFE500000, 0x00
-ED 0xFE400084, 0x00000302
-EB 0xFE500000, 0x00
-EB 0xFE5C0000, 0x00
-ED 0xFE400008, 0xBCC90159
-ED 0xFE40008C, 0x88800004
-ED 0xFE400094, 0x00000004
-ED 0xFE400028, 0xA55A0032
-ED 0xFE40002C, 0xA55A000C
-ED 0xFE400020, 0xA55A2048
-ED 0xFE400008, 0xBCC90959
-
-LIST "Change CPGA setting"
-ED 0xE61500E0, 0x9E40352E
-ED 0xE6150004, 0x80331050
-
-WAIT 1, 0xFE40009C
-
-ED 0xFE400354, 0x01AD8002
-
-LIST "SCIF0 - Serial port for earlyprintk"
-EB 0xE6053098, 0xe1
-EW 0xE6C40000, 0x0000
-EB 0xE6C40004, 0x19
-EW 0xE6C40008, 0x0030
--- 0001/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,38 +0,0 @@
-#ifndef MMC_MACKEREL_H
-#define MMC_MACKEREL_H
-
-#define PORT0CR (void __iomem *)0xe6051000
-#define PORT1CR (void __iomem *)0xe6051001
-#define PORT2CR (void __iomem *)0xe6051002
-#define PORT159CR (void __iomem *)0xe605009f
-
-#define PORTR031_000DR (void __iomem *)0xe6055000
-#define PORTL159_128DR (void __iomem *)0xe6054010
-
-static inline void mmc_init_progress(void)
-{
- /* Initialise LEDS0-3
- * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control)
- * value: 0x10 - enable output
- */
- __raw_writeb(0x10, PORT0CR);
- __raw_writeb(0x10, PORT1CR);
- __raw_writeb(0x10, PORT2CR);
- __raw_writeb(0x10, PORT159CR);
-}
-
-static inline void mmc_update_progress(int n)
-{
- unsigned a = 0, b = 0;
-
- if (n < 3)
- a = 1 << n;
- else
- b = 1 << 31;
-
- __raw_writel((__raw_readl(PORTR031_000DR) & ~0x7) | a,
- PORTR031_000DR);
- __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b,
- PORTL159_128DR);
-}
-#endif /* MMC_MACKEREL_H */
--- 0001/arch/arm/mach-shmobile/include/mach/mmc.h
+++ work/arch/arm/mach-shmobile/include/mach/mmc.h 2015-01-21 11:01:29.117577170 +0900
@@ -7,10 +7,5 @@
*
**************************************************/
-#ifdef CONFIG_MACH_MACKEREL
-#include "mach/mmc-mackerel.h"
-#else
#error "unsupported board."
-#endif
-
#endif /* MMC_H */
--- 0001/arch/arm/mach-shmobile/include/mach/zboot.h
+++ work/arch/arm/mach-shmobile/include/mach/zboot.h 2015-01-21 11:02:18.497576992 +0900
@@ -9,10 +9,7 @@
*
**************************************************/
-#ifdef CONFIG_MACH_MACKEREL
-#define MEMORY_START 0x40000000
-#include "mach/head-mackerel.txt"
-#elif defined(CONFIG_MACH_KZM9G)
+#ifdef CONFIG_MACH_KZM9G
#define MEMORY_START 0x43000000
#include "mach/head-kzm9g.txt"
#else
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
@ 2015-01-21 4:53 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove ZBOOT support code for Mackerel. With this patch in place
it is no longer possible to boot a self-contained kernel directly
from the reset vector. ZBOOT is still supported on kzm9g.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/mach-shmobile/include/mach/head-mackerel.txt | 93 -----------------
arch/arm/mach-shmobile/include/mach/mmc-mackerel.h | 38 ------
arch/arm/mach-shmobile/include/mach/mmc.h | 5
arch/arm/mach-shmobile/include/mach/zboot.h | 5
4 files changed, 1 insertion(+), 140 deletions(-)
--- 0001/arch/arm/mach-shmobile/include/mach/head-mackerel.txt
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,93 +0,0 @@
-LIST "partner-jet-setup.txt"
-LIST "(C) Copyright 2010 Renesas Solutions Corp"
-LIST "Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>"
-
-LIST "RWT Setting"
-EW 0xE6020004, 0xA500
-EW 0xE6030004, 0xA500
-
-LIST "GPIO Setting"
-EB 0xE6051013, 0xA2
-
-LIST "CPG"
-ED 0xE61500C0, 0x00000002
-
-WAIT 1, 0xFE40009C
-
-LIST "FRQCR"
-ED 0xE6150000, 0x2D1305C3
-ED 0xE61500E0, 0x9E40358E
-ED 0xE6150004, 0x80331050
-
-WAIT 1, 0xFE40009C
-
-ED 0xE61500E4, 0x00002000
-
-WAIT 1, 0xFE40009C
-
-LIST "PLL"
-ED 0xE6150028, 0x00004000
-
-WAIT 1, 0xFE40009C
-
-ED 0xE615002C, 0x93000040
-
-WAIT 1, 0xFE40009C
-
-LIST "SUB/USBClk"
-ED 0xE6150080, 0x00000180
-
-LIST "BSC"
-ED 0xFEC10000, 0x00E0001B
-
-LIST "SBSC1"
-ED 0xFE400354, 0x01AD8000
-ED 0xFE400354, 0x01AD8001
-
-WAIT 5, 0xFE40009C
-
-ED 0xFE400008, 0xBCC90151
-ED 0xFE400040, 0x41774113
-ED 0xFE400044, 0x2712E229
-ED 0xFE400048, 0x20C18505
-ED 0xFE40004C, 0x00110209
-ED 0xFE400010, 0x00000087
-
-WAIT 30, 0xFE40009C
-
-ED 0xFE400084, 0x0000003F
-EB 0xFE500000, 0x00
-
-WAIT 5, 0xFE40009C
-
-ED 0xFE400084, 0x0000FF0A
-EB 0xFE500000, 0x00
-
-WAIT 1, 0xFE40009C
-
-ED 0xFE400084, 0x00002201
-EB 0xFE500000, 0x00
-ED 0xFE400084, 0x00000302
-EB 0xFE500000, 0x00
-EB 0xFE5C0000, 0x00
-ED 0xFE400008, 0xBCC90159
-ED 0xFE40008C, 0x88800004
-ED 0xFE400094, 0x00000004
-ED 0xFE400028, 0xA55A0032
-ED 0xFE40002C, 0xA55A000C
-ED 0xFE400020, 0xA55A2048
-ED 0xFE400008, 0xBCC90959
-
-LIST "Change CPGA setting"
-ED 0xE61500E0, 0x9E40352E
-ED 0xE6150004, 0x80331050
-
-WAIT 1, 0xFE40009C
-
-ED 0xFE400354, 0x01AD8002
-
-LIST "SCIF0 - Serial port for earlyprintk"
-EB 0xE6053098, 0xe1
-EW 0xE6C40000, 0x0000
-EB 0xE6C40004, 0x19
-EW 0xE6C40008, 0x0030
--- 0001/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,38 +0,0 @@
-#ifndef MMC_MACKEREL_H
-#define MMC_MACKEREL_H
-
-#define PORT0CR (void __iomem *)0xe6051000
-#define PORT1CR (void __iomem *)0xe6051001
-#define PORT2CR (void __iomem *)0xe6051002
-#define PORT159CR (void __iomem *)0xe605009f
-
-#define PORTR031_000DR (void __iomem *)0xe6055000
-#define PORTL159_128DR (void __iomem *)0xe6054010
-
-static inline void mmc_init_progress(void)
-{
- /* Initialise LEDS0-3
- * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control)
- * value: 0x10 - enable output
- */
- __raw_writeb(0x10, PORT0CR);
- __raw_writeb(0x10, PORT1CR);
- __raw_writeb(0x10, PORT2CR);
- __raw_writeb(0x10, PORT159CR);
-}
-
-static inline void mmc_update_progress(int n)
-{
- unsigned a = 0, b = 0;
-
- if (n < 3)
- a = 1 << n;
- else
- b = 1 << 31;
-
- __raw_writel((__raw_readl(PORTR031_000DR) & ~0x7) | a,
- PORTR031_000DR);
- __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b,
- PORTL159_128DR);
-}
-#endif /* MMC_MACKEREL_H */
--- 0001/arch/arm/mach-shmobile/include/mach/mmc.h
+++ work/arch/arm/mach-shmobile/include/mach/mmc.h 2015-01-21 11:01:29.117577170 +0900
@@ -7,10 +7,5 @@
*
**************************************************/
-#ifdef CONFIG_MACH_MACKEREL
-#include "mach/mmc-mackerel.h"
-#else
#error "unsupported board."
-#endif
-
#endif /* MMC_H */
--- 0001/arch/arm/mach-shmobile/include/mach/zboot.h
+++ work/arch/arm/mach-shmobile/include/mach/zboot.h 2015-01-21 11:02:18.497576992 +0900
@@ -9,10 +9,7 @@
*
**************************************************/
-#ifdef CONFIG_MACH_MACKEREL
-#define MEMORY_START 0x40000000
-#include "mach/head-mackerel.txt"
-#elif defined(CONFIG_MACH_KZM9G)
+#ifdef CONFIG_MACH_KZM9G
#define MEMORY_START 0x43000000
#include "mach/head-kzm9g.txt"
#else
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:53 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove legacy C code for the sh7372 Mackerel board. There is no
DT multiplatform implementation available for the sh7372 SoC so
simply phase out the board and SoC code support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/mach-shmobile/Kconfig | 9
arch/arm/mach-shmobile/Makefile | 1
arch/arm/mach-shmobile/Makefile.boot | 1
arch/arm/mach-shmobile/board-mackerel.c | 1522 -------------------------------
4 files changed, 1533 deletions(-)
--- 0001/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2015-01-21 11:05:32.797576294 +0900
@@ -134,15 +134,6 @@ config ARCH_R8A7779
comment "Renesas ARM SoCs Board Type"
-config MACH_MACKEREL
- bool "mackerel board"
- depends on ARCH_SH7372
- select ARCH_REQUIRE_GPIOLIB
- select REGULATOR_FIXED_VOLTAGE if REGULATOR
- select SMSC_PHY if SMSC911X
- select SND_SOC_AK4642 if SND_SIMPLE_CARD
- select USE_OF
-
config MACH_ARMADILLO800EVA
bool "Armadillo-800 EVA board"
depends on ARCH_R8A7740
--- 0001/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2015-01-21 11:05:21.847576333 +0900
@@ -57,7 +57,6 @@ obj-$(CONFIG_ARCH_SH7372) += entry-intc.
ifdef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o
else
-obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
--- 0001/arch/arm/mach-shmobile/Makefile.boot
+++ work/arch/arm/mach-shmobile/Makefile.boot 2015-01-21 11:05:16.067576354 +0900
@@ -4,7 +4,6 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA)
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
-loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
__ZRELADDR := $(sort $(loadaddr-y))
--- 0001/arch/arm/mach-shmobile/board-mackerel.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,1522 +0,0 @@
-/*
- * mackerel board support
- *
- * Copyright (C) 2010 Renesas Solutions Corp.
- * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
- *
- * based on ap4evb
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Yoshihiro Shimoda
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/input.h>
-#include <linux/io.h>
-#include <linux/i2c.h>
-#include <linux/leds.h>
-#include <linux/mfd/tmio.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/sh_mmcif.h>
-#include <linux/mmc/sh_mobile_sdhi.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mtd/sh_flctl.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/platform_data/gpio_backlight.h>
-#include <linux/pm_clock.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-#include <linux/smsc911x.h>
-#include <linux/sh_clk.h>
-#include <linux/tca6416_keypad.h>
-#include <linux/usb/renesas_usbhs.h>
-#include <linux/dma-mapping.h>
-
-#include <video/sh_mobile_hdmi.h>
-#include <video/sh_mobile_lcdc.h>
-#include <media/sh_mobile_ceu.h>
-#include <media/soc_camera.h>
-#include <media/soc_camera_platform.h>
-#include <sound/sh_fsi.h>
-#include <sound/simple_card.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include "common.h"
-#include "intc.h"
-#include "irqs.h"
-#include "pm-rmobile.h"
-#include "sh-gpio.h"
-#include "sh7372.h"
-
-/*
- * Address Interface BusWidth note
- * ------------------------------------------------------------------
- * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
- * 0x0800_0000 user area -
- * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
- * 0x1400_0000 Ether (LAN9220) 16bit
- * 0x1600_0000 user area - cannot use with NAND
- * 0x1800_0000 user area -
- * 0x1A00_0000 -
- * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
- */
-
-/*
- * CPU mode
- *
- * SW4 | Boot Area| Master | Remarks
- * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
- * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
- * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
- * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
- * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
- * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
- * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
- * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
- * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
- * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
-*/
-
-/*
- * NOR Flash ROM
- *
- * SW1 | SW2 | SW7 | NOR Flash ROM
- * bit1 | bit1 bit2 | bit1 | Memory allocation
- * ------+------------+------+------------------
- * OFF | ON OFF | ON | Area 0
- * OFF | ON OFF | OFF | Area 4
- */
-
-/*
- * SMSC 9220
- *
- * SW1 SMSC 9220
- * -----------------------
- * ON access disable
- * OFF access enable
- */
-
-/*
- * NAND Flash ROM
- *
- * SW1 | SW2 | SW7 | NAND Flash ROM
- * bit1 | bit1 bit2 | bit2 | Memory allocation
- * ------+------------+------+------------------
- * OFF | ON OFF | ON | FCE 0
- * OFF | ON OFF | OFF | FCE 1
- */
-
-/*
- * External interrupt pin settings
- *
- * IRQX | pin setting | device | level
- * ------+--------------------+--------------------+-------
- * IRQ0 | ICR1A.IRQ0SA\010 | SDHI2 card detect | Low
- * IRQ6 | ICR1A.IRQ6SA\011 | Ether(LAN9220) | High
- * IRQ7 | ICR1A.IRQ7SA\010 | LCD Touch Panel | Low
- * IRQ8 | ICR2A.IRQ8SA\010 | MMC/SD card detect | Low
- * IRQ9 | ICR2A.IRQ9SA\010 | KEY(TCA6408) | Low
- * IRQ21 | ICR4A.IRQ21SA\011 | Sensor(ADXL345) | High
- * IRQ22 | ICR4A.IRQ22SA\011 | Sensor(AK8975) | High
- */
-
-/*
- * USB
- *
- * USB0 : CN22 : Function
- * USB1 : CN31 : Function/Host *1
- *
- * J30 (for CN31) *1
- * ----------+---------------+-------------
- * 1-2 short | VBUS 5V | Host
- * open | external VBUS | Function
- *
- * CAUTION
- *
- * renesas_usbhs driver can use external interrupt mode
- * (which come from USB-PHY) or autonomy mode (it use own interrupt)
- * for detecting connection/disconnection when Function.
- * USB will be power OFF while it has been disconnecting
- * if external interrupt mode, and it is always power ON if autonomy mode,
- *
- * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
- * because Touchscreen is using IRQ7-PORT40.
- * It is impossible to use IRQ7 demux on this board.
- */
-
-/*
- * SDHI0 (CN12)
- *
- * SW56 : OFF
- *
- */
-
-/* MMC /SDHI1 (CN7)
- *
- * I/O voltage : 1.8v
- *
- * Power voltage : 1.8v or 3.3v
- * J22 : select power voltage *1
- * 1-2 pin : 1.8v
- * 2-3 pin : 3.3v
- *
- * *1
- * Please change J22 depends the card to be used.
- * MMC's OCR field set to support either voltage for the card inserted.
- *
- * SW1 | SW33
- * | bit1 | bit2 | bit3 | bit4
- * -------------+------+------+------+-------
- * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
- * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
- *
- */
-
-/*
- * SDHI2 (CN23)
- *
- * microSD card sloct
- *
- */
-
-/*
- * FSI - AK4642
- *
- * it needs amixer settings for playing
- *
- * amixer set "Headphone Enable" on
- */
-
-/* Fixed 3.3V and 1.8V regulators to be used by multiple devices */
-static struct regulator_consumer_supply fixed1v8_power_consumers[] -{
- /*
- * J22 on mackerel switches mmcif.0 and sdhi.1 between 1.8V and 3.3V
- * Since we cannot support both voltages, we support the default 1.8V
- */
- REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
- REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
- REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
- REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
-};
-
-static struct regulator_consumer_supply fixed3v3_power_consumers[] -{
- REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
- REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
- REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.2"),
- REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.2"),
-};
-
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
- REGULATOR_SUPPLY("vddvario", "smsc911x"),
- REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
-/* MTD */
-static struct mtd_partition nor_flash_partitions[] = {
- {
- .name = "loader",
- .offset = 0x00000000,
- .size = 512 * 1024,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "bootenv",
- .offset = MTDPART_OFS_APPEND,
- .size = 512 * 1024,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "kernel_ro",
- .offset = MTDPART_OFS_APPEND,
- .size = 8 * 1024 * 1024,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = 8 * 1024 * 1024,
- },
- {
- .name = "data",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
-static struct physmap_flash_data nor_flash_data = {
- .width = 2,
- .parts = nor_flash_partitions,
- .nr_parts = ARRAY_SIZE(nor_flash_partitions),
-};
-
-static struct resource nor_flash_resources[] = {
- [0] = {
- .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
- .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device nor_flash_device = {
- .name = "physmap-flash",
- .dev = {
- .platform_data = &nor_flash_data,
- },
- .num_resources = ARRAY_SIZE(nor_flash_resources),
- .resource = nor_flash_resources,
-};
-
-/* SMSC */
-static struct resource smc911x_resources[] = {
- {
- .start = 0x14000000,
- .end = 0x16000000 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = evt2irq(0x02c0) /* IRQ6A */,
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
- },
-};
-
-static struct smsc911x_platform_config smsc911x_info = {
- .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
- .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
- .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
-};
-
-static struct platform_device smc911x_device = {
- .name = "smsc911x",
- .id = -1,
- .num_resources = ARRAY_SIZE(smc911x_resources),
- .resource = smc911x_resources,
- .dev = {
- .platform_data = &smsc911x_info,
- },
-};
-
-/* MERAM */
-static struct sh_mobile_meram_info mackerel_meram_info = {
- .addr_mode = SH_MOBILE_MERAM_MODE1,
-};
-
-static struct resource meram_resources[] = {
- [0] = {
- .name = "regs",
- .start = 0xe8000000,
- .end = 0xe807ffff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "meram",
- .start = 0xe8080000,
- .end = 0xe81fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device meram_device = {
- .name = "sh_mobile_meram",
- .id = 0,
- .num_resources = ARRAY_SIZE(meram_resources),
- .resource = meram_resources,
- .dev = {
- .platform_data = &mackerel_meram_info,
- },
-};
-
-/* LCDC and backlight */
-static struct fb_videomode mackerel_lcdc_modes[] = {
- {
- .name = "WVGA Panel",
- .xres = 800,
- .yres = 480,
- .left_margin = 220,
- .right_margin = 110,
- .hsync_len = 70,
- .upper_margin = 20,
- .lower_margin = 5,
- .vsync_len = 5,
- .sync = 0,
- },
-};
-
-static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
- .icb[0] = {
- .meram_size = 0x40,
- },
- .icb[1] = {
- .meram_size = 0x40,
- },
-};
-
-static struct sh_mobile_lcdc_info lcdc_info = {
- .meram_dev = &mackerel_meram_info,
- .clock_source = LCDC_CLK_BUS,
- .ch[0] = {
- .chan = LCDC_CHAN_MAINLCD,
- .fourcc = V4L2_PIX_FMT_RGB565,
- .lcd_modes = mackerel_lcdc_modes,
- .num_modes = ARRAY_SIZE(mackerel_lcdc_modes),
- .interface_type = RGB24,
- .clock_divider = 3,
- .flags = 0,
- .panel_cfg = {
- .width = 152,
- .height = 91,
- },
- .meram_cfg = &lcd_meram_cfg,
- }
-};
-
-static struct resource lcdc_resources[] = {
- [0] = {
- .name = "LCDC",
- .start = 0xfe940000,
- .end = 0xfe943fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x580),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device lcdc_device = {
- .name = "sh_mobile_lcdc_fb",
- .num_resources = ARRAY_SIZE(lcdc_resources),
- .resource = lcdc_resources,
- .dev = {
- .platform_data = &lcdc_info,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-static struct gpio_backlight_platform_data gpio_backlight_data = {
- .fbdev = &lcdc_device.dev,
- .gpio = 31,
- .def_value = 1,
- .name = "backlight",
-};
-
-static struct platform_device gpio_backlight_device = {
- .name = "gpio-backlight",
- .dev = {
- .platform_data = &gpio_backlight_data,
- },
-};
-
-/* HDMI */
-static struct sh_mobile_hdmi_info hdmi_info = {
- .flags = HDMI_SND_SRC_SPDIF,
-};
-
-static struct resource hdmi_resources[] = {
- [0] = {
- .name = "HDMI",
- .start = 0xe6be0000,
- .end = 0xe6be00ff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
- .start = evt2irq(0x17e0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device hdmi_device = {
- .name = "sh-mobile-hdmi",
- .num_resources = ARRAY_SIZE(hdmi_resources),
- .resource = hdmi_resources,
- .id = -1,
- .dev = {
- .platform_data = &hdmi_info,
- },
-};
-
-static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
- .icb[0] = {
- .meram_size = 0x100,
- },
- .icb[1] = {
- .meram_size = 0x100,
- },
-};
-
-static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
- .meram_dev = &mackerel_meram_info,
- .clock_source = LCDC_CLK_EXTERNAL,
- .ch[0] = {
- .chan = LCDC_CHAN_MAINLCD,
- .fourcc = V4L2_PIX_FMT_RGB565,
- .interface_type = RGB24,
- .clock_divider = 1,
- .flags = LCDC_FLAGS_DWPOL,
- .meram_cfg = &hdmi_meram_cfg,
- .tx_dev = &hdmi_device,
- }
-};
-
-static struct resource hdmi_lcdc_resources[] = {
- [0] = {
- .name = "LCDC1",
- .start = 0xfe944000,
- .end = 0xfe947fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x1780),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device hdmi_lcdc_device = {
- .name = "sh_mobile_lcdc_fb",
- .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
- .resource = hdmi_lcdc_resources,
- .id = 1,
- .dev = {
- .platform_data = &hdmi_lcdc_info,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-static struct asoc_simple_card_info fsi2_hdmi_info = {
- .name = "HDMI",
- .card = "FSI2B-HDMI",
- .codec = "sh-mobile-hdmi",
- .platform = "sh_fsi2",
- .daifmt = SND_SOC_DAIFMT_CBS_CFS,
- .cpu_dai = {
- .name = "fsib-dai",
- },
- .codec_dai = {
- .name = "sh_mobile_hdmi-hifi",
- },
-};
-
-static struct platform_device fsi_hdmi_device = {
- .name = "asoc-simple-card",
- .id = 1,
- .dev = {
- .platform_data = &fsi2_hdmi_info,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .dma_mask = &fsi_hdmi_device.dev.coherent_dma_mask,
- },
-};
-
-static void __init hdmi_init_pm_clock(void)
-{
- struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
- int ret;
- long rate;
-
- if (IS_ERR(hdmi_ick)) {
- ret = PTR_ERR(hdmi_ick);
- pr_err("Cannot get HDMI ICK: %d\n", ret);
- goto out;
- }
-
- ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
- if (ret < 0) {
- pr_err("Cannot set PLLC2 parent: %d, %d users\n",
- ret, sh7372_pllc2_clk.usecount);
- goto out;
- }
-
- pr_debug("PLLC2 initial frequency %lu\n",
- clk_get_rate(&sh7372_pllc2_clk));
-
- rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
- if (rate <= 0) {
- pr_err("Cannot get suitable rate: %ld\n", rate);
- ret = -EINVAL;
- goto out;
- }
-
- ret = clk_set_rate(&sh7372_pllc2_clk, rate);
- if (ret < 0) {
- pr_err("Cannot set rate %ld: %d\n", rate, ret);
- goto out;
- }
-
- pr_debug("PLLC2 set frequency %lu\n", rate);
-
- ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
- if (ret < 0)
- pr_err("Cannot set HDMI parent: %d\n", ret);
-
-out:
- if (!IS_ERR(hdmi_ick))
- clk_put(hdmi_ick);
-}
-
-/* USBHS0 is connected to CN22 which takes a USB Mini-B plug
- *
- * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
- * but on this particular board IRQ7 is already used by
- * the touch screen. This leaves us with software polling.
- */
-#define USBHS0_POLL_INTERVAL (HZ * 5)
-
-struct usbhs_private {
- void __iomem *usbphyaddr;
- void __iomem *usbcrcaddr;
- struct renesas_usbhs_platform_info info;
- struct delayed_work work;
- struct platform_device *pdev;
-};
-
-#define usbhs_get_priv(pdev) \
- container_of(renesas_usbhs_get_info(pdev), \
- struct usbhs_private, info)
-
-#define usbhs_is_connected(priv) \
- (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
-
-static int usbhs_get_vbus(struct platform_device *pdev)
-{
- return usbhs_is_connected(usbhs_get_priv(pdev));
-}
-
-static int usbhs_phy_reset(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- /* init phy */
- __raw_writew(0x8a0a, priv->usbcrcaddr);
-
- return 0;
-}
-
-static int usbhs0_get_id(struct platform_device *pdev)
-{
- return USBHS_GADGET;
-}
-
-static void usbhs0_work_function(struct work_struct *work)
-{
- struct usbhs_private *priv = container_of(work, struct usbhs_private,
- work.work);
-
- renesas_usbhs_call_notify_hotplug(priv->pdev);
- schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
-}
-
-static int usbhs0_hardware_init(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- priv->pdev = pdev;
- INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
- schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
- return 0;
-}
-
-static int usbhs0_hardware_exit(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- cancel_delayed_work_sync(&priv->work);
-
- return 0;
-}
-
-static struct usbhs_private usbhs0_private = {
- .usbcrcaddr = IOMEM(0xe605810c), /* USBCR2 */
- .info = {
- .platform_callback = {
- .hardware_init = usbhs0_hardware_init,
- .hardware_exit = usbhs0_hardware_exit,
- .phy_reset = usbhs_phy_reset,
- .get_id = usbhs0_get_id,
- .get_vbus = usbhs_get_vbus,
- },
- .driver_param = {
- .buswait_bwait = 4,
- .d0_tx_id = SHDMA_SLAVE_USB0_TX,
- .d1_rx_id = SHDMA_SLAVE_USB0_RX,
- },
- },
-};
-
-static struct resource usbhs0_resources[] = {
- [0] = {
- .name = "USBHS0",
- .start = 0xe6890000,
- .end = 0xe68900e6 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usbhs0_device = {
- .name = "renesas_usbhs",
- .id = 0,
- .dev = {
- .platform_data = &usbhs0_private.info,
- },
- .num_resources = ARRAY_SIZE(usbhs0_resources),
- .resource = usbhs0_resources,
-};
-
-/* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
- *
- * Use J30 to select between Host and Function. This setting
- * can however not be detected by software. Hotplug of USBHS1
- * is provided via IRQ8.
- *
- * Current USB1 works as "USB Host".
- * - set J30 "short"
- *
- * If you want to use it as "USB gadget",
- * - J30 "open"
- * - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
- * - add .get_vbus = usbhs_get_vbus in usbhs1_private
- * - check usbhs0_device(pio)/usbhs1_device(irq) order in mackerel_devices.
- */
-#define IRQ8 evt2irq(0x0300)
-#define USB_PHY_MODE (1 << 4)
-#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
-#define USB_PHY_ON (1 << 1)
-#define USB_PHY_OFF (1 << 0)
-#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
-
-static irqreturn_t usbhs1_interrupt(int irq, void *data)
-{
- struct platform_device *pdev = data;
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- dev_dbg(&pdev->dev, "%s\n", __func__);
-
- renesas_usbhs_call_notify_hotplug(pdev);
-
- /* clear status */
- __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
- priv->usbphyaddr);
-
- return IRQ_HANDLED;
-}
-
-static int usbhs1_hardware_init(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
- int ret;
-
- /* clear interrupt status */
- __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
-
- ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
- dev_name(&pdev->dev), pdev);
- if (ret) {
- dev_err(&pdev->dev, "request_irq err\n");
- return ret;
- }
-
- /* enable USB phy interrupt */
- __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
-
- return 0;
-}
-
-static int usbhs1_hardware_exit(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- /* clear interrupt status */
- __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
-
- free_irq(IRQ8, pdev);
-
- return 0;
-}
-
-static int usbhs1_get_id(struct platform_device *pdev)
-{
- return USBHS_HOST;
-}
-
-static u32 usbhs1_pipe_cfg[] = {
- USB_ENDPOINT_XFER_CONTROL,
- USB_ENDPOINT_XFER_ISOC,
- USB_ENDPOINT_XFER_ISOC,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_INT,
- USB_ENDPOINT_XFER_INT,
- USB_ENDPOINT_XFER_INT,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
-};
-
-static struct usbhs_private usbhs1_private = {
- .usbphyaddr = IOMEM(0xe60581e2), /* USBPHY1INTAP */
- .usbcrcaddr = IOMEM(0xe6058130), /* USBCR4 */
- .info = {
- .platform_callback = {
- .hardware_init = usbhs1_hardware_init,
- .hardware_exit = usbhs1_hardware_exit,
- .get_id = usbhs1_get_id,
- .phy_reset = usbhs_phy_reset,
- },
- .driver_param = {
- .buswait_bwait = 4,
- .has_otg = 1,
- .pipe_type = usbhs1_pipe_cfg,
- .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
- .d0_tx_id = SHDMA_SLAVE_USB1_TX,
- .d1_rx_id = SHDMA_SLAVE_USB1_RX,
- },
- },
-};
-
-static struct resource usbhs1_resources[] = {
- [0] = {
- .name = "USBHS1",
- .start = 0xe68b0000,
- .end = 0xe68b00e6 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usbhs1_device = {
- .name = "renesas_usbhs",
- .id = 1,
- .dev = {
- .platform_data = &usbhs1_private.info,
- .dma_mask = &usbhs1_device.dev.coherent_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = ARRAY_SIZE(usbhs1_resources),
- .resource = usbhs1_resources,
-};
-
-/* LED */
-static struct gpio_led mackerel_leds[] = {
- {
- .name = "led0",
- .gpio = 0,
- .default_state = LEDS_GPIO_DEFSTATE_ON,
- },
- {
- .name = "led1",
- .gpio = 1,
- .default_state = LEDS_GPIO_DEFSTATE_ON,
- },
- {
- .name = "led2",
- .gpio = 2,
- .default_state = LEDS_GPIO_DEFSTATE_ON,
- },
- {
- .name = "led3",
- .gpio = 159,
- .default_state = LEDS_GPIO_DEFSTATE_ON,
- }
-};
-
-static struct gpio_led_platform_data mackerel_leds_pdata = {
- .leds = mackerel_leds,
- .num_leds = ARRAY_SIZE(mackerel_leds),
-};
-
-static struct platform_device leds_device = {
- .name = "leds-gpio",
- .id = 0,
- .dev = {
- .platform_data = &mackerel_leds_pdata,
- },
-};
-
-/* FSI */
-#define IRQ_FSI evt2irq(0x1840)
-static struct sh_fsi_platform_info fsi_info = {
- .port_a = {
- .tx_id = SHDMA_SLAVE_FSIA_TX,
- .rx_id = SHDMA_SLAVE_FSIA_RX,
- },
- .port_b = {
- .flags = SH_FSI_CLK_CPG |
- SH_FSI_FMT_SPDIF,
- }
-};
-
-static struct resource fsi_resources[] = {
- [0] = {
- /* we need 0xFE1F0000 to access DMA
- * instead of 0xFE3C0000 */
- .name = "FSI",
- .start = 0xFE1F0000,
- .end = 0xFE1F0400 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_FSI,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device fsi_device = {
- .name = "sh_fsi2",
- .id = -1,
- .num_resources = ARRAY_SIZE(fsi_resources),
- .resource = fsi_resources,
- .dev = {
- .platform_data = &fsi_info,
- },
-};
-
-static struct asoc_simple_card_info fsi2_ak4643_info = {
- .name = "AK4643",
- .card = "FSI2A-AK4643",
- .codec = "ak4642-codec.0-0013",
- .platform = "sh_fsi2",
- .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
- .cpu_dai = {
- .name = "fsia-dai",
- },
- .codec_dai = {
- .name = "ak4642-hifi",
- .sysclk = 11289600,
- },
-};
-
-static struct platform_device fsi_ak4643_device = {
- .name = "asoc-simple-card",
- .dev = {
- .platform_data = &fsi2_ak4643_info,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .dma_mask = &fsi_ak4643_device.dev.coherent_dma_mask,
- },
-};
-
-/* FLCTL */
-static struct mtd_partition nand_partition_info[] = {
- {
- .name = "system",
- .offset = 0,
- .size = 128 * 1024 * 1024,
- },
- {
- .name = "userdata",
- .offset = MTDPART_OFS_APPEND,
- .size = 256 * 1024 * 1024,
- },
- {
- .name = "cache",
- .offset = MTDPART_OFS_APPEND,
- .size = 128 * 1024 * 1024,
- },
-};
-
-static struct resource nand_flash_resources[] = {
- [0] = {
- .start = 0xe6a30000,
- .end = 0xe6a3009b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x0d80), /* flstei: status error irq */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct sh_flctl_platform_data nand_flash_data = {
- .parts = nand_partition_info,
- .nr_parts = ARRAY_SIZE(nand_partition_info),
- .flcmncr_val = CLK_16B_12L_4H | TYPESEL_SET
- | SHBUSSEL | SEL_16BIT | SNAND_E,
- .use_holden = 1,
-};
-
-static struct platform_device nand_flash_device = {
- .name = "sh_flctl",
- .resource = nand_flash_resources,
- .num_resources = ARRAY_SIZE(nand_flash_resources),
- .dev = {
- .platform_data = &nand_flash_data,
- },
-};
-
-/* SDHI0 */
-static struct sh_mobile_sdhi_info sdhi0_info = {
- .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
- .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
- .tmio_flags = TMIO_MMC_USE_GPIO_CD,
- .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
- .cd_gpio = 172,
-};
-
-static struct resource sdhi0_resources[] = {
- {
- .name = "SDHI0",
- .start = 0xe6850000,
- .end = 0xe68500ff,
- .flags = IORESOURCE_MEM,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDCARD,
- .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
- .flags = IORESOURCE_IRQ,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDIO,
- .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sdhi0_device = {
- .name = "sh_mobile_sdhi",
- .num_resources = ARRAY_SIZE(sdhi0_resources),
- .resource = sdhi0_resources,
- .id = 0,
- .dev = {
- .platform_data = &sdhi0_info,
- },
-};
-
-#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
-/* SDHI1 */
-
-/* GPIO 41 can trigger IRQ8, but it is used by USBHS1, we have to poll */
-static struct sh_mobile_sdhi_info sdhi1_info = {
- .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
- .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
- .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_USE_GPIO_CD,
- .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
- MMC_CAP_NEEDS_POLL,
- .cd_gpio = 41,
-};
-
-static struct resource sdhi1_resources[] = {
- {
- .name = "SDHI1",
- .start = 0xe6860000,
- .end = 0xe68600ff,
- .flags = IORESOURCE_MEM,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDCARD,
- .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
- .flags = IORESOURCE_IRQ,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDIO,
- .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sdhi1_device = {
- .name = "sh_mobile_sdhi",
- .num_resources = ARRAY_SIZE(sdhi1_resources),
- .resource = sdhi1_resources,
- .id = 1,
- .dev = {
- .platform_data = &sdhi1_info,
- },
-};
-#endif
-
-/* SDHI2 */
-
-/*
- * The card detect pin of the top SD/MMC slot (CN23) is active low and is
- * connected to GPIO SCIFB_SCK of SH7372 (GPIO 162).
- */
-static struct sh_mobile_sdhi_info sdhi2_info = {
- .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
- .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
- .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_USE_GPIO_CD,
- .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
- MMC_CAP_NEEDS_POLL,
- .cd_gpio = 162,
-};
-
-static struct resource sdhi2_resources[] = {
- {
- .name = "SDHI2",
- .start = 0xe6870000,
- .end = 0xe68700ff,
- .flags = IORESOURCE_MEM,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDCARD,
- .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
- .flags = IORESOURCE_IRQ,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDIO,
- .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sdhi2_device = {
- .name = "sh_mobile_sdhi",
- .num_resources = ARRAY_SIZE(sdhi2_resources),
- .resource = sdhi2_resources,
- .id = 2,
- .dev = {
- .platform_data = &sdhi2_info,
- },
-};
-
-/* SH_MMCIF */
-#if IS_ENABLED(CONFIG_MMC_SH_MMCIF)
-static struct resource sh_mmcif_resources[] = {
- [0] = {
- .name = "MMCIF",
- .start = 0xE6BD0000,
- .end = 0xE6BD00FF,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- /* MMC ERR */
- .start = evt2irq(0x1ac0),
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- /* MMC NOR */
- .start = evt2irq(0x1ae0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct sh_mmcif_plat_data sh_mmcif_plat = {
- .sup_pclk = 0,
- .caps = MMC_CAP_4_BIT_DATA |
- MMC_CAP_8_BIT_DATA |
- MMC_CAP_NEEDS_POLL,
- .use_cd_gpio = true,
- /* card detect pin for SD/MMC slot (CN7) */
- .cd_gpio = 41,
- .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
- .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
-};
-
-static struct platform_device sh_mmcif_device = {
- .name = "sh_mmcif",
- .id = 0,
- .dev = {
- .dma_mask = NULL,
- .coherent_dma_mask = 0xffffffff,
- .platform_data = &sh_mmcif_plat,
- },
- .num_resources = ARRAY_SIZE(sh_mmcif_resources),
- .resource = sh_mmcif_resources,
-};
-#endif
-
-static int mackerel_camera_add(struct soc_camera_device *icd);
-static void mackerel_camera_del(struct soc_camera_device *icd);
-
-static int camera_set_capture(struct soc_camera_platform_info *info,
- int enable)
-{
- return 0; /* camera sensor always enabled */
-}
-
-static struct soc_camera_platform_info camera_info = {
- .format_name = "UYVY",
- .format_depth = 16,
- .format = {
- .code = MEDIA_BUS_FMT_UYVY8_2X8,
- .colorspace = V4L2_COLORSPACE_SMPTE170M,
- .field = V4L2_FIELD_NONE,
- .width = 640,
- .height = 480,
- },
- .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
- V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
- V4L2_MBUS_DATA_ACTIVE_HIGH,
- .mbus_type = V4L2_MBUS_PARALLEL,
- .set_capture = camera_set_capture,
-};
-
-static struct soc_camera_link camera_link = {
- .bus_id = 0,
- .add_device = mackerel_camera_add,
- .del_device = mackerel_camera_del,
- .module_name = "soc_camera_platform",
- .priv = &camera_info,
-};
-
-static struct platform_device *camera_device;
-
-static void mackerel_camera_release(struct device *dev)
-{
- soc_camera_platform_release(&camera_device);
-}
-
-static int mackerel_camera_add(struct soc_camera_device *icd)
-{
- return soc_camera_platform_add(icd, &camera_device, &camera_link,
- mackerel_camera_release, 0);
-}
-
-static void mackerel_camera_del(struct soc_camera_device *icd)
-{
- soc_camera_platform_del(icd, camera_device, &camera_link);
-}
-
-static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
- .flags = SH_CEU_FLAG_USE_8BIT_BUS,
- .max_width = 8188,
- .max_height = 8188,
-};
-
-static struct resource ceu_resources[] = {
- [0] = {
- .name = "CEU",
- .start = 0xfe910000,
- .end = 0xfe91009f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x880),
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- /* place holder for contiguous memory */
- },
-};
-
-static struct platform_device ceu_device = {
- .name = "sh_mobile_ceu",
- .id = 0, /* "ceu0" clock */
- .num_resources = ARRAY_SIZE(ceu_resources),
- .resource = ceu_resources,
- .dev = {
- .platform_data = &sh_mobile_ceu_info,
- .coherent_dma_mask = 0xffffffff,
- },
-};
-
-static struct platform_device mackerel_camera = {
- .name = "soc-camera-pdrv",
- .id = 0,
- .dev = {
- .platform_data = &camera_link,
- },
-};
-
-static struct platform_device *mackerel_devices[] __initdata = {
- &nor_flash_device,
- &smc911x_device,
- &lcdc_device,
- &gpio_backlight_device,
- &usbhs0_device,
- &usbhs1_device,
- &leds_device,
- &fsi_device,
- &fsi_ak4643_device,
- &fsi_hdmi_device,
- &nand_flash_device,
- &sdhi0_device,
-#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
- &sdhi1_device,
-#else
- &sh_mmcif_device,
-#endif
- &sdhi2_device,
- &ceu_device,
- &mackerel_camera,
- &hdmi_device,
- &hdmi_lcdc_device,
- &meram_device,
-};
-
-/* Keypad Initialization */
-#define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
-{ \
- .type = ev_type, \
- .code = ev_code, \
- .active_low = act_low, \
-}
-
-#define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
-
-static struct tca6416_button mackerel_gpio_keys[] = {
- KEYPAD_BUTTON_LOW(KEY_HOME),
- KEYPAD_BUTTON_LOW(KEY_MENU),
- KEYPAD_BUTTON_LOW(KEY_BACK),
- KEYPAD_BUTTON_LOW(KEY_POWER),
-};
-
-static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
- .buttons = mackerel_gpio_keys,
- .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
- .rep = 1,
- .use_polling = 0,
- .pinmask = 0x000F,
-};
-
-/* I2C */
-#define IRQ7 evt2irq(0x02e0)
-#define IRQ9 evt2irq(0x0320)
-
-static struct i2c_board_info i2c0_devices[] = {
- {
- I2C_BOARD_INFO("ak4643", 0x13),
- },
- /* Keypad */
- {
- I2C_BOARD_INFO("tca6408-keys", 0x20),
- .platform_data = &mackerel_tca6416_keys_info,
- .irq = IRQ9,
- },
- /* Touchscreen */
- {
- I2C_BOARD_INFO("st1232-ts", 0x55),
- .irq = IRQ7,
- },
-};
-
-#define IRQ21 evt2irq(0x32a0)
-
-static struct i2c_board_info i2c1_devices[] = {
- /* Accelerometer */
- {
- I2C_BOARD_INFO("adxl34x", 0x53),
- .irq = IRQ21,
- },
-};
-
-static unsigned long pin_pulldown_conf[] = {
- PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0),
-};
-
-static const struct pinctrl_map mackerel_pinctrl_map[] = {
- /* ADXL34X */
- PIN_MAP_MUX_GROUP_DEFAULT("1-0053", "pfc-sh7372",
- "intc_irq21", "intc"),
- /* CEU */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- "ceu_data_0_7", "ceu"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- "ceu_clk_0", "ceu"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- "ceu_sync", "ceu"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- "ceu_field", "ceu"),
- /* FLCTL */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
- "flctl_data", "flctl"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
- "flctl_ce0", "flctl"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
- "flctl_ctrl", "flctl"),
- /* FSIA (AK4643) */
- PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
- "fsia_sclk_in", "fsia"),
- PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
- "fsia_data_in", "fsia"),
- PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
- "fsia_data_out", "fsia"),
- /* FSIB (HDMI) */
- PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
- "fsib_mclk_in", "fsib"),
- /* HDMI */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
- "hdmi", "hdmi"),
- /* LCDC */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
- "lcd_data24", "lcd"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
- "lcd_sync", "lcd"),
- /* SCIFA0 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-sh7372",
- "scifa0_data", "scifa0"),
- /* SCIFA2 (GT-720F GPS module) */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh7372",
- "scifa2_data", "scifa2"),
- /* SDHI0 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- "sdhi0_data4", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- "sdhi0_ctrl", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- "sdhi0_wp", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- "intc_irq26_1", "intc"),
- /* SDHI1 */
-#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
- "sdhi1_data4", "sdhi1"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
- "sdhi1_ctrl", "sdhi1"),
-#else
- /* MMCIF */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- "mmc0_data8_0", "mmc0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- "mmc0_ctrl_0", "mmc0"),
-#endif
- /* SDHI2 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
- "sdhi2_data4", "sdhi2"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
- "sdhi2_ctrl", "sdhi2"),
- /* SMSC911X */
- PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
- "bsc_cs5a", "bsc"),
- PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
- "intc_irq6_0", "intc"),
- /* ST1232 */
- PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-sh7372",
- "intc_irq7_0", "intc"),
- /* TCA6416 */
- PIN_MAP_MUX_GROUP_DEFAULT("0-0020", "pfc-sh7372",
- "intc_irq9_0", "intc"),
- /* USBHS0 */
- PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
- "usb0_vbus", "usb0"),
- PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
- "usb0_vbus", pin_pulldown_conf),
- /* USBHS1 */
- PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- "usb1_vbus", "usb1"),
- PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- "usb1_vbus", pin_pulldown_conf),
- PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- "usb1_otg_id_0", "usb1"),
-};
-
-#define GPIO_PORT9CR IOMEM(0xE6051009)
-#define GPIO_PORT10CR IOMEM(0xE605100A)
-#define SRCR4 IOMEM(0xe61580bc)
-#define USCCR1 IOMEM(0xE6058144)
-static void __init mackerel_init(void)
-{
- static struct pm_domain_device domain_devices[] __initdata = {
- { "A4LC", &lcdc_device, },
- { "A4LC", &hdmi_lcdc_device, },
- { "A4LC", &meram_device, },
- { "A4MP", &fsi_device, },
- { "A3SP", &usbhs0_device, },
- { "A3SP", &usbhs1_device, },
- { "A3SP", &nand_flash_device, },
- { "A3SP", &sdhi0_device, },
-#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
- { "A3SP", &sdhi1_device, },
-#else
- { "A3SP", &sh_mmcif_device, },
-#endif
- { "A3SP", &sdhi2_device, },
- { "A4R", &ceu_device, },
- };
- u32 srcr4;
- struct clk *clk;
-
- regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
- ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
- regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
- ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
- regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
- /* External clock source */
- clk_set_rate(&sh7372_dv_clki_clk, 27000000);
-
- pinctrl_register_mappings(mackerel_pinctrl_map,
- ARRAY_SIZE(mackerel_pinctrl_map));
- sh7372_pinmux_init();
-
- gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
-
- /* FSI2 port A (ak4643) */
- gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
-
- gpio_request(9, NULL);
- gpio_request(10, NULL);
- gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
- gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
-
- intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
-
- /* FSI2 port B (HDMI) */
- __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
-
- /* set SPU2 clock to 119.6 MHz */
- clk = clk_get(NULL, "spu_clk");
- if (!IS_ERR(clk)) {
- clk_set_rate(clk, clk_round_rate(clk, 119600000));
- clk_put(clk);
- }
-
- /* Keypad */
- irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
-
- /* Touchscreen */
- irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
-
- /* Accelerometer */
- irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
-
- /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
- srcr4 = __raw_readl(SRCR4);
- __raw_writel(srcr4 | (1 << 13), SRCR4);
- udelay(50);
- __raw_writel(srcr4 & ~(1 << 13), SRCR4);
-
- i2c_register_board_info(0, i2c0_devices,
- ARRAY_SIZE(i2c0_devices));
- i2c_register_board_info(1, i2c1_devices,
- ARRAY_SIZE(i2c1_devices));
-
- sh7372_add_standard_devices();
-
- platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
-
- rmobile_add_devices_to_domains(domain_devices,
- ARRAY_SIZE(domain_devices));
-
- hdmi_init_pm_clock();
- sh7372_pm_init();
- pm_clk_add(&fsi_device.dev, "spu2");
- pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
-}
-
-static const char *mackerel_boards_compat_dt[] __initdata = {
- "renesas,mackerel",
- NULL,
-};
-
-DT_MACHINE_START(MACKEREL_DT, "mackerel")
- .map_io = sh7372_map_io,
- .init_early = sh7372_add_early_devices,
- .init_irq = sh7372_init_irq,
- .handle_irq = shmobile_handle_irq_intc,
- .init_machine = mackerel_init,
- .init_late = sh7372_pm_init_late,
- .init_time = sh7372_earlytimer_init,
- .dt_compat = mackerel_boards_compat_dt,
-MACHINE_END
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
@ 2015-01-21 4:53 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove legacy C code for the sh7372 Mackerel board. There is no
DT multiplatform implementation available for the sh7372 SoC so
simply phase out the board and SoC code support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/mach-shmobile/Kconfig | 9
arch/arm/mach-shmobile/Makefile | 1
arch/arm/mach-shmobile/Makefile.boot | 1
arch/arm/mach-shmobile/board-mackerel.c | 1522 -------------------------------
4 files changed, 1533 deletions(-)
--- 0001/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2015-01-21 11:05:32.797576294 +0900
@@ -134,15 +134,6 @@ config ARCH_R8A7779
comment "Renesas ARM SoCs Board Type"
-config MACH_MACKEREL
- bool "mackerel board"
- depends on ARCH_SH7372
- select ARCH_REQUIRE_GPIOLIB
- select REGULATOR_FIXED_VOLTAGE if REGULATOR
- select SMSC_PHY if SMSC911X
- select SND_SOC_AK4642 if SND_SIMPLE_CARD
- select USE_OF
-
config MACH_ARMADILLO800EVA
bool "Armadillo-800 EVA board"
depends on ARCH_R8A7740
--- 0001/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2015-01-21 11:05:21.847576333 +0900
@@ -57,7 +57,6 @@ obj-$(CONFIG_ARCH_SH7372) += entry-intc.
ifdef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o
else
-obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
--- 0001/arch/arm/mach-shmobile/Makefile.boot
+++ work/arch/arm/mach-shmobile/Makefile.boot 2015-01-21 11:05:16.067576354 +0900
@@ -4,7 +4,6 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA)
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
-loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
__ZRELADDR := $(sort $(loadaddr-y))
--- 0001/arch/arm/mach-shmobile/board-mackerel.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,1522 +0,0 @@
-/*
- * mackerel board support
- *
- * Copyright (C) 2010 Renesas Solutions Corp.
- * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
- *
- * based on ap4evb
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Yoshihiro Shimoda
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/input.h>
-#include <linux/io.h>
-#include <linux/i2c.h>
-#include <linux/leds.h>
-#include <linux/mfd/tmio.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/sh_mmcif.h>
-#include <linux/mmc/sh_mobile_sdhi.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mtd/sh_flctl.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/platform_data/gpio_backlight.h>
-#include <linux/pm_clock.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-#include <linux/smsc911x.h>
-#include <linux/sh_clk.h>
-#include <linux/tca6416_keypad.h>
-#include <linux/usb/renesas_usbhs.h>
-#include <linux/dma-mapping.h>
-
-#include <video/sh_mobile_hdmi.h>
-#include <video/sh_mobile_lcdc.h>
-#include <media/sh_mobile_ceu.h>
-#include <media/soc_camera.h>
-#include <media/soc_camera_platform.h>
-#include <sound/sh_fsi.h>
-#include <sound/simple_card.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include "common.h"
-#include "intc.h"
-#include "irqs.h"
-#include "pm-rmobile.h"
-#include "sh-gpio.h"
-#include "sh7372.h"
-
-/*
- * Address Interface BusWidth note
- * ------------------------------------------------------------------
- * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
- * 0x0800_0000 user area -
- * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
- * 0x1400_0000 Ether (LAN9220) 16bit
- * 0x1600_0000 user area - cannot use with NAND
- * 0x1800_0000 user area -
- * 0x1A00_0000 -
- * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
- */
-
-/*
- * CPU mode
- *
- * SW4 | Boot Area| Master | Remarks
- * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
- * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
- * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
- * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
- * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
- * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
- * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
- * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
- * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
- * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
-*/
-
-/*
- * NOR Flash ROM
- *
- * SW1 | SW2 | SW7 | NOR Flash ROM
- * bit1 | bit1 bit2 | bit1 | Memory allocation
- * ------+------------+------+------------------
- * OFF | ON OFF | ON | Area 0
- * OFF | ON OFF | OFF | Area 4
- */
-
-/*
- * SMSC 9220
- *
- * SW1 SMSC 9220
- * -----------------------
- * ON access disable
- * OFF access enable
- */
-
-/*
- * NAND Flash ROM
- *
- * SW1 | SW2 | SW7 | NAND Flash ROM
- * bit1 | bit1 bit2 | bit2 | Memory allocation
- * ------+------------+------+------------------
- * OFF | ON OFF | ON | FCE 0
- * OFF | ON OFF | OFF | FCE 1
- */
-
-/*
- * External interrupt pin settings
- *
- * IRQX | pin setting | device | level
- * ------+--------------------+--------------------+-------
- * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low
- * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High
- * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low
- * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low
- * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low
- * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High
- * IRQ22 | ICR4A.IRQ22SA=0011 | Sensor(AK8975) | High
- */
-
-/*
- * USB
- *
- * USB0 : CN22 : Function
- * USB1 : CN31 : Function/Host *1
- *
- * J30 (for CN31) *1
- * ----------+---------------+-------------
- * 1-2 short | VBUS 5V | Host
- * open | external VBUS | Function
- *
- * CAUTION
- *
- * renesas_usbhs driver can use external interrupt mode
- * (which come from USB-PHY) or autonomy mode (it use own interrupt)
- * for detecting connection/disconnection when Function.
- * USB will be power OFF while it has been disconnecting
- * if external interrupt mode, and it is always power ON if autonomy mode,
- *
- * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
- * because Touchscreen is using IRQ7-PORT40.
- * It is impossible to use IRQ7 demux on this board.
- */
-
-/*
- * SDHI0 (CN12)
- *
- * SW56 : OFF
- *
- */
-
-/* MMC /SDHI1 (CN7)
- *
- * I/O voltage : 1.8v
- *
- * Power voltage : 1.8v or 3.3v
- * J22 : select power voltage *1
- * 1-2 pin : 1.8v
- * 2-3 pin : 3.3v
- *
- * *1
- * Please change J22 depends the card to be used.
- * MMC's OCR field set to support either voltage for the card inserted.
- *
- * SW1 | SW33
- * | bit1 | bit2 | bit3 | bit4
- * -------------+------+------+------+-------
- * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
- * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
- *
- */
-
-/*
- * SDHI2 (CN23)
- *
- * microSD card sloct
- *
- */
-
-/*
- * FSI - AK4642
- *
- * it needs amixer settings for playing
- *
- * amixer set "Headphone Enable" on
- */
-
-/* Fixed 3.3V and 1.8V regulators to be used by multiple devices */
-static struct regulator_consumer_supply fixed1v8_power_consumers[] =
-{
- /*
- * J22 on mackerel switches mmcif.0 and sdhi.1 between 1.8V and 3.3V
- * Since we cannot support both voltages, we support the default 1.8V
- */
- REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
- REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
- REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
- REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
-};
-
-static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-{
- REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
- REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
- REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.2"),
- REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.2"),
-};
-
-/* Dummy supplies, where voltage doesn't matter */
-static struct regulator_consumer_supply dummy_supplies[] = {
- REGULATOR_SUPPLY("vddvario", "smsc911x"),
- REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-};
-
-/* MTD */
-static struct mtd_partition nor_flash_partitions[] = {
- {
- .name = "loader",
- .offset = 0x00000000,
- .size = 512 * 1024,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "bootenv",
- .offset = MTDPART_OFS_APPEND,
- .size = 512 * 1024,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "kernel_ro",
- .offset = MTDPART_OFS_APPEND,
- .size = 8 * 1024 * 1024,
- .mask_flags = MTD_WRITEABLE,
- },
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = 8 * 1024 * 1024,
- },
- {
- .name = "data",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
-static struct physmap_flash_data nor_flash_data = {
- .width = 2,
- .parts = nor_flash_partitions,
- .nr_parts = ARRAY_SIZE(nor_flash_partitions),
-};
-
-static struct resource nor_flash_resources[] = {
- [0] = {
- .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
- .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device nor_flash_device = {
- .name = "physmap-flash",
- .dev = {
- .platform_data = &nor_flash_data,
- },
- .num_resources = ARRAY_SIZE(nor_flash_resources),
- .resource = nor_flash_resources,
-};
-
-/* SMSC */
-static struct resource smc911x_resources[] = {
- {
- .start = 0x14000000,
- .end = 0x16000000 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = evt2irq(0x02c0) /* IRQ6A */,
- .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
- },
-};
-
-static struct smsc911x_platform_config smsc911x_info = {
- .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
- .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
- .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
-};
-
-static struct platform_device smc911x_device = {
- .name = "smsc911x",
- .id = -1,
- .num_resources = ARRAY_SIZE(smc911x_resources),
- .resource = smc911x_resources,
- .dev = {
- .platform_data = &smsc911x_info,
- },
-};
-
-/* MERAM */
-static struct sh_mobile_meram_info mackerel_meram_info = {
- .addr_mode = SH_MOBILE_MERAM_MODE1,
-};
-
-static struct resource meram_resources[] = {
- [0] = {
- .name = "regs",
- .start = 0xe8000000,
- .end = 0xe807ffff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "meram",
- .start = 0xe8080000,
- .end = 0xe81fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device meram_device = {
- .name = "sh_mobile_meram",
- .id = 0,
- .num_resources = ARRAY_SIZE(meram_resources),
- .resource = meram_resources,
- .dev = {
- .platform_data = &mackerel_meram_info,
- },
-};
-
-/* LCDC and backlight */
-static struct fb_videomode mackerel_lcdc_modes[] = {
- {
- .name = "WVGA Panel",
- .xres = 800,
- .yres = 480,
- .left_margin = 220,
- .right_margin = 110,
- .hsync_len = 70,
- .upper_margin = 20,
- .lower_margin = 5,
- .vsync_len = 5,
- .sync = 0,
- },
-};
-
-static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
- .icb[0] = {
- .meram_size = 0x40,
- },
- .icb[1] = {
- .meram_size = 0x40,
- },
-};
-
-static struct sh_mobile_lcdc_info lcdc_info = {
- .meram_dev = &mackerel_meram_info,
- .clock_source = LCDC_CLK_BUS,
- .ch[0] = {
- .chan = LCDC_CHAN_MAINLCD,
- .fourcc = V4L2_PIX_FMT_RGB565,
- .lcd_modes = mackerel_lcdc_modes,
- .num_modes = ARRAY_SIZE(mackerel_lcdc_modes),
- .interface_type = RGB24,
- .clock_divider = 3,
- .flags = 0,
- .panel_cfg = {
- .width = 152,
- .height = 91,
- },
- .meram_cfg = &lcd_meram_cfg,
- }
-};
-
-static struct resource lcdc_resources[] = {
- [0] = {
- .name = "LCDC",
- .start = 0xfe940000,
- .end = 0xfe943fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x580),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device lcdc_device = {
- .name = "sh_mobile_lcdc_fb",
- .num_resources = ARRAY_SIZE(lcdc_resources),
- .resource = lcdc_resources,
- .dev = {
- .platform_data = &lcdc_info,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-static struct gpio_backlight_platform_data gpio_backlight_data = {
- .fbdev = &lcdc_device.dev,
- .gpio = 31,
- .def_value = 1,
- .name = "backlight",
-};
-
-static struct platform_device gpio_backlight_device = {
- .name = "gpio-backlight",
- .dev = {
- .platform_data = &gpio_backlight_data,
- },
-};
-
-/* HDMI */
-static struct sh_mobile_hdmi_info hdmi_info = {
- .flags = HDMI_SND_SRC_SPDIF,
-};
-
-static struct resource hdmi_resources[] = {
- [0] = {
- .name = "HDMI",
- .start = 0xe6be0000,
- .end = 0xe6be00ff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
- .start = evt2irq(0x17e0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device hdmi_device = {
- .name = "sh-mobile-hdmi",
- .num_resources = ARRAY_SIZE(hdmi_resources),
- .resource = hdmi_resources,
- .id = -1,
- .dev = {
- .platform_data = &hdmi_info,
- },
-};
-
-static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
- .icb[0] = {
- .meram_size = 0x100,
- },
- .icb[1] = {
- .meram_size = 0x100,
- },
-};
-
-static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
- .meram_dev = &mackerel_meram_info,
- .clock_source = LCDC_CLK_EXTERNAL,
- .ch[0] = {
- .chan = LCDC_CHAN_MAINLCD,
- .fourcc = V4L2_PIX_FMT_RGB565,
- .interface_type = RGB24,
- .clock_divider = 1,
- .flags = LCDC_FLAGS_DWPOL,
- .meram_cfg = &hdmi_meram_cfg,
- .tx_dev = &hdmi_device,
- }
-};
-
-static struct resource hdmi_lcdc_resources[] = {
- [0] = {
- .name = "LCDC1",
- .start = 0xfe944000,
- .end = 0xfe947fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x1780),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device hdmi_lcdc_device = {
- .name = "sh_mobile_lcdc_fb",
- .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
- .resource = hdmi_lcdc_resources,
- .id = 1,
- .dev = {
- .platform_data = &hdmi_lcdc_info,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-static struct asoc_simple_card_info fsi2_hdmi_info = {
- .name = "HDMI",
- .card = "FSI2B-HDMI",
- .codec = "sh-mobile-hdmi",
- .platform = "sh_fsi2",
- .daifmt = SND_SOC_DAIFMT_CBS_CFS,
- .cpu_dai = {
- .name = "fsib-dai",
- },
- .codec_dai = {
- .name = "sh_mobile_hdmi-hifi",
- },
-};
-
-static struct platform_device fsi_hdmi_device = {
- .name = "asoc-simple-card",
- .id = 1,
- .dev = {
- .platform_data = &fsi2_hdmi_info,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .dma_mask = &fsi_hdmi_device.dev.coherent_dma_mask,
- },
-};
-
-static void __init hdmi_init_pm_clock(void)
-{
- struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
- int ret;
- long rate;
-
- if (IS_ERR(hdmi_ick)) {
- ret = PTR_ERR(hdmi_ick);
- pr_err("Cannot get HDMI ICK: %d\n", ret);
- goto out;
- }
-
- ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
- if (ret < 0) {
- pr_err("Cannot set PLLC2 parent: %d, %d users\n",
- ret, sh7372_pllc2_clk.usecount);
- goto out;
- }
-
- pr_debug("PLLC2 initial frequency %lu\n",
- clk_get_rate(&sh7372_pllc2_clk));
-
- rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
- if (rate <= 0) {
- pr_err("Cannot get suitable rate: %ld\n", rate);
- ret = -EINVAL;
- goto out;
- }
-
- ret = clk_set_rate(&sh7372_pllc2_clk, rate);
- if (ret < 0) {
- pr_err("Cannot set rate %ld: %d\n", rate, ret);
- goto out;
- }
-
- pr_debug("PLLC2 set frequency %lu\n", rate);
-
- ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
- if (ret < 0)
- pr_err("Cannot set HDMI parent: %d\n", ret);
-
-out:
- if (!IS_ERR(hdmi_ick))
- clk_put(hdmi_ick);
-}
-
-/* USBHS0 is connected to CN22 which takes a USB Mini-B plug
- *
- * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
- * but on this particular board IRQ7 is already used by
- * the touch screen. This leaves us with software polling.
- */
-#define USBHS0_POLL_INTERVAL (HZ * 5)
-
-struct usbhs_private {
- void __iomem *usbphyaddr;
- void __iomem *usbcrcaddr;
- struct renesas_usbhs_platform_info info;
- struct delayed_work work;
- struct platform_device *pdev;
-};
-
-#define usbhs_get_priv(pdev) \
- container_of(renesas_usbhs_get_info(pdev), \
- struct usbhs_private, info)
-
-#define usbhs_is_connected(priv) \
- (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
-
-static int usbhs_get_vbus(struct platform_device *pdev)
-{
- return usbhs_is_connected(usbhs_get_priv(pdev));
-}
-
-static int usbhs_phy_reset(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- /* init phy */
- __raw_writew(0x8a0a, priv->usbcrcaddr);
-
- return 0;
-}
-
-static int usbhs0_get_id(struct platform_device *pdev)
-{
- return USBHS_GADGET;
-}
-
-static void usbhs0_work_function(struct work_struct *work)
-{
- struct usbhs_private *priv = container_of(work, struct usbhs_private,
- work.work);
-
- renesas_usbhs_call_notify_hotplug(priv->pdev);
- schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
-}
-
-static int usbhs0_hardware_init(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- priv->pdev = pdev;
- INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
- schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
- return 0;
-}
-
-static int usbhs0_hardware_exit(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- cancel_delayed_work_sync(&priv->work);
-
- return 0;
-}
-
-static struct usbhs_private usbhs0_private = {
- .usbcrcaddr = IOMEM(0xe605810c), /* USBCR2 */
- .info = {
- .platform_callback = {
- .hardware_init = usbhs0_hardware_init,
- .hardware_exit = usbhs0_hardware_exit,
- .phy_reset = usbhs_phy_reset,
- .get_id = usbhs0_get_id,
- .get_vbus = usbhs_get_vbus,
- },
- .driver_param = {
- .buswait_bwait = 4,
- .d0_tx_id = SHDMA_SLAVE_USB0_TX,
- .d1_rx_id = SHDMA_SLAVE_USB0_RX,
- },
- },
-};
-
-static struct resource usbhs0_resources[] = {
- [0] = {
- .name = "USBHS0",
- .start = 0xe6890000,
- .end = 0xe68900e6 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usbhs0_device = {
- .name = "renesas_usbhs",
- .id = 0,
- .dev = {
- .platform_data = &usbhs0_private.info,
- },
- .num_resources = ARRAY_SIZE(usbhs0_resources),
- .resource = usbhs0_resources,
-};
-
-/* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
- *
- * Use J30 to select between Host and Function. This setting
- * can however not be detected by software. Hotplug of USBHS1
- * is provided via IRQ8.
- *
- * Current USB1 works as "USB Host".
- * - set J30 "short"
- *
- * If you want to use it as "USB gadget",
- * - J30 "open"
- * - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
- * - add .get_vbus = usbhs_get_vbus in usbhs1_private
- * - check usbhs0_device(pio)/usbhs1_device(irq) order in mackerel_devices.
- */
-#define IRQ8 evt2irq(0x0300)
-#define USB_PHY_MODE (1 << 4)
-#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
-#define USB_PHY_ON (1 << 1)
-#define USB_PHY_OFF (1 << 0)
-#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
-
-static irqreturn_t usbhs1_interrupt(int irq, void *data)
-{
- struct platform_device *pdev = data;
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- dev_dbg(&pdev->dev, "%s\n", __func__);
-
- renesas_usbhs_call_notify_hotplug(pdev);
-
- /* clear status */
- __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
- priv->usbphyaddr);
-
- return IRQ_HANDLED;
-}
-
-static int usbhs1_hardware_init(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
- int ret;
-
- /* clear interrupt status */
- __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
-
- ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
- dev_name(&pdev->dev), pdev);
- if (ret) {
- dev_err(&pdev->dev, "request_irq err\n");
- return ret;
- }
-
- /* enable USB phy interrupt */
- __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
-
- return 0;
-}
-
-static int usbhs1_hardware_exit(struct platform_device *pdev)
-{
- struct usbhs_private *priv = usbhs_get_priv(pdev);
-
- /* clear interrupt status */
- __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
-
- free_irq(IRQ8, pdev);
-
- return 0;
-}
-
-static int usbhs1_get_id(struct platform_device *pdev)
-{
- return USBHS_HOST;
-}
-
-static u32 usbhs1_pipe_cfg[] = {
- USB_ENDPOINT_XFER_CONTROL,
- USB_ENDPOINT_XFER_ISOC,
- USB_ENDPOINT_XFER_ISOC,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_INT,
- USB_ENDPOINT_XFER_INT,
- USB_ENDPOINT_XFER_INT,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
- USB_ENDPOINT_XFER_BULK,
-};
-
-static struct usbhs_private usbhs1_private = {
- .usbphyaddr = IOMEM(0xe60581e2), /* USBPHY1INTAP */
- .usbcrcaddr = IOMEM(0xe6058130), /* USBCR4 */
- .info = {
- .platform_callback = {
- .hardware_init = usbhs1_hardware_init,
- .hardware_exit = usbhs1_hardware_exit,
- .get_id = usbhs1_get_id,
- .phy_reset = usbhs_phy_reset,
- },
- .driver_param = {
- .buswait_bwait = 4,
- .has_otg = 1,
- .pipe_type = usbhs1_pipe_cfg,
- .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
- .d0_tx_id = SHDMA_SLAVE_USB1_TX,
- .d1_rx_id = SHDMA_SLAVE_USB1_RX,
- },
- },
-};
-
-static struct resource usbhs1_resources[] = {
- [0] = {
- .name = "USBHS1",
- .start = 0xe68b0000,
- .end = 0xe68b00e6 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usbhs1_device = {
- .name = "renesas_usbhs",
- .id = 1,
- .dev = {
- .platform_data = &usbhs1_private.info,
- .dma_mask = &usbhs1_device.dev.coherent_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = ARRAY_SIZE(usbhs1_resources),
- .resource = usbhs1_resources,
-};
-
-/* LED */
-static struct gpio_led mackerel_leds[] = {
- {
- .name = "led0",
- .gpio = 0,
- .default_state = LEDS_GPIO_DEFSTATE_ON,
- },
- {
- .name = "led1",
- .gpio = 1,
- .default_state = LEDS_GPIO_DEFSTATE_ON,
- },
- {
- .name = "led2",
- .gpio = 2,
- .default_state = LEDS_GPIO_DEFSTATE_ON,
- },
- {
- .name = "led3",
- .gpio = 159,
- .default_state = LEDS_GPIO_DEFSTATE_ON,
- }
-};
-
-static struct gpio_led_platform_data mackerel_leds_pdata = {
- .leds = mackerel_leds,
- .num_leds = ARRAY_SIZE(mackerel_leds),
-};
-
-static struct platform_device leds_device = {
- .name = "leds-gpio",
- .id = 0,
- .dev = {
- .platform_data = &mackerel_leds_pdata,
- },
-};
-
-/* FSI */
-#define IRQ_FSI evt2irq(0x1840)
-static struct sh_fsi_platform_info fsi_info = {
- .port_a = {
- .tx_id = SHDMA_SLAVE_FSIA_TX,
- .rx_id = SHDMA_SLAVE_FSIA_RX,
- },
- .port_b = {
- .flags = SH_FSI_CLK_CPG |
- SH_FSI_FMT_SPDIF,
- }
-};
-
-static struct resource fsi_resources[] = {
- [0] = {
- /* we need 0xFE1F0000 to access DMA
- * instead of 0xFE3C0000 */
- .name = "FSI",
- .start = 0xFE1F0000,
- .end = 0xFE1F0400 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_FSI,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device fsi_device = {
- .name = "sh_fsi2",
- .id = -1,
- .num_resources = ARRAY_SIZE(fsi_resources),
- .resource = fsi_resources,
- .dev = {
- .platform_data = &fsi_info,
- },
-};
-
-static struct asoc_simple_card_info fsi2_ak4643_info = {
- .name = "AK4643",
- .card = "FSI2A-AK4643",
- .codec = "ak4642-codec.0-0013",
- .platform = "sh_fsi2",
- .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
- .cpu_dai = {
- .name = "fsia-dai",
- },
- .codec_dai = {
- .name = "ak4642-hifi",
- .sysclk = 11289600,
- },
-};
-
-static struct platform_device fsi_ak4643_device = {
- .name = "asoc-simple-card",
- .dev = {
- .platform_data = &fsi2_ak4643_info,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .dma_mask = &fsi_ak4643_device.dev.coherent_dma_mask,
- },
-};
-
-/* FLCTL */
-static struct mtd_partition nand_partition_info[] = {
- {
- .name = "system",
- .offset = 0,
- .size = 128 * 1024 * 1024,
- },
- {
- .name = "userdata",
- .offset = MTDPART_OFS_APPEND,
- .size = 256 * 1024 * 1024,
- },
- {
- .name = "cache",
- .offset = MTDPART_OFS_APPEND,
- .size = 128 * 1024 * 1024,
- },
-};
-
-static struct resource nand_flash_resources[] = {
- [0] = {
- .start = 0xe6a30000,
- .end = 0xe6a3009b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x0d80), /* flstei: status error irq */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct sh_flctl_platform_data nand_flash_data = {
- .parts = nand_partition_info,
- .nr_parts = ARRAY_SIZE(nand_partition_info),
- .flcmncr_val = CLK_16B_12L_4H | TYPESEL_SET
- | SHBUSSEL | SEL_16BIT | SNAND_E,
- .use_holden = 1,
-};
-
-static struct platform_device nand_flash_device = {
- .name = "sh_flctl",
- .resource = nand_flash_resources,
- .num_resources = ARRAY_SIZE(nand_flash_resources),
- .dev = {
- .platform_data = &nand_flash_data,
- },
-};
-
-/* SDHI0 */
-static struct sh_mobile_sdhi_info sdhi0_info = {
- .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
- .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
- .tmio_flags = TMIO_MMC_USE_GPIO_CD,
- .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
- .cd_gpio = 172,
-};
-
-static struct resource sdhi0_resources[] = {
- {
- .name = "SDHI0",
- .start = 0xe6850000,
- .end = 0xe68500ff,
- .flags = IORESOURCE_MEM,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDCARD,
- .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
- .flags = IORESOURCE_IRQ,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDIO,
- .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sdhi0_device = {
- .name = "sh_mobile_sdhi",
- .num_resources = ARRAY_SIZE(sdhi0_resources),
- .resource = sdhi0_resources,
- .id = 0,
- .dev = {
- .platform_data = &sdhi0_info,
- },
-};
-
-#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
-/* SDHI1 */
-
-/* GPIO 41 can trigger IRQ8, but it is used by USBHS1, we have to poll */
-static struct sh_mobile_sdhi_info sdhi1_info = {
- .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
- .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
- .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_USE_GPIO_CD,
- .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
- MMC_CAP_NEEDS_POLL,
- .cd_gpio = 41,
-};
-
-static struct resource sdhi1_resources[] = {
- {
- .name = "SDHI1",
- .start = 0xe6860000,
- .end = 0xe68600ff,
- .flags = IORESOURCE_MEM,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDCARD,
- .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
- .flags = IORESOURCE_IRQ,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDIO,
- .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sdhi1_device = {
- .name = "sh_mobile_sdhi",
- .num_resources = ARRAY_SIZE(sdhi1_resources),
- .resource = sdhi1_resources,
- .id = 1,
- .dev = {
- .platform_data = &sdhi1_info,
- },
-};
-#endif
-
-/* SDHI2 */
-
-/*
- * The card detect pin of the top SD/MMC slot (CN23) is active low and is
- * connected to GPIO SCIFB_SCK of SH7372 (GPIO 162).
- */
-static struct sh_mobile_sdhi_info sdhi2_info = {
- .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
- .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
- .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_USE_GPIO_CD,
- .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
- MMC_CAP_NEEDS_POLL,
- .cd_gpio = 162,
-};
-
-static struct resource sdhi2_resources[] = {
- {
- .name = "SDHI2",
- .start = 0xe6870000,
- .end = 0xe68700ff,
- .flags = IORESOURCE_MEM,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDCARD,
- .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
- .flags = IORESOURCE_IRQ,
- }, {
- .name = SH_MOBILE_SDHI_IRQ_SDIO,
- .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sdhi2_device = {
- .name = "sh_mobile_sdhi",
- .num_resources = ARRAY_SIZE(sdhi2_resources),
- .resource = sdhi2_resources,
- .id = 2,
- .dev = {
- .platform_data = &sdhi2_info,
- },
-};
-
-/* SH_MMCIF */
-#if IS_ENABLED(CONFIG_MMC_SH_MMCIF)
-static struct resource sh_mmcif_resources[] = {
- [0] = {
- .name = "MMCIF",
- .start = 0xE6BD0000,
- .end = 0xE6BD00FF,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- /* MMC ERR */
- .start = evt2irq(0x1ac0),
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- /* MMC NOR */
- .start = evt2irq(0x1ae0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct sh_mmcif_plat_data sh_mmcif_plat = {
- .sup_pclk = 0,
- .caps = MMC_CAP_4_BIT_DATA |
- MMC_CAP_8_BIT_DATA |
- MMC_CAP_NEEDS_POLL,
- .use_cd_gpio = true,
- /* card detect pin for SD/MMC slot (CN7) */
- .cd_gpio = 41,
- .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
- .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
-};
-
-static struct platform_device sh_mmcif_device = {
- .name = "sh_mmcif",
- .id = 0,
- .dev = {
- .dma_mask = NULL,
- .coherent_dma_mask = 0xffffffff,
- .platform_data = &sh_mmcif_plat,
- },
- .num_resources = ARRAY_SIZE(sh_mmcif_resources),
- .resource = sh_mmcif_resources,
-};
-#endif
-
-static int mackerel_camera_add(struct soc_camera_device *icd);
-static void mackerel_camera_del(struct soc_camera_device *icd);
-
-static int camera_set_capture(struct soc_camera_platform_info *info,
- int enable)
-{
- return 0; /* camera sensor always enabled */
-}
-
-static struct soc_camera_platform_info camera_info = {
- .format_name = "UYVY",
- .format_depth = 16,
- .format = {
- .code = MEDIA_BUS_FMT_UYVY8_2X8,
- .colorspace = V4L2_COLORSPACE_SMPTE170M,
- .field = V4L2_FIELD_NONE,
- .width = 640,
- .height = 480,
- },
- .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
- V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
- V4L2_MBUS_DATA_ACTIVE_HIGH,
- .mbus_type = V4L2_MBUS_PARALLEL,
- .set_capture = camera_set_capture,
-};
-
-static struct soc_camera_link camera_link = {
- .bus_id = 0,
- .add_device = mackerel_camera_add,
- .del_device = mackerel_camera_del,
- .module_name = "soc_camera_platform",
- .priv = &camera_info,
-};
-
-static struct platform_device *camera_device;
-
-static void mackerel_camera_release(struct device *dev)
-{
- soc_camera_platform_release(&camera_device);
-}
-
-static int mackerel_camera_add(struct soc_camera_device *icd)
-{
- return soc_camera_platform_add(icd, &camera_device, &camera_link,
- mackerel_camera_release, 0);
-}
-
-static void mackerel_camera_del(struct soc_camera_device *icd)
-{
- soc_camera_platform_del(icd, camera_device, &camera_link);
-}
-
-static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
- .flags = SH_CEU_FLAG_USE_8BIT_BUS,
- .max_width = 8188,
- .max_height = 8188,
-};
-
-static struct resource ceu_resources[] = {
- [0] = {
- .name = "CEU",
- .start = 0xfe910000,
- .end = 0xfe91009f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x880),
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- /* place holder for contiguous memory */
- },
-};
-
-static struct platform_device ceu_device = {
- .name = "sh_mobile_ceu",
- .id = 0, /* "ceu0" clock */
- .num_resources = ARRAY_SIZE(ceu_resources),
- .resource = ceu_resources,
- .dev = {
- .platform_data = &sh_mobile_ceu_info,
- .coherent_dma_mask = 0xffffffff,
- },
-};
-
-static struct platform_device mackerel_camera = {
- .name = "soc-camera-pdrv",
- .id = 0,
- .dev = {
- .platform_data = &camera_link,
- },
-};
-
-static struct platform_device *mackerel_devices[] __initdata = {
- &nor_flash_device,
- &smc911x_device,
- &lcdc_device,
- &gpio_backlight_device,
- &usbhs0_device,
- &usbhs1_device,
- &leds_device,
- &fsi_device,
- &fsi_ak4643_device,
- &fsi_hdmi_device,
- &nand_flash_device,
- &sdhi0_device,
-#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
- &sdhi1_device,
-#else
- &sh_mmcif_device,
-#endif
- &sdhi2_device,
- &ceu_device,
- &mackerel_camera,
- &hdmi_device,
- &hdmi_lcdc_device,
- &meram_device,
-};
-
-/* Keypad Initialization */
-#define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
-{ \
- .type = ev_type, \
- .code = ev_code, \
- .active_low = act_low, \
-}
-
-#define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
-
-static struct tca6416_button mackerel_gpio_keys[] = {
- KEYPAD_BUTTON_LOW(KEY_HOME),
- KEYPAD_BUTTON_LOW(KEY_MENU),
- KEYPAD_BUTTON_LOW(KEY_BACK),
- KEYPAD_BUTTON_LOW(KEY_POWER),
-};
-
-static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
- .buttons = mackerel_gpio_keys,
- .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
- .rep = 1,
- .use_polling = 0,
- .pinmask = 0x000F,
-};
-
-/* I2C */
-#define IRQ7 evt2irq(0x02e0)
-#define IRQ9 evt2irq(0x0320)
-
-static struct i2c_board_info i2c0_devices[] = {
- {
- I2C_BOARD_INFO("ak4643", 0x13),
- },
- /* Keypad */
- {
- I2C_BOARD_INFO("tca6408-keys", 0x20),
- .platform_data = &mackerel_tca6416_keys_info,
- .irq = IRQ9,
- },
- /* Touchscreen */
- {
- I2C_BOARD_INFO("st1232-ts", 0x55),
- .irq = IRQ7,
- },
-};
-
-#define IRQ21 evt2irq(0x32a0)
-
-static struct i2c_board_info i2c1_devices[] = {
- /* Accelerometer */
- {
- I2C_BOARD_INFO("adxl34x", 0x53),
- .irq = IRQ21,
- },
-};
-
-static unsigned long pin_pulldown_conf[] = {
- PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0),
-};
-
-static const struct pinctrl_map mackerel_pinctrl_map[] = {
- /* ADXL34X */
- PIN_MAP_MUX_GROUP_DEFAULT("1-0053", "pfc-sh7372",
- "intc_irq21", "intc"),
- /* CEU */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- "ceu_data_0_7", "ceu"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- "ceu_clk_0", "ceu"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- "ceu_sync", "ceu"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- "ceu_field", "ceu"),
- /* FLCTL */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
- "flctl_data", "flctl"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
- "flctl_ce0", "flctl"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
- "flctl_ctrl", "flctl"),
- /* FSIA (AK4643) */
- PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
- "fsia_sclk_in", "fsia"),
- PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
- "fsia_data_in", "fsia"),
- PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
- "fsia_data_out", "fsia"),
- /* FSIB (HDMI) */
- PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
- "fsib_mclk_in", "fsib"),
- /* HDMI */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
- "hdmi", "hdmi"),
- /* LCDC */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
- "lcd_data24", "lcd"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
- "lcd_sync", "lcd"),
- /* SCIFA0 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-sh7372",
- "scifa0_data", "scifa0"),
- /* SCIFA2 (GT-720F GPS module) */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh7372",
- "scifa2_data", "scifa2"),
- /* SDHI0 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- "sdhi0_data4", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- "sdhi0_ctrl", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- "sdhi0_wp", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- "intc_irq26_1", "intc"),
- /* SDHI1 */
-#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
- "sdhi1_data4", "sdhi1"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
- "sdhi1_ctrl", "sdhi1"),
-#else
- /* MMCIF */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- "mmc0_data8_0", "mmc0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- "mmc0_ctrl_0", "mmc0"),
-#endif
- /* SDHI2 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
- "sdhi2_data4", "sdhi2"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
- "sdhi2_ctrl", "sdhi2"),
- /* SMSC911X */
- PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
- "bsc_cs5a", "bsc"),
- PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
- "intc_irq6_0", "intc"),
- /* ST1232 */
- PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-sh7372",
- "intc_irq7_0", "intc"),
- /* TCA6416 */
- PIN_MAP_MUX_GROUP_DEFAULT("0-0020", "pfc-sh7372",
- "intc_irq9_0", "intc"),
- /* USBHS0 */
- PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
- "usb0_vbus", "usb0"),
- PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
- "usb0_vbus", pin_pulldown_conf),
- /* USBHS1 */
- PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- "usb1_vbus", "usb1"),
- PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- "usb1_vbus", pin_pulldown_conf),
- PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- "usb1_otg_id_0", "usb1"),
-};
-
-#define GPIO_PORT9CR IOMEM(0xE6051009)
-#define GPIO_PORT10CR IOMEM(0xE605100A)
-#define SRCR4 IOMEM(0xe61580bc)
-#define USCCR1 IOMEM(0xE6058144)
-static void __init mackerel_init(void)
-{
- static struct pm_domain_device domain_devices[] __initdata = {
- { "A4LC", &lcdc_device, },
- { "A4LC", &hdmi_lcdc_device, },
- { "A4LC", &meram_device, },
- { "A4MP", &fsi_device, },
- { "A3SP", &usbhs0_device, },
- { "A3SP", &usbhs1_device, },
- { "A3SP", &nand_flash_device, },
- { "A3SP", &sdhi0_device, },
-#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
- { "A3SP", &sdhi1_device, },
-#else
- { "A3SP", &sh_mmcif_device, },
-#endif
- { "A3SP", &sdhi2_device, },
- { "A4R", &ceu_device, },
- };
- u32 srcr4;
- struct clk *clk;
-
- regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
- ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
- regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
- ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
- regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
-
- /* External clock source */
- clk_set_rate(&sh7372_dv_clki_clk, 27000000);
-
- pinctrl_register_mappings(mackerel_pinctrl_map,
- ARRAY_SIZE(mackerel_pinctrl_map));
- sh7372_pinmux_init();
-
- gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
-
- /* FSI2 port A (ak4643) */
- gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
-
- gpio_request(9, NULL);
- gpio_request(10, NULL);
- gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
- gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
-
- intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
-
- /* FSI2 port B (HDMI) */
- __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
-
- /* set SPU2 clock to 119.6 MHz */
- clk = clk_get(NULL, "spu_clk");
- if (!IS_ERR(clk)) {
- clk_set_rate(clk, clk_round_rate(clk, 119600000));
- clk_put(clk);
- }
-
- /* Keypad */
- irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
-
- /* Touchscreen */
- irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
-
- /* Accelerometer */
- irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
-
- /* Reset HDMI, must be held@least one EXTALR (32768Hz) period */
- srcr4 = __raw_readl(SRCR4);
- __raw_writel(srcr4 | (1 << 13), SRCR4);
- udelay(50);
- __raw_writel(srcr4 & ~(1 << 13), SRCR4);
-
- i2c_register_board_info(0, i2c0_devices,
- ARRAY_SIZE(i2c0_devices));
- i2c_register_board_info(1, i2c1_devices,
- ARRAY_SIZE(i2c1_devices));
-
- sh7372_add_standard_devices();
-
- platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
-
- rmobile_add_devices_to_domains(domain_devices,
- ARRAY_SIZE(domain_devices));
-
- hdmi_init_pm_clock();
- sh7372_pm_init();
- pm_clk_add(&fsi_device.dev, "spu2");
- pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
-}
-
-static const char *mackerel_boards_compat_dt[] __initdata = {
- "renesas,mackerel",
- NULL,
-};
-
-DT_MACHINE_START(MACKEREL_DT, "mackerel")
- .map_io = sh7372_map_io,
- .init_early = sh7372_add_early_devices,
- .init_irq = sh7372_init_irq,
- .handle_irq = shmobile_handle_irq_intc,
- .init_machine = mackerel_init,
- .init_late = sh7372_pm_init_late,
- .init_time = sh7372_earlytimer_init,
- .dt_compat = mackerel_boards_compat_dt,
-MACHINE_END
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:53 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the DTS file for the no longer supported Mackerel board.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/boot/dts/Makefile | 1 -
arch/arm/boot/dts/sh7372-mackerel.dts | 26 --------------------------
2 files changed, 27 deletions(-)
--- 0001/arch/arm/boot/dts/Makefile
+++ work/arch/arm/boot/dts/Makefile 2015-01-21 11:07:54.407575785 +0900
@@ -408,7 +408,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \
r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb \
r8a7779-marzen.dtb \
- sh7372-mackerel.dtb \
sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
--- 0001/arch/arm/boot/dts/sh7372-mackerel.dts
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,26 +0,0 @@
-/*
- * Device Tree Source for the mackerel board
- *
- * Copyright (C) 2012 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/dts-v1/;
-#include "sh7372.dtsi"
-
-/ {
- model = "Mackerel (AP4 EVM 2nd)";
- compatible = "renesas,mackerel";
-
- chosen {
- bootargs = "console=tty0, console=ttySC0,115200 earlyprintk=sh-sci.0,115200 root=/dev/nfs nfsroot=,tcp,v3 ip=dhcp mem$0m rw";
- };
-
- memory {
- device_type = "memory";
- reg = <0x40000000 0x10000000>;
- };
-};
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
@ 2015-01-21 4:53 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the DTS file for the no longer supported Mackerel board.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/boot/dts/Makefile | 1 -
arch/arm/boot/dts/sh7372-mackerel.dts | 26 --------------------------
2 files changed, 27 deletions(-)
--- 0001/arch/arm/boot/dts/Makefile
+++ work/arch/arm/boot/dts/Makefile 2015-01-21 11:07:54.407575785 +0900
@@ -408,7 +408,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \
r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb \
r8a7779-marzen.dtb \
- sh7372-mackerel.dtb \
sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
--- 0001/arch/arm/boot/dts/sh7372-mackerel.dts
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,26 +0,0 @@
-/*
- * Device Tree Source for the mackerel board
- *
- * Copyright (C) 2012 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/dts-v1/;
-#include "sh7372.dtsi"
-
-/ {
- model = "Mackerel (AP4 EVM 2nd)";
- compatible = "renesas,mackerel";
-
- chosen {
- bootargs = "console=tty0, console=ttySC0,115200 earlyprintk=sh-sci.0,115200 root=/dev/nfs nfsroot=,tcp,v3 ip=dhcp mem=240m rw";
- };
-
- memory {
- device_type = "memory";
- reg = <0x40000000 0x10000000>;
- };
-};
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:53 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the DT compatibile string documentation for the
no longer supported Mackerel board.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 --
1 file changed, 2 deletions(-)
--- 0001/Documentation/devicetree/bindings/arm/shmobile.txt
+++ work/Documentation/devicetree/bindings/arm/shmobile.txt 2015-01-21 11:10:46.507575167 +0900
@@ -57,8 +57,6 @@ Boards:
compatible = "renesas,kzm9g", "renesas,sh73a0"
- Lager (RTP0RC7790SEB00010S)
compatible = "renesas,lager", "renesas,r8a7790"
- - Mackerel (R0P7372LC0016RL, AP4 EVM 2nd)
- compatible = "renesas,mackerel"
- Marzen
compatible = "renesas,marzen", "renesas,r8a7779"
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
@ 2015-01-21 4:53 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the DT compatibile string documentation for the
no longer supported Mackerel board.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 --
1 file changed, 2 deletions(-)
--- 0001/Documentation/devicetree/bindings/arm/shmobile.txt
+++ work/Documentation/devicetree/bindings/arm/shmobile.txt 2015-01-21 11:10:46.507575167 +0900
@@ -57,8 +57,6 @@ Boards:
compatible = "renesas,kzm9g", "renesas,sh73a0"
- Lager (RTP0RC7790SEB00010S)
compatible = "renesas,lager", "renesas,r8a7790"
- - Mackerel (R0P7372LC0016RL, AP4 EVM 2nd)
- compatible = "renesas,mackerel"
- Marzen
compatible = "renesas,marzen", "renesas,r8a7779"
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:53 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the mackerel entry from the mach-types file.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/tools/mach-types | 1 -
1 file changed, 1 deletion(-)
--- 0001/arch/arm/tools/mach-types
+++ work/arch/arm/tools/mach-types 2015-01-21 12:21:27.377559927 +0900
@@ -526,7 +526,6 @@ ag5evm MACH_AG5EVM AG5EVM 3189
ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
trimslice MACH_TRIMSLICE TRIMSLICE 3209
-mackerel MACH_MACKEREL MACKEREL 3211
kaen MACH_KAEN KAEN 3217
nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220
msm8960_sim MACH_MSM8960_SIM MSM8960_SIM 3230
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
@ 2015-01-21 4:53 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the mackerel entry from the mach-types file.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/tools/mach-types | 1 -
1 file changed, 1 deletion(-)
--- 0001/arch/arm/tools/mach-types
+++ work/arch/arm/tools/mach-types 2015-01-21 12:21:27.377559927 +0900
@@ -526,7 +526,6 @@ ag5evm MACH_AG5EVM AG5EVM 3189
ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
trimslice MACH_TRIMSLICE TRIMSLICE 3209
-mackerel MACH_MACKEREL MACKEREL 3211
kaen MACH_KAEN KAEN 3217
nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220
msm8960_sim MACH_MSM8960_SIM MSM8960_SIM 3230
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:53 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the defconfig for the no longer supported mackerel board.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/configs/mackerel_defconfig | 157 -----------------------------------
1 file changed, 157 deletions(-)
--- 0001/arch/arm/configs/mackerel_defconfig
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,157 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT\x16
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-# CONFIG_NET_NS is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE_LEGACY=y
-CONFIG_ARCH_SH7372=y
-CONFIG_MACH_MACKEREL=y
-CONFIG_MEMORY_SIZE=0x10000000
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_FORCE_MAX_ZONEORDER\x15
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_KEXEC=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_ARM_INTEGRATOR=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=8
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_SH_MOBILE=y
-# CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
-CONFIG_REGULATOR=y
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_SH_MOBILE_LCDC=y
-CONFIG_FB_SH_MOBILE_HDMI=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_SOC_SH4_FSI=y
-CONFIG_USB=y
-CONFIG_USB_RENESAS_USBHS_HCD=y
-CONFIG_USB_RENESAS_USBHS=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_RENESAS_USBHS_UDC=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHI=y
-CONFIG_MMC_SH_MMCIF=y
-CONFIG_DMADEVICES=y
-CONFIG_SH_DMAE=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_737=y
-CONFIG_NLS_CODEPAGE_775=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_855=y
-CONFIG_NLS_CODEPAGE_857=y
-CONFIG_NLS_CODEPAGE_860=y
-CONFIG_NLS_CODEPAGE_861=y
-CONFIG_NLS_CODEPAGE_862=y
-CONFIG_NLS_CODEPAGE_863=y
-CONFIG_NLS_CODEPAGE_864=y
-CONFIG_NLS_CODEPAGE_865=y
-CONFIG_NLS_CODEPAGE_866=y
-CONFIG_NLS_CODEPAGE_869=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_ISO8859_3=y
-CONFIG_NLS_ISO8859_4=y
-CONFIG_NLS_ISO8859_5=y
-CONFIG_NLS_ISO8859_6=y
-CONFIG_NLS_ISO8859_7=y
-CONFIG_NLS_ISO8859_9=y
-CONFIG_NLS_ISO8859_13=y
-CONFIG_NLS_ISO8859_14=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_KOI8_R=y
-CONFIG_NLS_KOI8_U=y
-CONFIG_NLS_UTF8=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_ARM_UNWIND is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
@ 2015-01-21 4:53 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:53 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the defconfig for the no longer supported mackerel board.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/configs/mackerel_defconfig | 157 -----------------------------------
1 file changed, 157 deletions(-)
--- 0001/arch/arm/configs/mackerel_defconfig
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,157 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-# CONFIG_NET_NS is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_SHMOBILE_LEGACY=y
-CONFIG_ARCH_SH7372=y
-CONFIG_MACH_MACKEREL=y
-CONFIG_MEMORY_SIZE=0x10000000
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_FORCE_MAX_ZONEORDER=15
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_KEXEC=y
-CONFIG_VFP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_ARM_INTEGRATOR=y
-CONFIG_MTD_BLOCK2MTD=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_NR_UARTS=8
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_SH_MOBILE=y
-# CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
-CONFIG_REGULATOR=y
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_SH_MOBILE_LCDC=y
-CONFIG_FB_SH_MOBILE_HDMI=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-CONFIG_SND_SOC_SH4_FSI=y
-CONFIG_USB=y
-CONFIG_USB_RENESAS_USBHS_HCD=y
-CONFIG_USB_RENESAS_USBHS=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_RENESAS_USBHS_UDC=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHI=y
-CONFIG_MMC_SH_MMCIF=y
-CONFIG_DMADEVICES=y
-CONFIG_SH_DMAE=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_DNOTIFY is not set
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-# CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_737=y
-CONFIG_NLS_CODEPAGE_775=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_855=y
-CONFIG_NLS_CODEPAGE_857=y
-CONFIG_NLS_CODEPAGE_860=y
-CONFIG_NLS_CODEPAGE_861=y
-CONFIG_NLS_CODEPAGE_862=y
-CONFIG_NLS_CODEPAGE_863=y
-CONFIG_NLS_CODEPAGE_864=y
-CONFIG_NLS_CODEPAGE_865=y
-CONFIG_NLS_CODEPAGE_866=y
-CONFIG_NLS_CODEPAGE_869=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_ISO8859_3=y
-CONFIG_NLS_ISO8859_4=y
-CONFIG_NLS_ISO8859_5=y
-CONFIG_NLS_ISO8859_6=y
-CONFIG_NLS_ISO8859_7=y
-CONFIG_NLS_ISO8859_9=y
-CONFIG_NLS_ISO8859_13=y
-CONFIG_NLS_ISO8859_14=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_KOI8_R=y
-CONFIG_NLS_KOI8_U=y
-CONFIG_NLS_UTF8=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-# CONFIG_ARM_UNWIND is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
2015-01-21 4:53 ` Magnus Damm
@ 2015-01-21 10:46 ` Geert Uytterhoeven
-1 siblings, 0 replies; 58+ messages in thread
From: Geert Uytterhoeven @ 2015-01-21 10:46 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Wed, Jan 21, 2015 at 5:53 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Remove the defconfig for the no longer supported mackerel board.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
>
> arch/arm/configs/mackerel_defconfig | 157 -----------------------------------
> 1 file changed, 157 deletions(-)
You forgot the reference to mackerel_defconfig in MAINTAINERS.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
@ 2015-01-21 10:46 ` Geert Uytterhoeven
0 siblings, 0 replies; 58+ messages in thread
From: Geert Uytterhoeven @ 2015-01-21 10:46 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Wed, Jan 21, 2015 at 5:53 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Remove the defconfig for the no longer supported mackerel board.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
>
> arch/arm/configs/mackerel_defconfig | 157 -----------------------------------
> 1 file changed, 157 deletions(-)
You forgot the reference to mackerel_defconfig in MAINTAINERS.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 58+ messages in thread* Re: [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
2015-01-21 10:46 ` Geert Uytterhoeven
@ 2015-01-26 4:14 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 4:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Wed, Jan 21, 2015 at 7:46 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Wed, Jan 21, 2015 at 5:53 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Remove the defconfig for the no longer supported mackerel board.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> ---
>>
>> arch/arm/configs/mackerel_defconfig | 157 -----------------------------------
>> 1 file changed, 157 deletions(-)
>
> You forgot the reference to mackerel_defconfig in MAINTAINERS.
Oops, thanks for letting me know. Will fix and resend.
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
@ 2015-01-26 4:14 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 4:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Wed, Jan 21, 2015 at 7:46 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Wed, Jan 21, 2015 at 5:53 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Remove the defconfig for the no longer supported mackerel board.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> ---
>>
>> arch/arm/configs/mackerel_defconfig | 157 -----------------------------------
>> 1 file changed, 157 deletions(-)
>
> You forgot the reference to mackerel_defconfig in MAINTAINERS.
Oops, thanks for letting me know. Will fix and resend.
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:54 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the sh7372 implementation and the shared ZBOOT MMC
and SDHI support code from the compressed ARM boot loader.
With this in place it is no longer possible to boot any
self-contained kernel for sh7372 directly from Mask ROM
via SDHI and MMCIF hardware.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/Kconfig | 29 -
arch/arm/boot/compressed/Makefile | 15
arch/arm/boot/compressed/head-shmobile.S | 30 -
arch/arm/boot/compressed/mmcif-sh7372.c | 88 ----
arch/arm/boot/compressed/sdhi-sh7372.c | 95 ----
arch/arm/boot/compressed/sdhi-shmobile.c | 449 ---------------------
arch/arm/boot/compressed/sdhi-shmobile.h | 11
arch/arm/mach-shmobile/include/mach/mmc.h | 11
arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h | 21
arch/arm/mach-shmobile/include/mach/sdhi.h | 16
10 files changed, 765 deletions(-)
--- 0001/arch/arm/Kconfig
+++ work/arch/arm/Kconfig 2015-01-21 11:17:13.377573776 +0900
@@ -1840,35 +1840,6 @@ config ZBOOT_ROM
Say Y here if you intend to execute your compressed kernel image
(zImage) directly from ROM or flash. If unsure, say N.
-choice
- prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
- depends on ZBOOT_ROM && ARCH_SH7372
- default ZBOOT_ROM_NONE
- help
- Include experimental SD/MMC loading code in the ROM-able zImage.
- With this enabled it is possible to write the ROM-able zImage
- kernel image to an MMC or SD card and boot the kernel straight
- from the reset vector. At reset the processor Mask ROM will load
- the first part of the ROM-able zImage which in turn loads the
- rest the kernel image to RAM.
-
-config ZBOOT_ROM_NONE
- bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
- help
- Do not load image from SD or MMC
-
-config ZBOOT_ROM_MMCIF
- bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
- help
- Load image from MMCIF hardware block.
-
-config ZBOOT_ROM_SH_MOBILE_SDHI
- bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
- help
- Load image from SDHI hardware block
-
-endchoice
-
config ARM_APPENDED_DTB
bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
depends on OF
--- 0001/arch/arm/boot/compressed/Makefile
+++ work/arch/arm/boot/compressed/Makefile 2015-01-21 11:17:45.637573661 +0900
@@ -6,21 +6,6 @@
OBJS
-# Ensure that MMCIF loader code appears early in the image
-# to minimise that number of bocks that have to be read in
-# order to load it.
-ifeq ($(CONFIG_ZBOOT_ROM_MMCIF),y)
-OBJS += mmcif-sh7372.o
-endif
-
-# Ensure that SDHI loader code appears early in the image
-# to minimise that number of bocks that have to be read in
-# order to load it.
-ifeq ($(CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI),y)
-OBJS += sdhi-shmobile.o
-OBJS += sdhi-sh7372.o
-endif
-
AFLAGS_head.o += -DTEXT_OFFSET=$(TEXT_OFFSET)
HEAD = head.o
OBJS += misc.o decompress.o
--- 0001/arch/arm/boot/compressed/head-shmobile.S
+++ work/arch/arm/boot/compressed/head-shmobile.S 2015-01-21 11:17:36.307573694 +0900
@@ -25,36 +25,6 @@
/* load board-specific initialization code */
#include <mach/zboot.h>
-#if defined(CONFIG_ZBOOT_ROM_MMCIF) || defined(CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI)
- /* Load image from MMC/SD */
- adr sp, __tmp_stack + 256
- ldr r0, __image_start
- ldr r1, __image_end
- subs r1, r1, r0
- ldr r0, __load_base
- bl mmc_loader
-
- /* Jump to loaded code */
- ldr r0, __loaded
- ldr r1, __image_start
- sub r0, r0, r1
- ldr r1, __load_base
- add pc, r0, r1
-
-__image_start:
- .long _start
-__image_end:
- .long _got_end
-__load_base:
- .long MEMORY_START + 0x02000000 @ Load at 32Mb into SDRAM
-__loaded:
- .long __continue
- .align
-__tmp_stack:
- .space 256
-__continue:
-#endif /* CONFIG_ZBOOT_ROM_MMC || CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI */
-
adr r0, dtb_info
ldmia r0, {r1, r3, r4, r5, r7}
--- 0001/arch/arm/boot/compressed/mmcif-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,88 +0,0 @@
-/*
- * sh7372 MMCIF loader
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/mmc/sh_mmcif.h>
-#include <linux/mmc/boot.h>
-#include <mach/mmc.h>
-
-#define MMCIF_BASE (void __iomem *)0xe6bd0000
-
-#define PORT84CR (void __iomem *)0xe6050054
-#define PORT85CR (void __iomem *)0xe6050055
-#define PORT86CR (void __iomem *)0xe6050056
-#define PORT87CR (void __iomem *)0xe6050057
-#define PORT88CR (void __iomem *)0xe6050058
-#define PORT89CR (void __iomem *)0xe6050059
-#define PORT90CR (void __iomem *)0xe605005a
-#define PORT91CR (void __iomem *)0xe605005b
-#define PORT92CR (void __iomem *)0xe605005c
-#define PORT99CR (void __iomem *)0xe6050063
-
-#define SMSTPCR3 (void __iomem *)0xe615013c
-
-/* SH7372 specific MMCIF loader
- *
- * loads the zImage from an MMC card starting from block 1.
- *
- * The image must be start with a vrl4 header and
- * the zImage must start at offset 512 of the image. That is,
- * at block 2 (=byte 1024) on the media
- *
- * Use the following line to write the vrl4 formated zImage
- * to an MMC card
- * # dd if=vrl4.out of=/dev/sdx bsQ2 seek=1
- */
-asmlinkage void mmc_loader(unsigned char *buf, unsigned long len)
-{
- mmc_init_progress();
- mmc_update_progress(MMC_PROGRESS_ENTER);
-
- /* Initialise MMC
- * registers: PORT84CR-PORT92CR
- * (MMCD0_0-MMCD0_7,MMCCMD0 Control)
- * value: 0x04 - select function 4
- */
- __raw_writeb(0x04, PORT84CR);
- __raw_writeb(0x04, PORT85CR);
- __raw_writeb(0x04, PORT86CR);
- __raw_writeb(0x04, PORT87CR);
- __raw_writeb(0x04, PORT88CR);
- __raw_writeb(0x04, PORT89CR);
- __raw_writeb(0x04, PORT90CR);
- __raw_writeb(0x04, PORT91CR);
- __raw_writeb(0x04, PORT92CR);
-
- /* Initialise MMC
- * registers: PORT99CR (MMCCLK0 Control)
- * value: 0x10 | 0x04 - enable output | select function 4
- */
- __raw_writeb(0x14, PORT99CR);
-
- /* Enable clock to MMC hardware block */
- __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3);
-
- mmc_update_progress(MMC_PROGRESS_INIT);
-
- /* setup MMCIF hardware */
- sh_mmcif_boot_init(MMCIF_BASE);
-
- mmc_update_progress(MMC_PROGRESS_LOAD);
-
- /* load kernel via MMCIF interface */
- sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */
- (len + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS, buf);
-
-
- /* Disable clock to MMC hardware block */
- __raw_writel(__raw_readl(SMSTPCR3) | (1 << 12), SMSTPCR3);
-
- mmc_update_progress(MMC_PROGRESS_DONE);
-}
--- 0001/arch/arm/boot/compressed/sdhi-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,95 +0,0 @@
-/*
- * SuperH Mobile SDHI
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Kuninori Morimoto
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Parts inspired by u-boot
- */
-
-#include <linux/io.h>
-#include <mach/mmc.h>
-#include <linux/mmc/boot.h>
-#include <linux/mmc/tmio.h>
-
-#include "sdhi-shmobile.h"
-
-#define PORT179CR 0xe60520b3
-#define PORT180CR 0xe60520b4
-#define PORT181CR 0xe60520b5
-#define PORT182CR 0xe60520b6
-#define PORT183CR 0xe60520b7
-#define PORT184CR 0xe60520b8
-
-#define SMSTPCR3 0xe615013c
-
-#define CR_INPUT_ENABLE 0x10
-#define CR_FUNCTION1 0x01
-
-#define SDHI1_BASE (void __iomem *)0xe6860000
-#define SDHI_BASE SDHI1_BASE
-
-/* SuperH Mobile SDHI loader
- *
- * loads the zImage from an SD card starting from block 0
- * on physical partition 1
- *
- * The image must be start with a vrl4 header and
- * the zImage must start at offset 512 of the image. That is,
- * at block 1 (=byte 512) of physical partition 1
- *
- * Use the following line to write the vrl4 formated zImage
- * to an SD card
- * # dd if=vrl4.out of=/dev/sdx bsQ2
- */
-asmlinkage void mmc_loader(unsigned short *buf, unsigned long len)
-{
- int high_capacity;
-
- mmc_init_progress();
-
- mmc_update_progress(MMC_PROGRESS_ENTER);
- /* Initialise SDHI1 */
- /* PORT184CR: GPIO_FN_SDHICMD1 Control */
- __raw_writeb(CR_FUNCTION1, PORT184CR);
- /* PORT179CR: GPIO_FN_SDHICLK1 Control */
- __raw_writeb(CR_INPUT_ENABLE|CR_FUNCTION1, PORT179CR);
- /* PORT181CR: GPIO_FN_SDHID1_3 Control */
- __raw_writeb(CR_FUNCTION1, PORT183CR);
- /* PORT182CR: GPIO_FN_SDHID1_2 Control */
- __raw_writeb(CR_FUNCTION1, PORT182CR);
- /* PORT183CR: GPIO_FN_SDHID1_1 Control */
- __raw_writeb(CR_FUNCTION1, PORT181CR);
- /* PORT180CR: GPIO_FN_SDHID1_0 Control */
- __raw_writeb(CR_FUNCTION1, PORT180CR);
-
- /* Enable clock to SDHI1 hardware block */
- __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 13), SMSTPCR3);
-
- /* setup SDHI hardware */
- mmc_update_progress(MMC_PROGRESS_INIT);
- high_capacity = sdhi_boot_init(SDHI_BASE);
- if (high_capacity < 0)
- goto err;
-
- mmc_update_progress(MMC_PROGRESS_LOAD);
- /* load kernel */
- if (sdhi_boot_do_read(SDHI_BASE, high_capacity,
- 0, /* Kernel is at block 1 */
- (len + TMIO_BBS - 1) / TMIO_BBS, buf))
- goto err;
-
- /* Disable clock to SDHI1 hardware block */
- __raw_writel(__raw_readl(SMSTPCR3) | (1 << 13), SMSTPCR3);
-
- mmc_update_progress(MMC_PROGRESS_DONE);
-
- return;
-err:
- for(;;);
-}
--- 0001/arch/arm/boot/compressed/sdhi-shmobile.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,449 +0,0 @@
-/*
- * SuperH Mobile SDHI
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Kuninori Morimoto
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Parts inspired by u-boot
- */
-
-#include <linux/io.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/core.h>
-#include <linux/mmc/mmc.h>
-#include <linux/mmc/sd.h>
-#include <linux/mmc/tmio.h>
-#include <mach/sdhi.h>
-
-#define OCR_FASTBOOT (1<<29)
-#define OCR_HCS (1<<30)
-#define OCR_BUSY (1<<31)
-
-#define RESP_CMD12 0x00000030
-
-static inline u16 sd_ctrl_read16(void __iomem *base, int addr)
-{
- return __raw_readw(base + addr);
-}
-
-static inline u32 sd_ctrl_read32(void __iomem *base, int addr)
-{
- return __raw_readw(base + addr) |
- __raw_readw(base + addr + 2) << 16;
-}
-
-static inline void sd_ctrl_write16(void __iomem *base, int addr, u16 val)
-{
- __raw_writew(val, base + addr);
-}
-
-static inline void sd_ctrl_write32(void __iomem *base, int addr, u32 val)
-{
- __raw_writew(val, base + addr);
- __raw_writew(val >> 16, base + addr + 2);
-}
-
-#define ALL_ERROR (TMIO_STAT_CMD_IDX_ERR | TMIO_STAT_CRCFAIL | \
- TMIO_STAT_STOPBIT_ERR | TMIO_STAT_DATATIMEOUT | \
- TMIO_STAT_RXOVERFLOW | TMIO_STAT_TXUNDERRUN | \
- TMIO_STAT_CMDTIMEOUT | TMIO_STAT_ILL_ACCESS | \
- TMIO_STAT_ILL_FUNC)
-
-static int sdhi_intr(void __iomem *base)
-{
- unsigned long state = sd_ctrl_read32(base, CTL_STATUS);
-
- if (state & ALL_ERROR) {
- sd_ctrl_write32(base, CTL_STATUS, ~ALL_ERROR);
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- ALL_ERROR |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- return -EINVAL;
- }
- if (state & TMIO_STAT_CMDRESPEND) {
- sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_CMDRESPEND);
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- TMIO_STAT_CMDRESPEND |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- return 0;
- }
- if (state & TMIO_STAT_RXRDY) {
- sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_RXRDY);
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- TMIO_STAT_RXRDY | TMIO_STAT_TXUNDERRUN |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- return 0;
- }
- if (state & TMIO_STAT_DATAEND) {
- sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_DATAEND);
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- TMIO_STAT_DATAEND |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- return 0;
- }
-
- return -EAGAIN;
-}
-
-static int sdhi_boot_wait_resp_end(void __iomem *base)
-{
- int err = -EAGAIN, timeout = 10000000;
-
- while (timeout--) {
- err = sdhi_intr(base);
- if (err != -EAGAIN)
- break;
- udelay(1);
- }
-
- return err;
-}
-
-/* SDHI_CLK_CTRL */
-#define CLK_MMC_ENABLE (1 << 8)
-#define CLK_MMC_INIT (1 << 6) /* clk / 256 */
-
-static void sdhi_boot_mmc_clk_stop(void __iomem *base)
-{
- sd_ctrl_write16(base, CTL_CLK_AND_WAIT_CTL, 0x0000);
- msleep(10);
- sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL, ~CLK_MMC_ENABLE &
- sd_ctrl_read16(base, CTL_SD_CARD_CLK_CTL));
- msleep(10);
-}
-
-static void sdhi_boot_mmc_clk_start(void __iomem *base)
-{
- sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL, CLK_MMC_ENABLE |
- sd_ctrl_read16(base, CTL_SD_CARD_CLK_CTL));
- msleep(10);
- sd_ctrl_write16(base, CTL_CLK_AND_WAIT_CTL, CLK_MMC_ENABLE);
- msleep(10);
-}
-
-static void sdhi_boot_reset(void __iomem *base)
-{
- sd_ctrl_write16(base, CTL_RESET_SD, 0x0000);
- msleep(10);
- sd_ctrl_write16(base, CTL_RESET_SD, 0x0001);
- msleep(10);
-}
-
-/* Set MMC clock / power.
- * Note: This controller uses a simple divider scheme therefore it cannot
- * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
- * MMC wont run that fast, it has to be clocked at 12MHz which is the next
- * slowest setting.
- */
-static int sdhi_boot_mmc_set_ios(void __iomem *base, struct mmc_ios *ios)
-{
- if (sd_ctrl_read32(base, CTL_STATUS) & TMIO_STAT_CMD_BUSY)
- return -EBUSY;
-
- if (ios->clock)
- sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL,
- ios->clock | CLK_MMC_ENABLE);
-
- /* Power sequence - OFF -> ON -> UP */
- switch (ios->power_mode) {
- case MMC_POWER_OFF: /* power down SD bus */
- sdhi_boot_mmc_clk_stop(base);
- break;
- case MMC_POWER_ON: /* power up SD bus */
- break;
- case MMC_POWER_UP: /* start bus clock */
- sdhi_boot_mmc_clk_start(base);
- break;
- }
-
- switch (ios->bus_width) {
- case MMC_BUS_WIDTH_1:
- sd_ctrl_write16(base, CTL_SD_MEM_CARD_OPT, 0x80e0);
- break;
- case MMC_BUS_WIDTH_4:
- sd_ctrl_write16(base, CTL_SD_MEM_CARD_OPT, 0x00e0);
- break;
- }
-
- /* Let things settle. delay taken from winCE driver */
- udelay(140);
-
- return 0;
-}
-
-/* These are the bitmasks the tmio chip requires to implement the MMC response
- * types. Note that R1 and R6 are the same in this scheme. */
-#define RESP_NONE 0x0300
-#define RESP_R1 0x0400
-#define RESP_R1B 0x0500
-#define RESP_R2 0x0600
-#define RESP_R3 0x0700
-#define DATA_PRESENT 0x0800
-#define TRANSFER_READ 0x1000
-
-static int sdhi_boot_request(void __iomem *base, struct mmc_command *cmd)
-{
- int err, c = cmd->opcode;
-
- switch (mmc_resp_type(cmd)) {
- case MMC_RSP_NONE: c |= RESP_NONE; break;
- case MMC_RSP_R1: c |= RESP_R1; break;
- case MMC_RSP_R1B: c |= RESP_R1B; break;
- case MMC_RSP_R2: c |= RESP_R2; break;
- case MMC_RSP_R3: c |= RESP_R3; break;
- default:
- return -EINVAL;
- }
-
- /* No interrupts so this may not be cleared */
- sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_CMDRESPEND);
-
- sd_ctrl_write32(base, CTL_IRQ_MASK, TMIO_STAT_CMDRESPEND |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- sd_ctrl_write32(base, CTL_ARG_REG, cmd->arg);
- sd_ctrl_write16(base, CTL_SD_CMD, c);
-
-
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- ~(TMIO_STAT_CMDRESPEND | ALL_ERROR) &
- sd_ctrl_read32(base, CTL_IRQ_MASK));
-
- err = sdhi_boot_wait_resp_end(base);
- if (err)
- return err;
-
- cmd->resp[0] = sd_ctrl_read32(base, CTL_RESPONSE);
-
- return 0;
-}
-
-static int sdhi_boot_do_read_single(void __iomem *base, int high_capacity,
- unsigned long block, unsigned short *buf)
-{
- int err, i;
-
- /* CMD17 - Read */
- {
- struct mmc_command cmd;
-
- cmd.opcode = MMC_READ_SINGLE_BLOCK | \
- TRANSFER_READ | DATA_PRESENT;
- if (high_capacity)
- cmd.arg = block;
- else
- cmd.arg = block * TMIO_BBS;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- ~(TMIO_STAT_DATAEND | TMIO_STAT_RXRDY |
- TMIO_STAT_TXUNDERRUN) &
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- err = sdhi_boot_wait_resp_end(base);
- if (err)
- return err;
-
- sd_ctrl_write16(base, CTL_SD_XFER_LEN, TMIO_BBS);
- for (i = 0; i < TMIO_BBS / sizeof(*buf); i++)
- *buf++ = sd_ctrl_read16(base, RESP_CMD12);
-
- err = sdhi_boot_wait_resp_end(base);
- if (err)
- return err;
-
- return 0;
-}
-
-int sdhi_boot_do_read(void __iomem *base, int high_capacity,
- unsigned long offset, unsigned short count,
- unsigned short *buf)
-{
- unsigned long i;
- int err = 0;
-
- for (i = 0; i < count; i++) {
- err = sdhi_boot_do_read_single(base, high_capacity, offset + i,
- buf + (i * TMIO_BBS /
- sizeof(*buf)));
- if (err)
- return err;
- }
-
- return 0;
-}
-
-#define VOLTAGES (MMC_VDD_32_33 | MMC_VDD_33_34)
-
-int sdhi_boot_init(void __iomem *base)
-{
- bool sd_v2 = false, sd_v1_0 = false;
- unsigned short cid;
- int err, high_capacity = 0;
-
- sdhi_boot_mmc_clk_stop(base);
- sdhi_boot_reset(base);
-
- /* mmc0: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 21 width 0 timing 0 */
- {
- struct mmc_ios ios;
- ios.power_mode = MMC_POWER_ON;
- ios.bus_width = MMC_BUS_WIDTH_1;
- ios.clock = CLK_MMC_INIT;
- err = sdhi_boot_mmc_set_ios(base, &ios);
- if (err)
- return err;
- }
-
- /* CMD0 */
- {
- struct mmc_command cmd;
- msleep(1);
- cmd.opcode = MMC_GO_IDLE_STATE;
- cmd.arg = 0;
- cmd.flags = MMC_RSP_NONE;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- msleep(2);
- }
-
- /* CMD8 - Test for SD version 2 */
- {
- struct mmc_command cmd;
- cmd.opcode = SD_SEND_IF_COND;
- cmd.arg = (VOLTAGES != 0) << 8 | 0xaa;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd); /* Ignore error */
- if ((cmd.resp[0] & 0xff) = 0xaa)
- sd_v2 = true;
- }
-
- /* CMD55 - Get OCR (SD) */
- {
- int timeout = 1000;
- struct mmc_command cmd;
-
- cmd.arg = 0;
-
- do {
- cmd.opcode = MMC_APP_CMD;
- cmd.flags = MMC_RSP_R1;
- cmd.arg = 0;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- break;
-
- cmd.opcode = SD_APP_OP_COND;
- cmd.flags = MMC_RSP_R3;
- cmd.arg = (VOLTAGES & 0xff8000);
- if (sd_v2)
- cmd.arg |= OCR_HCS;
- cmd.arg |= OCR_FASTBOOT;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- break;
-
- msleep(1);
- } while((!(cmd.resp[0] & OCR_BUSY)) && --timeout);
-
- if (!err && timeout) {
- if (!sd_v2)
- sd_v1_0 = true;
- high_capacity = (cmd.resp[0] & OCR_HCS) = OCR_HCS;
- }
- }
-
- /* CMD1 - Get OCR (MMC) */
- if (!sd_v2 && !sd_v1_0) {
- int timeout = 1000;
- struct mmc_command cmd;
-
- do {
- cmd.opcode = MMC_SEND_OP_COND;
- cmd.arg = VOLTAGES | OCR_HCS;
- cmd.flags = MMC_RSP_R3;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
-
- msleep(1);
- } while((!(cmd.resp[0] & OCR_BUSY)) && --timeout);
-
- if (!timeout)
- return -EAGAIN;
-
- high_capacity = (cmd.resp[0] & OCR_HCS) = OCR_HCS;
- }
-
- /* CMD2 - Get CID */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_ALL_SEND_CID;
- cmd.arg = 0;
- cmd.flags = MMC_RSP_R2;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- /* CMD3
- * MMC: Set the relative address
- * SD: Get the relative address
- * Also puts the card into the standby state
- */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_SET_RELATIVE_ADDR;
- cmd.arg = 0;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- cid = cmd.resp[0] >> 16;
- }
-
- /* CMD9 - Get CSD */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_SEND_CSD;
- cmd.arg = cid << 16;
- cmd.flags = MMC_RSP_R2;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- /* CMD7 - Select the card */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_SELECT_CARD;
- //cmd.arg = rca << 16;
- cmd.arg = cid << 16;
- //cmd.flags = MMC_RSP_R1B;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- /* CMD16 - Set the block size */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_SET_BLOCKLEN;
- cmd.arg = TMIO_BBS;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- return high_capacity;
-}
--- 0001/arch/arm/boot/compressed/sdhi-shmobile.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,11 +0,0 @@
-#ifndef SDHI_MOBILE_H
-#define SDHI_MOBILE_H
-
-#include <linux/compiler.h>
-
-int sdhi_boot_do_read(void __iomem *base, int high_capacity,
- unsigned long offset, unsigned short count,
- unsigned short *buf);
-int sdhi_boot_init(void __iomem *base);
-
-#endif
--- 0002/arch/arm/mach-shmobile/include/mach/mmc.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,11 +0,0 @@
-#ifndef MMC_H
-#define MMC_H
-
-/**************************************************
- *
- * board specific settings
- *
- **************************************************/
-
-#error "unsupported board."
-#endif /* MMC_H */
--- 0001/arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,21 +0,0 @@
-#ifndef SDHI_SH7372_H
-#define SDHI_SH7372_H
-
-#define SDGENCNTA 0xfe40009c
-
-/* The countdown of SDGENCNTA is controlled by
- * ZB3D2CLK which runs at 149.5MHz.
- * That is 149.5ticks/us. Approximate this as 150ticks/us.
- */
-static void udelay(int us)
-{
- __raw_writel(us * 150, SDGENCNTA);
- while(__raw_readl(SDGENCNTA)) ;
-}
-
-static void msleep(int ms)
-{
- udelay(ms * 1000);
-}
-
-#endif
--- 0001/arch/arm/mach-shmobile/include/mach/sdhi.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,16 +0,0 @@
-#ifndef SDHI_H
-#define SDHI_H
-
-/**************************************************
- *
- * CPU specific settings
- *
- **************************************************/
-
-#ifdef CONFIG_ARCH_SH7372
-#include "mach/sdhi-sh7372.h"
-#else
-#error "unsupported CPU."
-#endif
-
-#endif /* SDHI_H */
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
@ 2015-01-21 4:54 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the sh7372 implementation and the shared ZBOOT MMC
and SDHI support code from the compressed ARM boot loader.
With this in place it is no longer possible to boot any
self-contained kernel for sh7372 directly from Mask ROM
via SDHI and MMCIF hardware.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/Kconfig | 29 -
arch/arm/boot/compressed/Makefile | 15
arch/arm/boot/compressed/head-shmobile.S | 30 -
arch/arm/boot/compressed/mmcif-sh7372.c | 88 ----
arch/arm/boot/compressed/sdhi-sh7372.c | 95 ----
arch/arm/boot/compressed/sdhi-shmobile.c | 449 ---------------------
arch/arm/boot/compressed/sdhi-shmobile.h | 11
arch/arm/mach-shmobile/include/mach/mmc.h | 11
arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h | 21
arch/arm/mach-shmobile/include/mach/sdhi.h | 16
10 files changed, 765 deletions(-)
--- 0001/arch/arm/Kconfig
+++ work/arch/arm/Kconfig 2015-01-21 11:17:13.377573776 +0900
@@ -1840,35 +1840,6 @@ config ZBOOT_ROM
Say Y here if you intend to execute your compressed kernel image
(zImage) directly from ROM or flash. If unsure, say N.
-choice
- prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
- depends on ZBOOT_ROM && ARCH_SH7372
- default ZBOOT_ROM_NONE
- help
- Include experimental SD/MMC loading code in the ROM-able zImage.
- With this enabled it is possible to write the ROM-able zImage
- kernel image to an MMC or SD card and boot the kernel straight
- from the reset vector. At reset the processor Mask ROM will load
- the first part of the ROM-able zImage which in turn loads the
- rest the kernel image to RAM.
-
-config ZBOOT_ROM_NONE
- bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
- help
- Do not load image from SD or MMC
-
-config ZBOOT_ROM_MMCIF
- bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
- help
- Load image from MMCIF hardware block.
-
-config ZBOOT_ROM_SH_MOBILE_SDHI
- bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
- help
- Load image from SDHI hardware block
-
-endchoice
-
config ARM_APPENDED_DTB
bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
depends on OF
--- 0001/arch/arm/boot/compressed/Makefile
+++ work/arch/arm/boot/compressed/Makefile 2015-01-21 11:17:45.637573661 +0900
@@ -6,21 +6,6 @@
OBJS =
-# Ensure that MMCIF loader code appears early in the image
-# to minimise that number of bocks that have to be read in
-# order to load it.
-ifeq ($(CONFIG_ZBOOT_ROM_MMCIF),y)
-OBJS += mmcif-sh7372.o
-endif
-
-# Ensure that SDHI loader code appears early in the image
-# to minimise that number of bocks that have to be read in
-# order to load it.
-ifeq ($(CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI),y)
-OBJS += sdhi-shmobile.o
-OBJS += sdhi-sh7372.o
-endif
-
AFLAGS_head.o += -DTEXT_OFFSET=$(TEXT_OFFSET)
HEAD = head.o
OBJS += misc.o decompress.o
--- 0001/arch/arm/boot/compressed/head-shmobile.S
+++ work/arch/arm/boot/compressed/head-shmobile.S 2015-01-21 11:17:36.307573694 +0900
@@ -25,36 +25,6 @@
/* load board-specific initialization code */
#include <mach/zboot.h>
-#if defined(CONFIG_ZBOOT_ROM_MMCIF) || defined(CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI)
- /* Load image from MMC/SD */
- adr sp, __tmp_stack + 256
- ldr r0, __image_start
- ldr r1, __image_end
- subs r1, r1, r0
- ldr r0, __load_base
- bl mmc_loader
-
- /* Jump to loaded code */
- ldr r0, __loaded
- ldr r1, __image_start
- sub r0, r0, r1
- ldr r1, __load_base
- add pc, r0, r1
-
-__image_start:
- .long _start
-__image_end:
- .long _got_end
-__load_base:
- .long MEMORY_START + 0x02000000 @ Load at 32Mb into SDRAM
-__loaded:
- .long __continue
- .align
-__tmp_stack:
- .space 256
-__continue:
-#endif /* CONFIG_ZBOOT_ROM_MMC || CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI */
-
adr r0, dtb_info
ldmia r0, {r1, r3, r4, r5, r7}
--- 0001/arch/arm/boot/compressed/mmcif-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,88 +0,0 @@
-/*
- * sh7372 MMCIF loader
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/mmc/sh_mmcif.h>
-#include <linux/mmc/boot.h>
-#include <mach/mmc.h>
-
-#define MMCIF_BASE (void __iomem *)0xe6bd0000
-
-#define PORT84CR (void __iomem *)0xe6050054
-#define PORT85CR (void __iomem *)0xe6050055
-#define PORT86CR (void __iomem *)0xe6050056
-#define PORT87CR (void __iomem *)0xe6050057
-#define PORT88CR (void __iomem *)0xe6050058
-#define PORT89CR (void __iomem *)0xe6050059
-#define PORT90CR (void __iomem *)0xe605005a
-#define PORT91CR (void __iomem *)0xe605005b
-#define PORT92CR (void __iomem *)0xe605005c
-#define PORT99CR (void __iomem *)0xe6050063
-
-#define SMSTPCR3 (void __iomem *)0xe615013c
-
-/* SH7372 specific MMCIF loader
- *
- * loads the zImage from an MMC card starting from block 1.
- *
- * The image must be start with a vrl4 header and
- * the zImage must start at offset 512 of the image. That is,
- * at block 2 (=byte 1024) on the media
- *
- * Use the following line to write the vrl4 formated zImage
- * to an MMC card
- * # dd if=vrl4.out of=/dev/sdx bs=512 seek=1
- */
-asmlinkage void mmc_loader(unsigned char *buf, unsigned long len)
-{
- mmc_init_progress();
- mmc_update_progress(MMC_PROGRESS_ENTER);
-
- /* Initialise MMC
- * registers: PORT84CR-PORT92CR
- * (MMCD0_0-MMCD0_7,MMCCMD0 Control)
- * value: 0x04 - select function 4
- */
- __raw_writeb(0x04, PORT84CR);
- __raw_writeb(0x04, PORT85CR);
- __raw_writeb(0x04, PORT86CR);
- __raw_writeb(0x04, PORT87CR);
- __raw_writeb(0x04, PORT88CR);
- __raw_writeb(0x04, PORT89CR);
- __raw_writeb(0x04, PORT90CR);
- __raw_writeb(0x04, PORT91CR);
- __raw_writeb(0x04, PORT92CR);
-
- /* Initialise MMC
- * registers: PORT99CR (MMCCLK0 Control)
- * value: 0x10 | 0x04 - enable output | select function 4
- */
- __raw_writeb(0x14, PORT99CR);
-
- /* Enable clock to MMC hardware block */
- __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3);
-
- mmc_update_progress(MMC_PROGRESS_INIT);
-
- /* setup MMCIF hardware */
- sh_mmcif_boot_init(MMCIF_BASE);
-
- mmc_update_progress(MMC_PROGRESS_LOAD);
-
- /* load kernel via MMCIF interface */
- sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is@block 2 */
- (len + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS, buf);
-
-
- /* Disable clock to MMC hardware block */
- __raw_writel(__raw_readl(SMSTPCR3) | (1 << 12), SMSTPCR3);
-
- mmc_update_progress(MMC_PROGRESS_DONE);
-}
--- 0001/arch/arm/boot/compressed/sdhi-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,95 +0,0 @@
-/*
- * SuperH Mobile SDHI
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Kuninori Morimoto
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Parts inspired by u-boot
- */
-
-#include <linux/io.h>
-#include <mach/mmc.h>
-#include <linux/mmc/boot.h>
-#include <linux/mmc/tmio.h>
-
-#include "sdhi-shmobile.h"
-
-#define PORT179CR 0xe60520b3
-#define PORT180CR 0xe60520b4
-#define PORT181CR 0xe60520b5
-#define PORT182CR 0xe60520b6
-#define PORT183CR 0xe60520b7
-#define PORT184CR 0xe60520b8
-
-#define SMSTPCR3 0xe615013c
-
-#define CR_INPUT_ENABLE 0x10
-#define CR_FUNCTION1 0x01
-
-#define SDHI1_BASE (void __iomem *)0xe6860000
-#define SDHI_BASE SDHI1_BASE
-
-/* SuperH Mobile SDHI loader
- *
- * loads the zImage from an SD card starting from block 0
- * on physical partition 1
- *
- * The image must be start with a vrl4 header and
- * the zImage must start at offset 512 of the image. That is,
- * at block 1 (=byte 512) of physical partition 1
- *
- * Use the following line to write the vrl4 formated zImage
- * to an SD card
- * # dd if=vrl4.out of=/dev/sdx bs=512
- */
-asmlinkage void mmc_loader(unsigned short *buf, unsigned long len)
-{
- int high_capacity;
-
- mmc_init_progress();
-
- mmc_update_progress(MMC_PROGRESS_ENTER);
- /* Initialise SDHI1 */
- /* PORT184CR: GPIO_FN_SDHICMD1 Control */
- __raw_writeb(CR_FUNCTION1, PORT184CR);
- /* PORT179CR: GPIO_FN_SDHICLK1 Control */
- __raw_writeb(CR_INPUT_ENABLE|CR_FUNCTION1, PORT179CR);
- /* PORT181CR: GPIO_FN_SDHID1_3 Control */
- __raw_writeb(CR_FUNCTION1, PORT183CR);
- /* PORT182CR: GPIO_FN_SDHID1_2 Control */
- __raw_writeb(CR_FUNCTION1, PORT182CR);
- /* PORT183CR: GPIO_FN_SDHID1_1 Control */
- __raw_writeb(CR_FUNCTION1, PORT181CR);
- /* PORT180CR: GPIO_FN_SDHID1_0 Control */
- __raw_writeb(CR_FUNCTION1, PORT180CR);
-
- /* Enable clock to SDHI1 hardware block */
- __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 13), SMSTPCR3);
-
- /* setup SDHI hardware */
- mmc_update_progress(MMC_PROGRESS_INIT);
- high_capacity = sdhi_boot_init(SDHI_BASE);
- if (high_capacity < 0)
- goto err;
-
- mmc_update_progress(MMC_PROGRESS_LOAD);
- /* load kernel */
- if (sdhi_boot_do_read(SDHI_BASE, high_capacity,
- 0, /* Kernel is@block 1 */
- (len + TMIO_BBS - 1) / TMIO_BBS, buf))
- goto err;
-
- /* Disable clock to SDHI1 hardware block */
- __raw_writel(__raw_readl(SMSTPCR3) | (1 << 13), SMSTPCR3);
-
- mmc_update_progress(MMC_PROGRESS_DONE);
-
- return;
-err:
- for(;;);
-}
--- 0001/arch/arm/boot/compressed/sdhi-shmobile.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,449 +0,0 @@
-/*
- * SuperH Mobile SDHI
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Kuninori Morimoto
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Parts inspired by u-boot
- */
-
-#include <linux/io.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/core.h>
-#include <linux/mmc/mmc.h>
-#include <linux/mmc/sd.h>
-#include <linux/mmc/tmio.h>
-#include <mach/sdhi.h>
-
-#define OCR_FASTBOOT (1<<29)
-#define OCR_HCS (1<<30)
-#define OCR_BUSY (1<<31)
-
-#define RESP_CMD12 0x00000030
-
-static inline u16 sd_ctrl_read16(void __iomem *base, int addr)
-{
- return __raw_readw(base + addr);
-}
-
-static inline u32 sd_ctrl_read32(void __iomem *base, int addr)
-{
- return __raw_readw(base + addr) |
- __raw_readw(base + addr + 2) << 16;
-}
-
-static inline void sd_ctrl_write16(void __iomem *base, int addr, u16 val)
-{
- __raw_writew(val, base + addr);
-}
-
-static inline void sd_ctrl_write32(void __iomem *base, int addr, u32 val)
-{
- __raw_writew(val, base + addr);
- __raw_writew(val >> 16, base + addr + 2);
-}
-
-#define ALL_ERROR (TMIO_STAT_CMD_IDX_ERR | TMIO_STAT_CRCFAIL | \
- TMIO_STAT_STOPBIT_ERR | TMIO_STAT_DATATIMEOUT | \
- TMIO_STAT_RXOVERFLOW | TMIO_STAT_TXUNDERRUN | \
- TMIO_STAT_CMDTIMEOUT | TMIO_STAT_ILL_ACCESS | \
- TMIO_STAT_ILL_FUNC)
-
-static int sdhi_intr(void __iomem *base)
-{
- unsigned long state = sd_ctrl_read32(base, CTL_STATUS);
-
- if (state & ALL_ERROR) {
- sd_ctrl_write32(base, CTL_STATUS, ~ALL_ERROR);
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- ALL_ERROR |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- return -EINVAL;
- }
- if (state & TMIO_STAT_CMDRESPEND) {
- sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_CMDRESPEND);
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- TMIO_STAT_CMDRESPEND |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- return 0;
- }
- if (state & TMIO_STAT_RXRDY) {
- sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_RXRDY);
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- TMIO_STAT_RXRDY | TMIO_STAT_TXUNDERRUN |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- return 0;
- }
- if (state & TMIO_STAT_DATAEND) {
- sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_DATAEND);
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- TMIO_STAT_DATAEND |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- return 0;
- }
-
- return -EAGAIN;
-}
-
-static int sdhi_boot_wait_resp_end(void __iomem *base)
-{
- int err = -EAGAIN, timeout = 10000000;
-
- while (timeout--) {
- err = sdhi_intr(base);
- if (err != -EAGAIN)
- break;
- udelay(1);
- }
-
- return err;
-}
-
-/* SDHI_CLK_CTRL */
-#define CLK_MMC_ENABLE (1 << 8)
-#define CLK_MMC_INIT (1 << 6) /* clk / 256 */
-
-static void sdhi_boot_mmc_clk_stop(void __iomem *base)
-{
- sd_ctrl_write16(base, CTL_CLK_AND_WAIT_CTL, 0x0000);
- msleep(10);
- sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL, ~CLK_MMC_ENABLE &
- sd_ctrl_read16(base, CTL_SD_CARD_CLK_CTL));
- msleep(10);
-}
-
-static void sdhi_boot_mmc_clk_start(void __iomem *base)
-{
- sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL, CLK_MMC_ENABLE |
- sd_ctrl_read16(base, CTL_SD_CARD_CLK_CTL));
- msleep(10);
- sd_ctrl_write16(base, CTL_CLK_AND_WAIT_CTL, CLK_MMC_ENABLE);
- msleep(10);
-}
-
-static void sdhi_boot_reset(void __iomem *base)
-{
- sd_ctrl_write16(base, CTL_RESET_SD, 0x0000);
- msleep(10);
- sd_ctrl_write16(base, CTL_RESET_SD, 0x0001);
- msleep(10);
-}
-
-/* Set MMC clock / power.
- * Note: This controller uses a simple divider scheme therefore it cannot
- * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
- * MMC wont run that fast, it has to be clocked@12MHz which is the next
- * slowest setting.
- */
-static int sdhi_boot_mmc_set_ios(void __iomem *base, struct mmc_ios *ios)
-{
- if (sd_ctrl_read32(base, CTL_STATUS) & TMIO_STAT_CMD_BUSY)
- return -EBUSY;
-
- if (ios->clock)
- sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL,
- ios->clock | CLK_MMC_ENABLE);
-
- /* Power sequence - OFF -> ON -> UP */
- switch (ios->power_mode) {
- case MMC_POWER_OFF: /* power down SD bus */
- sdhi_boot_mmc_clk_stop(base);
- break;
- case MMC_POWER_ON: /* power up SD bus */
- break;
- case MMC_POWER_UP: /* start bus clock */
- sdhi_boot_mmc_clk_start(base);
- break;
- }
-
- switch (ios->bus_width) {
- case MMC_BUS_WIDTH_1:
- sd_ctrl_write16(base, CTL_SD_MEM_CARD_OPT, 0x80e0);
- break;
- case MMC_BUS_WIDTH_4:
- sd_ctrl_write16(base, CTL_SD_MEM_CARD_OPT, 0x00e0);
- break;
- }
-
- /* Let things settle. delay taken from winCE driver */
- udelay(140);
-
- return 0;
-}
-
-/* These are the bitmasks the tmio chip requires to implement the MMC response
- * types. Note that R1 and R6 are the same in this scheme. */
-#define RESP_NONE 0x0300
-#define RESP_R1 0x0400
-#define RESP_R1B 0x0500
-#define RESP_R2 0x0600
-#define RESP_R3 0x0700
-#define DATA_PRESENT 0x0800
-#define TRANSFER_READ 0x1000
-
-static int sdhi_boot_request(void __iomem *base, struct mmc_command *cmd)
-{
- int err, c = cmd->opcode;
-
- switch (mmc_resp_type(cmd)) {
- case MMC_RSP_NONE: c |= RESP_NONE; break;
- case MMC_RSP_R1: c |= RESP_R1; break;
- case MMC_RSP_R1B: c |= RESP_R1B; break;
- case MMC_RSP_R2: c |= RESP_R2; break;
- case MMC_RSP_R3: c |= RESP_R3; break;
- default:
- return -EINVAL;
- }
-
- /* No interrupts so this may not be cleared */
- sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_CMDRESPEND);
-
- sd_ctrl_write32(base, CTL_IRQ_MASK, TMIO_STAT_CMDRESPEND |
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- sd_ctrl_write32(base, CTL_ARG_REG, cmd->arg);
- sd_ctrl_write16(base, CTL_SD_CMD, c);
-
-
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- ~(TMIO_STAT_CMDRESPEND | ALL_ERROR) &
- sd_ctrl_read32(base, CTL_IRQ_MASK));
-
- err = sdhi_boot_wait_resp_end(base);
- if (err)
- return err;
-
- cmd->resp[0] = sd_ctrl_read32(base, CTL_RESPONSE);
-
- return 0;
-}
-
-static int sdhi_boot_do_read_single(void __iomem *base, int high_capacity,
- unsigned long block, unsigned short *buf)
-{
- int err, i;
-
- /* CMD17 - Read */
- {
- struct mmc_command cmd;
-
- cmd.opcode = MMC_READ_SINGLE_BLOCK | \
- TRANSFER_READ | DATA_PRESENT;
- if (high_capacity)
- cmd.arg = block;
- else
- cmd.arg = block * TMIO_BBS;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- sd_ctrl_write32(base, CTL_IRQ_MASK,
- ~(TMIO_STAT_DATAEND | TMIO_STAT_RXRDY |
- TMIO_STAT_TXUNDERRUN) &
- sd_ctrl_read32(base, CTL_IRQ_MASK));
- err = sdhi_boot_wait_resp_end(base);
- if (err)
- return err;
-
- sd_ctrl_write16(base, CTL_SD_XFER_LEN, TMIO_BBS);
- for (i = 0; i < TMIO_BBS / sizeof(*buf); i++)
- *buf++ = sd_ctrl_read16(base, RESP_CMD12);
-
- err = sdhi_boot_wait_resp_end(base);
- if (err)
- return err;
-
- return 0;
-}
-
-int sdhi_boot_do_read(void __iomem *base, int high_capacity,
- unsigned long offset, unsigned short count,
- unsigned short *buf)
-{
- unsigned long i;
- int err = 0;
-
- for (i = 0; i < count; i++) {
- err = sdhi_boot_do_read_single(base, high_capacity, offset + i,
- buf + (i * TMIO_BBS /
- sizeof(*buf)));
- if (err)
- return err;
- }
-
- return 0;
-}
-
-#define VOLTAGES (MMC_VDD_32_33 | MMC_VDD_33_34)
-
-int sdhi_boot_init(void __iomem *base)
-{
- bool sd_v2 = false, sd_v1_0 = false;
- unsigned short cid;
- int err, high_capacity = 0;
-
- sdhi_boot_mmc_clk_stop(base);
- sdhi_boot_reset(base);
-
- /* mmc0: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 21 width 0 timing 0 */
- {
- struct mmc_ios ios;
- ios.power_mode = MMC_POWER_ON;
- ios.bus_width = MMC_BUS_WIDTH_1;
- ios.clock = CLK_MMC_INIT;
- err = sdhi_boot_mmc_set_ios(base, &ios);
- if (err)
- return err;
- }
-
- /* CMD0 */
- {
- struct mmc_command cmd;
- msleep(1);
- cmd.opcode = MMC_GO_IDLE_STATE;
- cmd.arg = 0;
- cmd.flags = MMC_RSP_NONE;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- msleep(2);
- }
-
- /* CMD8 - Test for SD version 2 */
- {
- struct mmc_command cmd;
- cmd.opcode = SD_SEND_IF_COND;
- cmd.arg = (VOLTAGES != 0) << 8 | 0xaa;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd); /* Ignore error */
- if ((cmd.resp[0] & 0xff) == 0xaa)
- sd_v2 = true;
- }
-
- /* CMD55 - Get OCR (SD) */
- {
- int timeout = 1000;
- struct mmc_command cmd;
-
- cmd.arg = 0;
-
- do {
- cmd.opcode = MMC_APP_CMD;
- cmd.flags = MMC_RSP_R1;
- cmd.arg = 0;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- break;
-
- cmd.opcode = SD_APP_OP_COND;
- cmd.flags = MMC_RSP_R3;
- cmd.arg = (VOLTAGES & 0xff8000);
- if (sd_v2)
- cmd.arg |= OCR_HCS;
- cmd.arg |= OCR_FASTBOOT;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- break;
-
- msleep(1);
- } while((!(cmd.resp[0] & OCR_BUSY)) && --timeout);
-
- if (!err && timeout) {
- if (!sd_v2)
- sd_v1_0 = true;
- high_capacity = (cmd.resp[0] & OCR_HCS) == OCR_HCS;
- }
- }
-
- /* CMD1 - Get OCR (MMC) */
- if (!sd_v2 && !sd_v1_0) {
- int timeout = 1000;
- struct mmc_command cmd;
-
- do {
- cmd.opcode = MMC_SEND_OP_COND;
- cmd.arg = VOLTAGES | OCR_HCS;
- cmd.flags = MMC_RSP_R3;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
-
- msleep(1);
- } while((!(cmd.resp[0] & OCR_BUSY)) && --timeout);
-
- if (!timeout)
- return -EAGAIN;
-
- high_capacity = (cmd.resp[0] & OCR_HCS) == OCR_HCS;
- }
-
- /* CMD2 - Get CID */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_ALL_SEND_CID;
- cmd.arg = 0;
- cmd.flags = MMC_RSP_R2;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- /* CMD3
- * MMC: Set the relative address
- * SD: Get the relative address
- * Also puts the card into the standby state
- */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_SET_RELATIVE_ADDR;
- cmd.arg = 0;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- cid = cmd.resp[0] >> 16;
- }
-
- /* CMD9 - Get CSD */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_SEND_CSD;
- cmd.arg = cid << 16;
- cmd.flags = MMC_RSP_R2;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- /* CMD7 - Select the card */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_SELECT_CARD;
- //cmd.arg = rca << 16;
- cmd.arg = cid << 16;
- //cmd.flags = MMC_RSP_R1B;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- /* CMD16 - Set the block size */
- {
- struct mmc_command cmd;
- cmd.opcode = MMC_SET_BLOCKLEN;
- cmd.arg = TMIO_BBS;
- cmd.flags = MMC_RSP_R1;
- err = sdhi_boot_request(base, &cmd);
- if (err)
- return err;
- }
-
- return high_capacity;
-}
--- 0001/arch/arm/boot/compressed/sdhi-shmobile.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,11 +0,0 @@
-#ifndef SDHI_MOBILE_H
-#define SDHI_MOBILE_H
-
-#include <linux/compiler.h>
-
-int sdhi_boot_do_read(void __iomem *base, int high_capacity,
- unsigned long offset, unsigned short count,
- unsigned short *buf);
-int sdhi_boot_init(void __iomem *base);
-
-#endif
--- 0002/arch/arm/mach-shmobile/include/mach/mmc.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,11 +0,0 @@
-#ifndef MMC_H
-#define MMC_H
-
-/**************************************************
- *
- * board specific settings
- *
- **************************************************/
-
-#error "unsupported board."
-#endif /* MMC_H */
--- 0001/arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,21 +0,0 @@
-#ifndef SDHI_SH7372_H
-#define SDHI_SH7372_H
-
-#define SDGENCNTA 0xfe40009c
-
-/* The countdown of SDGENCNTA is controlled by
- * ZB3D2CLK which runs at 149.5MHz.
- * That is 149.5ticks/us. Approximate this as 150ticks/us.
- */
-static void udelay(int us)
-{
- __raw_writel(us * 150, SDGENCNTA);
- while(__raw_readl(SDGENCNTA)) ;
-}
-
-static void msleep(int ms)
-{
- udelay(ms * 1000);
-}
-
-#endif
--- 0001/arch/arm/mach-shmobile/include/mach/sdhi.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,16 +0,0 @@
-#ifndef SDHI_H
-#define SDHI_H
-
-/**************************************************
- *
- * CPU specific settings
- *
- **************************************************/
-
-#ifdef CONFIG_ARCH_SH7372
-#include "mach/sdhi-sh7372.h"
-#else
-#error "unsupported CPU."
-#endif
-
-#endif /* SDHI_H */
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:54 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove support for the legacy Cortex-A8 based sh7372 SoC.
The Linux kernel still lacks DT bindings for the sh7372 INTC
interrupt controller so DT multiplatform support is not possibile.
Also, the sh7372 SoC never went into mass production anyway so to
aid migration to DT multiplatform simply get rid of sh7372 support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/Kconfig.debug | 7
arch/arm/mach-shmobile/Kconfig | 7
arch/arm/mach-shmobile/Makefile | 5
arch/arm/mach-shmobile/clock-sh7372.c | 620 --------------------
arch/arm/mach-shmobile/common.h | 1
arch/arm/mach-shmobile/entry-intc.S | 54 -
arch/arm/mach-shmobile/intc-sh7372.c | 672 ---------------------
arch/arm/mach-shmobile/pm-sh7372.c | 549 -----------------
arch/arm/mach-shmobile/setup-sh7372.c | 1016 ---------------------------------
arch/arm/mach-shmobile/sh7372.h | 84 --
arch/arm/mach-shmobile/sleep-sh7372.S | 98 ---
11 files changed, 3 insertions(+), 3110 deletions(-)
--- 0001/arch/arm/Kconfig.debug
+++ work/arch/arm/Kconfig.debug 2015-01-21 12:24:25.967559285 +0900
@@ -722,12 +722,11 @@ choice
via SCIF2 on Renesas R-Car E2 (R8A7794).
config DEBUG_RMOBILE_SCIFA0
- bool "Kernel low-level debugging messages via SCIFA0 on R8A73A4/SH7372"
- depends on ARCH_R8A73A4 || ARCH_SH7372
+ bool "Kernel low-level debugging messages via SCIFA0 on R8A73A4"
+ depends on ARCH_R8A73A4
help
Say Y here if you want kernel low-level debugging support
- via SCIFA0 on Renesas R-Mobile APE6 (R8A73A4) or SH-Mobile
- AP4 (SH7372).
+ via SCIFA0 on Renesas R-Mobile APE6 (R8A73A4).
config DEBUG_RMOBILE_SCIFA1
bool "Kernel low-level debugging messages via SCIFA1 on R8A7740"
--- 0003/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2015-01-21 12:23:41.817559444 +0900
@@ -97,13 +97,6 @@ if ARCH_SHMOBILE_LEGACY
comment "Renesas ARM SoCs System Type"
-config ARCH_SH7372
- bool "SH-Mobile AP4 (SH7372)"
- select ARCH_RMOBILE
- select ARCH_WANT_OPTIONAL_GPIOLIB
- select ARM_CPU_SUSPEND if PM || CPU_IDLE
- select SH_INTC
-
config ARCH_SH73A0
bool "SH-Mobile AG5 (R8A73A00)"
select ARCH_RMOBILE
--- 0003/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2015-01-21 12:23:41.817559444 +0900
@@ -6,7 +6,6 @@
obj-y := timer.o console.o
# CPU objects
-obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o intc-sh7372.o pm-sh7372.o
obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o pm-sh73a0.o
obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o pm-r8a7740.o
@@ -21,7 +20,6 @@ obj-$(CONFIG_ARCH_R7S72100) += setup-r7s
# Clock objects
ifndef CONFIG_COMMON_CLK
obj-y += clock.o
-obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o
obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o
obj-$(CONFIG_ARCH_R8A7740) += clock-r8a7740.o
obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o
@@ -50,9 +48,6 @@ obj-$(CONFIG_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_PM_RCAR) += pm-rcar.o
obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o
-# special sh7372 handling for IRQ objects and low level sleep code
-obj-$(CONFIG_ARCH_SH7372) += entry-intc.o sleep-sh7372.o
-
# Board objects
ifdef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o
--- 0001/arch/arm/mach-shmobile/clock-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,620 +0,0 @@
-/*
- * SH7372 clock framework support
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/sh_clk.h>
-#include <linux/clkdev.h>
-#include "clock.h"
-#include "common.h"
-
-/* SH7372 registers */
-#define FRQCRA IOMEM(0xe6150000)
-#define FRQCRB IOMEM(0xe6150004)
-#define FRQCRC IOMEM(0xe61500e0)
-#define FRQCRD IOMEM(0xe61500e4)
-#define VCLKCR1 IOMEM(0xe6150008)
-#define VCLKCR2 IOMEM(0xe615000c)
-#define VCLKCR3 IOMEM(0xe615001c)
-#define FMSICKCR IOMEM(0xe6150010)
-#define FMSOCKCR IOMEM(0xe6150014)
-#define FSIACKCR IOMEM(0xe6150018)
-#define FSIBCKCR IOMEM(0xe6150090)
-#define SUBCKCR IOMEM(0xe6150080)
-#define SPUCKCR IOMEM(0xe6150084)
-#define VOUCKCR IOMEM(0xe6150088)
-#define HDMICKCR IOMEM(0xe6150094)
-#define DSITCKCR IOMEM(0xe6150060)
-#define DSI0PCKCR IOMEM(0xe6150064)
-#define DSI1PCKCR IOMEM(0xe6150098)
-#define PLLC01CR IOMEM(0xe6150028)
-#define PLLC2CR IOMEM(0xe615002c)
-#define RMSTPCR0 IOMEM(0xe6150110)
-#define RMSTPCR1 IOMEM(0xe6150114)
-#define RMSTPCR2 IOMEM(0xe6150118)
-#define RMSTPCR3 IOMEM(0xe615011c)
-#define RMSTPCR4 IOMEM(0xe6150120)
-#define SMSTPCR0 IOMEM(0xe6150130)
-#define SMSTPCR1 IOMEM(0xe6150134)
-#define SMSTPCR2 IOMEM(0xe6150138)
-#define SMSTPCR3 IOMEM(0xe615013c)
-#define SMSTPCR4 IOMEM(0xe6150140)
-
-#define FSIDIVA 0xFE1F8000
-#define FSIDIVB 0xFE1F8008
-
-/* Platforms must set frequency on their DV_CLKI pin */
-struct clk sh7372_dv_clki_clk = {
-};
-
-/* Fixed 32 KHz root clock from EXTALR pin */
-static struct clk r_clk = {
- .rate = 32768,
-};
-
-/*
- * 26MHz default rate for the EXTAL1 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-struct clk sh7372_extal1_clk = {
- .rate = 26000000,
-};
-
-/*
- * 48MHz default rate for the EXTAL2 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-struct clk sh7372_extal2_clk = {
- .rate = 48000000,
-};
-
-SH_CLK_RATIO(div2, 1, 2);
-
-SH_FIXED_RATIO_CLKg(sh7372_dv_clki_div2_clk, sh7372_dv_clki_clk, div2);
-SH_FIXED_RATIO_CLK(extal1_div2_clk, sh7372_extal1_clk, div2);
-SH_FIXED_RATIO_CLK(extal2_div2_clk, sh7372_extal2_clk, div2);
-SH_FIXED_RATIO_CLK(extal2_div4_clk, extal2_div2_clk, div2);
-
-/* PLLC0 and PLLC1 */
-static unsigned long pllc01_recalc(struct clk *clk)
-{
- unsigned long mult = 1;
-
- if (__raw_readl(PLLC01CR) & (1 << 14))
- mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1) * 2;
-
- return clk->parent->rate * mult;
-}
-
-static struct sh_clk_ops pllc01_clk_ops = {
- .recalc = pllc01_recalc,
-};
-
-static struct clk pllc0_clk = {
- .ops = &pllc01_clk_ops,
- .flags = CLK_ENABLE_ON_INIT,
- .parent = &extal1_div2_clk,
- .enable_reg = (void __iomem *)FRQCRC,
-};
-
-static struct clk pllc1_clk = {
- .ops = &pllc01_clk_ops,
- .flags = CLK_ENABLE_ON_INIT,
- .parent = &extal1_div2_clk,
- .enable_reg = (void __iomem *)FRQCRA,
-};
-
-/* Divide PLLC1 by two */
-SH_FIXED_RATIO_CLK(pllc1_div2_clk, pllc1_clk, div2);
-
-/* PLLC2 */
-
-/* Indices are important - they are the actual src selecting values */
-static struct clk *pllc2_parent[] = {
- [0] = &extal1_div2_clk,
- [1] = &extal2_div2_clk,
- [2] = &sh7372_dv_clki_div2_clk,
-};
-
-/* Only multipliers 20 * 2 to 46 * 2 are valid, last entry for CPUFREQ_TABLE_END */
-static struct cpufreq_frequency_table pllc2_freq_table[29];
-
-static void pllc2_table_rebuild(struct clk *clk)
-{
- int i;
-
- /* Initialise PLLC2 frequency table */
- for (i = 0; i < ARRAY_SIZE(pllc2_freq_table) - 2; i++) {
- pllc2_freq_table[i].frequency = clk->parent->rate * (i + 20) * 2;
- pllc2_freq_table[i].driver_data = i;
- }
-
- /* This is a special entry - switching PLL off makes it a repeater */
- pllc2_freq_table[i].frequency = clk->parent->rate;
- pllc2_freq_table[i].driver_data = i;
-
- pllc2_freq_table[++i].frequency = CPUFREQ_TABLE_END;
- pllc2_freq_table[i].driver_data = i;
-}
-
-static unsigned long pllc2_recalc(struct clk *clk)
-{
- unsigned long mult = 1;
-
- pllc2_table_rebuild(clk);
-
- /*
- * If the PLL is off, mult = 1, clk->rate will be updated in
- * pllc2_enable().
- */
- if (__raw_readl(PLLC2CR) & (1 << 31))
- mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2;
-
- return clk->parent->rate * mult;
-}
-
-static long pllc2_round_rate(struct clk *clk, unsigned long rate)
-{
- return clk_rate_table_round(clk, clk->freq_table, rate);
-}
-
-static int pllc2_enable(struct clk *clk)
-{
- int i;
-
- __raw_writel(__raw_readl(PLLC2CR) | 0x80000000, PLLC2CR);
-
- for (i = 0; i < 100; i++)
- if (__raw_readl(PLLC2CR) & 0x80000000) {
- clk->rate = pllc2_recalc(clk);
- return 0;
- }
-
- pr_err("%s(): timeout!\n", __func__);
-
- return -ETIMEDOUT;
-}
-
-static void pllc2_disable(struct clk *clk)
-{
- __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR);
-}
-
-static int pllc2_set_rate(struct clk *clk, unsigned long rate)
-{
- unsigned long value;
- int idx;
-
- idx = clk_rate_table_find(clk, clk->freq_table, rate);
- if (idx < 0)
- return idx;
-
- if (rate = clk->parent->rate)
- return -EINVAL;
-
- value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
-
- __raw_writel(value | ((idx + 19) << 24), PLLC2CR);
-
- clk->rate = clk->freq_table[idx].frequency;
-
- return 0;
-}
-
-static int pllc2_set_parent(struct clk *clk, struct clk *parent)
-{
- u32 value;
- int ret, i;
-
- if (!clk->parent_table || !clk->parent_num)
- return -EINVAL;
-
- /* Search the parent */
- for (i = 0; i < clk->parent_num; i++)
- if (clk->parent_table[i] = parent)
- break;
-
- if (i = clk->parent_num)
- return -ENODEV;
-
- ret = clk_reparent(clk, parent);
- if (ret < 0)
- return ret;
-
- value = __raw_readl(PLLC2CR) & ~(3 << 6);
-
- __raw_writel(value | (i << 6), PLLC2CR);
-
- /* Rebiuld the frequency table */
- pllc2_table_rebuild(clk);
-
- return 0;
-}
-
-static struct sh_clk_ops pllc2_clk_ops = {
- .recalc = pllc2_recalc,
- .round_rate = pllc2_round_rate,
- .set_rate = pllc2_set_rate,
- .enable = pllc2_enable,
- .disable = pllc2_disable,
- .set_parent = pllc2_set_parent,
-};
-
-struct clk sh7372_pllc2_clk = {
- .ops = &pllc2_clk_ops,
- .parent = &extal1_div2_clk,
- .freq_table = pllc2_freq_table,
- .nr_freqs = ARRAY_SIZE(pllc2_freq_table) - 1,
- .parent_table = pllc2_parent,
- .parent_num = ARRAY_SIZE(pllc2_parent),
-};
-
-/* External input clock (pin name: FSIACK/FSIBCK ) */
-static struct clk fsiack_clk = {
-};
-
-static struct clk fsibck_clk = {
-};
-
-static struct clk *main_clks[] = {
- &sh7372_dv_clki_clk,
- &r_clk,
- &sh7372_extal1_clk,
- &sh7372_extal2_clk,
- &sh7372_dv_clki_div2_clk,
- &extal1_div2_clk,
- &extal2_div2_clk,
- &extal2_div4_clk,
- &pllc0_clk,
- &pllc1_clk,
- &pllc1_div2_clk,
- &sh7372_pllc2_clk,
- &fsiack_clk,
- &fsibck_clk,
-};
-
-static void div4_kick(struct clk *clk)
-{
- unsigned long value;
-
- /* set KICK bit in FRQCRB to update hardware setting */
- value = __raw_readl(FRQCRB);
- value |= (1 << 31);
- __raw_writel(value, FRQCRB);
-}
-
-static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
- 24, 32, 36, 48, 0, 72, 96, 0 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
- .divisors = divisors,
- .nr_divisors = ARRAY_SIZE(divisors),
-};
-
-static struct clk_div4_table div4_table = {
- .div_mult_table = &div4_div_mult_table,
- .kick = div4_kick,
-};
-
-enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR,
- DIV4_ZX, DIV4_HP,
- DIV4_ISPB, DIV4_S, DIV4_ZB, DIV4_ZB3, DIV4_CP,
- DIV4_DDRP, DIV4_NR };
-
-#define DIV4(_reg, _bit, _mask, _flags) \
- SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags)
-
-static struct clk div4_clks[DIV4_NR] = {
- [DIV4_I] = DIV4(FRQCRA, 20, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_ZG] = DIV4(FRQCRA, 16, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_B] = DIV4(FRQCRA, 8, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_M1] = DIV4(FRQCRA, 4, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_CSIR] = DIV4(FRQCRA, 0, 0x6fff, 0),
- [DIV4_ZX] = DIV4(FRQCRB, 12, 0x6fff, 0),
- [DIV4_HP] = DIV4(FRQCRB, 4, 0x6fff, 0),
- [DIV4_ISPB] = DIV4(FRQCRC, 20, 0x6fff, 0),
- [DIV4_S] = DIV4(FRQCRC, 12, 0x6fff, 0),
- [DIV4_ZB] = DIV4(FRQCRC, 8, 0x6fff, 0),
- [DIV4_ZB3] = DIV4(FRQCRC, 4, 0x6fff, 0),
- [DIV4_CP] = DIV4(FRQCRC, 0, 0x6fff, 0),
- [DIV4_DDRP] = DIV4(FRQCRD, 0, 0x677c, 0),
-};
-
-enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO,
- DIV6_SUB, DIV6_SPU,
- DIV6_VOU, DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
- DIV6_NR };
-
-static struct clk div6_clks[DIV6_NR] = {
- [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0),
- [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
- [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0),
- [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0),
- [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0),
- [DIV6_SUB] = SH_CLK_DIV6(&sh7372_extal2_clk, SUBCKCR, 0),
- [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
- [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0),
- [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0),
- [DIV6_DSI0P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI0PCKCR, 0),
- [DIV6_DSI1P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI1PCKCR, 0),
-};
-
-enum { DIV6_HDMI, DIV6_FSIA, DIV6_FSIB, DIV6_REPARENT_NR };
-
-/* Indices are important - they are the actual src selecting values */
-static struct clk *hdmi_parent[] = {
- [0] = &pllc1_div2_clk,
- [1] = &sh7372_pllc2_clk,
- [2] = &sh7372_dv_clki_clk,
- [3] = NULL, /* pllc2_div4 not implemented yet */
-};
-
-static struct clk *fsiackcr_parent[] = {
- [0] = &pllc1_div2_clk,
- [1] = &sh7372_pllc2_clk,
- [2] = &fsiack_clk, /* external input for FSI A */
- [3] = NULL, /* setting prohibited */
-};
-
-static struct clk *fsibckcr_parent[] = {
- [0] = &pllc1_div2_clk,
- [1] = &sh7372_pllc2_clk,
- [2] = &fsibck_clk, /* external input for FSI B */
- [3] = NULL, /* setting prohibited */
-};
-
-static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
- [DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
- hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
- [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
- fsiackcr_parent, ARRAY_SIZE(fsiackcr_parent), 6, 2),
- [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
- fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
-};
-
-/* FSI DIV */
-enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR };
-
-static struct clk fsidivs[] = {
- [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]),
- [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]),
-};
-
-enum { MSTP001, MSTP000,
- MSTP131, MSTP130,
- MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
- MSTP118, MSTP117, MSTP116, MSTP113,
- MSTP106, MSTP101, MSTP100,
- MSTP223,
- MSTP218, MSTP217, MSTP216, MSTP214, MSTP208, MSTP207,
- MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
- MSTP328, MSTP323, MSTP322, MSTP315, MSTP314, MSTP313, MSTP312,
- MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP407, MSTP406,
- MSTP405, MSTP404, MSTP403, MSTP400,
- MSTP_NR };
-
-#define MSTP(_parent, _reg, _bit, _flags) \
- SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
-
-static struct clk mstp_clks[MSTP_NR] = {
- [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
- [MSTP000] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 0, 0), /* MSIOF0 */
- [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
- [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
- [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
- [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
- [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU */
- [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2 */
- [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
- [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */
- [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
- [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
- [MSTP113] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 13, 0), /* MERAM */
- [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */
- [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */
- [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
- [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */
- [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
- [MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
- [MSTP216] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
- [MSTP214] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
- [MSTP208] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 8, 0), /* MSIOF1 */
- [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
- [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
- [MSTP205] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 5, 0), /* MSIOF2 */
- [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
- [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
- [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
- [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
- [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
- [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */
- [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
- [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
- [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL*/
- [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
- [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
- [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
- [MSTP423] = MSTP(&div4_clks[DIV4_B], SMSTPCR4, 23, 0), /* DSITX1 */
- [MSTP415] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 15, 0), /* SDHI2 */
- [MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
- [MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
- [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */
- [MSTP407] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 7, 0), /* USB-DMAC1 */
- [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */
- [MSTP405] = MSTP(&r_clk, SMSTPCR4, 5, 0), /* CMT4 */
- [MSTP404] = MSTP(&r_clk, SMSTPCR4, 4, 0), /* CMT3 */
- [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
- [MSTP400] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* CMT2 */
-};
-
-static struct clk_lookup lookups[] = {
- /* main clocks */
- CLKDEV_CON_ID("dv_clki_div2_clk", &sh7372_dv_clki_div2_clk),
- CLKDEV_CON_ID("r_clk", &r_clk),
- CLKDEV_CON_ID("extal1", &sh7372_extal1_clk),
- CLKDEV_CON_ID("extal2", &sh7372_extal2_clk),
- CLKDEV_CON_ID("extal1_div2_clk", &extal1_div2_clk),
- CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk),
- CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk),
- CLKDEV_CON_ID("pllc0_clk", &pllc0_clk),
- CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
- CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
- CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk),
- CLKDEV_CON_ID("fsiack", &fsiack_clk),
- CLKDEV_CON_ID("fsibck", &fsibck_clk),
-
- /* DIV4 clocks */
- CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
- CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]),
- CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
- CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]),
- CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]),
- CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]),
- CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
- CLKDEV_CON_ID("ispb_clk", &div4_clks[DIV4_ISPB]),
- CLKDEV_CON_ID("s_clk", &div4_clks[DIV4_S]),
- CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
- CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
- CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
- CLKDEV_CON_ID("ddrp_clk", &div4_clks[DIV4_DDRP]),
-
- /* DIV6 clocks */
- CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
- CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
- CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
- CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
- CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
- CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
- CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
- CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
- CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
-
- /* MSTP32 clocks */
- CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
- CLKDEV_DEV_ID("fff30000.i2c", &mstp_clks[MSTP001]), /* IIC2 */
- CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
- CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
- CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
- CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
- CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
- CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
- CLKDEV_DEV_ID("fff20000.i2c", &mstp_clks[MSTP116]), /* IIC0 */
- CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[MSTP113]), /* MERAM */
- CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
- CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
- CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */
- CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* DMAC1 */
- CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* DMAC2 */
- CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), /* DMAC3 */
- CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), /* USB-DMAC0 */
- CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[MSTP208]), /* MSIOF1 */
- CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
- CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */
- CLKDEV_DEV_ID("spi_sh_msiof.2", &mstp_clks[MSTP205]), /* MSIOF2 */
- CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
- CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
- CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
- CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
- CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
- CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
- CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
- CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]), /* IIC1 */
- CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
- CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */
- CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP322]), /* USB0 */
- CLKDEV_DEV_ID("sh_flctl.0", &mstp_clks[MSTP315]), /* FLCTL */
- CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
- CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */
- CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
- CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */
- CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
- CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMC */
- CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */
- CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */
- CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]), /* SDHI2 */
- CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
- CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
- CLKDEV_DEV_ID("e6d20000.i2c", &mstp_clks[MSTP411]), /* IIC3 */
- CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */
- CLKDEV_DEV_ID("e6d30000.i2c", &mstp_clks[MSTP410]), /* IIC4 */
- CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */
- CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
- CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
- CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
- CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
-
- /* ICK */
- CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
- CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
- CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
- CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
- CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1",
- &div6_reparent_clks[DIV6_HDMI]),
- CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
- CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
- CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
- CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
- CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
- CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.4", &mstp_clks[MSTP405]), /* CMT4 */
- CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.3", &mstp_clks[MSTP404]), /* CMT3 */
- CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.2", &mstp_clks[MSTP400]), /* CMT2 */
- CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
- CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
- CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk),
- CLKDEV_ICK_ID("xckb", "sh_fsi2", &fsibck_clk),
-};
-
-void __init sh7372_clock_init(void)
-{
- int k, ret = 0;
-
- /* make sure MSTP bits on the RT/SH4AL-DSP side are off */
- __raw_writel(0xe4ef8087, RMSTPCR0);
- __raw_writel(0xffffffff, RMSTPCR1);
- __raw_writel(0x37c7f7ff, RMSTPCR2);
- __raw_writel(0xffffffff, RMSTPCR3);
- __raw_writel(0xffe0fffd, RMSTPCR4);
-
- for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- ret = clk_register(main_clks[k]);
-
- if (!ret)
- ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-
- if (!ret)
- ret = sh_clk_div6_register(div6_clks, DIV6_NR);
-
- if (!ret)
- ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
-
- if (!ret)
- ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
- if (!ret)
- ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR);
-
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
- if (!ret)
- shmobile_clk_init();
- else
- panic("failed to setup sh7372 clocks\n");
-}
--- 0001/arch/arm/mach-shmobile/common.h
+++ work/arch/arm/mach-shmobile/common.h 2015-01-21 12:23:41.827559444 +0900
@@ -21,7 +21,6 @@ extern void shmobile_smp_scu_cpu_die(uns
extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
struct clk;
extern int shmobile_clk_init(void);
-extern void shmobile_handle_irq_intc(struct pt_regs *);
extern struct platform_suspend_ops shmobile_suspend_ops;
struct cpuidle_driver;
extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv);
--- 0001/arch/arm/mach-shmobile/entry-intc.S
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,54 +0,0 @@
-/*
- * ARM Interrupt demux handler using INTC
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/entry-macro-multi.S>
-
-#define INTCA_BASE 0xe6980000
-#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
-#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
-#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
-#define INTLVLB_OFFS 0x00000034 /* previous priority level */
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =INTCA_BASE
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- /* The single INTFLGA read access below results in the following:
- *
- * 1. INTLVLB is updated with old priority value from INTLVLA
- * 2. Highest priority interrupt is accepted
- * 3. INTLVLA is updated to contain priority of accepted interrupt
- * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
- */
- ldr \irqnr, [\base, #INTFLGA_OFFS]
-
- /* Restore INTLVLA with the value saved in INTLVLB.
- * This is required to support interrupt priorities properly.
- */
- ldrb \tmp, [\base, #INTLVLB_OFFS]
- strb \tmp, [\base, #INTLVLA_OFFS]
-
- /* Handle invalid vector number case */
- cmp \irqnr, #0
- beq 1000f
-
- /* Convert vector to irq number, same as the evt2irq() macro */
- lsr \irqnr, \irqnr, #0x5
- subs \irqnr, \irqnr, #16
-
-1000:
- .endm
-
- .macro test_for_ipi, irqnr, irqstat, base, tmp
- .endm
-
- arch_irq_handler shmobile_handle_irq_intc
--- 0001/arch/arm/mach-shmobile/intc-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,672 +0,0 @@
-/*
- * sh7372 processor support - INTC hardware block
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "intc.h"
-#include "irqs.h"
-
-enum {
- UNUSED_INTCA = 0,
-
- /* interrupt sources INTCA */
- DIRC,
- CRYPT_STD,
- IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
- AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
- MFI_MFIM, MFI_MFIS,
- BBIF1, BBIF2,
- USBHSDMAC0_USHDMI,
- _3DG_SGX540,
- CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
- KEYSC_KEY,
- SCIFA0, SCIFA1, SCIFA2, SCIFA3,
- MSIOF2, MSIOF1,
- SCIFA4, SCIFA5, SCIFB,
- FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
- SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
- SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2,
- IRREM,
- IRDA,
- TPU0,
- TTI20,
- DDM,
- SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3,
- RWDT0,
- DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3,
- DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR,
- DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
- DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
- DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
- DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
- SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
- HDMI,
- SPU2_SPU0, SPU2_SPU1,
- FSI, FMSI,
- MIPI_HSI,
- IPMMU_IPMMUD,
- CEC_1, CEC_2,
- AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
- MFIS2,
- CPORTR2S,
- CMT14, CMT15,
- MMC_MMC_ERR, MMC_MMC_NOR,
- IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
- IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3,
- USB0_USB0I1, USB0_USB0I0,
- USB1_USB1I1, USB1_USB1I0,
- USBHSDMAC1_USHDMI,
-
- /* interrupt groups INTCA */
- DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
- AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1, SDHI0, SDHI1, SDHI2
-};
-
-static struct intc_vect intca_vectors[] __initdata = {
- INTC_VECT(DIRC, 0x0560),
- INTC_VECT(CRYPT_STD, 0x0700),
- INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
- INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
- INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
- INTC_VECT(AP_ARM_COMMRX, 0x0860),
- INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
- INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
- INTC_VECT(USBHSDMAC0_USHDMI, 0x0a00),
- INTC_VECT(_3DG_SGX540, 0x0a60),
- INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
- INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
- INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
- INTC_VECT(KEYSC_KEY, 0x0be0),
- INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
- INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
- INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
- INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
- INTC_VECT(SCIFB, 0x0d60),
- INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
- INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
- INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
- INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
- INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
- INTC_VECT(SDHI1_SDHI1I2, 0x0ec0),
- INTC_VECT(IRREM, 0x0f60),
- INTC_VECT(IRDA, 0x0480),
- INTC_VECT(TPU0, 0x04a0),
- INTC_VECT(TTI20, 0x1100),
- INTC_VECT(DDM, 0x1140),
- INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220),
- INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260),
- INTC_VECT(RWDT0, 0x1280),
- INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020),
- INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060),
- INTC_VECT(DMAC1_2_DEI4, 0x2080), INTC_VECT(DMAC1_2_DEI5, 0x20a0),
- INTC_VECT(DMAC1_2_DADERR, 0x20c0),
- INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
- INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
- INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
- INTC_VECT(DMAC2_2_DADERR, 0x21c0),
- INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
- INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
- INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
- INTC_VECT(DMAC3_2_DADERR, 0x22c0),
- INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1320),
- INTC_VECT(SHWYSTAT_COM, 0x1340),
- INTC_VECT(HDMI, 0x17e0),
- INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
- INTC_VECT(FSI, 0x1840),
- INTC_VECT(FMSI, 0x1860),
- INTC_VECT(MIPI_HSI, 0x18e0),
- INTC_VECT(IPMMU_IPMMUD, 0x1920),
- INTC_VECT(CEC_1, 0x1940), INTC_VECT(CEC_2, 0x1960),
- INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
- INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
- INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
- INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
- INTC_VECT(MFIS2, 0x1a00),
- INTC_VECT(CPORTR2S, 0x1a20),
- INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
- INTC_VECT(MMC_MMC_ERR, 0x1ac0), INTC_VECT(MMC_MMC_NOR, 0x1ae0),
- INTC_VECT(IIC4_ALI4, 0x1b00), INTC_VECT(IIC4_TACKI4, 0x1b20),
- INTC_VECT(IIC4_WAITI4, 0x1b40), INTC_VECT(IIC4_DTEI4, 0x1b60),
- INTC_VECT(IIC3_ALI3, 0x1b80), INTC_VECT(IIC3_TACKI3, 0x1ba0),
- INTC_VECT(IIC3_WAITI3, 0x1bc0), INTC_VECT(IIC3_DTEI3, 0x1be0),
- INTC_VECT(USB0_USB0I1, 0x1c80), INTC_VECT(USB0_USB0I0, 0x1ca0),
- INTC_VECT(USB1_USB1I1, 0x1cc0), INTC_VECT(USB1_USB1I0, 0x1ce0),
- INTC_VECT(USBHSDMAC1_USHDMI, 0x1d00),
-};
-
-static struct intc_group intca_groups[] __initdata = {
- INTC_GROUP(DMAC1_1, DMAC1_1_DEI0,
- DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3),
- INTC_GROUP(DMAC1_2, DMAC1_2_DEI4,
- DMAC1_2_DEI5, DMAC1_2_DADERR),
- INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
- DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
- INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
- DMAC2_2_DEI5, DMAC2_2_DADERR),
- INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
- DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
- INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
- DMAC3_2_DEI5, DMAC3_2_DADERR),
- INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX),
- INTC_GROUP(AP_ARM2, AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
- AP_ARM_DMAIRQ, AP_ARM_DMASIRQ),
- INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
- INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
- FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
- INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
- INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
- SDHI0_SDHI0I2, SDHI0_SDHI0I3),
- INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
- SDHI1_SDHI1I2),
- INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
- SDHI2_SDHI2I2, SDHI2_SDHI2I3),
- INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
-};
-
-static struct intc_mask_reg intca_mask_registers[] __initdata = {
- { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
- { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
- AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
- { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
- { 0, CRYPT_STD, DIRC, 0,
- DMAC1_1_DEI3, DMAC1_1_DEI2, DMAC1_1_DEI1, DMAC1_1_DEI0 } },
- { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
- { 0, 0, 0, 0,
- BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
- { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
- { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
- DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
- { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
- { DDM, 0, 0, 0,
- 0, 0, 0, 0 } },
- { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
- { KEYSC_KEY, DMAC1_2_DADERR, DMAC1_2_DEI5, DMAC1_2_DEI4,
- SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
- { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
- { SCIFB, SCIFA5, SCIFA4, MSIOF1,
- 0, 0, MSIOF2, 0 } },
- { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
- { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
- FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
- { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
- { 0, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
- TTI20, USBHSDMAC0_USHDMI, 0, 0 } },
- { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
- { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
- CMT2, 0, 0, _3DG_SGX540 } },
- { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
- { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
- 0, 0, 0, 0 } },
- { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
- { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
- 0, 0, IRREM, 0 } },
- { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
- { 0, 0, TPU0, 0,
- 0, 0, 0, 0 } },
- { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
- { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0,
- 0, CMT3, 0, RWDT0 } },
- { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
- { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
- 0, 0, 0, 0 } },
- { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
- { 0, 0, 0, 0,
- 0, 0, 0, HDMI } },
- { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
- { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
- 0, 0, 0, MIPI_HSI } },
- { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
- { 0, IPMMU_IPMMUD, CEC_1, CEC_2,
- AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
- AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
- { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
- { MFIS2, CPORTR2S, CMT14, CMT15,
- 0, 0, MMC_MMC_ERR, MMC_MMC_NOR } },
- { 0xe69500a0, 0xe69500e0, 8, /* IMR8A3 / IMCR8A3 */
- { IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
- IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3 } },
- { 0xe69500a4, 0xe69500e4, 8, /* IMR9A3 / IMCR9A3 */
- { 0, 0, 0, 0,
- USB0_USB0I1, USB0_USB0I0, USB1_USB1I1, USB1_USB1I0 } },
- { 0xe69500a8, 0xe69500e8, 8, /* IMR10A3 / IMCR10A3 */
- { USBHSDMAC1_USHDMI, 0, 0, 0,
- 0, 0, 0, 0 } },
-};
-
-static struct intc_prio_reg intca_prio_registers[] __initdata = {
- { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, 0 } },
- { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
- { 0xe6940008, 0, 16, 4, /* IPRCA */ { 0, CRYPT_STD,
- CMT1_CMT11, AP_ARM1 } },
- { 0xe694000c, 0, 16, 4, /* IPRDA */ { 0, 0,
- CMT1_CMT12, 0 } },
- { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC1_1, MFI_MFIS,
- MFI_MFIM, 0 } },
- { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC1_2,
- _3DG_SGX540, CMT1_CMT10 } },
- { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
- SCIFA2, SCIFA3 } },
- { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBHSDMAC0_USHDMI,
- FLCTL, SDHI0 } },
- { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4,
- 0/* MSU */, IIC1 } },
- { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2,
- 0/* MSUG */, TTI20 } },
- { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
- { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, 0, 0, 0 } },
- { 0xe6940030, 0, 16, 4, /* IPRMA */ { 0, CMT3, 0, RWDT0 } },
- { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
- { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
- { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
- { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { 0, 0, 0, HDMI } },
- { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
- { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, 0, 0, MIPI_HSI } },
- { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUD, 0,
- CEC_1, CEC_2 } },
- { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
- { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
- CMT14, CMT15 } },
- { 0xe695003c, 0, 16, 4, /* IPRPA3 */ { 0, 0,
- MMC_MMC_ERR, MMC_MMC_NOR } },
- { 0xe6950040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4,
- IIC4_WAITI4, IIC4_DTEI4 } },
- { 0xe6950044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3,
- IIC3_WAITI3, IIC3_DTEI3 } },
- { 0xe6950048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/,
- 0/*TXI*/, 0/*TEI*/} },
- { 0xe695004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0,
- USB1_USB1I1, USB1_USB1I0 } },
- { 0xe6950050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } },
-};
-
-static DECLARE_INTC_DESC(intca_desc, "sh7372-intca",
- intca_vectors, intca_groups,
- intca_mask_registers, intca_prio_registers,
- NULL);
-
-INTC_IRQ_PINS_16(intca_irq_pins_lo, 0xe6900000,
- INTC_VECT, "sh7372-intca-irq-lo");
-
-INTC_IRQ_PINS_16H(intca_irq_pins_hi, 0xe6900000,
- INTC_VECT, "sh7372-intca-irq-hi");
-
-enum {
- UNUSED_INTCS = 0,
- ENABLED_INTCS,
-
- /* interrupt sources INTCS */
-
- /* IRQ0S - IRQ31S */
- VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3,
- RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3,
- CEU, BEU_BEU0, BEU_BEU1, BEU_BEU2,
- /* MFI */
- /* BBIF2 */
- VPU,
- TSIF1,
- /* 3DG */
- _2DDMAC,
- IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
- IPMMU_IPMMUR, IPMMU_IPMMUR2,
- RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR,
- /* KEYSC */
- /* TTI20 */
- MSIOF,
- IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0,
- TMU_TUNI0, TMU_TUNI1, TMU_TUNI2,
- CMT0,
- TSIF0,
- /* CMT2 */
- LMB,
- CTI,
- /* RWDT0 */
- ICB,
- JPU_JPEG,
- LCDC,
- LCRC,
- RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3,
- RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR,
- ISP,
- LCDC1,
- CSIRX,
- DSITX_DSITX0,
- DSITX_DSITX1,
- /* SPU2 */
- /* FSI */
- /* FMSI */
- /* HDMI */
- TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2,
- CMT4,
- DSITX1_DSITX1_0,
- DSITX1_DSITX1_1,
- MFIS2_INTCS, /* Priority always enabled using ENABLED_INTCS */
- CPORTS2R,
- /* CEC */
- JPU6E,
-
- /* interrupt groups INTCS */
- RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2,
- RTDMAC2_1, RTDMAC2_2, TMU1, DSITX,
-};
-
-static struct intc_vect intcs_vectors[] = {
- /* IRQ0S - IRQ31S */
- INTCS_VECT(VEU_VEU0, 0x700), INTCS_VECT(VEU_VEU1, 0x720),
- INTCS_VECT(VEU_VEU2, 0x740), INTCS_VECT(VEU_VEU3, 0x760),
- INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820),
- INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860),
- INTCS_VECT(CEU, 0x880), INTCS_VECT(BEU_BEU0, 0x8a0),
- INTCS_VECT(BEU_BEU1, 0x8c0), INTCS_VECT(BEU_BEU2, 0x8e0),
- /* MFI */
- /* BBIF2 */
- INTCS_VECT(VPU, 0x980),
- INTCS_VECT(TSIF1, 0x9a0),
- /* 3DG */
- INTCS_VECT(_2DDMAC, 0xa00),
- INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0),
- INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0),
- INTCS_VECT(IPMMU_IPMMUR, 0xb00), INTCS_VECT(IPMMU_IPMMUR2, 0xb20),
- INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0),
- INTCS_VECT(RTDMAC_2_DADERR, 0xbc0),
- /* KEYSC */
- /* TTI20 */
- INTCS_VECT(MSIOF, 0x0d20),
- INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20),
- INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60),
- INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0),
- INTCS_VECT(TMU_TUNI2, 0xec0),
- INTCS_VECT(CMT0, 0xf00),
- INTCS_VECT(TSIF0, 0xf20),
- /* CMT2 */
- INTCS_VECT(LMB, 0xf60),
- INTCS_VECT(CTI, 0x400),
- /* RWDT0 */
- INTCS_VECT(ICB, 0x480),
- INTCS_VECT(JPU_JPEG, 0x560),
- INTCS_VECT(LCDC, 0x580),
- INTCS_VECT(LCRC, 0x5a0),
- INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320),
- INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360),
- INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13a0),
- INTCS_VECT(RTDMAC2_2_DADERR, 0x13c0),
- INTCS_VECT(ISP, 0x1720),
- INTCS_VECT(LCDC1, 0x1780),
- INTCS_VECT(CSIRX, 0x17a0),
- INTCS_VECT(DSITX_DSITX0, 0x17c0),
- INTCS_VECT(DSITX_DSITX1, 0x17e0),
- /* SPU2 */
- /* FSI */
- /* FMSI */
- /* HDMI */
- INTCS_VECT(TMU1_TUNI0, 0x1900), INTCS_VECT(TMU1_TUNI1, 0x1920),
- INTCS_VECT(TMU1_TUNI2, 0x1940),
- INTCS_VECT(CMT4, 0x1980),
- INTCS_VECT(DSITX1_DSITX1_0, 0x19a0),
- INTCS_VECT(DSITX1_DSITX1_1, 0x19c0),
- INTCS_VECT(MFIS2_INTCS, 0x1a00),
- INTCS_VECT(CPORTS2R, 0x1a20),
- /* CEC */
- INTCS_VECT(JPU6E, 0x1a80),
-};
-
-static struct intc_group intcs_groups[] __initdata = {
- INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1,
- RTDMAC_1_DEI2, RTDMAC_1_DEI3),
- INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR),
- INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3),
- INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2),
- INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0),
- INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2),
- INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2),
- INTC_GROUP(RTDMAC2_1, RTDMAC2_1_DEI0, RTDMAC2_1_DEI1,
- RTDMAC2_1_DEI2, RTDMAC2_1_DEI3),
- INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4,
- RTDMAC2_2_DEI5, RTDMAC2_2_DADERR),
- INTC_GROUP(TMU1, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0),
- INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1),
-};
-
-static struct intc_mask_reg intcs_mask_registers[] = {
- { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */
- { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU,
- VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } },
- { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */
- { 0, 0, 0, VPU,
- 0, 0, 0, 0 } },
- { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */
- { 0, 0, 0, _2DDMAC,
- 0, 0, 0, ICB } },
- { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */
- { 0, 0, 0, CTI,
- JPU_JPEG, 0, LCRC, LCDC } },
- { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */
- { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4,
- RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } },
- { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */
- { 0, 0, MSIOF, 0,
- 0, 0, 0, 0 } },
- { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */
- { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
- 0, 0, 0, 0 } },
- { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */
- { 0, 0, 0, CMT0,
- IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } },
- { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */
- { 0, 0, IPMMU_IPMMUR2, IPMMU_IPMMUR,
- 0, 0, 0, 0 } },
- { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */
- { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0,
- 0, TSIF1, LMB, TSIF0 } },
- { 0xffd50180, 0xffd501c0, 8, /* IMR0SA3 / IMCR0SA3 */
- { 0, RTDMAC2_2_DADERR, RTDMAC2_2_DEI5, RTDMAC2_2_DEI4,
- RTDMAC2_1_DEI3, RTDMAC2_1_DEI2, RTDMAC2_1_DEI1, RTDMAC2_1_DEI0 } },
- { 0xffd50190, 0xffd501d0, 8, /* IMR4SA3 / IMCR4SA3 */
- { 0, ISP, 0, 0,
- LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } },
- { 0xffd50198, 0xffd501d8, 8, /* IMR6SA3 / IMCR6SA3 */
- { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
- CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } },
- { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
- { MFIS2_INTCS, CPORTS2R, 0, 0,
- JPU6E, 0, 0, 0 } },
-};
-
-/* Priority is needed for INTCA to receive the INTCS interrupt */
-static struct intc_prio_reg intcs_prio_registers[] = {
- { 0xffd20000, 0, 16, 4, /* IPRAS */ { CTI, 0, _2DDMAC, ICB } },
- { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPU_JPEG, LCDC, 0, LCRC } },
- { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, CEU, 0, VPU } },
- { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT0 } },
- { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1,
- TMU_TUNI2, TSIF1 } },
- { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, 0, VEU, BEU } },
- { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF0, IIC0 } },
- { 0xffd20028, 0, 16, 4, /* IPRKS */ { 0, 0, LMB, 0 } },
- { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, 0, 0 } },
- { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } },
- { 0xffd50000, 0, 16, 4, /* IPRAS3 */ { RTDMAC2_1, 0, 0, 0 } },
- { 0xffd50004, 0, 16, 4, /* IPRBS3 */ { RTDMAC2_2, 0, 0, 0 } },
- { 0xffd50020, 0, 16, 4, /* IPRIS3 */ { 0, ISP, 0, 0 } },
- { 0xffd50024, 0, 16, 4, /* IPRJS3 */ { LCDC1, CSIRX, DSITX, 0 } },
- { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } },
- { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0,
- DSITX1_DSITX1_1, 0 } },
- { 0xffd50038, 0, 16, 4, /* IPROS3 */ { ENABLED_INTCS, CPORTS2R,
- 0, 0 } },
- { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } },
-};
-
-static struct resource intcs_resources[] __initdata = {
- [0] = {
- .start = 0xffd20000,
- .end = 0xffd201ff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0xffd50000,
- .end = 0xffd501ff,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct intc_desc intcs_desc __initdata = {
- .name = "sh7372-intcs",
- .force_enable = ENABLED_INTCS,
- .skip_syscore_suspend = true,
- .resource = intcs_resources,
- .num_resources = ARRAY_SIZE(intcs_resources),
- .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
- intcs_prio_registers, NULL, NULL),
-};
-
-static void intcs_demux(unsigned int irq, struct irq_desc *desc)
-{
- void __iomem *reg = (void *)irq_get_handler_data(irq);
- unsigned int evtcodeas = ioread32(reg);
-
- generic_handle_irq(intcs_evt2irq(evtcodeas));
-}
-
-static void __iomem *intcs_ffd2;
-static void __iomem *intcs_ffd5;
-
-void __init sh7372_init_irq(void)
-{
- void __iomem *intevtsa;
- int n;
-
- intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
- intevtsa = intcs_ffd2 + 0x100;
- intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
-
- register_intc_controller(&intca_desc);
- register_intc_controller(&intca_irq_pins_lo_desc);
- register_intc_controller(&intca_irq_pins_hi_desc);
- register_intc_controller(&intcs_desc);
-
- /* setup dummy cascade chip for INTCS */
- n = evt2irq(0xf80);
- irq_alloc_desc_at(n, numa_node_id());
- irq_set_chip_and_handler_name(n, &dummy_irq_chip,
- handle_level_irq, "level");
- set_irq_flags(n, IRQF_VALID); /* yuck */
-
- /* demux using INTEVTSA */
- irq_set_handler_data(n, (void *)intevtsa);
- irq_set_chained_handler(n, intcs_demux);
-
- /* unmask INTCS in INTAMASK */
- iowrite16(0, intcs_ffd2 + 0x104);
-}
-
-static unsigned short ffd2[0x200];
-static unsigned short ffd5[0x100];
-
-void sh7372_intcs_suspend(void)
-{
- int k;
-
- for (k = 0x00; k <= 0x30; k += 4)
- ffd2[k] = __raw_readw(intcs_ffd2 + k);
-
- for (k = 0x80; k <= 0xb0; k += 4)
- ffd2[k] = __raw_readb(intcs_ffd2 + k);
-
- for (k = 0x180; k <= 0x188; k += 4)
- ffd2[k] = __raw_readb(intcs_ffd2 + k);
-
- for (k = 0x00; k <= 0x3c; k += 4)
- ffd5[k] = __raw_readw(intcs_ffd5 + k);
-
- for (k = 0x80; k <= 0x9c; k += 4)
- ffd5[k] = __raw_readb(intcs_ffd5 + k);
-}
-
-void sh7372_intcs_resume(void)
-{
- int k;
-
- for (k = 0x00; k <= 0x30; k += 4)
- __raw_writew(ffd2[k], intcs_ffd2 + k);
-
- for (k = 0x80; k <= 0xb0; k += 4)
- __raw_writeb(ffd2[k], intcs_ffd2 + k);
-
- for (k = 0x180; k <= 0x188; k += 4)
- __raw_writeb(ffd2[k], intcs_ffd2 + k);
-
- for (k = 0x00; k <= 0x3c; k += 4)
- __raw_writew(ffd5[k], intcs_ffd5 + k);
-
- for (k = 0x80; k <= 0x9c; k += 4)
- __raw_writeb(ffd5[k], intcs_ffd5 + k);
-}
-
-#define E694_BASE IOMEM(0xe6940000)
-#define E695_BASE IOMEM(0xe6950000)
-
-static unsigned short e694[0x200];
-static unsigned short e695[0x200];
-
-void sh7372_intca_suspend(void)
-{
- int k;
-
- for (k = 0x00; k <= 0x38; k += 4)
- e694[k] = __raw_readw(E694_BASE + k);
-
- for (k = 0x80; k <= 0xb4; k += 4)
- e694[k] = __raw_readb(E694_BASE + k);
-
- for (k = 0x180; k <= 0x1b4; k += 4)
- e694[k] = __raw_readb(E694_BASE + k);
-
- for (k = 0x00; k <= 0x50; k += 4)
- e695[k] = __raw_readw(E695_BASE + k);
-
- for (k = 0x80; k <= 0xa8; k += 4)
- e695[k] = __raw_readb(E695_BASE + k);
-
- for (k = 0x180; k <= 0x1a8; k += 4)
- e695[k] = __raw_readb(E695_BASE + k);
-}
-
-void sh7372_intca_resume(void)
-{
- int k;
-
- for (k = 0x00; k <= 0x38; k += 4)
- __raw_writew(e694[k], E694_BASE + k);
-
- for (k = 0x80; k <= 0xb4; k += 4)
- __raw_writeb(e694[k], E694_BASE + k);
-
- for (k = 0x180; k <= 0x1b4; k += 4)
- __raw_writeb(e694[k], E694_BASE + k);
-
- for (k = 0x00; k <= 0x50; k += 4)
- __raw_writew(e695[k], E695_BASE + k);
-
- for (k = 0x80; k <= 0xa8; k += 4)
- __raw_writeb(e695[k], E695_BASE + k);
-
- for (k = 0x180; k <= 0x1a8; k += 4)
- __raw_writeb(e695[k], E695_BASE + k);
-}
--- 0001/arch/arm/mach-shmobile/pm-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,549 +0,0 @@
-/*
- * sh7372 Power management support
- *
- * Copyright (C) 2011 Magnus Damm
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/pm.h>
-#include <linux/suspend.h>
-#include <linux/cpuidle.h>
-#include <linux/module.h>
-#include <linux/list.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/pm_clock.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/bitrev.h>
-#include <linux/console.h>
-
-#include <asm/cpuidle.h>
-#include <asm/io.h>
-#include <asm/tlbflush.h>
-#include <asm/suspend.h>
-
-#include "common.h"
-#include "pm-rmobile.h"
-#include "sh7372.h"
-
-/* DBG */
-#define DBGREG1 IOMEM(0xe6100020)
-#define DBGREG9 IOMEM(0xe6100040)
-
-/* CPGA */
-#define SYSTBCR IOMEM(0xe6150024)
-#define MSTPSR0 IOMEM(0xe6150030)
-#define MSTPSR1 IOMEM(0xe6150038)
-#define MSTPSR2 IOMEM(0xe6150040)
-#define MSTPSR3 IOMEM(0xe6150048)
-#define MSTPSR4 IOMEM(0xe615004c)
-#define PLLC01STPCR IOMEM(0xe61500c8)
-
-/* SYSC */
-#define SYSC_BASE IOMEM(0xe6180000)
-
-#define SBAR IOMEM(0xe6180020)
-#define WUPRMSK IOMEM(0xe6180028)
-#define WUPSMSK IOMEM(0xe618002c)
-#define WUPSMSK2 IOMEM(0xe6180048)
-#define WUPSFAC IOMEM(0xe6180098)
-#define IRQCR IOMEM(0xe618022c)
-#define IRQCR2 IOMEM(0xe6180238)
-#define IRQCR3 IOMEM(0xe6180244)
-#define IRQCR4 IOMEM(0xe6180248)
-#define PDNSEL IOMEM(0xe6180254)
-
-/* INTC */
-#define ICR1A IOMEM(0xe6900000)
-#define ICR2A IOMEM(0xe6900004)
-#define ICR3A IOMEM(0xe6900008)
-#define ICR4A IOMEM(0xe690000c)
-#define INTMSK00A IOMEM(0xe6900040)
-#define INTMSK10A IOMEM(0xe6900044)
-#define INTMSK20A IOMEM(0xe6900048)
-#define INTMSK30A IOMEM(0xe690004c)
-
-/* MFIS */
-/* FIXME: pointing where? */
-#define SMFRAM 0xe6a70000
-
-/* AP-System Core */
-#define APARMBAREA IOMEM(0xe6f10020)
-
-#ifdef CONFIG_PM
-
-#define PM_DOMAIN_ON_OFF_LATENCY_NS 250000
-
-static int sh7372_a4r_pd_suspend(void)
-{
- sh7372_intcs_suspend();
- __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */
- return 0;
-}
-
-static bool a4s_suspend_ready;
-
-static int sh7372_a4s_pd_suspend(void)
-{
- /*
- * The A4S domain contains the CPU core and therefore it should
- * only be turned off if the CPU is not in use. This may happen
- * during system suspend, when SYSC is going to be used for generating
- * resume signals and a4s_suspend_ready is set to let
- * sh7372_enter_suspend() know that it can turn A4S off.
- */
- a4s_suspend_ready = true;
- return -EBUSY;
-}
-
-static void sh7372_a4s_pd_resume(void)
-{
- a4s_suspend_ready = false;
-}
-
-static int sh7372_a3sp_pd_suspend(void)
-{
- /*
- * Serial consoles make use of SCIF hardware located in A3SP,
- * keep such power domain on if "no_console_suspend" is set.
- */
- return console_suspend_enabled ? 0 : -EBUSY;
-}
-
-static struct rmobile_pm_domain sh7372_pm_domains[] = {
- {
- .genpd.name = "A4LC",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 1,
- },
- {
- .genpd.name = "A4MP",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 2,
- },
- {
- .genpd.name = "D4",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 3,
- },
- {
- .genpd.name = "A4R",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 5,
- .suspend = sh7372_a4r_pd_suspend,
- .resume = sh7372_intcs_resume,
- },
- {
- .genpd.name = "A3RV",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 6,
- },
- {
- .genpd.name = "A3RI",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 8,
- },
- {
- .genpd.name = "A4S",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 10,
- .gov = &pm_domain_always_on_gov,
- .no_debug = true,
- .suspend = sh7372_a4s_pd_suspend,
- .resume = sh7372_a4s_pd_resume,
- },
- {
- .genpd.name = "A3SP",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 11,
- .gov = &pm_domain_always_on_gov,
- .no_debug = true,
- .suspend = sh7372_a3sp_pd_suspend,
- },
- {
- .genpd.name = "A3SG",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 13,
- },
-};
-
-void __init sh7372_init_pm_domains(void)
-{
- rmobile_init_domains(sh7372_pm_domains, ARRAY_SIZE(sh7372_pm_domains));
- pm_genpd_add_subdomain_names("A4LC", "A3RV");
- pm_genpd_add_subdomain_names("A4R", "A4LC");
- pm_genpd_add_subdomain_names("A4S", "A3SG");
- pm_genpd_add_subdomain_names("A4S", "A3SP");
-}
-
-#endif /* CONFIG_PM */
-
-#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
-static void sh7372_set_reset_vector(unsigned long address)
-{
- /* set reset vector, translate 4k */
- __raw_writel(address, SBAR);
- __raw_writel(0, APARMBAREA);
-}
-
-static void sh7372_enter_sysc(int pllc0_on, unsigned long sleep_mode)
-{
- if (pllc0_on)
- __raw_writel(0, PLLC01STPCR);
- else
- __raw_writel(1 << 28, PLLC01STPCR);
-
- __raw_readl(WUPSFAC); /* read wakeup int. factor before sleep */
- cpu_suspend(sleep_mode, sh7372_do_idle_sysc);
- __raw_readl(WUPSFAC); /* read wakeup int. factor after wakeup */
-
- /* disable reset vector translation */
- __raw_writel(0, SBAR);
-}
-
-static int sh7372_sysc_valid(unsigned long *mskp, unsigned long *msk2p)
-{
- unsigned long mstpsr0, mstpsr1, mstpsr2, mstpsr3, mstpsr4;
- unsigned long msk, msk2;
-
- /* check active clocks to determine potential wakeup sources */
-
- mstpsr0 = __raw_readl(MSTPSR0);
- if ((mstpsr0 & 0x00000003) != 0x00000003) {
- pr_debug("sh7372 mstpsr0 0x%08lx\n", mstpsr0);
- return 0;
- }
-
- mstpsr1 = __raw_readl(MSTPSR1);
- if ((mstpsr1 & 0xff079b7f) != 0xff079b7f) {
- pr_debug("sh7372 mstpsr1 0x%08lx\n", mstpsr1);
- return 0;
- }
-
- mstpsr2 = __raw_readl(MSTPSR2);
- if ((mstpsr2 & 0x000741ff) != 0x000741ff) {
- pr_debug("sh7372 mstpsr2 0x%08lx\n", mstpsr2);
- return 0;
- }
-
- mstpsr3 = __raw_readl(MSTPSR3);
- if ((mstpsr3 & 0x1a60f010) != 0x1a60f010) {
- pr_debug("sh7372 mstpsr3 0x%08lx\n", mstpsr3);
- return 0;
- }
-
- mstpsr4 = __raw_readl(MSTPSR4);
- if ((mstpsr4 & 0x00008cf0) != 0x00008cf0) {
- pr_debug("sh7372 mstpsr4 0x%08lx\n", mstpsr4);
- return 0;
- }
-
- msk = 0;
- msk2 = 0;
-
- /* make bitmaps of limited number of wakeup sources */
-
- if ((mstpsr2 & (1 << 23)) = 0) /* SPU2 */
- msk |= 1 << 31;
-
- if ((mstpsr2 & (1 << 12)) = 0) /* MFI_MFIM */
- msk |= 1 << 21;
-
- if ((mstpsr4 & (1 << 3)) = 0) /* KEYSC */
- msk |= 1 << 2;
-
- if ((mstpsr1 & (1 << 24)) = 0) /* CMT0 */
- msk |= 1 << 1;
-
- if ((mstpsr3 & (1 << 29)) = 0) /* CMT1 */
- msk |= 1 << 1;
-
- if ((mstpsr4 & (1 << 0)) = 0) /* CMT2 */
- msk |= 1 << 1;
-
- if ((mstpsr2 & (1 << 13)) = 0) /* MFI_MFIS */
- msk2 |= 1 << 17;
-
- *mskp = msk;
- *msk2p = msk2;
-
- return 1;
-}
-
-static void sh7372_icr_to_irqcr(unsigned long icr, u16 *irqcr1p, u16 *irqcr2p)
-{
- u16 tmp, irqcr1, irqcr2;
- int k;
-
- irqcr1 = 0;
- irqcr2 = 0;
-
- /* convert INTCA ICR register layout to SYSC IRQCR+IRQCR2 */
- for (k = 0; k <= 7; k++) {
- tmp = (icr >> ((7 - k) * 4)) & 0xf;
- irqcr1 |= (tmp & 0x03) << (k * 2);
- irqcr2 |= (tmp >> 2) << (k * 2);
- }
-
- *irqcr1p = irqcr1;
- *irqcr2p = irqcr2;
-}
-
-static void sh7372_setup_sysc(unsigned long msk, unsigned long msk2)
-{
- u16 irqcrx_low, irqcrx_high, irqcry_low, irqcry_high;
- unsigned long tmp;
-
- /* read IRQ0A -> IRQ15A mask */
- tmp = bitrev8(__raw_readb(INTMSK00A));
- tmp |= bitrev8(__raw_readb(INTMSK10A)) << 8;
-
- /* setup WUPSMSK from clocks and external IRQ mask */
- msk = (~msk & 0xc030000f) | (tmp << 4);
- __raw_writel(msk, WUPSMSK);
-
- /* propage level/edge trigger for external IRQ 0->15 */
- sh7372_icr_to_irqcr(__raw_readl(ICR1A), &irqcrx_low, &irqcry_low);
- sh7372_icr_to_irqcr(__raw_readl(ICR2A), &irqcrx_high, &irqcry_high);
- __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR);
- __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR2);
-
- /* read IRQ16A -> IRQ31A mask */
- tmp = bitrev8(__raw_readb(INTMSK20A));
- tmp |= bitrev8(__raw_readb(INTMSK30A)) << 8;
-
- /* setup WUPSMSK2 from clocks and external IRQ mask */
- msk2 = (~msk2 & 0x00030000) | tmp;
- __raw_writel(msk2, WUPSMSK2);
-
- /* propage level/edge trigger for external IRQ 16->31 */
- sh7372_icr_to_irqcr(__raw_readl(ICR3A), &irqcrx_low, &irqcry_low);
- sh7372_icr_to_irqcr(__raw_readl(ICR4A), &irqcrx_high, &irqcry_high);
- __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR3);
- __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR4);
-}
-
-static void sh7372_enter_a3sm_common(int pllc0_on)
-{
- /* use INTCA together with SYSC for wakeup */
- sh7372_setup_sysc(1 << 0, 0);
- sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
- sh7372_enter_sysc(pllc0_on, 1 << 12);
-}
-
-static void sh7372_enter_a4s_common(int pllc0_on)
-{
- sh7372_intca_suspend();
- sh7372_set_reset_vector(SMFRAM);
- sh7372_enter_sysc(pllc0_on, 1 << 10);
- sh7372_intca_resume();
-}
-
-static void sh7372_pm_setup_smfram(void)
-{
- /* pass physical address of cpu_resume() to assembly resume code */
- sh7372_cpu_resume = virt_to_phys(cpu_resume);
-
- memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
-}
-#else
-static inline void sh7372_pm_setup_smfram(void) {}
-#endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */
-
-#ifdef CONFIG_CPU_IDLE
-static int sh7372_do_idle_core_standby(unsigned long unused)
-{
- cpu_do_idle(); /* WFI when SYSTBCR = 0x10 -> Core Standby */
- return 0;
-}
-
-static int sh7372_enter_core_standby(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
-
- /* enter sleep mode with SYSTBCR to 0x10 */
- __raw_writel(0x10, SYSTBCR);
- cpu_suspend(0, sh7372_do_idle_core_standby);
- __raw_writel(0, SYSTBCR);
-
- /* disable reset vector translation */
- __raw_writel(0, SBAR);
-
- return 1;
-}
-
-static int sh7372_enter_a3sm_pll_on(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- sh7372_enter_a3sm_common(1);
- return 2;
-}
-
-static int sh7372_enter_a3sm_pll_off(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- sh7372_enter_a3sm_common(0);
- return 3;
-}
-
-static int sh7372_enter_a4s(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- unsigned long msk, msk2;
-
- if (!sh7372_sysc_valid(&msk, &msk2))
- return sh7372_enter_a3sm_pll_off(dev, drv, index);
-
- sh7372_setup_sysc(msk, msk2);
- sh7372_enter_a4s_common(0);
- return 4;
-}
-
-static struct cpuidle_driver sh7372_cpuidle_driver = {
- .name = "sh7372_cpuidle",
- .owner = THIS_MODULE,
- .state_count = 5,
- .safe_state_index = 0, /* C1 */
- .states[0] = ARM_CPUIDLE_WFI_STATE,
- .states[1] = {
- .name = "C2",
- .desc = "Core Standby Mode",
- .exit_latency = 10,
- .target_residency = 20 + 10,
- .enter = sh7372_enter_core_standby,
- },
- .states[2] = {
- .name = "C3",
- .desc = "A3SM PLL ON",
- .exit_latency = 20,
- .target_residency = 30 + 20,
- .enter = sh7372_enter_a3sm_pll_on,
- },
- .states[3] = {
- .name = "C4",
- .desc = "A3SM PLL OFF",
- .exit_latency = 120,
- .target_residency = 30 + 120,
- .enter = sh7372_enter_a3sm_pll_off,
- },
- .states[4] = {
- .name = "C5",
- .desc = "A4S PLL OFF",
- .exit_latency = 240,
- .target_residency = 30 + 240,
- .enter = sh7372_enter_a4s,
- .disabled = true,
- },
-};
-
-static void __init sh7372_cpuidle_init(void)
-{
- shmobile_cpuidle_set_driver(&sh7372_cpuidle_driver);
-}
-#else
-static void __init sh7372_cpuidle_init(void) {}
-#endif
-
-#ifdef CONFIG_SUSPEND
-static int sh7372_enter_suspend(suspend_state_t suspend_state)
-{
- unsigned long msk, msk2;
-
- /* check active clocks to determine potential wakeup sources */
- if (sh7372_sysc_valid(&msk, &msk2) && a4s_suspend_ready) {
- /* convert INTC mask/sense to SYSC mask/sense */
- sh7372_setup_sysc(msk, msk2);
-
- /* enter A4S sleep with PLLC0 off */
- pr_debug("entering A4S\n");
- sh7372_enter_a4s_common(0);
- return 0;
- }
-
- /* default to enter A3SM sleep with PLLC0 off */
- pr_debug("entering A3SM\n");
- sh7372_enter_a3sm_common(0);
- return 0;
-}
-
-/**
- * sh7372_pm_notifier_fn - SH7372 PM notifier routine.
- * @notifier: Unused.
- * @pm_event: Event being handled.
- * @unused: Unused.
- */
-static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
- unsigned long pm_event, void *unused)
-{
- switch (pm_event) {
- case PM_SUSPEND_PREPARE:
- /*
- * This is necessary, because the A4R domain has to be "on"
- * when suspend_device_irqs() and resume_device_irqs() are
- * executed during system suspend and resume, respectively, so
- * that those functions don't crash while accessing the INTCS.
- */
- pm_genpd_name_poweron("A4R");
- break;
- case PM_POST_SUSPEND:
- pm_genpd_poweroff_unused();
- break;
- }
-
- return NOTIFY_DONE;
-}
-
-static void sh7372_suspend_init(void)
-{
- shmobile_suspend_ops.enter = sh7372_enter_suspend;
- pm_notifier(sh7372_pm_notifier_fn, 0);
-}
-#else
-static void sh7372_suspend_init(void) {}
-#endif
-
-void __init sh7372_pm_init(void)
-{
- /* enable DBG hardware block to kick SYSC */
- __raw_writel(0x0000a500, DBGREG9);
- __raw_writel(0x0000a501, DBGREG9);
- __raw_writel(0x00000000, DBGREG1);
-
- /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
- __raw_writel(0, PDNSEL);
-
- sh7372_pm_setup_smfram();
-
- sh7372_suspend_init();
- sh7372_cpuidle_init();
-}
-
-void __init sh7372_pm_init_late(void)
-{
- shmobile_init_late();
- pm_genpd_name_attach_cpuidle("A4S", 4);
-}
--- 0001/arch/arm/mach-shmobile/setup-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,1016 +0,0 @@
-/*
- * sh7372 processor support
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Yoshihiro Shimoda
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/of_platform.h>
-#include <linux/uio_driver.h>
-#include <linux/delay.h>
-#include <linux/input.h>
-#include <linux/io.h>
-#include <linux/serial_sci.h>
-#include <linux/sh_dma.h>
-#include <linux/sh_timer.h>
-#include <linux/pm_domain.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_data/sh_ipmmu.h>
-
-#include <asm/mach/map.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-
-#include "common.h"
-#include "dma-register.h"
-#include "intc.h"
-#include "irqs.h"
-#include "pm-rmobile.h"
-#include "sh7372.h"
-
-static struct map_desc sh7372_io_desc[] __initdata = {
- /* create a 1:1 identity mapping for 0xe6xxxxxx
- * used by CPGA, INTC and PFC.
- */
- {
- .virtual = 0xe6000000,
- .pfn = __phys_to_pfn(0xe6000000),
- .length = 256 << 20,
- .type = MT_DEVICE_NONSHARED
- },
-};
-
-void __init sh7372_map_io(void)
-{
- debug_ll_io_init();
- iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
-}
-
-/* PFC */
-static struct resource sh7372_pfc_resources[] = {
- [0] = {
- .start = 0xe6050000,
- .end = 0xe6057fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0xe605800c,
- .end = 0xe6058027,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device sh7372_pfc_device = {
- .name = "pfc-sh7372",
- .id = -1,
- .resource = sh7372_pfc_resources,
- .num_resources = ARRAY_SIZE(sh7372_pfc_resources),
-};
-
-void __init sh7372_pinmux_init(void)
-{
- platform_device_register(&sh7372_pfc_device);
-}
-
-/* SCIF */
-#define SH7372_SCIF(scif_type, index, baseaddr, irq) \
-static struct plat_sci_port scif##index##_platform_data = { \
- .type = scif_type, \
- .flags = UPF_BOOT_AUTOCONF, \
- .scscr = SCSCR_RE | SCSCR_TE, \
-}; \
- \
-static struct resource scif##index##_resources[] = { \
- DEFINE_RES_MEM(baseaddr, 0x100), \
- DEFINE_RES_IRQ(irq), \
-}; \
- \
-static struct platform_device scif##index##_device = { \
- .name = "sh-sci", \
- .id = index, \
- .resource = scif##index##_resources, \
- .num_resources = ARRAY_SIZE(scif##index##_resources), \
- .dev = { \
- .platform_data = &scif##index##_platform_data, \
- }, \
-}
-
-SH7372_SCIF(PORT_SCIFA, 0, 0xe6c40000, evt2irq(0x0c00));
-SH7372_SCIF(PORT_SCIFA, 1, 0xe6c50000, evt2irq(0x0c20));
-SH7372_SCIF(PORT_SCIFA, 2, 0xe6c60000, evt2irq(0x0c40));
-SH7372_SCIF(PORT_SCIFA, 3, 0xe6c70000, evt2irq(0x0c60));
-SH7372_SCIF(PORT_SCIFA, 4, 0xe6c80000, evt2irq(0x0d20));
-SH7372_SCIF(PORT_SCIFA, 5, 0xe6cb0000, evt2irq(0x0d40));
-SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60));
-
-/* CMT */
-static struct sh_timer_config cmt2_platform_data = {
- .channels_mask = 0x20,
-};
-
-static struct resource cmt2_resources[] = {
- DEFINE_RES_MEM(0xe6130000, 0x50),
- DEFINE_RES_IRQ(evt2irq(0x0b80)),
-};
-
-static struct platform_device cmt2_device = {
- .name = "sh-cmt-32-fast",
- .id = 2,
- .dev = {
- .platform_data = &cmt2_platform_data,
- },
- .resource = cmt2_resources,
- .num_resources = ARRAY_SIZE(cmt2_resources),
-};
-
-/* TMU */
-static struct sh_timer_config tmu0_platform_data = {
- .channels_mask = 7,
-};
-
-static struct resource tmu0_resources[] = {
- DEFINE_RES_MEM(0xfff60000, 0x2c),
- DEFINE_RES_IRQ(intcs_evt2irq(0xe80)),
- DEFINE_RES_IRQ(intcs_evt2irq(0xea0)),
- DEFINE_RES_IRQ(intcs_evt2irq(0xec0)),
-};
-
-static struct platform_device tmu0_device = {
- .name = "sh-tmu",
- .id = 0,
- .dev = {
- .platform_data = &tmu0_platform_data,
- },
- .resource = tmu0_resources,
- .num_resources = ARRAY_SIZE(tmu0_resources),
-};
-
-/* I2C */
-static struct resource iic0_resources[] = {
- [0] = {
- .name = "IIC0",
- .start = 0xFFF20000,
- .end = 0xFFF20425 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0xe00), /* IIC0_ALI0 */
- .end = intcs_evt2irq(0xe60), /* IIC0_DTEI0 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device iic0_device = {
- .name = "i2c-sh_mobile",
- .id = 0, /* "i2c0" clock */
- .num_resources = ARRAY_SIZE(iic0_resources),
- .resource = iic0_resources,
-};
-
-static struct resource iic1_resources[] = {
- [0] = {
- .name = "IIC1",
- .start = 0xE6C20000,
- .end = 0xE6C20425 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x780), /* IIC1_ALI1 */
- .end = evt2irq(0x7e0), /* IIC1_DTEI1 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device iic1_device = {
- .name = "i2c-sh_mobile",
- .id = 1, /* "i2c1" clock */
- .num_resources = ARRAY_SIZE(iic1_resources),
- .resource = iic1_resources,
-};
-
-/* DMA */
-static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
- {
- .slave_id = SHDMA_SLAVE_SCIF0_TX,
- .addr = 0xe6c40020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x21,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF0_RX,
- .addr = 0xe6c40024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x22,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF1_TX,
- .addr = 0xe6c50020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x25,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF1_RX,
- .addr = 0xe6c50024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x26,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF2_TX,
- .addr = 0xe6c60020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x29,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF2_RX,
- .addr = 0xe6c60024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x2a,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF3_TX,
- .addr = 0xe6c70020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x2d,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF3_RX,
- .addr = 0xe6c70024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x2e,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF4_TX,
- .addr = 0xe6c80020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x39,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF4_RX,
- .addr = 0xe6c80024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x3a,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF5_TX,
- .addr = 0xe6cb0020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x35,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF5_RX,
- .addr = 0xe6cb0024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x36,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF6_TX,
- .addr = 0xe6c30040,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x3d,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF6_RX,
- .addr = 0xe6c30060,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x3e,
- }, {
- .slave_id = SHDMA_SLAVE_FLCTL0_TX,
- .addr = 0xe6a30050,
- .chcr = CHCR_TX(XMIT_SZ_32BIT),
- .mid_rid = 0x83,
- }, {
- .slave_id = SHDMA_SLAVE_FLCTL0_RX,
- .addr = 0xe6a30050,
- .chcr = CHCR_RX(XMIT_SZ_32BIT),
- .mid_rid = 0x83,
- }, {
- .slave_id = SHDMA_SLAVE_FLCTL1_TX,
- .addr = 0xe6a30060,
- .chcr = CHCR_TX(XMIT_SZ_32BIT),
- .mid_rid = 0x87,
- }, {
- .slave_id = SHDMA_SLAVE_FLCTL1_RX,
- .addr = 0xe6a30060,
- .chcr = CHCR_RX(XMIT_SZ_32BIT),
- .mid_rid = 0x87,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI0_TX,
- .addr = 0xe6850030,
- .chcr = CHCR_TX(XMIT_SZ_16BIT),
- .mid_rid = 0xc1,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI0_RX,
- .addr = 0xe6850030,
- .chcr = CHCR_RX(XMIT_SZ_16BIT),
- .mid_rid = 0xc2,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI1_TX,
- .addr = 0xe6860030,
- .chcr = CHCR_TX(XMIT_SZ_16BIT),
- .mid_rid = 0xc9,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI1_RX,
- .addr = 0xe6860030,
- .chcr = CHCR_RX(XMIT_SZ_16BIT),
- .mid_rid = 0xca,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI2_TX,
- .addr = 0xe6870030,
- .chcr = CHCR_TX(XMIT_SZ_16BIT),
- .mid_rid = 0xcd,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI2_RX,
- .addr = 0xe6870030,
- .chcr = CHCR_RX(XMIT_SZ_16BIT),
- .mid_rid = 0xce,
- }, {
- .slave_id = SHDMA_SLAVE_FSIA_TX,
- .addr = 0xfe1f0024,
- .chcr = CHCR_TX(XMIT_SZ_32BIT),
- .mid_rid = 0xb1,
- }, {
- .slave_id = SHDMA_SLAVE_FSIA_RX,
- .addr = 0xfe1f0020,
- .chcr = CHCR_RX(XMIT_SZ_32BIT),
- .mid_rid = 0xb2,
- }, {
- .slave_id = SHDMA_SLAVE_MMCIF_TX,
- .addr = 0xe6bd0034,
- .chcr = CHCR_TX(XMIT_SZ_32BIT),
- .mid_rid = 0xd1,
- }, {
- .slave_id = SHDMA_SLAVE_MMCIF_RX,
- .addr = 0xe6bd0034,
- .chcr = CHCR_RX(XMIT_SZ_32BIT),
- .mid_rid = 0xd2,
- },
-};
-
-#define SH7372_CHCLR (0x220 - 0x20)
-
-static const struct sh_dmae_channel sh7372_dmae_channels[] = {
- {
- .offset = 0,
- .dmars = 0,
- .dmars_bit = 0,
- .chclr_offset = SH7372_CHCLR + 0,
- }, {
- .offset = 0x10,
- .dmars = 0,
- .dmars_bit = 8,
- .chclr_offset = SH7372_CHCLR + 0x10,
- }, {
- .offset = 0x20,
- .dmars = 4,
- .dmars_bit = 0,
- .chclr_offset = SH7372_CHCLR + 0x20,
- }, {
- .offset = 0x30,
- .dmars = 4,
- .dmars_bit = 8,
- .chclr_offset = SH7372_CHCLR + 0x30,
- }, {
- .offset = 0x50,
- .dmars = 8,
- .dmars_bit = 0,
- .chclr_offset = SH7372_CHCLR + 0x50,
- }, {
- .offset = 0x60,
- .dmars = 8,
- .dmars_bit = 8,
- .chclr_offset = SH7372_CHCLR + 0x60,
- }
-};
-
-static struct sh_dmae_pdata dma_platform_data = {
- .slave = sh7372_dmae_slaves,
- .slave_num = ARRAY_SIZE(sh7372_dmae_slaves),
- .channel = sh7372_dmae_channels,
- .channel_num = ARRAY_SIZE(sh7372_dmae_channels),
- .ts_low_shift = TS_LOW_SHIFT,
- .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
- .ts_high_shift = TS_HI_SHIFT,
- .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
- .ts_shift = dma_ts_shift,
- .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
- .dmaor_init = DMAOR_DME,
- .chclr_present = 1,
-};
-
-/* Resource order important! */
-static struct resource sh7372_dmae0_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xfe008020,
- .end = 0xfe00828f,
- .flags = IORESOURCE_MEM,
- },
- {
- /* DMARSx */
- .start = 0xfe009000,
- .end = 0xfe00900b,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "error_irq",
- .start = evt2irq(0x20c0),
- .end = evt2irq(0x20c0),
- .flags = IORESOURCE_IRQ,
- },
- {
- /* IRQ for channels 0-5 */
- .start = evt2irq(0x2000),
- .end = evt2irq(0x20a0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-/* Resource order important! */
-static struct resource sh7372_dmae1_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xfe018020,
- .end = 0xfe01828f,
- .flags = IORESOURCE_MEM,
- },
- {
- /* DMARSx */
- .start = 0xfe019000,
- .end = 0xfe01900b,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "error_irq",
- .start = evt2irq(0x21c0),
- .end = evt2irq(0x21c0),
- .flags = IORESOURCE_IRQ,
- },
- {
- /* IRQ for channels 0-5 */
- .start = evt2irq(0x2100),
- .end = evt2irq(0x21a0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-/* Resource order important! */
-static struct resource sh7372_dmae2_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xfe028020,
- .end = 0xfe02828f,
- .flags = IORESOURCE_MEM,
- },
- {
- /* DMARSx */
- .start = 0xfe029000,
- .end = 0xfe02900b,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "error_irq",
- .start = evt2irq(0x22c0),
- .end = evt2irq(0x22c0),
- .flags = IORESOURCE_IRQ,
- },
- {
- /* IRQ for channels 0-5 */
- .start = evt2irq(0x2200),
- .end = evt2irq(0x22a0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device dma0_device = {
- .name = "sh-dma-engine",
- .id = 0,
- .resource = sh7372_dmae0_resources,
- .num_resources = ARRAY_SIZE(sh7372_dmae0_resources),
- .dev = {
- .platform_data = &dma_platform_data,
- },
-};
-
-static struct platform_device dma1_device = {
- .name = "sh-dma-engine",
- .id = 1,
- .resource = sh7372_dmae1_resources,
- .num_resources = ARRAY_SIZE(sh7372_dmae1_resources),
- .dev = {
- .platform_data = &dma_platform_data,
- },
-};
-
-static struct platform_device dma2_device = {
- .name = "sh-dma-engine",
- .id = 2,
- .resource = sh7372_dmae2_resources,
- .num_resources = ARRAY_SIZE(sh7372_dmae2_resources),
- .dev = {
- .platform_data = &dma_platform_data,
- },
-};
-
-/*
- * USB-DMAC
- */
-static const struct sh_dmae_channel sh7372_usb_dmae_channels[] = {
- {
- .offset = 0,
- }, {
- .offset = 0x20,
- },
-};
-
-/* USB DMAC0 */
-static const struct sh_dmae_slave_config sh7372_usb_dmae0_slaves[] = {
- {
- .slave_id = SHDMA_SLAVE_USB0_TX,
- .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
- }, {
- .slave_id = SHDMA_SLAVE_USB0_RX,
- .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
- },
-};
-
-static struct sh_dmae_pdata usb_dma0_platform_data = {
- .slave = sh7372_usb_dmae0_slaves,
- .slave_num = ARRAY_SIZE(sh7372_usb_dmae0_slaves),
- .channel = sh7372_usb_dmae_channels,
- .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
- .ts_low_shift = USBTS_LOW_SHIFT,
- .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
- .ts_high_shift = USBTS_HI_SHIFT,
- .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
- .ts_shift = dma_usbts_shift,
- .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
- .dmaor_init = DMAOR_DME,
- .chcr_offset = 0x14,
- .chcr_ie_bit = 1 << 5,
- .dmaor_is_32bit = 1,
- .needs_tend_set = 1,
- .no_dmars = 1,
- .slave_only = 1,
-};
-
-static struct resource sh7372_usb_dmae0_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xe68a0020,
- .end = 0xe68a0064 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- /* VCR/SWR/DMICR */
- .start = 0xe68a0000,
- .end = 0xe68a0014 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- /* IRQ for channels */
- .start = evt2irq(0x0a00),
- .end = evt2irq(0x0a00),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usb_dma0_device = {
- .name = "sh-dma-engine",
- .id = 3,
- .resource = sh7372_usb_dmae0_resources,
- .num_resources = ARRAY_SIZE(sh7372_usb_dmae0_resources),
- .dev = {
- .platform_data = &usb_dma0_platform_data,
- },
-};
-
-/* USB DMAC1 */
-static const struct sh_dmae_slave_config sh7372_usb_dmae1_slaves[] = {
- {
- .slave_id = SHDMA_SLAVE_USB1_TX,
- .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
- }, {
- .slave_id = SHDMA_SLAVE_USB1_RX,
- .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
- },
-};
-
-static struct sh_dmae_pdata usb_dma1_platform_data = {
- .slave = sh7372_usb_dmae1_slaves,
- .slave_num = ARRAY_SIZE(sh7372_usb_dmae1_slaves),
- .channel = sh7372_usb_dmae_channels,
- .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
- .ts_low_shift = USBTS_LOW_SHIFT,
- .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
- .ts_high_shift = USBTS_HI_SHIFT,
- .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
- .ts_shift = dma_usbts_shift,
- .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
- .dmaor_init = DMAOR_DME,
- .chcr_offset = 0x14,
- .chcr_ie_bit = 1 << 5,
- .dmaor_is_32bit = 1,
- .needs_tend_set = 1,
- .no_dmars = 1,
- .slave_only = 1,
-};
-
-static struct resource sh7372_usb_dmae1_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xe68c0020,
- .end = 0xe68c0064 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- /* VCR/SWR/DMICR */
- .start = 0xe68c0000,
- .end = 0xe68c0014 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- /* IRQ for channels */
- .start = evt2irq(0x1d00),
- .end = evt2irq(0x1d00),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usb_dma1_device = {
- .name = "sh-dma-engine",
- .id = 4,
- .resource = sh7372_usb_dmae1_resources,
- .num_resources = ARRAY_SIZE(sh7372_usb_dmae1_resources),
- .dev = {
- .platform_data = &usb_dma1_platform_data,
- },
-};
-
-/* VPU */
-static struct uio_info vpu_platform_data = {
- .name = "VPU5HG",
- .version = "0",
- .irq = intcs_evt2irq(0x980),
-};
-
-static struct resource vpu_resources[] = {
- [0] = {
- .name = "VPU",
- .start = 0xfe900000,
- .end = 0xfe900157,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device vpu_device = {
- .name = "uio_pdrv_genirq",
- .id = 0,
- .dev = {
- .platform_data = &vpu_platform_data,
- },
- .resource = vpu_resources,
- .num_resources = ARRAY_SIZE(vpu_resources),
-};
-
-/* VEU0 */
-static struct uio_info veu0_platform_data = {
- .name = "VEU0",
- .version = "0",
- .irq = intcs_evt2irq(0x700),
-};
-
-static struct resource veu0_resources[] = {
- [0] = {
- .name = "VEU0",
- .start = 0xfe920000,
- .end = 0xfe9200cb,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu0_device = {
- .name = "uio_pdrv_genirq",
- .id = 1,
- .dev = {
- .platform_data = &veu0_platform_data,
- },
- .resource = veu0_resources,
- .num_resources = ARRAY_SIZE(veu0_resources),
-};
-
-/* VEU1 */
-static struct uio_info veu1_platform_data = {
- .name = "VEU1",
- .version = "0",
- .irq = intcs_evt2irq(0x720),
-};
-
-static struct resource veu1_resources[] = {
- [0] = {
- .name = "VEU1",
- .start = 0xfe924000,
- .end = 0xfe9240cb,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu1_device = {
- .name = "uio_pdrv_genirq",
- .id = 2,
- .dev = {
- .platform_data = &veu1_platform_data,
- },
- .resource = veu1_resources,
- .num_resources = ARRAY_SIZE(veu1_resources),
-};
-
-/* VEU2 */
-static struct uio_info veu2_platform_data = {
- .name = "VEU2",
- .version = "0",
- .irq = intcs_evt2irq(0x740),
-};
-
-static struct resource veu2_resources[] = {
- [0] = {
- .name = "VEU2",
- .start = 0xfe928000,
- .end = 0xfe928307,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu2_device = {
- .name = "uio_pdrv_genirq",
- .id = 3,
- .dev = {
- .platform_data = &veu2_platform_data,
- },
- .resource = veu2_resources,
- .num_resources = ARRAY_SIZE(veu2_resources),
-};
-
-/* VEU3 */
-static struct uio_info veu3_platform_data = {
- .name = "VEU3",
- .version = "0",
- .irq = intcs_evt2irq(0x760),
-};
-
-static struct resource veu3_resources[] = {
- [0] = {
- .name = "VEU3",
- .start = 0xfe92c000,
- .end = 0xfe92c307,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu3_device = {
- .name = "uio_pdrv_genirq",
- .id = 4,
- .dev = {
- .platform_data = &veu3_platform_data,
- },
- .resource = veu3_resources,
- .num_resources = ARRAY_SIZE(veu3_resources),
-};
-
-/* JPU */
-static struct uio_info jpu_platform_data = {
- .name = "JPU",
- .version = "0",
- .irq = intcs_evt2irq(0x560),
-};
-
-static struct resource jpu_resources[] = {
- [0] = {
- .name = "JPU",
- .start = 0xfe980000,
- .end = 0xfe9902d3,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device jpu_device = {
- .name = "uio_pdrv_genirq",
- .id = 5,
- .dev = {
- .platform_data = &jpu_platform_data,
- },
- .resource = jpu_resources,
- .num_resources = ARRAY_SIZE(jpu_resources),
-};
-
-/* SPU2DSP0 */
-static struct uio_info spu0_platform_data = {
- .name = "SPU2DSP0",
- .version = "0",
- .irq = evt2irq(0x1800),
-};
-
-static struct resource spu0_resources[] = {
- [0] = {
- .name = "SPU2DSP0",
- .start = 0xfe200000,
- .end = 0xfe2fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device spu0_device = {
- .name = "uio_pdrv_genirq",
- .id = 6,
- .dev = {
- .platform_data = &spu0_platform_data,
- },
- .resource = spu0_resources,
- .num_resources = ARRAY_SIZE(spu0_resources),
-};
-
-/* SPU2DSP1 */
-static struct uio_info spu1_platform_data = {
- .name = "SPU2DSP1",
- .version = "0",
- .irq = evt2irq(0x1820),
-};
-
-static struct resource spu1_resources[] = {
- [0] = {
- .name = "SPU2DSP1",
- .start = 0xfe300000,
- .end = 0xfe3fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device spu1_device = {
- .name = "uio_pdrv_genirq",
- .id = 7,
- .dev = {
- .platform_data = &spu1_platform_data,
- },
- .resource = spu1_resources,
- .num_resources = ARRAY_SIZE(spu1_resources),
-};
-
-/* IPMMUI (an IPMMU module for ICB/LMB) */
-static struct resource ipmmu_resources[] = {
- [0] = {
- .name = "IPMMUI",
- .start = 0xfe951000,
- .end = 0xfe9510ff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static const char * const ipmmu_dev_names[] = {
- "sh_mobile_lcdc_fb.0",
- "sh_mobile_lcdc_fb.1",
- "sh_mobile_ceu.0",
- "uio_pdrv_genirq.0",
- "uio_pdrv_genirq.1",
- "uio_pdrv_genirq.2",
- "uio_pdrv_genirq.3",
- "uio_pdrv_genirq.4",
- "uio_pdrv_genirq.5",
-};
-
-static struct shmobile_ipmmu_platform_data ipmmu_platform_data = {
- .dev_names = ipmmu_dev_names,
- .num_dev_names = ARRAY_SIZE(ipmmu_dev_names),
-};
-
-static struct platform_device ipmmu_device = {
- .name = "ipmmu",
- .id = -1,
- .dev = {
- .platform_data = &ipmmu_platform_data,
- },
- .resource = ipmmu_resources,
- .num_resources = ARRAY_SIZE(ipmmu_resources),
-};
-
-static struct platform_device *sh7372_early_devices[] __initdata = {
- &scif0_device,
- &scif1_device,
- &scif2_device,
- &scif3_device,
- &scif4_device,
- &scif5_device,
- &scif6_device,
- &cmt2_device,
- &tmu0_device,
- &ipmmu_device,
-};
-
-static struct platform_device *sh7372_late_devices[] __initdata = {
- &iic0_device,
- &iic1_device,
- &dma0_device,
- &dma1_device,
- &dma2_device,
- &usb_dma0_device,
- &usb_dma1_device,
- &vpu_device,
- &veu0_device,
- &veu1_device,
- &veu2_device,
- &veu3_device,
- &jpu_device,
- &spu0_device,
- &spu1_device,
-};
-
-void __init sh7372_add_standard_devices(void)
-{
- static struct pm_domain_device domain_devices[] __initdata = {
- { "A3RV", &vpu_device, },
- { "A4MP", &spu0_device, },
- { "A4MP", &spu1_device, },
- { "A3SP", &scif0_device, },
- { "A3SP", &scif1_device, },
- { "A3SP", &scif2_device, },
- { "A3SP", &scif3_device, },
- { "A3SP", &scif4_device, },
- { "A3SP", &scif5_device, },
- { "A3SP", &scif6_device, },
- { "A3SP", &iic1_device, },
- { "A3SP", &dma0_device, },
- { "A3SP", &dma1_device, },
- { "A3SP", &dma2_device, },
- { "A3SP", &usb_dma0_device, },
- { "A3SP", &usb_dma1_device, },
- { "A4R", &iic0_device, },
- { "A4R", &veu0_device, },
- { "A4R", &veu1_device, },
- { "A4R", &veu2_device, },
- { "A4R", &veu3_device, },
- { "A4R", &jpu_device, },
- { "A4R", &tmu0_device, },
- };
-
- sh7372_init_pm_domains();
-
- platform_add_devices(sh7372_early_devices,
- ARRAY_SIZE(sh7372_early_devices));
-
- platform_add_devices(sh7372_late_devices,
- ARRAY_SIZE(sh7372_late_devices));
-
- rmobile_add_devices_to_domains(domain_devices,
- ARRAY_SIZE(domain_devices));
-}
-
-void __init sh7372_earlytimer_init(void)
-{
- sh7372_clock_init();
- shmobile_earlytimer_init();
-}
-
-void __init sh7372_add_early_devices(void)
-{
- early_platform_add_devices(sh7372_early_devices,
- ARRAY_SIZE(sh7372_early_devices));
-
- /* setup early console here as well */
- shmobile_setup_console();
-}
-
-#ifdef CONFIG_USE_OF
-
-void __init sh7372_add_early_devices_dt(void)
-{
- shmobile_init_delay();
-
- sh7372_add_early_devices();
-}
-
-void __init sh7372_add_standard_devices_dt(void)
-{
- /* clocks are setup late during boot in the case of DT */
- sh7372_clock_init();
-
- platform_add_devices(sh7372_early_devices,
- ARRAY_SIZE(sh7372_early_devices));
-
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char *sh7372_boards_compat_dt[] __initdata = {
- "renesas,sh7372",
- NULL,
-};
-
-DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
- .map_io = sh7372_map_io,
- .init_early = sh7372_add_early_devices_dt,
- .init_irq = sh7372_init_irq,
- .handle_irq = shmobile_handle_irq_intc,
- .init_machine = sh7372_add_standard_devices_dt,
- .init_late = shmobile_init_late,
- .dt_compat = sh7372_boards_compat_dt,
-MACHINE_END
-
-#endif /* CONFIG_USE_OF */
--- 0001/arch/arm/mach-shmobile/sh7372.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,84 +0,0 @@
-/*
- * Copyright (C) 2010 Renesas Solutions Corp.
- *
- * Kuninori Morimoto <morimoto.kuninori@renesas.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef __ASM_SH7372_H__
-#define __ASM_SH7372_H__
-
-/* DMA slave IDs */
-enum {
- SHDMA_SLAVE_INVALID,
- SHDMA_SLAVE_SCIF0_TX,
- SHDMA_SLAVE_SCIF0_RX,
- SHDMA_SLAVE_SCIF1_TX,
- SHDMA_SLAVE_SCIF1_RX,
- SHDMA_SLAVE_SCIF2_TX,
- SHDMA_SLAVE_SCIF2_RX,
- SHDMA_SLAVE_SCIF3_TX,
- SHDMA_SLAVE_SCIF3_RX,
- SHDMA_SLAVE_SCIF4_TX,
- SHDMA_SLAVE_SCIF4_RX,
- SHDMA_SLAVE_SCIF5_TX,
- SHDMA_SLAVE_SCIF5_RX,
- SHDMA_SLAVE_SCIF6_TX,
- SHDMA_SLAVE_SCIF6_RX,
- SHDMA_SLAVE_FLCTL0_TX,
- SHDMA_SLAVE_FLCTL0_RX,
- SHDMA_SLAVE_FLCTL1_TX,
- SHDMA_SLAVE_FLCTL1_RX,
- SHDMA_SLAVE_SDHI0_RX,
- SHDMA_SLAVE_SDHI0_TX,
- SHDMA_SLAVE_SDHI1_RX,
- SHDMA_SLAVE_SDHI1_TX,
- SHDMA_SLAVE_SDHI2_RX,
- SHDMA_SLAVE_SDHI2_TX,
- SHDMA_SLAVE_FSIA_RX,
- SHDMA_SLAVE_FSIA_TX,
- SHDMA_SLAVE_MMCIF_RX,
- SHDMA_SLAVE_MMCIF_TX,
- SHDMA_SLAVE_USB0_TX,
- SHDMA_SLAVE_USB0_RX,
- SHDMA_SLAVE_USB1_TX,
- SHDMA_SLAVE_USB1_RX,
-};
-
-extern struct clk sh7372_extal1_clk;
-extern struct clk sh7372_extal2_clk;
-extern struct clk sh7372_dv_clki_clk;
-extern struct clk sh7372_dv_clki_div2_clk;
-extern struct clk sh7372_pllc2_clk;
-
-extern void sh7372_init_irq(void);
-extern void sh7372_map_io(void);
-extern void sh7372_earlytimer_init(void);
-extern void sh7372_add_early_devices(void);
-extern void sh7372_add_standard_devices(void);
-extern void sh7372_add_early_devices_dt(void);
-extern void sh7372_add_standard_devices_dt(void);
-extern void sh7372_clock_init(void);
-extern void sh7372_pinmux_init(void);
-extern void sh7372_pm_init(void);
-extern void sh7372_resume_core_standby_sysc(void);
-extern int sh7372_do_idle_sysc(unsigned long sleep_mode);
-extern void sh7372_intcs_suspend(void);
-extern void sh7372_intcs_resume(void);
-extern void sh7372_intca_suspend(void);
-extern void sh7372_intca_resume(void);
-
-extern unsigned long sh7372_cpu_resume;
-
-#ifdef CONFIG_PM
-extern void __init sh7372_init_pm_domains(void);
-#else
-static inline void sh7372_init_pm_domains(void) {}
-#endif
-
-extern void __init sh7372_pm_init_late(void);
-
-#endif /* __ASM_SH7372_H__ */
--- 0001/arch/arm/mach-shmobile/sleep-sh7372.S
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,98 +0,0 @@
-/*
- * sh7372 lowlevel sleep code for "Core Standby Mode"
- *
- * Copyright (C) 2011 Magnus Damm
- *
- * In "Core Standby Mode" the ARM core is off, but L2 cache is still on
- *
- * Based on mach-omap2/sleep34xx.S
- *
- * (C) Copyright 2007 Texas Instruments
- * Karthik Dasu <karthik-dp@ti.com>
- *
- * (C) Copyright 2004 Texas Instruments, <www.ti.com>
- * Richard Woodruff <r-woodruff2@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/memory.h>
-#include <asm/assembler.h>
-
-#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
- .align 12
- .text
- .global sh7372_resume_core_standby_sysc
-sh7372_resume_core_standby_sysc:
- ldr pc, 1f
-
- .align 2
- .globl sh7372_cpu_resume
-sh7372_cpu_resume:
-1: .space 4
-
-#define SPDCR 0xe6180008
-
- /* A3SM & A4S power down */
- .global sh7372_do_idle_sysc
-sh7372_do_idle_sysc:
- mov r8, r0 /* sleep mode passed in r0 */
-
- /*
- * Clear the SCTLR.C bit to prevent further data cache
- * allocation. Clearing SCTLR.C would make all the data accesses
- * strongly ordered and would not hit the cache.
- */
- mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #(1 << 2) @ Disable the C bit
- mcr p15, 0, r0, c1, c0, 0
- isb
-
- /*
- * Clean and invalidate data cache again.
- */
- ldr r1, kernel_flush
- blx r1
-
- /* disable L2 cache in the aux control register */
- mrc p15, 0, r10, c1, c0, 1
- bic r10, r10, #2
- mcr p15, 0, r10, c1, c0, 1
- isb
-
- /*
- * The kernel doesn't interwork: v7_flush_dcache_all in particluar will
- * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled.
- * This sequence switches back to ARM. Note that .align may insert a
- * nop: bx pc needs to be word-aligned in order to work.
- */
- THUMB( .thumb )
- THUMB( .align )
- THUMB( bx pc )
- THUMB( nop )
- .arm
-
- /* Data memory barrier and Data sync barrier */
- dsb
- dmb
-
- /* SYSC power down */
- ldr r0, =SPDCR
- str r8, [r0]
-1:
- b 1b
-
- .align 2
-kernel_flush:
- .word v7_flush_dcache_all
-#endif
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
@ 2015-01-21 4:54 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove support for the legacy Cortex-A8 based sh7372 SoC.
The Linux kernel still lacks DT bindings for the sh7372 INTC
interrupt controller so DT multiplatform support is not possibile.
Also, the sh7372 SoC never went into mass production anyway so to
aid migration to DT multiplatform simply get rid of sh7372 support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/Kconfig.debug | 7
arch/arm/mach-shmobile/Kconfig | 7
arch/arm/mach-shmobile/Makefile | 5
arch/arm/mach-shmobile/clock-sh7372.c | 620 --------------------
arch/arm/mach-shmobile/common.h | 1
arch/arm/mach-shmobile/entry-intc.S | 54 -
arch/arm/mach-shmobile/intc-sh7372.c | 672 ---------------------
arch/arm/mach-shmobile/pm-sh7372.c | 549 -----------------
arch/arm/mach-shmobile/setup-sh7372.c | 1016 ---------------------------------
arch/arm/mach-shmobile/sh7372.h | 84 --
arch/arm/mach-shmobile/sleep-sh7372.S | 98 ---
11 files changed, 3 insertions(+), 3110 deletions(-)
--- 0001/arch/arm/Kconfig.debug
+++ work/arch/arm/Kconfig.debug 2015-01-21 12:24:25.967559285 +0900
@@ -722,12 +722,11 @@ choice
via SCIF2 on Renesas R-Car E2 (R8A7794).
config DEBUG_RMOBILE_SCIFA0
- bool "Kernel low-level debugging messages via SCIFA0 on R8A73A4/SH7372"
- depends on ARCH_R8A73A4 || ARCH_SH7372
+ bool "Kernel low-level debugging messages via SCIFA0 on R8A73A4"
+ depends on ARCH_R8A73A4
help
Say Y here if you want kernel low-level debugging support
- via SCIFA0 on Renesas R-Mobile APE6 (R8A73A4) or SH-Mobile
- AP4 (SH7372).
+ via SCIFA0 on Renesas R-Mobile APE6 (R8A73A4).
config DEBUG_RMOBILE_SCIFA1
bool "Kernel low-level debugging messages via SCIFA1 on R8A7740"
--- 0003/arch/arm/mach-shmobile/Kconfig
+++ work/arch/arm/mach-shmobile/Kconfig 2015-01-21 12:23:41.817559444 +0900
@@ -97,13 +97,6 @@ if ARCH_SHMOBILE_LEGACY
comment "Renesas ARM SoCs System Type"
-config ARCH_SH7372
- bool "SH-Mobile AP4 (SH7372)"
- select ARCH_RMOBILE
- select ARCH_WANT_OPTIONAL_GPIOLIB
- select ARM_CPU_SUSPEND if PM || CPU_IDLE
- select SH_INTC
-
config ARCH_SH73A0
bool "SH-Mobile AG5 (R8A73A00)"
select ARCH_RMOBILE
--- 0003/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2015-01-21 12:23:41.817559444 +0900
@@ -6,7 +6,6 @@
obj-y := timer.o console.o
# CPU objects
-obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o intc-sh7372.o pm-sh7372.o
obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o pm-sh73a0.o
obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o pm-r8a7740.o
@@ -21,7 +20,6 @@ obj-$(CONFIG_ARCH_R7S72100) += setup-r7s
# Clock objects
ifndef CONFIG_COMMON_CLK
obj-y += clock.o
-obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o
obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o
obj-$(CONFIG_ARCH_R8A7740) += clock-r8a7740.o
obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o
@@ -50,9 +48,6 @@ obj-$(CONFIG_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_PM_RCAR) += pm-rcar.o
obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o
-# special sh7372 handling for IRQ objects and low level sleep code
-obj-$(CONFIG_ARCH_SH7372) += entry-intc.o sleep-sh7372.o
-
# Board objects
ifdef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o
--- 0001/arch/arm/mach-shmobile/clock-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,620 +0,0 @@
-/*
- * SH7372 clock framework support
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/sh_clk.h>
-#include <linux/clkdev.h>
-#include "clock.h"
-#include "common.h"
-
-/* SH7372 registers */
-#define FRQCRA IOMEM(0xe6150000)
-#define FRQCRB IOMEM(0xe6150004)
-#define FRQCRC IOMEM(0xe61500e0)
-#define FRQCRD IOMEM(0xe61500e4)
-#define VCLKCR1 IOMEM(0xe6150008)
-#define VCLKCR2 IOMEM(0xe615000c)
-#define VCLKCR3 IOMEM(0xe615001c)
-#define FMSICKCR IOMEM(0xe6150010)
-#define FMSOCKCR IOMEM(0xe6150014)
-#define FSIACKCR IOMEM(0xe6150018)
-#define FSIBCKCR IOMEM(0xe6150090)
-#define SUBCKCR IOMEM(0xe6150080)
-#define SPUCKCR IOMEM(0xe6150084)
-#define VOUCKCR IOMEM(0xe6150088)
-#define HDMICKCR IOMEM(0xe6150094)
-#define DSITCKCR IOMEM(0xe6150060)
-#define DSI0PCKCR IOMEM(0xe6150064)
-#define DSI1PCKCR IOMEM(0xe6150098)
-#define PLLC01CR IOMEM(0xe6150028)
-#define PLLC2CR IOMEM(0xe615002c)
-#define RMSTPCR0 IOMEM(0xe6150110)
-#define RMSTPCR1 IOMEM(0xe6150114)
-#define RMSTPCR2 IOMEM(0xe6150118)
-#define RMSTPCR3 IOMEM(0xe615011c)
-#define RMSTPCR4 IOMEM(0xe6150120)
-#define SMSTPCR0 IOMEM(0xe6150130)
-#define SMSTPCR1 IOMEM(0xe6150134)
-#define SMSTPCR2 IOMEM(0xe6150138)
-#define SMSTPCR3 IOMEM(0xe615013c)
-#define SMSTPCR4 IOMEM(0xe6150140)
-
-#define FSIDIVA 0xFE1F8000
-#define FSIDIVB 0xFE1F8008
-
-/* Platforms must set frequency on their DV_CLKI pin */
-struct clk sh7372_dv_clki_clk = {
-};
-
-/* Fixed 32 KHz root clock from EXTALR pin */
-static struct clk r_clk = {
- .rate = 32768,
-};
-
-/*
- * 26MHz default rate for the EXTAL1 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-struct clk sh7372_extal1_clk = {
- .rate = 26000000,
-};
-
-/*
- * 48MHz default rate for the EXTAL2 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-struct clk sh7372_extal2_clk = {
- .rate = 48000000,
-};
-
-SH_CLK_RATIO(div2, 1, 2);
-
-SH_FIXED_RATIO_CLKg(sh7372_dv_clki_div2_clk, sh7372_dv_clki_clk, div2);
-SH_FIXED_RATIO_CLK(extal1_div2_clk, sh7372_extal1_clk, div2);
-SH_FIXED_RATIO_CLK(extal2_div2_clk, sh7372_extal2_clk, div2);
-SH_FIXED_RATIO_CLK(extal2_div4_clk, extal2_div2_clk, div2);
-
-/* PLLC0 and PLLC1 */
-static unsigned long pllc01_recalc(struct clk *clk)
-{
- unsigned long mult = 1;
-
- if (__raw_readl(PLLC01CR) & (1 << 14))
- mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1) * 2;
-
- return clk->parent->rate * mult;
-}
-
-static struct sh_clk_ops pllc01_clk_ops = {
- .recalc = pllc01_recalc,
-};
-
-static struct clk pllc0_clk = {
- .ops = &pllc01_clk_ops,
- .flags = CLK_ENABLE_ON_INIT,
- .parent = &extal1_div2_clk,
- .enable_reg = (void __iomem *)FRQCRC,
-};
-
-static struct clk pllc1_clk = {
- .ops = &pllc01_clk_ops,
- .flags = CLK_ENABLE_ON_INIT,
- .parent = &extal1_div2_clk,
- .enable_reg = (void __iomem *)FRQCRA,
-};
-
-/* Divide PLLC1 by two */
-SH_FIXED_RATIO_CLK(pllc1_div2_clk, pllc1_clk, div2);
-
-/* PLLC2 */
-
-/* Indices are important - they are the actual src selecting values */
-static struct clk *pllc2_parent[] = {
- [0] = &extal1_div2_clk,
- [1] = &extal2_div2_clk,
- [2] = &sh7372_dv_clki_div2_clk,
-};
-
-/* Only multipliers 20 * 2 to 46 * 2 are valid, last entry for CPUFREQ_TABLE_END */
-static struct cpufreq_frequency_table pllc2_freq_table[29];
-
-static void pllc2_table_rebuild(struct clk *clk)
-{
- int i;
-
- /* Initialise PLLC2 frequency table */
- for (i = 0; i < ARRAY_SIZE(pllc2_freq_table) - 2; i++) {
- pllc2_freq_table[i].frequency = clk->parent->rate * (i + 20) * 2;
- pllc2_freq_table[i].driver_data = i;
- }
-
- /* This is a special entry - switching PLL off makes it a repeater */
- pllc2_freq_table[i].frequency = clk->parent->rate;
- pllc2_freq_table[i].driver_data = i;
-
- pllc2_freq_table[++i].frequency = CPUFREQ_TABLE_END;
- pllc2_freq_table[i].driver_data = i;
-}
-
-static unsigned long pllc2_recalc(struct clk *clk)
-{
- unsigned long mult = 1;
-
- pllc2_table_rebuild(clk);
-
- /*
- * If the PLL is off, mult == 1, clk->rate will be updated in
- * pllc2_enable().
- */
- if (__raw_readl(PLLC2CR) & (1 << 31))
- mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2;
-
- return clk->parent->rate * mult;
-}
-
-static long pllc2_round_rate(struct clk *clk, unsigned long rate)
-{
- return clk_rate_table_round(clk, clk->freq_table, rate);
-}
-
-static int pllc2_enable(struct clk *clk)
-{
- int i;
-
- __raw_writel(__raw_readl(PLLC2CR) | 0x80000000, PLLC2CR);
-
- for (i = 0; i < 100; i++)
- if (__raw_readl(PLLC2CR) & 0x80000000) {
- clk->rate = pllc2_recalc(clk);
- return 0;
- }
-
- pr_err("%s(): timeout!\n", __func__);
-
- return -ETIMEDOUT;
-}
-
-static void pllc2_disable(struct clk *clk)
-{
- __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR);
-}
-
-static int pllc2_set_rate(struct clk *clk, unsigned long rate)
-{
- unsigned long value;
- int idx;
-
- idx = clk_rate_table_find(clk, clk->freq_table, rate);
- if (idx < 0)
- return idx;
-
- if (rate == clk->parent->rate)
- return -EINVAL;
-
- value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
-
- __raw_writel(value | ((idx + 19) << 24), PLLC2CR);
-
- clk->rate = clk->freq_table[idx].frequency;
-
- return 0;
-}
-
-static int pllc2_set_parent(struct clk *clk, struct clk *parent)
-{
- u32 value;
- int ret, i;
-
- if (!clk->parent_table || !clk->parent_num)
- return -EINVAL;
-
- /* Search the parent */
- for (i = 0; i < clk->parent_num; i++)
- if (clk->parent_table[i] == parent)
- break;
-
- if (i == clk->parent_num)
- return -ENODEV;
-
- ret = clk_reparent(clk, parent);
- if (ret < 0)
- return ret;
-
- value = __raw_readl(PLLC2CR) & ~(3 << 6);
-
- __raw_writel(value | (i << 6), PLLC2CR);
-
- /* Rebiuld the frequency table */
- pllc2_table_rebuild(clk);
-
- return 0;
-}
-
-static struct sh_clk_ops pllc2_clk_ops = {
- .recalc = pllc2_recalc,
- .round_rate = pllc2_round_rate,
- .set_rate = pllc2_set_rate,
- .enable = pllc2_enable,
- .disable = pllc2_disable,
- .set_parent = pllc2_set_parent,
-};
-
-struct clk sh7372_pllc2_clk = {
- .ops = &pllc2_clk_ops,
- .parent = &extal1_div2_clk,
- .freq_table = pllc2_freq_table,
- .nr_freqs = ARRAY_SIZE(pllc2_freq_table) - 1,
- .parent_table = pllc2_parent,
- .parent_num = ARRAY_SIZE(pllc2_parent),
-};
-
-/* External input clock (pin name: FSIACK/FSIBCK ) */
-static struct clk fsiack_clk = {
-};
-
-static struct clk fsibck_clk = {
-};
-
-static struct clk *main_clks[] = {
- &sh7372_dv_clki_clk,
- &r_clk,
- &sh7372_extal1_clk,
- &sh7372_extal2_clk,
- &sh7372_dv_clki_div2_clk,
- &extal1_div2_clk,
- &extal2_div2_clk,
- &extal2_div4_clk,
- &pllc0_clk,
- &pllc1_clk,
- &pllc1_div2_clk,
- &sh7372_pllc2_clk,
- &fsiack_clk,
- &fsibck_clk,
-};
-
-static void div4_kick(struct clk *clk)
-{
- unsigned long value;
-
- /* set KICK bit in FRQCRB to update hardware setting */
- value = __raw_readl(FRQCRB);
- value |= (1 << 31);
- __raw_writel(value, FRQCRB);
-}
-
-static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
- 24, 32, 36, 48, 0, 72, 96, 0 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
- .divisors = divisors,
- .nr_divisors = ARRAY_SIZE(divisors),
-};
-
-static struct clk_div4_table div4_table = {
- .div_mult_table = &div4_div_mult_table,
- .kick = div4_kick,
-};
-
-enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR,
- DIV4_ZX, DIV4_HP,
- DIV4_ISPB, DIV4_S, DIV4_ZB, DIV4_ZB3, DIV4_CP,
- DIV4_DDRP, DIV4_NR };
-
-#define DIV4(_reg, _bit, _mask, _flags) \
- SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags)
-
-static struct clk div4_clks[DIV4_NR] = {
- [DIV4_I] = DIV4(FRQCRA, 20, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_ZG] = DIV4(FRQCRA, 16, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_B] = DIV4(FRQCRA, 8, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_M1] = DIV4(FRQCRA, 4, 0x6fff, CLK_ENABLE_ON_INIT),
- [DIV4_CSIR] = DIV4(FRQCRA, 0, 0x6fff, 0),
- [DIV4_ZX] = DIV4(FRQCRB, 12, 0x6fff, 0),
- [DIV4_HP] = DIV4(FRQCRB, 4, 0x6fff, 0),
- [DIV4_ISPB] = DIV4(FRQCRC, 20, 0x6fff, 0),
- [DIV4_S] = DIV4(FRQCRC, 12, 0x6fff, 0),
- [DIV4_ZB] = DIV4(FRQCRC, 8, 0x6fff, 0),
- [DIV4_ZB3] = DIV4(FRQCRC, 4, 0x6fff, 0),
- [DIV4_CP] = DIV4(FRQCRC, 0, 0x6fff, 0),
- [DIV4_DDRP] = DIV4(FRQCRD, 0, 0x677c, 0),
-};
-
-enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO,
- DIV6_SUB, DIV6_SPU,
- DIV6_VOU, DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
- DIV6_NR };
-
-static struct clk div6_clks[DIV6_NR] = {
- [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0),
- [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
- [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0),
- [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0),
- [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0),
- [DIV6_SUB] = SH_CLK_DIV6(&sh7372_extal2_clk, SUBCKCR, 0),
- [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
- [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0),
- [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0),
- [DIV6_DSI0P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI0PCKCR, 0),
- [DIV6_DSI1P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI1PCKCR, 0),
-};
-
-enum { DIV6_HDMI, DIV6_FSIA, DIV6_FSIB, DIV6_REPARENT_NR };
-
-/* Indices are important - they are the actual src selecting values */
-static struct clk *hdmi_parent[] = {
- [0] = &pllc1_div2_clk,
- [1] = &sh7372_pllc2_clk,
- [2] = &sh7372_dv_clki_clk,
- [3] = NULL, /* pllc2_div4 not implemented yet */
-};
-
-static struct clk *fsiackcr_parent[] = {
- [0] = &pllc1_div2_clk,
- [1] = &sh7372_pllc2_clk,
- [2] = &fsiack_clk, /* external input for FSI A */
- [3] = NULL, /* setting prohibited */
-};
-
-static struct clk *fsibckcr_parent[] = {
- [0] = &pllc1_div2_clk,
- [1] = &sh7372_pllc2_clk,
- [2] = &fsibck_clk, /* external input for FSI B */
- [3] = NULL, /* setting prohibited */
-};
-
-static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
- [DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
- hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
- [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
- fsiackcr_parent, ARRAY_SIZE(fsiackcr_parent), 6, 2),
- [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
- fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
-};
-
-/* FSI DIV */
-enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR };
-
-static struct clk fsidivs[] = {
- [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]),
- [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]),
-};
-
-enum { MSTP001, MSTP000,
- MSTP131, MSTP130,
- MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
- MSTP118, MSTP117, MSTP116, MSTP113,
- MSTP106, MSTP101, MSTP100,
- MSTP223,
- MSTP218, MSTP217, MSTP216, MSTP214, MSTP208, MSTP207,
- MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
- MSTP328, MSTP323, MSTP322, MSTP315, MSTP314, MSTP313, MSTP312,
- MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP407, MSTP406,
- MSTP405, MSTP404, MSTP403, MSTP400,
- MSTP_NR };
-
-#define MSTP(_parent, _reg, _bit, _flags) \
- SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
-
-static struct clk mstp_clks[MSTP_NR] = {
- [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
- [MSTP000] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 0, 0), /* MSIOF0 */
- [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
- [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
- [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
- [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
- [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU */
- [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2 */
- [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
- [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */
- [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
- [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
- [MSTP113] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 13, 0), /* MERAM */
- [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */
- [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */
- [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
- [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */
- [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
- [MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
- [MSTP216] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
- [MSTP214] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
- [MSTP208] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 8, 0), /* MSIOF1 */
- [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
- [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
- [MSTP205] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 5, 0), /* MSIOF2 */
- [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
- [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
- [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
- [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
- [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
- [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */
- [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
- [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
- [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL*/
- [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
- [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
- [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
- [MSTP423] = MSTP(&div4_clks[DIV4_B], SMSTPCR4, 23, 0), /* DSITX1 */
- [MSTP415] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 15, 0), /* SDHI2 */
- [MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
- [MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
- [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */
- [MSTP407] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 7, 0), /* USB-DMAC1 */
- [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */
- [MSTP405] = MSTP(&r_clk, SMSTPCR4, 5, 0), /* CMT4 */
- [MSTP404] = MSTP(&r_clk, SMSTPCR4, 4, 0), /* CMT3 */
- [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
- [MSTP400] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* CMT2 */
-};
-
-static struct clk_lookup lookups[] = {
- /* main clocks */
- CLKDEV_CON_ID("dv_clki_div2_clk", &sh7372_dv_clki_div2_clk),
- CLKDEV_CON_ID("r_clk", &r_clk),
- CLKDEV_CON_ID("extal1", &sh7372_extal1_clk),
- CLKDEV_CON_ID("extal2", &sh7372_extal2_clk),
- CLKDEV_CON_ID("extal1_div2_clk", &extal1_div2_clk),
- CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk),
- CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk),
- CLKDEV_CON_ID("pllc0_clk", &pllc0_clk),
- CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
- CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
- CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk),
- CLKDEV_CON_ID("fsiack", &fsiack_clk),
- CLKDEV_CON_ID("fsibck", &fsibck_clk),
-
- /* DIV4 clocks */
- CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
- CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]),
- CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
- CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]),
- CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]),
- CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]),
- CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
- CLKDEV_CON_ID("ispb_clk", &div4_clks[DIV4_ISPB]),
- CLKDEV_CON_ID("s_clk", &div4_clks[DIV4_S]),
- CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
- CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
- CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
- CLKDEV_CON_ID("ddrp_clk", &div4_clks[DIV4_DDRP]),
-
- /* DIV6 clocks */
- CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
- CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
- CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
- CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
- CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
- CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
- CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
- CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
- CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
-
- /* MSTP32 clocks */
- CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
- CLKDEV_DEV_ID("fff30000.i2c", &mstp_clks[MSTP001]), /* IIC2 */
- CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
- CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
- CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
- CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
- CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
- CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
- CLKDEV_DEV_ID("fff20000.i2c", &mstp_clks[MSTP116]), /* IIC0 */
- CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[MSTP113]), /* MERAM */
- CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
- CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
- CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */
- CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */
- CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* DMAC1 */
- CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* DMAC2 */
- CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), /* DMAC3 */
- CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), /* USB-DMAC0 */
- CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[MSTP208]), /* MSIOF1 */
- CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
- CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */
- CLKDEV_DEV_ID("spi_sh_msiof.2", &mstp_clks[MSTP205]), /* MSIOF2 */
- CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
- CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
- CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
- CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
- CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
- CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
- CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
- CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]), /* IIC1 */
- CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
- CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */
- CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP322]), /* USB0 */
- CLKDEV_DEV_ID("sh_flctl.0", &mstp_clks[MSTP315]), /* FLCTL */
- CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
- CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */
- CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
- CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */
- CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
- CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMC */
- CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */
- CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */
- CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]), /* SDHI2 */
- CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
- CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
- CLKDEV_DEV_ID("e6d20000.i2c", &mstp_clks[MSTP411]), /* IIC3 */
- CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */
- CLKDEV_DEV_ID("e6d30000.i2c", &mstp_clks[MSTP410]), /* IIC4 */
- CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */
- CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
- CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
- CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
- CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
-
- /* ICK */
- CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
- CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
- CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
- CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
- CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1",
- &div6_reparent_clks[DIV6_HDMI]),
- CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
- CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
- CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
- CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
- CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
- CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.4", &mstp_clks[MSTP405]), /* CMT4 */
- CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.3", &mstp_clks[MSTP404]), /* CMT3 */
- CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.2", &mstp_clks[MSTP400]), /* CMT2 */
- CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
- CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
- CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk),
- CLKDEV_ICK_ID("xckb", "sh_fsi2", &fsibck_clk),
-};
-
-void __init sh7372_clock_init(void)
-{
- int k, ret = 0;
-
- /* make sure MSTP bits on the RT/SH4AL-DSP side are off */
- __raw_writel(0xe4ef8087, RMSTPCR0);
- __raw_writel(0xffffffff, RMSTPCR1);
- __raw_writel(0x37c7f7ff, RMSTPCR2);
- __raw_writel(0xffffffff, RMSTPCR3);
- __raw_writel(0xffe0fffd, RMSTPCR4);
-
- for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- ret = clk_register(main_clks[k]);
-
- if (!ret)
- ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-
- if (!ret)
- ret = sh_clk_div6_register(div6_clks, DIV6_NR);
-
- if (!ret)
- ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
-
- if (!ret)
- ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
- if (!ret)
- ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR);
-
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
- if (!ret)
- shmobile_clk_init();
- else
- panic("failed to setup sh7372 clocks\n");
-}
--- 0001/arch/arm/mach-shmobile/common.h
+++ work/arch/arm/mach-shmobile/common.h 2015-01-21 12:23:41.827559444 +0900
@@ -21,7 +21,6 @@ extern void shmobile_smp_scu_cpu_die(uns
extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
struct clk;
extern int shmobile_clk_init(void);
-extern void shmobile_handle_irq_intc(struct pt_regs *);
extern struct platform_suspend_ops shmobile_suspend_ops;
struct cpuidle_driver;
extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv);
--- 0001/arch/arm/mach-shmobile/entry-intc.S
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,54 +0,0 @@
-/*
- * ARM Interrupt demux handler using INTC
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/entry-macro-multi.S>
-
-#define INTCA_BASE 0xe6980000
-#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
-#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
-#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
-#define INTLVLB_OFFS 0x00000034 /* previous priority level */
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =INTCA_BASE
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- /* The single INTFLGA read access below results in the following:
- *
- * 1. INTLVLB is updated with old priority value from INTLVLA
- * 2. Highest priority interrupt is accepted
- * 3. INTLVLA is updated to contain priority of accepted interrupt
- * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
- */
- ldr \irqnr, [\base, #INTFLGA_OFFS]
-
- /* Restore INTLVLA with the value saved in INTLVLB.
- * This is required to support interrupt priorities properly.
- */
- ldrb \tmp, [\base, #INTLVLB_OFFS]
- strb \tmp, [\base, #INTLVLA_OFFS]
-
- /* Handle invalid vector number case */
- cmp \irqnr, #0
- beq 1000f
-
- /* Convert vector to irq number, same as the evt2irq() macro */
- lsr \irqnr, \irqnr, #0x5
- subs \irqnr, \irqnr, #16
-
-1000:
- .endm
-
- .macro test_for_ipi, irqnr, irqstat, base, tmp
- .endm
-
- arch_irq_handler shmobile_handle_irq_intc
--- 0001/arch/arm/mach-shmobile/intc-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,672 +0,0 @@
-/*
- * sh7372 processor support - INTC hardware block
- *
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "intc.h"
-#include "irqs.h"
-
-enum {
- UNUSED_INTCA = 0,
-
- /* interrupt sources INTCA */
- DIRC,
- CRYPT_STD,
- IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
- AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
- MFI_MFIM, MFI_MFIS,
- BBIF1, BBIF2,
- USBHSDMAC0_USHDMI,
- _3DG_SGX540,
- CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
- KEYSC_KEY,
- SCIFA0, SCIFA1, SCIFA2, SCIFA3,
- MSIOF2, MSIOF1,
- SCIFA4, SCIFA5, SCIFB,
- FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
- SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
- SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2,
- IRREM,
- IRDA,
- TPU0,
- TTI20,
- DDM,
- SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3,
- RWDT0,
- DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3,
- DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR,
- DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
- DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
- DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
- DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
- SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
- HDMI,
- SPU2_SPU0, SPU2_SPU1,
- FSI, FMSI,
- MIPI_HSI,
- IPMMU_IPMMUD,
- CEC_1, CEC_2,
- AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
- MFIS2,
- CPORTR2S,
- CMT14, CMT15,
- MMC_MMC_ERR, MMC_MMC_NOR,
- IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
- IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3,
- USB0_USB0I1, USB0_USB0I0,
- USB1_USB1I1, USB1_USB1I0,
- USBHSDMAC1_USHDMI,
-
- /* interrupt groups INTCA */
- DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
- AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1, SDHI0, SDHI1, SDHI2
-};
-
-static struct intc_vect intca_vectors[] __initdata = {
- INTC_VECT(DIRC, 0x0560),
- INTC_VECT(CRYPT_STD, 0x0700),
- INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
- INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
- INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
- INTC_VECT(AP_ARM_COMMRX, 0x0860),
- INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
- INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
- INTC_VECT(USBHSDMAC0_USHDMI, 0x0a00),
- INTC_VECT(_3DG_SGX540, 0x0a60),
- INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
- INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
- INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
- INTC_VECT(KEYSC_KEY, 0x0be0),
- INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
- INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
- INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
- INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
- INTC_VECT(SCIFB, 0x0d60),
- INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
- INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
- INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
- INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
- INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
- INTC_VECT(SDHI1_SDHI1I2, 0x0ec0),
- INTC_VECT(IRREM, 0x0f60),
- INTC_VECT(IRDA, 0x0480),
- INTC_VECT(TPU0, 0x04a0),
- INTC_VECT(TTI20, 0x1100),
- INTC_VECT(DDM, 0x1140),
- INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220),
- INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260),
- INTC_VECT(RWDT0, 0x1280),
- INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020),
- INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060),
- INTC_VECT(DMAC1_2_DEI4, 0x2080), INTC_VECT(DMAC1_2_DEI5, 0x20a0),
- INTC_VECT(DMAC1_2_DADERR, 0x20c0),
- INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
- INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
- INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
- INTC_VECT(DMAC2_2_DADERR, 0x21c0),
- INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
- INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
- INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
- INTC_VECT(DMAC3_2_DADERR, 0x22c0),
- INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1320),
- INTC_VECT(SHWYSTAT_COM, 0x1340),
- INTC_VECT(HDMI, 0x17e0),
- INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
- INTC_VECT(FSI, 0x1840),
- INTC_VECT(FMSI, 0x1860),
- INTC_VECT(MIPI_HSI, 0x18e0),
- INTC_VECT(IPMMU_IPMMUD, 0x1920),
- INTC_VECT(CEC_1, 0x1940), INTC_VECT(CEC_2, 0x1960),
- INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
- INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
- INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
- INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
- INTC_VECT(MFIS2, 0x1a00),
- INTC_VECT(CPORTR2S, 0x1a20),
- INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
- INTC_VECT(MMC_MMC_ERR, 0x1ac0), INTC_VECT(MMC_MMC_NOR, 0x1ae0),
- INTC_VECT(IIC4_ALI4, 0x1b00), INTC_VECT(IIC4_TACKI4, 0x1b20),
- INTC_VECT(IIC4_WAITI4, 0x1b40), INTC_VECT(IIC4_DTEI4, 0x1b60),
- INTC_VECT(IIC3_ALI3, 0x1b80), INTC_VECT(IIC3_TACKI3, 0x1ba0),
- INTC_VECT(IIC3_WAITI3, 0x1bc0), INTC_VECT(IIC3_DTEI3, 0x1be0),
- INTC_VECT(USB0_USB0I1, 0x1c80), INTC_VECT(USB0_USB0I0, 0x1ca0),
- INTC_VECT(USB1_USB1I1, 0x1cc0), INTC_VECT(USB1_USB1I0, 0x1ce0),
- INTC_VECT(USBHSDMAC1_USHDMI, 0x1d00),
-};
-
-static struct intc_group intca_groups[] __initdata = {
- INTC_GROUP(DMAC1_1, DMAC1_1_DEI0,
- DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3),
- INTC_GROUP(DMAC1_2, DMAC1_2_DEI4,
- DMAC1_2_DEI5, DMAC1_2_DADERR),
- INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
- DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
- INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
- DMAC2_2_DEI5, DMAC2_2_DADERR),
- INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
- DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
- INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
- DMAC3_2_DEI5, DMAC3_2_DADERR),
- INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX),
- INTC_GROUP(AP_ARM2, AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
- AP_ARM_DMAIRQ, AP_ARM_DMASIRQ),
- INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
- INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
- FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
- INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
- INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
- SDHI0_SDHI0I2, SDHI0_SDHI0I3),
- INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
- SDHI1_SDHI1I2),
- INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
- SDHI2_SDHI2I2, SDHI2_SDHI2I3),
- INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
-};
-
-static struct intc_mask_reg intca_mask_registers[] __initdata = {
- { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
- { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
- AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
- { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
- { 0, CRYPT_STD, DIRC, 0,
- DMAC1_1_DEI3, DMAC1_1_DEI2, DMAC1_1_DEI1, DMAC1_1_DEI0 } },
- { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
- { 0, 0, 0, 0,
- BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
- { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
- { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
- DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
- { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
- { DDM, 0, 0, 0,
- 0, 0, 0, 0 } },
- { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
- { KEYSC_KEY, DMAC1_2_DADERR, DMAC1_2_DEI5, DMAC1_2_DEI4,
- SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
- { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
- { SCIFB, SCIFA5, SCIFA4, MSIOF1,
- 0, 0, MSIOF2, 0 } },
- { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
- { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
- FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
- { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
- { 0, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
- TTI20, USBHSDMAC0_USHDMI, 0, 0 } },
- { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
- { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
- CMT2, 0, 0, _3DG_SGX540 } },
- { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
- { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
- 0, 0, 0, 0 } },
- { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
- { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
- 0, 0, IRREM, 0 } },
- { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
- { 0, 0, TPU0, 0,
- 0, 0, 0, 0 } },
- { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
- { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0,
- 0, CMT3, 0, RWDT0 } },
- { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
- { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
- 0, 0, 0, 0 } },
- { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
- { 0, 0, 0, 0,
- 0, 0, 0, HDMI } },
- { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
- { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
- 0, 0, 0, MIPI_HSI } },
- { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
- { 0, IPMMU_IPMMUD, CEC_1, CEC_2,
- AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
- AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
- { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
- { MFIS2, CPORTR2S, CMT14, CMT15,
- 0, 0, MMC_MMC_ERR, MMC_MMC_NOR } },
- { 0xe69500a0, 0xe69500e0, 8, /* IMR8A3 / IMCR8A3 */
- { IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
- IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3 } },
- { 0xe69500a4, 0xe69500e4, 8, /* IMR9A3 / IMCR9A3 */
- { 0, 0, 0, 0,
- USB0_USB0I1, USB0_USB0I0, USB1_USB1I1, USB1_USB1I0 } },
- { 0xe69500a8, 0xe69500e8, 8, /* IMR10A3 / IMCR10A3 */
- { USBHSDMAC1_USHDMI, 0, 0, 0,
- 0, 0, 0, 0 } },
-};
-
-static struct intc_prio_reg intca_prio_registers[] __initdata = {
- { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, 0 } },
- { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
- { 0xe6940008, 0, 16, 4, /* IPRCA */ { 0, CRYPT_STD,
- CMT1_CMT11, AP_ARM1 } },
- { 0xe694000c, 0, 16, 4, /* IPRDA */ { 0, 0,
- CMT1_CMT12, 0 } },
- { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC1_1, MFI_MFIS,
- MFI_MFIM, 0 } },
- { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC1_2,
- _3DG_SGX540, CMT1_CMT10 } },
- { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
- SCIFA2, SCIFA3 } },
- { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBHSDMAC0_USHDMI,
- FLCTL, SDHI0 } },
- { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4,
- 0/* MSU */, IIC1 } },
- { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2,
- 0/* MSUG */, TTI20 } },
- { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
- { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, 0, 0, 0 } },
- { 0xe6940030, 0, 16, 4, /* IPRMA */ { 0, CMT3, 0, RWDT0 } },
- { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
- { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
- { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
- { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { 0, 0, 0, HDMI } },
- { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
- { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, 0, 0, MIPI_HSI } },
- { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUD, 0,
- CEC_1, CEC_2 } },
- { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
- { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
- CMT14, CMT15 } },
- { 0xe695003c, 0, 16, 4, /* IPRPA3 */ { 0, 0,
- MMC_MMC_ERR, MMC_MMC_NOR } },
- { 0xe6950040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4,
- IIC4_WAITI4, IIC4_DTEI4 } },
- { 0xe6950044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3,
- IIC3_WAITI3, IIC3_DTEI3 } },
- { 0xe6950048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/,
- 0/*TXI*/, 0/*TEI*/} },
- { 0xe695004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0,
- USB1_USB1I1, USB1_USB1I0 } },
- { 0xe6950050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } },
-};
-
-static DECLARE_INTC_DESC(intca_desc, "sh7372-intca",
- intca_vectors, intca_groups,
- intca_mask_registers, intca_prio_registers,
- NULL);
-
-INTC_IRQ_PINS_16(intca_irq_pins_lo, 0xe6900000,
- INTC_VECT, "sh7372-intca-irq-lo");
-
-INTC_IRQ_PINS_16H(intca_irq_pins_hi, 0xe6900000,
- INTC_VECT, "sh7372-intca-irq-hi");
-
-enum {
- UNUSED_INTCS = 0,
- ENABLED_INTCS,
-
- /* interrupt sources INTCS */
-
- /* IRQ0S - IRQ31S */
- VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3,
- RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3,
- CEU, BEU_BEU0, BEU_BEU1, BEU_BEU2,
- /* MFI */
- /* BBIF2 */
- VPU,
- TSIF1,
- /* 3DG */
- _2DDMAC,
- IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
- IPMMU_IPMMUR, IPMMU_IPMMUR2,
- RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR,
- /* KEYSC */
- /* TTI20 */
- MSIOF,
- IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0,
- TMU_TUNI0, TMU_TUNI1, TMU_TUNI2,
- CMT0,
- TSIF0,
- /* CMT2 */
- LMB,
- CTI,
- /* RWDT0 */
- ICB,
- JPU_JPEG,
- LCDC,
- LCRC,
- RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3,
- RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR,
- ISP,
- LCDC1,
- CSIRX,
- DSITX_DSITX0,
- DSITX_DSITX1,
- /* SPU2 */
- /* FSI */
- /* FMSI */
- /* HDMI */
- TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2,
- CMT4,
- DSITX1_DSITX1_0,
- DSITX1_DSITX1_1,
- MFIS2_INTCS, /* Priority always enabled using ENABLED_INTCS */
- CPORTS2R,
- /* CEC */
- JPU6E,
-
- /* interrupt groups INTCS */
- RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2,
- RTDMAC2_1, RTDMAC2_2, TMU1, DSITX,
-};
-
-static struct intc_vect intcs_vectors[] = {
- /* IRQ0S - IRQ31S */
- INTCS_VECT(VEU_VEU0, 0x700), INTCS_VECT(VEU_VEU1, 0x720),
- INTCS_VECT(VEU_VEU2, 0x740), INTCS_VECT(VEU_VEU3, 0x760),
- INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820),
- INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860),
- INTCS_VECT(CEU, 0x880), INTCS_VECT(BEU_BEU0, 0x8a0),
- INTCS_VECT(BEU_BEU1, 0x8c0), INTCS_VECT(BEU_BEU2, 0x8e0),
- /* MFI */
- /* BBIF2 */
- INTCS_VECT(VPU, 0x980),
- INTCS_VECT(TSIF1, 0x9a0),
- /* 3DG */
- INTCS_VECT(_2DDMAC, 0xa00),
- INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0),
- INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0),
- INTCS_VECT(IPMMU_IPMMUR, 0xb00), INTCS_VECT(IPMMU_IPMMUR2, 0xb20),
- INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0),
- INTCS_VECT(RTDMAC_2_DADERR, 0xbc0),
- /* KEYSC */
- /* TTI20 */
- INTCS_VECT(MSIOF, 0x0d20),
- INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20),
- INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60),
- INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0),
- INTCS_VECT(TMU_TUNI2, 0xec0),
- INTCS_VECT(CMT0, 0xf00),
- INTCS_VECT(TSIF0, 0xf20),
- /* CMT2 */
- INTCS_VECT(LMB, 0xf60),
- INTCS_VECT(CTI, 0x400),
- /* RWDT0 */
- INTCS_VECT(ICB, 0x480),
- INTCS_VECT(JPU_JPEG, 0x560),
- INTCS_VECT(LCDC, 0x580),
- INTCS_VECT(LCRC, 0x5a0),
- INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320),
- INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360),
- INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13a0),
- INTCS_VECT(RTDMAC2_2_DADERR, 0x13c0),
- INTCS_VECT(ISP, 0x1720),
- INTCS_VECT(LCDC1, 0x1780),
- INTCS_VECT(CSIRX, 0x17a0),
- INTCS_VECT(DSITX_DSITX0, 0x17c0),
- INTCS_VECT(DSITX_DSITX1, 0x17e0),
- /* SPU2 */
- /* FSI */
- /* FMSI */
- /* HDMI */
- INTCS_VECT(TMU1_TUNI0, 0x1900), INTCS_VECT(TMU1_TUNI1, 0x1920),
- INTCS_VECT(TMU1_TUNI2, 0x1940),
- INTCS_VECT(CMT4, 0x1980),
- INTCS_VECT(DSITX1_DSITX1_0, 0x19a0),
- INTCS_VECT(DSITX1_DSITX1_1, 0x19c0),
- INTCS_VECT(MFIS2_INTCS, 0x1a00),
- INTCS_VECT(CPORTS2R, 0x1a20),
- /* CEC */
- INTCS_VECT(JPU6E, 0x1a80),
-};
-
-static struct intc_group intcs_groups[] __initdata = {
- INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1,
- RTDMAC_1_DEI2, RTDMAC_1_DEI3),
- INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR),
- INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3),
- INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2),
- INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0),
- INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2),
- INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2),
- INTC_GROUP(RTDMAC2_1, RTDMAC2_1_DEI0, RTDMAC2_1_DEI1,
- RTDMAC2_1_DEI2, RTDMAC2_1_DEI3),
- INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4,
- RTDMAC2_2_DEI5, RTDMAC2_2_DADERR),
- INTC_GROUP(TMU1, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0),
- INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1),
-};
-
-static struct intc_mask_reg intcs_mask_registers[] = {
- { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */
- { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU,
- VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } },
- { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */
- { 0, 0, 0, VPU,
- 0, 0, 0, 0 } },
- { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */
- { 0, 0, 0, _2DDMAC,
- 0, 0, 0, ICB } },
- { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */
- { 0, 0, 0, CTI,
- JPU_JPEG, 0, LCRC, LCDC } },
- { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */
- { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4,
- RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } },
- { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */
- { 0, 0, MSIOF, 0,
- 0, 0, 0, 0 } },
- { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */
- { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
- 0, 0, 0, 0 } },
- { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */
- { 0, 0, 0, CMT0,
- IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } },
- { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */
- { 0, 0, IPMMU_IPMMUR2, IPMMU_IPMMUR,
- 0, 0, 0, 0 } },
- { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */
- { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0,
- 0, TSIF1, LMB, TSIF0 } },
- { 0xffd50180, 0xffd501c0, 8, /* IMR0SA3 / IMCR0SA3 */
- { 0, RTDMAC2_2_DADERR, RTDMAC2_2_DEI5, RTDMAC2_2_DEI4,
- RTDMAC2_1_DEI3, RTDMAC2_1_DEI2, RTDMAC2_1_DEI1, RTDMAC2_1_DEI0 } },
- { 0xffd50190, 0xffd501d0, 8, /* IMR4SA3 / IMCR4SA3 */
- { 0, ISP, 0, 0,
- LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } },
- { 0xffd50198, 0xffd501d8, 8, /* IMR6SA3 / IMCR6SA3 */
- { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
- CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } },
- { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
- { MFIS2_INTCS, CPORTS2R, 0, 0,
- JPU6E, 0, 0, 0 } },
-};
-
-/* Priority is needed for INTCA to receive the INTCS interrupt */
-static struct intc_prio_reg intcs_prio_registers[] = {
- { 0xffd20000, 0, 16, 4, /* IPRAS */ { CTI, 0, _2DDMAC, ICB } },
- { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPU_JPEG, LCDC, 0, LCRC } },
- { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, CEU, 0, VPU } },
- { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT0 } },
- { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1,
- TMU_TUNI2, TSIF1 } },
- { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, 0, VEU, BEU } },
- { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF0, IIC0 } },
- { 0xffd20028, 0, 16, 4, /* IPRKS */ { 0, 0, LMB, 0 } },
- { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, 0, 0 } },
- { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } },
- { 0xffd50000, 0, 16, 4, /* IPRAS3 */ { RTDMAC2_1, 0, 0, 0 } },
- { 0xffd50004, 0, 16, 4, /* IPRBS3 */ { RTDMAC2_2, 0, 0, 0 } },
- { 0xffd50020, 0, 16, 4, /* IPRIS3 */ { 0, ISP, 0, 0 } },
- { 0xffd50024, 0, 16, 4, /* IPRJS3 */ { LCDC1, CSIRX, DSITX, 0 } },
- { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } },
- { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0,
- DSITX1_DSITX1_1, 0 } },
- { 0xffd50038, 0, 16, 4, /* IPROS3 */ { ENABLED_INTCS, CPORTS2R,
- 0, 0 } },
- { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } },
-};
-
-static struct resource intcs_resources[] __initdata = {
- [0] = {
- .start = 0xffd20000,
- .end = 0xffd201ff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0xffd50000,
- .end = 0xffd501ff,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct intc_desc intcs_desc __initdata = {
- .name = "sh7372-intcs",
- .force_enable = ENABLED_INTCS,
- .skip_syscore_suspend = true,
- .resource = intcs_resources,
- .num_resources = ARRAY_SIZE(intcs_resources),
- .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
- intcs_prio_registers, NULL, NULL),
-};
-
-static void intcs_demux(unsigned int irq, struct irq_desc *desc)
-{
- void __iomem *reg = (void *)irq_get_handler_data(irq);
- unsigned int evtcodeas = ioread32(reg);
-
- generic_handle_irq(intcs_evt2irq(evtcodeas));
-}
-
-static void __iomem *intcs_ffd2;
-static void __iomem *intcs_ffd5;
-
-void __init sh7372_init_irq(void)
-{
- void __iomem *intevtsa;
- int n;
-
- intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
- intevtsa = intcs_ffd2 + 0x100;
- intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
-
- register_intc_controller(&intca_desc);
- register_intc_controller(&intca_irq_pins_lo_desc);
- register_intc_controller(&intca_irq_pins_hi_desc);
- register_intc_controller(&intcs_desc);
-
- /* setup dummy cascade chip for INTCS */
- n = evt2irq(0xf80);
- irq_alloc_desc_at(n, numa_node_id());
- irq_set_chip_and_handler_name(n, &dummy_irq_chip,
- handle_level_irq, "level");
- set_irq_flags(n, IRQF_VALID); /* yuck */
-
- /* demux using INTEVTSA */
- irq_set_handler_data(n, (void *)intevtsa);
- irq_set_chained_handler(n, intcs_demux);
-
- /* unmask INTCS in INTAMASK */
- iowrite16(0, intcs_ffd2 + 0x104);
-}
-
-static unsigned short ffd2[0x200];
-static unsigned short ffd5[0x100];
-
-void sh7372_intcs_suspend(void)
-{
- int k;
-
- for (k = 0x00; k <= 0x30; k += 4)
- ffd2[k] = __raw_readw(intcs_ffd2 + k);
-
- for (k = 0x80; k <= 0xb0; k += 4)
- ffd2[k] = __raw_readb(intcs_ffd2 + k);
-
- for (k = 0x180; k <= 0x188; k += 4)
- ffd2[k] = __raw_readb(intcs_ffd2 + k);
-
- for (k = 0x00; k <= 0x3c; k += 4)
- ffd5[k] = __raw_readw(intcs_ffd5 + k);
-
- for (k = 0x80; k <= 0x9c; k += 4)
- ffd5[k] = __raw_readb(intcs_ffd5 + k);
-}
-
-void sh7372_intcs_resume(void)
-{
- int k;
-
- for (k = 0x00; k <= 0x30; k += 4)
- __raw_writew(ffd2[k], intcs_ffd2 + k);
-
- for (k = 0x80; k <= 0xb0; k += 4)
- __raw_writeb(ffd2[k], intcs_ffd2 + k);
-
- for (k = 0x180; k <= 0x188; k += 4)
- __raw_writeb(ffd2[k], intcs_ffd2 + k);
-
- for (k = 0x00; k <= 0x3c; k += 4)
- __raw_writew(ffd5[k], intcs_ffd5 + k);
-
- for (k = 0x80; k <= 0x9c; k += 4)
- __raw_writeb(ffd5[k], intcs_ffd5 + k);
-}
-
-#define E694_BASE IOMEM(0xe6940000)
-#define E695_BASE IOMEM(0xe6950000)
-
-static unsigned short e694[0x200];
-static unsigned short e695[0x200];
-
-void sh7372_intca_suspend(void)
-{
- int k;
-
- for (k = 0x00; k <= 0x38; k += 4)
- e694[k] = __raw_readw(E694_BASE + k);
-
- for (k = 0x80; k <= 0xb4; k += 4)
- e694[k] = __raw_readb(E694_BASE + k);
-
- for (k = 0x180; k <= 0x1b4; k += 4)
- e694[k] = __raw_readb(E694_BASE + k);
-
- for (k = 0x00; k <= 0x50; k += 4)
- e695[k] = __raw_readw(E695_BASE + k);
-
- for (k = 0x80; k <= 0xa8; k += 4)
- e695[k] = __raw_readb(E695_BASE + k);
-
- for (k = 0x180; k <= 0x1a8; k += 4)
- e695[k] = __raw_readb(E695_BASE + k);
-}
-
-void sh7372_intca_resume(void)
-{
- int k;
-
- for (k = 0x00; k <= 0x38; k += 4)
- __raw_writew(e694[k], E694_BASE + k);
-
- for (k = 0x80; k <= 0xb4; k += 4)
- __raw_writeb(e694[k], E694_BASE + k);
-
- for (k = 0x180; k <= 0x1b4; k += 4)
- __raw_writeb(e694[k], E694_BASE + k);
-
- for (k = 0x00; k <= 0x50; k += 4)
- __raw_writew(e695[k], E695_BASE + k);
-
- for (k = 0x80; k <= 0xa8; k += 4)
- __raw_writeb(e695[k], E695_BASE + k);
-
- for (k = 0x180; k <= 0x1a8; k += 4)
- __raw_writeb(e695[k], E695_BASE + k);
-}
--- 0001/arch/arm/mach-shmobile/pm-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,549 +0,0 @@
-/*
- * sh7372 Power management support
- *
- * Copyright (C) 2011 Magnus Damm
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/pm.h>
-#include <linux/suspend.h>
-#include <linux/cpuidle.h>
-#include <linux/module.h>
-#include <linux/list.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/pm_clock.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/bitrev.h>
-#include <linux/console.h>
-
-#include <asm/cpuidle.h>
-#include <asm/io.h>
-#include <asm/tlbflush.h>
-#include <asm/suspend.h>
-
-#include "common.h"
-#include "pm-rmobile.h"
-#include "sh7372.h"
-
-/* DBG */
-#define DBGREG1 IOMEM(0xe6100020)
-#define DBGREG9 IOMEM(0xe6100040)
-
-/* CPGA */
-#define SYSTBCR IOMEM(0xe6150024)
-#define MSTPSR0 IOMEM(0xe6150030)
-#define MSTPSR1 IOMEM(0xe6150038)
-#define MSTPSR2 IOMEM(0xe6150040)
-#define MSTPSR3 IOMEM(0xe6150048)
-#define MSTPSR4 IOMEM(0xe615004c)
-#define PLLC01STPCR IOMEM(0xe61500c8)
-
-/* SYSC */
-#define SYSC_BASE IOMEM(0xe6180000)
-
-#define SBAR IOMEM(0xe6180020)
-#define WUPRMSK IOMEM(0xe6180028)
-#define WUPSMSK IOMEM(0xe618002c)
-#define WUPSMSK2 IOMEM(0xe6180048)
-#define WUPSFAC IOMEM(0xe6180098)
-#define IRQCR IOMEM(0xe618022c)
-#define IRQCR2 IOMEM(0xe6180238)
-#define IRQCR3 IOMEM(0xe6180244)
-#define IRQCR4 IOMEM(0xe6180248)
-#define PDNSEL IOMEM(0xe6180254)
-
-/* INTC */
-#define ICR1A IOMEM(0xe6900000)
-#define ICR2A IOMEM(0xe6900004)
-#define ICR3A IOMEM(0xe6900008)
-#define ICR4A IOMEM(0xe690000c)
-#define INTMSK00A IOMEM(0xe6900040)
-#define INTMSK10A IOMEM(0xe6900044)
-#define INTMSK20A IOMEM(0xe6900048)
-#define INTMSK30A IOMEM(0xe690004c)
-
-/* MFIS */
-/* FIXME: pointing where? */
-#define SMFRAM 0xe6a70000
-
-/* AP-System Core */
-#define APARMBAREA IOMEM(0xe6f10020)
-
-#ifdef CONFIG_PM
-
-#define PM_DOMAIN_ON_OFF_LATENCY_NS 250000
-
-static int sh7372_a4r_pd_suspend(void)
-{
- sh7372_intcs_suspend();
- __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */
- return 0;
-}
-
-static bool a4s_suspend_ready;
-
-static int sh7372_a4s_pd_suspend(void)
-{
- /*
- * The A4S domain contains the CPU core and therefore it should
- * only be turned off if the CPU is not in use. This may happen
- * during system suspend, when SYSC is going to be used for generating
- * resume signals and a4s_suspend_ready is set to let
- * sh7372_enter_suspend() know that it can turn A4S off.
- */
- a4s_suspend_ready = true;
- return -EBUSY;
-}
-
-static void sh7372_a4s_pd_resume(void)
-{
- a4s_suspend_ready = false;
-}
-
-static int sh7372_a3sp_pd_suspend(void)
-{
- /*
- * Serial consoles make use of SCIF hardware located in A3SP,
- * keep such power domain on if "no_console_suspend" is set.
- */
- return console_suspend_enabled ? 0 : -EBUSY;
-}
-
-static struct rmobile_pm_domain sh7372_pm_domains[] = {
- {
- .genpd.name = "A4LC",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 1,
- },
- {
- .genpd.name = "A4MP",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 2,
- },
- {
- .genpd.name = "D4",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 3,
- },
- {
- .genpd.name = "A4R",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 5,
- .suspend = sh7372_a4r_pd_suspend,
- .resume = sh7372_intcs_resume,
- },
- {
- .genpd.name = "A3RV",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 6,
- },
- {
- .genpd.name = "A3RI",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 8,
- },
- {
- .genpd.name = "A4S",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 10,
- .gov = &pm_domain_always_on_gov,
- .no_debug = true,
- .suspend = sh7372_a4s_pd_suspend,
- .resume = sh7372_a4s_pd_resume,
- },
- {
- .genpd.name = "A3SP",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 11,
- .gov = &pm_domain_always_on_gov,
- .no_debug = true,
- .suspend = sh7372_a3sp_pd_suspend,
- },
- {
- .genpd.name = "A3SG",
- .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
- .base = SYSC_BASE,
- .bit_shift = 13,
- },
-};
-
-void __init sh7372_init_pm_domains(void)
-{
- rmobile_init_domains(sh7372_pm_domains, ARRAY_SIZE(sh7372_pm_domains));
- pm_genpd_add_subdomain_names("A4LC", "A3RV");
- pm_genpd_add_subdomain_names("A4R", "A4LC");
- pm_genpd_add_subdomain_names("A4S", "A3SG");
- pm_genpd_add_subdomain_names("A4S", "A3SP");
-}
-
-#endif /* CONFIG_PM */
-
-#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
-static void sh7372_set_reset_vector(unsigned long address)
-{
- /* set reset vector, translate 4k */
- __raw_writel(address, SBAR);
- __raw_writel(0, APARMBAREA);
-}
-
-static void sh7372_enter_sysc(int pllc0_on, unsigned long sleep_mode)
-{
- if (pllc0_on)
- __raw_writel(0, PLLC01STPCR);
- else
- __raw_writel(1 << 28, PLLC01STPCR);
-
- __raw_readl(WUPSFAC); /* read wakeup int. factor before sleep */
- cpu_suspend(sleep_mode, sh7372_do_idle_sysc);
- __raw_readl(WUPSFAC); /* read wakeup int. factor after wakeup */
-
- /* disable reset vector translation */
- __raw_writel(0, SBAR);
-}
-
-static int sh7372_sysc_valid(unsigned long *mskp, unsigned long *msk2p)
-{
- unsigned long mstpsr0, mstpsr1, mstpsr2, mstpsr3, mstpsr4;
- unsigned long msk, msk2;
-
- /* check active clocks to determine potential wakeup sources */
-
- mstpsr0 = __raw_readl(MSTPSR0);
- if ((mstpsr0 & 0x00000003) != 0x00000003) {
- pr_debug("sh7372 mstpsr0 0x%08lx\n", mstpsr0);
- return 0;
- }
-
- mstpsr1 = __raw_readl(MSTPSR1);
- if ((mstpsr1 & 0xff079b7f) != 0xff079b7f) {
- pr_debug("sh7372 mstpsr1 0x%08lx\n", mstpsr1);
- return 0;
- }
-
- mstpsr2 = __raw_readl(MSTPSR2);
- if ((mstpsr2 & 0x000741ff) != 0x000741ff) {
- pr_debug("sh7372 mstpsr2 0x%08lx\n", mstpsr2);
- return 0;
- }
-
- mstpsr3 = __raw_readl(MSTPSR3);
- if ((mstpsr3 & 0x1a60f010) != 0x1a60f010) {
- pr_debug("sh7372 mstpsr3 0x%08lx\n", mstpsr3);
- return 0;
- }
-
- mstpsr4 = __raw_readl(MSTPSR4);
- if ((mstpsr4 & 0x00008cf0) != 0x00008cf0) {
- pr_debug("sh7372 mstpsr4 0x%08lx\n", mstpsr4);
- return 0;
- }
-
- msk = 0;
- msk2 = 0;
-
- /* make bitmaps of limited number of wakeup sources */
-
- if ((mstpsr2 & (1 << 23)) == 0) /* SPU2 */
- msk |= 1 << 31;
-
- if ((mstpsr2 & (1 << 12)) == 0) /* MFI_MFIM */
- msk |= 1 << 21;
-
- if ((mstpsr4 & (1 << 3)) == 0) /* KEYSC */
- msk |= 1 << 2;
-
- if ((mstpsr1 & (1 << 24)) == 0) /* CMT0 */
- msk |= 1 << 1;
-
- if ((mstpsr3 & (1 << 29)) == 0) /* CMT1 */
- msk |= 1 << 1;
-
- if ((mstpsr4 & (1 << 0)) == 0) /* CMT2 */
- msk |= 1 << 1;
-
- if ((mstpsr2 & (1 << 13)) == 0) /* MFI_MFIS */
- msk2 |= 1 << 17;
-
- *mskp = msk;
- *msk2p = msk2;
-
- return 1;
-}
-
-static void sh7372_icr_to_irqcr(unsigned long icr, u16 *irqcr1p, u16 *irqcr2p)
-{
- u16 tmp, irqcr1, irqcr2;
- int k;
-
- irqcr1 = 0;
- irqcr2 = 0;
-
- /* convert INTCA ICR register layout to SYSC IRQCR+IRQCR2 */
- for (k = 0; k <= 7; k++) {
- tmp = (icr >> ((7 - k) * 4)) & 0xf;
- irqcr1 |= (tmp & 0x03) << (k * 2);
- irqcr2 |= (tmp >> 2) << (k * 2);
- }
-
- *irqcr1p = irqcr1;
- *irqcr2p = irqcr2;
-}
-
-static void sh7372_setup_sysc(unsigned long msk, unsigned long msk2)
-{
- u16 irqcrx_low, irqcrx_high, irqcry_low, irqcry_high;
- unsigned long tmp;
-
- /* read IRQ0A -> IRQ15A mask */
- tmp = bitrev8(__raw_readb(INTMSK00A));
- tmp |= bitrev8(__raw_readb(INTMSK10A)) << 8;
-
- /* setup WUPSMSK from clocks and external IRQ mask */
- msk = (~msk & 0xc030000f) | (tmp << 4);
- __raw_writel(msk, WUPSMSK);
-
- /* propage level/edge trigger for external IRQ 0->15 */
- sh7372_icr_to_irqcr(__raw_readl(ICR1A), &irqcrx_low, &irqcry_low);
- sh7372_icr_to_irqcr(__raw_readl(ICR2A), &irqcrx_high, &irqcry_high);
- __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR);
- __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR2);
-
- /* read IRQ16A -> IRQ31A mask */
- tmp = bitrev8(__raw_readb(INTMSK20A));
- tmp |= bitrev8(__raw_readb(INTMSK30A)) << 8;
-
- /* setup WUPSMSK2 from clocks and external IRQ mask */
- msk2 = (~msk2 & 0x00030000) | tmp;
- __raw_writel(msk2, WUPSMSK2);
-
- /* propage level/edge trigger for external IRQ 16->31 */
- sh7372_icr_to_irqcr(__raw_readl(ICR3A), &irqcrx_low, &irqcry_low);
- sh7372_icr_to_irqcr(__raw_readl(ICR4A), &irqcrx_high, &irqcry_high);
- __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR3);
- __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR4);
-}
-
-static void sh7372_enter_a3sm_common(int pllc0_on)
-{
- /* use INTCA together with SYSC for wakeup */
- sh7372_setup_sysc(1 << 0, 0);
- sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
- sh7372_enter_sysc(pllc0_on, 1 << 12);
-}
-
-static void sh7372_enter_a4s_common(int pllc0_on)
-{
- sh7372_intca_suspend();
- sh7372_set_reset_vector(SMFRAM);
- sh7372_enter_sysc(pllc0_on, 1 << 10);
- sh7372_intca_resume();
-}
-
-static void sh7372_pm_setup_smfram(void)
-{
- /* pass physical address of cpu_resume() to assembly resume code */
- sh7372_cpu_resume = virt_to_phys(cpu_resume);
-
- memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
-}
-#else
-static inline void sh7372_pm_setup_smfram(void) {}
-#endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */
-
-#ifdef CONFIG_CPU_IDLE
-static int sh7372_do_idle_core_standby(unsigned long unused)
-{
- cpu_do_idle(); /* WFI when SYSTBCR == 0x10 -> Core Standby */
- return 0;
-}
-
-static int sh7372_enter_core_standby(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
-
- /* enter sleep mode with SYSTBCR to 0x10 */
- __raw_writel(0x10, SYSTBCR);
- cpu_suspend(0, sh7372_do_idle_core_standby);
- __raw_writel(0, SYSTBCR);
-
- /* disable reset vector translation */
- __raw_writel(0, SBAR);
-
- return 1;
-}
-
-static int sh7372_enter_a3sm_pll_on(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- sh7372_enter_a3sm_common(1);
- return 2;
-}
-
-static int sh7372_enter_a3sm_pll_off(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- sh7372_enter_a3sm_common(0);
- return 3;
-}
-
-static int sh7372_enter_a4s(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
-{
- unsigned long msk, msk2;
-
- if (!sh7372_sysc_valid(&msk, &msk2))
- return sh7372_enter_a3sm_pll_off(dev, drv, index);
-
- sh7372_setup_sysc(msk, msk2);
- sh7372_enter_a4s_common(0);
- return 4;
-}
-
-static struct cpuidle_driver sh7372_cpuidle_driver = {
- .name = "sh7372_cpuidle",
- .owner = THIS_MODULE,
- .state_count = 5,
- .safe_state_index = 0, /* C1 */
- .states[0] = ARM_CPUIDLE_WFI_STATE,
- .states[1] = {
- .name = "C2",
- .desc = "Core Standby Mode",
- .exit_latency = 10,
- .target_residency = 20 + 10,
- .enter = sh7372_enter_core_standby,
- },
- .states[2] = {
- .name = "C3",
- .desc = "A3SM PLL ON",
- .exit_latency = 20,
- .target_residency = 30 + 20,
- .enter = sh7372_enter_a3sm_pll_on,
- },
- .states[3] = {
- .name = "C4",
- .desc = "A3SM PLL OFF",
- .exit_latency = 120,
- .target_residency = 30 + 120,
- .enter = sh7372_enter_a3sm_pll_off,
- },
- .states[4] = {
- .name = "C5",
- .desc = "A4S PLL OFF",
- .exit_latency = 240,
- .target_residency = 30 + 240,
- .enter = sh7372_enter_a4s,
- .disabled = true,
- },
-};
-
-static void __init sh7372_cpuidle_init(void)
-{
- shmobile_cpuidle_set_driver(&sh7372_cpuidle_driver);
-}
-#else
-static void __init sh7372_cpuidle_init(void) {}
-#endif
-
-#ifdef CONFIG_SUSPEND
-static int sh7372_enter_suspend(suspend_state_t suspend_state)
-{
- unsigned long msk, msk2;
-
- /* check active clocks to determine potential wakeup sources */
- if (sh7372_sysc_valid(&msk, &msk2) && a4s_suspend_ready) {
- /* convert INTC mask/sense to SYSC mask/sense */
- sh7372_setup_sysc(msk, msk2);
-
- /* enter A4S sleep with PLLC0 off */
- pr_debug("entering A4S\n");
- sh7372_enter_a4s_common(0);
- return 0;
- }
-
- /* default to enter A3SM sleep with PLLC0 off */
- pr_debug("entering A3SM\n");
- sh7372_enter_a3sm_common(0);
- return 0;
-}
-
-/**
- * sh7372_pm_notifier_fn - SH7372 PM notifier routine.
- * @notifier: Unused.
- * @pm_event: Event being handled.
- * @unused: Unused.
- */
-static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
- unsigned long pm_event, void *unused)
-{
- switch (pm_event) {
- case PM_SUSPEND_PREPARE:
- /*
- * This is necessary, because the A4R domain has to be "on"
- * when suspend_device_irqs() and resume_device_irqs() are
- * executed during system suspend and resume, respectively, so
- * that those functions don't crash while accessing the INTCS.
- */
- pm_genpd_name_poweron("A4R");
- break;
- case PM_POST_SUSPEND:
- pm_genpd_poweroff_unused();
- break;
- }
-
- return NOTIFY_DONE;
-}
-
-static void sh7372_suspend_init(void)
-{
- shmobile_suspend_ops.enter = sh7372_enter_suspend;
- pm_notifier(sh7372_pm_notifier_fn, 0);
-}
-#else
-static void sh7372_suspend_init(void) {}
-#endif
-
-void __init sh7372_pm_init(void)
-{
- /* enable DBG hardware block to kick SYSC */
- __raw_writel(0x0000a500, DBGREG9);
- __raw_writel(0x0000a501, DBGREG9);
- __raw_writel(0x00000000, DBGREG1);
-
- /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
- __raw_writel(0, PDNSEL);
-
- sh7372_pm_setup_smfram();
-
- sh7372_suspend_init();
- sh7372_cpuidle_init();
-}
-
-void __init sh7372_pm_init_late(void)
-{
- shmobile_init_late();
- pm_genpd_name_attach_cpuidle("A4S", 4);
-}
--- 0001/arch/arm/mach-shmobile/setup-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,1016 +0,0 @@
-/*
- * sh7372 processor support
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2008 Yoshihiro Shimoda
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
-#include <linux/of_platform.h>
-#include <linux/uio_driver.h>
-#include <linux/delay.h>
-#include <linux/input.h>
-#include <linux/io.h>
-#include <linux/serial_sci.h>
-#include <linux/sh_dma.h>
-#include <linux/sh_timer.h>
-#include <linux/pm_domain.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_data/sh_ipmmu.h>
-
-#include <asm/mach/map.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-
-#include "common.h"
-#include "dma-register.h"
-#include "intc.h"
-#include "irqs.h"
-#include "pm-rmobile.h"
-#include "sh7372.h"
-
-static struct map_desc sh7372_io_desc[] __initdata = {
- /* create a 1:1 identity mapping for 0xe6xxxxxx
- * used by CPGA, INTC and PFC.
- */
- {
- .virtual = 0xe6000000,
- .pfn = __phys_to_pfn(0xe6000000),
- .length = 256 << 20,
- .type = MT_DEVICE_NONSHARED
- },
-};
-
-void __init sh7372_map_io(void)
-{
- debug_ll_io_init();
- iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
-}
-
-/* PFC */
-static struct resource sh7372_pfc_resources[] = {
- [0] = {
- .start = 0xe6050000,
- .end = 0xe6057fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0xe605800c,
- .end = 0xe6058027,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device sh7372_pfc_device = {
- .name = "pfc-sh7372",
- .id = -1,
- .resource = sh7372_pfc_resources,
- .num_resources = ARRAY_SIZE(sh7372_pfc_resources),
-};
-
-void __init sh7372_pinmux_init(void)
-{
- platform_device_register(&sh7372_pfc_device);
-}
-
-/* SCIF */
-#define SH7372_SCIF(scif_type, index, baseaddr, irq) \
-static struct plat_sci_port scif##index##_platform_data = { \
- .type = scif_type, \
- .flags = UPF_BOOT_AUTOCONF, \
- .scscr = SCSCR_RE | SCSCR_TE, \
-}; \
- \
-static struct resource scif##index##_resources[] = { \
- DEFINE_RES_MEM(baseaddr, 0x100), \
- DEFINE_RES_IRQ(irq), \
-}; \
- \
-static struct platform_device scif##index##_device = { \
- .name = "sh-sci", \
- .id = index, \
- .resource = scif##index##_resources, \
- .num_resources = ARRAY_SIZE(scif##index##_resources), \
- .dev = { \
- .platform_data = &scif##index##_platform_data, \
- }, \
-}
-
-SH7372_SCIF(PORT_SCIFA, 0, 0xe6c40000, evt2irq(0x0c00));
-SH7372_SCIF(PORT_SCIFA, 1, 0xe6c50000, evt2irq(0x0c20));
-SH7372_SCIF(PORT_SCIFA, 2, 0xe6c60000, evt2irq(0x0c40));
-SH7372_SCIF(PORT_SCIFA, 3, 0xe6c70000, evt2irq(0x0c60));
-SH7372_SCIF(PORT_SCIFA, 4, 0xe6c80000, evt2irq(0x0d20));
-SH7372_SCIF(PORT_SCIFA, 5, 0xe6cb0000, evt2irq(0x0d40));
-SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60));
-
-/* CMT */
-static struct sh_timer_config cmt2_platform_data = {
- .channels_mask = 0x20,
-};
-
-static struct resource cmt2_resources[] = {
- DEFINE_RES_MEM(0xe6130000, 0x50),
- DEFINE_RES_IRQ(evt2irq(0x0b80)),
-};
-
-static struct platform_device cmt2_device = {
- .name = "sh-cmt-32-fast",
- .id = 2,
- .dev = {
- .platform_data = &cmt2_platform_data,
- },
- .resource = cmt2_resources,
- .num_resources = ARRAY_SIZE(cmt2_resources),
-};
-
-/* TMU */
-static struct sh_timer_config tmu0_platform_data = {
- .channels_mask = 7,
-};
-
-static struct resource tmu0_resources[] = {
- DEFINE_RES_MEM(0xfff60000, 0x2c),
- DEFINE_RES_IRQ(intcs_evt2irq(0xe80)),
- DEFINE_RES_IRQ(intcs_evt2irq(0xea0)),
- DEFINE_RES_IRQ(intcs_evt2irq(0xec0)),
-};
-
-static struct platform_device tmu0_device = {
- .name = "sh-tmu",
- .id = 0,
- .dev = {
- .platform_data = &tmu0_platform_data,
- },
- .resource = tmu0_resources,
- .num_resources = ARRAY_SIZE(tmu0_resources),
-};
-
-/* I2C */
-static struct resource iic0_resources[] = {
- [0] = {
- .name = "IIC0",
- .start = 0xFFF20000,
- .end = 0xFFF20425 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0xe00), /* IIC0_ALI0 */
- .end = intcs_evt2irq(0xe60), /* IIC0_DTEI0 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device iic0_device = {
- .name = "i2c-sh_mobile",
- .id = 0, /* "i2c0" clock */
- .num_resources = ARRAY_SIZE(iic0_resources),
- .resource = iic0_resources,
-};
-
-static struct resource iic1_resources[] = {
- [0] = {
- .name = "IIC1",
- .start = 0xE6C20000,
- .end = 0xE6C20425 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x780), /* IIC1_ALI1 */
- .end = evt2irq(0x7e0), /* IIC1_DTEI1 */
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device iic1_device = {
- .name = "i2c-sh_mobile",
- .id = 1, /* "i2c1" clock */
- .num_resources = ARRAY_SIZE(iic1_resources),
- .resource = iic1_resources,
-};
-
-/* DMA */
-static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
- {
- .slave_id = SHDMA_SLAVE_SCIF0_TX,
- .addr = 0xe6c40020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x21,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF0_RX,
- .addr = 0xe6c40024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x22,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF1_TX,
- .addr = 0xe6c50020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x25,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF1_RX,
- .addr = 0xe6c50024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x26,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF2_TX,
- .addr = 0xe6c60020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x29,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF2_RX,
- .addr = 0xe6c60024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x2a,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF3_TX,
- .addr = 0xe6c70020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x2d,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF3_RX,
- .addr = 0xe6c70024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x2e,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF4_TX,
- .addr = 0xe6c80020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x39,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF4_RX,
- .addr = 0xe6c80024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x3a,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF5_TX,
- .addr = 0xe6cb0020,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x35,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF5_RX,
- .addr = 0xe6cb0024,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x36,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF6_TX,
- .addr = 0xe6c30040,
- .chcr = CHCR_TX(XMIT_SZ_8BIT),
- .mid_rid = 0x3d,
- }, {
- .slave_id = SHDMA_SLAVE_SCIF6_RX,
- .addr = 0xe6c30060,
- .chcr = CHCR_RX(XMIT_SZ_8BIT),
- .mid_rid = 0x3e,
- }, {
- .slave_id = SHDMA_SLAVE_FLCTL0_TX,
- .addr = 0xe6a30050,
- .chcr = CHCR_TX(XMIT_SZ_32BIT),
- .mid_rid = 0x83,
- }, {
- .slave_id = SHDMA_SLAVE_FLCTL0_RX,
- .addr = 0xe6a30050,
- .chcr = CHCR_RX(XMIT_SZ_32BIT),
- .mid_rid = 0x83,
- }, {
- .slave_id = SHDMA_SLAVE_FLCTL1_TX,
- .addr = 0xe6a30060,
- .chcr = CHCR_TX(XMIT_SZ_32BIT),
- .mid_rid = 0x87,
- }, {
- .slave_id = SHDMA_SLAVE_FLCTL1_RX,
- .addr = 0xe6a30060,
- .chcr = CHCR_RX(XMIT_SZ_32BIT),
- .mid_rid = 0x87,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI0_TX,
- .addr = 0xe6850030,
- .chcr = CHCR_TX(XMIT_SZ_16BIT),
- .mid_rid = 0xc1,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI0_RX,
- .addr = 0xe6850030,
- .chcr = CHCR_RX(XMIT_SZ_16BIT),
- .mid_rid = 0xc2,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI1_TX,
- .addr = 0xe6860030,
- .chcr = CHCR_TX(XMIT_SZ_16BIT),
- .mid_rid = 0xc9,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI1_RX,
- .addr = 0xe6860030,
- .chcr = CHCR_RX(XMIT_SZ_16BIT),
- .mid_rid = 0xca,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI2_TX,
- .addr = 0xe6870030,
- .chcr = CHCR_TX(XMIT_SZ_16BIT),
- .mid_rid = 0xcd,
- }, {
- .slave_id = SHDMA_SLAVE_SDHI2_RX,
- .addr = 0xe6870030,
- .chcr = CHCR_RX(XMIT_SZ_16BIT),
- .mid_rid = 0xce,
- }, {
- .slave_id = SHDMA_SLAVE_FSIA_TX,
- .addr = 0xfe1f0024,
- .chcr = CHCR_TX(XMIT_SZ_32BIT),
- .mid_rid = 0xb1,
- }, {
- .slave_id = SHDMA_SLAVE_FSIA_RX,
- .addr = 0xfe1f0020,
- .chcr = CHCR_RX(XMIT_SZ_32BIT),
- .mid_rid = 0xb2,
- }, {
- .slave_id = SHDMA_SLAVE_MMCIF_TX,
- .addr = 0xe6bd0034,
- .chcr = CHCR_TX(XMIT_SZ_32BIT),
- .mid_rid = 0xd1,
- }, {
- .slave_id = SHDMA_SLAVE_MMCIF_RX,
- .addr = 0xe6bd0034,
- .chcr = CHCR_RX(XMIT_SZ_32BIT),
- .mid_rid = 0xd2,
- },
-};
-
-#define SH7372_CHCLR (0x220 - 0x20)
-
-static const struct sh_dmae_channel sh7372_dmae_channels[] = {
- {
- .offset = 0,
- .dmars = 0,
- .dmars_bit = 0,
- .chclr_offset = SH7372_CHCLR + 0,
- }, {
- .offset = 0x10,
- .dmars = 0,
- .dmars_bit = 8,
- .chclr_offset = SH7372_CHCLR + 0x10,
- }, {
- .offset = 0x20,
- .dmars = 4,
- .dmars_bit = 0,
- .chclr_offset = SH7372_CHCLR + 0x20,
- }, {
- .offset = 0x30,
- .dmars = 4,
- .dmars_bit = 8,
- .chclr_offset = SH7372_CHCLR + 0x30,
- }, {
- .offset = 0x50,
- .dmars = 8,
- .dmars_bit = 0,
- .chclr_offset = SH7372_CHCLR + 0x50,
- }, {
- .offset = 0x60,
- .dmars = 8,
- .dmars_bit = 8,
- .chclr_offset = SH7372_CHCLR + 0x60,
- }
-};
-
-static struct sh_dmae_pdata dma_platform_data = {
- .slave = sh7372_dmae_slaves,
- .slave_num = ARRAY_SIZE(sh7372_dmae_slaves),
- .channel = sh7372_dmae_channels,
- .channel_num = ARRAY_SIZE(sh7372_dmae_channels),
- .ts_low_shift = TS_LOW_SHIFT,
- .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
- .ts_high_shift = TS_HI_SHIFT,
- .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
- .ts_shift = dma_ts_shift,
- .ts_shift_num = ARRAY_SIZE(dma_ts_shift),
- .dmaor_init = DMAOR_DME,
- .chclr_present = 1,
-};
-
-/* Resource order important! */
-static struct resource sh7372_dmae0_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xfe008020,
- .end = 0xfe00828f,
- .flags = IORESOURCE_MEM,
- },
- {
- /* DMARSx */
- .start = 0xfe009000,
- .end = 0xfe00900b,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "error_irq",
- .start = evt2irq(0x20c0),
- .end = evt2irq(0x20c0),
- .flags = IORESOURCE_IRQ,
- },
- {
- /* IRQ for channels 0-5 */
- .start = evt2irq(0x2000),
- .end = evt2irq(0x20a0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-/* Resource order important! */
-static struct resource sh7372_dmae1_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xfe018020,
- .end = 0xfe01828f,
- .flags = IORESOURCE_MEM,
- },
- {
- /* DMARSx */
- .start = 0xfe019000,
- .end = 0xfe01900b,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "error_irq",
- .start = evt2irq(0x21c0),
- .end = evt2irq(0x21c0),
- .flags = IORESOURCE_IRQ,
- },
- {
- /* IRQ for channels 0-5 */
- .start = evt2irq(0x2100),
- .end = evt2irq(0x21a0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-/* Resource order important! */
-static struct resource sh7372_dmae2_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xfe028020,
- .end = 0xfe02828f,
- .flags = IORESOURCE_MEM,
- },
- {
- /* DMARSx */
- .start = 0xfe029000,
- .end = 0xfe02900b,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "error_irq",
- .start = evt2irq(0x22c0),
- .end = evt2irq(0x22c0),
- .flags = IORESOURCE_IRQ,
- },
- {
- /* IRQ for channels 0-5 */
- .start = evt2irq(0x2200),
- .end = evt2irq(0x22a0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device dma0_device = {
- .name = "sh-dma-engine",
- .id = 0,
- .resource = sh7372_dmae0_resources,
- .num_resources = ARRAY_SIZE(sh7372_dmae0_resources),
- .dev = {
- .platform_data = &dma_platform_data,
- },
-};
-
-static struct platform_device dma1_device = {
- .name = "sh-dma-engine",
- .id = 1,
- .resource = sh7372_dmae1_resources,
- .num_resources = ARRAY_SIZE(sh7372_dmae1_resources),
- .dev = {
- .platform_data = &dma_platform_data,
- },
-};
-
-static struct platform_device dma2_device = {
- .name = "sh-dma-engine",
- .id = 2,
- .resource = sh7372_dmae2_resources,
- .num_resources = ARRAY_SIZE(sh7372_dmae2_resources),
- .dev = {
- .platform_data = &dma_platform_data,
- },
-};
-
-/*
- * USB-DMAC
- */
-static const struct sh_dmae_channel sh7372_usb_dmae_channels[] = {
- {
- .offset = 0,
- }, {
- .offset = 0x20,
- },
-};
-
-/* USB DMAC0 */
-static const struct sh_dmae_slave_config sh7372_usb_dmae0_slaves[] = {
- {
- .slave_id = SHDMA_SLAVE_USB0_TX,
- .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
- }, {
- .slave_id = SHDMA_SLAVE_USB0_RX,
- .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
- },
-};
-
-static struct sh_dmae_pdata usb_dma0_platform_data = {
- .slave = sh7372_usb_dmae0_slaves,
- .slave_num = ARRAY_SIZE(sh7372_usb_dmae0_slaves),
- .channel = sh7372_usb_dmae_channels,
- .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
- .ts_low_shift = USBTS_LOW_SHIFT,
- .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
- .ts_high_shift = USBTS_HI_SHIFT,
- .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
- .ts_shift = dma_usbts_shift,
- .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
- .dmaor_init = DMAOR_DME,
- .chcr_offset = 0x14,
- .chcr_ie_bit = 1 << 5,
- .dmaor_is_32bit = 1,
- .needs_tend_set = 1,
- .no_dmars = 1,
- .slave_only = 1,
-};
-
-static struct resource sh7372_usb_dmae0_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xe68a0020,
- .end = 0xe68a0064 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- /* VCR/SWR/DMICR */
- .start = 0xe68a0000,
- .end = 0xe68a0014 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- /* IRQ for channels */
- .start = evt2irq(0x0a00),
- .end = evt2irq(0x0a00),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usb_dma0_device = {
- .name = "sh-dma-engine",
- .id = 3,
- .resource = sh7372_usb_dmae0_resources,
- .num_resources = ARRAY_SIZE(sh7372_usb_dmae0_resources),
- .dev = {
- .platform_data = &usb_dma0_platform_data,
- },
-};
-
-/* USB DMAC1 */
-static const struct sh_dmae_slave_config sh7372_usb_dmae1_slaves[] = {
- {
- .slave_id = SHDMA_SLAVE_USB1_TX,
- .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
- }, {
- .slave_id = SHDMA_SLAVE_USB1_RX,
- .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
- },
-};
-
-static struct sh_dmae_pdata usb_dma1_platform_data = {
- .slave = sh7372_usb_dmae1_slaves,
- .slave_num = ARRAY_SIZE(sh7372_usb_dmae1_slaves),
- .channel = sh7372_usb_dmae_channels,
- .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
- .ts_low_shift = USBTS_LOW_SHIFT,
- .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
- .ts_high_shift = USBTS_HI_SHIFT,
- .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
- .ts_shift = dma_usbts_shift,
- .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
- .dmaor_init = DMAOR_DME,
- .chcr_offset = 0x14,
- .chcr_ie_bit = 1 << 5,
- .dmaor_is_32bit = 1,
- .needs_tend_set = 1,
- .no_dmars = 1,
- .slave_only = 1,
-};
-
-static struct resource sh7372_usb_dmae1_resources[] = {
- {
- /* Channel registers and DMAOR */
- .start = 0xe68c0020,
- .end = 0xe68c0064 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- /* VCR/SWR/DMICR */
- .start = 0xe68c0000,
- .end = 0xe68c0014 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- /* IRQ for channels */
- .start = evt2irq(0x1d00),
- .end = evt2irq(0x1d00),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usb_dma1_device = {
- .name = "sh-dma-engine",
- .id = 4,
- .resource = sh7372_usb_dmae1_resources,
- .num_resources = ARRAY_SIZE(sh7372_usb_dmae1_resources),
- .dev = {
- .platform_data = &usb_dma1_platform_data,
- },
-};
-
-/* VPU */
-static struct uio_info vpu_platform_data = {
- .name = "VPU5HG",
- .version = "0",
- .irq = intcs_evt2irq(0x980),
-};
-
-static struct resource vpu_resources[] = {
- [0] = {
- .name = "VPU",
- .start = 0xfe900000,
- .end = 0xfe900157,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device vpu_device = {
- .name = "uio_pdrv_genirq",
- .id = 0,
- .dev = {
- .platform_data = &vpu_platform_data,
- },
- .resource = vpu_resources,
- .num_resources = ARRAY_SIZE(vpu_resources),
-};
-
-/* VEU0 */
-static struct uio_info veu0_platform_data = {
- .name = "VEU0",
- .version = "0",
- .irq = intcs_evt2irq(0x700),
-};
-
-static struct resource veu0_resources[] = {
- [0] = {
- .name = "VEU0",
- .start = 0xfe920000,
- .end = 0xfe9200cb,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu0_device = {
- .name = "uio_pdrv_genirq",
- .id = 1,
- .dev = {
- .platform_data = &veu0_platform_data,
- },
- .resource = veu0_resources,
- .num_resources = ARRAY_SIZE(veu0_resources),
-};
-
-/* VEU1 */
-static struct uio_info veu1_platform_data = {
- .name = "VEU1",
- .version = "0",
- .irq = intcs_evt2irq(0x720),
-};
-
-static struct resource veu1_resources[] = {
- [0] = {
- .name = "VEU1",
- .start = 0xfe924000,
- .end = 0xfe9240cb,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu1_device = {
- .name = "uio_pdrv_genirq",
- .id = 2,
- .dev = {
- .platform_data = &veu1_platform_data,
- },
- .resource = veu1_resources,
- .num_resources = ARRAY_SIZE(veu1_resources),
-};
-
-/* VEU2 */
-static struct uio_info veu2_platform_data = {
- .name = "VEU2",
- .version = "0",
- .irq = intcs_evt2irq(0x740),
-};
-
-static struct resource veu2_resources[] = {
- [0] = {
- .name = "VEU2",
- .start = 0xfe928000,
- .end = 0xfe928307,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu2_device = {
- .name = "uio_pdrv_genirq",
- .id = 3,
- .dev = {
- .platform_data = &veu2_platform_data,
- },
- .resource = veu2_resources,
- .num_resources = ARRAY_SIZE(veu2_resources),
-};
-
-/* VEU3 */
-static struct uio_info veu3_platform_data = {
- .name = "VEU3",
- .version = "0",
- .irq = intcs_evt2irq(0x760),
-};
-
-static struct resource veu3_resources[] = {
- [0] = {
- .name = "VEU3",
- .start = 0xfe92c000,
- .end = 0xfe92c307,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device veu3_device = {
- .name = "uio_pdrv_genirq",
- .id = 4,
- .dev = {
- .platform_data = &veu3_platform_data,
- },
- .resource = veu3_resources,
- .num_resources = ARRAY_SIZE(veu3_resources),
-};
-
-/* JPU */
-static struct uio_info jpu_platform_data = {
- .name = "JPU",
- .version = "0",
- .irq = intcs_evt2irq(0x560),
-};
-
-static struct resource jpu_resources[] = {
- [0] = {
- .name = "JPU",
- .start = 0xfe980000,
- .end = 0xfe9902d3,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device jpu_device = {
- .name = "uio_pdrv_genirq",
- .id = 5,
- .dev = {
- .platform_data = &jpu_platform_data,
- },
- .resource = jpu_resources,
- .num_resources = ARRAY_SIZE(jpu_resources),
-};
-
-/* SPU2DSP0 */
-static struct uio_info spu0_platform_data = {
- .name = "SPU2DSP0",
- .version = "0",
- .irq = evt2irq(0x1800),
-};
-
-static struct resource spu0_resources[] = {
- [0] = {
- .name = "SPU2DSP0",
- .start = 0xfe200000,
- .end = 0xfe2fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device spu0_device = {
- .name = "uio_pdrv_genirq",
- .id = 6,
- .dev = {
- .platform_data = &spu0_platform_data,
- },
- .resource = spu0_resources,
- .num_resources = ARRAY_SIZE(spu0_resources),
-};
-
-/* SPU2DSP1 */
-static struct uio_info spu1_platform_data = {
- .name = "SPU2DSP1",
- .version = "0",
- .irq = evt2irq(0x1820),
-};
-
-static struct resource spu1_resources[] = {
- [0] = {
- .name = "SPU2DSP1",
- .start = 0xfe300000,
- .end = 0xfe3fffff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device spu1_device = {
- .name = "uio_pdrv_genirq",
- .id = 7,
- .dev = {
- .platform_data = &spu1_platform_data,
- },
- .resource = spu1_resources,
- .num_resources = ARRAY_SIZE(spu1_resources),
-};
-
-/* IPMMUI (an IPMMU module for ICB/LMB) */
-static struct resource ipmmu_resources[] = {
- [0] = {
- .name = "IPMMUI",
- .start = 0xfe951000,
- .end = 0xfe9510ff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static const char * const ipmmu_dev_names[] = {
- "sh_mobile_lcdc_fb.0",
- "sh_mobile_lcdc_fb.1",
- "sh_mobile_ceu.0",
- "uio_pdrv_genirq.0",
- "uio_pdrv_genirq.1",
- "uio_pdrv_genirq.2",
- "uio_pdrv_genirq.3",
- "uio_pdrv_genirq.4",
- "uio_pdrv_genirq.5",
-};
-
-static struct shmobile_ipmmu_platform_data ipmmu_platform_data = {
- .dev_names = ipmmu_dev_names,
- .num_dev_names = ARRAY_SIZE(ipmmu_dev_names),
-};
-
-static struct platform_device ipmmu_device = {
- .name = "ipmmu",
- .id = -1,
- .dev = {
- .platform_data = &ipmmu_platform_data,
- },
- .resource = ipmmu_resources,
- .num_resources = ARRAY_SIZE(ipmmu_resources),
-};
-
-static struct platform_device *sh7372_early_devices[] __initdata = {
- &scif0_device,
- &scif1_device,
- &scif2_device,
- &scif3_device,
- &scif4_device,
- &scif5_device,
- &scif6_device,
- &cmt2_device,
- &tmu0_device,
- &ipmmu_device,
-};
-
-static struct platform_device *sh7372_late_devices[] __initdata = {
- &iic0_device,
- &iic1_device,
- &dma0_device,
- &dma1_device,
- &dma2_device,
- &usb_dma0_device,
- &usb_dma1_device,
- &vpu_device,
- &veu0_device,
- &veu1_device,
- &veu2_device,
- &veu3_device,
- &jpu_device,
- &spu0_device,
- &spu1_device,
-};
-
-void __init sh7372_add_standard_devices(void)
-{
- static struct pm_domain_device domain_devices[] __initdata = {
- { "A3RV", &vpu_device, },
- { "A4MP", &spu0_device, },
- { "A4MP", &spu1_device, },
- { "A3SP", &scif0_device, },
- { "A3SP", &scif1_device, },
- { "A3SP", &scif2_device, },
- { "A3SP", &scif3_device, },
- { "A3SP", &scif4_device, },
- { "A3SP", &scif5_device, },
- { "A3SP", &scif6_device, },
- { "A3SP", &iic1_device, },
- { "A3SP", &dma0_device, },
- { "A3SP", &dma1_device, },
- { "A3SP", &dma2_device, },
- { "A3SP", &usb_dma0_device, },
- { "A3SP", &usb_dma1_device, },
- { "A4R", &iic0_device, },
- { "A4R", &veu0_device, },
- { "A4R", &veu1_device, },
- { "A4R", &veu2_device, },
- { "A4R", &veu3_device, },
- { "A4R", &jpu_device, },
- { "A4R", &tmu0_device, },
- };
-
- sh7372_init_pm_domains();
-
- platform_add_devices(sh7372_early_devices,
- ARRAY_SIZE(sh7372_early_devices));
-
- platform_add_devices(sh7372_late_devices,
- ARRAY_SIZE(sh7372_late_devices));
-
- rmobile_add_devices_to_domains(domain_devices,
- ARRAY_SIZE(domain_devices));
-}
-
-void __init sh7372_earlytimer_init(void)
-{
- sh7372_clock_init();
- shmobile_earlytimer_init();
-}
-
-void __init sh7372_add_early_devices(void)
-{
- early_platform_add_devices(sh7372_early_devices,
- ARRAY_SIZE(sh7372_early_devices));
-
- /* setup early console here as well */
- shmobile_setup_console();
-}
-
-#ifdef CONFIG_USE_OF
-
-void __init sh7372_add_early_devices_dt(void)
-{
- shmobile_init_delay();
-
- sh7372_add_early_devices();
-}
-
-void __init sh7372_add_standard_devices_dt(void)
-{
- /* clocks are setup late during boot in the case of DT */
- sh7372_clock_init();
-
- platform_add_devices(sh7372_early_devices,
- ARRAY_SIZE(sh7372_early_devices));
-
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char *sh7372_boards_compat_dt[] __initdata = {
- "renesas,sh7372",
- NULL,
-};
-
-DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
- .map_io = sh7372_map_io,
- .init_early = sh7372_add_early_devices_dt,
- .init_irq = sh7372_init_irq,
- .handle_irq = shmobile_handle_irq_intc,
- .init_machine = sh7372_add_standard_devices_dt,
- .init_late = shmobile_init_late,
- .dt_compat = sh7372_boards_compat_dt,
-MACHINE_END
-
-#endif /* CONFIG_USE_OF */
--- 0001/arch/arm/mach-shmobile/sh7372.h
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,84 +0,0 @@
-/*
- * Copyright (C) 2010 Renesas Solutions Corp.
- *
- * Kuninori Morimoto <morimoto.kuninori@renesas.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef __ASM_SH7372_H__
-#define __ASM_SH7372_H__
-
-/* DMA slave IDs */
-enum {
- SHDMA_SLAVE_INVALID,
- SHDMA_SLAVE_SCIF0_TX,
- SHDMA_SLAVE_SCIF0_RX,
- SHDMA_SLAVE_SCIF1_TX,
- SHDMA_SLAVE_SCIF1_RX,
- SHDMA_SLAVE_SCIF2_TX,
- SHDMA_SLAVE_SCIF2_RX,
- SHDMA_SLAVE_SCIF3_TX,
- SHDMA_SLAVE_SCIF3_RX,
- SHDMA_SLAVE_SCIF4_TX,
- SHDMA_SLAVE_SCIF4_RX,
- SHDMA_SLAVE_SCIF5_TX,
- SHDMA_SLAVE_SCIF5_RX,
- SHDMA_SLAVE_SCIF6_TX,
- SHDMA_SLAVE_SCIF6_RX,
- SHDMA_SLAVE_FLCTL0_TX,
- SHDMA_SLAVE_FLCTL0_RX,
- SHDMA_SLAVE_FLCTL1_TX,
- SHDMA_SLAVE_FLCTL1_RX,
- SHDMA_SLAVE_SDHI0_RX,
- SHDMA_SLAVE_SDHI0_TX,
- SHDMA_SLAVE_SDHI1_RX,
- SHDMA_SLAVE_SDHI1_TX,
- SHDMA_SLAVE_SDHI2_RX,
- SHDMA_SLAVE_SDHI2_TX,
- SHDMA_SLAVE_FSIA_RX,
- SHDMA_SLAVE_FSIA_TX,
- SHDMA_SLAVE_MMCIF_RX,
- SHDMA_SLAVE_MMCIF_TX,
- SHDMA_SLAVE_USB0_TX,
- SHDMA_SLAVE_USB0_RX,
- SHDMA_SLAVE_USB1_TX,
- SHDMA_SLAVE_USB1_RX,
-};
-
-extern struct clk sh7372_extal1_clk;
-extern struct clk sh7372_extal2_clk;
-extern struct clk sh7372_dv_clki_clk;
-extern struct clk sh7372_dv_clki_div2_clk;
-extern struct clk sh7372_pllc2_clk;
-
-extern void sh7372_init_irq(void);
-extern void sh7372_map_io(void);
-extern void sh7372_earlytimer_init(void);
-extern void sh7372_add_early_devices(void);
-extern void sh7372_add_standard_devices(void);
-extern void sh7372_add_early_devices_dt(void);
-extern void sh7372_add_standard_devices_dt(void);
-extern void sh7372_clock_init(void);
-extern void sh7372_pinmux_init(void);
-extern void sh7372_pm_init(void);
-extern void sh7372_resume_core_standby_sysc(void);
-extern int sh7372_do_idle_sysc(unsigned long sleep_mode);
-extern void sh7372_intcs_suspend(void);
-extern void sh7372_intcs_resume(void);
-extern void sh7372_intca_suspend(void);
-extern void sh7372_intca_resume(void);
-
-extern unsigned long sh7372_cpu_resume;
-
-#ifdef CONFIG_PM
-extern void __init sh7372_init_pm_domains(void);
-#else
-static inline void sh7372_init_pm_domains(void) {}
-#endif
-
-extern void __init sh7372_pm_init_late(void);
-
-#endif /* __ASM_SH7372_H__ */
--- 0001/arch/arm/mach-shmobile/sleep-sh7372.S
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,98 +0,0 @@
-/*
- * sh7372 lowlevel sleep code for "Core Standby Mode"
- *
- * Copyright (C) 2011 Magnus Damm
- *
- * In "Core Standby Mode" the ARM core is off, but L2 cache is still on
- *
- * Based on mach-omap2/sleep34xx.S
- *
- * (C) Copyright 2007 Texas Instruments
- * Karthik Dasu <karthik-dp@ti.com>
- *
- * (C) Copyright 2004 Texas Instruments, <www.ti.com>
- * Richard Woodruff <r-woodruff2@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/memory.h>
-#include <asm/assembler.h>
-
-#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
- .align 12
- .text
- .global sh7372_resume_core_standby_sysc
-sh7372_resume_core_standby_sysc:
- ldr pc, 1f
-
- .align 2
- .globl sh7372_cpu_resume
-sh7372_cpu_resume:
-1: .space 4
-
-#define SPDCR 0xe6180008
-
- /* A3SM & A4S power down */
- .global sh7372_do_idle_sysc
-sh7372_do_idle_sysc:
- mov r8, r0 /* sleep mode passed in r0 */
-
- /*
- * Clear the SCTLR.C bit to prevent further data cache
- * allocation. Clearing SCTLR.C would make all the data accesses
- * strongly ordered and would not hit the cache.
- */
- mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #(1 << 2) @ Disable the C bit
- mcr p15, 0, r0, c1, c0, 0
- isb
-
- /*
- * Clean and invalidate data cache again.
- */
- ldr r1, kernel_flush
- blx r1
-
- /* disable L2 cache in the aux control register */
- mrc p15, 0, r10, c1, c0, 1
- bic r10, r10, #2
- mcr p15, 0, r10, c1, c0, 1
- isb
-
- /*
- * The kernel doesn't interwork: v7_flush_dcache_all in particluar will
- * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled.
- * This sequence switches back to ARM. Note that .align may insert a
- * nop: bx pc needs to be word-aligned in order to work.
- */
- THUMB( .thumb )
- THUMB( .align )
- THUMB( bx pc )
- THUMB( nop )
- .arm
-
- /* Data memory barrier and Data sync barrier */
- dsb
- dmb
-
- /* SYSC power down */
- ldr r0, =SPDCR
- str r8, [r0]
-1:
- b 1b
-
- .align 2
-kernel_flush:
- .word v7_flush_dcache_all
-#endif
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:54 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove DT compatible string documentation for the now removed sh7372 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 --
1 file changed, 2 deletions(-)
--- 0005/Documentation/devicetree/bindings/arm/shmobile.txt
+++ work/Documentation/devicetree/bindings/arm/shmobile.txt 2015-01-21 11:36:21.787569650 +0900
@@ -7,8 +7,6 @@ SoCs:
compatible = "renesas,emev2"
- RZ/A1H (R7S72100)
compatible = "renesas,r7s72100"
- - SH-Mobile AP4 (R8A73720/SH7372)
- compatible = "renesas,sh7372"
- SH-Mobile AG5 (R8A73A00/SH73A0)
compatible = "renesas,sh73a0"
- R-Mobile APE6 (R8A73A40)
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
@ 2015-01-21 4:54 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove DT compatible string documentation for the now removed sh7372 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 --
1 file changed, 2 deletions(-)
--- 0005/Documentation/devicetree/bindings/arm/shmobile.txt
+++ work/Documentation/devicetree/bindings/arm/shmobile.txt 2015-01-21 11:36:21.787569650 +0900
@@ -7,8 +7,6 @@ SoCs:
compatible = "renesas,emev2"
- RZ/A1H (R7S72100)
compatible = "renesas,r7s72100"
- - SH-Mobile AP4 (R8A73720/SH7372)
- compatible = "renesas,sh7372"
- SH-Mobile AG5 (R8A73A00/SH73A0)
compatible = "renesas,sh73a0"
- R-Mobile APE6 (R8A73A40)
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:54 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the sh7372 DTSI file for the now unsupported sh7372 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/boot/dts/sh7372.dtsi | 35 -----------------------------------
1 file changed, 35 deletions(-)
--- 0001/arch/arm/boot/dts/sh7372.dtsi
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,35 +0,0 @@
-/*
- * Device Tree Source for the sh7372 SoC
- *
- * Copyright (C) 2012 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
- compatible = "renesas,sh7372";
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "arm,cortex-a8";
- device_type = "cpu";
- reg = <0x0>;
- clock-frequency = <800000000>;
- };
- };
-
- pfc: pfc@e6050000 {
- compatible = "renesas,pfc-sh7372";
- reg = <0xe6050000 0x8000>,
- <0xe605801c 0x1c>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-};
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
@ 2015-01-21 4:54 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the sh7372 DTSI file for the now unsupported sh7372 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
arch/arm/boot/dts/sh7372.dtsi | 35 -----------------------------------
1 file changed, 35 deletions(-)
--- 0001/arch/arm/boot/dts/sh7372.dtsi
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,35 +0,0 @@
-/*
- * Device Tree Source for the sh7372 SoC
- *
- * Copyright (C) 2012 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
- compatible = "renesas,sh7372";
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu at 0 {
- compatible = "arm,cortex-a8";
- device_type = "cpu";
- reg = <0x0>;
- clock-frequency = <800000000>;
- };
- };
-
- pfc: pfc at e6050000 {
- compatible = "renesas,pfc-sh7372";
- reg = <0xe6050000 0x8000>,
- <0xe605801c 0x1c>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-};
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:54 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove ZBOOT MMC/SDHI Documentation for sh7372 together
wit the vrl4 utility. Without sh7372 and Mackerel support
these files are no longer useful.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Documentation/arm/Makefile | 2
Documentation/arm/SH-Mobile/Makefile | 7
Documentation/arm/SH-Mobile/vrl4.c | 170 -----------------------
Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt | 29 ---
Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt | 42 -----
5 files changed, 1 insertion(+), 249 deletions(-)
--- 0001/Documentation/arm/Makefile
+++ work/Documentation/arm/Makefile 2015-01-21 11:27:40.337571523 +0900
@@ -1 +1 @@
-subdir-y := SH-Mobile
+
--- 0001/Documentation/arm/SH-Mobile/Makefile
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,7 +0,0 @@
-# List of programs to build
-hostprogs-y := vrl4
-
-# Tell kbuild to always build the programs
-always := $(hostprogs-y)
-
-HOSTCFLAGS_vrl4.o += -I$(objtree)/usr/include -I$(srctree)/tools/include
--- 0001/Documentation/arm/SH-Mobile/vrl4.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,170 +0,0 @@
-/*
- * vrl4 format generator
- *
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-/*
- * usage: vrl4 < zImage > out
- * dd if=out of=/dev/sdx bsQ2 seek=1 # Write the image to sector 1
- *
- * Reads a zImage from stdin and writes a vrl4 image to stdout.
- * In practice this means writing a padded vrl4 header to stdout followed
- * by the zImage.
- *
- * The padding places the zImage at ALIGN bytes into the output.
- * The vrl4 uses ALIGN + START_BASE as the start_address.
- * This is where the mask ROM will jump to after verifying the header.
- *
- * The header sets copy_size to min(sizeof(zImage), MAX_BOOT_PROG_LEN) + ALIGN.
- * That is, the mask ROM will load the padded header (ALIGN bytes)
- * And then MAX_BOOT_PROG_LEN bytes of the image, or the entire image,
- * whichever is smaller.
- *
- * The zImage is not modified in any way.
- */
-
-#define _BSD_SOURCE
-#include <endian.h>
-#include <unistd.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <errno.h>
-#include <tools/endian.h>
-
-struct hdr {
- uint32_t magic1;
- uint32_t reserved1;
- uint32_t magic2;
- uint32_t reserved2;
- uint16_t copy_size;
- uint16_t boot_options;
- uint32_t reserved3;
- uint32_t start_address;
- uint32_t reserved4;
- uint32_t reserved5;
- char reserved6[308];
-};
-
-#define DECLARE_HDR(h) \
- struct hdr (h) = { \
- .magic1 = htole32(0xea000000), \
- .reserved1 = htole32(0x56), \
- .magic2 = htole32(0xe59ff008), \
- .reserved3 = htole16(0x1) }
-
-/* Align to 512 bytes, the MMCIF sector size */
-#define ALIGN_BITS 9
-#define ALIGN (1 << ALIGN_BITS)
-
-#define START_BASE 0xe55b0000
-
-/*
- * With an alignment of 512 the header uses the first sector.
- * There is a 128 sector (64kbyte) limit on the data loaded by the mask ROM.
- * So there are 127 sectors left for the boot programme. But in practice
- * Only a small portion of a zImage is needed, 16 sectors should be more
- * than enough.
- *
- * Note that this sets how much of the zImage is copied by the mask ROM.
- * The entire zImage is present after the header and is loaded
- * by the code in the boot program (which is the first portion of the zImage).
- */
-#define MAX_BOOT_PROG_LEN (16 * 512)
-
-#define ROUND_UP(x) ((x + ALIGN - 1) & ~(ALIGN - 1))
-
-static ssize_t do_read(int fd, void *buf, size_t count)
-{
- size_t offset = 0;
- ssize_t l;
-
- while (offset < count) {
- l = read(fd, buf + offset, count - offset);
- if (!l)
- break;
- if (l < 0) {
- if (errno = EAGAIN || errno = EWOULDBLOCK)
- continue;
- perror("read");
- return -1;
- }
- offset += l;
- }
-
- return offset;
-}
-
-static ssize_t do_write(int fd, const void *buf, size_t count)
-{
- size_t offset = 0;
- ssize_t l;
-
- while (offset < count) {
- l = write(fd, buf + offset, count - offset);
- if (l < 0) {
- if (errno = EAGAIN || errno = EWOULDBLOCK)
- continue;
- perror("write");
- return -1;
- }
- offset += l;
- }
-
- return offset;
-}
-
-static ssize_t write_zero(int fd, size_t len)
-{
- size_t i = len;
-
- while (i--) {
- const char x = 0;
- if (do_write(fd, &x, 1) < 0)
- return -1;
- }
-
- return len;
-}
-
-int main(void)
-{
- DECLARE_HDR(hdr);
- char boot_program[MAX_BOOT_PROG_LEN];
- size_t aligned_hdr_len, alligned_prog_len;
- ssize_t prog_len;
-
- prog_len = do_read(0, boot_program, sizeof(boot_program));
- if (prog_len <= 0)
- return -1;
-
- aligned_hdr_len = ROUND_UP(sizeof(hdr));
- hdr.start_address = htole32(START_BASE + aligned_hdr_len);
- alligned_prog_len = ROUND_UP(prog_len);
- hdr.copy_size = htole16(aligned_hdr_len + alligned_prog_len);
-
- if (do_write(1, &hdr, sizeof(hdr)) < 0)
- return -1;
- if (write_zero(1, aligned_hdr_len - sizeof(hdr)) < 0)
- return -1;
-
- if (do_write(1, boot_program, prog_len) < 0)
- return 1;
-
- /* Write out the rest of the kernel */
- while (1) {
- prog_len = do_read(0, boot_program, sizeof(boot_program));
- if (prog_len < 0)
- return 1;
- if (prog_len = 0)
- break;
- if (do_write(1, boot_program, prog_len) < 0)
- return 1;
- }
-
- return 0;
-}
--- 0001/Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,29 +0,0 @@
-ROM-able zImage boot from MMC
------------------------------
-
-An ROM-able zImage compiled with ZBOOT_ROM_MMCIF may be written to MMC and
-SuperH Mobile ARM will to boot directly from the MMCIF hardware block.
-
-This is achieved by the mask ROM loading the first portion of the image into
-MERAM and then jumping to it. This portion contains loader code which
-copies the entire image to SDRAM and jumps to it. From there the zImage
-boot code proceeds as normal, uncompressing the image into its final
-location and then jumping to it.
-
-This code has been tested on an AP4EB board using the developer 1A eMMC
-boot mode which is configured using the following jumper settings.
-The board used for testing required a patched mask ROM in order for
-this mode to function.
-
- 8 7 6 5 4 3 2 1
- x|x|x|x|x| |x|
-S4 -+-+-+-+-+-+-+-
- | | | | |x| |x on
-
-The zImage must be written to the MMC card at sector 1 (512 bytes) in
-vrl4 format. A utility vrl4 is supplied to accomplish this.
-
-e.g.
- vrl4 < zImage | dd of=/dev/sdX bsQ2 seek=1
-
-A dual-voltage MMC 4.0 card was used for testing.
--- 0001/Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,42 +0,0 @@
-ROM-able zImage boot from eSD
------------------------------
-
-An ROM-able zImage compiled with ZBOOT_ROM_SDHI may be written to eSD and
-SuperH Mobile ARM will to boot directly from the SDHI hardware block.
-
-This is achieved by the mask ROM loading the first portion of the image into
-MERAM and then jumping to it. This portion contains loader code which
-copies the entire image to SDRAM and jumps to it. From there the zImage
-boot code proceeds as normal, uncompressing the image into its final
-location and then jumping to it.
-
-This code has been tested on an mackerel board using the developer 1A eSD
-boot mode which is configured using the following jumper settings.
-
- 8 7 6 5 4 3 2 1
- x|x|x|x| |x|x|
-S4 -+-+-+-+-+-+-+-
- | | | |x| | |x on
-
-The eSD card needs to be present in SDHI slot 1 (CN7).
-As such S1 and S33 also need to be configured as per
-the notes in arch/arm/mach-shmobile/board-mackerel.c.
-
-A partial zImage must be written to physical partition #1 (boot)
-of the eSD at sector 0 in vrl4 format. A utility vrl4 is supplied to
-accomplish this.
-
-e.g.
- vrl4 < zImage | dd of=/dev/sdX bsQ2 count\x17
-
-A full copy of _the same_ zImage should be written to physical partition #1
-(boot) of the eSD at sector 0. This should _not_ be in vrl4 format.
-
- vrl4 < zImage | dd of=/dev/sdX bsQ2
-
-Note: The commands above assume that the physical partition has been
-switched. No such facility currently exists in the Linux Kernel.
-
-Physical partitions are described in the eSD specification. At the time of
-writing they are not the same as partitions that are typically configured
-using fdisk and visible through /proc/partitions
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
@ 2015-01-21 4:54 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove ZBOOT MMC/SDHI Documentation for sh7372 together
wit the vrl4 utility. Without sh7372 and Mackerel support
these files are no longer useful.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Documentation/arm/Makefile | 2
Documentation/arm/SH-Mobile/Makefile | 7
Documentation/arm/SH-Mobile/vrl4.c | 170 -----------------------
Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt | 29 ---
Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt | 42 -----
5 files changed, 1 insertion(+), 249 deletions(-)
--- 0001/Documentation/arm/Makefile
+++ work/Documentation/arm/Makefile 2015-01-21 11:27:40.337571523 +0900
@@ -1 +1 @@
-subdir-y := SH-Mobile
+
--- 0001/Documentation/arm/SH-Mobile/Makefile
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,7 +0,0 @@
-# List of programs to build
-hostprogs-y := vrl4
-
-# Tell kbuild to always build the programs
-always := $(hostprogs-y)
-
-HOSTCFLAGS_vrl4.o += -I$(objtree)/usr/include -I$(srctree)/tools/include
--- 0001/Documentation/arm/SH-Mobile/vrl4.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,170 +0,0 @@
-/*
- * vrl4 format generator
- *
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-/*
- * usage: vrl4 < zImage > out
- * dd if=out of=/dev/sdx bs=512 seek=1 # Write the image to sector 1
- *
- * Reads a zImage from stdin and writes a vrl4 image to stdout.
- * In practice this means writing a padded vrl4 header to stdout followed
- * by the zImage.
- *
- * The padding places the zImage at ALIGN bytes into the output.
- * The vrl4 uses ALIGN + START_BASE as the start_address.
- * This is where the mask ROM will jump to after verifying the header.
- *
- * The header sets copy_size to min(sizeof(zImage), MAX_BOOT_PROG_LEN) + ALIGN.
- * That is, the mask ROM will load the padded header (ALIGN bytes)
- * And then MAX_BOOT_PROG_LEN bytes of the image, or the entire image,
- * whichever is smaller.
- *
- * The zImage is not modified in any way.
- */
-
-#define _BSD_SOURCE
-#include <endian.h>
-#include <unistd.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <errno.h>
-#include <tools/endian.h>
-
-struct hdr {
- uint32_t magic1;
- uint32_t reserved1;
- uint32_t magic2;
- uint32_t reserved2;
- uint16_t copy_size;
- uint16_t boot_options;
- uint32_t reserved3;
- uint32_t start_address;
- uint32_t reserved4;
- uint32_t reserved5;
- char reserved6[308];
-};
-
-#define DECLARE_HDR(h) \
- struct hdr (h) = { \
- .magic1 = htole32(0xea000000), \
- .reserved1 = htole32(0x56), \
- .magic2 = htole32(0xe59ff008), \
- .reserved3 = htole16(0x1) }
-
-/* Align to 512 bytes, the MMCIF sector size */
-#define ALIGN_BITS 9
-#define ALIGN (1 << ALIGN_BITS)
-
-#define START_BASE 0xe55b0000
-
-/*
- * With an alignment of 512 the header uses the first sector.
- * There is a 128 sector (64kbyte) limit on the data loaded by the mask ROM.
- * So there are 127 sectors left for the boot programme. But in practice
- * Only a small portion of a zImage is needed, 16 sectors should be more
- * than enough.
- *
- * Note that this sets how much of the zImage is copied by the mask ROM.
- * The entire zImage is present after the header and is loaded
- * by the code in the boot program (which is the first portion of the zImage).
- */
-#define MAX_BOOT_PROG_LEN (16 * 512)
-
-#define ROUND_UP(x) ((x + ALIGN - 1) & ~(ALIGN - 1))
-
-static ssize_t do_read(int fd, void *buf, size_t count)
-{
- size_t offset = 0;
- ssize_t l;
-
- while (offset < count) {
- l = read(fd, buf + offset, count - offset);
- if (!l)
- break;
- if (l < 0) {
- if (errno == EAGAIN || errno == EWOULDBLOCK)
- continue;
- perror("read");
- return -1;
- }
- offset += l;
- }
-
- return offset;
-}
-
-static ssize_t do_write(int fd, const void *buf, size_t count)
-{
- size_t offset = 0;
- ssize_t l;
-
- while (offset < count) {
- l = write(fd, buf + offset, count - offset);
- if (l < 0) {
- if (errno == EAGAIN || errno == EWOULDBLOCK)
- continue;
- perror("write");
- return -1;
- }
- offset += l;
- }
-
- return offset;
-}
-
-static ssize_t write_zero(int fd, size_t len)
-{
- size_t i = len;
-
- while (i--) {
- const char x = 0;
- if (do_write(fd, &x, 1) < 0)
- return -1;
- }
-
- return len;
-}
-
-int main(void)
-{
- DECLARE_HDR(hdr);
- char boot_program[MAX_BOOT_PROG_LEN];
- size_t aligned_hdr_len, alligned_prog_len;
- ssize_t prog_len;
-
- prog_len = do_read(0, boot_program, sizeof(boot_program));
- if (prog_len <= 0)
- return -1;
-
- aligned_hdr_len = ROUND_UP(sizeof(hdr));
- hdr.start_address = htole32(START_BASE + aligned_hdr_len);
- alligned_prog_len = ROUND_UP(prog_len);
- hdr.copy_size = htole16(aligned_hdr_len + alligned_prog_len);
-
- if (do_write(1, &hdr, sizeof(hdr)) < 0)
- return -1;
- if (write_zero(1, aligned_hdr_len - sizeof(hdr)) < 0)
- return -1;
-
- if (do_write(1, boot_program, prog_len) < 0)
- return 1;
-
- /* Write out the rest of the kernel */
- while (1) {
- prog_len = do_read(0, boot_program, sizeof(boot_program));
- if (prog_len < 0)
- return 1;
- if (prog_len == 0)
- break;
- if (do_write(1, boot_program, prog_len) < 0)
- return 1;
- }
-
- return 0;
-}
--- 0001/Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,29 +0,0 @@
-ROM-able zImage boot from MMC
------------------------------
-
-An ROM-able zImage compiled with ZBOOT_ROM_MMCIF may be written to MMC and
-SuperH Mobile ARM will to boot directly from the MMCIF hardware block.
-
-This is achieved by the mask ROM loading the first portion of the image into
-MERAM and then jumping to it. This portion contains loader code which
-copies the entire image to SDRAM and jumps to it. From there the zImage
-boot code proceeds as normal, uncompressing the image into its final
-location and then jumping to it.
-
-This code has been tested on an AP4EB board using the developer 1A eMMC
-boot mode which is configured using the following jumper settings.
-The board used for testing required a patched mask ROM in order for
-this mode to function.
-
- 8 7 6 5 4 3 2 1
- x|x|x|x|x| |x|
-S4 -+-+-+-+-+-+-+-
- | | | | |x| |x on
-
-The zImage must be written to the MMC card at sector 1 (512 bytes) in
-vrl4 format. A utility vrl4 is supplied to accomplish this.
-
-e.g.
- vrl4 < zImage | dd of=/dev/sdX bs=512 seek=1
-
-A dual-voltage MMC 4.0 card was used for testing.
--- 0001/Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,42 +0,0 @@
-ROM-able zImage boot from eSD
------------------------------
-
-An ROM-able zImage compiled with ZBOOT_ROM_SDHI may be written to eSD and
-SuperH Mobile ARM will to boot directly from the SDHI hardware block.
-
-This is achieved by the mask ROM loading the first portion of the image into
-MERAM and then jumping to it. This portion contains loader code which
-copies the entire image to SDRAM and jumps to it. From there the zImage
-boot code proceeds as normal, uncompressing the image into its final
-location and then jumping to it.
-
-This code has been tested on an mackerel board using the developer 1A eSD
-boot mode which is configured using the following jumper settings.
-
- 8 7 6 5 4 3 2 1
- x|x|x|x| |x|x|
-S4 -+-+-+-+-+-+-+-
- | | | |x| | |x on
-
-The eSD card needs to be present in SDHI slot 1 (CN7).
-As such S1 and S33 also need to be configured as per
-the notes in arch/arm/mach-shmobile/board-mackerel.c.
-
-A partial zImage must be written to physical partition #1 (boot)
-of the eSD at sector 0 in vrl4 format. A utility vrl4 is supplied to
-accomplish this.
-
-e.g.
- vrl4 < zImage | dd of=/dev/sdX bs=512 count=17
-
-A full copy of _the same_ zImage should be written to physical partition #1
-(boot) of the eSD@sector 0. This should _not_ be in vrl4 format.
-
- vrl4 < zImage | dd of=/dev/sdX bs=512
-
-Note: The commands above assume that the physical partition has been
-switched. No such facility currently exists in the Linux Kernel.
-
-Physical partitions are described in the eSD specification. At the time of
-writing they are not the same as partitions that are typically configured
-using fdisk and visible through /proc/partitions
^ permalink raw reply [flat|nested] 58+ messages in thread* Re: [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
2015-01-21 4:54 ` Magnus Damm
@ 2015-01-21 10:40 ` Geert Uytterhoeven
-1 siblings, 0 replies; 58+ messages in thread
From: Geert Uytterhoeven @ 2015-01-21 10:40 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Wed, Jan 21, 2015 at 5:54 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> --- 0001/Documentation/arm/Makefile
> +++ work/Documentation/arm/Makefile 2015-01-21 11:27:40.337571523 +0900
> @@ -1 +1 @@
> -subdir-y := SH-Mobile
> +
.git/rebase-apply/patch:14: new blank line at EOF.
This file can just be removed, if you remove the "arm" from
Documentation/Makefile?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
@ 2015-01-21 10:40 ` Geert Uytterhoeven
0 siblings, 0 replies; 58+ messages in thread
From: Geert Uytterhoeven @ 2015-01-21 10:40 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
On Wed, Jan 21, 2015 at 5:54 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> --- 0001/Documentation/arm/Makefile
> +++ work/Documentation/arm/Makefile 2015-01-21 11:27:40.337571523 +0900
> @@ -1 +1 @@
> -subdir-y := SH-Mobile
> +
.git/rebase-apply/patch:14: new blank line at EOF.
This file can just be removed, if you remove the "arm" from
Documentation/Makefile?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 58+ messages in thread* Re: [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
2015-01-21 10:40 ` Geert Uytterhoeven
@ 2015-01-26 6:10 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 6:10 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Wed, Jan 21, 2015 at 7:40 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Wed, Jan 21, 2015 at 5:54 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> --- 0001/Documentation/arm/Makefile
>> +++ work/Documentation/arm/Makefile 2015-01-21 11:27:40.337571523 +0900
>> @@ -1 +1 @@
>> -subdir-y := SH-Mobile
>> +
>
> .git/rebase-apply/patch:14: new blank line at EOF.
>
> This file can just be removed, if you remove the "arm" from
> Documentation/Makefile?
Thanks, I agree. I've done exactly that in V2.
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
@ 2015-01-26 6:10 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 6:10 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Wed, Jan 21, 2015 at 7:40 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Wed, Jan 21, 2015 at 5:54 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> --- 0001/Documentation/arm/Makefile
>> +++ work/Documentation/arm/Makefile 2015-01-21 11:27:40.337571523 +0900
>> @@ -1 +1 @@
>> -subdir-y := SH-Mobile
>> +
>
> .git/rebase-apply/patch:14: new blank line at EOF.
>
> This file can just be removed, if you remove the "arm" from
> Documentation/Makefile?
Thanks, I agree. I've done exactly that in V2.
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:54 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove sh7372 PFC support as part of the sh7372 and Mackerel
legacy code removal.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
drivers/pinctrl/sh-pfc/Kconfig | 5
drivers/pinctrl/sh-pfc/Makefile | 1
drivers/pinctrl/sh-pfc/core.c | 9
drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 -----------------------------------
4 files changed, 2660 deletions(-)
--- 0001/drivers/pinctrl/sh-pfc/Kconfig
+++ work/drivers/pinctrl/sh-pfc/Kconfig 2015-01-21 12:09:48.247562439 +0900
@@ -68,11 +68,6 @@ config PINCTRL_PFC_SH7269
depends on GPIOLIB
select PINCTRL_SH_PFC
-config PINCTRL_PFC_SH7372
- def_bool y
- depends on ARCH_SH7372
- select PINCTRL_SH_PFC
-
config PINCTRL_PFC_SH73A0
def_bool y
depends on ARCH_SH73A0
--- 0001/drivers/pinctrl/sh-pfc/Makefile
+++ work/drivers/pinctrl/sh-pfc/Makefile 2015-01-21 12:09:41.397562464 +0900
@@ -12,7 +12,6 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc
obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o
obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o
obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o
-obj-$(CONFIG_PINCTRL_PFC_SH7372) += pfc-sh7372.o
obj-$(CONFIG_PINCTRL_PFC_SH73A0) += pfc-sh73a0.o
obj-$(CONFIG_PINCTRL_PFC_SH7720) += pfc-sh7720.o
obj-$(CONFIG_PINCTRL_PFC_SH7722) += pfc-sh7722.o
--- 0001/drivers/pinctrl/sh-pfc/core.c
+++ work/drivers/pinctrl/sh-pfc/core.c 2015-01-21 12:09:18.157562547 +0900
@@ -475,12 +475,6 @@ static const struct of_device_id sh_pfc_
.data = &r8a7791_pinmux_info,
},
#endif
-#ifdef CONFIG_PINCTRL_PFC_SH7372
- {
- .compatible = "renesas,pfc-sh7372",
- .data = &sh7372_pinmux_info,
- },
-#endif
#ifdef CONFIG_PINCTRL_PFC_SH73A0
{
.compatible = "renesas,pfc-sh73a0",
@@ -606,9 +600,6 @@ static const struct platform_device_id s
#ifdef CONFIG_PINCTRL_PFC_SH7269
{ "pfc-sh7269", (kernel_ulong_t)&sh7269_pinmux_info },
#endif
-#ifdef CONFIG_PINCTRL_PFC_SH7372
- { "pfc-sh7372", (kernel_ulong_t)&sh7372_pinmux_info },
-#endif
#ifdef CONFIG_PINCTRL_PFC_SH73A0
{ "pfc-sh73a0", (kernel_ulong_t)&sh73a0_pinmux_info },
#endif
--- 0001/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,2645 +0,0 @@
-/*
- * sh7372 processor support - PFC hardware block
- *
- * Copyright (C) 2010 Kuninori Morimoto <morimoto.kuninori@renesas.com>
- *
- * Based on
- * sh7367 processor support - PFC hardware block
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/sh_intc.h>
-
-#include "core.h"
-#include "sh_pfc.h"
-
-#define CPU_ALL_PORT(fn, pfx, sfx) \
- PORT_10(0, fn, pfx, sfx), PORT_90(0, fn, pfx, sfx), \
- PORT_10(100, fn, pfx##10, sfx), PORT_10(110, fn, pfx##11, sfx), \
- PORT_10(120, fn, pfx##12, sfx), PORT_10(130, fn, pfx##13, sfx), \
- PORT_10(140, fn, pfx##14, sfx), PORT_10(150, fn, pfx##15, sfx), \
- PORT_10(160, fn, pfx##16, sfx), PORT_10(170, fn, pfx##17, sfx), \
- PORT_10(180, fn, pfx##18, sfx), PORT_1(190, fn, pfx##190, sfx)
-
-#define IRQC_PIN_MUX(irq, pin) \
-static const unsigned int intc_irq##irq##_pins[] = { \
- pin, \
-}; \
-static const unsigned int intc_irq##irq##_mux[] = { \
- IRQ##irq##_MARK, \
-}
-
-#define IRQC_PINS_MUX(irq, pin0, pin1) \
-static const unsigned int intc_irq##irq##_0_pins[] = { \
- pin0, \
-}; \
-static const unsigned int intc_irq##irq##_0_mux[] = { \
- IRQ##irq##_##pin0##_MARK, \
-}; \
-static const unsigned int intc_irq##irq##_1_pins[] = { \
- pin1, \
-}; \
-static const unsigned int intc_irq##irq##_1_mux[] = { \
- IRQ##irq##_##pin1##_MARK, \
-}
-
-enum {
- PINMUX_RESERVED = 0,
-
- /* PORT0_DATA -> PORT190_DATA */
- PINMUX_DATA_BEGIN,
- PORT_ALL(DATA),
- PINMUX_DATA_END,
-
- /* PORT0_IN -> PORT190_IN */
- PINMUX_INPUT_BEGIN,
- PORT_ALL(IN),
- PINMUX_INPUT_END,
-
- /* PORT0_OUT -> PORT190_OUT */
- PINMUX_OUTPUT_BEGIN,
- PORT_ALL(OUT),
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT190_FN_IN */
- PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT190_FN_OUT */
- PORT_ALL(FN0), /* PORT0_FN0 -> PORT190_FN0 */
- PORT_ALL(FN1), /* PORT0_FN1 -> PORT190_FN1 */
- PORT_ALL(FN2), /* PORT0_FN2 -> PORT190_FN2 */
- PORT_ALL(FN3), /* PORT0_FN3 -> PORT190_FN3 */
- PORT_ALL(FN4), /* PORT0_FN4 -> PORT190_FN4 */
- PORT_ALL(FN5), /* PORT0_FN5 -> PORT190_FN5 */
- PORT_ALL(FN6), /* PORT0_FN6 -> PORT190_FN6 */
- PORT_ALL(FN7), /* PORT0_FN7 -> PORT190_FN7 */
-
- MSEL1CR_31_0, MSEL1CR_31_1,
- MSEL1CR_30_0, MSEL1CR_30_1,
- MSEL1CR_29_0, MSEL1CR_29_1,
- MSEL1CR_28_0, MSEL1CR_28_1,
- MSEL1CR_27_0, MSEL1CR_27_1,
- MSEL1CR_26_0, MSEL1CR_26_1,
- MSEL1CR_16_0, MSEL1CR_16_1,
- MSEL1CR_15_0, MSEL1CR_15_1,
- MSEL1CR_14_0, MSEL1CR_14_1,
- MSEL1CR_13_0, MSEL1CR_13_1,
- MSEL1CR_12_0, MSEL1CR_12_1,
- MSEL1CR_9_0, MSEL1CR_9_1,
- MSEL1CR_8_0, MSEL1CR_8_1,
- MSEL1CR_7_0, MSEL1CR_7_1,
- MSEL1CR_6_0, MSEL1CR_6_1,
- MSEL1CR_4_0, MSEL1CR_4_1,
- MSEL1CR_3_0, MSEL1CR_3_1,
- MSEL1CR_2_0, MSEL1CR_2_1,
- MSEL1CR_0_0, MSEL1CR_0_1,
-
- MSEL3CR_27_0, MSEL3CR_27_1,
- MSEL3CR_26_0, MSEL3CR_26_1,
- MSEL3CR_21_0, MSEL3CR_21_1,
- MSEL3CR_20_0, MSEL3CR_20_1,
- MSEL3CR_15_0, MSEL3CR_15_1,
- MSEL3CR_9_0, MSEL3CR_9_1,
- MSEL3CR_6_0, MSEL3CR_6_1,
-
- MSEL4CR_19_0, MSEL4CR_19_1,
- MSEL4CR_18_0, MSEL4CR_18_1,
- MSEL4CR_17_0, MSEL4CR_17_1,
- MSEL4CR_16_0, MSEL4CR_16_1,
- MSEL4CR_15_0, MSEL4CR_15_1,
- MSEL4CR_14_0, MSEL4CR_14_1,
- MSEL4CR_10_0, MSEL4CR_10_1,
- MSEL4CR_6_0, MSEL4CR_6_1,
- MSEL4CR_4_0, MSEL4CR_4_1,
- MSEL4CR_1_0, MSEL4CR_1_1,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
-
- /* IRQ */
- IRQ0_6_MARK, IRQ0_162_MARK, IRQ1_MARK, IRQ2_4_MARK,
- IRQ2_5_MARK, IRQ3_8_MARK, IRQ3_16_MARK, IRQ4_17_MARK,
- IRQ4_163_MARK, IRQ5_MARK, IRQ6_39_MARK, IRQ6_164_MARK,
- IRQ7_40_MARK, IRQ7_167_MARK, IRQ8_41_MARK, IRQ8_168_MARK,
- IRQ9_42_MARK, IRQ9_169_MARK, IRQ10_MARK, IRQ11_MARK,
- IRQ12_80_MARK, IRQ12_137_MARK, IRQ13_81_MARK, IRQ13_145_MARK,
- IRQ14_82_MARK, IRQ14_146_MARK, IRQ15_83_MARK, IRQ15_147_MARK,
- IRQ16_84_MARK, IRQ16_170_MARK, IRQ17_MARK, IRQ18_MARK,
- IRQ19_MARK, IRQ20_MARK, IRQ21_MARK, IRQ22_MARK,
- IRQ23_MARK, IRQ24_MARK, IRQ25_MARK, IRQ26_121_MARK,
- IRQ26_172_MARK, IRQ27_122_MARK, IRQ27_180_MARK, IRQ28_123_MARK,
- IRQ28_181_MARK, IRQ29_129_MARK, IRQ29_182_MARK, IRQ30_130_MARK,
- IRQ30_183_MARK, IRQ31_138_MARK, IRQ31_184_MARK,
-
- /* MSIOF0 */
- MSIOF0_TSYNC_MARK, MSIOF0_TSCK_MARK, MSIOF0_RXD_MARK,
- MSIOF0_RSCK_MARK, MSIOF0_RSYNC_MARK, MSIOF0_MCK0_MARK,
- MSIOF0_MCK1_MARK, MSIOF0_SS1_MARK, MSIOF0_SS2_MARK,
- MSIOF0_TXD_MARK,
-
- /* MSIOF1 */
- MSIOF1_TSCK_39_MARK, MSIOF1_TSYNC_40_MARK,
- MSIOF1_TSCK_88_MARK, MSIOF1_TSYNC_89_MARK,
- MSIOF1_TXD_41_MARK, MSIOF1_RXD_42_MARK,
- MSIOF1_TXD_90_MARK, MSIOF1_RXD_91_MARK,
- MSIOF1_SS1_43_MARK, MSIOF1_SS2_44_MARK,
- MSIOF1_SS1_92_MARK, MSIOF1_SS2_93_MARK,
- MSIOF1_RSCK_MARK, MSIOF1_RSYNC_MARK,
- MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
-
- /* MSIOF2 */
- MSIOF2_RSCK_MARK, MSIOF2_RSYNC_MARK, MSIOF2_MCK0_MARK,
- MSIOF2_MCK1_MARK, MSIOF2_SS1_MARK, MSIOF2_SS2_MARK,
- MSIOF2_TSYNC_MARK, MSIOF2_TSCK_MARK, MSIOF2_RXD_MARK,
- MSIOF2_TXD_MARK,
-
- /* BBIF1 */
- BBIF1_RXD_MARK, BBIF1_TSYNC_MARK, BBIF1_TSCK_MARK,
- BBIF1_TXD_MARK, BBIF1_RSCK_MARK, BBIF1_RSYNC_MARK,
- BBIF1_FLOW_MARK, BB_RX_FLOW_N_MARK,
-
- /* BBIF2 */
- BBIF2_TSCK1_MARK, BBIF2_TSYNC1_MARK,
- BBIF2_TXD1_MARK, BBIF2_RXD_MARK,
-
- /* FSI */
- FSIACK_MARK, FSIBCK_MARK, FSIAILR_MARK, FSIAIBT_MARK,
- FSIAISLD_MARK, FSIAOMC_MARK, FSIAOLR_MARK, FSIAOBT_MARK,
- FSIAOSLD_MARK, FSIASPDIF_11_MARK, FSIASPDIF_15_MARK,
-
- /* FMSI */
- FMSOCK_MARK, FMSOOLR_MARK, FMSIOLR_MARK, FMSOOBT_MARK,
- FMSIOBT_MARK, FMSOSLD_MARK, FMSOILR_MARK, FMSIILR_MARK,
- FMSOIBT_MARK, FMSIIBT_MARK, FMSISLD_MARK, FMSICK_MARK,
-
- /* SCIFA0 */
- SCIFA0_TXD_MARK, SCIFA0_RXD_MARK, SCIFA0_SCK_MARK,
- SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
-
- /* SCIFA1 */
- SCIFA1_TXD_MARK, SCIFA1_RXD_MARK, SCIFA1_SCK_MARK,
- SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
-
- /* SCIFA2 */
- SCIFA2_CTS1_MARK, SCIFA2_RTS1_MARK, SCIFA2_TXD1_MARK,
- SCIFA2_RXD1_MARK, SCIFA2_SCK1_MARK,
-
- /* SCIFA3 */
- SCIFA3_CTS_43_MARK, SCIFA3_CTS_140_MARK, SCIFA3_RTS_44_MARK,
- SCIFA3_RTS_141_MARK, SCIFA3_SCK_MARK, SCIFA3_TXD_MARK,
- SCIFA3_RXD_MARK,
-
- /* SCIFA4 */
- SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
-
- /* SCIFA5 */
- SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
-
- /* SCIFB */
- SCIFB_SCK_MARK, SCIFB_RTS_MARK, SCIFB_CTS_MARK,
- SCIFB_TXD_MARK, SCIFB_RXD_MARK,
-
- /* CEU */
- VIO_HD_MARK, VIO_CKO1_MARK, VIO_CKO2_MARK, VIO_VD_MARK,
- VIO_CLK_MARK, VIO_FIELD_MARK, VIO_CKO_MARK,
- VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
- VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
- VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
- VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
-
- /* USB0 */
- IDIN_0_MARK, EXTLP_0_MARK, OVCN2_0_MARK, PWEN_0_MARK,
- OVCN_0_MARK, VBUS0_0_MARK,
-
- /* USB1 */
- IDIN_1_18_MARK, IDIN_1_113_MARK,
- PWEN_1_115_MARK, PWEN_1_138_MARK,
- OVCN_1_114_MARK, OVCN_1_162_MARK,
- EXTLP_1_MARK, OVCN2_1_MARK,
- VBUS0_1_MARK,
-
- /* GPIO */
- GPI0_MARK, GPI1_MARK, GPO0_MARK, GPO1_MARK,
-
- /* BSC */
- BS_MARK, WE1_MARK,
- CKO_MARK, WAIT_MARK, RDWR_MARK,
-
- A0_MARK, A1_MARK, A2_MARK, A3_MARK,
- A6_MARK, A7_MARK, A8_MARK, A9_MARK,
- A10_MARK, A11_MARK, A12_MARK, A13_MARK,
- A14_MARK, A15_MARK, A16_MARK, A17_MARK,
- A18_MARK, A19_MARK, A20_MARK, A21_MARK,
- A22_MARK, A23_MARK, A24_MARK, A25_MARK,
- A26_MARK,
-
- CS0_MARK, CS2_MARK, CS4_MARK,
- CS5A_MARK, CS5B_MARK, CS6A_MARK,
-
- /* BSC/FLCTL */
- RD_FSC_MARK, WE0_FWE_MARK, A4_FOE_MARK, A5_FCDE_MARK,
- D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
- D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
- D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
- D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-
- /* MMCIF(1) */
- MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
- MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
- MMCCMD0_MARK, MMCCLK0_MARK,
-
- /* MMCIF(2) */
- MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
- MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
- MMCCLK1_MARK, MMCCMD1_MARK,
-
- /* SPU2 */
- VINT_I_MARK,
-
- /* FLCTL */
- FCE1_MARK, FCE0_MARK, FRB_MARK,
-
- /* HSI */
- GP_RX_FLAG_MARK, GP_RX_DATA_MARK, GP_TX_READY_MARK,
- GP_RX_WAKE_MARK, MP_TX_FLAG_MARK, MP_TX_DATA_MARK,
- MP_RX_READY_MARK, MP_TX_WAKE_MARK,
-
- /* MFI */
- MFIv6_MARK,
- MFIv4_MARK,
-
- MEMC_CS0_MARK, MEMC_BUSCLK_MEMC_A0_MARK,
- MEMC_CS1_MEMC_A1_MARK, MEMC_ADV_MEMC_DREQ0_MARK,
- MEMC_WAIT_MEMC_DREQ1_MARK, MEMC_NOE_MARK,
- MEMC_NWE_MARK, MEMC_INT_MARK,
-
- MEMC_AD0_MARK, MEMC_AD1_MARK, MEMC_AD2_MARK,
- MEMC_AD3_MARK, MEMC_AD4_MARK, MEMC_AD5_MARK,
- MEMC_AD6_MARK, MEMC_AD7_MARK, MEMC_AD8_MARK,
- MEMC_AD9_MARK, MEMC_AD10_MARK, MEMC_AD11_MARK,
- MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK,
- MEMC_AD15_MARK,
-
- /* SIM */
- SIM_RST_MARK, SIM_CLK_MARK, SIM_D_MARK,
-
- /* TPU */
- TPU0TO0_MARK, TPU0TO1_MARK,
- TPU0TO2_93_MARK, TPU0TO2_99_MARK,
- TPU0TO3_MARK,
-
- /* I2C2 */
- I2C_SCL2_MARK, I2C_SDA2_MARK,
-
- /* I2C3(1) */
- I2C_SCL3_MARK, I2C_SDA3_MARK,
-
- /* I2C3(2) */
- I2C_SCL3S_MARK, I2C_SDA3S_MARK,
-
- /* I2C4(2) */
- I2C_SCL4_MARK, I2C_SDA4_MARK,
-
- /* I2C4(2) */
- I2C_SCL4S_MARK, I2C_SDA4S_MARK,
-
- /* KEYSC */
- KEYOUT0_MARK, KEYIN0_121_MARK, KEYIN0_136_MARK,
- KEYOUT1_MARK, KEYIN1_122_MARK, KEYIN1_135_MARK,
- KEYOUT2_MARK, KEYIN2_123_MARK, KEYIN2_134_MARK,
- KEYOUT3_MARK, KEYIN3_124_MARK, KEYIN3_133_MARK,
- KEYOUT4_MARK, KEYIN4_MARK,
- KEYOUT5_MARK, KEYIN5_MARK,
- KEYOUT6_MARK, KEYIN6_MARK,
- KEYOUT7_MARK, KEYIN7_MARK,
-
- /* LCDC */
- LCDC0_SELECT_MARK,
- LCDC1_SELECT_MARK,
- LCDHSYN_MARK, LCDCS_MARK, LCDVSYN_MARK, LCDDCK_MARK,
- LCDWR_MARK, LCDRD_MARK, LCDDISP_MARK, LCDRS_MARK,
- LCDLCLK_MARK, LCDDON_MARK,
-
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
- LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
- LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK,
- LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK,
-
- /* IRDA */
- IRDA_OUT_MARK, IRDA_IN_MARK, IRDA_FIRSEL_MARK,
- IROUT_139_MARK, IROUT_140_MARK,
-
- /* TSIF1 */
- TS0_1SELECT_MARK,
- TS0_2SELECT_MARK,
- TS1_1SELECT_MARK,
- TS1_2SELECT_MARK,
-
- TS_SPSYNC1_MARK, TS_SDAT1_MARK,
- TS_SDEN1_MARK, TS_SCK1_MARK,
-
- /* TSIF2 */
- TS_SPSYNC2_MARK, TS_SDAT2_MARK,
- TS_SDEN2_MARK, TS_SCK2_MARK,
-
- /* HDMI */
- HDMI_HPD_MARK, HDMI_CEC_MARK,
-
- /* SDHI0 */
- SDHICLK0_MARK, SDHICD0_MARK,
- SDHICMD0_MARK, SDHIWP0_MARK,
- SDHID0_0_MARK, SDHID0_1_MARK,
- SDHID0_2_MARK, SDHID0_3_MARK,
-
- /* SDHI1 */
- SDHICLK1_MARK, SDHICMD1_MARK, SDHID1_0_MARK,
- SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
-
- /* SDHI2 */
- SDHICLK2_MARK, SDHICMD2_MARK, SDHID2_0_MARK,
- SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
-
- /* SDENC */
- SDENC_CPG_MARK,
- SDENC_DV_CLKI_MARK,
-
- PINMUX_MARK_END,
-};
-
-static const u16 pinmux_data[] = {
- PINMUX_DATA_ALL(),
-
- /* IRQ */
- PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
- PINMUX_DATA(IRQ0_162_MARK, PORT162_FN0, MSEL1CR_0_1),
- PINMUX_DATA(IRQ1_MARK, PORT12_FN0),
- PINMUX_DATA(IRQ2_4_MARK, PORT4_FN0, MSEL1CR_2_0),
- PINMUX_DATA(IRQ2_5_MARK, PORT5_FN0, MSEL1CR_2_1),
- PINMUX_DATA(IRQ3_8_MARK, PORT8_FN0, MSEL1CR_3_0),
- PINMUX_DATA(IRQ3_16_MARK, PORT16_FN0, MSEL1CR_3_1),
- PINMUX_DATA(IRQ4_17_MARK, PORT17_FN0, MSEL1CR_4_0),
- PINMUX_DATA(IRQ4_163_MARK, PORT163_FN0, MSEL1CR_4_1),
- PINMUX_DATA(IRQ5_MARK, PORT18_FN0),
- PINMUX_DATA(IRQ6_39_MARK, PORT39_FN0, MSEL1CR_6_0),
- PINMUX_DATA(IRQ6_164_MARK, PORT164_FN0, MSEL1CR_6_1),
- PINMUX_DATA(IRQ7_40_MARK, PORT40_FN0, MSEL1CR_7_1),
- PINMUX_DATA(IRQ7_167_MARK, PORT167_FN0, MSEL1CR_7_0),
- PINMUX_DATA(IRQ8_41_MARK, PORT41_FN0, MSEL1CR_8_1),
- PINMUX_DATA(IRQ8_168_MARK, PORT168_FN0, MSEL1CR_8_0),
- PINMUX_DATA(IRQ9_42_MARK, PORT42_FN0, MSEL1CR_9_0),
- PINMUX_DATA(IRQ9_169_MARK, PORT169_FN0, MSEL1CR_9_1),
- PINMUX_DATA(IRQ10_MARK, PORT65_FN0, MSEL1CR_9_1),
- PINMUX_DATA(IRQ11_MARK, PORT67_FN0),
- PINMUX_DATA(IRQ12_80_MARK, PORT80_FN0, MSEL1CR_12_0),
- PINMUX_DATA(IRQ12_137_MARK, PORT137_FN0, MSEL1CR_12_1),
- PINMUX_DATA(IRQ13_81_MARK, PORT81_FN0, MSEL1CR_13_0),
- PINMUX_DATA(IRQ13_145_MARK, PORT145_FN0, MSEL1CR_13_1),
- PINMUX_DATA(IRQ14_82_MARK, PORT82_FN0, MSEL1CR_14_0),
- PINMUX_DATA(IRQ14_146_MARK, PORT146_FN0, MSEL1CR_14_1),
- PINMUX_DATA(IRQ15_83_MARK, PORT83_FN0, MSEL1CR_15_0),
- PINMUX_DATA(IRQ15_147_MARK, PORT147_FN0, MSEL1CR_15_1),
- PINMUX_DATA(IRQ16_84_MARK, PORT84_FN0, MSEL1CR_16_0),
- PINMUX_DATA(IRQ16_170_MARK, PORT170_FN0, MSEL1CR_16_1),
- PINMUX_DATA(IRQ17_MARK, PORT85_FN0),
- PINMUX_DATA(IRQ18_MARK, PORT86_FN0),
- PINMUX_DATA(IRQ19_MARK, PORT87_FN0),
- PINMUX_DATA(IRQ20_MARK, PORT92_FN0),
- PINMUX_DATA(IRQ21_MARK, PORT93_FN0),
- PINMUX_DATA(IRQ22_MARK, PORT94_FN0),
- PINMUX_DATA(IRQ23_MARK, PORT95_FN0),
- PINMUX_DATA(IRQ24_MARK, PORT112_FN0),
- PINMUX_DATA(IRQ25_MARK, PORT119_FN0),
- PINMUX_DATA(IRQ26_121_MARK, PORT121_FN0, MSEL1CR_26_1),
- PINMUX_DATA(IRQ26_172_MARK, PORT172_FN0, MSEL1CR_26_0),
- PINMUX_DATA(IRQ27_122_MARK, PORT122_FN0, MSEL1CR_27_1),
- PINMUX_DATA(IRQ27_180_MARK, PORT180_FN0, MSEL1CR_27_0),
- PINMUX_DATA(IRQ28_123_MARK, PORT123_FN0, MSEL1CR_28_1),
- PINMUX_DATA(IRQ28_181_MARK, PORT181_FN0, MSEL1CR_28_0),
- PINMUX_DATA(IRQ29_129_MARK, PORT129_FN0, MSEL1CR_29_1),
- PINMUX_DATA(IRQ29_182_MARK, PORT182_FN0, MSEL1CR_29_0),
- PINMUX_DATA(IRQ30_130_MARK, PORT130_FN0, MSEL1CR_30_1),
- PINMUX_DATA(IRQ30_183_MARK, PORT183_FN0, MSEL1CR_30_0),
- PINMUX_DATA(IRQ31_138_MARK, PORT138_FN0, MSEL1CR_31_1),
- PINMUX_DATA(IRQ31_184_MARK, PORT184_FN0, MSEL1CR_31_0),
-
- /* Function 1 */
- PINMUX_DATA(BBIF2_TSCK1_MARK, PORT0_FN1),
- PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT1_FN1),
- PINMUX_DATA(BBIF2_TXD1_MARK, PORT2_FN1),
- PINMUX_DATA(BBIF2_RXD_MARK, PORT3_FN1),
- PINMUX_DATA(FSIACK_MARK, PORT4_FN1),
- PINMUX_DATA(FSIAILR_MARK, PORT5_FN1),
- PINMUX_DATA(FSIAIBT_MARK, PORT6_FN1),
- PINMUX_DATA(FSIAISLD_MARK, PORT7_FN1),
- PINMUX_DATA(FSIAOMC_MARK, PORT8_FN1),
- PINMUX_DATA(FSIAOLR_MARK, PORT9_FN1),
- PINMUX_DATA(FSIAOBT_MARK, PORT10_FN1),
- PINMUX_DATA(FSIAOSLD_MARK, PORT11_FN1),
- PINMUX_DATA(FMSOCK_MARK, PORT12_FN1),
- PINMUX_DATA(FMSOOLR_MARK, PORT13_FN1),
- PINMUX_DATA(FMSOOBT_MARK, PORT14_FN1),
- PINMUX_DATA(FMSOSLD_MARK, PORT15_FN1),
- PINMUX_DATA(FMSOILR_MARK, PORT16_FN1),
- PINMUX_DATA(FMSOIBT_MARK, PORT17_FN1),
- PINMUX_DATA(FMSISLD_MARK, PORT18_FN1),
- PINMUX_DATA(A0_MARK, PORT19_FN1),
- PINMUX_DATA(A1_MARK, PORT20_FN1),
- PINMUX_DATA(A2_MARK, PORT21_FN1),
- PINMUX_DATA(A3_MARK, PORT22_FN1),
- PINMUX_DATA(A4_FOE_MARK, PORT23_FN1),
- PINMUX_DATA(A5_FCDE_MARK, PORT24_FN1),
- PINMUX_DATA(A6_MARK, PORT25_FN1),
- PINMUX_DATA(A7_MARK, PORT26_FN1),
- PINMUX_DATA(A8_MARK, PORT27_FN1),
- PINMUX_DATA(A9_MARK, PORT28_FN1),
- PINMUX_DATA(A10_MARK, PORT29_FN1),
- PINMUX_DATA(A11_MARK, PORT30_FN1),
- PINMUX_DATA(A12_MARK, PORT31_FN1),
- PINMUX_DATA(A13_MARK, PORT32_FN1),
- PINMUX_DATA(A14_MARK, PORT33_FN1),
- PINMUX_DATA(A15_MARK, PORT34_FN1),
- PINMUX_DATA(A16_MARK, PORT35_FN1),
- PINMUX_DATA(A17_MARK, PORT36_FN1),
- PINMUX_DATA(A18_MARK, PORT37_FN1),
- PINMUX_DATA(A19_MARK, PORT38_FN1),
- PINMUX_DATA(A20_MARK, PORT39_FN1),
- PINMUX_DATA(A21_MARK, PORT40_FN1),
- PINMUX_DATA(A22_MARK, PORT41_FN1),
- PINMUX_DATA(A23_MARK, PORT42_FN1),
- PINMUX_DATA(A24_MARK, PORT43_FN1),
- PINMUX_DATA(A25_MARK, PORT44_FN1),
- PINMUX_DATA(A26_MARK, PORT45_FN1),
- PINMUX_DATA(D0_NAF0_MARK, PORT46_FN1),
- PINMUX_DATA(D1_NAF1_MARK, PORT47_FN1),
- PINMUX_DATA(D2_NAF2_MARK, PORT48_FN1),
- PINMUX_DATA(D3_NAF3_MARK, PORT49_FN1),
- PINMUX_DATA(D4_NAF4_MARK, PORT50_FN1),
- PINMUX_DATA(D5_NAF5_MARK, PORT51_FN1),
- PINMUX_DATA(D6_NAF6_MARK, PORT52_FN1),
- PINMUX_DATA(D7_NAF7_MARK, PORT53_FN1),
- PINMUX_DATA(D8_NAF8_MARK, PORT54_FN1),
- PINMUX_DATA(D9_NAF9_MARK, PORT55_FN1),
- PINMUX_DATA(D10_NAF10_MARK, PORT56_FN1),
- PINMUX_DATA(D11_NAF11_MARK, PORT57_FN1),
- PINMUX_DATA(D12_NAF12_MARK, PORT58_FN1),
- PINMUX_DATA(D13_NAF13_MARK, PORT59_FN1),
- PINMUX_DATA(D14_NAF14_MARK, PORT60_FN1),
- PINMUX_DATA(D15_NAF15_MARK, PORT61_FN1),
- PINMUX_DATA(CS0_MARK, PORT62_FN1),
- PINMUX_DATA(CS2_MARK, PORT63_FN1),
- PINMUX_DATA(CS4_MARK, PORT64_FN1),
- PINMUX_DATA(CS5A_MARK, PORT65_FN1),
- PINMUX_DATA(CS5B_MARK, PORT66_FN1),
- PINMUX_DATA(CS6A_MARK, PORT67_FN1),
- PINMUX_DATA(FCE0_MARK, PORT68_FN1),
- PINMUX_DATA(RD_FSC_MARK, PORT69_FN1),
- PINMUX_DATA(WE0_FWE_MARK, PORT70_FN1),
- PINMUX_DATA(WE1_MARK, PORT71_FN1),
- PINMUX_DATA(CKO_MARK, PORT72_FN1),
- PINMUX_DATA(FRB_MARK, PORT73_FN1),
- PINMUX_DATA(WAIT_MARK, PORT74_FN1),
- PINMUX_DATA(RDWR_MARK, PORT75_FN1),
- PINMUX_DATA(MEMC_AD0_MARK, PORT76_FN1),
- PINMUX_DATA(MEMC_AD1_MARK, PORT77_FN1),
- PINMUX_DATA(MEMC_AD2_MARK, PORT78_FN1),
- PINMUX_DATA(MEMC_AD3_MARK, PORT79_FN1),
- PINMUX_DATA(MEMC_AD4_MARK, PORT80_FN1),
- PINMUX_DATA(MEMC_AD5_MARK, PORT81_FN1),
- PINMUX_DATA(MEMC_AD6_MARK, PORT82_FN1),
- PINMUX_DATA(MEMC_AD7_MARK, PORT83_FN1),
- PINMUX_DATA(MEMC_AD8_MARK, PORT84_FN1),
- PINMUX_DATA(MEMC_AD9_MARK, PORT85_FN1),
- PINMUX_DATA(MEMC_AD10_MARK, PORT86_FN1),
- PINMUX_DATA(MEMC_AD11_MARK, PORT87_FN1),
- PINMUX_DATA(MEMC_AD12_MARK, PORT88_FN1),
- PINMUX_DATA(MEMC_AD13_MARK, PORT89_FN1),
- PINMUX_DATA(MEMC_AD14_MARK, PORT90_FN1),
- PINMUX_DATA(MEMC_AD15_MARK, PORT91_FN1),
- PINMUX_DATA(MEMC_CS0_MARK, PORT92_FN1),
- PINMUX_DATA(MEMC_BUSCLK_MEMC_A0_MARK, PORT93_FN1),
- PINMUX_DATA(MEMC_CS1_MEMC_A1_MARK, PORT94_FN1),
- PINMUX_DATA(MEMC_ADV_MEMC_DREQ0_MARK, PORT95_FN1),
- PINMUX_DATA(MEMC_WAIT_MEMC_DREQ1_MARK, PORT96_FN1),
- PINMUX_DATA(MEMC_NOE_MARK, PORT97_FN1),
- PINMUX_DATA(MEMC_NWE_MARK, PORT98_FN1),
- PINMUX_DATA(MEMC_INT_MARK, PORT99_FN1),
- PINMUX_DATA(VIO_VD_MARK, PORT100_FN1),
- PINMUX_DATA(VIO_HD_MARK, PORT101_FN1),
- PINMUX_DATA(VIO_D0_MARK, PORT102_FN1),
- PINMUX_DATA(VIO_D1_MARK, PORT103_FN1),
- PINMUX_DATA(VIO_D2_MARK, PORT104_FN1),
- PINMUX_DATA(VIO_D3_MARK, PORT105_FN1),
- PINMUX_DATA(VIO_D4_MARK, PORT106_FN1),
- PINMUX_DATA(VIO_D5_MARK, PORT107_FN1),
- PINMUX_DATA(VIO_D6_MARK, PORT108_FN1),
- PINMUX_DATA(VIO_D7_MARK, PORT109_FN1),
- PINMUX_DATA(VIO_D8_MARK, PORT110_FN1),
- PINMUX_DATA(VIO_D9_MARK, PORT111_FN1),
- PINMUX_DATA(VIO_D10_MARK, PORT112_FN1),
- PINMUX_DATA(VIO_D11_MARK, PORT113_FN1),
- PINMUX_DATA(VIO_D12_MARK, PORT114_FN1),
- PINMUX_DATA(VIO_D13_MARK, PORT115_FN1),
- PINMUX_DATA(VIO_D14_MARK, PORT116_FN1),
- PINMUX_DATA(VIO_D15_MARK, PORT117_FN1),
- PINMUX_DATA(VIO_CLK_MARK, PORT118_FN1),
- PINMUX_DATA(VIO_FIELD_MARK, PORT119_FN1),
- PINMUX_DATA(VIO_CKO_MARK, PORT120_FN1),
- PINMUX_DATA(LCDD0_MARK, PORT121_FN1),
- PINMUX_DATA(LCDD1_MARK, PORT122_FN1),
- PINMUX_DATA(LCDD2_MARK, PORT123_FN1),
- PINMUX_DATA(LCDD3_MARK, PORT124_FN1),
- PINMUX_DATA(LCDD4_MARK, PORT125_FN1),
- PINMUX_DATA(LCDD5_MARK, PORT126_FN1),
- PINMUX_DATA(LCDD6_MARK, PORT127_FN1),
- PINMUX_DATA(LCDD7_MARK, PORT128_FN1),
- PINMUX_DATA(LCDD8_MARK, PORT129_FN1),
- PINMUX_DATA(LCDD9_MARK, PORT130_FN1),
- PINMUX_DATA(LCDD10_MARK, PORT131_FN1),
- PINMUX_DATA(LCDD11_MARK, PORT132_FN1),
- PINMUX_DATA(LCDD12_MARK, PORT133_FN1),
- PINMUX_DATA(LCDD13_MARK, PORT134_FN1),
- PINMUX_DATA(LCDD14_MARK, PORT135_FN1),
- PINMUX_DATA(LCDD15_MARK, PORT136_FN1),
- PINMUX_DATA(LCDD16_MARK, PORT137_FN1),
- PINMUX_DATA(LCDD17_MARK, PORT138_FN1),
- PINMUX_DATA(LCDD18_MARK, PORT139_FN1),
- PINMUX_DATA(LCDD19_MARK, PORT140_FN1),
- PINMUX_DATA(LCDD20_MARK, PORT141_FN1),
- PINMUX_DATA(LCDD21_MARK, PORT142_FN1),
- PINMUX_DATA(LCDD22_MARK, PORT143_FN1),
- PINMUX_DATA(LCDD23_MARK, PORT144_FN1),
- PINMUX_DATA(LCDHSYN_MARK, PORT145_FN1),
- PINMUX_DATA(LCDVSYN_MARK, PORT146_FN1),
- PINMUX_DATA(LCDDCK_MARK, PORT147_FN1),
- PINMUX_DATA(LCDRD_MARK, PORT148_FN1),
- PINMUX_DATA(LCDDISP_MARK, PORT149_FN1),
- PINMUX_DATA(LCDLCLK_MARK, PORT150_FN1),
- PINMUX_DATA(LCDDON_MARK, PORT151_FN1),
- PINMUX_DATA(SCIFA0_TXD_MARK, PORT152_FN1),
- PINMUX_DATA(SCIFA0_RXD_MARK, PORT153_FN1),
- PINMUX_DATA(SCIFA1_TXD_MARK, PORT154_FN1),
- PINMUX_DATA(SCIFA1_RXD_MARK, PORT155_FN1),
- PINMUX_DATA(TS_SPSYNC1_MARK, PORT156_FN1),
- PINMUX_DATA(TS_SDAT1_MARK, PORT157_FN1),
- PINMUX_DATA(TS_SDEN1_MARK, PORT158_FN1),
- PINMUX_DATA(TS_SCK1_MARK, PORT159_FN1),
- PINMUX_DATA(TPU0TO0_MARK, PORT160_FN1),
- PINMUX_DATA(TPU0TO1_MARK, PORT161_FN1),
- PINMUX_DATA(SCIFB_SCK_MARK, PORT162_FN1),
- PINMUX_DATA(SCIFB_RTS_MARK, PORT163_FN1),
- PINMUX_DATA(SCIFB_CTS_MARK, PORT164_FN1),
- PINMUX_DATA(SCIFB_TXD_MARK, PORT165_FN1),
- PINMUX_DATA(SCIFB_RXD_MARK, PORT166_FN1),
- PINMUX_DATA(VBUS0_0_MARK, PORT167_FN1),
- PINMUX_DATA(VBUS0_1_MARK, PORT168_FN1),
- PINMUX_DATA(HDMI_HPD_MARK, PORT169_FN1),
- PINMUX_DATA(HDMI_CEC_MARK, PORT170_FN1),
- PINMUX_DATA(SDHICLK0_MARK, PORT171_FN1),
- PINMUX_DATA(SDHICD0_MARK, PORT172_FN1),
- PINMUX_DATA(SDHID0_0_MARK, PORT173_FN1),
- PINMUX_DATA(SDHID0_1_MARK, PORT174_FN1),
- PINMUX_DATA(SDHID0_2_MARK, PORT175_FN1),
- PINMUX_DATA(SDHID0_3_MARK, PORT176_FN1),
- PINMUX_DATA(SDHICMD0_MARK, PORT177_FN1),
- PINMUX_DATA(SDHIWP0_MARK, PORT178_FN1),
- PINMUX_DATA(SDHICLK1_MARK, PORT179_FN1),
- PINMUX_DATA(SDHID1_0_MARK, PORT180_FN1),
- PINMUX_DATA(SDHID1_1_MARK, PORT181_FN1),
- PINMUX_DATA(SDHID1_2_MARK, PORT182_FN1),
- PINMUX_DATA(SDHID1_3_MARK, PORT183_FN1),
- PINMUX_DATA(SDHICMD1_MARK, PORT184_FN1),
- PINMUX_DATA(SDHICLK2_MARK, PORT185_FN1),
- PINMUX_DATA(SDHID2_0_MARK, PORT186_FN1),
- PINMUX_DATA(SDHID2_1_MARK, PORT187_FN1),
- PINMUX_DATA(SDHID2_2_MARK, PORT188_FN1),
- PINMUX_DATA(SDHID2_3_MARK, PORT189_FN1),
- PINMUX_DATA(SDHICMD2_MARK, PORT190_FN1),
-
- /* Function 2 */
- PINMUX_DATA(FSIBCK_MARK, PORT4_FN2),
- PINMUX_DATA(SCIFA4_RXD_MARK, PORT5_FN2),
- PINMUX_DATA(SCIFA4_TXD_MARK, PORT6_FN2),
- PINMUX_DATA(SCIFA5_RXD_MARK, PORT8_FN2),
- PINMUX_DATA(FSIASPDIF_11_MARK, PORT11_FN2),
- PINMUX_DATA(SCIFA5_TXD_MARK, PORT12_FN2),
- PINMUX_DATA(FMSIOLR_MARK, PORT13_FN2),
- PINMUX_DATA(FMSIOBT_MARK, PORT14_FN2),
- PINMUX_DATA(FSIASPDIF_15_MARK, PORT15_FN2),
- PINMUX_DATA(FMSIILR_MARK, PORT16_FN2),
- PINMUX_DATA(FMSIIBT_MARK, PORT17_FN2),
- PINMUX_DATA(BS_MARK, PORT19_FN2),
- PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT36_FN2),
- PINMUX_DATA(MSIOF0_TSCK_MARK, PORT37_FN2),
- PINMUX_DATA(MSIOF0_RXD_MARK, PORT38_FN2),
- PINMUX_DATA(MSIOF0_RSCK_MARK, PORT39_FN2),
- PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT40_FN2),
- PINMUX_DATA(MSIOF0_MCK0_MARK, PORT41_FN2),
- PINMUX_DATA(MSIOF0_MCK1_MARK, PORT42_FN2),
- PINMUX_DATA(MSIOF0_SS1_MARK, PORT43_FN2),
- PINMUX_DATA(MSIOF0_SS2_MARK, PORT44_FN2),
- PINMUX_DATA(MSIOF0_TXD_MARK, PORT45_FN2),
- PINMUX_DATA(FMSICK_MARK, PORT65_FN2),
- PINMUX_DATA(FCE1_MARK, PORT66_FN2),
- PINMUX_DATA(BBIF1_RXD_MARK, PORT76_FN2),
- PINMUX_DATA(BBIF1_TSYNC_MARK, PORT77_FN2),
- PINMUX_DATA(BBIF1_TSCK_MARK, PORT78_FN2),
- PINMUX_DATA(BBIF1_TXD_MARK, PORT79_FN2),
- PINMUX_DATA(BBIF1_RSCK_MARK, PORT80_FN2),
- PINMUX_DATA(BBIF1_RSYNC_MARK, PORT81_FN2),
- PINMUX_DATA(BBIF1_FLOW_MARK, PORT82_FN2),
- PINMUX_DATA(BB_RX_FLOW_N_MARK, PORT83_FN2),
- PINMUX_DATA(MSIOF1_RSCK_MARK, PORT84_FN2),
- PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT85_FN2),
- PINMUX_DATA(MSIOF1_MCK0_MARK, PORT86_FN2),
- PINMUX_DATA(MSIOF1_MCK1_MARK, PORT87_FN2),
- PINMUX_DATA(MSIOF1_TSCK_88_MARK, PORT88_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_TSYNC_89_MARK, PORT89_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_TXD_90_MARK, PORT90_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_RXD_91_MARK, PORT91_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_SS1_92_MARK, PORT92_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_SS2_93_MARK, PORT93_FN2, MSEL4CR_10_1),
- PINMUX_DATA(SCIFA2_CTS1_MARK, PORT94_FN2),
- PINMUX_DATA(SCIFA2_RTS1_MARK, PORT95_FN2),
- PINMUX_DATA(SCIFA2_TXD1_MARK, PORT96_FN2),
- PINMUX_DATA(SCIFA2_RXD1_MARK, PORT97_FN2),
- PINMUX_DATA(SCIFA2_SCK1_MARK, PORT98_FN2),
- PINMUX_DATA(I2C_SCL2_MARK, PORT110_FN2),
- PINMUX_DATA(I2C_SDA2_MARK, PORT111_FN2),
- PINMUX_DATA(I2C_SCL3_MARK, PORT114_FN2, MSEL4CR_16_1),
- PINMUX_DATA(I2C_SDA3_MARK, PORT115_FN2, MSEL4CR_16_1),
- PINMUX_DATA(I2C_SCL4_MARK, PORT116_FN2, MSEL4CR_17_1),
- PINMUX_DATA(I2C_SDA4_MARK, PORT117_FN2, MSEL4CR_17_1),
- PINMUX_DATA(MSIOF2_RSCK_MARK, PORT134_FN2),
- PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT135_FN2),
- PINMUX_DATA(MSIOF2_MCK0_MARK, PORT136_FN2),
- PINMUX_DATA(MSIOF2_MCK1_MARK, PORT137_FN2),
- PINMUX_DATA(MSIOF2_SS1_MARK, PORT138_FN2),
- PINMUX_DATA(MSIOF2_SS2_MARK, PORT139_FN2),
- PINMUX_DATA(SCIFA3_CTS_140_MARK, PORT140_FN2, MSEL3CR_9_1),
- PINMUX_DATA(SCIFA3_RTS_141_MARK, PORT141_FN2),
- PINMUX_DATA(SCIFA3_SCK_MARK, PORT142_FN2),
- PINMUX_DATA(SCIFA3_TXD_MARK, PORT143_FN2),
- PINMUX_DATA(SCIFA3_RXD_MARK, PORT144_FN2),
- PINMUX_DATA(MSIOF2_TSYNC_MARK, PORT148_FN2),
- PINMUX_DATA(MSIOF2_TSCK_MARK, PORT149_FN2),
- PINMUX_DATA(MSIOF2_RXD_MARK, PORT150_FN2),
- PINMUX_DATA(MSIOF2_TXD_MARK, PORT151_FN2),
- PINMUX_DATA(SCIFA0_SCK_MARK, PORT156_FN2),
- PINMUX_DATA(SCIFA0_RTS_MARK, PORT157_FN2),
- PINMUX_DATA(SCIFA0_CTS_MARK, PORT158_FN2),
- PINMUX_DATA(SCIFA1_SCK_MARK, PORT159_FN2),
- PINMUX_DATA(SCIFA1_RTS_MARK, PORT160_FN2),
- PINMUX_DATA(SCIFA1_CTS_MARK, PORT161_FN2),
-
- /* Function 3 */
- PINMUX_DATA(VIO_CKO1_MARK, PORT16_FN3),
- PINMUX_DATA(VIO_CKO2_MARK, PORT17_FN3),
- PINMUX_DATA(IDIN_1_18_MARK, PORT18_FN3, MSEL4CR_14_1),
- PINMUX_DATA(MSIOF1_TSCK_39_MARK, PORT39_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_TSYNC_40_MARK, PORT40_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_TXD_41_MARK, PORT41_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_RXD_42_MARK, PORT42_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_SS1_43_MARK, PORT43_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_SS2_44_MARK, PORT44_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MMCD1_0_MARK, PORT54_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_1_MARK, PORT55_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_2_MARK, PORT56_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_3_MARK, PORT57_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_4_MARK, PORT58_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_5_MARK, PORT59_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_6_MARK, PORT60_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_7_MARK, PORT61_FN3, MSEL4CR_15_1),
- PINMUX_DATA(VINT_I_MARK, PORT65_FN3),
- PINMUX_DATA(MMCCLK1_MARK, PORT66_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCCMD1_MARK, PORT67_FN3, MSEL4CR_15_1),
- PINMUX_DATA(TPU0TO2_93_MARK, PORT93_FN3),
- PINMUX_DATA(TPU0TO2_99_MARK, PORT99_FN3),
- PINMUX_DATA(TPU0TO3_MARK, PORT112_FN3),
- PINMUX_DATA(IDIN_0_MARK, PORT113_FN3),
- PINMUX_DATA(EXTLP_0_MARK, PORT114_FN3),
- PINMUX_DATA(OVCN2_0_MARK, PORT115_FN3),
- PINMUX_DATA(PWEN_0_MARK, PORT116_FN3),
- PINMUX_DATA(OVCN_0_MARK, PORT117_FN3),
- PINMUX_DATA(KEYOUT7_MARK, PORT121_FN3),
- PINMUX_DATA(KEYOUT6_MARK, PORT122_FN3),
- PINMUX_DATA(KEYOUT5_MARK, PORT123_FN3),
- PINMUX_DATA(KEYOUT4_MARK, PORT124_FN3),
- PINMUX_DATA(KEYOUT3_MARK, PORT125_FN3),
- PINMUX_DATA(KEYOUT2_MARK, PORT126_FN3),
- PINMUX_DATA(KEYOUT1_MARK, PORT127_FN3),
- PINMUX_DATA(KEYOUT0_MARK, PORT128_FN3),
- PINMUX_DATA(KEYIN7_MARK, PORT129_FN3),
- PINMUX_DATA(KEYIN6_MARK, PORT130_FN3),
- PINMUX_DATA(KEYIN5_MARK, PORT131_FN3),
- PINMUX_DATA(KEYIN4_MARK, PORT132_FN3),
- PINMUX_DATA(KEYIN3_133_MARK, PORT133_FN3, MSEL4CR_18_0),
- PINMUX_DATA(KEYIN2_134_MARK, PORT134_FN3, MSEL4CR_18_0),
- PINMUX_DATA(KEYIN1_135_MARK, PORT135_FN3, MSEL4CR_18_0),
- PINMUX_DATA(KEYIN0_136_MARK, PORT136_FN3, MSEL4CR_18_0),
- PINMUX_DATA(TS_SPSYNC2_MARK, PORT137_FN3),
- PINMUX_DATA(IROUT_139_MARK, PORT139_FN3),
- PINMUX_DATA(IRDA_OUT_MARK, PORT140_FN3),
- PINMUX_DATA(IRDA_IN_MARK, PORT141_FN3),
- PINMUX_DATA(IRDA_FIRSEL_MARK, PORT142_FN3),
- PINMUX_DATA(TS_SDAT2_MARK, PORT145_FN3),
- PINMUX_DATA(TS_SDEN2_MARK, PORT146_FN3),
- PINMUX_DATA(TS_SCK2_MARK, PORT147_FN3),
-
- /* Function 4 */
- PINMUX_DATA(SCIFA3_CTS_43_MARK, PORT43_FN4, MSEL3CR_9_0),
- PINMUX_DATA(SCIFA3_RTS_44_MARK, PORT44_FN4),
- PINMUX_DATA(GP_RX_FLAG_MARK, PORT76_FN4),
- PINMUX_DATA(GP_RX_DATA_MARK, PORT77_FN4),
- PINMUX_DATA(GP_TX_READY_MARK, PORT78_FN4),
- PINMUX_DATA(GP_RX_WAKE_MARK, PORT79_FN4),
- PINMUX_DATA(MP_TX_FLAG_MARK, PORT80_FN4),
- PINMUX_DATA(MP_TX_DATA_MARK, PORT81_FN4),
- PINMUX_DATA(MP_RX_READY_MARK, PORT82_FN4),
- PINMUX_DATA(MP_TX_WAKE_MARK, PORT83_FN4),
- PINMUX_DATA(MMCD0_0_MARK, PORT84_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_1_MARK, PORT85_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_2_MARK, PORT86_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_3_MARK, PORT87_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_4_MARK, PORT88_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_5_MARK, PORT89_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_6_MARK, PORT90_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_7_MARK, PORT91_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCCMD0_MARK, PORT92_FN4, MSEL4CR_15_0),
- PINMUX_DATA(SIM_RST_MARK, PORT94_FN4),
- PINMUX_DATA(SIM_CLK_MARK, PORT95_FN4),
- PINMUX_DATA(SIM_D_MARK, PORT98_FN4),
- PINMUX_DATA(MMCCLK0_MARK, PORT99_FN4, MSEL4CR_15_0),
- PINMUX_DATA(IDIN_1_113_MARK, PORT113_FN4, MSEL4CR_14_0),
- PINMUX_DATA(OVCN_1_114_MARK, PORT114_FN4, MSEL4CR_14_0),
- PINMUX_DATA(PWEN_1_115_MARK, PORT115_FN4),
- PINMUX_DATA(EXTLP_1_MARK, PORT116_FN4),
- PINMUX_DATA(OVCN2_1_MARK, PORT117_FN4),
- PINMUX_DATA(KEYIN0_121_MARK, PORT121_FN4, MSEL4CR_18_1),
- PINMUX_DATA(KEYIN1_122_MARK, PORT122_FN4, MSEL4CR_18_1),
- PINMUX_DATA(KEYIN2_123_MARK, PORT123_FN4, MSEL4CR_18_1),
- PINMUX_DATA(KEYIN3_124_MARK, PORT124_FN4, MSEL4CR_18_1),
- PINMUX_DATA(PWEN_1_138_MARK, PORT138_FN4),
- PINMUX_DATA(IROUT_140_MARK, PORT140_FN4),
- PINMUX_DATA(LCDCS_MARK, PORT145_FN4),
- PINMUX_DATA(LCDWR_MARK, PORT147_FN4),
- PINMUX_DATA(LCDRS_MARK, PORT149_FN4),
- PINMUX_DATA(OVCN_1_162_MARK, PORT162_FN4, MSEL4CR_14_1),
-
- /* Function 5 */
- PINMUX_DATA(GPI0_MARK, PORT41_FN5),
- PINMUX_DATA(GPI1_MARK, PORT42_FN5),
- PINMUX_DATA(GPO0_MARK, PORT43_FN5),
- PINMUX_DATA(GPO1_MARK, PORT44_FN5),
- PINMUX_DATA(I2C_SCL3S_MARK, PORT137_FN5, MSEL4CR_16_0),
- PINMUX_DATA(I2C_SDA3S_MARK, PORT145_FN5, MSEL4CR_16_0),
- PINMUX_DATA(I2C_SCL4S_MARK, PORT146_FN5, MSEL4CR_17_0),
- PINMUX_DATA(I2C_SDA4S_MARK, PORT147_FN5, MSEL4CR_17_0),
-
- /* Function select */
- PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0),
- PINMUX_DATA(LCDC1_SELECT_MARK, MSEL3CR_6_1),
-
- PINMUX_DATA(TS0_1SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_0),
- PINMUX_DATA(TS0_2SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_1),
- PINMUX_DATA(TS1_1SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_0),
- PINMUX_DATA(TS1_2SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_1),
-
- PINMUX_DATA(SDENC_CPG_MARK, MSEL4CR_19_0),
- PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
-
- PINMUX_DATA(MFIv6_MARK, MSEL4CR_6_0),
- PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
-};
-
-#define __I (SH_PFC_PIN_CFG_INPUT)
-#define __O (SH_PFC_PIN_CFG_OUTPUT)
-#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
-#define __PD (SH_PFC_PIN_CFG_PULL_DOWN)
-#define __PU (SH_PFC_PIN_CFG_PULL_UP)
-#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
-
-#define SH7372_PIN_I_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PD)
-#define SH7372_PIN_I_PU(pin) SH_PFC_PIN_CFG(pin, __I | __PU)
-#define SH7372_PIN_I_PU_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PUD)
-#define SH7372_PIN_IO(pin) SH_PFC_PIN_CFG(pin, __IO)
-#define SH7372_PIN_IO_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PD)
-#define SH7372_PIN_IO_PU(pin) SH_PFC_PIN_CFG(pin, __IO | __PU)
-#define SH7372_PIN_IO_PU_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PUD)
-#define SH7372_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O)
-#define SH7372_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD)
-
-static const struct sh_pfc_pin pinmux_pins[] = {
- /* Table 57-1 (I/O and Pull U/D) */
- SH7372_PIN_IO_PD(0), SH7372_PIN_IO_PD(1),
- SH7372_PIN_O(2), SH7372_PIN_I_PD(3),
- SH7372_PIN_I_PD(4), SH7372_PIN_I_PD(5),
- SH7372_PIN_IO_PU_PD(6), SH7372_PIN_I_PD(7),
- SH7372_PIN_IO_PD(8), SH7372_PIN_O(9),
- SH7372_PIN_O(10), SH7372_PIN_O(11),
- SH7372_PIN_IO_PU_PD(12), SH7372_PIN_IO_PD(13),
- SH7372_PIN_IO_PD(14), SH7372_PIN_O(15),
- SH7372_PIN_IO_PD(16), SH7372_PIN_IO_PD(17),
- SH7372_PIN_I_PD(18), SH7372_PIN_IO(19),
- SH7372_PIN_IO(20), SH7372_PIN_IO(21),
- SH7372_PIN_IO(22), SH7372_PIN_IO(23),
- SH7372_PIN_IO(24), SH7372_PIN_IO(25),
- SH7372_PIN_IO(26), SH7372_PIN_IO(27),
- SH7372_PIN_IO(28), SH7372_PIN_IO(29),
- SH7372_PIN_IO(30), SH7372_PIN_IO(31),
- SH7372_PIN_IO(32), SH7372_PIN_IO(33),
- SH7372_PIN_IO(34), SH7372_PIN_IO(35),
- SH7372_PIN_IO(36), SH7372_PIN_IO(37),
- SH7372_PIN_IO(38), SH7372_PIN_IO(39),
- SH7372_PIN_IO(40), SH7372_PIN_IO(41),
- SH7372_PIN_IO(42), SH7372_PIN_IO(43),
- SH7372_PIN_IO(44), SH7372_PIN_IO(45),
- SH7372_PIN_IO_PU(46), SH7372_PIN_IO_PU(47),
- SH7372_PIN_IO_PU(48), SH7372_PIN_IO_PU(49),
- SH7372_PIN_IO_PU(50), SH7372_PIN_IO_PU(51),
- SH7372_PIN_IO_PU(52), SH7372_PIN_IO_PU(53),
- SH7372_PIN_IO_PU(54), SH7372_PIN_IO_PU(55),
- SH7372_PIN_IO_PU(56), SH7372_PIN_IO_PU(57),
- SH7372_PIN_IO_PU(58), SH7372_PIN_IO_PU(59),
- SH7372_PIN_IO_PU(60), SH7372_PIN_IO_PU(61),
- SH7372_PIN_IO(62), SH7372_PIN_O(63),
- SH7372_PIN_O(64), SH7372_PIN_IO_PU(65),
- SH7372_PIN_O_PU_PD(66), SH7372_PIN_IO_PU(67),
- SH7372_PIN_O(68), SH7372_PIN_IO(69),
- SH7372_PIN_IO(70), SH7372_PIN_IO(71),
- SH7372_PIN_O(72), SH7372_PIN_I_PU(73),
- SH7372_PIN_I_PU_PD(74), SH7372_PIN_IO_PU_PD(75),
- SH7372_PIN_IO_PU_PD(76), SH7372_PIN_IO_PU_PD(77),
- SH7372_PIN_IO_PU_PD(78), SH7372_PIN_IO_PU_PD(79),
- SH7372_PIN_IO_PU_PD(80), SH7372_PIN_IO_PU_PD(81),
- SH7372_PIN_IO_PU_PD(82), SH7372_PIN_IO_PU_PD(83),
- SH7372_PIN_IO_PU_PD(84), SH7372_PIN_IO_PU_PD(85),
- SH7372_PIN_IO_PU_PD(86), SH7372_PIN_IO_PU_PD(87),
- SH7372_PIN_IO_PU_PD(88), SH7372_PIN_IO_PU_PD(89),
- SH7372_PIN_IO_PU_PD(90), SH7372_PIN_IO_PU_PD(91),
- SH7372_PIN_IO_PU_PD(92), SH7372_PIN_IO_PU_PD(93),
- SH7372_PIN_IO_PU_PD(94), SH7372_PIN_IO_PU_PD(95),
- SH7372_PIN_IO_PU(96), SH7372_PIN_IO_PU_PD(97),
- SH7372_PIN_IO_PU_PD(98), SH7372_PIN_O_PU_PD(99),
- SH7372_PIN_IO_PD(100), SH7372_PIN_IO_PD(101),
- SH7372_PIN_IO_PD(102), SH7372_PIN_IO_PD(103),
- SH7372_PIN_IO_PD(104), SH7372_PIN_IO_PD(105),
- SH7372_PIN_IO_PU(106), SH7372_PIN_IO_PU(107),
- SH7372_PIN_IO_PU(108), SH7372_PIN_IO_PU(109),
- SH7372_PIN_IO_PU(110), SH7372_PIN_IO_PU(111),
- SH7372_PIN_IO_PD(112), SH7372_PIN_IO_PD(113),
- SH7372_PIN_IO_PU(114), SH7372_PIN_IO_PU(115),
- SH7372_PIN_IO_PU(116), SH7372_PIN_IO_PU(117),
- SH7372_PIN_IO_PU(118), SH7372_PIN_IO_PU(119),
- SH7372_PIN_IO_PU(120), SH7372_PIN_IO_PD(121),
- SH7372_PIN_IO_PD(122), SH7372_PIN_IO_PD(123),
- SH7372_PIN_IO_PD(124), SH7372_PIN_IO_PD(125),
- SH7372_PIN_IO_PD(126), SH7372_PIN_IO_PD(127),
- SH7372_PIN_IO_PD(128), SH7372_PIN_IO_PU_PD(129),
- SH7372_PIN_IO_PU_PD(130), SH7372_PIN_IO_PU_PD(131),
- SH7372_PIN_IO_PU_PD(132), SH7372_PIN_IO_PU_PD(133),
- SH7372_PIN_IO_PU_PD(134), SH7372_PIN_IO_PU_PD(135),
- SH7372_PIN_IO_PD(136), SH7372_PIN_IO_PD(137),
- SH7372_PIN_IO_PD(138), SH7372_PIN_IO_PD(139),
- SH7372_PIN_IO_PD(140), SH7372_PIN_IO_PD(141),
- SH7372_PIN_IO_PD(142), SH7372_PIN_IO_PU_PD(143),
- SH7372_PIN_IO_PD(144), SH7372_PIN_IO_PD(145),
- SH7372_PIN_IO_PD(146), SH7372_PIN_IO_PD(147),
- SH7372_PIN_IO_PD(148), SH7372_PIN_IO_PD(149),
- SH7372_PIN_IO_PD(150), SH7372_PIN_IO_PD(151),
- SH7372_PIN_IO_PU_PD(152), SH7372_PIN_I_PD(153),
- SH7372_PIN_IO_PU_PD(154), SH7372_PIN_I_PD(155),
- SH7372_PIN_IO_PD(156), SH7372_PIN_IO_PD(157),
- SH7372_PIN_I_PD(158), SH7372_PIN_IO_PD(159),
- SH7372_PIN_O(160), SH7372_PIN_IO_PD(161),
- SH7372_PIN_IO_PD(162), SH7372_PIN_IO_PD(163),
- SH7372_PIN_I_PD(164), SH7372_PIN_IO_PD(165),
- SH7372_PIN_I_PD(166), SH7372_PIN_I_PD(167),
- SH7372_PIN_I_PD(168), SH7372_PIN_I_PD(169),
- SH7372_PIN_I_PD(170), SH7372_PIN_O(171),
- SH7372_PIN_IO_PU_PD(172), SH7372_PIN_IO_PU_PD(173),
- SH7372_PIN_IO_PU_PD(174), SH7372_PIN_IO_PU_PD(175),
- SH7372_PIN_IO_PU_PD(176), SH7372_PIN_IO_PU_PD(177),
- SH7372_PIN_IO_PU_PD(178), SH7372_PIN_O(179),
- SH7372_PIN_IO_PU_PD(180), SH7372_PIN_IO_PU_PD(181),
- SH7372_PIN_IO_PU_PD(182), SH7372_PIN_IO_PU_PD(183),
- SH7372_PIN_IO_PU_PD(184), SH7372_PIN_O(185),
- SH7372_PIN_IO_PU_PD(186), SH7372_PIN_IO_PU_PD(187),
- SH7372_PIN_IO_PU_PD(188), SH7372_PIN_IO_PU_PD(189),
- SH7372_PIN_IO_PU_PD(190),
-};
-
-/* - BSC -------------------------------------------------------------------- */
-static const unsigned int bsc_data8_pins[] = {
- /* D[0:7] */
- 46, 47, 48, 49, 50, 51, 52, 53,
-};
-static const unsigned int bsc_data8_mux[] = {
- D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
- D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
-};
-static const unsigned int bsc_data16_pins[] = {
- /* D[0:15] */
- 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
-};
-static const unsigned int bsc_data16_mux[] = {
- D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
- D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
- D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
- D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-};
-static const unsigned int bsc_cs0_pins[] = {
- /* CS */
- 62,
-};
-static const unsigned int bsc_cs0_mux[] = {
- CS0_MARK,
-};
-static const unsigned int bsc_cs2_pins[] = {
- /* CS */
- 63,
-};
-static const unsigned int bsc_cs2_mux[] = {
- CS2_MARK,
-};
-static const unsigned int bsc_cs4_pins[] = {
- /* CS */
- 64,
-};
-static const unsigned int bsc_cs4_mux[] = {
- CS4_MARK,
-};
-static const unsigned int bsc_cs5a_pins[] = {
- /* CS */
- 65,
-};
-static const unsigned int bsc_cs5a_mux[] = {
- CS5A_MARK,
-};
-static const unsigned int bsc_cs5b_pins[] = {
- /* CS */
- 66,
-};
-static const unsigned int bsc_cs5b_mux[] = {
- CS5B_MARK,
-};
-static const unsigned int bsc_cs6a_pins[] = {
- /* CS */
- 67,
-};
-static const unsigned int bsc_cs6a_mux[] = {
- CS6A_MARK,
-};
-static const unsigned int bsc_rd_we8_pins[] = {
- /* RD, WE[0] */
- 69, 70,
-};
-static const unsigned int bsc_rd_we8_mux[] = {
- RD_FSC_MARK, WE0_FWE_MARK,
-};
-static const unsigned int bsc_rd_we16_pins[] = {
- /* RD, WE[0:1] */
- 69, 70, 71,
-};
-static const unsigned int bsc_rd_we16_mux[] = {
- RD_FSC_MARK, WE0_FWE_MARK, WE1_MARK,
-};
-static const unsigned int bsc_bs_pins[] = {
- /* BS */
- 19,
-};
-static const unsigned int bsc_bs_mux[] = {
- BS_MARK,
-};
-static const unsigned int bsc_rdwr_pins[] = {
- /* RDWR */
- 75,
-};
-static const unsigned int bsc_rdwr_mux[] = {
- RDWR_MARK,
-};
-static const unsigned int bsc_wait_pins[] = {
- /* WAIT */
- 74,
-};
-static const unsigned int bsc_wait_mux[] = {
- WAIT_MARK,
-};
-/* - CEU -------------------------------------------------------------------- */
-static const unsigned int ceu_data_0_7_pins[] = {
- /* D[0:7] */
- 102, 103, 104, 105, 106, 107, 108, 109,
-};
-static const unsigned int ceu_data_0_7_mux[] = {
- VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
- VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
-};
-static const unsigned int ceu_data_8_15_pins[] = {
- /* D[8:15] */
- 110, 111, 112, 113, 114, 115, 116, 117,
-};
-static const unsigned int ceu_data_8_15_mux[] = {
- VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
- VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
-};
-static const unsigned int ceu_clk_0_pins[] = {
- /* CKO */
- 120,
-};
-static const unsigned int ceu_clk_0_mux[] = {
- VIO_CKO_MARK,
-};
-static const unsigned int ceu_clk_1_pins[] = {
- /* CKO */
- 16,
-};
-static const unsigned int ceu_clk_1_mux[] = {
- VIO_CKO1_MARK,
-};
-static const unsigned int ceu_clk_2_pins[] = {
- /* CKO */
- 17,
-};
-static const unsigned int ceu_clk_2_mux[] = {
- VIO_CKO2_MARK,
-};
-static const unsigned int ceu_sync_pins[] = {
- /* CLK, VD, HD */
- 118, 100, 101,
-};
-static const unsigned int ceu_sync_mux[] = {
- VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK,
-};
-static const unsigned int ceu_field_pins[] = {
- /* FIELD */
- 119,
-};
-static const unsigned int ceu_field_mux[] = {
- VIO_FIELD_MARK,
-};
-/* - FLCTL ------------------------------------------------------------------ */
-static const unsigned int flctl_data_pins[] = {
- /* NAF[0:15] */
- 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
-};
-static const unsigned int flctl_data_mux[] = {
- D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
- D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
- D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
- D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-};
-static const unsigned int flctl_ce0_pins[] = {
- /* CE */
- 68,
-};
-static const unsigned int flctl_ce0_mux[] = {
- FCE0_MARK,
-};
-static const unsigned int flctl_ce1_pins[] = {
- /* CE */
- 66,
-};
-static const unsigned int flctl_ce1_mux[] = {
- FCE1_MARK,
-};
-static const unsigned int flctl_ctrl_pins[] = {
- /* FCDE, FOE, FSC, FWE, FRB */
- 24, 23, 69, 70, 73,
-};
-static const unsigned int flctl_ctrl_mux[] = {
- A5_FCDE_MARK, A4_FOE_MARK, RD_FSC_MARK, WE0_FWE_MARK, FRB_MARK,
-};
-/* - FSIA ------------------------------------------------------------------- */
-static const unsigned int fsia_mclk_in_pins[] = {
- /* CK */
- 4,
-};
-static const unsigned int fsia_mclk_in_mux[] = {
- FSIACK_MARK,
-};
-static const unsigned int fsia_mclk_out_pins[] = {
- /* OMC */
- 8,
-};
-static const unsigned int fsia_mclk_out_mux[] = {
- FSIAOMC_MARK,
-};
-static const unsigned int fsia_sclk_in_pins[] = {
- /* ILR, IBT */
- 5, 6,
-};
-static const unsigned int fsia_sclk_in_mux[] = {
- FSIAILR_MARK, FSIAIBT_MARK,
-};
-static const unsigned int fsia_sclk_out_pins[] = {
- /* OLR, OBT */
- 9, 10,
-};
-static const unsigned int fsia_sclk_out_mux[] = {
- FSIAOLR_MARK, FSIAOBT_MARK,
-};
-static const unsigned int fsia_data_in_pins[] = {
- /* ISLD */
- 7,
-};
-static const unsigned int fsia_data_in_mux[] = {
- FSIAISLD_MARK,
-};
-static const unsigned int fsia_data_out_pins[] = {
- /* OSLD */
- 11,
-};
-static const unsigned int fsia_data_out_mux[] = {
- FSIAOSLD_MARK,
-};
-static const unsigned int fsia_spdif_0_pins[] = {
- /* SPDIF */
- 11,
-};
-static const unsigned int fsia_spdif_0_mux[] = {
- FSIASPDIF_11_MARK,
-};
-static const unsigned int fsia_spdif_1_pins[] = {
- /* SPDIF */
- 15,
-};
-static const unsigned int fsia_spdif_1_mux[] = {
- FSIASPDIF_15_MARK,
-};
-/* - FSIB ------------------------------------------------------------------- */
-static const unsigned int fsib_mclk_in_pins[] = {
- /* CK */
- 4,
-};
-static const unsigned int fsib_mclk_in_mux[] = {
- FSIBCK_MARK,
-};
-/* - HDMI ------------------------------------------------------------------- */
-static const unsigned int hdmi_pins[] = {
- /* HPD, CEC */
- 169, 170,
-};
-static const unsigned int hdmi_mux[] = {
- HDMI_HPD_MARK, HDMI_CEC_MARK,
-};
-/* - INTC ------------------------------------------------------------------- */
-IRQC_PINS_MUX(0, 6, 162);
-IRQC_PIN_MUX(1, 12);
-IRQC_PINS_MUX(2, 4, 5);
-IRQC_PINS_MUX(3, 8, 16);
-IRQC_PINS_MUX(4, 17, 163);
-IRQC_PIN_MUX(5, 18);
-IRQC_PINS_MUX(6, 39, 164);
-IRQC_PINS_MUX(7, 40, 167);
-IRQC_PINS_MUX(8, 41, 168);
-IRQC_PINS_MUX(9, 42, 169);
-IRQC_PIN_MUX(10, 65);
-IRQC_PIN_MUX(11, 67);
-IRQC_PINS_MUX(12, 80, 137);
-IRQC_PINS_MUX(13, 81, 145);
-IRQC_PINS_MUX(14, 82, 146);
-IRQC_PINS_MUX(15, 83, 147);
-IRQC_PINS_MUX(16, 84, 170);
-IRQC_PIN_MUX(17, 85);
-IRQC_PIN_MUX(18, 86);
-IRQC_PIN_MUX(19, 87);
-IRQC_PIN_MUX(20, 92);
-IRQC_PIN_MUX(21, 93);
-IRQC_PIN_MUX(22, 94);
-IRQC_PIN_MUX(23, 95);
-IRQC_PIN_MUX(24, 112);
-IRQC_PIN_MUX(25, 119);
-IRQC_PINS_MUX(26, 121, 172);
-IRQC_PINS_MUX(27, 122, 180);
-IRQC_PINS_MUX(28, 123, 181);
-IRQC_PINS_MUX(29, 129, 182);
-IRQC_PINS_MUX(30, 130, 183);
-IRQC_PINS_MUX(31, 138, 184);
-/* - KEYSC ------------------------------------------------------------------ */
-static const unsigned int keysc_in04_0_pins[] = {
- /* KEYIN[0:4] */
- 136, 135, 134, 133, 132,
-};
-static const unsigned int keysc_in04_0_mux[] = {
- KEYIN0_136_MARK, KEYIN1_135_MARK, KEYIN2_134_MARK, KEYIN3_133_MARK,
- KEYIN4_MARK,
-};
-static const unsigned int keysc_in04_1_pins[] = {
- /* KEYIN[0:4] */
- 121, 122, 123, 124, 132,
-};
-static const unsigned int keysc_in04_1_mux[] = {
- KEYIN0_121_MARK, KEYIN1_122_MARK, KEYIN2_123_MARK, KEYIN3_124_MARK,
- KEYIN4_MARK,
-};
-static const unsigned int keysc_in5_pins[] = {
- /* KEYIN5 */
- 131,
-};
-static const unsigned int keysc_in5_mux[] = {
- KEYIN5_MARK,
-};
-static const unsigned int keysc_in6_pins[] = {
- /* KEYIN6 */
- 130,
-};
-static const unsigned int keysc_in6_mux[] = {
- KEYIN6_MARK,
-};
-static const unsigned int keysc_in7_pins[] = {
- /* KEYIN7 */
- 129,
-};
-static const unsigned int keysc_in7_mux[] = {
- KEYIN7_MARK,
-};
-static const unsigned int keysc_out4_pins[] = {
- /* KEYOUT[0:3] */
- 128, 127, 126, 125,
-};
-static const unsigned int keysc_out4_mux[] = {
- KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
-};
-static const unsigned int keysc_out5_pins[] = {
- /* KEYOUT[0:4] */
- 128, 127, 126, 125, 124,
-};
-static const unsigned int keysc_out5_mux[] = {
- KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
- KEYOUT4_MARK,
-};
-static const unsigned int keysc_out6_pins[] = {
- /* KEYOUT[0:5] */
- 128, 127, 126, 125, 124, 123,
-};
-static const unsigned int keysc_out6_mux[] = {
- KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
- KEYOUT4_MARK, KEYOUT5_MARK,
-};
-static const unsigned int keysc_out8_pins[] = {
- /* KEYOUT[0:7] */
- 128, 127, 126, 125, 124, 123, 122, 121,
-};
-static const unsigned int keysc_out8_mux[] = {
- KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
- KEYOUT4_MARK, KEYOUT5_MARK, KEYOUT6_MARK, KEYOUT7_MARK,
-};
-/* - LCD -------------------------------------------------------------------- */
-static const unsigned int lcd_data8_pins[] = {
- /* D[0:7] */
- 121, 122, 123, 124, 125, 126, 127, 128,
-};
-static const unsigned int lcd_data8_mux[] = {
- /* LCDC */
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
-};
-static const unsigned int lcd_data9_pins[] = {
- /* D[0:8] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129,
- 137, 138, 139, 140, 141, 142, 143, 144,
-};
-static const unsigned int lcd_data9_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK,
-};
-static const unsigned int lcd_data12_pins[] = {
- /* D[0:11] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129, 130, 131, 132,
-};
-static const unsigned int lcd_data12_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
-};
-static const unsigned int lcd_data16_pins[] = {
- /* D[0:15] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129, 130, 131, 132, 133, 134, 135, 136,
-};
-static const unsigned int lcd_data16_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
- LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
-};
-static const unsigned int lcd_data18_pins[] = {
- /* D[0:17] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129, 130, 131, 132, 133, 134, 135, 136,
- 137, 138,
-};
-static const unsigned int lcd_data18_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
- LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
- LCDD16_MARK, LCDD17_MARK,
-};
-static const unsigned int lcd_data24_pins[] = {
- /* D[0:23] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129, 130, 131, 132, 133, 134, 135, 136,
- 137, 138, 139, 140, 141, 142, 143, 144,
-};
-static const unsigned int lcd_data24_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
- LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
- LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK,
- LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK,
-};
-static const unsigned int lcd_display_pins[] = {
- /* DON */
- 151,
-};
-static const unsigned int lcd_display_mux[] = {
- LCDDON_MARK,
-};
-static const unsigned int lcd_lclk_pins[] = {
- /* LCLK */
- 150,
-};
-static const unsigned int lcd_lclk_mux[] = {
- LCDLCLK_MARK,
-};
-static const unsigned int lcd_sync_pins[] = {
- /* VSYN, HSYN, DCK, DISP */
- 146, 145, 147, 149,
-};
-static const unsigned int lcd_sync_mux[] = {
- LCDVSYN_MARK, LCDHSYN_MARK, LCDDCK_MARK, LCDDISP_MARK,
-};
-static const unsigned int lcd_sys_pins[] = {
- /* CS, WR, RD, RS */
- 145, 147, 148, 149,
-};
-static const unsigned int lcd_sys_mux[] = {
- LCDCS_MARK, LCDWR_MARK, LCDRD_MARK, LCDRS_MARK,
-};
-/* - MMCIF ------------------------------------------------------------------ */
-static const unsigned int mmc0_data1_0_pins[] = {
- /* D[0] */
- 84,
-};
-static const unsigned int mmc0_data1_0_mux[] = {
- MMCD0_0_MARK,
-};
-static const unsigned int mmc0_data4_0_pins[] = {
- /* D[0:3] */
- 84, 85, 86, 87,
-};
-static const unsigned int mmc0_data4_0_mux[] = {
- MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
-};
-static const unsigned int mmc0_data8_0_pins[] = {
- /* D[0:7] */
- 84, 85, 86, 87, 88, 89, 90, 91,
-};
-static const unsigned int mmc0_data8_0_mux[] = {
- MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
- MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
-};
-static const unsigned int mmc0_ctrl_0_pins[] = {
- /* CMD, CLK */
- 92, 99,
-};
-static const unsigned int mmc0_ctrl_0_mux[] = {
- MMCCMD0_MARK, MMCCLK0_MARK,
-};
-
-static const unsigned int mmc0_data1_1_pins[] = {
- /* D[0] */
- 54,
-};
-static const unsigned int mmc0_data1_1_mux[] = {
- MMCD1_0_MARK,
-};
-static const unsigned int mmc0_data4_1_pins[] = {
- /* D[0:3] */
- 54, 55, 56, 57,
-};
-static const unsigned int mmc0_data4_1_mux[] = {
- MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
-};
-static const unsigned int mmc0_data8_1_pins[] = {
- /* D[0:7] */
- 54, 55, 56, 57, 58, 59, 60, 61,
-};
-static const unsigned int mmc0_data8_1_mux[] = {
- MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
- MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
-};
-static const unsigned int mmc0_ctrl_1_pins[] = {
- /* CMD, CLK */
- 67, 66,
-};
-static const unsigned int mmc0_ctrl_1_mux[] = {
- MMCCMD1_MARK, MMCCLK1_MARK,
-};
-/* - SCIFA0 ----------------------------------------------------------------- */
-static const unsigned int scifa0_data_pins[] = {
- /* RXD, TXD */
- 153, 152,
-};
-static const unsigned int scifa0_data_mux[] = {
- SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
-};
-static const unsigned int scifa0_clk_pins[] = {
- /* SCK */
- 156,
-};
-static const unsigned int scifa0_clk_mux[] = {
- SCIFA0_SCK_MARK,
-};
-static const unsigned int scifa0_ctrl_pins[] = {
- /* RTS, CTS */
- 157, 158,
-};
-static const unsigned int scifa0_ctrl_mux[] = {
- SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
-};
-/* - SCIFA1 ----------------------------------------------------------------- */
-static const unsigned int scifa1_data_pins[] = {
- /* RXD, TXD */
- 155, 154,
-};
-static const unsigned int scifa1_data_mux[] = {
- SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
-};
-static const unsigned int scifa1_clk_pins[] = {
- /* SCK */
- 159,
-};
-static const unsigned int scifa1_clk_mux[] = {
- SCIFA1_SCK_MARK,
-};
-static const unsigned int scifa1_ctrl_pins[] = {
- /* RTS, CTS */
- 160, 161,
-};
-static const unsigned int scifa1_ctrl_mux[] = {
- SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
-};
-/* - SCIFA2 ----------------------------------------------------------------- */
-static const unsigned int scifa2_data_pins[] = {
- /* RXD, TXD */
- 97, 96,
-};
-static const unsigned int scifa2_data_mux[] = {
- SCIFA2_RXD1_MARK, SCIFA2_TXD1_MARK,
-};
-static const unsigned int scifa2_clk_pins[] = {
- /* SCK */
- 98,
-};
-static const unsigned int scifa2_clk_mux[] = {
- SCIFA2_SCK1_MARK,
-};
-static const unsigned int scifa2_ctrl_pins[] = {
- /* RTS, CTS */
- 95, 94,
-};
-static const unsigned int scifa2_ctrl_mux[] = {
- SCIFA2_RTS1_MARK, SCIFA2_CTS1_MARK,
-};
-/* - SCIFA3 ----------------------------------------------------------------- */
-static const unsigned int scifa3_data_pins[] = {
- /* RXD, TXD */
- 144, 143,
-};
-static const unsigned int scifa3_data_mux[] = {
- SCIFA3_RXD_MARK, SCIFA3_TXD_MARK,
-};
-static const unsigned int scifa3_clk_pins[] = {
- /* SCK */
- 142,
-};
-static const unsigned int scifa3_clk_mux[] = {
- SCIFA3_SCK_MARK,
-};
-static const unsigned int scifa3_ctrl_0_pins[] = {
- /* RTS, CTS */
- 44, 43,
-};
-static const unsigned int scifa3_ctrl_0_mux[] = {
- SCIFA3_RTS_44_MARK, SCIFA3_CTS_43_MARK,
-};
-static const unsigned int scifa3_ctrl_1_pins[] = {
- /* RTS, CTS */
- 141, 140,
-};
-static const unsigned int scifa3_ctrl_1_mux[] = {
- SCIFA3_RTS_141_MARK, SCIFA3_CTS_140_MARK,
-};
-/* - SCIFA4 ----------------------------------------------------------------- */
-static const unsigned int scifa4_data_pins[] = {
- /* RXD, TXD */
- 5, 6,
-};
-static const unsigned int scifa4_data_mux[] = {
- SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
-};
-/* - SCIFA5 ----------------------------------------------------------------- */
-static const unsigned int scifa5_data_pins[] = {
- /* RXD, TXD */
- 8, 12,
-};
-static const unsigned int scifa5_data_mux[] = {
- SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
-};
-/* - SCIFB ------------------------------------------------------------------ */
-static const unsigned int scifb_data_pins[] = {
- /* RXD, TXD */
- 166, 165,
-};
-static const unsigned int scifb_data_mux[] = {
- SCIFB_RXD_MARK, SCIFB_TXD_MARK,
-};
-static const unsigned int scifb_clk_pins[] = {
- /* SCK */
- 162,
-};
-static const unsigned int scifb_clk_mux[] = {
- SCIFB_SCK_MARK,
-};
-static const unsigned int scifb_ctrl_pins[] = {
- /* RTS, CTS */
- 163, 164,
-};
-static const unsigned int scifb_ctrl_mux[] = {
- SCIFB_RTS_MARK, SCIFB_CTS_MARK,
-};
-/* - SDHI0 ------------------------------------------------------------------ */
-static const unsigned int sdhi0_data1_pins[] = {
- /* D0 */
- 173,
-};
-static const unsigned int sdhi0_data1_mux[] = {
- SDHID0_0_MARK,
-};
-static const unsigned int sdhi0_data4_pins[] = {
- /* D[0:3] */
- 173, 174, 175, 176,
-};
-static const unsigned int sdhi0_data4_mux[] = {
- SDHID0_0_MARK, SDHID0_1_MARK, SDHID0_2_MARK, SDHID0_3_MARK,
-};
-static const unsigned int sdhi0_ctrl_pins[] = {
- /* CMD, CLK */
- 177, 171,
-};
-static const unsigned int sdhi0_ctrl_mux[] = {
- SDHICMD0_MARK, SDHICLK0_MARK,
-};
-static const unsigned int sdhi0_cd_pins[] = {
- /* CD */
- 172,
-};
-static const unsigned int sdhi0_cd_mux[] = {
- SDHICD0_MARK,
-};
-static const unsigned int sdhi0_wp_pins[] = {
- /* WP */
- 178,
-};
-static const unsigned int sdhi0_wp_mux[] = {
- SDHIWP0_MARK,
-};
-/* - SDHI1 ------------------------------------------------------------------ */
-static const unsigned int sdhi1_data1_pins[] = {
- /* D0 */
- 180,
-};
-static const unsigned int sdhi1_data1_mux[] = {
- SDHID1_0_MARK,
-};
-static const unsigned int sdhi1_data4_pins[] = {
- /* D[0:3] */
- 180, 181, 182, 183,
-};
-static const unsigned int sdhi1_data4_mux[] = {
- SDHID1_0_MARK, SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
-};
-static const unsigned int sdhi1_ctrl_pins[] = {
- /* CMD, CLK */
- 184, 179,
-};
-static const unsigned int sdhi1_ctrl_mux[] = {
- SDHICMD1_MARK, SDHICLK1_MARK,
-};
-
-static const unsigned int sdhi2_data1_pins[] = {
- /* D0 */
- 186,
-};
-static const unsigned int sdhi2_data1_mux[] = {
- SDHID2_0_MARK,
-};
-static const unsigned int sdhi2_data4_pins[] = {
- /* D[0:3] */
- 186, 187, 188, 189,
-};
-static const unsigned int sdhi2_data4_mux[] = {
- SDHID2_0_MARK, SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
-};
-static const unsigned int sdhi2_ctrl_pins[] = {
- /* CMD, CLK */
- 190, 185,
-};
-static const unsigned int sdhi2_ctrl_mux[] = {
- SDHICMD2_MARK, SDHICLK2_MARK,
-};
-/* - USB0 ------------------------------------------------------------------- */
-static const unsigned int usb0_vbus_pins[] = {
- /* VBUS */
- 167,
-};
-static const unsigned int usb0_vbus_mux[] = {
- VBUS0_0_MARK,
-};
-static const unsigned int usb0_otg_id_pins[] = {
- /* IDIN */
- 113,
-};
-static const unsigned int usb0_otg_id_mux[] = {
- IDIN_0_MARK,
-};
-static const unsigned int usb0_otg_ctrl_pins[] = {
- /* PWEN, EXTLP, OVCN, OVCN2 */
- 116, 114, 117, 115,
-};
-static const unsigned int usb0_otg_ctrl_mux[] = {
- PWEN_0_MARK, EXTLP_0_MARK, OVCN_0_MARK, OVCN2_0_MARK,
-};
-/* - USB1 ------------------------------------------------------------------- */
-static const unsigned int usb1_vbus_pins[] = {
- /* VBUS */
- 168,
-};
-static const unsigned int usb1_vbus_mux[] = {
- VBUS0_1_MARK,
-};
-static const unsigned int usb1_otg_id_0_pins[] = {
- /* IDIN */
- 113,
-};
-static const unsigned int usb1_otg_id_0_mux[] = {
- IDIN_1_113_MARK,
-};
-static const unsigned int usb1_otg_id_1_pins[] = {
- /* IDIN */
- 18,
-};
-static const unsigned int usb1_otg_id_1_mux[] = {
- IDIN_1_18_MARK,
-};
-static const unsigned int usb1_otg_ctrl_0_pins[] = {
- /* PWEN, EXTLP, OVCN, OVCN2 */
- 115, 116, 114, 117, 113,
-};
-static const unsigned int usb1_otg_ctrl_0_mux[] = {
- PWEN_1_115_MARK, EXTLP_1_MARK, OVCN_1_114_MARK, OVCN2_1_MARK,
-};
-static const unsigned int usb1_otg_ctrl_1_pins[] = {
- /* PWEN, EXTLP, OVCN, OVCN2 */
- 138, 116, 162, 117, 18,
-};
-static const unsigned int usb1_otg_ctrl_1_mux[] = {
- PWEN_1_138_MARK, EXTLP_1_MARK, OVCN_1_162_MARK, OVCN2_1_MARK,
-};
-
-static const struct sh_pfc_pin_group pinmux_groups[] = {
- SH_PFC_PIN_GROUP(bsc_data8),
- SH_PFC_PIN_GROUP(bsc_data16),
- SH_PFC_PIN_GROUP(bsc_cs0),
- SH_PFC_PIN_GROUP(bsc_cs2),
- SH_PFC_PIN_GROUP(bsc_cs4),
- SH_PFC_PIN_GROUP(bsc_cs5a),
- SH_PFC_PIN_GROUP(bsc_cs5b),
- SH_PFC_PIN_GROUP(bsc_cs6a),
- SH_PFC_PIN_GROUP(bsc_rd_we8),
- SH_PFC_PIN_GROUP(bsc_rd_we16),
- SH_PFC_PIN_GROUP(bsc_bs),
- SH_PFC_PIN_GROUP(bsc_rdwr),
- SH_PFC_PIN_GROUP(ceu_data_0_7),
- SH_PFC_PIN_GROUP(ceu_data_8_15),
- SH_PFC_PIN_GROUP(ceu_clk_0),
- SH_PFC_PIN_GROUP(ceu_clk_1),
- SH_PFC_PIN_GROUP(ceu_clk_2),
- SH_PFC_PIN_GROUP(ceu_sync),
- SH_PFC_PIN_GROUP(ceu_field),
- SH_PFC_PIN_GROUP(flctl_data),
- SH_PFC_PIN_GROUP(flctl_ce0),
- SH_PFC_PIN_GROUP(flctl_ce1),
- SH_PFC_PIN_GROUP(flctl_ctrl),
- SH_PFC_PIN_GROUP(fsia_mclk_in),
- SH_PFC_PIN_GROUP(fsia_mclk_out),
- SH_PFC_PIN_GROUP(fsia_sclk_in),
- SH_PFC_PIN_GROUP(fsia_sclk_out),
- SH_PFC_PIN_GROUP(fsia_data_in),
- SH_PFC_PIN_GROUP(fsia_data_out),
- SH_PFC_PIN_GROUP(fsia_spdif_0),
- SH_PFC_PIN_GROUP(fsia_spdif_1),
- SH_PFC_PIN_GROUP(fsib_mclk_in),
- SH_PFC_PIN_GROUP(hdmi),
- SH_PFC_PIN_GROUP(intc_irq0_0),
- SH_PFC_PIN_GROUP(intc_irq0_1),
- SH_PFC_PIN_GROUP(intc_irq1),
- SH_PFC_PIN_GROUP(intc_irq2_0),
- SH_PFC_PIN_GROUP(intc_irq2_1),
- SH_PFC_PIN_GROUP(intc_irq3_0),
- SH_PFC_PIN_GROUP(intc_irq3_1),
- SH_PFC_PIN_GROUP(intc_irq4_0),
- SH_PFC_PIN_GROUP(intc_irq4_1),
- SH_PFC_PIN_GROUP(intc_irq5),
- SH_PFC_PIN_GROUP(intc_irq6_0),
- SH_PFC_PIN_GROUP(intc_irq6_1),
- SH_PFC_PIN_GROUP(intc_irq7_0),
- SH_PFC_PIN_GROUP(intc_irq7_1),
- SH_PFC_PIN_GROUP(intc_irq8_0),
- SH_PFC_PIN_GROUP(intc_irq8_1),
- SH_PFC_PIN_GROUP(intc_irq9_0),
- SH_PFC_PIN_GROUP(intc_irq9_1),
- SH_PFC_PIN_GROUP(intc_irq10),
- SH_PFC_PIN_GROUP(intc_irq11),
- SH_PFC_PIN_GROUP(intc_irq12_0),
- SH_PFC_PIN_GROUP(intc_irq12_1),
- SH_PFC_PIN_GROUP(intc_irq13_0),
- SH_PFC_PIN_GROUP(intc_irq13_1),
- SH_PFC_PIN_GROUP(intc_irq14_0),
- SH_PFC_PIN_GROUP(intc_irq14_1),
- SH_PFC_PIN_GROUP(intc_irq15_0),
- SH_PFC_PIN_GROUP(intc_irq15_1),
- SH_PFC_PIN_GROUP(intc_irq16_0),
- SH_PFC_PIN_GROUP(intc_irq16_1),
- SH_PFC_PIN_GROUP(intc_irq17),
- SH_PFC_PIN_GROUP(intc_irq18),
- SH_PFC_PIN_GROUP(intc_irq19),
- SH_PFC_PIN_GROUP(intc_irq20),
- SH_PFC_PIN_GROUP(intc_irq21),
- SH_PFC_PIN_GROUP(intc_irq22),
- SH_PFC_PIN_GROUP(intc_irq23),
- SH_PFC_PIN_GROUP(intc_irq24),
- SH_PFC_PIN_GROUP(intc_irq25),
- SH_PFC_PIN_GROUP(intc_irq26_0),
- SH_PFC_PIN_GROUP(intc_irq26_1),
- SH_PFC_PIN_GROUP(intc_irq27_0),
- SH_PFC_PIN_GROUP(intc_irq27_1),
- SH_PFC_PIN_GROUP(intc_irq28_0),
- SH_PFC_PIN_GROUP(intc_irq28_1),
- SH_PFC_PIN_GROUP(intc_irq29_0),
- SH_PFC_PIN_GROUP(intc_irq29_1),
- SH_PFC_PIN_GROUP(intc_irq30_0),
- SH_PFC_PIN_GROUP(intc_irq30_1),
- SH_PFC_PIN_GROUP(intc_irq31_0),
- SH_PFC_PIN_GROUP(intc_irq31_1),
- SH_PFC_PIN_GROUP(keysc_in04_0),
- SH_PFC_PIN_GROUP(keysc_in04_1),
- SH_PFC_PIN_GROUP(keysc_in5),
- SH_PFC_PIN_GROUP(keysc_in6),
- SH_PFC_PIN_GROUP(keysc_in7),
- SH_PFC_PIN_GROUP(keysc_out4),
- SH_PFC_PIN_GROUP(keysc_out5),
- SH_PFC_PIN_GROUP(keysc_out6),
- SH_PFC_PIN_GROUP(keysc_out8),
- SH_PFC_PIN_GROUP(lcd_data8),
- SH_PFC_PIN_GROUP(lcd_data9),
- SH_PFC_PIN_GROUP(lcd_data12),
- SH_PFC_PIN_GROUP(lcd_data16),
- SH_PFC_PIN_GROUP(lcd_data18),
- SH_PFC_PIN_GROUP(lcd_data24),
- SH_PFC_PIN_GROUP(lcd_display),
- SH_PFC_PIN_GROUP(lcd_lclk),
- SH_PFC_PIN_GROUP(lcd_sync),
- SH_PFC_PIN_GROUP(lcd_sys),
- SH_PFC_PIN_GROUP(mmc0_data1_0),
- SH_PFC_PIN_GROUP(mmc0_data4_0),
- SH_PFC_PIN_GROUP(mmc0_data8_0),
- SH_PFC_PIN_GROUP(mmc0_ctrl_0),
- SH_PFC_PIN_GROUP(mmc0_data1_1),
- SH_PFC_PIN_GROUP(mmc0_data4_1),
- SH_PFC_PIN_GROUP(mmc0_data8_1),
- SH_PFC_PIN_GROUP(mmc0_ctrl_1),
- SH_PFC_PIN_GROUP(scifa0_data),
- SH_PFC_PIN_GROUP(scifa0_clk),
- SH_PFC_PIN_GROUP(scifa0_ctrl),
- SH_PFC_PIN_GROUP(scifa1_data),
- SH_PFC_PIN_GROUP(scifa1_clk),
- SH_PFC_PIN_GROUP(scifa1_ctrl),
- SH_PFC_PIN_GROUP(scifa2_data),
- SH_PFC_PIN_GROUP(scifa2_clk),
- SH_PFC_PIN_GROUP(scifa2_ctrl),
- SH_PFC_PIN_GROUP(scifa3_data),
- SH_PFC_PIN_GROUP(scifa3_clk),
- SH_PFC_PIN_GROUP(scifa3_ctrl_0),
- SH_PFC_PIN_GROUP(scifa3_ctrl_1),
- SH_PFC_PIN_GROUP(scifa4_data),
- SH_PFC_PIN_GROUP(scifa5_data),
- SH_PFC_PIN_GROUP(scifb_data),
- SH_PFC_PIN_GROUP(scifb_clk),
- SH_PFC_PIN_GROUP(scifb_ctrl),
- SH_PFC_PIN_GROUP(sdhi0_data1),
- SH_PFC_PIN_GROUP(sdhi0_data4),
- SH_PFC_PIN_GROUP(sdhi0_ctrl),
- SH_PFC_PIN_GROUP(sdhi0_cd),
- SH_PFC_PIN_GROUP(sdhi0_wp),
- SH_PFC_PIN_GROUP(sdhi1_data1),
- SH_PFC_PIN_GROUP(sdhi1_data4),
- SH_PFC_PIN_GROUP(sdhi1_ctrl),
- SH_PFC_PIN_GROUP(sdhi2_data1),
- SH_PFC_PIN_GROUP(sdhi2_data4),
- SH_PFC_PIN_GROUP(sdhi2_ctrl),
- SH_PFC_PIN_GROUP(usb0_vbus),
- SH_PFC_PIN_GROUP(usb0_otg_id),
- SH_PFC_PIN_GROUP(usb0_otg_ctrl),
- SH_PFC_PIN_GROUP(usb1_vbus),
- SH_PFC_PIN_GROUP(usb1_otg_id_0),
- SH_PFC_PIN_GROUP(usb1_otg_id_1),
- SH_PFC_PIN_GROUP(usb1_otg_ctrl_0),
- SH_PFC_PIN_GROUP(usb1_otg_ctrl_1),
-};
-
-static const char * const bsc_groups[] = {
- "bsc_data8",
- "bsc_data16",
- "bsc_cs0",
- "bsc_cs2",
- "bsc_cs4",
- "bsc_cs5a",
- "bsc_cs5b",
- "bsc_cs6a",
- "bsc_rd_we8",
- "bsc_rd_we16",
- "bsc_bs",
- "bsc_rdwr",
-};
-
-static const char * const ceu_groups[] = {
- "ceu_data_0_7",
- "ceu_data_8_15",
- "ceu_clk_0",
- "ceu_clk_1",
- "ceu_clk_2",
- "ceu_sync",
- "ceu_field",
-};
-
-static const char * const flctl_groups[] = {
- "flctl_data",
- "flctl_ce0",
- "flctl_ce1",
- "flctl_ctrl",
-};
-
-static const char * const fsia_groups[] = {
- "fsia_mclk_in",
- "fsia_mclk_out",
- "fsia_sclk_in",
- "fsia_sclk_out",
- "fsia_data_in",
- "fsia_data_out",
- "fsia_spdif_0",
- "fsia_spdif_1",
-};
-
-static const char * const fsib_groups[] = {
- "fsib_mclk_in",
-};
-
-static const char * const hdmi_groups[] = {
- "hdmi",
-};
-
-static const char * const intc_groups[] = {
- "intc_irq0_0",
- "intc_irq0_1",
- "intc_irq1",
- "intc_irq2_0",
- "intc_irq2_1",
- "intc_irq3_0",
- "intc_irq3_1",
- "intc_irq4_0",
- "intc_irq4_1",
- "intc_irq5",
- "intc_irq6_0",
- "intc_irq6_1",
- "intc_irq7_0",
- "intc_irq7_1",
- "intc_irq8_0",
- "intc_irq8_1",
- "intc_irq9_0",
- "intc_irq9_1",
- "intc_irq10",
- "intc_irq11",
- "intc_irq12_0",
- "intc_irq12_1",
- "intc_irq13_0",
- "intc_irq13_1",
- "intc_irq14_0",
- "intc_irq14_1",
- "intc_irq15_0",
- "intc_irq15_1",
- "intc_irq16_0",
- "intc_irq16_1",
- "intc_irq17",
- "intc_irq18",
- "intc_irq19",
- "intc_irq20",
- "intc_irq21",
- "intc_irq22",
- "intc_irq23",
- "intc_irq24",
- "intc_irq25",
- "intc_irq26_0",
- "intc_irq26_1",
- "intc_irq27_0",
- "intc_irq27_1",
- "intc_irq28_0",
- "intc_irq28_1",
- "intc_irq29_0",
- "intc_irq29_1",
- "intc_irq30_0",
- "intc_irq30_1",
- "intc_irq31_0",
- "intc_irq31_1",
-};
-
-static const char * const keysc_groups[] = {
- "keysc_in04_0",
- "keysc_in04_1",
- "keysc_in5",
- "keysc_in6",
- "keysc_in7",
- "keysc_out4",
- "keysc_out5",
- "keysc_out6",
- "keysc_out8",
-};
-
-static const char * const lcd_groups[] = {
- "lcd_data8",
- "lcd_data9",
- "lcd_data12",
- "lcd_data16",
- "lcd_data18",
- "lcd_data24",
- "lcd_display",
- "lcd_lclk",
- "lcd_sync",
- "lcd_sys",
-};
-
-static const char * const mmc0_groups[] = {
- "mmc0_data1_0",
- "mmc0_data4_0",
- "mmc0_data8_0",
- "mmc0_ctrl_0",
- "mmc0_data1_1",
- "mmc0_data4_1",
- "mmc0_data8_1",
- "mmc0_ctrl_1",
-};
-
-static const char * const scifa0_groups[] = {
- "scifa0_data",
- "scifa0_clk",
- "scifa0_ctrl",
-};
-
-static const char * const scifa1_groups[] = {
- "scifa1_data",
- "scifa1_clk",
- "scifa1_ctrl",
-};
-
-static const char * const scifa2_groups[] = {
- "scifa2_data",
- "scifa2_clk",
- "scifa2_ctrl",
-};
-
-static const char * const scifa3_groups[] = {
- "scifa3_data",
- "scifa3_clk",
- "scifa3_ctrl_0",
- "scifa3_ctrl_1",
-};
-
-static const char * const scifa4_groups[] = {
- "scifa4_data",
-};
-
-static const char * const scifa5_groups[] = {
- "scifa5_data",
-};
-
-static const char * const scifb_groups[] = {
- "scifb_data",
- "scifb_clk",
- "scifb_ctrl",
-};
-
-static const char * const sdhi0_groups[] = {
- "sdhi0_data1",
- "sdhi0_data4",
- "sdhi0_ctrl",
- "sdhi0_cd",
- "sdhi0_wp",
-};
-
-static const char * const sdhi1_groups[] = {
- "sdhi1_data1",
- "sdhi1_data4",
- "sdhi1_ctrl",
-};
-
-static const char * const sdhi2_groups[] = {
- "sdhi2_data1",
- "sdhi2_data4",
- "sdhi2_ctrl",
-};
-
-static const char * const usb0_groups[] = {
- "usb0_vbus",
- "usb0_otg_id",
- "usb0_otg_ctrl",
-};
-
-static const char * const usb1_groups[] = {
- "usb1_vbus",
- "usb1_otg_id_0",
- "usb1_otg_id_1",
- "usb1_otg_ctrl_0",
- "usb1_otg_ctrl_1",
-};
-
-static const struct sh_pfc_function pinmux_functions[] = {
- SH_PFC_FUNCTION(bsc),
- SH_PFC_FUNCTION(ceu),
- SH_PFC_FUNCTION(flctl),
- SH_PFC_FUNCTION(fsia),
- SH_PFC_FUNCTION(fsib),
- SH_PFC_FUNCTION(hdmi),
- SH_PFC_FUNCTION(intc),
- SH_PFC_FUNCTION(keysc),
- SH_PFC_FUNCTION(lcd),
- SH_PFC_FUNCTION(mmc0),
- SH_PFC_FUNCTION(scifa0),
- SH_PFC_FUNCTION(scifa1),
- SH_PFC_FUNCTION(scifa2),
- SH_PFC_FUNCTION(scifa3),
- SH_PFC_FUNCTION(scifa4),
- SH_PFC_FUNCTION(scifa5),
- SH_PFC_FUNCTION(scifb),
- SH_PFC_FUNCTION(sdhi0),
- SH_PFC_FUNCTION(sdhi1),
- SH_PFC_FUNCTION(sdhi2),
- SH_PFC_FUNCTION(usb0),
- SH_PFC_FUNCTION(usb1),
-};
-
-static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- PORTCR(0, 0xE6051000), /* PORT0CR */
- PORTCR(1, 0xE6051001), /* PORT1CR */
- PORTCR(2, 0xE6051002), /* PORT2CR */
- PORTCR(3, 0xE6051003), /* PORT3CR */
- PORTCR(4, 0xE6051004), /* PORT4CR */
- PORTCR(5, 0xE6051005), /* PORT5CR */
- PORTCR(6, 0xE6051006), /* PORT6CR */
- PORTCR(7, 0xE6051007), /* PORT7CR */
- PORTCR(8, 0xE6051008), /* PORT8CR */
- PORTCR(9, 0xE6051009), /* PORT9CR */
- PORTCR(10, 0xE605100A), /* PORT10CR */
- PORTCR(11, 0xE605100B), /* PORT11CR */
- PORTCR(12, 0xE605100C), /* PORT12CR */
- PORTCR(13, 0xE605100D), /* PORT13CR */
- PORTCR(14, 0xE605100E), /* PORT14CR */
- PORTCR(15, 0xE605100F), /* PORT15CR */
- PORTCR(16, 0xE6051010), /* PORT16CR */
- PORTCR(17, 0xE6051011), /* PORT17CR */
- PORTCR(18, 0xE6051012), /* PORT18CR */
- PORTCR(19, 0xE6051013), /* PORT19CR */
- PORTCR(20, 0xE6051014), /* PORT20CR */
- PORTCR(21, 0xE6051015), /* PORT21CR */
- PORTCR(22, 0xE6051016), /* PORT22CR */
- PORTCR(23, 0xE6051017), /* PORT23CR */
- PORTCR(24, 0xE6051018), /* PORT24CR */
- PORTCR(25, 0xE6051019), /* PORT25CR */
- PORTCR(26, 0xE605101A), /* PORT26CR */
- PORTCR(27, 0xE605101B), /* PORT27CR */
- PORTCR(28, 0xE605101C), /* PORT28CR */
- PORTCR(29, 0xE605101D), /* PORT29CR */
- PORTCR(30, 0xE605101E), /* PORT30CR */
- PORTCR(31, 0xE605101F), /* PORT31CR */
- PORTCR(32, 0xE6051020), /* PORT32CR */
- PORTCR(33, 0xE6051021), /* PORT33CR */
- PORTCR(34, 0xE6051022), /* PORT34CR */
- PORTCR(35, 0xE6051023), /* PORT35CR */
- PORTCR(36, 0xE6051024), /* PORT36CR */
- PORTCR(37, 0xE6051025), /* PORT37CR */
- PORTCR(38, 0xE6051026), /* PORT38CR */
- PORTCR(39, 0xE6051027), /* PORT39CR */
- PORTCR(40, 0xE6051028), /* PORT40CR */
- PORTCR(41, 0xE6051029), /* PORT41CR */
- PORTCR(42, 0xE605102A), /* PORT42CR */
- PORTCR(43, 0xE605102B), /* PORT43CR */
- PORTCR(44, 0xE605102C), /* PORT44CR */
- PORTCR(45, 0xE605102D), /* PORT45CR */
- PORTCR(46, 0xE605202E), /* PORT46CR */
- PORTCR(47, 0xE605202F), /* PORT47CR */
- PORTCR(48, 0xE6052030), /* PORT48CR */
- PORTCR(49, 0xE6052031), /* PORT49CR */
- PORTCR(50, 0xE6052032), /* PORT50CR */
- PORTCR(51, 0xE6052033), /* PORT51CR */
- PORTCR(52, 0xE6052034), /* PORT52CR */
- PORTCR(53, 0xE6052035), /* PORT53CR */
- PORTCR(54, 0xE6052036), /* PORT54CR */
- PORTCR(55, 0xE6052037), /* PORT55CR */
- PORTCR(56, 0xE6052038), /* PORT56CR */
- PORTCR(57, 0xE6052039), /* PORT57CR */
- PORTCR(58, 0xE605203A), /* PORT58CR */
- PORTCR(59, 0xE605203B), /* PORT59CR */
- PORTCR(60, 0xE605203C), /* PORT60CR */
- PORTCR(61, 0xE605203D), /* PORT61CR */
- PORTCR(62, 0xE605203E), /* PORT62CR */
- PORTCR(63, 0xE605203F), /* PORT63CR */
- PORTCR(64, 0xE6052040), /* PORT64CR */
- PORTCR(65, 0xE6052041), /* PORT65CR */
- PORTCR(66, 0xE6052042), /* PORT66CR */
- PORTCR(67, 0xE6052043), /* PORT67CR */
- PORTCR(68, 0xE6052044), /* PORT68CR */
- PORTCR(69, 0xE6052045), /* PORT69CR */
- PORTCR(70, 0xE6052046), /* PORT70CR */
- PORTCR(71, 0xE6052047), /* PORT71CR */
- PORTCR(72, 0xE6052048), /* PORT72CR */
- PORTCR(73, 0xE6052049), /* PORT73CR */
- PORTCR(74, 0xE605204A), /* PORT74CR */
- PORTCR(75, 0xE605204B), /* PORT75CR */
- PORTCR(76, 0xE605004C), /* PORT76CR */
- PORTCR(77, 0xE605004D), /* PORT77CR */
- PORTCR(78, 0xE605004E), /* PORT78CR */
- PORTCR(79, 0xE605004F), /* PORT79CR */
- PORTCR(80, 0xE6050050), /* PORT80CR */
- PORTCR(81, 0xE6050051), /* PORT81CR */
- PORTCR(82, 0xE6050052), /* PORT82CR */
- PORTCR(83, 0xE6050053), /* PORT83CR */
- PORTCR(84, 0xE6050054), /* PORT84CR */
- PORTCR(85, 0xE6050055), /* PORT85CR */
- PORTCR(86, 0xE6050056), /* PORT86CR */
- PORTCR(87, 0xE6050057), /* PORT87CR */
- PORTCR(88, 0xE6050058), /* PORT88CR */
- PORTCR(89, 0xE6050059), /* PORT89CR */
- PORTCR(90, 0xE605005A), /* PORT90CR */
- PORTCR(91, 0xE605005B), /* PORT91CR */
- PORTCR(92, 0xE605005C), /* PORT92CR */
- PORTCR(93, 0xE605005D), /* PORT93CR */
- PORTCR(94, 0xE605005E), /* PORT94CR */
- PORTCR(95, 0xE605005F), /* PORT95CR */
- PORTCR(96, 0xE6050060), /* PORT96CR */
- PORTCR(97, 0xE6050061), /* PORT97CR */
- PORTCR(98, 0xE6050062), /* PORT98CR */
- PORTCR(99, 0xE6050063), /* PORT99CR */
- PORTCR(100, 0xE6053064), /* PORT100CR */
- PORTCR(101, 0xE6053065), /* PORT101CR */
- PORTCR(102, 0xE6053066), /* PORT102CR */
- PORTCR(103, 0xE6053067), /* PORT103CR */
- PORTCR(104, 0xE6053068), /* PORT104CR */
- PORTCR(105, 0xE6053069), /* PORT105CR */
- PORTCR(106, 0xE605306A), /* PORT106CR */
- PORTCR(107, 0xE605306B), /* PORT107CR */
- PORTCR(108, 0xE605306C), /* PORT108CR */
- PORTCR(109, 0xE605306D), /* PORT109CR */
- PORTCR(110, 0xE605306E), /* PORT110CR */
- PORTCR(111, 0xE605306F), /* PORT111CR */
- PORTCR(112, 0xE6053070), /* PORT112CR */
- PORTCR(113, 0xE6053071), /* PORT113CR */
- PORTCR(114, 0xE6053072), /* PORT114CR */
- PORTCR(115, 0xE6053073), /* PORT115CR */
- PORTCR(116, 0xE6053074), /* PORT116CR */
- PORTCR(117, 0xE6053075), /* PORT117CR */
- PORTCR(118, 0xE6053076), /* PORT118CR */
- PORTCR(119, 0xE6053077), /* PORT119CR */
- PORTCR(120, 0xE6053078), /* PORT120CR */
- PORTCR(121, 0xE6050079), /* PORT121CR */
- PORTCR(122, 0xE605007A), /* PORT122CR */
- PORTCR(123, 0xE605007B), /* PORT123CR */
- PORTCR(124, 0xE605007C), /* PORT124CR */
- PORTCR(125, 0xE605007D), /* PORT125CR */
- PORTCR(126, 0xE605007E), /* PORT126CR */
- PORTCR(127, 0xE605007F), /* PORT127CR */
- PORTCR(128, 0xE6050080), /* PORT128CR */
- PORTCR(129, 0xE6050081), /* PORT129CR */
- PORTCR(130, 0xE6050082), /* PORT130CR */
- PORTCR(131, 0xE6050083), /* PORT131CR */
- PORTCR(132, 0xE6050084), /* PORT132CR */
- PORTCR(133, 0xE6050085), /* PORT133CR */
- PORTCR(134, 0xE6050086), /* PORT134CR */
- PORTCR(135, 0xE6050087), /* PORT135CR */
- PORTCR(136, 0xE6050088), /* PORT136CR */
- PORTCR(137, 0xE6050089), /* PORT137CR */
- PORTCR(138, 0xE605008A), /* PORT138CR */
- PORTCR(139, 0xE605008B), /* PORT139CR */
- PORTCR(140, 0xE605008C), /* PORT140CR */
- PORTCR(141, 0xE605008D), /* PORT141CR */
- PORTCR(142, 0xE605008E), /* PORT142CR */
- PORTCR(143, 0xE605008F), /* PORT143CR */
- PORTCR(144, 0xE6050090), /* PORT144CR */
- PORTCR(145, 0xE6050091), /* PORT145CR */
- PORTCR(146, 0xE6050092), /* PORT146CR */
- PORTCR(147, 0xE6050093), /* PORT147CR */
- PORTCR(148, 0xE6050094), /* PORT148CR */
- PORTCR(149, 0xE6050095), /* PORT149CR */
- PORTCR(150, 0xE6050096), /* PORT150CR */
- PORTCR(151, 0xE6050097), /* PORT151CR */
- PORTCR(152, 0xE6053098), /* PORT152CR */
- PORTCR(153, 0xE6053099), /* PORT153CR */
- PORTCR(154, 0xE605309A), /* PORT154CR */
- PORTCR(155, 0xE605309B), /* PORT155CR */
- PORTCR(156, 0xE605009C), /* PORT156CR */
- PORTCR(157, 0xE605009D), /* PORT157CR */
- PORTCR(158, 0xE605009E), /* PORT158CR */
- PORTCR(159, 0xE605009F), /* PORT159CR */
- PORTCR(160, 0xE60500A0), /* PORT160CR */
- PORTCR(161, 0xE60500A1), /* PORT161CR */
- PORTCR(162, 0xE60500A2), /* PORT162CR */
- PORTCR(163, 0xE60500A3), /* PORT163CR */
- PORTCR(164, 0xE60500A4), /* PORT164CR */
- PORTCR(165, 0xE60500A5), /* PORT165CR */
- PORTCR(166, 0xE60500A6), /* PORT166CR */
- PORTCR(167, 0xE60520A7), /* PORT167CR */
- PORTCR(168, 0xE60520A8), /* PORT168CR */
- PORTCR(169, 0xE60520A9), /* PORT169CR */
- PORTCR(170, 0xE60520AA), /* PORT170CR */
- PORTCR(171, 0xE60520AB), /* PORT171CR */
- PORTCR(172, 0xE60520AC), /* PORT172CR */
- PORTCR(173, 0xE60520AD), /* PORT173CR */
- PORTCR(174, 0xE60520AE), /* PORT174CR */
- PORTCR(175, 0xE60520AF), /* PORT175CR */
- PORTCR(176, 0xE60520B0), /* PORT176CR */
- PORTCR(177, 0xE60520B1), /* PORT177CR */
- PORTCR(178, 0xE60520B2), /* PORT178CR */
- PORTCR(179, 0xE60520B3), /* PORT179CR */
- PORTCR(180, 0xE60520B4), /* PORT180CR */
- PORTCR(181, 0xE60520B5), /* PORT181CR */
- PORTCR(182, 0xE60520B6), /* PORT182CR */
- PORTCR(183, 0xE60520B7), /* PORT183CR */
- PORTCR(184, 0xE60520B8), /* PORT184CR */
- PORTCR(185, 0xE60520B9), /* PORT185CR */
- PORTCR(186, 0xE60520BA), /* PORT186CR */
- PORTCR(187, 0xE60520BB), /* PORT187CR */
- PORTCR(188, 0xE60520BC), /* PORT188CR */
- PORTCR(189, 0xE60520BD), /* PORT189CR */
- PORTCR(190, 0xE60520BE), /* PORT190CR */
-
- { PINMUX_CFG_REG("MSEL1CR", 0xE605800C, 32, 1) {
- MSEL1CR_31_0, MSEL1CR_31_1,
- MSEL1CR_30_0, MSEL1CR_30_1,
- MSEL1CR_29_0, MSEL1CR_29_1,
- MSEL1CR_28_0, MSEL1CR_28_1,
- MSEL1CR_27_0, MSEL1CR_27_1,
- MSEL1CR_26_0, MSEL1CR_26_1,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- MSEL1CR_16_0, MSEL1CR_16_1,
- MSEL1CR_15_0, MSEL1CR_15_1,
- MSEL1CR_14_0, MSEL1CR_14_1,
- MSEL1CR_13_0, MSEL1CR_13_1,
- MSEL1CR_12_0, MSEL1CR_12_1,
- 0, 0, 0, 0,
- MSEL1CR_9_0, MSEL1CR_9_1,
- MSEL1CR_8_0, MSEL1CR_8_1,
- MSEL1CR_7_0, MSEL1CR_7_1,
- MSEL1CR_6_0, MSEL1CR_6_1,
- 0, 0,
- MSEL1CR_4_0, MSEL1CR_4_1,
- MSEL1CR_3_0, MSEL1CR_3_1,
- MSEL1CR_2_0, MSEL1CR_2_1,
- 0, 0,
- MSEL1CR_0_0, MSEL1CR_0_1,
- }
- },
- { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- MSEL3CR_27_0, MSEL3CR_27_1,
- MSEL3CR_26_0, MSEL3CR_26_1,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- MSEL3CR_21_0, MSEL3CR_21_1,
- MSEL3CR_20_0, MSEL3CR_20_1,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- MSEL3CR_15_0, MSEL3CR_15_1,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0,
- MSEL3CR_9_0, MSEL3CR_9_1,
- 0, 0, 0, 0,
- MSEL3CR_6_0, MSEL3CR_6_1,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- MSEL4CR_19_0, MSEL4CR_19_1,
- MSEL4CR_18_0, MSEL4CR_18_1,
- MSEL4CR_17_0, MSEL4CR_17_1,
- MSEL4CR_16_0, MSEL4CR_16_1,
- MSEL4CR_15_0, MSEL4CR_15_1,
- MSEL4CR_14_0, MSEL4CR_14_1,
- 0, 0, 0, 0,
- 0, 0,
- MSEL4CR_10_0, MSEL4CR_10_1,
- 0, 0, 0, 0,
- 0, 0,
- MSEL4CR_6_0, MSEL4CR_6_1,
- 0, 0,
- MSEL4CR_4_0, MSEL4CR_4_1,
- 0, 0, 0, 0,
- MSEL4CR_1_0, MSEL4CR_1_1,
- 0, 0,
- }
- },
- { },
-};
-
-static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
- PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
- PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
- PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
- PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
- PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_DATA_REG("PORTL127_096DR", 0xE605400C, 32) {
- PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
- PORT123_DATA, PORT122_DATA, PORT121_DATA, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTL159_128DR", 0xE6054010, 32) {
- PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
- 0, 0, 0, 0,
- PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
- PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
- PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
- PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
- PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
- PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTL191_160DR", 0xE6054014, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, PORT166_DATA, PORT165_DATA, PORT164_DATA,
- PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTD031_000DR", 0xE6055000, 32) {
- PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
- PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
- PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
- PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
- PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
- PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
- PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
- PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTD063_032DR", 0xE6055004, 32) {
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, PORT45_DATA, PORT44_DATA,
- PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
- PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
- PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTR063_032DR", 0xE6056004, 32) {
- PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
- PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
- PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
- PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
- PORT47_DATA, PORT46_DATA, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_DATA_REG("PORTR095_064DR", 0xE6056008, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
- PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
- PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTR191_160DR", 0xE6056014, 32) {
- 0, PORT190_DATA, PORT189_DATA, PORT188_DATA,
- PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
- PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
- PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
- PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
- PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
- PORT167_DATA, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_DATA_REG("PORTU127_096DR", 0xE605700C, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, PORT120_DATA,
- PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
- PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
- PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
- PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
- PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_DATA_REG("PORTU159_128DR", 0xE6057010, 32) {
- 0, 0, 0, 0,
- PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { },
-};
-
-#define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
-#define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
-static const struct pinmux_irq pinmux_irqs[] = {
- PINMUX_IRQ(EXT_IRQ16L(0), 6, 162),
- PINMUX_IRQ(EXT_IRQ16L(1), 12),
- PINMUX_IRQ(EXT_IRQ16L(2), 4, 5),
- PINMUX_IRQ(EXT_IRQ16L(3), 8, 16),
- PINMUX_IRQ(EXT_IRQ16L(4), 17, 163),
- PINMUX_IRQ(EXT_IRQ16L(5), 18),
- PINMUX_IRQ(EXT_IRQ16L(6), 39, 164),
- PINMUX_IRQ(EXT_IRQ16L(7), 40, 167),
- PINMUX_IRQ(EXT_IRQ16L(8), 41, 168),
- PINMUX_IRQ(EXT_IRQ16L(9), 42, 169),
- PINMUX_IRQ(EXT_IRQ16L(10), 65),
- PINMUX_IRQ(EXT_IRQ16L(11), 67),
- PINMUX_IRQ(EXT_IRQ16L(12), 80, 137),
- PINMUX_IRQ(EXT_IRQ16L(13), 81, 145),
- PINMUX_IRQ(EXT_IRQ16L(14), 82, 146),
- PINMUX_IRQ(EXT_IRQ16L(15), 83, 147),
- PINMUX_IRQ(EXT_IRQ16H(16), 84, 170),
- PINMUX_IRQ(EXT_IRQ16H(17), 85),
- PINMUX_IRQ(EXT_IRQ16H(18), 86),
- PINMUX_IRQ(EXT_IRQ16H(19), 87),
- PINMUX_IRQ(EXT_IRQ16H(20), 92),
- PINMUX_IRQ(EXT_IRQ16H(21), 93),
- PINMUX_IRQ(EXT_IRQ16H(22), 94),
- PINMUX_IRQ(EXT_IRQ16H(23), 95),
- PINMUX_IRQ(EXT_IRQ16H(24), 112),
- PINMUX_IRQ(EXT_IRQ16H(25), 119),
- PINMUX_IRQ(EXT_IRQ16H(26), 121, 172),
- PINMUX_IRQ(EXT_IRQ16H(27), 122, 180),
- PINMUX_IRQ(EXT_IRQ16H(28), 123, 181),
- PINMUX_IRQ(EXT_IRQ16H(29), 129, 182),
- PINMUX_IRQ(EXT_IRQ16H(30), 130, 183),
- PINMUX_IRQ(EXT_IRQ16H(31), 138, 184),
-};
-
-#define PORTnCR_PULMD_OFF (0 << 6)
-#define PORTnCR_PULMD_DOWN (2 << 6)
-#define PORTnCR_PULMD_UP (3 << 6)
-#define PORTnCR_PULMD_MASK (3 << 6)
-
-struct sh7372_portcr_group {
- unsigned int end_pin;
- unsigned int offset;
-};
-
-static const struct sh7372_portcr_group sh7372_portcr_offsets[] = {
- { 45, 0x1000 }, { 75, 0x2000 }, { 99, 0x0000 }, { 120, 0x3000 },
- { 151, 0x0000 }, { 155, 0x3000 }, { 166, 0x0000 }, { 190, 0x2000 },
-};
-
-static void __iomem *sh7372_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
-{
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(sh7372_portcr_offsets); ++i) {
- const struct sh7372_portcr_group *group - &sh7372_portcr_offsets[i];
-
- if (pin <= group->end_pin)
- return pfc->windows->virt + group->offset + pin;
- }
-
- return NULL;
-}
-
-static unsigned int sh7372_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
-{
- void __iomem *addr = sh7372_pinmux_portcr(pfc, pin);
- u32 value = ioread8(addr) & PORTnCR_PULMD_MASK;
-
- switch (value) {
- case PORTnCR_PULMD_UP:
- return PIN_CONFIG_BIAS_PULL_UP;
- case PORTnCR_PULMD_DOWN:
- return PIN_CONFIG_BIAS_PULL_DOWN;
- case PORTnCR_PULMD_OFF:
- default:
- return PIN_CONFIG_BIAS_DISABLE;
- }
-}
-
-static void sh7372_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
- unsigned int bias)
-{
- void __iomem *addr = sh7372_pinmux_portcr(pfc, pin);
- u32 value = ioread8(addr) & ~PORTnCR_PULMD_MASK;
-
- switch (bias) {
- case PIN_CONFIG_BIAS_PULL_UP:
- value |= PORTnCR_PULMD_UP;
- break;
- case PIN_CONFIG_BIAS_PULL_DOWN:
- value |= PORTnCR_PULMD_DOWN;
- break;
- }
-
- iowrite8(value, addr);
-}
-
-static const struct sh_pfc_soc_operations sh7372_pfc_ops = {
- .get_bias = sh7372_pinmux_get_bias,
- .set_bias = sh7372_pinmux_set_bias,
-};
-
-const struct sh_pfc_soc_info sh7372_pinmux_info = {
- .name = "sh7372_pfc",
- .ops = &sh7372_pfc_ops,
-
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .pins = pinmux_pins,
- .nr_pins = ARRAY_SIZE(pinmux_pins),
- .groups = pinmux_groups,
- .nr_groups = ARRAY_SIZE(pinmux_groups),
- .functions = pinmux_functions,
- .nr_functions = ARRAY_SIZE(pinmux_functions),
-
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-
- .gpio_irq = pinmux_irqs,
- .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
-};
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
@ 2015-01-21 4:54 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove sh7372 PFC support as part of the sh7372 and Mackerel
legacy code removal.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
drivers/pinctrl/sh-pfc/Kconfig | 5
drivers/pinctrl/sh-pfc/Makefile | 1
drivers/pinctrl/sh-pfc/core.c | 9
drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 -----------------------------------
4 files changed, 2660 deletions(-)
--- 0001/drivers/pinctrl/sh-pfc/Kconfig
+++ work/drivers/pinctrl/sh-pfc/Kconfig 2015-01-21 12:09:48.247562439 +0900
@@ -68,11 +68,6 @@ config PINCTRL_PFC_SH7269
depends on GPIOLIB
select PINCTRL_SH_PFC
-config PINCTRL_PFC_SH7372
- def_bool y
- depends on ARCH_SH7372
- select PINCTRL_SH_PFC
-
config PINCTRL_PFC_SH73A0
def_bool y
depends on ARCH_SH73A0
--- 0001/drivers/pinctrl/sh-pfc/Makefile
+++ work/drivers/pinctrl/sh-pfc/Makefile 2015-01-21 12:09:41.397562464 +0900
@@ -12,7 +12,6 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc
obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o
obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o
obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o
-obj-$(CONFIG_PINCTRL_PFC_SH7372) += pfc-sh7372.o
obj-$(CONFIG_PINCTRL_PFC_SH73A0) += pfc-sh73a0.o
obj-$(CONFIG_PINCTRL_PFC_SH7720) += pfc-sh7720.o
obj-$(CONFIG_PINCTRL_PFC_SH7722) += pfc-sh7722.o
--- 0001/drivers/pinctrl/sh-pfc/core.c
+++ work/drivers/pinctrl/sh-pfc/core.c 2015-01-21 12:09:18.157562547 +0900
@@ -475,12 +475,6 @@ static const struct of_device_id sh_pfc_
.data = &r8a7791_pinmux_info,
},
#endif
-#ifdef CONFIG_PINCTRL_PFC_SH7372
- {
- .compatible = "renesas,pfc-sh7372",
- .data = &sh7372_pinmux_info,
- },
-#endif
#ifdef CONFIG_PINCTRL_PFC_SH73A0
{
.compatible = "renesas,pfc-sh73a0",
@@ -606,9 +600,6 @@ static const struct platform_device_id s
#ifdef CONFIG_PINCTRL_PFC_SH7269
{ "pfc-sh7269", (kernel_ulong_t)&sh7269_pinmux_info },
#endif
-#ifdef CONFIG_PINCTRL_PFC_SH7372
- { "pfc-sh7372", (kernel_ulong_t)&sh7372_pinmux_info },
-#endif
#ifdef CONFIG_PINCTRL_PFC_SH73A0
{ "pfc-sh73a0", (kernel_ulong_t)&sh73a0_pinmux_info },
#endif
--- 0001/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ /dev/null 2015-01-13 15:44:39.280208949 +0900
@@ -1,2645 +0,0 @@
-/*
- * sh7372 processor support - PFC hardware block
- *
- * Copyright (C) 2010 Kuninori Morimoto <morimoto.kuninori@renesas.com>
- *
- * Based on
- * sh7367 processor support - PFC hardware block
- * Copyright (C) 2010 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/sh_intc.h>
-
-#include "core.h"
-#include "sh_pfc.h"
-
-#define CPU_ALL_PORT(fn, pfx, sfx) \
- PORT_10(0, fn, pfx, sfx), PORT_90(0, fn, pfx, sfx), \
- PORT_10(100, fn, pfx##10, sfx), PORT_10(110, fn, pfx##11, sfx), \
- PORT_10(120, fn, pfx##12, sfx), PORT_10(130, fn, pfx##13, sfx), \
- PORT_10(140, fn, pfx##14, sfx), PORT_10(150, fn, pfx##15, sfx), \
- PORT_10(160, fn, pfx##16, sfx), PORT_10(170, fn, pfx##17, sfx), \
- PORT_10(180, fn, pfx##18, sfx), PORT_1(190, fn, pfx##190, sfx)
-
-#define IRQC_PIN_MUX(irq, pin) \
-static const unsigned int intc_irq##irq##_pins[] = { \
- pin, \
-}; \
-static const unsigned int intc_irq##irq##_mux[] = { \
- IRQ##irq##_MARK, \
-}
-
-#define IRQC_PINS_MUX(irq, pin0, pin1) \
-static const unsigned int intc_irq##irq##_0_pins[] = { \
- pin0, \
-}; \
-static const unsigned int intc_irq##irq##_0_mux[] = { \
- IRQ##irq##_##pin0##_MARK, \
-}; \
-static const unsigned int intc_irq##irq##_1_pins[] = { \
- pin1, \
-}; \
-static const unsigned int intc_irq##irq##_1_mux[] = { \
- IRQ##irq##_##pin1##_MARK, \
-}
-
-enum {
- PINMUX_RESERVED = 0,
-
- /* PORT0_DATA -> PORT190_DATA */
- PINMUX_DATA_BEGIN,
- PORT_ALL(DATA),
- PINMUX_DATA_END,
-
- /* PORT0_IN -> PORT190_IN */
- PINMUX_INPUT_BEGIN,
- PORT_ALL(IN),
- PINMUX_INPUT_END,
-
- /* PORT0_OUT -> PORT190_OUT */
- PINMUX_OUTPUT_BEGIN,
- PORT_ALL(OUT),
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT190_FN_IN */
- PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT190_FN_OUT */
- PORT_ALL(FN0), /* PORT0_FN0 -> PORT190_FN0 */
- PORT_ALL(FN1), /* PORT0_FN1 -> PORT190_FN1 */
- PORT_ALL(FN2), /* PORT0_FN2 -> PORT190_FN2 */
- PORT_ALL(FN3), /* PORT0_FN3 -> PORT190_FN3 */
- PORT_ALL(FN4), /* PORT0_FN4 -> PORT190_FN4 */
- PORT_ALL(FN5), /* PORT0_FN5 -> PORT190_FN5 */
- PORT_ALL(FN6), /* PORT0_FN6 -> PORT190_FN6 */
- PORT_ALL(FN7), /* PORT0_FN7 -> PORT190_FN7 */
-
- MSEL1CR_31_0, MSEL1CR_31_1,
- MSEL1CR_30_0, MSEL1CR_30_1,
- MSEL1CR_29_0, MSEL1CR_29_1,
- MSEL1CR_28_0, MSEL1CR_28_1,
- MSEL1CR_27_0, MSEL1CR_27_1,
- MSEL1CR_26_0, MSEL1CR_26_1,
- MSEL1CR_16_0, MSEL1CR_16_1,
- MSEL1CR_15_0, MSEL1CR_15_1,
- MSEL1CR_14_0, MSEL1CR_14_1,
- MSEL1CR_13_0, MSEL1CR_13_1,
- MSEL1CR_12_0, MSEL1CR_12_1,
- MSEL1CR_9_0, MSEL1CR_9_1,
- MSEL1CR_8_0, MSEL1CR_8_1,
- MSEL1CR_7_0, MSEL1CR_7_1,
- MSEL1CR_6_0, MSEL1CR_6_1,
- MSEL1CR_4_0, MSEL1CR_4_1,
- MSEL1CR_3_0, MSEL1CR_3_1,
- MSEL1CR_2_0, MSEL1CR_2_1,
- MSEL1CR_0_0, MSEL1CR_0_1,
-
- MSEL3CR_27_0, MSEL3CR_27_1,
- MSEL3CR_26_0, MSEL3CR_26_1,
- MSEL3CR_21_0, MSEL3CR_21_1,
- MSEL3CR_20_0, MSEL3CR_20_1,
- MSEL3CR_15_0, MSEL3CR_15_1,
- MSEL3CR_9_0, MSEL3CR_9_1,
- MSEL3CR_6_0, MSEL3CR_6_1,
-
- MSEL4CR_19_0, MSEL4CR_19_1,
- MSEL4CR_18_0, MSEL4CR_18_1,
- MSEL4CR_17_0, MSEL4CR_17_1,
- MSEL4CR_16_0, MSEL4CR_16_1,
- MSEL4CR_15_0, MSEL4CR_15_1,
- MSEL4CR_14_0, MSEL4CR_14_1,
- MSEL4CR_10_0, MSEL4CR_10_1,
- MSEL4CR_6_0, MSEL4CR_6_1,
- MSEL4CR_4_0, MSEL4CR_4_1,
- MSEL4CR_1_0, MSEL4CR_1_1,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
-
- /* IRQ */
- IRQ0_6_MARK, IRQ0_162_MARK, IRQ1_MARK, IRQ2_4_MARK,
- IRQ2_5_MARK, IRQ3_8_MARK, IRQ3_16_MARK, IRQ4_17_MARK,
- IRQ4_163_MARK, IRQ5_MARK, IRQ6_39_MARK, IRQ6_164_MARK,
- IRQ7_40_MARK, IRQ7_167_MARK, IRQ8_41_MARK, IRQ8_168_MARK,
- IRQ9_42_MARK, IRQ9_169_MARK, IRQ10_MARK, IRQ11_MARK,
- IRQ12_80_MARK, IRQ12_137_MARK, IRQ13_81_MARK, IRQ13_145_MARK,
- IRQ14_82_MARK, IRQ14_146_MARK, IRQ15_83_MARK, IRQ15_147_MARK,
- IRQ16_84_MARK, IRQ16_170_MARK, IRQ17_MARK, IRQ18_MARK,
- IRQ19_MARK, IRQ20_MARK, IRQ21_MARK, IRQ22_MARK,
- IRQ23_MARK, IRQ24_MARK, IRQ25_MARK, IRQ26_121_MARK,
- IRQ26_172_MARK, IRQ27_122_MARK, IRQ27_180_MARK, IRQ28_123_MARK,
- IRQ28_181_MARK, IRQ29_129_MARK, IRQ29_182_MARK, IRQ30_130_MARK,
- IRQ30_183_MARK, IRQ31_138_MARK, IRQ31_184_MARK,
-
- /* MSIOF0 */
- MSIOF0_TSYNC_MARK, MSIOF0_TSCK_MARK, MSIOF0_RXD_MARK,
- MSIOF0_RSCK_MARK, MSIOF0_RSYNC_MARK, MSIOF0_MCK0_MARK,
- MSIOF0_MCK1_MARK, MSIOF0_SS1_MARK, MSIOF0_SS2_MARK,
- MSIOF0_TXD_MARK,
-
- /* MSIOF1 */
- MSIOF1_TSCK_39_MARK, MSIOF1_TSYNC_40_MARK,
- MSIOF1_TSCK_88_MARK, MSIOF1_TSYNC_89_MARK,
- MSIOF1_TXD_41_MARK, MSIOF1_RXD_42_MARK,
- MSIOF1_TXD_90_MARK, MSIOF1_RXD_91_MARK,
- MSIOF1_SS1_43_MARK, MSIOF1_SS2_44_MARK,
- MSIOF1_SS1_92_MARK, MSIOF1_SS2_93_MARK,
- MSIOF1_RSCK_MARK, MSIOF1_RSYNC_MARK,
- MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
-
- /* MSIOF2 */
- MSIOF2_RSCK_MARK, MSIOF2_RSYNC_MARK, MSIOF2_MCK0_MARK,
- MSIOF2_MCK1_MARK, MSIOF2_SS1_MARK, MSIOF2_SS2_MARK,
- MSIOF2_TSYNC_MARK, MSIOF2_TSCK_MARK, MSIOF2_RXD_MARK,
- MSIOF2_TXD_MARK,
-
- /* BBIF1 */
- BBIF1_RXD_MARK, BBIF1_TSYNC_MARK, BBIF1_TSCK_MARK,
- BBIF1_TXD_MARK, BBIF1_RSCK_MARK, BBIF1_RSYNC_MARK,
- BBIF1_FLOW_MARK, BB_RX_FLOW_N_MARK,
-
- /* BBIF2 */
- BBIF2_TSCK1_MARK, BBIF2_TSYNC1_MARK,
- BBIF2_TXD1_MARK, BBIF2_RXD_MARK,
-
- /* FSI */
- FSIACK_MARK, FSIBCK_MARK, FSIAILR_MARK, FSIAIBT_MARK,
- FSIAISLD_MARK, FSIAOMC_MARK, FSIAOLR_MARK, FSIAOBT_MARK,
- FSIAOSLD_MARK, FSIASPDIF_11_MARK, FSIASPDIF_15_MARK,
-
- /* FMSI */
- FMSOCK_MARK, FMSOOLR_MARK, FMSIOLR_MARK, FMSOOBT_MARK,
- FMSIOBT_MARK, FMSOSLD_MARK, FMSOILR_MARK, FMSIILR_MARK,
- FMSOIBT_MARK, FMSIIBT_MARK, FMSISLD_MARK, FMSICK_MARK,
-
- /* SCIFA0 */
- SCIFA0_TXD_MARK, SCIFA0_RXD_MARK, SCIFA0_SCK_MARK,
- SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
-
- /* SCIFA1 */
- SCIFA1_TXD_MARK, SCIFA1_RXD_MARK, SCIFA1_SCK_MARK,
- SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
-
- /* SCIFA2 */
- SCIFA2_CTS1_MARK, SCIFA2_RTS1_MARK, SCIFA2_TXD1_MARK,
- SCIFA2_RXD1_MARK, SCIFA2_SCK1_MARK,
-
- /* SCIFA3 */
- SCIFA3_CTS_43_MARK, SCIFA3_CTS_140_MARK, SCIFA3_RTS_44_MARK,
- SCIFA3_RTS_141_MARK, SCIFA3_SCK_MARK, SCIFA3_TXD_MARK,
- SCIFA3_RXD_MARK,
-
- /* SCIFA4 */
- SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
-
- /* SCIFA5 */
- SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
-
- /* SCIFB */
- SCIFB_SCK_MARK, SCIFB_RTS_MARK, SCIFB_CTS_MARK,
- SCIFB_TXD_MARK, SCIFB_RXD_MARK,
-
- /* CEU */
- VIO_HD_MARK, VIO_CKO1_MARK, VIO_CKO2_MARK, VIO_VD_MARK,
- VIO_CLK_MARK, VIO_FIELD_MARK, VIO_CKO_MARK,
- VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
- VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
- VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
- VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
-
- /* USB0 */
- IDIN_0_MARK, EXTLP_0_MARK, OVCN2_0_MARK, PWEN_0_MARK,
- OVCN_0_MARK, VBUS0_0_MARK,
-
- /* USB1 */
- IDIN_1_18_MARK, IDIN_1_113_MARK,
- PWEN_1_115_MARK, PWEN_1_138_MARK,
- OVCN_1_114_MARK, OVCN_1_162_MARK,
- EXTLP_1_MARK, OVCN2_1_MARK,
- VBUS0_1_MARK,
-
- /* GPIO */
- GPI0_MARK, GPI1_MARK, GPO0_MARK, GPO1_MARK,
-
- /* BSC */
- BS_MARK, WE1_MARK,
- CKO_MARK, WAIT_MARK, RDWR_MARK,
-
- A0_MARK, A1_MARK, A2_MARK, A3_MARK,
- A6_MARK, A7_MARK, A8_MARK, A9_MARK,
- A10_MARK, A11_MARK, A12_MARK, A13_MARK,
- A14_MARK, A15_MARK, A16_MARK, A17_MARK,
- A18_MARK, A19_MARK, A20_MARK, A21_MARK,
- A22_MARK, A23_MARK, A24_MARK, A25_MARK,
- A26_MARK,
-
- CS0_MARK, CS2_MARK, CS4_MARK,
- CS5A_MARK, CS5B_MARK, CS6A_MARK,
-
- /* BSC/FLCTL */
- RD_FSC_MARK, WE0_FWE_MARK, A4_FOE_MARK, A5_FCDE_MARK,
- D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
- D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
- D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
- D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-
- /* MMCIF(1) */
- MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
- MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
- MMCCMD0_MARK, MMCCLK0_MARK,
-
- /* MMCIF(2) */
- MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
- MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
- MMCCLK1_MARK, MMCCMD1_MARK,
-
- /* SPU2 */
- VINT_I_MARK,
-
- /* FLCTL */
- FCE1_MARK, FCE0_MARK, FRB_MARK,
-
- /* HSI */
- GP_RX_FLAG_MARK, GP_RX_DATA_MARK, GP_TX_READY_MARK,
- GP_RX_WAKE_MARK, MP_TX_FLAG_MARK, MP_TX_DATA_MARK,
- MP_RX_READY_MARK, MP_TX_WAKE_MARK,
-
- /* MFI */
- MFIv6_MARK,
- MFIv4_MARK,
-
- MEMC_CS0_MARK, MEMC_BUSCLK_MEMC_A0_MARK,
- MEMC_CS1_MEMC_A1_MARK, MEMC_ADV_MEMC_DREQ0_MARK,
- MEMC_WAIT_MEMC_DREQ1_MARK, MEMC_NOE_MARK,
- MEMC_NWE_MARK, MEMC_INT_MARK,
-
- MEMC_AD0_MARK, MEMC_AD1_MARK, MEMC_AD2_MARK,
- MEMC_AD3_MARK, MEMC_AD4_MARK, MEMC_AD5_MARK,
- MEMC_AD6_MARK, MEMC_AD7_MARK, MEMC_AD8_MARK,
- MEMC_AD9_MARK, MEMC_AD10_MARK, MEMC_AD11_MARK,
- MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK,
- MEMC_AD15_MARK,
-
- /* SIM */
- SIM_RST_MARK, SIM_CLK_MARK, SIM_D_MARK,
-
- /* TPU */
- TPU0TO0_MARK, TPU0TO1_MARK,
- TPU0TO2_93_MARK, TPU0TO2_99_MARK,
- TPU0TO3_MARK,
-
- /* I2C2 */
- I2C_SCL2_MARK, I2C_SDA2_MARK,
-
- /* I2C3(1) */
- I2C_SCL3_MARK, I2C_SDA3_MARK,
-
- /* I2C3(2) */
- I2C_SCL3S_MARK, I2C_SDA3S_MARK,
-
- /* I2C4(2) */
- I2C_SCL4_MARK, I2C_SDA4_MARK,
-
- /* I2C4(2) */
- I2C_SCL4S_MARK, I2C_SDA4S_MARK,
-
- /* KEYSC */
- KEYOUT0_MARK, KEYIN0_121_MARK, KEYIN0_136_MARK,
- KEYOUT1_MARK, KEYIN1_122_MARK, KEYIN1_135_MARK,
- KEYOUT2_MARK, KEYIN2_123_MARK, KEYIN2_134_MARK,
- KEYOUT3_MARK, KEYIN3_124_MARK, KEYIN3_133_MARK,
- KEYOUT4_MARK, KEYIN4_MARK,
- KEYOUT5_MARK, KEYIN5_MARK,
- KEYOUT6_MARK, KEYIN6_MARK,
- KEYOUT7_MARK, KEYIN7_MARK,
-
- /* LCDC */
- LCDC0_SELECT_MARK,
- LCDC1_SELECT_MARK,
- LCDHSYN_MARK, LCDCS_MARK, LCDVSYN_MARK, LCDDCK_MARK,
- LCDWR_MARK, LCDRD_MARK, LCDDISP_MARK, LCDRS_MARK,
- LCDLCLK_MARK, LCDDON_MARK,
-
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
- LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
- LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK,
- LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK,
-
- /* IRDA */
- IRDA_OUT_MARK, IRDA_IN_MARK, IRDA_FIRSEL_MARK,
- IROUT_139_MARK, IROUT_140_MARK,
-
- /* TSIF1 */
- TS0_1SELECT_MARK,
- TS0_2SELECT_MARK,
- TS1_1SELECT_MARK,
- TS1_2SELECT_MARK,
-
- TS_SPSYNC1_MARK, TS_SDAT1_MARK,
- TS_SDEN1_MARK, TS_SCK1_MARK,
-
- /* TSIF2 */
- TS_SPSYNC2_MARK, TS_SDAT2_MARK,
- TS_SDEN2_MARK, TS_SCK2_MARK,
-
- /* HDMI */
- HDMI_HPD_MARK, HDMI_CEC_MARK,
-
- /* SDHI0 */
- SDHICLK0_MARK, SDHICD0_MARK,
- SDHICMD0_MARK, SDHIWP0_MARK,
- SDHID0_0_MARK, SDHID0_1_MARK,
- SDHID0_2_MARK, SDHID0_3_MARK,
-
- /* SDHI1 */
- SDHICLK1_MARK, SDHICMD1_MARK, SDHID1_0_MARK,
- SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
-
- /* SDHI2 */
- SDHICLK2_MARK, SDHICMD2_MARK, SDHID2_0_MARK,
- SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
-
- /* SDENC */
- SDENC_CPG_MARK,
- SDENC_DV_CLKI_MARK,
-
- PINMUX_MARK_END,
-};
-
-static const u16 pinmux_data[] = {
- PINMUX_DATA_ALL(),
-
- /* IRQ */
- PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
- PINMUX_DATA(IRQ0_162_MARK, PORT162_FN0, MSEL1CR_0_1),
- PINMUX_DATA(IRQ1_MARK, PORT12_FN0),
- PINMUX_DATA(IRQ2_4_MARK, PORT4_FN0, MSEL1CR_2_0),
- PINMUX_DATA(IRQ2_5_MARK, PORT5_FN0, MSEL1CR_2_1),
- PINMUX_DATA(IRQ3_8_MARK, PORT8_FN0, MSEL1CR_3_0),
- PINMUX_DATA(IRQ3_16_MARK, PORT16_FN0, MSEL1CR_3_1),
- PINMUX_DATA(IRQ4_17_MARK, PORT17_FN0, MSEL1CR_4_0),
- PINMUX_DATA(IRQ4_163_MARK, PORT163_FN0, MSEL1CR_4_1),
- PINMUX_DATA(IRQ5_MARK, PORT18_FN0),
- PINMUX_DATA(IRQ6_39_MARK, PORT39_FN0, MSEL1CR_6_0),
- PINMUX_DATA(IRQ6_164_MARK, PORT164_FN0, MSEL1CR_6_1),
- PINMUX_DATA(IRQ7_40_MARK, PORT40_FN0, MSEL1CR_7_1),
- PINMUX_DATA(IRQ7_167_MARK, PORT167_FN0, MSEL1CR_7_0),
- PINMUX_DATA(IRQ8_41_MARK, PORT41_FN0, MSEL1CR_8_1),
- PINMUX_DATA(IRQ8_168_MARK, PORT168_FN0, MSEL1CR_8_0),
- PINMUX_DATA(IRQ9_42_MARK, PORT42_FN0, MSEL1CR_9_0),
- PINMUX_DATA(IRQ9_169_MARK, PORT169_FN0, MSEL1CR_9_1),
- PINMUX_DATA(IRQ10_MARK, PORT65_FN0, MSEL1CR_9_1),
- PINMUX_DATA(IRQ11_MARK, PORT67_FN0),
- PINMUX_DATA(IRQ12_80_MARK, PORT80_FN0, MSEL1CR_12_0),
- PINMUX_DATA(IRQ12_137_MARK, PORT137_FN0, MSEL1CR_12_1),
- PINMUX_DATA(IRQ13_81_MARK, PORT81_FN0, MSEL1CR_13_0),
- PINMUX_DATA(IRQ13_145_MARK, PORT145_FN0, MSEL1CR_13_1),
- PINMUX_DATA(IRQ14_82_MARK, PORT82_FN0, MSEL1CR_14_0),
- PINMUX_DATA(IRQ14_146_MARK, PORT146_FN0, MSEL1CR_14_1),
- PINMUX_DATA(IRQ15_83_MARK, PORT83_FN0, MSEL1CR_15_0),
- PINMUX_DATA(IRQ15_147_MARK, PORT147_FN0, MSEL1CR_15_1),
- PINMUX_DATA(IRQ16_84_MARK, PORT84_FN0, MSEL1CR_16_0),
- PINMUX_DATA(IRQ16_170_MARK, PORT170_FN0, MSEL1CR_16_1),
- PINMUX_DATA(IRQ17_MARK, PORT85_FN0),
- PINMUX_DATA(IRQ18_MARK, PORT86_FN0),
- PINMUX_DATA(IRQ19_MARK, PORT87_FN0),
- PINMUX_DATA(IRQ20_MARK, PORT92_FN0),
- PINMUX_DATA(IRQ21_MARK, PORT93_FN0),
- PINMUX_DATA(IRQ22_MARK, PORT94_FN0),
- PINMUX_DATA(IRQ23_MARK, PORT95_FN0),
- PINMUX_DATA(IRQ24_MARK, PORT112_FN0),
- PINMUX_DATA(IRQ25_MARK, PORT119_FN0),
- PINMUX_DATA(IRQ26_121_MARK, PORT121_FN0, MSEL1CR_26_1),
- PINMUX_DATA(IRQ26_172_MARK, PORT172_FN0, MSEL1CR_26_0),
- PINMUX_DATA(IRQ27_122_MARK, PORT122_FN0, MSEL1CR_27_1),
- PINMUX_DATA(IRQ27_180_MARK, PORT180_FN0, MSEL1CR_27_0),
- PINMUX_DATA(IRQ28_123_MARK, PORT123_FN0, MSEL1CR_28_1),
- PINMUX_DATA(IRQ28_181_MARK, PORT181_FN0, MSEL1CR_28_0),
- PINMUX_DATA(IRQ29_129_MARK, PORT129_FN0, MSEL1CR_29_1),
- PINMUX_DATA(IRQ29_182_MARK, PORT182_FN0, MSEL1CR_29_0),
- PINMUX_DATA(IRQ30_130_MARK, PORT130_FN0, MSEL1CR_30_1),
- PINMUX_DATA(IRQ30_183_MARK, PORT183_FN0, MSEL1CR_30_0),
- PINMUX_DATA(IRQ31_138_MARK, PORT138_FN0, MSEL1CR_31_1),
- PINMUX_DATA(IRQ31_184_MARK, PORT184_FN0, MSEL1CR_31_0),
-
- /* Function 1 */
- PINMUX_DATA(BBIF2_TSCK1_MARK, PORT0_FN1),
- PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT1_FN1),
- PINMUX_DATA(BBIF2_TXD1_MARK, PORT2_FN1),
- PINMUX_DATA(BBIF2_RXD_MARK, PORT3_FN1),
- PINMUX_DATA(FSIACK_MARK, PORT4_FN1),
- PINMUX_DATA(FSIAILR_MARK, PORT5_FN1),
- PINMUX_DATA(FSIAIBT_MARK, PORT6_FN1),
- PINMUX_DATA(FSIAISLD_MARK, PORT7_FN1),
- PINMUX_DATA(FSIAOMC_MARK, PORT8_FN1),
- PINMUX_DATA(FSIAOLR_MARK, PORT9_FN1),
- PINMUX_DATA(FSIAOBT_MARK, PORT10_FN1),
- PINMUX_DATA(FSIAOSLD_MARK, PORT11_FN1),
- PINMUX_DATA(FMSOCK_MARK, PORT12_FN1),
- PINMUX_DATA(FMSOOLR_MARK, PORT13_FN1),
- PINMUX_DATA(FMSOOBT_MARK, PORT14_FN1),
- PINMUX_DATA(FMSOSLD_MARK, PORT15_FN1),
- PINMUX_DATA(FMSOILR_MARK, PORT16_FN1),
- PINMUX_DATA(FMSOIBT_MARK, PORT17_FN1),
- PINMUX_DATA(FMSISLD_MARK, PORT18_FN1),
- PINMUX_DATA(A0_MARK, PORT19_FN1),
- PINMUX_DATA(A1_MARK, PORT20_FN1),
- PINMUX_DATA(A2_MARK, PORT21_FN1),
- PINMUX_DATA(A3_MARK, PORT22_FN1),
- PINMUX_DATA(A4_FOE_MARK, PORT23_FN1),
- PINMUX_DATA(A5_FCDE_MARK, PORT24_FN1),
- PINMUX_DATA(A6_MARK, PORT25_FN1),
- PINMUX_DATA(A7_MARK, PORT26_FN1),
- PINMUX_DATA(A8_MARK, PORT27_FN1),
- PINMUX_DATA(A9_MARK, PORT28_FN1),
- PINMUX_DATA(A10_MARK, PORT29_FN1),
- PINMUX_DATA(A11_MARK, PORT30_FN1),
- PINMUX_DATA(A12_MARK, PORT31_FN1),
- PINMUX_DATA(A13_MARK, PORT32_FN1),
- PINMUX_DATA(A14_MARK, PORT33_FN1),
- PINMUX_DATA(A15_MARK, PORT34_FN1),
- PINMUX_DATA(A16_MARK, PORT35_FN1),
- PINMUX_DATA(A17_MARK, PORT36_FN1),
- PINMUX_DATA(A18_MARK, PORT37_FN1),
- PINMUX_DATA(A19_MARK, PORT38_FN1),
- PINMUX_DATA(A20_MARK, PORT39_FN1),
- PINMUX_DATA(A21_MARK, PORT40_FN1),
- PINMUX_DATA(A22_MARK, PORT41_FN1),
- PINMUX_DATA(A23_MARK, PORT42_FN1),
- PINMUX_DATA(A24_MARK, PORT43_FN1),
- PINMUX_DATA(A25_MARK, PORT44_FN1),
- PINMUX_DATA(A26_MARK, PORT45_FN1),
- PINMUX_DATA(D0_NAF0_MARK, PORT46_FN1),
- PINMUX_DATA(D1_NAF1_MARK, PORT47_FN1),
- PINMUX_DATA(D2_NAF2_MARK, PORT48_FN1),
- PINMUX_DATA(D3_NAF3_MARK, PORT49_FN1),
- PINMUX_DATA(D4_NAF4_MARK, PORT50_FN1),
- PINMUX_DATA(D5_NAF5_MARK, PORT51_FN1),
- PINMUX_DATA(D6_NAF6_MARK, PORT52_FN1),
- PINMUX_DATA(D7_NAF7_MARK, PORT53_FN1),
- PINMUX_DATA(D8_NAF8_MARK, PORT54_FN1),
- PINMUX_DATA(D9_NAF9_MARK, PORT55_FN1),
- PINMUX_DATA(D10_NAF10_MARK, PORT56_FN1),
- PINMUX_DATA(D11_NAF11_MARK, PORT57_FN1),
- PINMUX_DATA(D12_NAF12_MARK, PORT58_FN1),
- PINMUX_DATA(D13_NAF13_MARK, PORT59_FN1),
- PINMUX_DATA(D14_NAF14_MARK, PORT60_FN1),
- PINMUX_DATA(D15_NAF15_MARK, PORT61_FN1),
- PINMUX_DATA(CS0_MARK, PORT62_FN1),
- PINMUX_DATA(CS2_MARK, PORT63_FN1),
- PINMUX_DATA(CS4_MARK, PORT64_FN1),
- PINMUX_DATA(CS5A_MARK, PORT65_FN1),
- PINMUX_DATA(CS5B_MARK, PORT66_FN1),
- PINMUX_DATA(CS6A_MARK, PORT67_FN1),
- PINMUX_DATA(FCE0_MARK, PORT68_FN1),
- PINMUX_DATA(RD_FSC_MARK, PORT69_FN1),
- PINMUX_DATA(WE0_FWE_MARK, PORT70_FN1),
- PINMUX_DATA(WE1_MARK, PORT71_FN1),
- PINMUX_DATA(CKO_MARK, PORT72_FN1),
- PINMUX_DATA(FRB_MARK, PORT73_FN1),
- PINMUX_DATA(WAIT_MARK, PORT74_FN1),
- PINMUX_DATA(RDWR_MARK, PORT75_FN1),
- PINMUX_DATA(MEMC_AD0_MARK, PORT76_FN1),
- PINMUX_DATA(MEMC_AD1_MARK, PORT77_FN1),
- PINMUX_DATA(MEMC_AD2_MARK, PORT78_FN1),
- PINMUX_DATA(MEMC_AD3_MARK, PORT79_FN1),
- PINMUX_DATA(MEMC_AD4_MARK, PORT80_FN1),
- PINMUX_DATA(MEMC_AD5_MARK, PORT81_FN1),
- PINMUX_DATA(MEMC_AD6_MARK, PORT82_FN1),
- PINMUX_DATA(MEMC_AD7_MARK, PORT83_FN1),
- PINMUX_DATA(MEMC_AD8_MARK, PORT84_FN1),
- PINMUX_DATA(MEMC_AD9_MARK, PORT85_FN1),
- PINMUX_DATA(MEMC_AD10_MARK, PORT86_FN1),
- PINMUX_DATA(MEMC_AD11_MARK, PORT87_FN1),
- PINMUX_DATA(MEMC_AD12_MARK, PORT88_FN1),
- PINMUX_DATA(MEMC_AD13_MARK, PORT89_FN1),
- PINMUX_DATA(MEMC_AD14_MARK, PORT90_FN1),
- PINMUX_DATA(MEMC_AD15_MARK, PORT91_FN1),
- PINMUX_DATA(MEMC_CS0_MARK, PORT92_FN1),
- PINMUX_DATA(MEMC_BUSCLK_MEMC_A0_MARK, PORT93_FN1),
- PINMUX_DATA(MEMC_CS1_MEMC_A1_MARK, PORT94_FN1),
- PINMUX_DATA(MEMC_ADV_MEMC_DREQ0_MARK, PORT95_FN1),
- PINMUX_DATA(MEMC_WAIT_MEMC_DREQ1_MARK, PORT96_FN1),
- PINMUX_DATA(MEMC_NOE_MARK, PORT97_FN1),
- PINMUX_DATA(MEMC_NWE_MARK, PORT98_FN1),
- PINMUX_DATA(MEMC_INT_MARK, PORT99_FN1),
- PINMUX_DATA(VIO_VD_MARK, PORT100_FN1),
- PINMUX_DATA(VIO_HD_MARK, PORT101_FN1),
- PINMUX_DATA(VIO_D0_MARK, PORT102_FN1),
- PINMUX_DATA(VIO_D1_MARK, PORT103_FN1),
- PINMUX_DATA(VIO_D2_MARK, PORT104_FN1),
- PINMUX_DATA(VIO_D3_MARK, PORT105_FN1),
- PINMUX_DATA(VIO_D4_MARK, PORT106_FN1),
- PINMUX_DATA(VIO_D5_MARK, PORT107_FN1),
- PINMUX_DATA(VIO_D6_MARK, PORT108_FN1),
- PINMUX_DATA(VIO_D7_MARK, PORT109_FN1),
- PINMUX_DATA(VIO_D8_MARK, PORT110_FN1),
- PINMUX_DATA(VIO_D9_MARK, PORT111_FN1),
- PINMUX_DATA(VIO_D10_MARK, PORT112_FN1),
- PINMUX_DATA(VIO_D11_MARK, PORT113_FN1),
- PINMUX_DATA(VIO_D12_MARK, PORT114_FN1),
- PINMUX_DATA(VIO_D13_MARK, PORT115_FN1),
- PINMUX_DATA(VIO_D14_MARK, PORT116_FN1),
- PINMUX_DATA(VIO_D15_MARK, PORT117_FN1),
- PINMUX_DATA(VIO_CLK_MARK, PORT118_FN1),
- PINMUX_DATA(VIO_FIELD_MARK, PORT119_FN1),
- PINMUX_DATA(VIO_CKO_MARK, PORT120_FN1),
- PINMUX_DATA(LCDD0_MARK, PORT121_FN1),
- PINMUX_DATA(LCDD1_MARK, PORT122_FN1),
- PINMUX_DATA(LCDD2_MARK, PORT123_FN1),
- PINMUX_DATA(LCDD3_MARK, PORT124_FN1),
- PINMUX_DATA(LCDD4_MARK, PORT125_FN1),
- PINMUX_DATA(LCDD5_MARK, PORT126_FN1),
- PINMUX_DATA(LCDD6_MARK, PORT127_FN1),
- PINMUX_DATA(LCDD7_MARK, PORT128_FN1),
- PINMUX_DATA(LCDD8_MARK, PORT129_FN1),
- PINMUX_DATA(LCDD9_MARK, PORT130_FN1),
- PINMUX_DATA(LCDD10_MARK, PORT131_FN1),
- PINMUX_DATA(LCDD11_MARK, PORT132_FN1),
- PINMUX_DATA(LCDD12_MARK, PORT133_FN1),
- PINMUX_DATA(LCDD13_MARK, PORT134_FN1),
- PINMUX_DATA(LCDD14_MARK, PORT135_FN1),
- PINMUX_DATA(LCDD15_MARK, PORT136_FN1),
- PINMUX_DATA(LCDD16_MARK, PORT137_FN1),
- PINMUX_DATA(LCDD17_MARK, PORT138_FN1),
- PINMUX_DATA(LCDD18_MARK, PORT139_FN1),
- PINMUX_DATA(LCDD19_MARK, PORT140_FN1),
- PINMUX_DATA(LCDD20_MARK, PORT141_FN1),
- PINMUX_DATA(LCDD21_MARK, PORT142_FN1),
- PINMUX_DATA(LCDD22_MARK, PORT143_FN1),
- PINMUX_DATA(LCDD23_MARK, PORT144_FN1),
- PINMUX_DATA(LCDHSYN_MARK, PORT145_FN1),
- PINMUX_DATA(LCDVSYN_MARK, PORT146_FN1),
- PINMUX_DATA(LCDDCK_MARK, PORT147_FN1),
- PINMUX_DATA(LCDRD_MARK, PORT148_FN1),
- PINMUX_DATA(LCDDISP_MARK, PORT149_FN1),
- PINMUX_DATA(LCDLCLK_MARK, PORT150_FN1),
- PINMUX_DATA(LCDDON_MARK, PORT151_FN1),
- PINMUX_DATA(SCIFA0_TXD_MARK, PORT152_FN1),
- PINMUX_DATA(SCIFA0_RXD_MARK, PORT153_FN1),
- PINMUX_DATA(SCIFA1_TXD_MARK, PORT154_FN1),
- PINMUX_DATA(SCIFA1_RXD_MARK, PORT155_FN1),
- PINMUX_DATA(TS_SPSYNC1_MARK, PORT156_FN1),
- PINMUX_DATA(TS_SDAT1_MARK, PORT157_FN1),
- PINMUX_DATA(TS_SDEN1_MARK, PORT158_FN1),
- PINMUX_DATA(TS_SCK1_MARK, PORT159_FN1),
- PINMUX_DATA(TPU0TO0_MARK, PORT160_FN1),
- PINMUX_DATA(TPU0TO1_MARK, PORT161_FN1),
- PINMUX_DATA(SCIFB_SCK_MARK, PORT162_FN1),
- PINMUX_DATA(SCIFB_RTS_MARK, PORT163_FN1),
- PINMUX_DATA(SCIFB_CTS_MARK, PORT164_FN1),
- PINMUX_DATA(SCIFB_TXD_MARK, PORT165_FN1),
- PINMUX_DATA(SCIFB_RXD_MARK, PORT166_FN1),
- PINMUX_DATA(VBUS0_0_MARK, PORT167_FN1),
- PINMUX_DATA(VBUS0_1_MARK, PORT168_FN1),
- PINMUX_DATA(HDMI_HPD_MARK, PORT169_FN1),
- PINMUX_DATA(HDMI_CEC_MARK, PORT170_FN1),
- PINMUX_DATA(SDHICLK0_MARK, PORT171_FN1),
- PINMUX_DATA(SDHICD0_MARK, PORT172_FN1),
- PINMUX_DATA(SDHID0_0_MARK, PORT173_FN1),
- PINMUX_DATA(SDHID0_1_MARK, PORT174_FN1),
- PINMUX_DATA(SDHID0_2_MARK, PORT175_FN1),
- PINMUX_DATA(SDHID0_3_MARK, PORT176_FN1),
- PINMUX_DATA(SDHICMD0_MARK, PORT177_FN1),
- PINMUX_DATA(SDHIWP0_MARK, PORT178_FN1),
- PINMUX_DATA(SDHICLK1_MARK, PORT179_FN1),
- PINMUX_DATA(SDHID1_0_MARK, PORT180_FN1),
- PINMUX_DATA(SDHID1_1_MARK, PORT181_FN1),
- PINMUX_DATA(SDHID1_2_MARK, PORT182_FN1),
- PINMUX_DATA(SDHID1_3_MARK, PORT183_FN1),
- PINMUX_DATA(SDHICMD1_MARK, PORT184_FN1),
- PINMUX_DATA(SDHICLK2_MARK, PORT185_FN1),
- PINMUX_DATA(SDHID2_0_MARK, PORT186_FN1),
- PINMUX_DATA(SDHID2_1_MARK, PORT187_FN1),
- PINMUX_DATA(SDHID2_2_MARK, PORT188_FN1),
- PINMUX_DATA(SDHID2_3_MARK, PORT189_FN1),
- PINMUX_DATA(SDHICMD2_MARK, PORT190_FN1),
-
- /* Function 2 */
- PINMUX_DATA(FSIBCK_MARK, PORT4_FN2),
- PINMUX_DATA(SCIFA4_RXD_MARK, PORT5_FN2),
- PINMUX_DATA(SCIFA4_TXD_MARK, PORT6_FN2),
- PINMUX_DATA(SCIFA5_RXD_MARK, PORT8_FN2),
- PINMUX_DATA(FSIASPDIF_11_MARK, PORT11_FN2),
- PINMUX_DATA(SCIFA5_TXD_MARK, PORT12_FN2),
- PINMUX_DATA(FMSIOLR_MARK, PORT13_FN2),
- PINMUX_DATA(FMSIOBT_MARK, PORT14_FN2),
- PINMUX_DATA(FSIASPDIF_15_MARK, PORT15_FN2),
- PINMUX_DATA(FMSIILR_MARK, PORT16_FN2),
- PINMUX_DATA(FMSIIBT_MARK, PORT17_FN2),
- PINMUX_DATA(BS_MARK, PORT19_FN2),
- PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT36_FN2),
- PINMUX_DATA(MSIOF0_TSCK_MARK, PORT37_FN2),
- PINMUX_DATA(MSIOF0_RXD_MARK, PORT38_FN2),
- PINMUX_DATA(MSIOF0_RSCK_MARK, PORT39_FN2),
- PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT40_FN2),
- PINMUX_DATA(MSIOF0_MCK0_MARK, PORT41_FN2),
- PINMUX_DATA(MSIOF0_MCK1_MARK, PORT42_FN2),
- PINMUX_DATA(MSIOF0_SS1_MARK, PORT43_FN2),
- PINMUX_DATA(MSIOF0_SS2_MARK, PORT44_FN2),
- PINMUX_DATA(MSIOF0_TXD_MARK, PORT45_FN2),
- PINMUX_DATA(FMSICK_MARK, PORT65_FN2),
- PINMUX_DATA(FCE1_MARK, PORT66_FN2),
- PINMUX_DATA(BBIF1_RXD_MARK, PORT76_FN2),
- PINMUX_DATA(BBIF1_TSYNC_MARK, PORT77_FN2),
- PINMUX_DATA(BBIF1_TSCK_MARK, PORT78_FN2),
- PINMUX_DATA(BBIF1_TXD_MARK, PORT79_FN2),
- PINMUX_DATA(BBIF1_RSCK_MARK, PORT80_FN2),
- PINMUX_DATA(BBIF1_RSYNC_MARK, PORT81_FN2),
- PINMUX_DATA(BBIF1_FLOW_MARK, PORT82_FN2),
- PINMUX_DATA(BB_RX_FLOW_N_MARK, PORT83_FN2),
- PINMUX_DATA(MSIOF1_RSCK_MARK, PORT84_FN2),
- PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT85_FN2),
- PINMUX_DATA(MSIOF1_MCK0_MARK, PORT86_FN2),
- PINMUX_DATA(MSIOF1_MCK1_MARK, PORT87_FN2),
- PINMUX_DATA(MSIOF1_TSCK_88_MARK, PORT88_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_TSYNC_89_MARK, PORT89_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_TXD_90_MARK, PORT90_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_RXD_91_MARK, PORT91_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_SS1_92_MARK, PORT92_FN2, MSEL4CR_10_1),
- PINMUX_DATA(MSIOF1_SS2_93_MARK, PORT93_FN2, MSEL4CR_10_1),
- PINMUX_DATA(SCIFA2_CTS1_MARK, PORT94_FN2),
- PINMUX_DATA(SCIFA2_RTS1_MARK, PORT95_FN2),
- PINMUX_DATA(SCIFA2_TXD1_MARK, PORT96_FN2),
- PINMUX_DATA(SCIFA2_RXD1_MARK, PORT97_FN2),
- PINMUX_DATA(SCIFA2_SCK1_MARK, PORT98_FN2),
- PINMUX_DATA(I2C_SCL2_MARK, PORT110_FN2),
- PINMUX_DATA(I2C_SDA2_MARK, PORT111_FN2),
- PINMUX_DATA(I2C_SCL3_MARK, PORT114_FN2, MSEL4CR_16_1),
- PINMUX_DATA(I2C_SDA3_MARK, PORT115_FN2, MSEL4CR_16_1),
- PINMUX_DATA(I2C_SCL4_MARK, PORT116_FN2, MSEL4CR_17_1),
- PINMUX_DATA(I2C_SDA4_MARK, PORT117_FN2, MSEL4CR_17_1),
- PINMUX_DATA(MSIOF2_RSCK_MARK, PORT134_FN2),
- PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT135_FN2),
- PINMUX_DATA(MSIOF2_MCK0_MARK, PORT136_FN2),
- PINMUX_DATA(MSIOF2_MCK1_MARK, PORT137_FN2),
- PINMUX_DATA(MSIOF2_SS1_MARK, PORT138_FN2),
- PINMUX_DATA(MSIOF2_SS2_MARK, PORT139_FN2),
- PINMUX_DATA(SCIFA3_CTS_140_MARK, PORT140_FN2, MSEL3CR_9_1),
- PINMUX_DATA(SCIFA3_RTS_141_MARK, PORT141_FN2),
- PINMUX_DATA(SCIFA3_SCK_MARK, PORT142_FN2),
- PINMUX_DATA(SCIFA3_TXD_MARK, PORT143_FN2),
- PINMUX_DATA(SCIFA3_RXD_MARK, PORT144_FN2),
- PINMUX_DATA(MSIOF2_TSYNC_MARK, PORT148_FN2),
- PINMUX_DATA(MSIOF2_TSCK_MARK, PORT149_FN2),
- PINMUX_DATA(MSIOF2_RXD_MARK, PORT150_FN2),
- PINMUX_DATA(MSIOF2_TXD_MARK, PORT151_FN2),
- PINMUX_DATA(SCIFA0_SCK_MARK, PORT156_FN2),
- PINMUX_DATA(SCIFA0_RTS_MARK, PORT157_FN2),
- PINMUX_DATA(SCIFA0_CTS_MARK, PORT158_FN2),
- PINMUX_DATA(SCIFA1_SCK_MARK, PORT159_FN2),
- PINMUX_DATA(SCIFA1_RTS_MARK, PORT160_FN2),
- PINMUX_DATA(SCIFA1_CTS_MARK, PORT161_FN2),
-
- /* Function 3 */
- PINMUX_DATA(VIO_CKO1_MARK, PORT16_FN3),
- PINMUX_DATA(VIO_CKO2_MARK, PORT17_FN3),
- PINMUX_DATA(IDIN_1_18_MARK, PORT18_FN3, MSEL4CR_14_1),
- PINMUX_DATA(MSIOF1_TSCK_39_MARK, PORT39_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_TSYNC_40_MARK, PORT40_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_TXD_41_MARK, PORT41_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_RXD_42_MARK, PORT42_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_SS1_43_MARK, PORT43_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MSIOF1_SS2_44_MARK, PORT44_FN3, MSEL4CR_10_0),
- PINMUX_DATA(MMCD1_0_MARK, PORT54_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_1_MARK, PORT55_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_2_MARK, PORT56_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_3_MARK, PORT57_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_4_MARK, PORT58_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_5_MARK, PORT59_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_6_MARK, PORT60_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCD1_7_MARK, PORT61_FN3, MSEL4CR_15_1),
- PINMUX_DATA(VINT_I_MARK, PORT65_FN3),
- PINMUX_DATA(MMCCLK1_MARK, PORT66_FN3, MSEL4CR_15_1),
- PINMUX_DATA(MMCCMD1_MARK, PORT67_FN3, MSEL4CR_15_1),
- PINMUX_DATA(TPU0TO2_93_MARK, PORT93_FN3),
- PINMUX_DATA(TPU0TO2_99_MARK, PORT99_FN3),
- PINMUX_DATA(TPU0TO3_MARK, PORT112_FN3),
- PINMUX_DATA(IDIN_0_MARK, PORT113_FN3),
- PINMUX_DATA(EXTLP_0_MARK, PORT114_FN3),
- PINMUX_DATA(OVCN2_0_MARK, PORT115_FN3),
- PINMUX_DATA(PWEN_0_MARK, PORT116_FN3),
- PINMUX_DATA(OVCN_0_MARK, PORT117_FN3),
- PINMUX_DATA(KEYOUT7_MARK, PORT121_FN3),
- PINMUX_DATA(KEYOUT6_MARK, PORT122_FN3),
- PINMUX_DATA(KEYOUT5_MARK, PORT123_FN3),
- PINMUX_DATA(KEYOUT4_MARK, PORT124_FN3),
- PINMUX_DATA(KEYOUT3_MARK, PORT125_FN3),
- PINMUX_DATA(KEYOUT2_MARK, PORT126_FN3),
- PINMUX_DATA(KEYOUT1_MARK, PORT127_FN3),
- PINMUX_DATA(KEYOUT0_MARK, PORT128_FN3),
- PINMUX_DATA(KEYIN7_MARK, PORT129_FN3),
- PINMUX_DATA(KEYIN6_MARK, PORT130_FN3),
- PINMUX_DATA(KEYIN5_MARK, PORT131_FN3),
- PINMUX_DATA(KEYIN4_MARK, PORT132_FN3),
- PINMUX_DATA(KEYIN3_133_MARK, PORT133_FN3, MSEL4CR_18_0),
- PINMUX_DATA(KEYIN2_134_MARK, PORT134_FN3, MSEL4CR_18_0),
- PINMUX_DATA(KEYIN1_135_MARK, PORT135_FN3, MSEL4CR_18_0),
- PINMUX_DATA(KEYIN0_136_MARK, PORT136_FN3, MSEL4CR_18_0),
- PINMUX_DATA(TS_SPSYNC2_MARK, PORT137_FN3),
- PINMUX_DATA(IROUT_139_MARK, PORT139_FN3),
- PINMUX_DATA(IRDA_OUT_MARK, PORT140_FN3),
- PINMUX_DATA(IRDA_IN_MARK, PORT141_FN3),
- PINMUX_DATA(IRDA_FIRSEL_MARK, PORT142_FN3),
- PINMUX_DATA(TS_SDAT2_MARK, PORT145_FN3),
- PINMUX_DATA(TS_SDEN2_MARK, PORT146_FN3),
- PINMUX_DATA(TS_SCK2_MARK, PORT147_FN3),
-
- /* Function 4 */
- PINMUX_DATA(SCIFA3_CTS_43_MARK, PORT43_FN4, MSEL3CR_9_0),
- PINMUX_DATA(SCIFA3_RTS_44_MARK, PORT44_FN4),
- PINMUX_DATA(GP_RX_FLAG_MARK, PORT76_FN4),
- PINMUX_DATA(GP_RX_DATA_MARK, PORT77_FN4),
- PINMUX_DATA(GP_TX_READY_MARK, PORT78_FN4),
- PINMUX_DATA(GP_RX_WAKE_MARK, PORT79_FN4),
- PINMUX_DATA(MP_TX_FLAG_MARK, PORT80_FN4),
- PINMUX_DATA(MP_TX_DATA_MARK, PORT81_FN4),
- PINMUX_DATA(MP_RX_READY_MARK, PORT82_FN4),
- PINMUX_DATA(MP_TX_WAKE_MARK, PORT83_FN4),
- PINMUX_DATA(MMCD0_0_MARK, PORT84_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_1_MARK, PORT85_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_2_MARK, PORT86_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_3_MARK, PORT87_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_4_MARK, PORT88_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_5_MARK, PORT89_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_6_MARK, PORT90_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCD0_7_MARK, PORT91_FN4, MSEL4CR_15_0),
- PINMUX_DATA(MMCCMD0_MARK, PORT92_FN4, MSEL4CR_15_0),
- PINMUX_DATA(SIM_RST_MARK, PORT94_FN4),
- PINMUX_DATA(SIM_CLK_MARK, PORT95_FN4),
- PINMUX_DATA(SIM_D_MARK, PORT98_FN4),
- PINMUX_DATA(MMCCLK0_MARK, PORT99_FN4, MSEL4CR_15_0),
- PINMUX_DATA(IDIN_1_113_MARK, PORT113_FN4, MSEL4CR_14_0),
- PINMUX_DATA(OVCN_1_114_MARK, PORT114_FN4, MSEL4CR_14_0),
- PINMUX_DATA(PWEN_1_115_MARK, PORT115_FN4),
- PINMUX_DATA(EXTLP_1_MARK, PORT116_FN4),
- PINMUX_DATA(OVCN2_1_MARK, PORT117_FN4),
- PINMUX_DATA(KEYIN0_121_MARK, PORT121_FN4, MSEL4CR_18_1),
- PINMUX_DATA(KEYIN1_122_MARK, PORT122_FN4, MSEL4CR_18_1),
- PINMUX_DATA(KEYIN2_123_MARK, PORT123_FN4, MSEL4CR_18_1),
- PINMUX_DATA(KEYIN3_124_MARK, PORT124_FN4, MSEL4CR_18_1),
- PINMUX_DATA(PWEN_1_138_MARK, PORT138_FN4),
- PINMUX_DATA(IROUT_140_MARK, PORT140_FN4),
- PINMUX_DATA(LCDCS_MARK, PORT145_FN4),
- PINMUX_DATA(LCDWR_MARK, PORT147_FN4),
- PINMUX_DATA(LCDRS_MARK, PORT149_FN4),
- PINMUX_DATA(OVCN_1_162_MARK, PORT162_FN4, MSEL4CR_14_1),
-
- /* Function 5 */
- PINMUX_DATA(GPI0_MARK, PORT41_FN5),
- PINMUX_DATA(GPI1_MARK, PORT42_FN5),
- PINMUX_DATA(GPO0_MARK, PORT43_FN5),
- PINMUX_DATA(GPO1_MARK, PORT44_FN5),
- PINMUX_DATA(I2C_SCL3S_MARK, PORT137_FN5, MSEL4CR_16_0),
- PINMUX_DATA(I2C_SDA3S_MARK, PORT145_FN5, MSEL4CR_16_0),
- PINMUX_DATA(I2C_SCL4S_MARK, PORT146_FN5, MSEL4CR_17_0),
- PINMUX_DATA(I2C_SDA4S_MARK, PORT147_FN5, MSEL4CR_17_0),
-
- /* Function select */
- PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0),
- PINMUX_DATA(LCDC1_SELECT_MARK, MSEL3CR_6_1),
-
- PINMUX_DATA(TS0_1SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_0),
- PINMUX_DATA(TS0_2SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_1),
- PINMUX_DATA(TS1_1SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_0),
- PINMUX_DATA(TS1_2SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_1),
-
- PINMUX_DATA(SDENC_CPG_MARK, MSEL4CR_19_0),
- PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
-
- PINMUX_DATA(MFIv6_MARK, MSEL4CR_6_0),
- PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
-};
-
-#define __I (SH_PFC_PIN_CFG_INPUT)
-#define __O (SH_PFC_PIN_CFG_OUTPUT)
-#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
-#define __PD (SH_PFC_PIN_CFG_PULL_DOWN)
-#define __PU (SH_PFC_PIN_CFG_PULL_UP)
-#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
-
-#define SH7372_PIN_I_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PD)
-#define SH7372_PIN_I_PU(pin) SH_PFC_PIN_CFG(pin, __I | __PU)
-#define SH7372_PIN_I_PU_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PUD)
-#define SH7372_PIN_IO(pin) SH_PFC_PIN_CFG(pin, __IO)
-#define SH7372_PIN_IO_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PD)
-#define SH7372_PIN_IO_PU(pin) SH_PFC_PIN_CFG(pin, __IO | __PU)
-#define SH7372_PIN_IO_PU_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PUD)
-#define SH7372_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O)
-#define SH7372_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD)
-
-static const struct sh_pfc_pin pinmux_pins[] = {
- /* Table 57-1 (I/O and Pull U/D) */
- SH7372_PIN_IO_PD(0), SH7372_PIN_IO_PD(1),
- SH7372_PIN_O(2), SH7372_PIN_I_PD(3),
- SH7372_PIN_I_PD(4), SH7372_PIN_I_PD(5),
- SH7372_PIN_IO_PU_PD(6), SH7372_PIN_I_PD(7),
- SH7372_PIN_IO_PD(8), SH7372_PIN_O(9),
- SH7372_PIN_O(10), SH7372_PIN_O(11),
- SH7372_PIN_IO_PU_PD(12), SH7372_PIN_IO_PD(13),
- SH7372_PIN_IO_PD(14), SH7372_PIN_O(15),
- SH7372_PIN_IO_PD(16), SH7372_PIN_IO_PD(17),
- SH7372_PIN_I_PD(18), SH7372_PIN_IO(19),
- SH7372_PIN_IO(20), SH7372_PIN_IO(21),
- SH7372_PIN_IO(22), SH7372_PIN_IO(23),
- SH7372_PIN_IO(24), SH7372_PIN_IO(25),
- SH7372_PIN_IO(26), SH7372_PIN_IO(27),
- SH7372_PIN_IO(28), SH7372_PIN_IO(29),
- SH7372_PIN_IO(30), SH7372_PIN_IO(31),
- SH7372_PIN_IO(32), SH7372_PIN_IO(33),
- SH7372_PIN_IO(34), SH7372_PIN_IO(35),
- SH7372_PIN_IO(36), SH7372_PIN_IO(37),
- SH7372_PIN_IO(38), SH7372_PIN_IO(39),
- SH7372_PIN_IO(40), SH7372_PIN_IO(41),
- SH7372_PIN_IO(42), SH7372_PIN_IO(43),
- SH7372_PIN_IO(44), SH7372_PIN_IO(45),
- SH7372_PIN_IO_PU(46), SH7372_PIN_IO_PU(47),
- SH7372_PIN_IO_PU(48), SH7372_PIN_IO_PU(49),
- SH7372_PIN_IO_PU(50), SH7372_PIN_IO_PU(51),
- SH7372_PIN_IO_PU(52), SH7372_PIN_IO_PU(53),
- SH7372_PIN_IO_PU(54), SH7372_PIN_IO_PU(55),
- SH7372_PIN_IO_PU(56), SH7372_PIN_IO_PU(57),
- SH7372_PIN_IO_PU(58), SH7372_PIN_IO_PU(59),
- SH7372_PIN_IO_PU(60), SH7372_PIN_IO_PU(61),
- SH7372_PIN_IO(62), SH7372_PIN_O(63),
- SH7372_PIN_O(64), SH7372_PIN_IO_PU(65),
- SH7372_PIN_O_PU_PD(66), SH7372_PIN_IO_PU(67),
- SH7372_PIN_O(68), SH7372_PIN_IO(69),
- SH7372_PIN_IO(70), SH7372_PIN_IO(71),
- SH7372_PIN_O(72), SH7372_PIN_I_PU(73),
- SH7372_PIN_I_PU_PD(74), SH7372_PIN_IO_PU_PD(75),
- SH7372_PIN_IO_PU_PD(76), SH7372_PIN_IO_PU_PD(77),
- SH7372_PIN_IO_PU_PD(78), SH7372_PIN_IO_PU_PD(79),
- SH7372_PIN_IO_PU_PD(80), SH7372_PIN_IO_PU_PD(81),
- SH7372_PIN_IO_PU_PD(82), SH7372_PIN_IO_PU_PD(83),
- SH7372_PIN_IO_PU_PD(84), SH7372_PIN_IO_PU_PD(85),
- SH7372_PIN_IO_PU_PD(86), SH7372_PIN_IO_PU_PD(87),
- SH7372_PIN_IO_PU_PD(88), SH7372_PIN_IO_PU_PD(89),
- SH7372_PIN_IO_PU_PD(90), SH7372_PIN_IO_PU_PD(91),
- SH7372_PIN_IO_PU_PD(92), SH7372_PIN_IO_PU_PD(93),
- SH7372_PIN_IO_PU_PD(94), SH7372_PIN_IO_PU_PD(95),
- SH7372_PIN_IO_PU(96), SH7372_PIN_IO_PU_PD(97),
- SH7372_PIN_IO_PU_PD(98), SH7372_PIN_O_PU_PD(99),
- SH7372_PIN_IO_PD(100), SH7372_PIN_IO_PD(101),
- SH7372_PIN_IO_PD(102), SH7372_PIN_IO_PD(103),
- SH7372_PIN_IO_PD(104), SH7372_PIN_IO_PD(105),
- SH7372_PIN_IO_PU(106), SH7372_PIN_IO_PU(107),
- SH7372_PIN_IO_PU(108), SH7372_PIN_IO_PU(109),
- SH7372_PIN_IO_PU(110), SH7372_PIN_IO_PU(111),
- SH7372_PIN_IO_PD(112), SH7372_PIN_IO_PD(113),
- SH7372_PIN_IO_PU(114), SH7372_PIN_IO_PU(115),
- SH7372_PIN_IO_PU(116), SH7372_PIN_IO_PU(117),
- SH7372_PIN_IO_PU(118), SH7372_PIN_IO_PU(119),
- SH7372_PIN_IO_PU(120), SH7372_PIN_IO_PD(121),
- SH7372_PIN_IO_PD(122), SH7372_PIN_IO_PD(123),
- SH7372_PIN_IO_PD(124), SH7372_PIN_IO_PD(125),
- SH7372_PIN_IO_PD(126), SH7372_PIN_IO_PD(127),
- SH7372_PIN_IO_PD(128), SH7372_PIN_IO_PU_PD(129),
- SH7372_PIN_IO_PU_PD(130), SH7372_PIN_IO_PU_PD(131),
- SH7372_PIN_IO_PU_PD(132), SH7372_PIN_IO_PU_PD(133),
- SH7372_PIN_IO_PU_PD(134), SH7372_PIN_IO_PU_PD(135),
- SH7372_PIN_IO_PD(136), SH7372_PIN_IO_PD(137),
- SH7372_PIN_IO_PD(138), SH7372_PIN_IO_PD(139),
- SH7372_PIN_IO_PD(140), SH7372_PIN_IO_PD(141),
- SH7372_PIN_IO_PD(142), SH7372_PIN_IO_PU_PD(143),
- SH7372_PIN_IO_PD(144), SH7372_PIN_IO_PD(145),
- SH7372_PIN_IO_PD(146), SH7372_PIN_IO_PD(147),
- SH7372_PIN_IO_PD(148), SH7372_PIN_IO_PD(149),
- SH7372_PIN_IO_PD(150), SH7372_PIN_IO_PD(151),
- SH7372_PIN_IO_PU_PD(152), SH7372_PIN_I_PD(153),
- SH7372_PIN_IO_PU_PD(154), SH7372_PIN_I_PD(155),
- SH7372_PIN_IO_PD(156), SH7372_PIN_IO_PD(157),
- SH7372_PIN_I_PD(158), SH7372_PIN_IO_PD(159),
- SH7372_PIN_O(160), SH7372_PIN_IO_PD(161),
- SH7372_PIN_IO_PD(162), SH7372_PIN_IO_PD(163),
- SH7372_PIN_I_PD(164), SH7372_PIN_IO_PD(165),
- SH7372_PIN_I_PD(166), SH7372_PIN_I_PD(167),
- SH7372_PIN_I_PD(168), SH7372_PIN_I_PD(169),
- SH7372_PIN_I_PD(170), SH7372_PIN_O(171),
- SH7372_PIN_IO_PU_PD(172), SH7372_PIN_IO_PU_PD(173),
- SH7372_PIN_IO_PU_PD(174), SH7372_PIN_IO_PU_PD(175),
- SH7372_PIN_IO_PU_PD(176), SH7372_PIN_IO_PU_PD(177),
- SH7372_PIN_IO_PU_PD(178), SH7372_PIN_O(179),
- SH7372_PIN_IO_PU_PD(180), SH7372_PIN_IO_PU_PD(181),
- SH7372_PIN_IO_PU_PD(182), SH7372_PIN_IO_PU_PD(183),
- SH7372_PIN_IO_PU_PD(184), SH7372_PIN_O(185),
- SH7372_PIN_IO_PU_PD(186), SH7372_PIN_IO_PU_PD(187),
- SH7372_PIN_IO_PU_PD(188), SH7372_PIN_IO_PU_PD(189),
- SH7372_PIN_IO_PU_PD(190),
-};
-
-/* - BSC -------------------------------------------------------------------- */
-static const unsigned int bsc_data8_pins[] = {
- /* D[0:7] */
- 46, 47, 48, 49, 50, 51, 52, 53,
-};
-static const unsigned int bsc_data8_mux[] = {
- D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
- D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
-};
-static const unsigned int bsc_data16_pins[] = {
- /* D[0:15] */
- 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
-};
-static const unsigned int bsc_data16_mux[] = {
- D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
- D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
- D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
- D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-};
-static const unsigned int bsc_cs0_pins[] = {
- /* CS */
- 62,
-};
-static const unsigned int bsc_cs0_mux[] = {
- CS0_MARK,
-};
-static const unsigned int bsc_cs2_pins[] = {
- /* CS */
- 63,
-};
-static const unsigned int bsc_cs2_mux[] = {
- CS2_MARK,
-};
-static const unsigned int bsc_cs4_pins[] = {
- /* CS */
- 64,
-};
-static const unsigned int bsc_cs4_mux[] = {
- CS4_MARK,
-};
-static const unsigned int bsc_cs5a_pins[] = {
- /* CS */
- 65,
-};
-static const unsigned int bsc_cs5a_mux[] = {
- CS5A_MARK,
-};
-static const unsigned int bsc_cs5b_pins[] = {
- /* CS */
- 66,
-};
-static const unsigned int bsc_cs5b_mux[] = {
- CS5B_MARK,
-};
-static const unsigned int bsc_cs6a_pins[] = {
- /* CS */
- 67,
-};
-static const unsigned int bsc_cs6a_mux[] = {
- CS6A_MARK,
-};
-static const unsigned int bsc_rd_we8_pins[] = {
- /* RD, WE[0] */
- 69, 70,
-};
-static const unsigned int bsc_rd_we8_mux[] = {
- RD_FSC_MARK, WE0_FWE_MARK,
-};
-static const unsigned int bsc_rd_we16_pins[] = {
- /* RD, WE[0:1] */
- 69, 70, 71,
-};
-static const unsigned int bsc_rd_we16_mux[] = {
- RD_FSC_MARK, WE0_FWE_MARK, WE1_MARK,
-};
-static const unsigned int bsc_bs_pins[] = {
- /* BS */
- 19,
-};
-static const unsigned int bsc_bs_mux[] = {
- BS_MARK,
-};
-static const unsigned int bsc_rdwr_pins[] = {
- /* RDWR */
- 75,
-};
-static const unsigned int bsc_rdwr_mux[] = {
- RDWR_MARK,
-};
-static const unsigned int bsc_wait_pins[] = {
- /* WAIT */
- 74,
-};
-static const unsigned int bsc_wait_mux[] = {
- WAIT_MARK,
-};
-/* - CEU -------------------------------------------------------------------- */
-static const unsigned int ceu_data_0_7_pins[] = {
- /* D[0:7] */
- 102, 103, 104, 105, 106, 107, 108, 109,
-};
-static const unsigned int ceu_data_0_7_mux[] = {
- VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
- VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
-};
-static const unsigned int ceu_data_8_15_pins[] = {
- /* D[8:15] */
- 110, 111, 112, 113, 114, 115, 116, 117,
-};
-static const unsigned int ceu_data_8_15_mux[] = {
- VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
- VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
-};
-static const unsigned int ceu_clk_0_pins[] = {
- /* CKO */
- 120,
-};
-static const unsigned int ceu_clk_0_mux[] = {
- VIO_CKO_MARK,
-};
-static const unsigned int ceu_clk_1_pins[] = {
- /* CKO */
- 16,
-};
-static const unsigned int ceu_clk_1_mux[] = {
- VIO_CKO1_MARK,
-};
-static const unsigned int ceu_clk_2_pins[] = {
- /* CKO */
- 17,
-};
-static const unsigned int ceu_clk_2_mux[] = {
- VIO_CKO2_MARK,
-};
-static const unsigned int ceu_sync_pins[] = {
- /* CLK, VD, HD */
- 118, 100, 101,
-};
-static const unsigned int ceu_sync_mux[] = {
- VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK,
-};
-static const unsigned int ceu_field_pins[] = {
- /* FIELD */
- 119,
-};
-static const unsigned int ceu_field_mux[] = {
- VIO_FIELD_MARK,
-};
-/* - FLCTL ------------------------------------------------------------------ */
-static const unsigned int flctl_data_pins[] = {
- /* NAF[0:15] */
- 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
-};
-static const unsigned int flctl_data_mux[] = {
- D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
- D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
- D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
- D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-};
-static const unsigned int flctl_ce0_pins[] = {
- /* CE */
- 68,
-};
-static const unsigned int flctl_ce0_mux[] = {
- FCE0_MARK,
-};
-static const unsigned int flctl_ce1_pins[] = {
- /* CE */
- 66,
-};
-static const unsigned int flctl_ce1_mux[] = {
- FCE1_MARK,
-};
-static const unsigned int flctl_ctrl_pins[] = {
- /* FCDE, FOE, FSC, FWE, FRB */
- 24, 23, 69, 70, 73,
-};
-static const unsigned int flctl_ctrl_mux[] = {
- A5_FCDE_MARK, A4_FOE_MARK, RD_FSC_MARK, WE0_FWE_MARK, FRB_MARK,
-};
-/* - FSIA ------------------------------------------------------------------- */
-static const unsigned int fsia_mclk_in_pins[] = {
- /* CK */
- 4,
-};
-static const unsigned int fsia_mclk_in_mux[] = {
- FSIACK_MARK,
-};
-static const unsigned int fsia_mclk_out_pins[] = {
- /* OMC */
- 8,
-};
-static const unsigned int fsia_mclk_out_mux[] = {
- FSIAOMC_MARK,
-};
-static const unsigned int fsia_sclk_in_pins[] = {
- /* ILR, IBT */
- 5, 6,
-};
-static const unsigned int fsia_sclk_in_mux[] = {
- FSIAILR_MARK, FSIAIBT_MARK,
-};
-static const unsigned int fsia_sclk_out_pins[] = {
- /* OLR, OBT */
- 9, 10,
-};
-static const unsigned int fsia_sclk_out_mux[] = {
- FSIAOLR_MARK, FSIAOBT_MARK,
-};
-static const unsigned int fsia_data_in_pins[] = {
- /* ISLD */
- 7,
-};
-static const unsigned int fsia_data_in_mux[] = {
- FSIAISLD_MARK,
-};
-static const unsigned int fsia_data_out_pins[] = {
- /* OSLD */
- 11,
-};
-static const unsigned int fsia_data_out_mux[] = {
- FSIAOSLD_MARK,
-};
-static const unsigned int fsia_spdif_0_pins[] = {
- /* SPDIF */
- 11,
-};
-static const unsigned int fsia_spdif_0_mux[] = {
- FSIASPDIF_11_MARK,
-};
-static const unsigned int fsia_spdif_1_pins[] = {
- /* SPDIF */
- 15,
-};
-static const unsigned int fsia_spdif_1_mux[] = {
- FSIASPDIF_15_MARK,
-};
-/* - FSIB ------------------------------------------------------------------- */
-static const unsigned int fsib_mclk_in_pins[] = {
- /* CK */
- 4,
-};
-static const unsigned int fsib_mclk_in_mux[] = {
- FSIBCK_MARK,
-};
-/* - HDMI ------------------------------------------------------------------- */
-static const unsigned int hdmi_pins[] = {
- /* HPD, CEC */
- 169, 170,
-};
-static const unsigned int hdmi_mux[] = {
- HDMI_HPD_MARK, HDMI_CEC_MARK,
-};
-/* - INTC ------------------------------------------------------------------- */
-IRQC_PINS_MUX(0, 6, 162);
-IRQC_PIN_MUX(1, 12);
-IRQC_PINS_MUX(2, 4, 5);
-IRQC_PINS_MUX(3, 8, 16);
-IRQC_PINS_MUX(4, 17, 163);
-IRQC_PIN_MUX(5, 18);
-IRQC_PINS_MUX(6, 39, 164);
-IRQC_PINS_MUX(7, 40, 167);
-IRQC_PINS_MUX(8, 41, 168);
-IRQC_PINS_MUX(9, 42, 169);
-IRQC_PIN_MUX(10, 65);
-IRQC_PIN_MUX(11, 67);
-IRQC_PINS_MUX(12, 80, 137);
-IRQC_PINS_MUX(13, 81, 145);
-IRQC_PINS_MUX(14, 82, 146);
-IRQC_PINS_MUX(15, 83, 147);
-IRQC_PINS_MUX(16, 84, 170);
-IRQC_PIN_MUX(17, 85);
-IRQC_PIN_MUX(18, 86);
-IRQC_PIN_MUX(19, 87);
-IRQC_PIN_MUX(20, 92);
-IRQC_PIN_MUX(21, 93);
-IRQC_PIN_MUX(22, 94);
-IRQC_PIN_MUX(23, 95);
-IRQC_PIN_MUX(24, 112);
-IRQC_PIN_MUX(25, 119);
-IRQC_PINS_MUX(26, 121, 172);
-IRQC_PINS_MUX(27, 122, 180);
-IRQC_PINS_MUX(28, 123, 181);
-IRQC_PINS_MUX(29, 129, 182);
-IRQC_PINS_MUX(30, 130, 183);
-IRQC_PINS_MUX(31, 138, 184);
-/* - KEYSC ------------------------------------------------------------------ */
-static const unsigned int keysc_in04_0_pins[] = {
- /* KEYIN[0:4] */
- 136, 135, 134, 133, 132,
-};
-static const unsigned int keysc_in04_0_mux[] = {
- KEYIN0_136_MARK, KEYIN1_135_MARK, KEYIN2_134_MARK, KEYIN3_133_MARK,
- KEYIN4_MARK,
-};
-static const unsigned int keysc_in04_1_pins[] = {
- /* KEYIN[0:4] */
- 121, 122, 123, 124, 132,
-};
-static const unsigned int keysc_in04_1_mux[] = {
- KEYIN0_121_MARK, KEYIN1_122_MARK, KEYIN2_123_MARK, KEYIN3_124_MARK,
- KEYIN4_MARK,
-};
-static const unsigned int keysc_in5_pins[] = {
- /* KEYIN5 */
- 131,
-};
-static const unsigned int keysc_in5_mux[] = {
- KEYIN5_MARK,
-};
-static const unsigned int keysc_in6_pins[] = {
- /* KEYIN6 */
- 130,
-};
-static const unsigned int keysc_in6_mux[] = {
- KEYIN6_MARK,
-};
-static const unsigned int keysc_in7_pins[] = {
- /* KEYIN7 */
- 129,
-};
-static const unsigned int keysc_in7_mux[] = {
- KEYIN7_MARK,
-};
-static const unsigned int keysc_out4_pins[] = {
- /* KEYOUT[0:3] */
- 128, 127, 126, 125,
-};
-static const unsigned int keysc_out4_mux[] = {
- KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
-};
-static const unsigned int keysc_out5_pins[] = {
- /* KEYOUT[0:4] */
- 128, 127, 126, 125, 124,
-};
-static const unsigned int keysc_out5_mux[] = {
- KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
- KEYOUT4_MARK,
-};
-static const unsigned int keysc_out6_pins[] = {
- /* KEYOUT[0:5] */
- 128, 127, 126, 125, 124, 123,
-};
-static const unsigned int keysc_out6_mux[] = {
- KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
- KEYOUT4_MARK, KEYOUT5_MARK,
-};
-static const unsigned int keysc_out8_pins[] = {
- /* KEYOUT[0:7] */
- 128, 127, 126, 125, 124, 123, 122, 121,
-};
-static const unsigned int keysc_out8_mux[] = {
- KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
- KEYOUT4_MARK, KEYOUT5_MARK, KEYOUT6_MARK, KEYOUT7_MARK,
-};
-/* - LCD -------------------------------------------------------------------- */
-static const unsigned int lcd_data8_pins[] = {
- /* D[0:7] */
- 121, 122, 123, 124, 125, 126, 127, 128,
-};
-static const unsigned int lcd_data8_mux[] = {
- /* LCDC */
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
-};
-static const unsigned int lcd_data9_pins[] = {
- /* D[0:8] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129,
- 137, 138, 139, 140, 141, 142, 143, 144,
-};
-static const unsigned int lcd_data9_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK,
-};
-static const unsigned int lcd_data12_pins[] = {
- /* D[0:11] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129, 130, 131, 132,
-};
-static const unsigned int lcd_data12_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
-};
-static const unsigned int lcd_data16_pins[] = {
- /* D[0:15] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129, 130, 131, 132, 133, 134, 135, 136,
-};
-static const unsigned int lcd_data16_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
- LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
-};
-static const unsigned int lcd_data18_pins[] = {
- /* D[0:17] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129, 130, 131, 132, 133, 134, 135, 136,
- 137, 138,
-};
-static const unsigned int lcd_data18_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
- LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
- LCDD16_MARK, LCDD17_MARK,
-};
-static const unsigned int lcd_data24_pins[] = {
- /* D[0:23] */
- 121, 122, 123, 124, 125, 126, 127, 128,
- 129, 130, 131, 132, 133, 134, 135, 136,
- 137, 138, 139, 140, 141, 142, 143, 144,
-};
-static const unsigned int lcd_data24_mux[] = {
- LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
- LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
- LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
- LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
- LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK,
- LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK,
-};
-static const unsigned int lcd_display_pins[] = {
- /* DON */
- 151,
-};
-static const unsigned int lcd_display_mux[] = {
- LCDDON_MARK,
-};
-static const unsigned int lcd_lclk_pins[] = {
- /* LCLK */
- 150,
-};
-static const unsigned int lcd_lclk_mux[] = {
- LCDLCLK_MARK,
-};
-static const unsigned int lcd_sync_pins[] = {
- /* VSYN, HSYN, DCK, DISP */
- 146, 145, 147, 149,
-};
-static const unsigned int lcd_sync_mux[] = {
- LCDVSYN_MARK, LCDHSYN_MARK, LCDDCK_MARK, LCDDISP_MARK,
-};
-static const unsigned int lcd_sys_pins[] = {
- /* CS, WR, RD, RS */
- 145, 147, 148, 149,
-};
-static const unsigned int lcd_sys_mux[] = {
- LCDCS_MARK, LCDWR_MARK, LCDRD_MARK, LCDRS_MARK,
-};
-/* - MMCIF ------------------------------------------------------------------ */
-static const unsigned int mmc0_data1_0_pins[] = {
- /* D[0] */
- 84,
-};
-static const unsigned int mmc0_data1_0_mux[] = {
- MMCD0_0_MARK,
-};
-static const unsigned int mmc0_data4_0_pins[] = {
- /* D[0:3] */
- 84, 85, 86, 87,
-};
-static const unsigned int mmc0_data4_0_mux[] = {
- MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
-};
-static const unsigned int mmc0_data8_0_pins[] = {
- /* D[0:7] */
- 84, 85, 86, 87, 88, 89, 90, 91,
-};
-static const unsigned int mmc0_data8_0_mux[] = {
- MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
- MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
-};
-static const unsigned int mmc0_ctrl_0_pins[] = {
- /* CMD, CLK */
- 92, 99,
-};
-static const unsigned int mmc0_ctrl_0_mux[] = {
- MMCCMD0_MARK, MMCCLK0_MARK,
-};
-
-static const unsigned int mmc0_data1_1_pins[] = {
- /* D[0] */
- 54,
-};
-static const unsigned int mmc0_data1_1_mux[] = {
- MMCD1_0_MARK,
-};
-static const unsigned int mmc0_data4_1_pins[] = {
- /* D[0:3] */
- 54, 55, 56, 57,
-};
-static const unsigned int mmc0_data4_1_mux[] = {
- MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
-};
-static const unsigned int mmc0_data8_1_pins[] = {
- /* D[0:7] */
- 54, 55, 56, 57, 58, 59, 60, 61,
-};
-static const unsigned int mmc0_data8_1_mux[] = {
- MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
- MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
-};
-static const unsigned int mmc0_ctrl_1_pins[] = {
- /* CMD, CLK */
- 67, 66,
-};
-static const unsigned int mmc0_ctrl_1_mux[] = {
- MMCCMD1_MARK, MMCCLK1_MARK,
-};
-/* - SCIFA0 ----------------------------------------------------------------- */
-static const unsigned int scifa0_data_pins[] = {
- /* RXD, TXD */
- 153, 152,
-};
-static const unsigned int scifa0_data_mux[] = {
- SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
-};
-static const unsigned int scifa0_clk_pins[] = {
- /* SCK */
- 156,
-};
-static const unsigned int scifa0_clk_mux[] = {
- SCIFA0_SCK_MARK,
-};
-static const unsigned int scifa0_ctrl_pins[] = {
- /* RTS, CTS */
- 157, 158,
-};
-static const unsigned int scifa0_ctrl_mux[] = {
- SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
-};
-/* - SCIFA1 ----------------------------------------------------------------- */
-static const unsigned int scifa1_data_pins[] = {
- /* RXD, TXD */
- 155, 154,
-};
-static const unsigned int scifa1_data_mux[] = {
- SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
-};
-static const unsigned int scifa1_clk_pins[] = {
- /* SCK */
- 159,
-};
-static const unsigned int scifa1_clk_mux[] = {
- SCIFA1_SCK_MARK,
-};
-static const unsigned int scifa1_ctrl_pins[] = {
- /* RTS, CTS */
- 160, 161,
-};
-static const unsigned int scifa1_ctrl_mux[] = {
- SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
-};
-/* - SCIFA2 ----------------------------------------------------------------- */
-static const unsigned int scifa2_data_pins[] = {
- /* RXD, TXD */
- 97, 96,
-};
-static const unsigned int scifa2_data_mux[] = {
- SCIFA2_RXD1_MARK, SCIFA2_TXD1_MARK,
-};
-static const unsigned int scifa2_clk_pins[] = {
- /* SCK */
- 98,
-};
-static const unsigned int scifa2_clk_mux[] = {
- SCIFA2_SCK1_MARK,
-};
-static const unsigned int scifa2_ctrl_pins[] = {
- /* RTS, CTS */
- 95, 94,
-};
-static const unsigned int scifa2_ctrl_mux[] = {
- SCIFA2_RTS1_MARK, SCIFA2_CTS1_MARK,
-};
-/* - SCIFA3 ----------------------------------------------------------------- */
-static const unsigned int scifa3_data_pins[] = {
- /* RXD, TXD */
- 144, 143,
-};
-static const unsigned int scifa3_data_mux[] = {
- SCIFA3_RXD_MARK, SCIFA3_TXD_MARK,
-};
-static const unsigned int scifa3_clk_pins[] = {
- /* SCK */
- 142,
-};
-static const unsigned int scifa3_clk_mux[] = {
- SCIFA3_SCK_MARK,
-};
-static const unsigned int scifa3_ctrl_0_pins[] = {
- /* RTS, CTS */
- 44, 43,
-};
-static const unsigned int scifa3_ctrl_0_mux[] = {
- SCIFA3_RTS_44_MARK, SCIFA3_CTS_43_MARK,
-};
-static const unsigned int scifa3_ctrl_1_pins[] = {
- /* RTS, CTS */
- 141, 140,
-};
-static const unsigned int scifa3_ctrl_1_mux[] = {
- SCIFA3_RTS_141_MARK, SCIFA3_CTS_140_MARK,
-};
-/* - SCIFA4 ----------------------------------------------------------------- */
-static const unsigned int scifa4_data_pins[] = {
- /* RXD, TXD */
- 5, 6,
-};
-static const unsigned int scifa4_data_mux[] = {
- SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
-};
-/* - SCIFA5 ----------------------------------------------------------------- */
-static const unsigned int scifa5_data_pins[] = {
- /* RXD, TXD */
- 8, 12,
-};
-static const unsigned int scifa5_data_mux[] = {
- SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
-};
-/* - SCIFB ------------------------------------------------------------------ */
-static const unsigned int scifb_data_pins[] = {
- /* RXD, TXD */
- 166, 165,
-};
-static const unsigned int scifb_data_mux[] = {
- SCIFB_RXD_MARK, SCIFB_TXD_MARK,
-};
-static const unsigned int scifb_clk_pins[] = {
- /* SCK */
- 162,
-};
-static const unsigned int scifb_clk_mux[] = {
- SCIFB_SCK_MARK,
-};
-static const unsigned int scifb_ctrl_pins[] = {
- /* RTS, CTS */
- 163, 164,
-};
-static const unsigned int scifb_ctrl_mux[] = {
- SCIFB_RTS_MARK, SCIFB_CTS_MARK,
-};
-/* - SDHI0 ------------------------------------------------------------------ */
-static const unsigned int sdhi0_data1_pins[] = {
- /* D0 */
- 173,
-};
-static const unsigned int sdhi0_data1_mux[] = {
- SDHID0_0_MARK,
-};
-static const unsigned int sdhi0_data4_pins[] = {
- /* D[0:3] */
- 173, 174, 175, 176,
-};
-static const unsigned int sdhi0_data4_mux[] = {
- SDHID0_0_MARK, SDHID0_1_MARK, SDHID0_2_MARK, SDHID0_3_MARK,
-};
-static const unsigned int sdhi0_ctrl_pins[] = {
- /* CMD, CLK */
- 177, 171,
-};
-static const unsigned int sdhi0_ctrl_mux[] = {
- SDHICMD0_MARK, SDHICLK0_MARK,
-};
-static const unsigned int sdhi0_cd_pins[] = {
- /* CD */
- 172,
-};
-static const unsigned int sdhi0_cd_mux[] = {
- SDHICD0_MARK,
-};
-static const unsigned int sdhi0_wp_pins[] = {
- /* WP */
- 178,
-};
-static const unsigned int sdhi0_wp_mux[] = {
- SDHIWP0_MARK,
-};
-/* - SDHI1 ------------------------------------------------------------------ */
-static const unsigned int sdhi1_data1_pins[] = {
- /* D0 */
- 180,
-};
-static const unsigned int sdhi1_data1_mux[] = {
- SDHID1_0_MARK,
-};
-static const unsigned int sdhi1_data4_pins[] = {
- /* D[0:3] */
- 180, 181, 182, 183,
-};
-static const unsigned int sdhi1_data4_mux[] = {
- SDHID1_0_MARK, SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
-};
-static const unsigned int sdhi1_ctrl_pins[] = {
- /* CMD, CLK */
- 184, 179,
-};
-static const unsigned int sdhi1_ctrl_mux[] = {
- SDHICMD1_MARK, SDHICLK1_MARK,
-};
-
-static const unsigned int sdhi2_data1_pins[] = {
- /* D0 */
- 186,
-};
-static const unsigned int sdhi2_data1_mux[] = {
- SDHID2_0_MARK,
-};
-static const unsigned int sdhi2_data4_pins[] = {
- /* D[0:3] */
- 186, 187, 188, 189,
-};
-static const unsigned int sdhi2_data4_mux[] = {
- SDHID2_0_MARK, SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
-};
-static const unsigned int sdhi2_ctrl_pins[] = {
- /* CMD, CLK */
- 190, 185,
-};
-static const unsigned int sdhi2_ctrl_mux[] = {
- SDHICMD2_MARK, SDHICLK2_MARK,
-};
-/* - USB0 ------------------------------------------------------------------- */
-static const unsigned int usb0_vbus_pins[] = {
- /* VBUS */
- 167,
-};
-static const unsigned int usb0_vbus_mux[] = {
- VBUS0_0_MARK,
-};
-static const unsigned int usb0_otg_id_pins[] = {
- /* IDIN */
- 113,
-};
-static const unsigned int usb0_otg_id_mux[] = {
- IDIN_0_MARK,
-};
-static const unsigned int usb0_otg_ctrl_pins[] = {
- /* PWEN, EXTLP, OVCN, OVCN2 */
- 116, 114, 117, 115,
-};
-static const unsigned int usb0_otg_ctrl_mux[] = {
- PWEN_0_MARK, EXTLP_0_MARK, OVCN_0_MARK, OVCN2_0_MARK,
-};
-/* - USB1 ------------------------------------------------------------------- */
-static const unsigned int usb1_vbus_pins[] = {
- /* VBUS */
- 168,
-};
-static const unsigned int usb1_vbus_mux[] = {
- VBUS0_1_MARK,
-};
-static const unsigned int usb1_otg_id_0_pins[] = {
- /* IDIN */
- 113,
-};
-static const unsigned int usb1_otg_id_0_mux[] = {
- IDIN_1_113_MARK,
-};
-static const unsigned int usb1_otg_id_1_pins[] = {
- /* IDIN */
- 18,
-};
-static const unsigned int usb1_otg_id_1_mux[] = {
- IDIN_1_18_MARK,
-};
-static const unsigned int usb1_otg_ctrl_0_pins[] = {
- /* PWEN, EXTLP, OVCN, OVCN2 */
- 115, 116, 114, 117, 113,
-};
-static const unsigned int usb1_otg_ctrl_0_mux[] = {
- PWEN_1_115_MARK, EXTLP_1_MARK, OVCN_1_114_MARK, OVCN2_1_MARK,
-};
-static const unsigned int usb1_otg_ctrl_1_pins[] = {
- /* PWEN, EXTLP, OVCN, OVCN2 */
- 138, 116, 162, 117, 18,
-};
-static const unsigned int usb1_otg_ctrl_1_mux[] = {
- PWEN_1_138_MARK, EXTLP_1_MARK, OVCN_1_162_MARK, OVCN2_1_MARK,
-};
-
-static const struct sh_pfc_pin_group pinmux_groups[] = {
- SH_PFC_PIN_GROUP(bsc_data8),
- SH_PFC_PIN_GROUP(bsc_data16),
- SH_PFC_PIN_GROUP(bsc_cs0),
- SH_PFC_PIN_GROUP(bsc_cs2),
- SH_PFC_PIN_GROUP(bsc_cs4),
- SH_PFC_PIN_GROUP(bsc_cs5a),
- SH_PFC_PIN_GROUP(bsc_cs5b),
- SH_PFC_PIN_GROUP(bsc_cs6a),
- SH_PFC_PIN_GROUP(bsc_rd_we8),
- SH_PFC_PIN_GROUP(bsc_rd_we16),
- SH_PFC_PIN_GROUP(bsc_bs),
- SH_PFC_PIN_GROUP(bsc_rdwr),
- SH_PFC_PIN_GROUP(ceu_data_0_7),
- SH_PFC_PIN_GROUP(ceu_data_8_15),
- SH_PFC_PIN_GROUP(ceu_clk_0),
- SH_PFC_PIN_GROUP(ceu_clk_1),
- SH_PFC_PIN_GROUP(ceu_clk_2),
- SH_PFC_PIN_GROUP(ceu_sync),
- SH_PFC_PIN_GROUP(ceu_field),
- SH_PFC_PIN_GROUP(flctl_data),
- SH_PFC_PIN_GROUP(flctl_ce0),
- SH_PFC_PIN_GROUP(flctl_ce1),
- SH_PFC_PIN_GROUP(flctl_ctrl),
- SH_PFC_PIN_GROUP(fsia_mclk_in),
- SH_PFC_PIN_GROUP(fsia_mclk_out),
- SH_PFC_PIN_GROUP(fsia_sclk_in),
- SH_PFC_PIN_GROUP(fsia_sclk_out),
- SH_PFC_PIN_GROUP(fsia_data_in),
- SH_PFC_PIN_GROUP(fsia_data_out),
- SH_PFC_PIN_GROUP(fsia_spdif_0),
- SH_PFC_PIN_GROUP(fsia_spdif_1),
- SH_PFC_PIN_GROUP(fsib_mclk_in),
- SH_PFC_PIN_GROUP(hdmi),
- SH_PFC_PIN_GROUP(intc_irq0_0),
- SH_PFC_PIN_GROUP(intc_irq0_1),
- SH_PFC_PIN_GROUP(intc_irq1),
- SH_PFC_PIN_GROUP(intc_irq2_0),
- SH_PFC_PIN_GROUP(intc_irq2_1),
- SH_PFC_PIN_GROUP(intc_irq3_0),
- SH_PFC_PIN_GROUP(intc_irq3_1),
- SH_PFC_PIN_GROUP(intc_irq4_0),
- SH_PFC_PIN_GROUP(intc_irq4_1),
- SH_PFC_PIN_GROUP(intc_irq5),
- SH_PFC_PIN_GROUP(intc_irq6_0),
- SH_PFC_PIN_GROUP(intc_irq6_1),
- SH_PFC_PIN_GROUP(intc_irq7_0),
- SH_PFC_PIN_GROUP(intc_irq7_1),
- SH_PFC_PIN_GROUP(intc_irq8_0),
- SH_PFC_PIN_GROUP(intc_irq8_1),
- SH_PFC_PIN_GROUP(intc_irq9_0),
- SH_PFC_PIN_GROUP(intc_irq9_1),
- SH_PFC_PIN_GROUP(intc_irq10),
- SH_PFC_PIN_GROUP(intc_irq11),
- SH_PFC_PIN_GROUP(intc_irq12_0),
- SH_PFC_PIN_GROUP(intc_irq12_1),
- SH_PFC_PIN_GROUP(intc_irq13_0),
- SH_PFC_PIN_GROUP(intc_irq13_1),
- SH_PFC_PIN_GROUP(intc_irq14_0),
- SH_PFC_PIN_GROUP(intc_irq14_1),
- SH_PFC_PIN_GROUP(intc_irq15_0),
- SH_PFC_PIN_GROUP(intc_irq15_1),
- SH_PFC_PIN_GROUP(intc_irq16_0),
- SH_PFC_PIN_GROUP(intc_irq16_1),
- SH_PFC_PIN_GROUP(intc_irq17),
- SH_PFC_PIN_GROUP(intc_irq18),
- SH_PFC_PIN_GROUP(intc_irq19),
- SH_PFC_PIN_GROUP(intc_irq20),
- SH_PFC_PIN_GROUP(intc_irq21),
- SH_PFC_PIN_GROUP(intc_irq22),
- SH_PFC_PIN_GROUP(intc_irq23),
- SH_PFC_PIN_GROUP(intc_irq24),
- SH_PFC_PIN_GROUP(intc_irq25),
- SH_PFC_PIN_GROUP(intc_irq26_0),
- SH_PFC_PIN_GROUP(intc_irq26_1),
- SH_PFC_PIN_GROUP(intc_irq27_0),
- SH_PFC_PIN_GROUP(intc_irq27_1),
- SH_PFC_PIN_GROUP(intc_irq28_0),
- SH_PFC_PIN_GROUP(intc_irq28_1),
- SH_PFC_PIN_GROUP(intc_irq29_0),
- SH_PFC_PIN_GROUP(intc_irq29_1),
- SH_PFC_PIN_GROUP(intc_irq30_0),
- SH_PFC_PIN_GROUP(intc_irq30_1),
- SH_PFC_PIN_GROUP(intc_irq31_0),
- SH_PFC_PIN_GROUP(intc_irq31_1),
- SH_PFC_PIN_GROUP(keysc_in04_0),
- SH_PFC_PIN_GROUP(keysc_in04_1),
- SH_PFC_PIN_GROUP(keysc_in5),
- SH_PFC_PIN_GROUP(keysc_in6),
- SH_PFC_PIN_GROUP(keysc_in7),
- SH_PFC_PIN_GROUP(keysc_out4),
- SH_PFC_PIN_GROUP(keysc_out5),
- SH_PFC_PIN_GROUP(keysc_out6),
- SH_PFC_PIN_GROUP(keysc_out8),
- SH_PFC_PIN_GROUP(lcd_data8),
- SH_PFC_PIN_GROUP(lcd_data9),
- SH_PFC_PIN_GROUP(lcd_data12),
- SH_PFC_PIN_GROUP(lcd_data16),
- SH_PFC_PIN_GROUP(lcd_data18),
- SH_PFC_PIN_GROUP(lcd_data24),
- SH_PFC_PIN_GROUP(lcd_display),
- SH_PFC_PIN_GROUP(lcd_lclk),
- SH_PFC_PIN_GROUP(lcd_sync),
- SH_PFC_PIN_GROUP(lcd_sys),
- SH_PFC_PIN_GROUP(mmc0_data1_0),
- SH_PFC_PIN_GROUP(mmc0_data4_0),
- SH_PFC_PIN_GROUP(mmc0_data8_0),
- SH_PFC_PIN_GROUP(mmc0_ctrl_0),
- SH_PFC_PIN_GROUP(mmc0_data1_1),
- SH_PFC_PIN_GROUP(mmc0_data4_1),
- SH_PFC_PIN_GROUP(mmc0_data8_1),
- SH_PFC_PIN_GROUP(mmc0_ctrl_1),
- SH_PFC_PIN_GROUP(scifa0_data),
- SH_PFC_PIN_GROUP(scifa0_clk),
- SH_PFC_PIN_GROUP(scifa0_ctrl),
- SH_PFC_PIN_GROUP(scifa1_data),
- SH_PFC_PIN_GROUP(scifa1_clk),
- SH_PFC_PIN_GROUP(scifa1_ctrl),
- SH_PFC_PIN_GROUP(scifa2_data),
- SH_PFC_PIN_GROUP(scifa2_clk),
- SH_PFC_PIN_GROUP(scifa2_ctrl),
- SH_PFC_PIN_GROUP(scifa3_data),
- SH_PFC_PIN_GROUP(scifa3_clk),
- SH_PFC_PIN_GROUP(scifa3_ctrl_0),
- SH_PFC_PIN_GROUP(scifa3_ctrl_1),
- SH_PFC_PIN_GROUP(scifa4_data),
- SH_PFC_PIN_GROUP(scifa5_data),
- SH_PFC_PIN_GROUP(scifb_data),
- SH_PFC_PIN_GROUP(scifb_clk),
- SH_PFC_PIN_GROUP(scifb_ctrl),
- SH_PFC_PIN_GROUP(sdhi0_data1),
- SH_PFC_PIN_GROUP(sdhi0_data4),
- SH_PFC_PIN_GROUP(sdhi0_ctrl),
- SH_PFC_PIN_GROUP(sdhi0_cd),
- SH_PFC_PIN_GROUP(sdhi0_wp),
- SH_PFC_PIN_GROUP(sdhi1_data1),
- SH_PFC_PIN_GROUP(sdhi1_data4),
- SH_PFC_PIN_GROUP(sdhi1_ctrl),
- SH_PFC_PIN_GROUP(sdhi2_data1),
- SH_PFC_PIN_GROUP(sdhi2_data4),
- SH_PFC_PIN_GROUP(sdhi2_ctrl),
- SH_PFC_PIN_GROUP(usb0_vbus),
- SH_PFC_PIN_GROUP(usb0_otg_id),
- SH_PFC_PIN_GROUP(usb0_otg_ctrl),
- SH_PFC_PIN_GROUP(usb1_vbus),
- SH_PFC_PIN_GROUP(usb1_otg_id_0),
- SH_PFC_PIN_GROUP(usb1_otg_id_1),
- SH_PFC_PIN_GROUP(usb1_otg_ctrl_0),
- SH_PFC_PIN_GROUP(usb1_otg_ctrl_1),
-};
-
-static const char * const bsc_groups[] = {
- "bsc_data8",
- "bsc_data16",
- "bsc_cs0",
- "bsc_cs2",
- "bsc_cs4",
- "bsc_cs5a",
- "bsc_cs5b",
- "bsc_cs6a",
- "bsc_rd_we8",
- "bsc_rd_we16",
- "bsc_bs",
- "bsc_rdwr",
-};
-
-static const char * const ceu_groups[] = {
- "ceu_data_0_7",
- "ceu_data_8_15",
- "ceu_clk_0",
- "ceu_clk_1",
- "ceu_clk_2",
- "ceu_sync",
- "ceu_field",
-};
-
-static const char * const flctl_groups[] = {
- "flctl_data",
- "flctl_ce0",
- "flctl_ce1",
- "flctl_ctrl",
-};
-
-static const char * const fsia_groups[] = {
- "fsia_mclk_in",
- "fsia_mclk_out",
- "fsia_sclk_in",
- "fsia_sclk_out",
- "fsia_data_in",
- "fsia_data_out",
- "fsia_spdif_0",
- "fsia_spdif_1",
-};
-
-static const char * const fsib_groups[] = {
- "fsib_mclk_in",
-};
-
-static const char * const hdmi_groups[] = {
- "hdmi",
-};
-
-static const char * const intc_groups[] = {
- "intc_irq0_0",
- "intc_irq0_1",
- "intc_irq1",
- "intc_irq2_0",
- "intc_irq2_1",
- "intc_irq3_0",
- "intc_irq3_1",
- "intc_irq4_0",
- "intc_irq4_1",
- "intc_irq5",
- "intc_irq6_0",
- "intc_irq6_1",
- "intc_irq7_0",
- "intc_irq7_1",
- "intc_irq8_0",
- "intc_irq8_1",
- "intc_irq9_0",
- "intc_irq9_1",
- "intc_irq10",
- "intc_irq11",
- "intc_irq12_0",
- "intc_irq12_1",
- "intc_irq13_0",
- "intc_irq13_1",
- "intc_irq14_0",
- "intc_irq14_1",
- "intc_irq15_0",
- "intc_irq15_1",
- "intc_irq16_0",
- "intc_irq16_1",
- "intc_irq17",
- "intc_irq18",
- "intc_irq19",
- "intc_irq20",
- "intc_irq21",
- "intc_irq22",
- "intc_irq23",
- "intc_irq24",
- "intc_irq25",
- "intc_irq26_0",
- "intc_irq26_1",
- "intc_irq27_0",
- "intc_irq27_1",
- "intc_irq28_0",
- "intc_irq28_1",
- "intc_irq29_0",
- "intc_irq29_1",
- "intc_irq30_0",
- "intc_irq30_1",
- "intc_irq31_0",
- "intc_irq31_1",
-};
-
-static const char * const keysc_groups[] = {
- "keysc_in04_0",
- "keysc_in04_1",
- "keysc_in5",
- "keysc_in6",
- "keysc_in7",
- "keysc_out4",
- "keysc_out5",
- "keysc_out6",
- "keysc_out8",
-};
-
-static const char * const lcd_groups[] = {
- "lcd_data8",
- "lcd_data9",
- "lcd_data12",
- "lcd_data16",
- "lcd_data18",
- "lcd_data24",
- "lcd_display",
- "lcd_lclk",
- "lcd_sync",
- "lcd_sys",
-};
-
-static const char * const mmc0_groups[] = {
- "mmc0_data1_0",
- "mmc0_data4_0",
- "mmc0_data8_0",
- "mmc0_ctrl_0",
- "mmc0_data1_1",
- "mmc0_data4_1",
- "mmc0_data8_1",
- "mmc0_ctrl_1",
-};
-
-static const char * const scifa0_groups[] = {
- "scifa0_data",
- "scifa0_clk",
- "scifa0_ctrl",
-};
-
-static const char * const scifa1_groups[] = {
- "scifa1_data",
- "scifa1_clk",
- "scifa1_ctrl",
-};
-
-static const char * const scifa2_groups[] = {
- "scifa2_data",
- "scifa2_clk",
- "scifa2_ctrl",
-};
-
-static const char * const scifa3_groups[] = {
- "scifa3_data",
- "scifa3_clk",
- "scifa3_ctrl_0",
- "scifa3_ctrl_1",
-};
-
-static const char * const scifa4_groups[] = {
- "scifa4_data",
-};
-
-static const char * const scifa5_groups[] = {
- "scifa5_data",
-};
-
-static const char * const scifb_groups[] = {
- "scifb_data",
- "scifb_clk",
- "scifb_ctrl",
-};
-
-static const char * const sdhi0_groups[] = {
- "sdhi0_data1",
- "sdhi0_data4",
- "sdhi0_ctrl",
- "sdhi0_cd",
- "sdhi0_wp",
-};
-
-static const char * const sdhi1_groups[] = {
- "sdhi1_data1",
- "sdhi1_data4",
- "sdhi1_ctrl",
-};
-
-static const char * const sdhi2_groups[] = {
- "sdhi2_data1",
- "sdhi2_data4",
- "sdhi2_ctrl",
-};
-
-static const char * const usb0_groups[] = {
- "usb0_vbus",
- "usb0_otg_id",
- "usb0_otg_ctrl",
-};
-
-static const char * const usb1_groups[] = {
- "usb1_vbus",
- "usb1_otg_id_0",
- "usb1_otg_id_1",
- "usb1_otg_ctrl_0",
- "usb1_otg_ctrl_1",
-};
-
-static const struct sh_pfc_function pinmux_functions[] = {
- SH_PFC_FUNCTION(bsc),
- SH_PFC_FUNCTION(ceu),
- SH_PFC_FUNCTION(flctl),
- SH_PFC_FUNCTION(fsia),
- SH_PFC_FUNCTION(fsib),
- SH_PFC_FUNCTION(hdmi),
- SH_PFC_FUNCTION(intc),
- SH_PFC_FUNCTION(keysc),
- SH_PFC_FUNCTION(lcd),
- SH_PFC_FUNCTION(mmc0),
- SH_PFC_FUNCTION(scifa0),
- SH_PFC_FUNCTION(scifa1),
- SH_PFC_FUNCTION(scifa2),
- SH_PFC_FUNCTION(scifa3),
- SH_PFC_FUNCTION(scifa4),
- SH_PFC_FUNCTION(scifa5),
- SH_PFC_FUNCTION(scifb),
- SH_PFC_FUNCTION(sdhi0),
- SH_PFC_FUNCTION(sdhi1),
- SH_PFC_FUNCTION(sdhi2),
- SH_PFC_FUNCTION(usb0),
- SH_PFC_FUNCTION(usb1),
-};
-
-static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- PORTCR(0, 0xE6051000), /* PORT0CR */
- PORTCR(1, 0xE6051001), /* PORT1CR */
- PORTCR(2, 0xE6051002), /* PORT2CR */
- PORTCR(3, 0xE6051003), /* PORT3CR */
- PORTCR(4, 0xE6051004), /* PORT4CR */
- PORTCR(5, 0xE6051005), /* PORT5CR */
- PORTCR(6, 0xE6051006), /* PORT6CR */
- PORTCR(7, 0xE6051007), /* PORT7CR */
- PORTCR(8, 0xE6051008), /* PORT8CR */
- PORTCR(9, 0xE6051009), /* PORT9CR */
- PORTCR(10, 0xE605100A), /* PORT10CR */
- PORTCR(11, 0xE605100B), /* PORT11CR */
- PORTCR(12, 0xE605100C), /* PORT12CR */
- PORTCR(13, 0xE605100D), /* PORT13CR */
- PORTCR(14, 0xE605100E), /* PORT14CR */
- PORTCR(15, 0xE605100F), /* PORT15CR */
- PORTCR(16, 0xE6051010), /* PORT16CR */
- PORTCR(17, 0xE6051011), /* PORT17CR */
- PORTCR(18, 0xE6051012), /* PORT18CR */
- PORTCR(19, 0xE6051013), /* PORT19CR */
- PORTCR(20, 0xE6051014), /* PORT20CR */
- PORTCR(21, 0xE6051015), /* PORT21CR */
- PORTCR(22, 0xE6051016), /* PORT22CR */
- PORTCR(23, 0xE6051017), /* PORT23CR */
- PORTCR(24, 0xE6051018), /* PORT24CR */
- PORTCR(25, 0xE6051019), /* PORT25CR */
- PORTCR(26, 0xE605101A), /* PORT26CR */
- PORTCR(27, 0xE605101B), /* PORT27CR */
- PORTCR(28, 0xE605101C), /* PORT28CR */
- PORTCR(29, 0xE605101D), /* PORT29CR */
- PORTCR(30, 0xE605101E), /* PORT30CR */
- PORTCR(31, 0xE605101F), /* PORT31CR */
- PORTCR(32, 0xE6051020), /* PORT32CR */
- PORTCR(33, 0xE6051021), /* PORT33CR */
- PORTCR(34, 0xE6051022), /* PORT34CR */
- PORTCR(35, 0xE6051023), /* PORT35CR */
- PORTCR(36, 0xE6051024), /* PORT36CR */
- PORTCR(37, 0xE6051025), /* PORT37CR */
- PORTCR(38, 0xE6051026), /* PORT38CR */
- PORTCR(39, 0xE6051027), /* PORT39CR */
- PORTCR(40, 0xE6051028), /* PORT40CR */
- PORTCR(41, 0xE6051029), /* PORT41CR */
- PORTCR(42, 0xE605102A), /* PORT42CR */
- PORTCR(43, 0xE605102B), /* PORT43CR */
- PORTCR(44, 0xE605102C), /* PORT44CR */
- PORTCR(45, 0xE605102D), /* PORT45CR */
- PORTCR(46, 0xE605202E), /* PORT46CR */
- PORTCR(47, 0xE605202F), /* PORT47CR */
- PORTCR(48, 0xE6052030), /* PORT48CR */
- PORTCR(49, 0xE6052031), /* PORT49CR */
- PORTCR(50, 0xE6052032), /* PORT50CR */
- PORTCR(51, 0xE6052033), /* PORT51CR */
- PORTCR(52, 0xE6052034), /* PORT52CR */
- PORTCR(53, 0xE6052035), /* PORT53CR */
- PORTCR(54, 0xE6052036), /* PORT54CR */
- PORTCR(55, 0xE6052037), /* PORT55CR */
- PORTCR(56, 0xE6052038), /* PORT56CR */
- PORTCR(57, 0xE6052039), /* PORT57CR */
- PORTCR(58, 0xE605203A), /* PORT58CR */
- PORTCR(59, 0xE605203B), /* PORT59CR */
- PORTCR(60, 0xE605203C), /* PORT60CR */
- PORTCR(61, 0xE605203D), /* PORT61CR */
- PORTCR(62, 0xE605203E), /* PORT62CR */
- PORTCR(63, 0xE605203F), /* PORT63CR */
- PORTCR(64, 0xE6052040), /* PORT64CR */
- PORTCR(65, 0xE6052041), /* PORT65CR */
- PORTCR(66, 0xE6052042), /* PORT66CR */
- PORTCR(67, 0xE6052043), /* PORT67CR */
- PORTCR(68, 0xE6052044), /* PORT68CR */
- PORTCR(69, 0xE6052045), /* PORT69CR */
- PORTCR(70, 0xE6052046), /* PORT70CR */
- PORTCR(71, 0xE6052047), /* PORT71CR */
- PORTCR(72, 0xE6052048), /* PORT72CR */
- PORTCR(73, 0xE6052049), /* PORT73CR */
- PORTCR(74, 0xE605204A), /* PORT74CR */
- PORTCR(75, 0xE605204B), /* PORT75CR */
- PORTCR(76, 0xE605004C), /* PORT76CR */
- PORTCR(77, 0xE605004D), /* PORT77CR */
- PORTCR(78, 0xE605004E), /* PORT78CR */
- PORTCR(79, 0xE605004F), /* PORT79CR */
- PORTCR(80, 0xE6050050), /* PORT80CR */
- PORTCR(81, 0xE6050051), /* PORT81CR */
- PORTCR(82, 0xE6050052), /* PORT82CR */
- PORTCR(83, 0xE6050053), /* PORT83CR */
- PORTCR(84, 0xE6050054), /* PORT84CR */
- PORTCR(85, 0xE6050055), /* PORT85CR */
- PORTCR(86, 0xE6050056), /* PORT86CR */
- PORTCR(87, 0xE6050057), /* PORT87CR */
- PORTCR(88, 0xE6050058), /* PORT88CR */
- PORTCR(89, 0xE6050059), /* PORT89CR */
- PORTCR(90, 0xE605005A), /* PORT90CR */
- PORTCR(91, 0xE605005B), /* PORT91CR */
- PORTCR(92, 0xE605005C), /* PORT92CR */
- PORTCR(93, 0xE605005D), /* PORT93CR */
- PORTCR(94, 0xE605005E), /* PORT94CR */
- PORTCR(95, 0xE605005F), /* PORT95CR */
- PORTCR(96, 0xE6050060), /* PORT96CR */
- PORTCR(97, 0xE6050061), /* PORT97CR */
- PORTCR(98, 0xE6050062), /* PORT98CR */
- PORTCR(99, 0xE6050063), /* PORT99CR */
- PORTCR(100, 0xE6053064), /* PORT100CR */
- PORTCR(101, 0xE6053065), /* PORT101CR */
- PORTCR(102, 0xE6053066), /* PORT102CR */
- PORTCR(103, 0xE6053067), /* PORT103CR */
- PORTCR(104, 0xE6053068), /* PORT104CR */
- PORTCR(105, 0xE6053069), /* PORT105CR */
- PORTCR(106, 0xE605306A), /* PORT106CR */
- PORTCR(107, 0xE605306B), /* PORT107CR */
- PORTCR(108, 0xE605306C), /* PORT108CR */
- PORTCR(109, 0xE605306D), /* PORT109CR */
- PORTCR(110, 0xE605306E), /* PORT110CR */
- PORTCR(111, 0xE605306F), /* PORT111CR */
- PORTCR(112, 0xE6053070), /* PORT112CR */
- PORTCR(113, 0xE6053071), /* PORT113CR */
- PORTCR(114, 0xE6053072), /* PORT114CR */
- PORTCR(115, 0xE6053073), /* PORT115CR */
- PORTCR(116, 0xE6053074), /* PORT116CR */
- PORTCR(117, 0xE6053075), /* PORT117CR */
- PORTCR(118, 0xE6053076), /* PORT118CR */
- PORTCR(119, 0xE6053077), /* PORT119CR */
- PORTCR(120, 0xE6053078), /* PORT120CR */
- PORTCR(121, 0xE6050079), /* PORT121CR */
- PORTCR(122, 0xE605007A), /* PORT122CR */
- PORTCR(123, 0xE605007B), /* PORT123CR */
- PORTCR(124, 0xE605007C), /* PORT124CR */
- PORTCR(125, 0xE605007D), /* PORT125CR */
- PORTCR(126, 0xE605007E), /* PORT126CR */
- PORTCR(127, 0xE605007F), /* PORT127CR */
- PORTCR(128, 0xE6050080), /* PORT128CR */
- PORTCR(129, 0xE6050081), /* PORT129CR */
- PORTCR(130, 0xE6050082), /* PORT130CR */
- PORTCR(131, 0xE6050083), /* PORT131CR */
- PORTCR(132, 0xE6050084), /* PORT132CR */
- PORTCR(133, 0xE6050085), /* PORT133CR */
- PORTCR(134, 0xE6050086), /* PORT134CR */
- PORTCR(135, 0xE6050087), /* PORT135CR */
- PORTCR(136, 0xE6050088), /* PORT136CR */
- PORTCR(137, 0xE6050089), /* PORT137CR */
- PORTCR(138, 0xE605008A), /* PORT138CR */
- PORTCR(139, 0xE605008B), /* PORT139CR */
- PORTCR(140, 0xE605008C), /* PORT140CR */
- PORTCR(141, 0xE605008D), /* PORT141CR */
- PORTCR(142, 0xE605008E), /* PORT142CR */
- PORTCR(143, 0xE605008F), /* PORT143CR */
- PORTCR(144, 0xE6050090), /* PORT144CR */
- PORTCR(145, 0xE6050091), /* PORT145CR */
- PORTCR(146, 0xE6050092), /* PORT146CR */
- PORTCR(147, 0xE6050093), /* PORT147CR */
- PORTCR(148, 0xE6050094), /* PORT148CR */
- PORTCR(149, 0xE6050095), /* PORT149CR */
- PORTCR(150, 0xE6050096), /* PORT150CR */
- PORTCR(151, 0xE6050097), /* PORT151CR */
- PORTCR(152, 0xE6053098), /* PORT152CR */
- PORTCR(153, 0xE6053099), /* PORT153CR */
- PORTCR(154, 0xE605309A), /* PORT154CR */
- PORTCR(155, 0xE605309B), /* PORT155CR */
- PORTCR(156, 0xE605009C), /* PORT156CR */
- PORTCR(157, 0xE605009D), /* PORT157CR */
- PORTCR(158, 0xE605009E), /* PORT158CR */
- PORTCR(159, 0xE605009F), /* PORT159CR */
- PORTCR(160, 0xE60500A0), /* PORT160CR */
- PORTCR(161, 0xE60500A1), /* PORT161CR */
- PORTCR(162, 0xE60500A2), /* PORT162CR */
- PORTCR(163, 0xE60500A3), /* PORT163CR */
- PORTCR(164, 0xE60500A4), /* PORT164CR */
- PORTCR(165, 0xE60500A5), /* PORT165CR */
- PORTCR(166, 0xE60500A6), /* PORT166CR */
- PORTCR(167, 0xE60520A7), /* PORT167CR */
- PORTCR(168, 0xE60520A8), /* PORT168CR */
- PORTCR(169, 0xE60520A9), /* PORT169CR */
- PORTCR(170, 0xE60520AA), /* PORT170CR */
- PORTCR(171, 0xE60520AB), /* PORT171CR */
- PORTCR(172, 0xE60520AC), /* PORT172CR */
- PORTCR(173, 0xE60520AD), /* PORT173CR */
- PORTCR(174, 0xE60520AE), /* PORT174CR */
- PORTCR(175, 0xE60520AF), /* PORT175CR */
- PORTCR(176, 0xE60520B0), /* PORT176CR */
- PORTCR(177, 0xE60520B1), /* PORT177CR */
- PORTCR(178, 0xE60520B2), /* PORT178CR */
- PORTCR(179, 0xE60520B3), /* PORT179CR */
- PORTCR(180, 0xE60520B4), /* PORT180CR */
- PORTCR(181, 0xE60520B5), /* PORT181CR */
- PORTCR(182, 0xE60520B6), /* PORT182CR */
- PORTCR(183, 0xE60520B7), /* PORT183CR */
- PORTCR(184, 0xE60520B8), /* PORT184CR */
- PORTCR(185, 0xE60520B9), /* PORT185CR */
- PORTCR(186, 0xE60520BA), /* PORT186CR */
- PORTCR(187, 0xE60520BB), /* PORT187CR */
- PORTCR(188, 0xE60520BC), /* PORT188CR */
- PORTCR(189, 0xE60520BD), /* PORT189CR */
- PORTCR(190, 0xE60520BE), /* PORT190CR */
-
- { PINMUX_CFG_REG("MSEL1CR", 0xE605800C, 32, 1) {
- MSEL1CR_31_0, MSEL1CR_31_1,
- MSEL1CR_30_0, MSEL1CR_30_1,
- MSEL1CR_29_0, MSEL1CR_29_1,
- MSEL1CR_28_0, MSEL1CR_28_1,
- MSEL1CR_27_0, MSEL1CR_27_1,
- MSEL1CR_26_0, MSEL1CR_26_1,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- MSEL1CR_16_0, MSEL1CR_16_1,
- MSEL1CR_15_0, MSEL1CR_15_1,
- MSEL1CR_14_0, MSEL1CR_14_1,
- MSEL1CR_13_0, MSEL1CR_13_1,
- MSEL1CR_12_0, MSEL1CR_12_1,
- 0, 0, 0, 0,
- MSEL1CR_9_0, MSEL1CR_9_1,
- MSEL1CR_8_0, MSEL1CR_8_1,
- MSEL1CR_7_0, MSEL1CR_7_1,
- MSEL1CR_6_0, MSEL1CR_6_1,
- 0, 0,
- MSEL1CR_4_0, MSEL1CR_4_1,
- MSEL1CR_3_0, MSEL1CR_3_1,
- MSEL1CR_2_0, MSEL1CR_2_1,
- 0, 0,
- MSEL1CR_0_0, MSEL1CR_0_1,
- }
- },
- { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- MSEL3CR_27_0, MSEL3CR_27_1,
- MSEL3CR_26_0, MSEL3CR_26_1,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- MSEL3CR_21_0, MSEL3CR_21_1,
- MSEL3CR_20_0, MSEL3CR_20_1,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- MSEL3CR_15_0, MSEL3CR_15_1,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0,
- MSEL3CR_9_0, MSEL3CR_9_1,
- 0, 0, 0, 0,
- MSEL3CR_6_0, MSEL3CR_6_1,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- MSEL4CR_19_0, MSEL4CR_19_1,
- MSEL4CR_18_0, MSEL4CR_18_1,
- MSEL4CR_17_0, MSEL4CR_17_1,
- MSEL4CR_16_0, MSEL4CR_16_1,
- MSEL4CR_15_0, MSEL4CR_15_1,
- MSEL4CR_14_0, MSEL4CR_14_1,
- 0, 0, 0, 0,
- 0, 0,
- MSEL4CR_10_0, MSEL4CR_10_1,
- 0, 0, 0, 0,
- 0, 0,
- MSEL4CR_6_0, MSEL4CR_6_1,
- 0, 0,
- MSEL4CR_4_0, MSEL4CR_4_1,
- 0, 0, 0, 0,
- MSEL4CR_1_0, MSEL4CR_1_1,
- 0, 0,
- }
- },
- { },
-};
-
-static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
- PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
- PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
- PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
- PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
- PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_DATA_REG("PORTL127_096DR", 0xE605400C, 32) {
- PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
- PORT123_DATA, PORT122_DATA, PORT121_DATA, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTL159_128DR", 0xE6054010, 32) {
- PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
- 0, 0, 0, 0,
- PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
- PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
- PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
- PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
- PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
- PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTL191_160DR", 0xE6054014, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, PORT166_DATA, PORT165_DATA, PORT164_DATA,
- PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTD031_000DR", 0xE6055000, 32) {
- PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
- PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
- PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
- PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
- PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
- PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
- PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
- PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTD063_032DR", 0xE6055004, 32) {
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, PORT45_DATA, PORT44_DATA,
- PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
- PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
- PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTR063_032DR", 0xE6056004, 32) {
- PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
- PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
- PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
- PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
- PORT47_DATA, PORT46_DATA, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_DATA_REG("PORTR095_064DR", 0xE6056008, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
- PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
- PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
- }
- },
- { PINMUX_DATA_REG("PORTR191_160DR", 0xE6056014, 32) {
- 0, PORT190_DATA, PORT189_DATA, PORT188_DATA,
- PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
- PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
- PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
- PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
- PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
- PORT167_DATA, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_DATA_REG("PORTU127_096DR", 0xE605700C, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, PORT120_DATA,
- PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
- PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
- PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
- PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
- PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
- 0, 0, 0, 0,
- }
- },
- { PINMUX_DATA_REG("PORTU159_128DR", 0xE6057010, 32) {
- 0, 0, 0, 0,
- PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- }
- },
- { },
-};
-
-#define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
-#define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
-static const struct pinmux_irq pinmux_irqs[] = {
- PINMUX_IRQ(EXT_IRQ16L(0), 6, 162),
- PINMUX_IRQ(EXT_IRQ16L(1), 12),
- PINMUX_IRQ(EXT_IRQ16L(2), 4, 5),
- PINMUX_IRQ(EXT_IRQ16L(3), 8, 16),
- PINMUX_IRQ(EXT_IRQ16L(4), 17, 163),
- PINMUX_IRQ(EXT_IRQ16L(5), 18),
- PINMUX_IRQ(EXT_IRQ16L(6), 39, 164),
- PINMUX_IRQ(EXT_IRQ16L(7), 40, 167),
- PINMUX_IRQ(EXT_IRQ16L(8), 41, 168),
- PINMUX_IRQ(EXT_IRQ16L(9), 42, 169),
- PINMUX_IRQ(EXT_IRQ16L(10), 65),
- PINMUX_IRQ(EXT_IRQ16L(11), 67),
- PINMUX_IRQ(EXT_IRQ16L(12), 80, 137),
- PINMUX_IRQ(EXT_IRQ16L(13), 81, 145),
- PINMUX_IRQ(EXT_IRQ16L(14), 82, 146),
- PINMUX_IRQ(EXT_IRQ16L(15), 83, 147),
- PINMUX_IRQ(EXT_IRQ16H(16), 84, 170),
- PINMUX_IRQ(EXT_IRQ16H(17), 85),
- PINMUX_IRQ(EXT_IRQ16H(18), 86),
- PINMUX_IRQ(EXT_IRQ16H(19), 87),
- PINMUX_IRQ(EXT_IRQ16H(20), 92),
- PINMUX_IRQ(EXT_IRQ16H(21), 93),
- PINMUX_IRQ(EXT_IRQ16H(22), 94),
- PINMUX_IRQ(EXT_IRQ16H(23), 95),
- PINMUX_IRQ(EXT_IRQ16H(24), 112),
- PINMUX_IRQ(EXT_IRQ16H(25), 119),
- PINMUX_IRQ(EXT_IRQ16H(26), 121, 172),
- PINMUX_IRQ(EXT_IRQ16H(27), 122, 180),
- PINMUX_IRQ(EXT_IRQ16H(28), 123, 181),
- PINMUX_IRQ(EXT_IRQ16H(29), 129, 182),
- PINMUX_IRQ(EXT_IRQ16H(30), 130, 183),
- PINMUX_IRQ(EXT_IRQ16H(31), 138, 184),
-};
-
-#define PORTnCR_PULMD_OFF (0 << 6)
-#define PORTnCR_PULMD_DOWN (2 << 6)
-#define PORTnCR_PULMD_UP (3 << 6)
-#define PORTnCR_PULMD_MASK (3 << 6)
-
-struct sh7372_portcr_group {
- unsigned int end_pin;
- unsigned int offset;
-};
-
-static const struct sh7372_portcr_group sh7372_portcr_offsets[] = {
- { 45, 0x1000 }, { 75, 0x2000 }, { 99, 0x0000 }, { 120, 0x3000 },
- { 151, 0x0000 }, { 155, 0x3000 }, { 166, 0x0000 }, { 190, 0x2000 },
-};
-
-static void __iomem *sh7372_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
-{
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(sh7372_portcr_offsets); ++i) {
- const struct sh7372_portcr_group *group =
- &sh7372_portcr_offsets[i];
-
- if (pin <= group->end_pin)
- return pfc->windows->virt + group->offset + pin;
- }
-
- return NULL;
-}
-
-static unsigned int sh7372_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
-{
- void __iomem *addr = sh7372_pinmux_portcr(pfc, pin);
- u32 value = ioread8(addr) & PORTnCR_PULMD_MASK;
-
- switch (value) {
- case PORTnCR_PULMD_UP:
- return PIN_CONFIG_BIAS_PULL_UP;
- case PORTnCR_PULMD_DOWN:
- return PIN_CONFIG_BIAS_PULL_DOWN;
- case PORTnCR_PULMD_OFF:
- default:
- return PIN_CONFIG_BIAS_DISABLE;
- }
-}
-
-static void sh7372_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
- unsigned int bias)
-{
- void __iomem *addr = sh7372_pinmux_portcr(pfc, pin);
- u32 value = ioread8(addr) & ~PORTnCR_PULMD_MASK;
-
- switch (bias) {
- case PIN_CONFIG_BIAS_PULL_UP:
- value |= PORTnCR_PULMD_UP;
- break;
- case PIN_CONFIG_BIAS_PULL_DOWN:
- value |= PORTnCR_PULMD_DOWN;
- break;
- }
-
- iowrite8(value, addr);
-}
-
-static const struct sh_pfc_soc_operations sh7372_pfc_ops = {
- .get_bias = sh7372_pinmux_get_bias,
- .set_bias = sh7372_pinmux_set_bias,
-};
-
-const struct sh_pfc_soc_info sh7372_pinmux_info = {
- .name = "sh7372_pfc",
- .ops = &sh7372_pfc_ops,
-
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .pins = pinmux_pins,
- .nr_pins = ARRAY_SIZE(pinmux_pins),
- .groups = pinmux_groups,
- .nr_groups = ARRAY_SIZE(pinmux_groups),
- .functions = pinmux_functions,
- .nr_functions = ARRAY_SIZE(pinmux_functions),
-
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-
- .gpio_irq = pinmux_irqs,
- .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
-};
^ permalink raw reply [flat|nested] 58+ messages in thread* Re: [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
2015-01-21 4:54 ` Magnus Damm
@ 2015-01-21 12:40 ` Laurent Pinchart
-1 siblings, 0 replies; 58+ messages in thread
From: Laurent Pinchart @ 2015-01-21 12:40 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 21 January 2015 13:54:57 Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Remove sh7372 PFC support as part of the sh7372 and Mackerel
> legacy code removal.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
>
> drivers/pinctrl/sh-pfc/Kconfig | 5
> drivers/pinctrl/sh-pfc/Makefile | 1
> drivers/pinctrl/sh-pfc/core.c | 9
> drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 --------------------------------
> 4 files changed, 2660 deletions(-)
There's a leftover reference to sh7372_pinmux_info in drivers/pinctrl/sh-
pfc/core.h.
Apart from that,
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
@ 2015-01-21 12:40 ` Laurent Pinchart
0 siblings, 0 replies; 58+ messages in thread
From: Laurent Pinchart @ 2015-01-21 12:40 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 21 January 2015 13:54:57 Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Remove sh7372 PFC support as part of the sh7372 and Mackerel
> legacy code removal.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
>
> drivers/pinctrl/sh-pfc/Kconfig | 5
> drivers/pinctrl/sh-pfc/Makefile | 1
> drivers/pinctrl/sh-pfc/core.c | 9
> drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 --------------------------------
> 4 files changed, 2660 deletions(-)
There's a leftover reference to sh7372_pinmux_info in drivers/pinctrl/sh-
pfc/core.h.
Apart from that,
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
2015-01-21 12:40 ` Laurent Pinchart
@ 2015-01-26 4:15 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 4:15 UTC (permalink / raw)
To: linux-arm-kernel
Hi Laurent,
On Wed, Jan 21, 2015 at 9:40 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Wednesday 21 January 2015 13:54:57 Magnus Damm wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Remove sh7372 PFC support as part of the sh7372 and Mackerel
>> legacy code removal.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> ---
>>
>> drivers/pinctrl/sh-pfc/Kconfig | 5
>> drivers/pinctrl/sh-pfc/Makefile | 1
>> drivers/pinctrl/sh-pfc/core.c | 9
>> drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 --------------------------------
>> 4 files changed, 2660 deletions(-)
>
> There's a leftover reference to sh7372_pinmux_info in drivers/pinctrl/sh-
> pfc/core.h.
>
> Apart from that,
>
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thanks, will fix and resubmit!
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
@ 2015-01-26 4:15 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 4:15 UTC (permalink / raw)
To: linux-arm-kernel
Hi Laurent,
On Wed, Jan 21, 2015 at 9:40 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Wednesday 21 January 2015 13:54:57 Magnus Damm wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Remove sh7372 PFC support as part of the sh7372 and Mackerel
>> legacy code removal.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> ---
>>
>> drivers/pinctrl/sh-pfc/Kconfig | 5
>> drivers/pinctrl/sh-pfc/Makefile | 1
>> drivers/pinctrl/sh-pfc/core.c | 9
>> drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 --------------------------------
>> 4 files changed, 2660 deletions(-)
>
> There's a leftover reference to sh7372_pinmux_info in drivers/pinctrl/sh-
> pfc/core.h.
>
> Apart from that,
>
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thanks, will fix and resubmit!
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 4:55 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:55 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the DT compatible string entry for the now unsupported sh7372 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
--- 0001/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ work/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt 2015-01-21 12:12:15.357561911 +0900
@@ -1,7 +1,7 @@
* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
-The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH7372,
-SH73A0, R8A73A4 and R8A7740 it also acts as a GPIO controller.
+The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
+R8A73A4 and R8A7740 it also acts as a GPIO controller.
Pin Control
@@ -16,7 +16,6 @@ Required Properties:
- "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
- "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
- "renesas,pfc-r8a7791": for R8A7791 (R-Car M2) compatible pin-controller.
- - "renesas,pfc-sh7372": for SH7372 (SH-Mobile AP4) compatible pin-controller.
- "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
- reg: Base address and length of each memory resource used by the pin
@@ -75,8 +74,7 @@ bias-disable, bias-pull-up and bias-pull
GPIO
----
-On SH7372, SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller
-node.
+On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
Required Properties:
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
@ 2015-01-21 4:55 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-21 4:55 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove the DT compatible string entry for the now unsupported sh7372 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
--- 0001/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ work/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt 2015-01-21 12:12:15.357561911 +0900
@@ -1,7 +1,7 @@
* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
-The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH7372,
-SH73A0, R8A73A4 and R8A7740 it also acts as a GPIO controller.
+The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
+R8A73A4 and R8A7740 it also acts as a GPIO controller.
Pin Control
@@ -16,7 +16,6 @@ Required Properties:
- "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
- "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
- "renesas,pfc-r8a7791": for R8A7791 (R-Car M2) compatible pin-controller.
- - "renesas,pfc-sh7372": for SH7372 (SH-Mobile AP4) compatible pin-controller.
- "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
- reg: Base address and length of each memory resource used by the pin
@@ -75,8 +74,7 @@ bias-disable, bias-pull-up and bias-pull
GPIO
----
-On SH7372, SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller
-node.
+On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
Required Properties:
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 5:25 ` Kuninori Morimoto
-1 siblings, 0 replies; 58+ messages in thread
From: Kuninori Morimoto @ 2015-01-21 5:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi
> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>
> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
We spent much time for these.
Good-bye sh7372... Good-bye mackerel...
Best regards
---
Kuninori Morimoto
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-21 5:25 ` Kuninori Morimoto
0 siblings, 0 replies; 58+ messages in thread
From: Kuninori Morimoto @ 2015-01-21 5:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi
> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>
> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
We spent much time for these.
Good-bye sh7372... Good-bye mackerel...
Best regards
---
Kuninori Morimoto
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-21 5:25 ` Kuninori Morimoto
@ 2015-01-21 10:47 ` Geert Uytterhoeven
-1 siblings, 0 replies; 58+ messages in thread
From: Geert Uytterhoeven @ 2015-01-21 10:47 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus, Morimoto-san,
On Wed, Jan 21, 2015 at 6:25 AM, Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
>> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>>
>> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
>> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
>> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
>> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
>> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
>> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
>> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
>> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
>> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
>> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
>> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
>> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
>> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>
> We spent much time for these.
> Good-bye sh7372... Good-bye mackerel...
Amen...
Still to be removed: a few compatible entries in code and DT binding
documentation; "git grep -i sh7372" is your friend ;-)
It seems arch/sh still supports Linux running on the SH core in sh7372?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-21 10:47 ` Geert Uytterhoeven
0 siblings, 0 replies; 58+ messages in thread
From: Geert Uytterhoeven @ 2015-01-21 10:47 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus, Morimoto-san,
On Wed, Jan 21, 2015 at 6:25 AM, Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
>> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>>
>> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
>> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
>> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
>> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
>> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
>> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
>> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
>> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
>> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
>> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
>> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
>> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
>> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>
> We spent much time for these.
> Good-bye sh7372... Good-bye mackerel...
Amen...
Still to be removed: a few compatible entries in code and DT binding
documentation; "git grep -i sh7372" is your friend ;-)
It seems arch/sh still supports Linux running on the SH core in sh7372?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 58+ messages in thread* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-21 10:47 ` Geert Uytterhoeven
@ 2015-01-26 6:47 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 6:47 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Wed, Jan 21, 2015 at 7:47 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus, Morimoto-san,
>
> On Wed, Jan 21, 2015 at 6:25 AM, Kuninori Morimoto
> <kuninori.morimoto.gx@renesas.com> wrote:
>>> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>>>
>>> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
>>> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
>>> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
>>> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
>>> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
>>> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
>>> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
>>> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
>>> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
>>> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
>>> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
>>> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
>>> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>>
>> We spent much time for these.
>> Good-bye sh7372... Good-bye mackerel...
>
> Amen...
>
> Still to be removed: a few compatible entries in code and DT binding
> documentation; "git grep -i sh7372" is your friend ;-)
Right, there are a couple of entries across the place. My feeling is
that we can handle them independently for each driver.
> It seems arch/sh still supports Linux running on the SH core in sh7372?
I don't think we have any support upstream for that, but I recall
cooking up some prototype running two linux instances in separate
memory spaces and using virtio as mailbox interface in between. I also
recall that SH4AL-DSP CPU core tend to be a PITA to handle
toolchain-wise, but SH4 with FPU is much easier with current (or
yesteryear) toolchain. Exactly which SH core that is included in
sh7372 I'm not so sure about. =)
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-26 6:47 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 6:47 UTC (permalink / raw)
To: linux-arm-kernel
Hi Geert,
On Wed, Jan 21, 2015 at 7:47 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hi Magnus, Morimoto-san,
>
> On Wed, Jan 21, 2015 at 6:25 AM, Kuninori Morimoto
> <kuninori.morimoto.gx@renesas.com> wrote:
>>> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>>>
>>> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
>>> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
>>> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
>>> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
>>> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
>>> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
>>> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
>>> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
>>> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
>>> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
>>> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
>>> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
>>> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>>
>> We spent much time for these.
>> Good-bye sh7372... Good-bye mackerel...
>
> Amen...
>
> Still to be removed: a few compatible entries in code and DT binding
> documentation; "git grep -i sh7372" is your friend ;-)
Right, there are a couple of entries across the place. My feeling is
that we can handle them independently for each driver.
> It seems arch/sh still supports Linux running on the SH core in sh7372?
I don't think we have any support upstream for that, but I recall
cooking up some prototype running two linux instances in separate
memory spaces and using virtio as mailbox interface in between. I also
recall that SH4AL-DSP CPU core tend to be a PITA to handle
toolchain-wise, but SH4 with FPU is much easier with current (or
yesteryear) toolchain. Exactly which SH core that is included in
sh7372 I'm not so sure about. =)
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-26 6:47 ` Magnus Damm
@ 2015-01-26 8:20 ` Geert Uytterhoeven
-1 siblings, 0 replies; 58+ messages in thread
From: Geert Uytterhoeven @ 2015-01-26 8:20 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jan 26, 2015 at 7:47 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> It seems arch/sh still supports Linux running on the SH core in sh7372?
>
> I don't think we have any support upstream for that, but I recall
> cooking up some prototype running two linux instances in separate
> memory spaces and using virtio as mailbox interface in between. I also
> recall that SH4AL-DSP CPU core tend to be a PITA to handle
> toolchain-wise, but SH4 with FPU is much easier with current (or
> yesteryear) toolchain. Exactly which SH core that is included in
> sh7372 I'm not so sure about. =)
JFTR, SH4AL-DSP.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-26 8:20 ` Geert Uytterhoeven
0 siblings, 0 replies; 58+ messages in thread
From: Geert Uytterhoeven @ 2015-01-26 8:20 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jan 26, 2015 at 7:47 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> It seems arch/sh still supports Linux running on the SH core in sh7372?
>
> I don't think we have any support upstream for that, but I recall
> cooking up some prototype running two linux instances in separate
> memory spaces and using virtio as mailbox interface in between. I also
> recall that SH4AL-DSP CPU core tend to be a PITA to handle
> toolchain-wise, but SH4 with FPU is much easier with current (or
> yesteryear) toolchain. Exactly which SH core that is included in
> sh7372 I'm not so sure about. =)
JFTR, SH4AL-DSP.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 58+ messages in thread* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-26 8:20 ` Geert Uytterhoeven
@ 2015-01-26 9:13 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 9:13 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jan 26, 2015 at 5:20 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Mon, Jan 26, 2015 at 7:47 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> It seems arch/sh still supports Linux running on the SH core in sh7372?
>>
>> I don't think we have any support upstream for that, but I recall
>> cooking up some prototype running two linux instances in separate
>> memory spaces and using virtio as mailbox interface in between. I also
>> recall that SH4AL-DSP CPU core tend to be a PITA to handle
>> toolchain-wise, but SH4 with FPU is much easier with current (or
>> yesteryear) toolchain. Exactly which SH core that is included in
>> sh7372 I'm not so sure about. =)
>
> JFTR, SH4AL-DSP.
Good luck with that. =)
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-26 9:13 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 9:13 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jan 26, 2015 at 5:20 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Mon, Jan 26, 2015 at 7:47 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> It seems arch/sh still supports Linux running on the SH core in sh7372?
>>
>> I don't think we have any support upstream for that, but I recall
>> cooking up some prototype running two linux instances in separate
>> memory spaces and using virtio as mailbox interface in between. I also
>> recall that SH4AL-DSP CPU core tend to be a PITA to handle
>> toolchain-wise, but SH4 with FPU is much easier with current (or
>> yesteryear) toolchain. Exactly which SH core that is included in
>> sh7372 I'm not so sure about. =)
>
> JFTR, SH4AL-DSP.
Good luck with that. =)
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-21 12:42 ` Laurent Pinchart
-1 siblings, 0 replies; 58+ messages in thread
From: Laurent Pinchart @ 2015-01-21 12:42 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
Thank you for the patches.
On Wednesday 21 January 2015 13:52:56 Magnus Damm wrote:
> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>
> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>
> Remove legacy board and SoC support for Mackerel and sh7372. Both the
> ARM mach-shmobile code base and the PINCTRL subsystem is affected.
>
> Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
> utility that has no user once sh7372 is gone.
>
> The Cortex-A8 based sh7372 SoC is rather old and never went into mass
> production anyway, so these patches that remove SoC and board support
> will only affect a few selected developers.
>
> I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
> without any board or SoC code it makes little sense to keep it.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
For patches 01 to 05, 07 to 10, and 13,
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
'git grep -i sh7372' reports 25 mentions of the SoC in the kernel sources.
Please let me know if you would like to me submit patches to remove them, or
if you want to do so yourself.
> ---
>
> Built on top of renesas-devel-20150121-v3.19-rc5
>
> Documentation/arm/Makefile | 2
> Documentation/arm/SH-Mobile/Makefile | 7
> Documentation/arm/SH-Mobile/vrl4.c | 170
> Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt | 29
> Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt | 42
> Documentation/devicetree/bindings/arm/shmobile.txt | 4
> Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 8
> arch/arm/Kconfig | 29
> arch/arm/Kconfig.debug | 7
> arch/arm/boot/compressed/Makefile | 15
> arch/arm/boot/compressed/head-shmobile.S | 30
> arch/arm/boot/compressed/mmcif-sh7372.c | 88
> arch/arm/boot/compressed/sdhi-sh7372.c | 95
> arch/arm/boot/compressed/sdhi-shmobile.c | 449 -
> arch/arm/boot/compressed/sdhi-shmobile.h | 11
> arch/arm/boot/dts/Makefile | 1
> arch/arm/boot/dts/sh7372-mackerel.dts | 26
> arch/arm/boot/dts/sh7372.dtsi | 35
> arch/arm/configs/mackerel_defconfig | 157
> arch/arm/mach-shmobile/Kconfig | 16
> arch/arm/mach-shmobile/Makefile | 6
> arch/arm/mach-shmobile/Makefile.boot | 1
> arch/arm/mach-shmobile/board-mackerel.c | 1522 --
> arch/arm/mach-shmobile/clock-sh7372.c | 620 --
> arch/arm/mach-shmobile/common.h | 1
> arch/arm/mach-shmobile/entry-intc.S | 54
> arch/arm/mach-shmobile/include/mach/head-mackerel.txt | 93
> arch/arm/mach-shmobile/include/mach/mmc-mackerel.h | 38
> arch/arm/mach-shmobile/include/mach/mmc.h | 16
> arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h | 21
> arch/arm/mach-shmobile/include/mach/sdhi.h | 16
> arch/arm/mach-shmobile/include/mach/zboot.h | 5
> arch/arm/mach-shmobile/intc-sh7372.c | 672 --
> arch/arm/mach-shmobile/pm-sh7372.c | 549 --
> arch/arm/mach-shmobile/setup-sh7372.c | 1016 ---
> arch/arm/mach-shmobile/sh7372.h | 84
> arch/arm/mach-shmobile/sleep-sh7372.S | 98
> arch/arm/tools/mach-types | 1
> drivers/pinctrl/sh-pfc/Kconfig | 5
> drivers/pinctrl/sh-pfc/Makefile | 1
> drivers/pinctrl/sh-pfc/core.c | 9
> drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 ---
> 42 files changed, 8 insertions(+), 8686 deletions(-)
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-21 12:42 ` Laurent Pinchart
0 siblings, 0 replies; 58+ messages in thread
From: Laurent Pinchart @ 2015-01-21 12:42 UTC (permalink / raw)
To: linux-arm-kernel
Hi Magnus,
Thank you for the patches.
On Wednesday 21 January 2015 13:52:56 Magnus Damm wrote:
> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>
> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>
> Remove legacy board and SoC support for Mackerel and sh7372. Both the
> ARM mach-shmobile code base and the PINCTRL subsystem is affected.
>
> Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
> utility that has no user once sh7372 is gone.
>
> The Cortex-A8 based sh7372 SoC is rather old and never went into mass
> production anyway, so these patches that remove SoC and board support
> will only affect a few selected developers.
>
> I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
> without any board or SoC code it makes little sense to keep it.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
For patches 01 to 05, 07 to 10, and 13,
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
'git grep -i sh7372' reports 25 mentions of the SoC in the kernel sources.
Please let me know if you would like to me submit patches to remove them, or
if you want to do so yourself.
> ---
>
> Built on top of renesas-devel-20150121-v3.19-rc5
>
> Documentation/arm/Makefile | 2
> Documentation/arm/SH-Mobile/Makefile | 7
> Documentation/arm/SH-Mobile/vrl4.c | 170
> Documentation/arm/SH-Mobile/zboot-rom-mmcif.txt | 29
> Documentation/arm/SH-Mobile/zboot-rom-sdhi.txt | 42
> Documentation/devicetree/bindings/arm/shmobile.txt | 4
> Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 8
> arch/arm/Kconfig | 29
> arch/arm/Kconfig.debug | 7
> arch/arm/boot/compressed/Makefile | 15
> arch/arm/boot/compressed/head-shmobile.S | 30
> arch/arm/boot/compressed/mmcif-sh7372.c | 88
> arch/arm/boot/compressed/sdhi-sh7372.c | 95
> arch/arm/boot/compressed/sdhi-shmobile.c | 449 -
> arch/arm/boot/compressed/sdhi-shmobile.h | 11
> arch/arm/boot/dts/Makefile | 1
> arch/arm/boot/dts/sh7372-mackerel.dts | 26
> arch/arm/boot/dts/sh7372.dtsi | 35
> arch/arm/configs/mackerel_defconfig | 157
> arch/arm/mach-shmobile/Kconfig | 16
> arch/arm/mach-shmobile/Makefile | 6
> arch/arm/mach-shmobile/Makefile.boot | 1
> arch/arm/mach-shmobile/board-mackerel.c | 1522 --
> arch/arm/mach-shmobile/clock-sh7372.c | 620 --
> arch/arm/mach-shmobile/common.h | 1
> arch/arm/mach-shmobile/entry-intc.S | 54
> arch/arm/mach-shmobile/include/mach/head-mackerel.txt | 93
> arch/arm/mach-shmobile/include/mach/mmc-mackerel.h | 38
> arch/arm/mach-shmobile/include/mach/mmc.h | 16
> arch/arm/mach-shmobile/include/mach/sdhi-sh7372.h | 21
> arch/arm/mach-shmobile/include/mach/sdhi.h | 16
> arch/arm/mach-shmobile/include/mach/zboot.h | 5
> arch/arm/mach-shmobile/intc-sh7372.c | 672 --
> arch/arm/mach-shmobile/pm-sh7372.c | 549 --
> arch/arm/mach-shmobile/setup-sh7372.c | 1016 ---
> arch/arm/mach-shmobile/sh7372.h | 84
> arch/arm/mach-shmobile/sleep-sh7372.S | 98
> arch/arm/tools/mach-types | 1
> drivers/pinctrl/sh-pfc/Kconfig | 5
> drivers/pinctrl/sh-pfc/Makefile | 1
> drivers/pinctrl/sh-pfc/core.c | 9
> drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2645 ---
> 42 files changed, 8 insertions(+), 8686 deletions(-)
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-21 12:42 ` Laurent Pinchart
@ 2015-01-26 6:49 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 6:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi Laurent,
On Wed, Jan 21, 2015 at 9:42 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> Hi Magnus,
>
> Thank you for the patches.
>
> On Wednesday 21 January 2015 13:52:56 Magnus Damm wrote:
>> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>>
>> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
>> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
>> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
>> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
>> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
>> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
>> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
>> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
>> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
>> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
>> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
>> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
>> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>>
>> Remove legacy board and SoC support for Mackerel and sh7372. Both the
>> ARM mach-shmobile code base and the PINCTRL subsystem is affected.
>>
>> Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
>> utility that has no user once sh7372 is gone.
>>
>> The Cortex-A8 based sh7372 SoC is rather old and never went into mass
>> production anyway, so these patches that remove SoC and board support
>> will only affect a few selected developers.
>>
>> I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
>> without any board or SoC code it makes little sense to keep it.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>
> For patches 01 to 05, 07 to 10, and 13,
>
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Great, thanks, I have included your ack in V2 for the patches above.
> 'git grep -i sh7372' reports 25 mentions of the SoC in the kernel sources.
> Please let me know if you would like to me submit patches to remove them, or
> if you want to do so yourself.
Thanks. I prefer not to touch those myself, so if you or someone else
could do it step-by-step then that would be excellent.
Best,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-26 6:49 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 6:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi Laurent,
On Wed, Jan 21, 2015 at 9:42 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> Hi Magnus,
>
> Thank you for the patches.
>
> On Wednesday 21 January 2015 13:52:56 Magnus Damm wrote:
>> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>>
>> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
>> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
>> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
>> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
>> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
>> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
>> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
>> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
>> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
>> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
>> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
>> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
>> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>>
>> Remove legacy board and SoC support for Mackerel and sh7372. Both the
>> ARM mach-shmobile code base and the PINCTRL subsystem is affected.
>>
>> Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
>> utility that has no user once sh7372 is gone.
>>
>> The Cortex-A8 based sh7372 SoC is rather old and never went into mass
>> production anyway, so these patches that remove SoC and board support
>> will only affect a few selected developers.
>>
>> I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
>> without any board or SoC code it makes little sense to keep it.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>
> For patches 01 to 05, 07 to 10, and 13,
>
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Great, thanks, I have included your ack in V2 for the patches above.
> 'git grep -i sh7372' reports 25 mentions of the SoC in the kernel sources.
> Please let me know if you would like to me submit patches to remove them, or
> if you want to do so yourself.
Thanks. I prefer not to touch those myself, so if you or someone else
could do it step-by-step then that would be excellent.
Best,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-21 4:52 ` Magnus Damm
@ 2015-01-26 0:22 ` Simon Horman
-1 siblings, 0 replies; 58+ messages in thread
From: Simon Horman @ 2015-01-26 0:22 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 21, 2015 at 01:52:56PM +0900, Magnus Damm wrote:
> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>
> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>
> Remove legacy board and SoC support for Mackerel and sh7372. Both the
> ARM mach-shmobile code base and the PINCTRL subsystem is affected.
>
> Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
> utility that has no user once sh7372 is gone.
>
> The Cortex-A8 based sh7372 SoC is rather old and never went into mass
> production anyway, so these patches that remove SoC and board support
> will only affect a few selected developers.
>
> I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
> without any board or SoC code it makes little sense to keep it.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Hi Magnus,
thanks for putting this together. There seem to have been few comments
made on it. Could you consider respinning accordingly?
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-26 0:22 ` Simon Horman
0 siblings, 0 replies; 58+ messages in thread
From: Simon Horman @ 2015-01-26 0:22 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jan 21, 2015 at 01:52:56PM +0900, Magnus Damm wrote:
> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>
> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>
> Remove legacy board and SoC support for Mackerel and sh7372. Both the
> ARM mach-shmobile code base and the PINCTRL subsystem is affected.
>
> Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
> utility that has no user once sh7372 is gone.
>
> The Cortex-A8 based sh7372 SoC is rather old and never went into mass
> production anyway, so these patches that remove SoC and board support
> will only affect a few selected developers.
>
> I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
> without any board or SoC code it makes little sense to keep it.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Hi Magnus,
thanks for putting this together. There seem to have been few comments
made on it. Could you consider respinning accordingly?
^ permalink raw reply [flat|nested] 58+ messages in thread
* Re: [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
2015-01-26 0:22 ` Simon Horman
@ 2015-01-26 6:51 ` Magnus Damm
-1 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 6:51 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
On Mon, Jan 26, 2015 at 9:22 AM, Simon Horman <horms@verge.net.au> wrote:
> On Wed, Jan 21, 2015 at 01:52:56PM +0900, Magnus Damm wrote:
>> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>>
>> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
>> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
>> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
>> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
>> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
>> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
>> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
>> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
>> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
>> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
>> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
>> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
>> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>>
>> Remove legacy board and SoC support for Mackerel and sh7372. Both the
>> ARM mach-shmobile code base and the PINCTRL subsystem is affected.
>>
>> Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
>> utility that has no user once sh7372 is gone.
>>
>> The Cortex-A8 based sh7372 SoC is rather old and never went into mass
>> production anyway, so these patches that remove SoC and board support
>> will only affect a few selected developers.
>>
>> I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
>> without any board or SoC code it makes little sense to keep it.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>
> Hi Magnus,
>
> thanks for putting this together. There seem to have been few comments
> made on it. Could you consider respinning accordingly?
Done! V2 is now out.
Please let me know if you need to to rework something.
Cheers,
/ magnus
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH 00/13] ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
@ 2015-01-26 6:51 ` Magnus Damm
0 siblings, 0 replies; 58+ messages in thread
From: Magnus Damm @ 2015-01-26 6:51 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
On Mon, Jan 26, 2015 at 9:22 AM, Simon Horman <horms@verge.net.au> wrote:
> On Wed, Jan 21, 2015 at 01:52:56PM +0900, Magnus Damm wrote:
>> ARM: shmobile: Remove sh7372/Mackerel and ZBOOT MMC/SDHI support
>>
>> [PATCH 01/13] ARM: shmobile: mackerel: Remove ZBOOT code
>> [PATCH 02/13] ARM: shmobile: mackerel: Remove Legacy C board code
>> [PATCH 03/13] ARM: shmobile: mackerel dts: Remove Legacy DTS file
>> [PATCH 04/13] ARM: shmobile: mackerel: Remove DT binding documentation
>> [PATCH 05/13] ARM: shmobile: mackerel: Remove mach-type entry
>> [PATCH 06/13] ARM: shmobile: mackerel: Remove defconfig
>> [PATCH 07/13] ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support
>> [PATCH 08/13] ARM: shmobile: sh7372: Remove Legacy C SoC code
>> [PATCH 09/13] ARM: shmobile: sh7372: Remove DT binding documentation
>> [PATCH 10/13] ARM: shmobile: sh7372 dtsi: Remove Legacy DTSI file
>> [PATCH 11/13] Documentation: Remove ZBOOT MMC/SDHI utility and docs
>> [PATCH 12/13] pinctrl: sh-pfc: sh7372: Remove PFC support
>> [PATCH 13/13] pinctrl: sh-pfc: sh7372: Remove DT binding documentation
>>
>> Remove legacy board and SoC support for Mackerel and sh7372. Both the
>> ARM mach-shmobile code base and the PINCTRL subsystem is affected.
>>
>> Also get rid of the remaining ZBOOT MMC/SDHI code, documentation and
>> utility that has no user once sh7372 is gone.
>>
>> The Cortex-A8 based sh7372 SoC is rather old and never went into mass
>> production anyway, so these patches that remove SoC and board support
>> will only affect a few selected developers.
>>
>> I wish we had some way to make use of the ZBOOT MMC/SDHI code, but
>> without any board or SoC code it makes little sense to keep it.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>
> Hi Magnus,
>
> thanks for putting this together. There seem to have been few comments
> made on it. Could you consider respinning accordingly?
Done! V2 is now out.
Please let me know if you need to to rework something.
Cheers,
/ magnus
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