* [PATCH 1/5] PCI: Add defines for max read request sizes
@ 2015-01-26 17:05 ` Rafał Miłecki
0 siblings, 0 replies; 11+ messages in thread
From: Rafał Miłecki @ 2015-01-26 17:05 UTC (permalink / raw)
To: Bjorn Helgaas, linux-pci
Cc: Matt Porter, Alexandre Bounine, Chris Metcalf, Bradley Grove,
linux-scsi, Realtek linux nic maintainers, netdev,
Rafał Miłecki
There are few drivers using magic numbers when operating with PCIe
capabilities and PCI_EXP_DEVCTL_READRQ. Define known values to allow
cleaning their code a bit.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
include/uapi/linux/pci_regs.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 4a1d0cc..efe3443 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -451,6 +451,10 @@
#define PCI_EXP_DEVCTL_AUX_PME 0x0400 /* Auxiliary Power PM Enable */
#define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 /* Enable No Snoop */
#define PCI_EXP_DEVCTL_READRQ 0x7000 /* Max_Read_Request_Size */
+#define PCI_EXP_DEVCTL_READRQ_128B 0x0000 /* 128 Bytes */
+#define PCI_EXP_DEVCTL_READRQ_256B 0x1000 /* 256 Bytes */
+#define PCI_EXP_DEVCTL_READRQ_512B 0x2000 /* 512 Bytes */
+#define PCI_EXP_DEVCTL_READRQ_1024B 0x3000 /* 1024 Bytes */
#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
#define PCI_EXP_DEVSTA 10 /* Device Status */
#define PCI_EXP_DEVSTA_CED 0x0001 /* Correctable Error Detected */
--
1.8.4.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/5] rapidio/tsi721: use PCI define for max read request size
2015-01-26 17:05 ` Rafał Miłecki
(?)
@ 2015-01-26 17:06 ` Rafał Miłecki
2015-01-26 18:15 ` Bounine, Alexandre
-1 siblings, 1 reply; 11+ messages in thread
From: Rafał Miłecki @ 2015-01-26 17:06 UTC (permalink / raw)
To: Bjorn Helgaas, linux-pci
Cc: Matt Porter, Alexandre Bounine, Rafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/rapidio/devices/tsi721.c | 2 +-
drivers/rapidio/devices/tsi721.h | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c
index 8bcfecd..eeca70d 100644
--- a/drivers/rapidio/devices/tsi721.c
+++ b/drivers/rapidio/devices/tsi721.c
@@ -2430,7 +2430,7 @@ static int tsi721_probe(struct pci_dev *pdev,
pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
PCI_EXP_DEVCTL_NOSNOOP_EN,
- 0x2 << MAX_READ_REQUEST_SZ_SHIFT);
+ PCI_EXP_DEVCTL_READRQ_512B);
/* Adjust PCIe completion timeout. */
pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL2, 0xf, 0x2);
diff --git a/drivers/rapidio/devices/tsi721.h b/drivers/rapidio/devices/tsi721.h
index a7b4268..9d25025 100644
--- a/drivers/rapidio/devices/tsi721.h
+++ b/drivers/rapidio/devices/tsi721.h
@@ -72,8 +72,6 @@
#define TSI721_MSIXPBA_OFFSET 0x2a000
#define TSI721_PCIECFG_EPCTL 0x400
-#define MAX_READ_REQUEST_SZ_SHIFT 12
-
/*
* Event Management Registers
*/
--
1.8.4.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* RE: [PATCH 2/5] rapidio/tsi721: use PCI define for max read request size
2015-01-26 17:06 ` [PATCH 2/5] rapidio/tsi721: use PCI define for max read request size Rafał Miłecki
@ 2015-01-26 18:15 ` Bounine, Alexandre
0 siblings, 0 replies; 11+ messages in thread
From: Bounine, Alexandre @ 2015-01-26 18:15 UTC (permalink / raw)
To: Rafał Miłecki, Bjorn Helgaas, linux-pci; +Cc: Matt Porter
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DQo+ICAgKi8NCj4gLS0NCj4gMS44LjQuNQ0KDQo=
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/5] tile: use PCI define for max read request size
2015-01-26 17:05 ` Rafał Miłecki
(?)
(?)
@ 2015-01-26 17:06 ` Rafał Miłecki
2015-01-26 18:21 ` Chris Metcalf
-1 siblings, 1 reply; 11+ messages in thread
From: Rafał Miłecki @ 2015-01-26 17:06 UTC (permalink / raw)
To: Bjorn Helgaas, linux-pci; +Cc: Chris Metcalf, Rafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
arch/tile/kernel/pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index f70c789..325df47 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -245,7 +245,7 @@ static void fixup_read_and_payload_sizes(void)
{
struct pci_dev *dev = NULL;
int smallest_max_payload = 0x1; /* Tile maxes out at 256 bytes. */
- int max_read_size = 0x2; /* Limit to 512 byte reads. */
+ int max_read_size = PCI_EXP_DEVCTL_READRQ_512B;
u16 new_values;
/* Scan for the smallest maximum payload size. */
@@ -258,7 +258,7 @@ static void fixup_read_and_payload_sizes(void)
}
/* Now, set the max_payload_size for all devices to that value. */
- new_values = (max_read_size << 12) | (smallest_max_payload << 5);
+ new_values = max_read_size | (smallest_max_payload << 5);
for_each_pci_dev(dev)
pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ,
--
1.8.4.5
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 4/5] [SCSI] esas2r: use PCI define for max read request size
2015-01-26 17:05 ` Rafał Miłecki
@ 2015-01-26 17:06 ` Rafał Miłecki
-1 siblings, 0 replies; 11+ messages in thread
From: Rafał Miłecki @ 2015-01-26 17:06 UTC (permalink / raw)
To: Bjorn Helgaas, linux-pci
Cc: Bradley Grove, linux-scsi, Rafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/scsi/esas2r/esas2r_init.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/scsi/esas2r/esas2r_init.c b/drivers/scsi/esas2r/esas2r_init.c
index 6776931..c0b37a5 100644
--- a/drivers/scsi/esas2r/esas2r_init.c
+++ b/drivers/scsi/esas2r/esas2r_init.c
@@ -813,12 +813,13 @@ static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a)
pci_read_config_word(a->pcid, pcie_cap_reg + PCI_EXP_DEVCTL,
&devcontrol);
- if ((devcontrol & PCI_EXP_DEVCTL_READRQ) > 0x2000) {
+ if (devcontrol & PCI_EXP_DEVCTL_READRQ >
+ PCI_EXP_DEVCTL_READRQ_512B) {
esas2r_log(ESAS2R_LOG_INFO,
"max read request size > 512B");
devcontrol &= ~PCI_EXP_DEVCTL_READRQ;
- devcontrol |= 0x2000;
+ devcontrol |= PCI_EXP_DEVCTL_READRQ_512B;
pci_write_config_word(a->pcid,
pcie_cap_reg + PCI_EXP_DEVCTL,
devcontrol);
--
1.8.4.5
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 4/5] [SCSI] esas2r: use PCI define for max read request size
@ 2015-01-26 17:06 ` Rafał Miłecki
0 siblings, 0 replies; 11+ messages in thread
From: Rafał Miłecki @ 2015-01-26 17:06 UTC (permalink / raw)
To: Bjorn Helgaas, linux-pci
Cc: Bradley Grove, linux-scsi, Rafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/scsi/esas2r/esas2r_init.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/scsi/esas2r/esas2r_init.c b/drivers/scsi/esas2r/esas2r_init.c
index 6776931..c0b37a5 100644
--- a/drivers/scsi/esas2r/esas2r_init.c
+++ b/drivers/scsi/esas2r/esas2r_init.c
@@ -813,12 +813,13 @@ static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a)
pci_read_config_word(a->pcid, pcie_cap_reg + PCI_EXP_DEVCTL,
&devcontrol);
- if ((devcontrol & PCI_EXP_DEVCTL_READRQ) > 0x2000) {
+ if (devcontrol & PCI_EXP_DEVCTL_READRQ >
+ PCI_EXP_DEVCTL_READRQ_512B) {
esas2r_log(ESAS2R_LOG_INFO,
"max read request size > 512B");
devcontrol &= ~PCI_EXP_DEVCTL_READRQ;
- devcontrol |= 0x2000;
+ devcontrol |= PCI_EXP_DEVCTL_READRQ_512B;
pci_write_config_word(a->pcid,
pcie_cap_reg + PCI_EXP_DEVCTL,
devcontrol);
--
1.8.4.5
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^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 5/5] r8169: use PCI define for max read request size
2015-01-26 17:05 ` Rafał Miłecki
` (3 preceding siblings ...)
(?)
@ 2015-01-26 17:06 ` Rafał Miłecki
2015-01-27 8:23 ` David Miller
-1 siblings, 1 reply; 11+ messages in thread
From: Rafał Miłecki @ 2015-01-26 17:06 UTC (permalink / raw)
To: Bjorn Helgaas, linux-pci
Cc: Realtek linux nic maintainers, netdev, Rafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/net/ethernet/realtek/r8169.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 14a1c5c..fa274e0 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -4915,7 +4915,7 @@ static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
- rtl_tx_performance_tweak(tp->pci_dev, 0x2 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp->pci_dev, PCI_EXP_DEVCTL_READRQ_512B);
}
static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
@@ -4948,7 +4948,7 @@ static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
RTL_W8(MaxTxPacketSize, 0x3f);
RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
RTL_W8(Config4, RTL_R8(Config4) | 0x01);
- rtl_tx_performance_tweak(tp->pci_dev, 0x2 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp->pci_dev, PCI_EXP_DEVCTL_READRQ_512B);
}
static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
@@ -4964,7 +4964,7 @@ static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
static void r8168b_0_hw_jumbo_enable(struct rtl8169_private *tp)
{
rtl_tx_performance_tweak(tp->pci_dev,
- (0x2 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
+ PCI_EXP_DEVCTL_READRQ_512B | PCI_EXP_DEVCTL_NOSNOOP_EN);
}
static void r8168b_0_hw_jumbo_disable(struct rtl8169_private *tp)
--
1.8.4.5
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 1/5] PCI: Add defines for max read request sizes
2015-01-26 17:05 ` Rafał Miłecki
` (4 preceding siblings ...)
(?)
@ 2015-01-27 0:20 ` Bjorn Helgaas
-1 siblings, 0 replies; 11+ messages in thread
From: Bjorn Helgaas @ 2015-01-27 0:20 UTC (permalink / raw)
To: Rafał Miłecki
Cc: linux-pci, Matt Porter, Alexandre Bounine, Chris Metcalf,
Bradley Grove, linux-scsi, Realtek linux nic maintainers, netdev
On Mon, Jan 26, 2015 at 06:05:22PM +0100, Rafał Miłecki wrote:
> There are few drivers using magic numbers when operating with PCIe
> capabilities and PCI_EXP_DEVCTL_READRQ. Define known values to allow
> cleaning their code a bit.
>
> Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
I applied this whole series, with acks from Alexandre and Chris, to
pci/misc for v3.20, thanks!
> ---
> include/uapi/linux/pci_regs.h | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index 4a1d0cc..efe3443 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -451,6 +451,10 @@
> #define PCI_EXP_DEVCTL_AUX_PME 0x0400 /* Auxiliary Power PM Enable */
> #define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 /* Enable No Snoop */
> #define PCI_EXP_DEVCTL_READRQ 0x7000 /* Max_Read_Request_Size */
> +#define PCI_EXP_DEVCTL_READRQ_128B 0x0000 /* 128 Bytes */
> +#define PCI_EXP_DEVCTL_READRQ_256B 0x1000 /* 256 Bytes */
> +#define PCI_EXP_DEVCTL_READRQ_512B 0x2000 /* 512 Bytes */
> +#define PCI_EXP_DEVCTL_READRQ_1024B 0x3000 /* 1024 Bytes */
> #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
> #define PCI_EXP_DEVSTA 10 /* Device Status */
> #define PCI_EXP_DEVSTA_CED 0x0001 /* Correctable Error Detected */
> --
> 1.8.4.5
>
^ permalink raw reply [flat|nested] 11+ messages in thread