From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
scottwood@freescale.com
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
Joakim Tjernlund <joakim.tjernlund@transmode.se>
Subject: [PATCH v4 0/5] powerpc8xx: Further optimisation of TLB handling
Date: Wed, 4 Feb 2015 15:49:08 +0100 (CET) [thread overview]
Message-ID: <20150204144908.361E71A5F24@localhost.localdomain> (raw)
This patchset provides a further optimisation of TLB handling in the 8xx.
Changes are:
- Not saving registers like CR when not needed
- Adding support to any TASK_SIZE
Patchset:
01 - powerpc/8xx: macro for handling CPU15 errata
02 - powerpc/8xx: Handle CR out of exception PROLOG/EPILOG
03 - powerpc/8xx: dont save CR in SCRATCH registers
04 - powerpc/8xx: Use SPRG2 instead of DAR for saving r3
05 - powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000
All changes have been successfully tested on MPC885
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Tested-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
v3: 01-06 no change ; 07-11 changed
v4: 01-06 removed (already in scootwood.git next) ; 07-11 renamed 01-05 and respined against scootwood.git next
arch/powerpc/kernel/head_8xx.S | 79 +++++++++++++++++++++++++++---------------
1 file changed, 51 insertions(+), 28 deletions(-)
WARNING: multiple messages have this Message-ID (diff)
From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
scottwood@freescale.com
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH v4 0/5] powerpc8xx: Further optimisation of TLB handling
Date: Wed, 4 Feb 2015 15:49:08 +0100 (CET) [thread overview]
Message-ID: <20150204144908.361E71A5F24@localhost.localdomain> (raw)
This patchset provides a further optimisation of TLB handling in the 8xx.
Changes are:
- Not saving registers like CR when not needed
- Adding support to any TASK_SIZE
Patchset:
01 - powerpc/8xx: macro for handling CPU15 errata
02 - powerpc/8xx: Handle CR out of exception PROLOG/EPILOG
03 - powerpc/8xx: dont save CR in SCRATCH registers
04 - powerpc/8xx: Use SPRG2 instead of DAR for saving r3
05 - powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000
All changes have been successfully tested on MPC885
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Tested-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
v3: 01-06 no change ; 07-11 changed
v4: 01-06 removed (already in scootwood.git next) ; 07-11 renamed 01-05 and respined against scootwood.git next
arch/powerpc/kernel/head_8xx.S | 79 +++++++++++++++++++++++++++---------------
1 file changed, 51 insertions(+), 28 deletions(-)
next reply other threads:[~2015-02-04 14:49 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-04 14:49 Christophe Leroy [this message]
2015-02-04 14:49 ` [PATCH v4 0/5] powerpc8xx: Further optimisation of TLB handling Christophe Leroy
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