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From: Borislav Petkov <bp@alien8.de>
To: Vikas Shivappa <vikas.shivappa@intel.com>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>,
	linux-kernel@vger.kernel.org, matt.fleming@intel.com,
	hpa@zytor.com, tglx@linutronix.de, mingo@kernel.org,
	tj@kernel.org, peterz@infradead.org, will.auld@intel.com,
	dave.hansen@intel.com, andi.kleen@intel.com, tony.luck@intel.com,
	kanaka.d.juvva@intel.com
Subject: Re: [PATCH 1/7] x86/intel_rdt: Intel Cache Allocation Technology detection
Date: Wed, 25 Feb 2015 12:21:53 +0100	[thread overview]
Message-ID: <20150225112153.GB3226@pd.tnic> (raw)
In-Reply-To: <alpine.DEB.2.10.1502241609590.3507@vshiva-Udesk>

On Tue, Feb 24, 2015 at 04:42:10PM -0800, Vikas Shivappa wrote:
> >>+
> >>+	pr_info("cbmlength:%u,Closs: %u\n", cbm_len, maxid);
> >
> >This text message needs to be much more user-friendly if it is going out
> >to the console unconditionally.
> >
> 
> bit mask lengh:  number of CLOSids: ? . it should print with the module name
> as well which should help understand what it is for.

Right, if I haven't read the SDM on RDT, I still don't understand what
those mean. What is the need for that message at all, what is it telling
me?

Can you show an example from a machine with RDT and explain what it is
good for?

> >>+config CGROUP_RDT
> >>+	bool "Resource Director Technology cgroup subsystem"
> >>+	depends on X86_64
> >
> >depends on X86_64 && CPU_SUP_INTEL
> >
> >Also, this should probably also depend on CGROUP-something or so
> >AFAICT...
> 
> This is with in the if CGROUPS

Right, but you still need the CPU_SUP_INTEL dependency as !Intel x86
doesn't need that code built.

Thanks.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
--

  reply	other threads:[~2015-02-25 11:22 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-24 23:16 [PATCH V4 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-02-24 23:16 ` [PATCH 1/7] x86/intel_rdt: Intel Cache Allocation Technology detection Vikas Shivappa
2015-02-24 23:43   ` Borislav Petkov
2015-02-25  0:42     ` Vikas Shivappa
2015-02-25 11:21       ` Borislav Petkov [this message]
2015-02-26 18:19         ` Vikas Shivappa
2015-02-26 18:58           ` Borislav Petkov
2015-02-26 19:12             ` Vikas Shivappa
2015-02-26 19:22               ` Borislav Petkov
2015-03-03 23:34   ` Vikas Shivappa
2015-02-24 23:16 ` [PATCH 2/7] x86/intel_rdt: Adds support for Class of service management Vikas Shivappa
2015-02-24 23:16 ` [PATCH 3/7] x86/intel_rdt: Support cache bit mask for Intel CAT Vikas Shivappa
2015-02-27 12:12   ` Tejun Heo
2015-02-27 12:18     ` Tejun Heo
2015-02-27 19:34     ` Vikas Shivappa
2015-02-27 19:42       ` Tejun Heo
2015-02-27 21:38         ` Vikas Shivappa
2015-02-24 23:16 ` [PATCH 4/7] x86/intel_rdt: Implement scheduling support for Intel RDT Vikas Shivappa
2015-02-24 23:16 ` [PATCH 5/7] x86/intel_rdt: Software Cache for IA32_PQR_MSR Vikas Shivappa
2015-02-24 23:16 ` [PATCH 6/7] x86/intel_rdt: Intel haswell CAT enumeration Vikas Shivappa
2015-02-24 23:16 ` [PATCH 7/7] x86/intel_rdt: Add CAT documentation and usage guide Vikas Shivappa
2015-02-26 19:31   ` Hagen Paul Pfeifer
2015-02-25  9:26 ` [PATCH V4 0/7] x86/intel_rdt: Intel Cache Allocation Technology Peter Zijlstra
2015-02-25 16:40   ` Luck, Tony
2015-02-26 11:37     ` Ingo Molnar
2015-02-26 17:26       ` Vikas Shivappa
2015-02-26 18:16         ` Vikas Shivappa
2015-03-19 22:18       ` Vikas Shivappa
2015-03-12 23:16 [PATCH V5 " Vikas Shivappa
2015-03-12 23:16 ` [PATCH 1/7] x86/intel_rdt: Intel Cache Allocation Technology detection Vikas Shivappa
2015-05-02  1:36 [PATCH V6 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-05-02  1:36 ` [PATCH 1/7] x86/intel_rdt: Intel Cache Allocation Technology detection Vikas Shivappa
2015-05-02 18:35   ` Peter Zijlstra

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