[PATCH] drm/i915: Export total subslice and EU counts

[PATCH] drm/i915: Export total subslice and EU counts

[jeff.mcgee]

From: Jeff McGee <jeff.mcgee@intel.com>

Setup new I915_GETPARAM ioctl entries for subslice total and
EU total. Userspace drivers need these values when constructing
GPGPU commands. This kernel query method is intended to replace
the PCI ID-based tables that userspace drivers currently maintain.
The kernel driver can employ fuse register reads as needed to
ensure the most accurate determination of GT config attributes.
This first became important with Cherryview in which the config
could differ between devices with the same PCI ID.

The kernel detection of these values is device-specific and not
included in this patch. Because zero is not a valid value for any of
these parameters, a value of zero is interpreted as unknown for the
device. Userspace drivers should continue to maintain ID-based tables
for older devices not supported by the new query method.

For: VIZ-4636
Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
 include/uapi/drm/i915_drm.h     |  2 ++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 053e178..9350ea2 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,
 	case I915_PARAM_MMAP_VERSION:
 		value = 1;
 		break;
+	case I915_PARAM_SUBSLICE_TOTAL:
+		value = INTEL_INFO(dev)->subslice_total;
+		if (!value)
+			return -ENODEV;
+		break;
+	case I915_PARAM_EU_TOTAL:
+		value = INTEL_INFO(dev)->eu_total;
+		if (!value)
+			return -ENODEV;
+		break;
 	default:
 		DRM_DEBUG("Unknown parameter %d\n", param->param);
 		return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 6eed16b..8672efc 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_COHERENT_PHYS_GTT 29
 #define I915_PARAM_MMAP_VERSION          30
 #define I915_PARAM_HAS_BSD2		 31
+#define I915_PARAM_SUBSLICE_TOTAL	 32
+#define I915_PARAM_EU_TOTAL		 33
 
 typedef struct drm_i915_getparam {
 	int param;
-- 
2.3.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH] drm/i915: Export total subslice and EU counts

[Jeff McGee]

On Mon, Mar 02, 2015 at 03:37:32PM -0800, jeff.mcgee@intel.com wrote:
> From: Jeff McGee <jeff.mcgee@intel.com>
> 
> Setup new I915_GETPARAM ioctl entries for subslice total and
> EU total. Userspace drivers need these values when constructing
> GPGPU commands. This kernel query method is intended to replace
> the PCI ID-based tables that userspace drivers currently maintain.
> The kernel driver can employ fuse register reads as needed to
> ensure the most accurate determination of GT config attributes.
> This first became important with Cherryview in which the config
> could differ between devices with the same PCI ID.
> 
> The kernel detection of these values is device-specific and not
> included in this patch. Because zero is not a valid value for any of
> these parameters, a value of zero is interpreted as unknown for the
> device. Userspace drivers should continue to maintain ID-based tables
> for older devices not supported by the new query method.
> 

We already have total EU detection support for Cherryview but we
need to add detection of total subslice. That support is included
in the below-linked series which has been reviewed but not yet
merged.

http://lists.freedesktop.org/archives/intel-gfx/2015-February/060945.html

Jeff
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Export total subslice and EU counts

[Daniel Vetter]

On Mon, Mar 02, 2015 at 03:37:32PM -0800, jeff.mcgee@intel.com wrote:
> From: Jeff McGee <jeff.mcgee@intel.com>
> 
> Setup new I915_GETPARAM ioctl entries for subslice total and
> EU total. Userspace drivers need these values when constructing
> GPGPU commands. This kernel query method is intended to replace
> the PCI ID-based tables that userspace drivers currently maintain.
> The kernel driver can employ fuse register reads as needed to
> ensure the most accurate determination of GT config attributes.
> This first became important with Cherryview in which the config
> could differ between devices with the same PCI ID.
> 
> The kernel detection of these values is device-specific and not
> included in this patch. Because zero is not a valid value for any of
> these parameters, a value of zero is interpreted as unknown for the
> device. Userspace drivers should continue to maintain ID-based tables
> for older devices not supported by the new query method.
> 
> For: VIZ-4636
> Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
>  include/uapi/drm/i915_drm.h     |  2 ++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 053e178..9350ea2 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,
>  	case I915_PARAM_MMAP_VERSION:
>  		value = 1;
>  		break;
> +	case I915_PARAM_SUBSLICE_TOTAL:
> +		value = INTEL_INFO(dev)->subslice_total;
> +		if (!value)
> +			return -ENODEV;
> +		break;
> +	case I915_PARAM_EU_TOTAL:
> +		value = INTEL_INFO(dev)->eu_total;
> +		if (!value)
> +			return -ENODEV;

I need the corresponding userspace support before I can merged this.

Thanks, Daniel

> +		break;
>  	default:
>  		DRM_DEBUG("Unknown parameter %d\n", param->param);
>  		return -EINVAL;
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 6eed16b..8672efc 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {
>  #define I915_PARAM_HAS_COHERENT_PHYS_GTT 29
>  #define I915_PARAM_MMAP_VERSION          30
>  #define I915_PARAM_HAS_BSD2		 31
> +#define I915_PARAM_SUBSLICE_TOTAL	 32
> +#define I915_PARAM_EU_TOTAL		 33
>  
>  typedef struct drm_i915_getparam {
>  	int param;
> -- 
> 2.3.0
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH] drm/i915: Export total subslice and EU counts

[Daniel Vetter]

On Tue, Mar 03, 2015 at 09:54:39AM +0100, Daniel Vetter wrote:
> On Mon, Mar 02, 2015 at 03:37:32PM -0800, jeff.mcgee@intel.com wrote:
> > From: Jeff McGee <jeff.mcgee@intel.com>
> > 
> > Setup new I915_GETPARAM ioctl entries for subslice total and
> > EU total. Userspace drivers need these values when constructing
> > GPGPU commands. This kernel query method is intended to replace
> > the PCI ID-based tables that userspace drivers currently maintain.
> > The kernel driver can employ fuse register reads as needed to
> > ensure the most accurate determination of GT config attributes.
> > This first became important with Cherryview in which the config
> > could differ between devices with the same PCI ID.
> > 
> > The kernel detection of these values is device-specific and not
> > included in this patch. Because zero is not a valid value for any of
> > these parameters, a value of zero is interpreted as unknown for the
> > device. Userspace drivers should continue to maintain ID-based tables
> > for older devices not supported by the new query method.
> > 
> > For: VIZ-4636
> > Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
> >  include/uapi/drm/i915_drm.h     |  2 ++
> >  2 files changed, 12 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> > index 053e178..9350ea2 100644
> > --- a/drivers/gpu/drm/i915/i915_dma.c
> > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > @@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,
> >  	case I915_PARAM_MMAP_VERSION:
> >  		value = 1;
> >  		break;
> > +	case I915_PARAM_SUBSLICE_TOTAL:
> > +		value = INTEL_INFO(dev)->subslice_total;
> > +		if (!value)
> > +			return -ENODEV;
> > +		break;
> > +	case I915_PARAM_EU_TOTAL:
> > +		value = INTEL_INFO(dev)->eu_total;
> > +		if (!value)
> > +			return -ENODEV;
> 
> I need the corresponding userspace support before I can merged this.

Strike that, I've missed the beignet support. As soon as beignet
maintainers have that reviewed I can pull this in.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Export total subslice and EU counts

[shuang.he]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5874
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -4              278/278              274/278
ILK                                  308/308              308/308
SNB                                  284/284              284/284
IVB                                  380/380              380/380
BYT                                  294/294              294/294
HSW                                  387/387              387/387
BDW                 -1              316/316              315/316
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 PNV  igt_gem_userptr_blits_coherency-sync      NO_RESULT(1)CRASH(5)NRUN(1)PASS(7)      CRASH(1)PASS(1)
 PNV  igt_gem_userptr_blits_coherency-unsync      NO_RESULT(1)CRASH(4)PASS(6)      CRASH(2)
 PNV  igt_gen3_render_mixed_blits      FAIL(6)PASS(9)      FAIL(2)
 PNV  igt_gem_fence_thrash_bo-write-verify-threaded-none      FAIL(2)CRASH(4)PASS(4)      CRASH(1)PASS(1)
*BDW  igt_gem_gtt_hog      PASS(18)      DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Export total subslice and EU counts

[Zhigang Gong]

There is one minor conflict when apply the KMD patch to latest
drm-intel-nightly branch. It should be easy to fix.

Another issue is that IMO, we should bump libdrm's version number
when increase these new APIs. Then in Beignet, we can check the
libdrm version at build time and determine whether we will use
these new interfaces. Thus, we can avoid breaking beignet on
those systems which have previous libdrm/kernel installed.

The other parts of the whole patchset,
including patches for KMD/libdrm/Intel gpu tools and Beignet,
all look good to me.

And I just tested it on BDW and SKL platforms, it works fine.

Thanks,
Zhigang Gong.

On Mon, Mar 02, 2015 at 03:37:32PM -0800, jeff.mcgee@intel.com wrote:
> From: Jeff McGee <jeff.mcgee@intel.com>
> 
> Setup new I915_GETPARAM ioctl entries for subslice total and
> EU total. Userspace drivers need these values when constructing
> GPGPU commands. This kernel query method is intended to replace
> the PCI ID-based tables that userspace drivers currently maintain.
> The kernel driver can employ fuse register reads as needed to
> ensure the most accurate determination of GT config attributes.
> This first became important with Cherryview in which the config
> could differ between devices with the same PCI ID.
> 
> The kernel detection of these values is device-specific and not
> included in this patch. Because zero is not a valid value for any of
> these parameters, a value of zero is interpreted as unknown for the
> device. Userspace drivers should continue to maintain ID-based tables
> for older devices not supported by the new query method.
> 
> For: VIZ-4636
> Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
>  include/uapi/drm/i915_drm.h     |  2 ++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 053e178..9350ea2 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,
>  	case I915_PARAM_MMAP_VERSION:
>  		value = 1;
>  		break;
> +	case I915_PARAM_SUBSLICE_TOTAL:
> +		value = INTEL_INFO(dev)->subslice_total;
> +		if (!value)
> +			return -ENODEV;
> +		break;
> +	case I915_PARAM_EU_TOTAL:
> +		value = INTEL_INFO(dev)->eu_total;
> +		if (!value)
> +			return -ENODEV;
> +		break;
>  	default:
>  		DRM_DEBUG("Unknown parameter %d\n", param->param);
>  		return -EINVAL;
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 6eed16b..8672efc 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {
>  #define I915_PARAM_HAS_COHERENT_PHYS_GTT 29
>  #define I915_PARAM_MMAP_VERSION          30
>  #define I915_PARAM_HAS_BSD2		 31
> +#define I915_PARAM_SUBSLICE_TOTAL	 32
> +#define I915_PARAM_EU_TOTAL		 33
>  
>  typedef struct drm_i915_getparam {
>  	int param;
> -- 
> 2.3.0
> 
> _______________________________________________
> Beignet mailing list
> Beignet@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/beignet
_______________________________________________
Beignet mailing list
Beignet@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/beignet

Re: [Beignet] [PATCH] drm/i915: Export total subslice and EU counts

[Jeff McGee]

On Thu, Mar 05, 2015 at 12:35:55PM +0800, Zhigang Gong wrote:
> There is one minor conflict when apply the KMD patch to latest
> drm-intel-nightly branch. It should be easy to fix.
> 
> Another issue is that IMO, we should bump libdrm's version number
> when increase these new APIs. Then in Beignet, we can check the
> libdrm version at build time and determine whether we will use
> these new interfaces. Thus, we can avoid breaking beignet on
> those systems which have previous libdrm/kernel installed.
> 
Right. I can append a libdrm patch to bump the version. And then I
suppose I will follow the process to make a new release. Not sure
right now how that works. First time going through it.

Also, how should we test for the libdrm version and conditionally
use the API? Is there a previous example of this in Beignet that I
could follow?

Jeff

> The other parts of the whole patchset,
> including patches for KMD/libdrm/Intel gpu tools and Beignet,
> all look good to me.
> 
> And I just tested it on BDW and SKL platforms, it works fine.
> 
> Thanks,
> Zhigang Gong.
> 
> On Mon, Mar 02, 2015 at 03:37:32PM -0800, jeff.mcgee@intel.com wrote:
> > From: Jeff McGee <jeff.mcgee@intel.com>
> > 
> > Setup new I915_GETPARAM ioctl entries for subslice total and
> > EU total. Userspace drivers need these values when constructing
> > GPGPU commands. This kernel query method is intended to replace
> > the PCI ID-based tables that userspace drivers currently maintain.
> > The kernel driver can employ fuse register reads as needed to
> > ensure the most accurate determination of GT config attributes.
> > This first became important with Cherryview in which the config
> > could differ between devices with the same PCI ID.
> > 
> > The kernel detection of these values is device-specific and not
> > included in this patch. Because zero is not a valid value for any of
> > these parameters, a value of zero is interpreted as unknown for the
> > device. Userspace drivers should continue to maintain ID-based tables
> > for older devices not supported by the new query method.
> > 
> > For: VIZ-4636
> > Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
> >  include/uapi/drm/i915_drm.h     |  2 ++
> >  2 files changed, 12 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> > index 053e178..9350ea2 100644
> > --- a/drivers/gpu/drm/i915/i915_dma.c
> > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > @@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,
> >  	case I915_PARAM_MMAP_VERSION:
> >  		value = 1;
> >  		break;
> > +	case I915_PARAM_SUBSLICE_TOTAL:
> > +		value = INTEL_INFO(dev)->subslice_total;
> > +		if (!value)
> > +			return -ENODEV;
> > +		break;
> > +	case I915_PARAM_EU_TOTAL:
> > +		value = INTEL_INFO(dev)->eu_total;
> > +		if (!value)
> > +			return -ENODEV;
> > +		break;
> >  	default:
> >  		DRM_DEBUG("Unknown parameter %d\n", param->param);
> >  		return -EINVAL;
> > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > index 6eed16b..8672efc 100644
> > --- a/include/uapi/drm/i915_drm.h
> > +++ b/include/uapi/drm/i915_drm.h
> > @@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {
> >  #define I915_PARAM_HAS_COHERENT_PHYS_GTT 29
> >  #define I915_PARAM_MMAP_VERSION          30
> >  #define I915_PARAM_HAS_BSD2		 31
> > +#define I915_PARAM_SUBSLICE_TOTAL	 32
> > +#define I915_PARAM_EU_TOTAL		 33
> >  
> >  typedef struct drm_i915_getparam {
> >  	int param;
> > -- 
> > 2.3.0
> > 
> > _______________________________________________
> > Beignet mailing list
> > Beignet@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/beignet
> _______________________________________________
> Beignet mailing list
> Beignet@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/beignet
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Beignet] [PATCH] drm/i915: Export total subslice and EU counts

[Jeff McGee]

On Thu, Mar 05, 2015 at 12:35:55PM +0800, Zhigang Gong wrote:
> There is one minor conflict when apply the KMD patch to latest
> drm-intel-nightly branch. It should be easy to fix.
> 
> Another issue is that IMO, we should bump libdrm's version number
> when increase these new APIs. Then in Beignet, we can check the
> libdrm version at build time and determine whether we will use
> these new interfaces. Thus, we can avoid breaking beignet on
> those systems which have previous libdrm/kernel installed.
> 
> The other parts of the whole patchset,
> including patches for KMD/libdrm/Intel gpu tools and Beignet,
> all look good to me.
> 
> And I just tested it on BDW and SKL platforms, it works fine.
> 

Can you add your Reviewed-by tag to at least the Beignet patches?
I think Daniel wants to see that before moving forward with the
rest. Thanks

Jeff

> Thanks,
> Zhigang Gong.
> 
> On Mon, Mar 02, 2015 at 03:37:32PM -0800, jeff.mcgee@intel.com wrote:
> > From: Jeff McGee <jeff.mcgee@intel.com>
> > 
> > Setup new I915_GETPARAM ioctl entries for subslice total and
> > EU total. Userspace drivers need these values when constructing
> > GPGPU commands. This kernel query method is intended to replace
> > the PCI ID-based tables that userspace drivers currently maintain.
> > The kernel driver can employ fuse register reads as needed to
> > ensure the most accurate determination of GT config attributes.
> > This first became important with Cherryview in which the config
> > could differ between devices with the same PCI ID.
> > 
> > The kernel detection of these values is device-specific and not
> > included in this patch. Because zero is not a valid value for any of
> > these parameters, a value of zero is interpreted as unknown for the
> > device. Userspace drivers should continue to maintain ID-based tables
> > for older devices not supported by the new query method.
> > 
> > For: VIZ-4636
> > Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
> >  include/uapi/drm/i915_drm.h     |  2 ++
> >  2 files changed, 12 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> > index 053e178..9350ea2 100644
> > --- a/drivers/gpu/drm/i915/i915_dma.c
> > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > @@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev, void *data,
> >  	case I915_PARAM_MMAP_VERSION:
> >  		value = 1;
> >  		break;
> > +	case I915_PARAM_SUBSLICE_TOTAL:
> > +		value = INTEL_INFO(dev)->subslice_total;
> > +		if (!value)
> > +			return -ENODEV;
> > +		break;
> > +	case I915_PARAM_EU_TOTAL:
> > +		value = INTEL_INFO(dev)->eu_total;
> > +		if (!value)
> > +			return -ENODEV;
> > +		break;
> >  	default:
> >  		DRM_DEBUG("Unknown parameter %d\n", param->param);
> >  		return -EINVAL;
> > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > index 6eed16b..8672efc 100644
> > --- a/include/uapi/drm/i915_drm.h
> > +++ b/include/uapi/drm/i915_drm.h
> > @@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {
> >  #define I915_PARAM_HAS_COHERENT_PHYS_GTT 29
> >  #define I915_PARAM_MMAP_VERSION          30
> >  #define I915_PARAM_HAS_BSD2		 31
> > +#define I915_PARAM_SUBSLICE_TOTAL	 32
> > +#define I915_PARAM_EU_TOTAL		 33
> >  
> >  typedef struct drm_i915_getparam {
> >  	int param;
> > -- 
> > 2.3.0
> > 
> > _______________________________________________
> > Beignet mailing list
> > Beignet@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/beignet
> _______________________________________________
> Beignet mailing list
> Beignet@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/beignet
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH] drm/i915: Export total subslice and EU counts

[Zhigang Gong]

> -----Original Message-----
> From: Beignet [mailto:beignet-bounces@lists.freedesktop.org] On Behalf Of
> Jeff McGee
> Sent: Saturday, March 7, 2015 2:44 AM
> To: Zhigang Gong
> Cc: daniel@ffwll.ch; intel-gfx@lists.freedesktop.org;
> beignet@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH] drm/i915: Export total subslice and EU counts
> 
> On Thu, Mar 05, 2015 at 12:35:55PM +0800, Zhigang Gong wrote:
> > There is one minor conflict when apply the KMD patch to latest
> > drm-intel-nightly branch. It should be easy to fix.
> >
> > Another issue is that IMO, we should bump libdrm's version number when
> > increase these new APIs. Then in Beignet, we can check the libdrm
> > version at build time and determine whether we will use these new
> > interfaces. Thus, we can avoid breaking beignet on those systems which
> > have previous libdrm/kernel installed.
> >
> Right. I can append a libdrm patch to bump the version. And then I suppose I
> will follow the process to make a new release. Not sure right now how that
> works. First time going through it.
> 
> Also, how should we test for the libdrm version and conditionally use the API?
We can check the libdrm version at configuration time and define a macro to
indicate whether we can use these new APIs in beignet.
> Is there a previous example of this in Beignet that I could follow?
Yes, one example is userptr. You can check the usage of DRM_INTEL_USERPTR and HAS_USERPTR
In beignet.

Thanks,
Zhigang Gong.

> 
> Jeff
> 
> > The other parts of the whole patchset, including patches for
> > KMD/libdrm/Intel gpu tools and Beignet, all look good to me.
> >
> > And I just tested it on BDW and SKL platforms, it works fine.
> >
> > Thanks,
> > Zhigang Gong.
> >
> > On Mon, Mar 02, 2015 at 03:37:32PM -0800, jeff.mcgee@intel.com wrote:
> > > From: Jeff McGee <jeff.mcgee@intel.com>
> > >
> > > Setup new I915_GETPARAM ioctl entries for subslice total and EU
> > > total. Userspace drivers need these values when constructing GPGPU
> > > commands. This kernel query method is intended to replace the PCI
> > > ID-based tables that userspace drivers currently maintain.
> > > The kernel driver can employ fuse register reads as needed to ensure
> > > the most accurate determination of GT config attributes.
> > > This first became important with Cherryview in which the config
> > > could differ between devices with the same PCI ID.
> > >
> > > The kernel detection of these values is device-specific and not
> > > included in this patch. Because zero is not a valid value for any of
> > > these parameters, a value of zero is interpreted as unknown for the
> > > device. Userspace drivers should continue to maintain ID-based
> > > tables for older devices not supported by the new query method.
> > >
> > > For: VIZ-4636
> > > Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
> > >  include/uapi/drm/i915_drm.h     |  2 ++
> > >  2 files changed, 12 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_dma.c
> > > b/drivers/gpu/drm/i915/i915_dma.c index 053e178..9350ea2 100644
> > > --- a/drivers/gpu/drm/i915/i915_dma.c
> > > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > > @@ -150,6 +150,16 @@ static int i915_getparam(struct drm_device *dev,
> void *data,
> > >  	case I915_PARAM_MMAP_VERSION:
> > >  		value = 1;
> > >  		break;
> > > +	case I915_PARAM_SUBSLICE_TOTAL:
> > > +		value = INTEL_INFO(dev)->subslice_total;
> > > +		if (!value)
> > > +			return -ENODEV;
> > > +		break;
> > > +	case I915_PARAM_EU_TOTAL:
> > > +		value = INTEL_INFO(dev)->eu_total;
> > > +		if (!value)
> > > +			return -ENODEV;
> > > +		break;
> > >  	default:
> > >  		DRM_DEBUG("Unknown parameter %d\n", param->param);
> > >  		return -EINVAL;
> > > diff --git a/include/uapi/drm/i915_drm.h
> > > b/include/uapi/drm/i915_drm.h index 6eed16b..8672efc 100644
> > > --- a/include/uapi/drm/i915_drm.h
> > > +++ b/include/uapi/drm/i915_drm.h
> > > @@ -347,6 +347,8 @@ typedef struct drm_i915_irq_wait {  #define
> > > I915_PARAM_HAS_COHERENT_PHYS_GTT 29
> > >  #define I915_PARAM_MMAP_VERSION          30
> > >  #define I915_PARAM_HAS_BSD2		 31
> > > +#define I915_PARAM_SUBSLICE_TOTAL	 32
> > > +#define I915_PARAM_EU_TOTAL		 33
> > >
> > >  typedef struct drm_i915_getparam {
> > >  	int param;
> > > --
> > > 2.3.0
> > >
> > > _______________________________________________
> > > Beignet mailing list
> > > Beignet@lists.freedesktop.org
> > > http://lists.freedesktop.org/mailman/listinfo/beignet
> > _______________________________________________
> > Beignet mailing list
> > Beignet@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/beignet
> _______________________________________________
> Beignet mailing list
> Beignet@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/beignet

_______________________________________________
Beignet mailing list
Beignet@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/beignet

[PATCH v2] drm/i915: Export total subslice and EU counts

[jeff.mcgee]

From: Jeff McGee <jeff.mcgee@intel.com>

Setup new I915_GETPARAM ioctl entries for subslice total and
EU total. Userspace drivers need these values when constructing
GPGPU commands. This kernel query method is intended to replace
the PCI ID-based tables that userspace drivers currently maintain.
The kernel driver can employ fuse register reads as needed to
ensure the most accurate determination of GT config attributes.
This first became important with Cherryview in which the config
could differ between devices with the same PCI ID.

The kernel detection of these values is device-specific and not
included in this patch. Because zero is not a valid value for any of
these parameters, a value of zero is interpreted as unknown for the
device. Userspace drivers should continue to maintain ID-based tables
for older devices not supported by the new query method.

v2: Increment our I915_GETPARAM indices to fit after REVISION
    which was merged ahead of us.

For: VIZ-4636
Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++
 include/uapi/drm/i915_drm.h     |  2 ++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 8e91430..d49ed68 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -153,6 +153,16 @@ static int i915_getparam(struct drm_device *dev, void *data,
 	case I915_PARAM_MMAP_VERSION:
 		value = 1;
 		break;
+	case I915_PARAM_SUBSLICE_TOTAL:
+		value = INTEL_INFO(dev)->subslice_total;
+		if (!value)
+			return -ENODEV;
+		break;
+	case I915_PARAM_EU_TOTAL:
+		value = INTEL_INFO(dev)->eu_total;
+		if (!value)
+			return -ENODEV;
+		break;
 	default:
 		DRM_DEBUG("Unknown parameter %d\n", param->param);
 		return -EINVAL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index b768f3b..8d1be90 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -348,6 +348,8 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_MMAP_VERSION          30
 #define I915_PARAM_HAS_BSD2		 31
 #define I915_PARAM_REVISION              32
+#define I915_PARAM_SUBSLICE_TOTAL	 33
+#define I915_PARAM_EU_TOTAL		 34
 
 typedef struct drm_i915_getparam {
 	int param;
-- 
2.3.0

_______________________________________________
Beignet mailing list
Beignet@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/beignet

Re: [PATCH v2] drm/i915: Export total subslice and EU counts

[shuang.he]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5922
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  282/282              282/282
ILK                                  308/308              308/308
SNB                                  307/307              307/307
IVB                                  375/375              375/375
BYT                                  294/294              294/294
HSW                                  385/385              385/385
BDW                                  315/315              315/315
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Beignet] [PATCH] drm/i915: Export total subslice and EU counts

[Daniel Vetter]

On Mon, Mar 09, 2015 at 08:10:06AM +0800, Zhigang Gong wrote:
> > -----Original Message-----
> > From: Beignet [mailto:beignet-bounces@lists.freedesktop.org] On Behalf Of
> > Jeff McGee
> > Sent: Saturday, March 7, 2015 2:44 AM
> > To: Zhigang Gong
> > Cc: daniel@ffwll.ch; intel-gfx@lists.freedesktop.org;
> > beignet@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Subject: Re: [Beignet] [PATCH] drm/i915: Export total subslice and EU counts
> > 
> > On Thu, Mar 05, 2015 at 12:35:55PM +0800, Zhigang Gong wrote:
> > > There is one minor conflict when apply the KMD patch to latest
> > > drm-intel-nightly branch. It should be easy to fix.
> > >
> > > Another issue is that IMO, we should bump libdrm's version number when
> > > increase these new APIs. Then in Beignet, we can check the libdrm
> > > version at build time and determine whether we will use these new
> > > interfaces. Thus, we can avoid breaking beignet on those systems which
> > > have previous libdrm/kernel installed.
> > >
> > Right. I can append a libdrm patch to bump the version. And then I suppose I
> > will follow the process to make a new release. Not sure right now how that
> > works. First time going through it.
> > 
> > Also, how should we test for the libdrm version and conditionally use the API?
> We can check the libdrm version at configuration time and define a macro to
> indicate whether we can use these new APIs in beignet.
> > Is there a previous example of this in Beignet that I could follow?
> Yes, one example is userptr. You can check the usage of DRM_INTEL_USERPTR and HAS_USERPTR
> In beignet.

Ok, applied the kernel patch. Please go ahead with libdrm&beignet parts.

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx