All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ralf Baechle <ralf@linux-mips.org>
To: Andrew Bresticker <abrestic@chromium.org>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Alexandre Courbot <gnurou@gmail.com>,
	devicetree@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
	Ezequiel Garcia <ezequiel.garcia@imgtec.com>,
	James Hartley <james.hartley@imgtec.com>,
	James Hogan <james.hogan@imgtec.com>
Subject: Re: [PATCH V2 0/3] pinctrl: Support for IMG Pistachio
Date: Tue, 31 Mar 2015 16:00:34 +0200	[thread overview]
Message-ID: <20150331140034.GE28951@linux-mips.org> (raw)
In-Reply-To: <1427757416-14491-1-git-send-email-abrestic@chromium.org>

On Mon, Mar 30, 2015 at 04:16:53PM -0700, Andrew Bresticker wrote:

> This series adds support for the system pin and GPIO controller on the IMG
> Pistachio SoC.  Pistachio's system pin controller manages 99 pins, 90 of
> which are MFIOs which can be muxed between multiple functions or used
> as GPIOs.  The GPIO control for the 90 MFIOs is broken up into banks
> of 16.  Pistachio also has a second pin controller, the RPU pin controller,
> which will be supported by a future patchset through an extension to this
> driver.
> 
> Test on an IMG Pistachio BuB.  Based on mips-for-linux-next which inluces my
> series adding Pistachio platform support [1].  A branch with this series is
> available at [2].

Does this mean you want me to funnel this through the MIPS tree?  If so,
could I have an Ack from the maintainers?

Thanks,

  Ralf

  parent reply	other threads:[~2015-03-31 14:00 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-30 23:16 [PATCH V2 0/3] pinctrl: Support for IMG Pistachio Andrew Bresticker
2015-03-30 23:16 ` [PATCH V2 1/3] pinctrl: Document "function" + "pins" pinmux binding Andrew Bresticker
2015-04-07 13:20   ` Linus Walleij
2015-03-30 23:16 ` [PATCH V2 2/3] pinctrl: Add Pistachio SoC pin control binding document Andrew Bresticker
2015-03-30 23:16 ` [PATCH V2 3/3] pinctrl: Add Pistachio SoC pin control driver Andrew Bresticker
2015-03-31  8:10   ` Paul Bolle
2015-03-31 16:56     ` Andrew Bresticker
2015-03-31 18:20       ` Paul Bolle
2015-03-31 18:37         ` Andrew Bresticker
2015-03-31 18:55           ` Paul Bolle
2015-04-07 14:13       ` Linus Walleij
2015-03-31 14:00 ` Ralf Baechle [this message]
2015-03-31 17:20   ` [PATCH V2 0/3] pinctrl: Support for IMG Pistachio Andrew Bresticker
2015-04-07 13:24     ` Linus Walleij

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150331140034.GE28951@linux-mips.org \
    --to=ralf@linux-mips.org \
    --cc=abrestic@chromium.org \
    --cc=devicetree@vger.kernel.org \
    --cc=ezequiel.garcia@imgtec.com \
    --cc=gnurou@gmail.com \
    --cc=james.hartley@imgtec.com \
    --cc=james.hogan@imgtec.com \
    --cc=linus.walleij@linaro.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@linux-mips.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.