* [Buildroot] [PATCH 1/2] arch: tidy up mmu config
@ 2015-05-21 16:54 Guido Martínez
2015-05-21 16:54 ` [Buildroot] [PATCH 2/2] arch: tidy up binary formats config Guido Martínez
` (3 more replies)
0 siblings, 4 replies; 15+ messages in thread
From: Guido Martínez @ 2015-05-21 16:54 UTC (permalink / raw)
To: buildroot
Instead of blacklisting which architectures support MMUs (mandatorily
or optionally), introduce two Kconfig options that are selected by each
architecture in each case.
This simplifies the logic in BR2_USE_MMU.
Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
---
arch/Config.in | 26 ++++++++++++++++++++++++++
arch/Config.in.arm | 17 +++++++++++++++++
toolchain/toolchain-common.in | 4 ++--
3 files changed, 45 insertions(+), 2 deletions(-)
diff --git a/arch/Config.in b/arch/Config.in
index 06aff2c..3fb3838 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -9,6 +9,12 @@ config BR2_KERNEL_64_USERLAND_32
config BR2_SOFT_FLOAT
bool
+config BR2_ARCH_HAS_MMU_MANDATORY
+ bool
+
+config BR2_ARCH_HAS_MMU_OPTIONAL
+ bool
+
choice
prompt "Target Architecture"
default BR2_i386
@@ -17,6 +23,7 @@ choice
config BR2_arcle
bool "ARC (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
@@ -24,6 +31,7 @@ config BR2_arcle
config BR2_arceb
bool "ARC (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
@@ -48,6 +56,7 @@ config BR2_armeb
config BR2_aarch64
bool "AArch64"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Aarch64 is a 64-bit architecture developed by ARM Holdings.
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
@@ -63,12 +72,14 @@ config BR2_bfin
config BR2_i386
bool "i386"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Intel i386 architecture compatible microprocessor
http://en.wikipedia.org/wiki/I386
config BR2_m68k
bool "m68k"
+ select BR2_ARCH_HAS_MMU_MANDATORY
depends on BROKEN # ice in uclibc / inet_ntoa_r
help
Motorola 68000 family microprocessor
@@ -76,6 +87,7 @@ config BR2_m68k
config BR2_microblazeel
bool "Microblaze AXI (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
based architecture (little endian)
@@ -84,6 +96,7 @@ config BR2_microblazeel
config BR2_microblazebe
bool "Microblaze non-AXI (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
based architecture (non-AXI, big endian)
@@ -92,6 +105,7 @@ config BR2_microblazebe
config BR2_mips
bool "MIPS (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
http://www.mips.com/
@@ -99,6 +113,7 @@ config BR2_mips
config BR2_mipsel
bool "MIPS (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
http://www.mips.com/
@@ -107,6 +122,7 @@ config BR2_mipsel
config BR2_mips64
bool "MIPS64 (big endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
http://www.mips.com/
@@ -115,6 +131,7 @@ config BR2_mips64
config BR2_mips64el
bool "MIPS64 (little endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
http://www.mips.com/
@@ -122,6 +139,7 @@ config BR2_mips64el
config BR2_nios2
bool "Nios II"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Nios II is a soft core processor from Altera Corporation.
http://www.altera.com/
@@ -129,6 +147,7 @@ config BR2_nios2
config BR2_powerpc
bool "PowerPC"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
@@ -138,6 +157,7 @@ config BR2_powerpc
config BR2_powerpc64
bool "PowerPC64 (big endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
@@ -147,6 +167,7 @@ config BR2_powerpc64
config BR2_powerpc64le
bool "PowerPC64 (little endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Little endian.
@@ -155,6 +176,7 @@ config BR2_powerpc64le
config BR2_sh
bool "SuperH"
+ select BR2_ARCH_HAS_MMU_OPTIONAL
help
SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
@@ -164,6 +186,7 @@ config BR2_sh
config BR2_sh64
bool "SuperH64"
depends on BR2_DEPRECATED_SINCE_2015_05
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
@@ -172,6 +195,7 @@ config BR2_sh64
config BR2_sparc
bool "SPARC"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
SPARC (from Scalable Processor Architecture) is a RISC instruction
set architecture (ISA) developed by Sun Microsystems.
@@ -181,6 +205,7 @@ config BR2_sparc
config BR2_x86_64
bool "x86_64"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
x86-64 is an extension of the x86 instruction set (Intel i386
architecture compatible microprocessor).
@@ -188,6 +213,7 @@ config BR2_x86_64
config BR2_xtensa
bool "Xtensa"
+ select BR2_ARCH_HAS_MMU_OPTIONAL
help
Xtensa is a Tensilica processor IP architecture.
http://en.wikipedia.org/wiki/Xtensa
diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index f5d317b..a2f00d2 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -64,34 +64,40 @@ config BR2_arm920t
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm922t
bool "arm922t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm926t
bool "arm926t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_MAYBE_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1136jf_s
bool "arm1136jf-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1176jz_s
bool "arm1176jz-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_HAS_ARM
@@ -99,6 +105,7 @@ config BR2_cortex_a5
select BR2_ARM_CPU_MAYBE_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a7
bool "cortex-A7"
select BR2_ARM_CPU_HAS_ARM
@@ -106,6 +113,7 @@ config BR2_cortex_a7
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a8
bool "cortex-A8"
select BR2_ARM_CPU_HAS_ARM
@@ -113,6 +121,7 @@ config BR2_cortex_a8
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a9
bool "cortex-A9"
select BR2_ARM_CPU_HAS_ARM
@@ -120,6 +129,7 @@ config BR2_cortex_a9
select BR2_ARM_CPU_MAYBE_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a12
bool "cortex-A12"
select BR2_ARM_CPU_HAS_ARM
@@ -127,6 +137,7 @@ config BR2_cortex_a12
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a15
bool "cortex-A15"
select BR2_ARM_CPU_HAS_ARM
@@ -134,28 +145,34 @@ config BR2_cortex_a15
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_fa526
bool "fa526/626"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_strongarm
bool "strongarm sa110/sa1100"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_xscale
bool "xscale"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_iwmmxt
bool "iwmmxt"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
endchoice
choice
diff --git a/toolchain/toolchain-common.in b/toolchain/toolchain-common.in
index d50c908..4f411c3 100644
--- a/toolchain/toolchain-common.in
+++ b/toolchain/toolchain-common.in
@@ -108,8 +108,8 @@ config BR2_NEEDS_GETTEXT_IF_LOCALE
default y if (BR2_NEEDS_GETTEXT && BR2_ENABLE_LOCALE)
config BR2_USE_MMU
- bool "Enable MMU support" if BR2_arm || BR2_armeb || BR2_sh || BR2_xtensa
- default y if !BR2_bfin
+ bool "Enable MMU support" if BR2_ARCH_HAS_MMU_OPTIONAL
+ default y if BR2_ARCH_HAS_MMU_OPTIONAL || BR2_ARCH_HAS_MMU_MANDATORY
help
If your target has a MMU, you should say Y here. If you
are unsure, just say Y.
--
2.1.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH 2/2] arch: tidy up binary formats config
2015-05-21 16:54 [Buildroot] [PATCH 1/2] arch: tidy up mmu config Guido Martínez
@ 2015-05-21 16:54 ` Guido Martínez
2015-06-01 20:32 ` Arnout Vandecappelle
2015-06-01 16:59 ` [Buildroot] [PATCH 1/2] arch: tidy up mmu config Ezequiel Garcia
` (2 subsequent siblings)
3 siblings, 1 reply; 15+ messages in thread
From: Guido Martínez @ 2015-05-21 16:54 UTC (permalink / raw)
To: buildroot
Instead of blacklisting architectures when deciding the binary format,
let's have each one select the binary formats it supports. The
preferred default is ELF, then FDPIC, and finally FLAT.
Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
---
arch/Config.in | 43 +++++++++++++++++++++++++++++++++++++------
arch/Config.in.arm | 17 +++++++++++++++++
2 files changed, 54 insertions(+), 6 deletions(-)
diff --git a/arch/Config.in b/arch/Config.in
index 3fb3838..30f0517 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -15,6 +15,15 @@ config BR2_ARCH_HAS_MMU_MANDATORY
config BR2_ARCH_HAS_MMU_OPTIONAL
bool
+config BR2_ARCH_HAS_ELF_SUPPORT
+ bool
+
+config BR2_ARCH_HAS_FDPIC_SUPPORT
+ bool
+
+config BR2_ARCH_HAS_FLAT_SUPPORT
+ bool
+
choice
prompt "Target Architecture"
default BR2_i386
@@ -24,6 +33,7 @@ choice
config BR2_arcle
bool "ARC (little endian)"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
@@ -32,6 +42,7 @@ config BR2_arcle
config BR2_arceb
bool "ARC (big endian)"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
@@ -57,6 +68,7 @@ config BR2_aarch64
bool "AArch64"
select BR2_ARCH_IS_64
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
Aarch64 is a 64-bit architecture developed by ARM Holdings.
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
@@ -64,6 +76,8 @@ config BR2_aarch64
config BR2_bfin
bool "Blackfin"
+ select BR2_ARCH_HAS_FDPIC_SUPPORT
+ select BR2_ARCH_HAS_FLAT_SUPPORT
help
The Blackfin is a family of 16 or 32-bit microprocessors developed,
manufactured and marketed by Analog Devices.
@@ -73,6 +87,7 @@ config BR2_bfin
config BR2_i386
bool "i386"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
Intel i386 architecture compatible microprocessor
http://en.wikipedia.org/wiki/I386
@@ -80,6 +95,7 @@ config BR2_i386
config BR2_m68k
bool "m68k"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_FLAT_SUPPORT
depends on BROKEN # ice in uclibc / inet_ntoa_r
help
Motorola 68000 family microprocessor
@@ -88,6 +104,7 @@ config BR2_m68k
config BR2_microblazeel
bool "Microblaze AXI (little endian)"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
based architecture (little endian)
@@ -97,6 +114,7 @@ config BR2_microblazeel
config BR2_microblazebe
bool "Microblaze non-AXI (big endian)"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
based architecture (non-AXI, big endian)
@@ -106,6 +124,7 @@ config BR2_microblazebe
config BR2_mips
bool "MIPS (big endian)"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
http://www.mips.com/
@@ -114,6 +133,7 @@ config BR2_mips
config BR2_mipsel
bool "MIPS (little endian)"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
http://www.mips.com/
@@ -123,6 +143,7 @@ config BR2_mips64
bool "MIPS64 (big endian)"
select BR2_ARCH_IS_64
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
http://www.mips.com/
@@ -132,6 +153,7 @@ config BR2_mips64el
bool "MIPS64 (little endian)"
select BR2_ARCH_IS_64
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
http://www.mips.com/
@@ -140,6 +162,7 @@ config BR2_mips64el
config BR2_nios2
bool "Nios II"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
Nios II is a soft core processor from Altera Corporation.
http://www.altera.com/
@@ -148,6 +171,7 @@ config BR2_nios2
config BR2_powerpc
bool "PowerPC"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
@@ -158,6 +182,7 @@ config BR2_powerpc64
bool "PowerPC64 (big endian)"
select BR2_ARCH_IS_64
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
@@ -168,6 +193,7 @@ config BR2_powerpc64le
bool "PowerPC64 (little endian)"
select BR2_ARCH_IS_64
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Little endian.
@@ -177,6 +203,7 @@ config BR2_powerpc64le
config BR2_sh
bool "SuperH"
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
@@ -187,6 +214,7 @@ config BR2_sh64
bool "SuperH64"
depends on BR2_DEPRECATED_SINCE_2015_05
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
@@ -196,6 +224,7 @@ config BR2_sh64
config BR2_sparc
bool "SPARC"
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
SPARC (from Scalable Processor Architecture) is a RISC instruction
set architecture (ISA) developed by Sun Microsystems.
@@ -206,6 +235,7 @@ config BR2_x86_64
bool "x86_64"
select BR2_ARCH_IS_64
select BR2_ARCH_HAS_MMU_MANDATORY
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
x86-64 is an extension of the x86 instruction set (Intel i386
architecture compatible microprocessor).
@@ -214,6 +244,7 @@ config BR2_x86_64
config BR2_xtensa
bool "Xtensa"
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
help
Xtensa is a Tensilica processor IP architecture.
http://en.wikipedia.org/wiki/Xtensa
@@ -270,13 +301,13 @@ config BR2_BINFMT_SUPPORTS_SHARED
# Set up target binary format
choice
prompt "Target Binary Format"
- default BR2_BINFMT_ELF if !(BR2_bfin || BR2_m68k)
- default BR2_BINFMT_FDPIC if BR2_bfin
- default BR2_BINFMT_FLAT if BR2_m68k
+ default BR2_BINFMT_ELF if BR2_ARCH_HAS_ELF_SUPPORT
+ default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
+ default BR2_BINFMT_FLAT if BR2_ARCH_HAS_FLAT_SUPPORT
config BR2_BINFMT_ELF
bool "ELF"
- depends on !BR2_bfin && !BR2_m68k
+ depends on BR2_ARCH_HAS_ELF_SUPPORT
select BR2_BINFMT_SUPPORTS_SHARED
help
ELF (Executable and Linkable Format) is a format for libraries and
@@ -285,7 +316,7 @@ config BR2_BINFMT_ELF
config BR2_BINFMT_FDPIC
bool "FDPIC"
- depends on BR2_bfin
+ depends on BR2_ARCH_HAS_FDPIC_SUPPORT
select BR2_BINFMT_SUPPORTS_SHARED
help
ELF FDPIC binaries are based on ELF, but allow the individual load
@@ -295,7 +326,7 @@ config BR2_BINFMT_FDPIC
config BR2_BINFMT_FLAT
bool "FLAT"
- depends on BR2_bfin || BR2_m68k
+ depends on BR2_ARCH_HAS_FLAT_SUPPORT
help
FLAT binary is a relatively simple and lightweight executable format
based on the original a.out format. It is widely used in environment
diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index a2f00d2..482a33a 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -65,12 +65,14 @@ config BR2_arm920t
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_arm922t
bool "arm922t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_arm926t
bool "arm926t"
select BR2_ARM_CPU_HAS_ARM
@@ -78,6 +80,7 @@ config BR2_arm926t
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_arm1136jf_s
bool "arm1136jf-s"
select BR2_ARM_CPU_HAS_ARM
@@ -85,12 +88,14 @@ config BR2_arm1136jf_s
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_arm1176jz_s
bool "arm1176jz-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
select BR2_ARM_CPU_HAS_ARM
@@ -98,6 +103,7 @@ config BR2_arm1176jzf_s
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_HAS_ARM
@@ -106,6 +112,7 @@ config BR2_cortex_a5
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_cortex_a7
bool "cortex-A7"
select BR2_ARM_CPU_HAS_ARM
@@ -114,6 +121,7 @@ config BR2_cortex_a7
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_cortex_a8
bool "cortex-A8"
select BR2_ARM_CPU_HAS_ARM
@@ -122,6 +130,7 @@ config BR2_cortex_a8
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_cortex_a9
bool "cortex-A9"
select BR2_ARM_CPU_HAS_ARM
@@ -130,6 +139,7 @@ config BR2_cortex_a9
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_cortex_a12
bool "cortex-A12"
select BR2_ARM_CPU_HAS_ARM
@@ -138,6 +148,7 @@ config BR2_cortex_a12
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_cortex_a15
bool "cortex-A15"
select BR2_ARM_CPU_HAS_ARM
@@ -146,33 +157,39 @@ config BR2_cortex_a15
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_fa526
bool "fa526/626"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_strongarm
bool "strongarm sa110/sa1100"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_xscale
bool "xscale"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
config BR2_iwmmxt
bool "iwmmxt"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_HAS_ELF_SUPPORT
endchoice
choice
--
2.1.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH 1/2] arch: tidy up mmu config
2015-05-21 16:54 [Buildroot] [PATCH 1/2] arch: tidy up mmu config Guido Martínez
2015-05-21 16:54 ` [Buildroot] [PATCH 2/2] arch: tidy up binary formats config Guido Martínez
@ 2015-06-01 16:59 ` Ezequiel Garcia
2015-06-01 20:09 ` Arnout Vandecappelle
2015-06-03 14:12 ` [Buildroot] [PATCH v2 " Guido Martínez
3 siblings, 0 replies; 15+ messages in thread
From: Ezequiel Garcia @ 2015-06-01 16:59 UTC (permalink / raw)
To: buildroot
Thomas, Romain:
On 05/21/2015 01:54 PM, Guido Mart?nez wrote:
> Instead of blacklisting which architectures support MMUs (mandatorily
> or optionally), introduce two Kconfig options that are selected by each
> architecture in each case.
>
> This simplifies the logic in BR2_USE_MMU.
>
> Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
> ---
> arch/Config.in | 26 ++++++++++++++++++++++++++
> arch/Config.in.arm | 17 +++++++++++++++++
> toolchain/toolchain-common.in | 4 ++--
> 3 files changed, 45 insertions(+), 2 deletions(-)
>
Any news about this and the next one?
We'd really like to move forward with the cortex-M support. (BTW, Linux
v4.2 will probably carry a good amount of support for LPC43xx.)
Thanks!
--
Ezequiel Garcia, VanguardiaSur
www.vanguardiasur.com.ar
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH 1/2] arch: tidy up mmu config
2015-05-21 16:54 [Buildroot] [PATCH 1/2] arch: tidy up mmu config Guido Martínez
2015-05-21 16:54 ` [Buildroot] [PATCH 2/2] arch: tidy up binary formats config Guido Martínez
2015-06-01 16:59 ` [Buildroot] [PATCH 1/2] arch: tidy up mmu config Ezequiel Garcia
@ 2015-06-01 20:09 ` Arnout Vandecappelle
2015-06-03 14:12 ` Guido Martínez
2015-06-03 14:12 ` [Buildroot] [PATCH v2 " Guido Martínez
3 siblings, 1 reply; 15+ messages in thread
From: Arnout Vandecappelle @ 2015-06-01 20:09 UTC (permalink / raw)
To: buildroot
On 05/21/15 18:54, Guido Mart?nez wrote:
> Instead of blacklisting which architectures support MMUs (mandatorily
> or optionally), introduce two Kconfig options that are selected by each
> architecture in each case.
>
> This simplifies the logic in BR2_USE_MMU.
>
> Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Two small improvements, but even without them this patch is OK for me.
- In arch/Config.in, the ARM section and the Blackfin section look the same to
the casual onlooker, but for ARM the MMU options depend on the subarchitecture,
while for Blackfin it's always NOMMU. So I'd make this explicit by adding a
comment for ARM:
config BR2_arm
bool "ARM (little endian)"
# MMU support is set by subarchitectur in Config.in.arm
Same for ELF in the second patch.
- Like you did for ARM, I think you should move the MMU selection to the
subarches for xtensa as well. Since in fact, the fsf variant is always MMU.
So if you repost this patch and make the above changes, you can add my Acked-by.
Regards,
Arnout
[snip]
--
Arnout Vandecappelle arnout at mind be
Senior Embedded Software Architect +32-16-286500
Essensium/Mind http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint: 7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH 2/2] arch: tidy up binary formats config
2015-05-21 16:54 ` [Buildroot] [PATCH 2/2] arch: tidy up binary formats config Guido Martínez
@ 2015-06-01 20:32 ` Arnout Vandecappelle
0 siblings, 0 replies; 15+ messages in thread
From: Arnout Vandecappelle @ 2015-06-01 20:32 UTC (permalink / raw)
To: buildroot
On 05/21/15 18:54, Guido Mart?nez wrote:
> Instead of blacklisting architectures when deciding the binary format,
> let's have each one select the binary formats it supports. The
> preferred default is ELF, then FDPIC, and finally FLAT.
>
> Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
In the kernel, we simply have:
config BINFMT_ELF
depends on MMU
config BINFMT_ELF_FDPIC
depends on (BLACKFIN || (SUPERH32 && !MMU))
config BINFMT_FLAT
depends on !MMU
(removed the parts that are not relevant for us).
So for the ELF and FLAT options, I'd just make it depend on USE_MMU. For FDPIC
it makes sense to keep this patch.
Regards,
Arnout
--
Arnout Vandecappelle arnout at mind be
Senior Embedded Software Architect +32-16-286500
Essensium/Mind http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint: 7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v2 1/2] arch: tidy up mmu config
2015-05-21 16:54 [Buildroot] [PATCH 1/2] arch: tidy up mmu config Guido Martínez
` (2 preceding siblings ...)
2015-06-01 20:09 ` Arnout Vandecappelle
@ 2015-06-03 14:12 ` Guido Martínez
2015-06-03 14:12 ` [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config Guido Martínez
2015-06-03 22:34 ` [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config Guido Martínez
3 siblings, 2 replies; 15+ messages in thread
From: Guido Martínez @ 2015-06-03 14:12 UTC (permalink / raw)
To: buildroot
Instead of blacklisting which architectures support MMUs (mandatorily
or optionally), introduce two Kconfig options that are selected by each
architecture in each case.
This simplifies the logic in BR2_USE_MMU.
Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
---
arch/Config.in | 28 ++++++++++++++++++++++++++++
arch/Config.in.arm | 17 +++++++++++++++++
arch/Config.in.xtensa | 2 ++
toolchain/toolchain-common.in | 4 ++--
4 files changed, 49 insertions(+), 2 deletions(-)
diff --git a/arch/Config.in b/arch/Config.in
index 06aff2c..3ad9574 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -9,6 +9,12 @@ config BR2_KERNEL_64_USERLAND_32
config BR2_SOFT_FLOAT
bool
+config BR2_ARCH_HAS_MMU_MANDATORY
+ bool
+
+config BR2_ARCH_HAS_MMU_OPTIONAL
+ bool
+
choice
prompt "Target Architecture"
default BR2_i386
@@ -17,6 +23,7 @@ choice
config BR2_arcle
bool "ARC (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
@@ -24,6 +31,7 @@ config BR2_arcle
config BR2_arceb
bool "ARC (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
@@ -31,6 +39,7 @@ config BR2_arceb
config BR2_arm
bool "ARM (little endian)"
+ # MMU support is set by the subarchitecture file, arch/Config.in.arm
help
ARM is a 32-bit reduced instruction set computer (RISC) instruction
set architecture (ISA) developed by ARM Holdings. Little endian.
@@ -39,6 +48,7 @@ config BR2_arm
config BR2_armeb
bool "ARM (big endian)"
+ # MMU support is set by the subarchitecture file, arch/Config.in.arm
help
ARM is a 32-bit reduced instruction set computer (RISC) instruction
set architecture (ISA) developed by ARM Holdings. Big endian.
@@ -48,6 +58,7 @@ config BR2_armeb
config BR2_aarch64
bool "AArch64"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Aarch64 is a 64-bit architecture developed by ARM Holdings.
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
@@ -63,12 +74,14 @@ config BR2_bfin
config BR2_i386
bool "i386"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Intel i386 architecture compatible microprocessor
http://en.wikipedia.org/wiki/I386
config BR2_m68k
bool "m68k"
+ select BR2_ARCH_HAS_MMU_MANDATORY
depends on BROKEN # ice in uclibc / inet_ntoa_r
help
Motorola 68000 family microprocessor
@@ -76,6 +89,7 @@ config BR2_m68k
config BR2_microblazeel
bool "Microblaze AXI (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
based architecture (little endian)
@@ -84,6 +98,7 @@ config BR2_microblazeel
config BR2_microblazebe
bool "Microblaze non-AXI (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
based architecture (non-AXI, big endian)
@@ -92,6 +107,7 @@ config BR2_microblazebe
config BR2_mips
bool "MIPS (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
http://www.mips.com/
@@ -99,6 +115,7 @@ config BR2_mips
config BR2_mipsel
bool "MIPS (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
http://www.mips.com/
@@ -107,6 +124,7 @@ config BR2_mipsel
config BR2_mips64
bool "MIPS64 (big endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
http://www.mips.com/
@@ -115,6 +133,7 @@ config BR2_mips64
config BR2_mips64el
bool "MIPS64 (little endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
http://www.mips.com/
@@ -122,6 +141,7 @@ config BR2_mips64el
config BR2_nios2
bool "Nios II"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Nios II is a soft core processor from Altera Corporation.
http://www.altera.com/
@@ -129,6 +149,7 @@ config BR2_nios2
config BR2_powerpc
bool "PowerPC"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
@@ -138,6 +159,7 @@ config BR2_powerpc
config BR2_powerpc64
bool "PowerPC64 (big endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
@@ -147,6 +169,7 @@ config BR2_powerpc64
config BR2_powerpc64le
bool "PowerPC64 (little endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Little endian.
@@ -155,6 +178,7 @@ config BR2_powerpc64le
config BR2_sh
bool "SuperH"
+ select BR2_ARCH_HAS_MMU_OPTIONAL
help
SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
@@ -164,6 +188,7 @@ config BR2_sh
config BR2_sh64
bool "SuperH64"
depends on BR2_DEPRECATED_SINCE_2015_05
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
@@ -172,6 +197,7 @@ config BR2_sh64
config BR2_sparc
bool "SPARC"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
SPARC (from Scalable Processor Architecture) is a RISC instruction
set architecture (ISA) developed by Sun Microsystems.
@@ -181,6 +207,7 @@ config BR2_sparc
config BR2_x86_64
bool "x86_64"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
x86-64 is an extension of the x86 instruction set (Intel i386
architecture compatible microprocessor).
@@ -188,6 +215,7 @@ config BR2_x86_64
config BR2_xtensa
bool "Xtensa"
+ # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
help
Xtensa is a Tensilica processor IP architecture.
http://en.wikipedia.org/wiki/Xtensa
diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index f5d317b..a2f00d2 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -64,34 +64,40 @@ config BR2_arm920t
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm922t
bool "arm922t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm926t
bool "arm926t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_MAYBE_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1136jf_s
bool "arm1136jf-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1176jz_s
bool "arm1176jz-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_HAS_ARM
@@ -99,6 +105,7 @@ config BR2_cortex_a5
select BR2_ARM_CPU_MAYBE_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a7
bool "cortex-A7"
select BR2_ARM_CPU_HAS_ARM
@@ -106,6 +113,7 @@ config BR2_cortex_a7
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a8
bool "cortex-A8"
select BR2_ARM_CPU_HAS_ARM
@@ -113,6 +121,7 @@ config BR2_cortex_a8
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a9
bool "cortex-A9"
select BR2_ARM_CPU_HAS_ARM
@@ -120,6 +129,7 @@ config BR2_cortex_a9
select BR2_ARM_CPU_MAYBE_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a12
bool "cortex-A12"
select BR2_ARM_CPU_HAS_ARM
@@ -127,6 +137,7 @@ config BR2_cortex_a12
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a15
bool "cortex-A15"
select BR2_ARM_CPU_HAS_ARM
@@ -134,28 +145,34 @@ config BR2_cortex_a15
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_fa526
bool "fa526/626"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_strongarm
bool "strongarm sa110/sa1100"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_xscale
bool "xscale"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_iwmmxt
bool "iwmmxt"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
endchoice
choice
diff --git a/arch/Config.in.xtensa b/arch/Config.in.xtensa
index 0687319..a0e18f1 100644
--- a/arch/Config.in.xtensa
+++ b/arch/Config.in.xtensa
@@ -3,8 +3,10 @@ choice
depends on BR2_xtensa
default BR2_xtensa_fsf
config BR2_XTENSA_CUSTOM
+ select BR2_ARCH_HAS_MMU_OPTIONAL
bool "Custom Xtensa processor configuration"
config BR2_xtensa_fsf
+ select BR2_ARCH_HAS_MMU_MANDATORY
bool "fsf - Default configuration"
endchoice
diff --git a/toolchain/toolchain-common.in b/toolchain/toolchain-common.in
index d50c908..4f411c3 100644
--- a/toolchain/toolchain-common.in
+++ b/toolchain/toolchain-common.in
@@ -108,8 +108,8 @@ config BR2_NEEDS_GETTEXT_IF_LOCALE
default y if (BR2_NEEDS_GETTEXT && BR2_ENABLE_LOCALE)
config BR2_USE_MMU
- bool "Enable MMU support" if BR2_arm || BR2_armeb || BR2_sh || BR2_xtensa
- default y if !BR2_bfin
+ bool "Enable MMU support" if BR2_ARCH_HAS_MMU_OPTIONAL
+ default y if BR2_ARCH_HAS_MMU_OPTIONAL || BR2_ARCH_HAS_MMU_MANDATORY
help
If your target has a MMU, you should say Y here. If you
are unsure, just say Y.
--
2.1.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config
2015-06-03 14:12 ` [Buildroot] [PATCH v2 " Guido Martínez
@ 2015-06-03 14:12 ` Guido Martínez
2015-06-03 20:48 ` Arnout Vandecappelle
2015-06-03 22:34 ` [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config Guido Martínez
1 sibling, 1 reply; 15+ messages in thread
From: Guido Martínez @ 2015-06-03 14:12 UTC (permalink / raw)
To: buildroot
Instead of (black)listing architectures when deciding the binary format,
we can enable the ELF format only when using an MMU and FLAT only when
we're not. This mimics the logic in the Linux kernel for user binaries
support.
For FDPIC, we introduce a Kconfig option to enable its selection, and
have blackfin select it.
Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
---
arch/Config.in | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/arch/Config.in b/arch/Config.in
index 3ad9574..ace1cfe 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -15,6 +15,9 @@ config BR2_ARCH_HAS_MMU_MANDATORY
config BR2_ARCH_HAS_MMU_OPTIONAL
bool
+config BR2_ARCH_HAS_FDPIC_SUPPORT
+ bool
+
choice
prompt "Target Architecture"
default BR2_i386
@@ -66,6 +69,7 @@ config BR2_aarch64
config BR2_bfin
bool "Blackfin"
+ select BR2_ARCH_HAS_FDPIC_SUPPORT
help
The Blackfin is a family of 16 or 32-bit microprocessors developed,
manufactured and marketed by Analog Devices.
@@ -272,13 +276,13 @@ config BR2_BINFMT_SUPPORTS_SHARED
# Set up target binary format
choice
prompt "Target Binary Format"
- default BR2_BINFMT_ELF if !(BR2_bfin || BR2_m68k)
- default BR2_BINFMT_FDPIC if BR2_bfin
- default BR2_BINFMT_FLAT if BR2_m68k
+ default BR2_BINFMT_ELF if BR2_USE_MMU
+ default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
+ default BR2_BINFMT_FLAT if !BR2_USE_MMU
config BR2_BINFMT_ELF
bool "ELF"
- depends on !BR2_bfin && !BR2_m68k
+ depends on BR2_USE_MMU
select BR2_BINFMT_SUPPORTS_SHARED
help
ELF (Executable and Linkable Format) is a format for libraries and
@@ -287,7 +291,7 @@ config BR2_BINFMT_ELF
config BR2_BINFMT_FDPIC
bool "FDPIC"
- depends on BR2_bfin
+ depends on BR2_ARCH_HAS_FDPIC_SUPPORT
select BR2_BINFMT_SUPPORTS_SHARED
help
ELF FDPIC binaries are based on ELF, but allow the individual load
@@ -297,7 +301,7 @@ config BR2_BINFMT_FDPIC
config BR2_BINFMT_FLAT
bool "FLAT"
- depends on BR2_bfin || BR2_m68k
+ depends on !BR2_USE_MMU
help
FLAT binary is a relatively simple and lightweight executable format
based on the original a.out format. It is widely used in environment
--
2.1.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH 1/2] arch: tidy up mmu config
2015-06-01 20:09 ` Arnout Vandecappelle
@ 2015-06-03 14:12 ` Guido Martínez
0 siblings, 0 replies; 15+ messages in thread
From: Guido Martínez @ 2015-06-03 14:12 UTC (permalink / raw)
To: buildroot
Hi Arnout!
On Mon, Jun 01, 2015 at 10:09:32PM +0200, Arnout Vandecappelle wrote:
> On 05/21/15 18:54, Guido Mart?nez wrote:
> > Instead of blacklisting which architectures support MMUs (mandatorily
> > or optionally), introduce two Kconfig options that are selected by each
> > architecture in each case.
> >
> > This simplifies the logic in BR2_USE_MMU.
> >
> > Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
>
> Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
>
> Two small improvements, but even without them this patch is OK for me.
>
> - In arch/Config.in, the ARM section and the Blackfin section look the same to
> the casual onlooker, but for ARM the MMU options depend on the subarchitecture,
> while for Blackfin it's always NOMMU. So I'd make this explicit by adding a
> comment for ARM:
>
> config BR2_arm
> bool "ARM (little endian)"
> # MMU support is set by subarchitectur in Config.in.arm
>
> Same for ELF in the second patch.
>
> - Like you did for ARM, I think you should move the MMU selection to the
> subarches for xtensa as well. Since in fact, the fsf variant is always MMU.
>
>
> So if you repost this patch and make the above changes, you can add my Acked-by.
Just resent the patches after applying these comments and the binfmt one
too.
Thanks a lot for reviewing!
--
Guido Mart?nez, VanguardiaSur
www.vanguardiasur.com.ar
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config
2015-06-03 14:12 ` [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config Guido Martínez
@ 2015-06-03 20:48 ` Arnout Vandecappelle
2015-06-03 21:27 ` Guido Martínez
0 siblings, 1 reply; 15+ messages in thread
From: Arnout Vandecappelle @ 2015-06-03 20:48 UTC (permalink / raw)
To: buildroot
On 06/03/15 16:12, Guido Mart?nez wrote:
> Instead of (black)listing architectures when deciding the binary format,
> we can enable the ELF format only when using an MMU and FLAT only when
> we're not. This mimics the logic in the Linux kernel for user binaries
> support.
>
> For FDPIC, we introduce a Kconfig option to enable its selection, and
> have blackfin select it.
>
> Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
One optional nit:
> ---
> arch/Config.in | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/arch/Config.in b/arch/Config.in
> index 3ad9574..ace1cfe 100644
> --- a/arch/Config.in
> +++ b/arch/Config.in
> @@ -15,6 +15,9 @@ config BR2_ARCH_HAS_MMU_MANDATORY
> config BR2_ARCH_HAS_MMU_OPTIONAL
> bool
>
> +config BR2_ARCH_HAS_FDPIC_SUPPORT
> + bool
> +
> choice
> prompt "Target Architecture"
> default BR2_i386
> @@ -66,6 +69,7 @@ config BR2_aarch64
>
> config BR2_bfin
> bool "Blackfin"
> + select BR2_ARCH_HAS_FDPIC_SUPPORT
> help
> The Blackfin is a family of 16 or 32-bit microprocessors developed,
> manufactured and marketed by Analog Devices.
> @@ -272,13 +276,13 @@ config BR2_BINFMT_SUPPORTS_SHARED
> # Set up target binary format
> choice
> prompt "Target Binary Format"
> - default BR2_BINFMT_ELF if !(BR2_bfin || BR2_m68k)
> - default BR2_BINFMT_FDPIC if BR2_bfin
> - default BR2_BINFMT_FLAT if BR2_m68k
> + default BR2_BINFMT_ELF if BR2_USE_MMU
> + default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
> + default BR2_BINFMT_FLAT if !BR2_USE_MMU
I think this should either be without condition at all, or with a condition
that matches the previous ones, i.e. if !BR2_USE_MMU && !BR2_ARCH_HAS_FDPIC_SUPPORT.
Also we normally don't do any vertical alignment at all, so just put a single
space instead of tabs.
Regards,
Arnout
>
> config BR2_BINFMT_ELF
> bool "ELF"
> - depends on !BR2_bfin && !BR2_m68k
> + depends on BR2_USE_MMU
> select BR2_BINFMT_SUPPORTS_SHARED
> help
> ELF (Executable and Linkable Format) is a format for libraries and
> @@ -287,7 +291,7 @@ config BR2_BINFMT_ELF
>
> config BR2_BINFMT_FDPIC
> bool "FDPIC"
> - depends on BR2_bfin
> + depends on BR2_ARCH_HAS_FDPIC_SUPPORT
> select BR2_BINFMT_SUPPORTS_SHARED
> help
> ELF FDPIC binaries are based on ELF, but allow the individual load
> @@ -297,7 +301,7 @@ config BR2_BINFMT_FDPIC
>
> config BR2_BINFMT_FLAT
> bool "FLAT"
> - depends on BR2_bfin || BR2_m68k
> + depends on !BR2_USE_MMU
> help
> FLAT binary is a relatively simple and lightweight executable format
> based on the original a.out format. It is widely used in environment
>
--
Arnout Vandecappelle arnout at mind be
Senior Embedded Software Architect +32-16-286500
Essensium/Mind http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint: 7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config
2015-06-03 20:48 ` Arnout Vandecappelle
@ 2015-06-03 21:27 ` Guido Martínez
2015-06-03 22:29 ` Arnout Vandecappelle
0 siblings, 1 reply; 15+ messages in thread
From: Guido Martínez @ 2015-06-03 21:27 UTC (permalink / raw)
To: buildroot
On Wed, Jun 03, 2015 at 10:48:43PM +0200, Arnout Vandecappelle wrote:
> On 06/03/15 16:12, Guido Mart?nez wrote:
> > @@ -272,13 +276,13 @@ config BR2_BINFMT_SUPPORTS_SHARED
> > # Set up target binary format
> > choice
> > prompt "Target Binary Format"
> > - default BR2_BINFMT_ELF if !(BR2_bfin || BR2_m68k)
> > - default BR2_BINFMT_FDPIC if BR2_bfin
> > - default BR2_BINFMT_FLAT if BR2_m68k
> > + default BR2_BINFMT_ELF if BR2_USE_MMU
> > + default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
> > + default BR2_BINFMT_FLAT if !BR2_USE_MMU
>
> I think this should either be without condition at all, or with a condition
> that matches the previous ones, i.e. if !BR2_USE_MMU && !BR2_ARCH_HAS_FDPIC_SUPPORT.
Ugh, right, either fully use the short circuiting or not at all. I'd say
we use no conditions on FLAT.
> Also we normally don't do any vertical alignment at all, so just put a single
> space instead of tabs.
OK, agreed.
Would it be better for me to resend or is this simple enough to be fixed
up when commiting?
Thanks!
--
Guido Mart?nez, VanguardiaSur
www.vanguardiasur.com.ar
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config
2015-06-03 21:27 ` Guido Martínez
@ 2015-06-03 22:29 ` Arnout Vandecappelle
2015-06-03 22:34 ` Guido Martínez
0 siblings, 1 reply; 15+ messages in thread
From: Arnout Vandecappelle @ 2015-06-03 22:29 UTC (permalink / raw)
To: buildroot
On 06/03/15 23:27, Guido Mart?nez wrote:
> On Wed, Jun 03, 2015 at 10:48:43PM +0200, Arnout Vandecappelle wrote:
>> On 06/03/15 16:12, Guido Mart?nez wrote:
>>> @@ -272,13 +276,13 @@ config BR2_BINFMT_SUPPORTS_SHARED
>>> # Set up target binary format
>>> choice
>>> prompt "Target Binary Format"
>>> - default BR2_BINFMT_ELF if !(BR2_bfin || BR2_m68k)
>>> - default BR2_BINFMT_FDPIC if BR2_bfin
>>> - default BR2_BINFMT_FLAT if BR2_m68k
>>> + default BR2_BINFMT_ELF if BR2_USE_MMU
>>> + default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
>>> + default BR2_BINFMT_FLAT if !BR2_USE_MMU
>>
>> I think this should either be without condition at all, or with a condition
>> that matches the previous ones, i.e. if !BR2_USE_MMU && !BR2_ARCH_HAS_FDPIC_SUPPORT.
> Ugh, right, either fully use the short circuiting or not at all. I'd say
> we use no conditions on FLAT.
OK for me.
>
>> Also we normally don't do any vertical alignment at all, so just put a single
>> space instead of tabs.
> OK, agreed.
>
> Would it be better for me to resend or is this simple enough to be fixed
> up when commiting?
Better resend, then the committer has less work to do.
Regards,
Arnout
>
> Thanks!
>
--
Arnout Vandecappelle arnout at mind be
Senior Embedded Software Architect +32-16-286500
Essensium/Mind http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint: 7CB5 E4CC 6C2E EFD4 6E3D A754 F963 ECAB 2450 2F1F
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config
2015-06-03 14:12 ` [Buildroot] [PATCH v2 " Guido Martínez
2015-06-03 14:12 ` [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config Guido Martínez
@ 2015-06-03 22:34 ` Guido Martínez
2015-06-03 22:34 ` [Buildroot] [PATCH v3 2/2] arch: tidy up binary formats config Guido Martínez
2015-06-09 20:52 ` [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config Thomas Petazzoni
1 sibling, 2 replies; 15+ messages in thread
From: Guido Martínez @ 2015-06-03 22:34 UTC (permalink / raw)
To: buildroot
Instead of blacklisting which architectures support MMUs (mandatorily
or optionally), introduce two Kconfig options that are selected by each
architecture in each case.
This simplifies the logic in BR2_USE_MMU.
Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
---
arch/Config.in | 28 ++++++++++++++++++++++++++++
arch/Config.in.arm | 17 +++++++++++++++++
arch/Config.in.xtensa | 2 ++
toolchain/toolchain-common.in | 4 ++--
4 files changed, 49 insertions(+), 2 deletions(-)
diff --git a/arch/Config.in b/arch/Config.in
index 06aff2c..3ad9574 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -9,6 +9,12 @@ config BR2_KERNEL_64_USERLAND_32
config BR2_SOFT_FLOAT
bool
+config BR2_ARCH_HAS_MMU_MANDATORY
+ bool
+
+config BR2_ARCH_HAS_MMU_OPTIONAL
+ bool
+
choice
prompt "Target Architecture"
default BR2_i386
@@ -17,6 +23,7 @@ choice
config BR2_arcle
bool "ARC (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
@@ -24,6 +31,7 @@ config BR2_arcle
config BR2_arceb
bool "ARC (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
that can be used from deeply embedded to high performance host
@@ -31,6 +39,7 @@ config BR2_arceb
config BR2_arm
bool "ARM (little endian)"
+ # MMU support is set by the subarchitecture file, arch/Config.in.arm
help
ARM is a 32-bit reduced instruction set computer (RISC) instruction
set architecture (ISA) developed by ARM Holdings. Little endian.
@@ -39,6 +48,7 @@ config BR2_arm
config BR2_armeb
bool "ARM (big endian)"
+ # MMU support is set by the subarchitecture file, arch/Config.in.arm
help
ARM is a 32-bit reduced instruction set computer (RISC) instruction
set architecture (ISA) developed by ARM Holdings. Big endian.
@@ -48,6 +58,7 @@ config BR2_armeb
config BR2_aarch64
bool "AArch64"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Aarch64 is a 64-bit architecture developed by ARM Holdings.
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
@@ -63,12 +74,14 @@ config BR2_bfin
config BR2_i386
bool "i386"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Intel i386 architecture compatible microprocessor
http://en.wikipedia.org/wiki/I386
config BR2_m68k
bool "m68k"
+ select BR2_ARCH_HAS_MMU_MANDATORY
depends on BROKEN # ice in uclibc / inet_ntoa_r
help
Motorola 68000 family microprocessor
@@ -76,6 +89,7 @@ config BR2_m68k
config BR2_microblazeel
bool "Microblaze AXI (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
based architecture (little endian)
@@ -84,6 +98,7 @@ config BR2_microblazeel
config BR2_microblazebe
bool "Microblaze non-AXI (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
based architecture (non-AXI, big endian)
@@ -92,6 +107,7 @@ config BR2_microblazebe
config BR2_mips
bool "MIPS (big endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
http://www.mips.com/
@@ -99,6 +115,7 @@ config BR2_mips
config BR2_mipsel
bool "MIPS (little endian)"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
http://www.mips.com/
@@ -107,6 +124,7 @@ config BR2_mipsel
config BR2_mips64
bool "MIPS64 (big endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
http://www.mips.com/
@@ -115,6 +133,7 @@ config BR2_mips64
config BR2_mips64el
bool "MIPS64 (little endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
http://www.mips.com/
@@ -122,6 +141,7 @@ config BR2_mips64el
config BR2_nios2
bool "Nios II"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
Nios II is a soft core processor from Altera Corporation.
http://www.altera.com/
@@ -129,6 +149,7 @@ config BR2_nios2
config BR2_powerpc
bool "PowerPC"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
@@ -138,6 +159,7 @@ config BR2_powerpc
config BR2_powerpc64
bool "PowerPC64 (big endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Big endian.
@@ -147,6 +169,7 @@ config BR2_powerpc64
config BR2_powerpc64le
bool "PowerPC64 (little endian)"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
Little endian.
@@ -155,6 +178,7 @@ config BR2_powerpc64le
config BR2_sh
bool "SuperH"
+ select BR2_ARCH_HAS_MMU_OPTIONAL
help
SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
@@ -164,6 +188,7 @@ config BR2_sh
config BR2_sh64
bool "SuperH64"
depends on BR2_DEPRECATED_SINCE_2015_05
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by Hitachi.
@@ -172,6 +197,7 @@ config BR2_sh64
config BR2_sparc
bool "SPARC"
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
SPARC (from Scalable Processor Architecture) is a RISC instruction
set architecture (ISA) developed by Sun Microsystems.
@@ -181,6 +207,7 @@ config BR2_sparc
config BR2_x86_64
bool "x86_64"
select BR2_ARCH_IS_64
+ select BR2_ARCH_HAS_MMU_MANDATORY
help
x86-64 is an extension of the x86 instruction set (Intel i386
architecture compatible microprocessor).
@@ -188,6 +215,7 @@ config BR2_x86_64
config BR2_xtensa
bool "Xtensa"
+ # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
help
Xtensa is a Tensilica processor IP architecture.
http://en.wikipedia.org/wiki/Xtensa
diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index f5d317b..a2f00d2 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -64,34 +64,40 @@ config BR2_arm920t
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm922t
bool "arm922t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm926t
bool "arm926t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_MAYBE_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1136jf_s
bool "arm1136jf-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1176jz_s
bool "arm1176jz-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_HAS_ARM
@@ -99,6 +105,7 @@ config BR2_cortex_a5
select BR2_ARM_CPU_MAYBE_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a7
bool "cortex-A7"
select BR2_ARM_CPU_HAS_ARM
@@ -106,6 +113,7 @@ config BR2_cortex_a7
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a8
bool "cortex-A8"
select BR2_ARM_CPU_HAS_ARM
@@ -113,6 +121,7 @@ config BR2_cortex_a8
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a9
bool "cortex-A9"
select BR2_ARM_CPU_HAS_ARM
@@ -120,6 +129,7 @@ config BR2_cortex_a9
select BR2_ARM_CPU_MAYBE_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a12
bool "cortex-A12"
select BR2_ARM_CPU_HAS_ARM
@@ -127,6 +137,7 @@ config BR2_cortex_a12
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_cortex_a15
bool "cortex-A15"
select BR2_ARM_CPU_HAS_ARM
@@ -134,28 +145,34 @@ config BR2_cortex_a15
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_fa526
bool "fa526/626"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_strongarm
bool "strongarm sa110/sa1100"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_xscale
bool "xscale"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
config BR2_iwmmxt
bool "iwmmxt"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
endchoice
choice
diff --git a/arch/Config.in.xtensa b/arch/Config.in.xtensa
index 0687319..a0e18f1 100644
--- a/arch/Config.in.xtensa
+++ b/arch/Config.in.xtensa
@@ -3,8 +3,10 @@ choice
depends on BR2_xtensa
default BR2_xtensa_fsf
config BR2_XTENSA_CUSTOM
+ select BR2_ARCH_HAS_MMU_OPTIONAL
bool "Custom Xtensa processor configuration"
config BR2_xtensa_fsf
+ select BR2_ARCH_HAS_MMU_MANDATORY
bool "fsf - Default configuration"
endchoice
diff --git a/toolchain/toolchain-common.in b/toolchain/toolchain-common.in
index d50c908..4f411c3 100644
--- a/toolchain/toolchain-common.in
+++ b/toolchain/toolchain-common.in
@@ -108,8 +108,8 @@ config BR2_NEEDS_GETTEXT_IF_LOCALE
default y if (BR2_NEEDS_GETTEXT && BR2_ENABLE_LOCALE)
config BR2_USE_MMU
- bool "Enable MMU support" if BR2_arm || BR2_armeb || BR2_sh || BR2_xtensa
- default y if !BR2_bfin
+ bool "Enable MMU support" if BR2_ARCH_HAS_MMU_OPTIONAL
+ default y if BR2_ARCH_HAS_MMU_OPTIONAL || BR2_ARCH_HAS_MMU_MANDATORY
help
If your target has a MMU, you should say Y here. If you
are unsure, just say Y.
--
2.1.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v3 2/2] arch: tidy up binary formats config
2015-06-03 22:34 ` [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config Guido Martínez
@ 2015-06-03 22:34 ` Guido Martínez
2015-06-09 20:52 ` [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config Thomas Petazzoni
1 sibling, 0 replies; 15+ messages in thread
From: Guido Martínez @ 2015-06-03 22:34 UTC (permalink / raw)
To: buildroot
Instead of (black)listing architectures when deciding the binary format,
we can enable the ELF format only when using an MMU and FLAT only when
we're not. This mimics the logic in the Linux kernel for user binaries
support.
For FDPIC, we introduce a Kconfig option to enable its selection, and
have blackfin select it.
Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
---
arch/Config.in | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/arch/Config.in b/arch/Config.in
index 3ad9574..94397b3 100644
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -15,6 +15,9 @@ config BR2_ARCH_HAS_MMU_MANDATORY
config BR2_ARCH_HAS_MMU_OPTIONAL
bool
+config BR2_ARCH_HAS_FDPIC_SUPPORT
+ bool
+
choice
prompt "Target Architecture"
default BR2_i386
@@ -66,6 +69,7 @@ config BR2_aarch64
config BR2_bfin
bool "Blackfin"
+ select BR2_ARCH_HAS_FDPIC_SUPPORT
help
The Blackfin is a family of 16 or 32-bit microprocessors developed,
manufactured and marketed by Analog Devices.
@@ -272,13 +276,13 @@ config BR2_BINFMT_SUPPORTS_SHARED
# Set up target binary format
choice
prompt "Target Binary Format"
- default BR2_BINFMT_ELF if !(BR2_bfin || BR2_m68k)
- default BR2_BINFMT_FDPIC if BR2_bfin
- default BR2_BINFMT_FLAT if BR2_m68k
+ default BR2_BINFMT_ELF if BR2_USE_MMU
+ default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
+ default BR2_BINFMT_FLAT
config BR2_BINFMT_ELF
bool "ELF"
- depends on !BR2_bfin && !BR2_m68k
+ depends on BR2_USE_MMU
select BR2_BINFMT_SUPPORTS_SHARED
help
ELF (Executable and Linkable Format) is a format for libraries and
@@ -287,7 +291,7 @@ config BR2_BINFMT_ELF
config BR2_BINFMT_FDPIC
bool "FDPIC"
- depends on BR2_bfin
+ depends on BR2_ARCH_HAS_FDPIC_SUPPORT
select BR2_BINFMT_SUPPORTS_SHARED
help
ELF FDPIC binaries are based on ELF, but allow the individual load
@@ -297,7 +301,7 @@ config BR2_BINFMT_FDPIC
config BR2_BINFMT_FLAT
bool "FLAT"
- depends on BR2_bfin || BR2_m68k
+ depends on !BR2_USE_MMU
help
FLAT binary is a relatively simple and lightweight executable format
based on the original a.out format. It is widely used in environment
--
2.1.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config
2015-06-03 22:29 ` Arnout Vandecappelle
@ 2015-06-03 22:34 ` Guido Martínez
0 siblings, 0 replies; 15+ messages in thread
From: Guido Martínez @ 2015-06-03 22:34 UTC (permalink / raw)
To: buildroot
On Thu, Jun 04, 2015 at 12:29:17AM +0200, Arnout Vandecappelle wrote:
> On 06/03/15 23:27, Guido Mart?nez wrote:
> > On Wed, Jun 03, 2015 at 10:48:43PM +0200, Arnout Vandecappelle wrote:
> >> On 06/03/15 16:12, Guido Mart?nez wrote:
> > Would it be better for me to resend or is this simple enough to be fixed
> > up when commiting?
>
> Better resend, then the committer has less work to do.
OK then, just did. Patch 1 is unmodified in v3.
--
Guido Mart?nez, VanguardiaSur
www.vanguardiasur.com.ar
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config
2015-06-03 22:34 ` [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config Guido Martínez
2015-06-03 22:34 ` [Buildroot] [PATCH v3 2/2] arch: tidy up binary formats config Guido Martínez
@ 2015-06-09 20:52 ` Thomas Petazzoni
1 sibling, 0 replies; 15+ messages in thread
From: Thomas Petazzoni @ 2015-06-09 20:52 UTC (permalink / raw)
To: buildroot
Dear Guido Mart?nez,
On Wed, 3 Jun 2015 19:34:03 -0300, Guido Mart?nez wrote:
> Instead of blacklisting which architectures support MMUs (mandatorily
> or optionally), introduce two Kconfig options that are selected by each
> architecture in each case.
>
> This simplifies the logic in BR2_USE_MMU.
>
> Signed-off-by: Guido Mart?nez <guido@vanguardiasur.com.ar>
> Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
> ---
> arch/Config.in | 28 ++++++++++++++++++++++++++++
> arch/Config.in.arm | 17 +++++++++++++++++
> arch/Config.in.xtensa | 2 ++
> toolchain/toolchain-common.in | 4 ++--
> 4 files changed, 49 insertions(+), 2 deletions(-)
Both patches applied, thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2015-06-09 20:52 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-05-21 16:54 [Buildroot] [PATCH 1/2] arch: tidy up mmu config Guido Martínez
2015-05-21 16:54 ` [Buildroot] [PATCH 2/2] arch: tidy up binary formats config Guido Martínez
2015-06-01 20:32 ` Arnout Vandecappelle
2015-06-01 16:59 ` [Buildroot] [PATCH 1/2] arch: tidy up mmu config Ezequiel Garcia
2015-06-01 20:09 ` Arnout Vandecappelle
2015-06-03 14:12 ` Guido Martínez
2015-06-03 14:12 ` [Buildroot] [PATCH v2 " Guido Martínez
2015-06-03 14:12 ` [Buildroot] [PATCH v2 2/2] arch: tidy up binary formats config Guido Martínez
2015-06-03 20:48 ` Arnout Vandecappelle
2015-06-03 21:27 ` Guido Martínez
2015-06-03 22:29 ` Arnout Vandecappelle
2015-06-03 22:34 ` Guido Martínez
2015-06-03 22:34 ` [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config Guido Martínez
2015-06-03 22:34 ` [Buildroot] [PATCH v3 2/2] arch: tidy up binary formats config Guido Martínez
2015-06-09 20:52 ` [Buildroot] [PATCH v3 1/2] arch: tidy up mmu config Thomas Petazzoni
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.