* [PATCH 2/2] drm/i915/skl: Drop the preliminary_hw_support flag
2015-07-16 16:08 [PATCH 1/2] drm/i915/skl: Don't expose the top most plane on gen9 display Damien Lespiau
@ 2015-07-16 16:08 ` Damien Lespiau
2015-07-17 7:10 ` Daniel Vetter
2015-07-29 19:00 ` [PATCH 1/2] drm/i915/skl: Don't expose the top most plane on gen9 display Konduru, Chandra
2015-07-29 20:19 ` Konduru, Chandra
2 siblings, 1 reply; 5+ messages in thread
From: Damien Lespiau @ 2015-07-16 16:08 UTC (permalink / raw)
To: intel-gfx
Time to light a candle and remove the preliminary_hw_support flag.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index e44dc0d..c8daa2d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -356,7 +356,6 @@ static const struct intel_device_info intel_cherryview_info = {
};
static const struct intel_device_info intel_skylake_info = {
- .is_preliminary = 1,
.is_skylake = 1,
.gen = 9, .num_pipes = 3,
.need_gfx_hws = 1, .has_hotplug = 1,
@@ -369,7 +368,6 @@ static const struct intel_device_info intel_skylake_info = {
};
static const struct intel_device_info intel_skylake_gt3_info = {
- .is_preliminary = 1,
.is_skylake = 1,
.gen = 9, .num_pipes = 3,
.need_gfx_hws = 1, .has_hotplug = 1,
--
2.1.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] drm/i915/skl: Drop the preliminary_hw_support flag
2015-07-16 16:08 ` [PATCH 2/2] drm/i915/skl: Drop the preliminary_hw_support flag Damien Lespiau
@ 2015-07-17 7:10 ` Daniel Vetter
0 siblings, 0 replies; 5+ messages in thread
From: Daniel Vetter @ 2015-07-17 7:10 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On Thu, Jul 16, 2015 at 05:08:09PM +0100, Damien Lespiau wrote:
> Time to light a candle and remove the preliminary_hw_support flag.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Both applied to dinq, thanks.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index e44dc0d..c8daa2d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -356,7 +356,6 @@ static const struct intel_device_info intel_cherryview_info = {
> };
>
> static const struct intel_device_info intel_skylake_info = {
> - .is_preliminary = 1,
> .is_skylake = 1,
> .gen = 9, .num_pipes = 3,
> .need_gfx_hws = 1, .has_hotplug = 1,
> @@ -369,7 +368,6 @@ static const struct intel_device_info intel_skylake_info = {
> };
>
> static const struct intel_device_info intel_skylake_gt3_info = {
> - .is_preliminary = 1,
> .is_skylake = 1,
> .gen = 9, .num_pipes = 3,
> .need_gfx_hws = 1, .has_hotplug = 1,
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] drm/i915/skl: Don't expose the top most plane on gen9 display
2015-07-16 16:08 [PATCH 1/2] drm/i915/skl: Don't expose the top most plane on gen9 display Damien Lespiau
2015-07-16 16:08 ` [PATCH 2/2] drm/i915/skl: Drop the preliminary_hw_support flag Damien Lespiau
@ 2015-07-29 19:00 ` Konduru, Chandra
2015-07-29 20:19 ` Konduru, Chandra
2 siblings, 0 replies; 5+ messages in thread
From: Konduru, Chandra @ 2015-07-29 19:00 UTC (permalink / raw)
To: Lespiau, Damien, intel-gfx
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> Damien Lespiau
> Sent: Thursday, July 16, 2015 9:08 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915/skl: Don't expose the top most plane
> on gen9 display
>
> on SKL/BXT, the top most plane hardware is shared between the legacy
> cursor registers and an actual plane. Daniel and Ville don't want to
> expose 2 DRM planes and would rather expose a CURSOR plane that has all
> the usual plane properties, and that's a blocker for lifting the
> prelimary_hw_support flag.
>
> Unfortunately noone has had the time to finish this yet, but lifting the
> prelimary_hw_support flag is long overdue. As an intermediate solution
> we can merely not expose the top most plane
>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
> drivers/gpu/drm/i915/i915_dma.c | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c
> b/drivers/gpu/drm/i915/i915_dma.c
> index 91925cb..96564cd 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -726,11 +726,19 @@ static void intel_device_info_runtime_init(struct
> drm_device *dev)
>
> info = (struct intel_device_info *)&dev_priv->info;
>
> + /*
> + * Skylake and Broxton currently don't expose the topmost plane as its
> + * use is exclusive with the legacy cursor and we only want to expose
> + * one of those, not both. Until we can safely expose the topmost plane
> + * as a DRM_PLANE_TYPE_CURSOR with all the features
> exposed/supported,
> + * we don't expose the topmost plane at all to prevent ABI breakage
> + * down the line.
> + */
> if (IS_BROXTON(dev)) {
> - info->num_sprites[PIPE_A] = 3;
> - info->num_sprites[PIPE_B] = 3;
> - info->num_sprites[PIPE_C] = 2;
> - } else if (IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen == 9)
> + info->num_sprites[PIPE_A] = 2;
> + info->num_sprites[PIPE_B] = 2;
> + info->num_sprites[PIPE_C] = 1;
> + } else if (IS_VALLEYVIEW(dev))
> for_each_pipe(dev_priv, pipe)
> info->num_sprites[pipe] = 2;
For SKL, by default you can keep as 2 planes + 1 cursor, but let
userland change to 3 planes + no cursor. This is a one-time
request only and not ping ponging between 2+1 and 3+0.
For Android, this gives flexibility to use 3 planes where
cursor isn't a dominant case.
Similarly, for BXT, allow 4+0 and keep 3+1 as default for
legacy userlands.
> else
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/2] drm/i915/skl: Don't expose the top most plane on gen9 display
2015-07-16 16:08 [PATCH 1/2] drm/i915/skl: Don't expose the top most plane on gen9 display Damien Lespiau
2015-07-16 16:08 ` [PATCH 2/2] drm/i915/skl: Drop the preliminary_hw_support flag Damien Lespiau
2015-07-29 19:00 ` [PATCH 1/2] drm/i915/skl: Don't expose the top most plane on gen9 display Konduru, Chandra
@ 2015-07-29 20:19 ` Konduru, Chandra
2 siblings, 0 replies; 5+ messages in thread
From: Konduru, Chandra @ 2015-07-29 20:19 UTC (permalink / raw)
To: Lespiau, Damien, intel-gfx
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> Damien Lespiau
> Sent: Thursday, July 16, 2015 9:08 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915/skl: Don't expose the top most plane
> on gen9 display
>
> on SKL/BXT, the top most plane hardware is shared between the legacy
> cursor registers and an actual plane. Daniel and Ville don't want to
> expose 2 DRM planes and would rather expose a CURSOR plane that has all
> the usual plane properties, and that's a blocker for lifting the
> prelimary_hw_support flag.
>
> Unfortunately noone has had the time to finish this yet, but lifting the
> prelimary_hw_support flag is long overdue. As an intermediate solution
> we can merely not expose the top most plane
>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
> drivers/gpu/drm/i915/i915_dma.c | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c
> b/drivers/gpu/drm/i915/i915_dma.c
> index 91925cb..96564cd 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -726,11 +726,19 @@ static void intel_device_info_runtime_init(struct
> drm_device *dev)
>
> info = (struct intel_device_info *)&dev_priv->info;
>
> + /*
> + * Skylake and Broxton currently don't expose the topmost plane as its
> + * use is exclusive with the legacy cursor and we only want to expose
> + * one of those, not both. Until we can safely expose the topmost plane
> + * as a DRM_PLANE_TYPE_CURSOR with all the features
> exposed/supported,
> + * we don't expose the topmost plane at all to prevent ABI breakage
> + * down the line.
> + */
> if (IS_BROXTON(dev)) {
> - info->num_sprites[PIPE_A] = 3;
> - info->num_sprites[PIPE_B] = 3;
> - info->num_sprites[PIPE_C] = 2;
> - } else if (IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen == 9)
> + info->num_sprites[PIPE_A] = 2;
> + info->num_sprites[PIPE_B] = 2;
> + info->num_sprites[PIPE_C] = 1;
> + } else if (IS_VALLEYVIEW(dev))
> for_each_pipe(dev_priv, pipe)
> info->num_sprites[pipe] = 2;
By the way, this is breaking kms_plane_scaling where 3rd plane used as
regular plane as it was allowed before by kernel.
There may be other igts also impacted by this change.
> else
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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^ permalink raw reply [flat|nested] 5+ messages in thread