* [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms
@ 2015-07-21 9:18 Sonika Jindal
2015-07-21 9:31 ` Damien Lespiau
0 siblings, 1 reply; 6+ messages in thread
From: Sonika Jindal @ 2015-07-21 9:18 UTC (permalink / raw)
To: intel-gfx
This is to get PSR support for bxt.
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 718170c..54d2729 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table {
#define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
-#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
- IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
- IS_SKYLAKE(dev))
+#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \
+ INTEL_INFO(dev)->gen >= 8)
#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
IS_SKYLAKE(dev))
--
1.7.10.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms
2015-07-21 9:18 [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms Sonika Jindal
@ 2015-07-21 9:31 ` Damien Lespiau
2015-07-21 9:47 ` Daniel Vetter
2015-07-22 9:36 ` [PATCH] drm/i915/bxt: " Sonika Jindal
0 siblings, 2 replies; 6+ messages in thread
From: Damien Lespiau @ 2015-07-21 9:31 UTC (permalink / raw)
To: Sonika Jindal; +Cc: intel-gfx
On Tue, Jul 21, 2015 at 02:48:31PM +0530, Sonika Jindal wrote:
> This is to get PSR support for bxt.
>
> Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Maybe with a drm/i915/bxt prefix:
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
--
Damien
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 718170c..54d2729 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table {
>
> #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
> #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
> -#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
> - IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
> - IS_SKYLAKE(dev))
> +#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \
> + INTEL_INFO(dev)->gen >= 8)
> #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
> IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> IS_SKYLAKE(dev))
> --
> 1.7.10.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms
2015-07-21 9:31 ` Damien Lespiau
@ 2015-07-21 9:47 ` Daniel Vetter
2015-08-11 4:30 ` Jindal, Sonika
2015-07-22 9:36 ` [PATCH] drm/i915/bxt: " Sonika Jindal
1 sibling, 1 reply; 6+ messages in thread
From: Daniel Vetter @ 2015-07-21 9:47 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On Tue, Jul 21, 2015 at 10:31:19AM +0100, Damien Lespiau wrote:
> On Tue, Jul 21, 2015 at 02:48:31PM +0530, Sonika Jindal wrote:
> > This is to get PSR support for bxt.
> >
> > Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
>
> Maybe with a drm/i915/bxt prefix:
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Is this actually tested? Can we maybe enable psr by default (Rodrigo seems
so close ...)?
-Daniel
>
> --
> Damien
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 718170c..54d2729 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table {
> >
> > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
> > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
> > -#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
> > - IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
> > - IS_SKYLAKE(dev))
> > +#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \
> > + INTEL_INFO(dev)->gen >= 8)
> > #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
> > IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> > IS_SKYLAKE(dev))
> > --
> > 1.7.10.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] drm/i915/bxt: Update HAS_PSR macro to include all gen>=8 platforms
2015-07-21 9:31 ` Damien Lespiau
2015-07-21 9:47 ` Daniel Vetter
@ 2015-07-22 9:36 ` Sonika Jindal
1 sibling, 0 replies; 6+ messages in thread
From: Sonika Jindal @ 2015-07-22 9:36 UTC (permalink / raw)
To: intel-gfx
This is to get PSR support for bxt.
v2: Adding bxt prefix in title (Damien)
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 718170c..54d2729 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table {
#define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
-#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
- IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
- IS_SKYLAKE(dev))
+#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \
+ INTEL_INFO(dev)->gen >= 8)
#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
IS_SKYLAKE(dev))
--
1.7.10.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms
2015-07-21 9:47 ` Daniel Vetter
@ 2015-08-11 4:30 ` Jindal, Sonika
2015-08-11 9:25 ` Daniel Vetter
0 siblings, 1 reply; 6+ messages in thread
From: Jindal, Sonika @ 2015-08-11 4:30 UTC (permalink / raw)
To: Daniel Vetter, Lespiau, Damien; +Cc: intel-gfx
I replied to Daniel last time. Pasting it on mailing list as well:
"Yes this is tested on android with HW tracking. Not sure about enabling by default part. But this patch will be anyways required.
Regards,
Sonika"
-----Original Message-----
From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Tuesday, July 21, 2015 3:18 PM
To: Lespiau, Damien
Cc: Jindal, Sonika; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms
On Tue, Jul 21, 2015 at 10:31:19AM +0100, Damien Lespiau wrote:
> On Tue, Jul 21, 2015 at 02:48:31PM +0530, Sonika Jindal wrote:
> > This is to get PSR support for bxt.
> >
> > Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
>
> Maybe with a drm/i915/bxt prefix:
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Is this actually tested? Can we maybe enable psr by default (Rodrigo seems so close ...)?
-Daniel
>
> --
> Damien
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h index 718170c..54d2729 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table {
> >
> > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
> > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
> > -#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
> > - IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
> > - IS_SKYLAKE(dev))
> > +#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \
> > + INTEL_INFO(dev)->gen >= 8)
> > #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
> > IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> > IS_SKYLAKE(dev))
> > --
> > 1.7.10.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms
2015-08-11 4:30 ` Jindal, Sonika
@ 2015-08-11 9:25 ` Daniel Vetter
0 siblings, 0 replies; 6+ messages in thread
From: Daniel Vetter @ 2015-08-11 9:25 UTC (permalink / raw)
To: Jindal, Sonika; +Cc: intel-gfx
On Tue, Aug 11, 2015 at 04:30:10AM +0000, Jindal, Sonika wrote:
> I replied to Daniel last time. Pasting it on mailing list as well:
>
> "Yes this is tested on android with HW tracking. Not sure about enabling
> by default part. But this patch will be anyways required.
I'd like it to be tested with igt testcases from Paulo/Rodrigo though
since that's what we use for upstream validation and to make sure all
upstream use-cases are working too. Otherwise we just make an accounting
trick and shift the maintainenance burden from android to upstream without
being able to use the code really. And looking at psr fixing up the last
10% took 90% of all the effort.
And if there are failures still in the current igts (both kms_psr and
kms_frontbuffer_tracking) then I want a plan for how to get this all
addressed.
-Daniel
>
> Regards,
> Sonika"
>
> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Tuesday, July 21, 2015 3:18 PM
> To: Lespiau, Damien
> Cc: Jindal, Sonika; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms
>
> On Tue, Jul 21, 2015 at 10:31:19AM +0100, Damien Lespiau wrote:
> > On Tue, Jul 21, 2015 at 02:48:31PM +0530, Sonika Jindal wrote:
> > > This is to get PSR support for bxt.
> > >
> > > Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
> >
> > Maybe with a drm/i915/bxt prefix:
> >
> > Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
>
> Is this actually tested? Can we maybe enable psr by default (Rodrigo seems so close ...)?
> -Daniel
>
> >
> > --
> > Damien
> >
> > > ---
> > > drivers/gpu/drm/i915/i915_drv.h | 5 ++---
> > > 1 file changed, 2 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > > b/drivers/gpu/drm/i915/i915_drv.h index 718170c..54d2729 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table {
> > >
> > > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
> > > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
> > > -#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
> > > - IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
> > > - IS_SKYLAKE(dev))
> > > +#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \
> > > + INTEL_INFO(dev)->gen >= 8)
> > > #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
> > > IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> > > IS_SKYLAKE(dev))
> > > --
> > > 1.7.10.4
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-08-11 9:25 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-07-21 9:18 [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms Sonika Jindal
2015-07-21 9:31 ` Damien Lespiau
2015-07-21 9:47 ` Daniel Vetter
2015-08-11 4:30 ` Jindal, Sonika
2015-08-11 9:25 ` Daniel Vetter
2015-07-22 9:36 ` [PATCH] drm/i915/bxt: " Sonika Jindal
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