[PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[Adrian Alonso]

From: Robin Gong <b38343@freescale.com>

Fix system chrash caused by groups whose number is smaller than the number
of groups of the last pinctl instance which is not initialized.

iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing
the second instance (iomuxc) the chrash below occurs.

Uncompressing Linux... done, booting the kernel.
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.2.0-next-20150901-00006-gebfa43c (aalonso@bluefly)
[    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7)
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasin instruction cache
[    0.000000] Machine model: Freescale i.MX7 SabreSD Board
[    0.661012] [<802a6cb0>] (strcmp) from [<802cc80c>] (imx_dt_node_to_map+0x58/0x208)
[    0.668879] [<802cc80c>] (imx_dt_node_to_map) from [<802cbe24>] (pinctrl_dt_to_map+0x174/0x2b0)
[    0.677654] [<802cbe24>] (pinctrl_dt_to_map) from [<802c8f18>] (pinctrl_get+0x100/0x424)
[    0.685878] [<802c8f18>] (pinctrl_get) from [<802c9510>] (pinctrl_register+0x26c/0x480)
[    0.694104] [<802c9510>] (pinctrl_register) from [<802ccf3c>] (imx_pinctrl_probe+0x580/0x6e8)
[    0.702706] [<802ccf3c>] (imx_pinctrl_probe) from [<80351b58>] (platform_drv_probe+0x44/0xa4)
[    0.711455] [<80351b58>] (platform_drv_probe) from [<803503ec>] (driver_probe_device+0x174/0x2b4)
[    0.720405] [<803503ec>] (driver_probe_device) from [<803505fc>] (__driver_attach+0x8c/0x90)
[    0.728982] [<803505fc>] (__driver_attach) from [<8034e930>] (bus_for_each_dev+0x6c/0xa0)
[    0.737381] [<8034e930>] (bus_for_each_dev) from [<8034fb88>] (bus_add_driver+0x148/0x1f0)
[    0.745804] [<8034fb88>] (bus_add_driver) from [<80350c00>] (driver_register+0x78/0xf8)
[    0.753880] [<80350c00>] (driver_register) from [<800097d0>] (do_one_initcall+0x8c/0x1d4)
[    0.762282] [<800097d0>] (do_one_initcall) from [<80987dac>] (kernel_init_freeable+0x144/0x1e4)
[    0.771061] [<80987dac>] (kernel_init_freeable) from [<806d9c7c>] (kernel_init+0x8/0xe8)
[    0.779285] [<806d9c7c>] (kernel_init) from [<8000f628>] (ret_from_fork+0x14/0x2c)
[    0.786981] Code: e3520000 e5e32001 1afffffb e12fff1e (e4d03001)

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Chages for V2:
- Reorder patch series
- Add platform boot up information on kernel error
- Move gpr_index to imx_pinctrl_soc_info
Changes for V3:
- Rename grp_index to group_index
Changes for V4: Resend
Changes for V5: Resend

 drivers/pinctrl/freescale/pinctrl-imx.c | 3 +--
 drivers/pinctrl/freescale/pinctrl-imx.h | 1 +
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index d7b98ba..b9c6deb 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -580,7 +580,6 @@ static int imx_pinctrl_parse_functions(struct device_node *np,
 	struct device_node *child;
 	struct imx_pmx_func *func;
 	struct imx_pin_group *grp;
-	static u32 grp_index;
 	u32 i = 0;
 
 	dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
@@ -599,7 +598,7 @@ static int imx_pinctrl_parse_functions(struct device_node *np,
 
 	for_each_child_of_node(np, child) {
 		func->groups[i] = child->name;
-		grp = &info->groups[grp_index++];
+		grp = &info->groups[info->group_index++];
 		imx_pinctrl_parse_groups(child, grp, info, i++);
 	}
 
diff --git a/drivers/pinctrl/freescale/pinctrl-imx.h b/drivers/pinctrl/freescale/pinctrl-imx.h
index 49e55d3..2a5fe72 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.h
+++ b/drivers/pinctrl/freescale/pinctrl-imx.h
@@ -78,6 +78,7 @@ struct imx_pinctrl_soc_info {
 	struct imx_pin_reg *pin_regs;
 	struct imx_pin_group *groups;
 	unsigned int ngroups;
+	unsigned int group_index;
 	struct imx_pmx_func *functions;
 	unsigned int nfunctions;
 	unsigned int flags;
-- 
2.1.4

[PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[Adrian Alonso]

From: Robin Gong <b38343@freescale.com>

Fix system chrash caused by groups whose number is smaller than the number
of groups of the last pinctl instance which is not initialized.

iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing
the second instance (iomuxc) the chrash below occurs.

Uncompressing Linux... done, booting the kernel.
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.2.0-next-20150901-00006-gebfa43c (aalonso at bluefly)
[    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7)
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasin instruction cache
[    0.000000] Machine model: Freescale i.MX7 SabreSD Board
[    0.661012] [<802a6cb0>] (strcmp) from [<802cc80c>] (imx_dt_node_to_map+0x58/0x208)
[    0.668879] [<802cc80c>] (imx_dt_node_to_map) from [<802cbe24>] (pinctrl_dt_to_map+0x174/0x2b0)
[    0.677654] [<802cbe24>] (pinctrl_dt_to_map) from [<802c8f18>] (pinctrl_get+0x100/0x424)
[    0.685878] [<802c8f18>] (pinctrl_get) from [<802c9510>] (pinctrl_register+0x26c/0x480)
[    0.694104] [<802c9510>] (pinctrl_register) from [<802ccf3c>] (imx_pinctrl_probe+0x580/0x6e8)
[    0.702706] [<802ccf3c>] (imx_pinctrl_probe) from [<80351b58>] (platform_drv_probe+0x44/0xa4)
[    0.711455] [<80351b58>] (platform_drv_probe) from [<803503ec>] (driver_probe_device+0x174/0x2b4)
[    0.720405] [<803503ec>] (driver_probe_device) from [<803505fc>] (__driver_attach+0x8c/0x90)
[    0.728982] [<803505fc>] (__driver_attach) from [<8034e930>] (bus_for_each_dev+0x6c/0xa0)
[    0.737381] [<8034e930>] (bus_for_each_dev) from [<8034fb88>] (bus_add_driver+0x148/0x1f0)
[    0.745804] [<8034fb88>] (bus_add_driver) from [<80350c00>] (driver_register+0x78/0xf8)
[    0.753880] [<80350c00>] (driver_register) from [<800097d0>] (do_one_initcall+0x8c/0x1d4)
[    0.762282] [<800097d0>] (do_one_initcall) from [<80987dac>] (kernel_init_freeable+0x144/0x1e4)
[    0.771061] [<80987dac>] (kernel_init_freeable) from [<806d9c7c>] (kernel_init+0x8/0xe8)
[    0.779285] [<806d9c7c>] (kernel_init) from [<8000f628>] (ret_from_fork+0x14/0x2c)
[    0.786981] Code: e3520000 e5e32001 1afffffb e12fff1e (e4d03001)

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Chages for V2:
- Reorder patch series
- Add platform boot up information on kernel error
- Move gpr_index to imx_pinctrl_soc_info
Changes for V3:
- Rename grp_index to group_index
Changes for V4: Resend
Changes for V5: Resend

 drivers/pinctrl/freescale/pinctrl-imx.c | 3 +--
 drivers/pinctrl/freescale/pinctrl-imx.h | 1 +
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index d7b98ba..b9c6deb 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -580,7 +580,6 @@ static int imx_pinctrl_parse_functions(struct device_node *np,
 	struct device_node *child;
 	struct imx_pmx_func *func;
 	struct imx_pin_group *grp;
-	static u32 grp_index;
 	u32 i = 0;
 
 	dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
@@ -599,7 +598,7 @@ static int imx_pinctrl_parse_functions(struct device_node *np,
 
 	for_each_child_of_node(np, child) {
 		func->groups[i] = child->name;
-		grp = &info->groups[grp_index++];
+		grp = &info->groups[info->group_index++];
 		imx_pinctrl_parse_groups(child, grp, info, i++);
 	}
 
diff --git a/drivers/pinctrl/freescale/pinctrl-imx.h b/drivers/pinctrl/freescale/pinctrl-imx.h
index 49e55d3..2a5fe72 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.h
+++ b/drivers/pinctrl/freescale/pinctrl-imx.h
@@ -78,6 +78,7 @@ struct imx_pinctrl_soc_info {
 	struct imx_pin_reg *pin_regs;
 	struct imx_pin_group *groups;
 	unsigned int ngroups;
+	unsigned int group_index;
 	struct imx_pmx_func *functions;
 	unsigned int nfunctions;
 	unsigned int flags;
-- 
2.1.4

[PATCH v5 2/7] ARM: dts: imx: imx7d add iomuxc lpsr device node

[Adrian Alonso]

Add device tree node to support iomuxc-lpsr controller, fsl,iput-sel
phandle allows to get input select register base address which is
shared from main iomuxc controller.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Add phandle to get input select register base address
Changes for V4: Resend
Changes for V5: Rename property to fsl,input-sel

 arch/arm/boot/dts/imx7d.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 15c2193..92ef0a9 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -446,6 +446,12 @@
 				status = "disabled";
 			};
 
+			iomuxc_lpsr: iomuxc-lpsr@302c0000 {
+				compatible = "fsl,imx7d-iomuxc-lpsr";
+				reg = <0x302c0000 0x10000>;
+				fsl,input-sel = <&iomuxc>;
+			};
+
 			gpt1: gpt@302d0000 {
 				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 				reg = <0x302d0000 0x10000>;
-- 
2.1.4

[PATCH v5 2/7] ARM: dts: imx: imx7d add iomuxc lpsr device node

[Adrian Alonso]

Add device tree node to support iomuxc-lpsr controller, fsl,iput-sel
phandle allows to get input select register base address which is
shared from main iomuxc controller.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Add phandle to get input select register base address
Changes for V4: Resend
Changes for V5: Rename property to fsl,input-sel

 arch/arm/boot/dts/imx7d.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 15c2193..92ef0a9 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -446,6 +446,12 @@
 				status = "disabled";
 			};
 
+			iomuxc_lpsr: iomuxc-lpsr at 302c0000 {
+				compatible = "fsl,imx7d-iomuxc-lpsr";
+				reg = <0x302c0000 0x10000>;
+				fsl,input-sel = <&iomuxc>;
+			};
+
 			gpt1: gpt at 302d0000 {
 				compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 				reg = <0x302d0000 0x10000>;
-- 
2.1.4

[PATCH v5 3/7] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads

[Adrian Alonso]

Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Resend
Changes for V4: Resend
Changes for V5: Resend

 arch/arm/boot/dts/imx7d-sdb.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 8059458..c8a178c 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -419,3 +419,18 @@
 
 	};
 };
+
+&iomuxc_lpsr {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog_2>;
+
+	imx7d-sdb {
+		pinctrl_hog_2: hoggrp-2 {
+			fsl,pins = <
+				MX7D_PAD_GPIO1_IO05__GPIO1_IO5    0x14
+				MX7D_PAD_GPIO1_IO07__GPIO1_IO7    0x59
+				MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
+			>;
+		};
+	};
+};
-- 
2.1.4

[PATCH v5 3/7] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads

[Adrian Alonso]

Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Resend
Changes for V4: Resend
Changes for V5: Resend

 arch/arm/boot/dts/imx7d-sdb.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 8059458..c8a178c 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -419,3 +419,18 @@
 
 	};
 };
+
+&iomuxc_lpsr {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog_2>;
+
+	imx7d-sdb {
+		pinctrl_hog_2: hoggrp-2 {
+			fsl,pins = <
+				MX7D_PAD_GPIO1_IO05__GPIO1_IO5    0x14
+				MX7D_PAD_GPIO1_IO07__GPIO1_IO7    0x59
+				MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
+			>;
+		};
+	};
+};
-- 
2.1.4

[PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Adrian Alonso]

Allow mux_reg offset zero to be a valid pin_id, on imx7d
mux_conf reg offset is zero for iomuxc-lspr controller

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Resend
Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
Changes for V5:
- Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
- Allow mux_reg ZERO OFFSET as pin_id

 drivers/pinctrl/freescale/pinctrl-imx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index b9c6deb..23348d8 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -550,7 +550,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
 				conf_reg = -1;
 		}
 
-		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
+		pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
 		pin_reg = &info->pin_regs[pin_id];
 		pin->pin = pin_id;
 		grp->pin_ids[i] = pin_id;
-- 
2.1.4

[PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Adrian Alonso]

Allow mux_reg offset zero to be a valid pin_id, on imx7d
mux_conf reg offset is zero for iomuxc-lspr controller

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Resend
Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
Changes for V5:
- Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
- Allow mux_reg ZERO OFFSET as pin_id

 drivers/pinctrl/freescale/pinctrl-imx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index b9c6deb..23348d8 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -550,7 +550,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
 				conf_reg = -1;
 		}
 
-		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
+		pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
 		pin_reg = &info->pin_regs[pin_id];
 		pin->pin = pin_id;
 		grp->pin_ids[i] = pin_id;
-- 
2.1.4

[PATCH v5 5/7] pinctrl: freescale: imx: add shared input select reg support

[Adrian Alonso]

- Add shared input select register support
- imx7d has two iomux controllers iomuxc and iomuxc-lpsr
  which share select_input register for daisy chain settings

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3:
- Use of_parse_phandle instead of of_get_child_by_name to get input select
  base register address
Changes for V4: Resend
Changes for V5:
- Remove SHARE_INPUT_SELECT_REG flag
- Use fsl,input-sel to check if shared input select register support is used

 drivers/pinctrl/freescale/pinctrl-imx.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index 23348d8..c7946fa 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -18,6 +18,7 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/of_address.h>
 #include <linux/pinctrl/machine.h>
 #include <linux/pinctrl/pinconf.h>
 #include <linux/pinctrl/pinctrl.h>
@@ -39,6 +40,7 @@ struct imx_pinctrl {
 	struct device *dev;
 	struct pinctrl_dev *pctl;
 	void __iomem *base;
+	void __iomem *input_sel_base;
 	const struct imx_pinctrl_soc_info *info;
 };
 
@@ -254,7 +256,12 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
 			 * Regular select input register can never be at offset
 			 * 0, and we only print register value for regular case.
 			 */
-			writel(pin->input_val, ipctl->base + pin->input_reg);
+			if (ipctl->input_sel_base)
+				writel(pin->input_val, ipctl->input_sel_base +
+						pin->input_reg);
+			else
+				writel(pin->input_val, ipctl->base +
+						pin->input_reg);
 			dev_dbg(ipctl->dev,
 				"==>select_input: offset 0x%x val 0x%x\n",
 				pin->input_reg, pin->input_val);
@@ -682,6 +689,8 @@ static int imx_pinctrl_probe_dt(struct platform_device *pdev,
 int imx_pinctrl_probe(struct platform_device *pdev,
 		      struct imx_pinctrl_soc_info *info)
 {
+	struct device_node *dev_np = pdev->dev.of_node;
+	struct device_node *np;
 	struct imx_pinctrl *ipctl;
 	struct resource *res;
 	int ret, i;
@@ -712,6 +721,23 @@ int imx_pinctrl_probe(struct platform_device *pdev,
 	if (IS_ERR(ipctl->base))
 		return PTR_ERR(ipctl->base);
 
+	if (of_property_read_bool(dev_np, "fsl,input-sel")) {
+		np = of_parse_phandle(dev_np, "fsl,input-sel", 0);
+		if (np) {
+			ipctl->input_sel_base = of_iomap(np, 0);
+			if (IS_ERR(ipctl->input_sel_base)) {
+				of_node_put(np);
+				dev_err(&pdev->dev,
+					"iomuxc input select base address not found\n");
+				return PTR_ERR(ipctl->input_sel_base);
+			}
+		} else {
+			dev_err(&pdev->dev, "iomuxc fsl,input-sel property not found\n");
+			return -EINVAL;
+		}
+		of_node_put(np);
+	}
+
 	imx_pinctrl_desc.name = dev_name(&pdev->dev);
 	imx_pinctrl_desc.pins = info->pins;
 	imx_pinctrl_desc.npins = info->npins;
-- 
2.1.4

[PATCH v5 5/7] pinctrl: freescale: imx: add shared input select reg support

[Adrian Alonso]

- Add shared input select register support
- imx7d has two iomux controllers iomuxc and iomuxc-lpsr
  which share select_input register for daisy chain settings

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3:
- Use of_parse_phandle instead of of_get_child_by_name to get input select
  base register address
Changes for V4: Resend
Changes for V5:
- Remove SHARE_INPUT_SELECT_REG flag
- Use fsl,input-sel to check if shared input select register support is used

 drivers/pinctrl/freescale/pinctrl-imx.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index 23348d8..c7946fa 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -18,6 +18,7 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/of_address.h>
 #include <linux/pinctrl/machine.h>
 #include <linux/pinctrl/pinconf.h>
 #include <linux/pinctrl/pinctrl.h>
@@ -39,6 +40,7 @@ struct imx_pinctrl {
 	struct device *dev;
 	struct pinctrl_dev *pctl;
 	void __iomem *base;
+	void __iomem *input_sel_base;
 	const struct imx_pinctrl_soc_info *info;
 };
 
@@ -254,7 +256,12 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
 			 * Regular select input register can never be at offset
 			 * 0, and we only print register value for regular case.
 			 */
-			writel(pin->input_val, ipctl->base + pin->input_reg);
+			if (ipctl->input_sel_base)
+				writel(pin->input_val, ipctl->input_sel_base +
+						pin->input_reg);
+			else
+				writel(pin->input_val, ipctl->base +
+						pin->input_reg);
 			dev_dbg(ipctl->dev,
 				"==>select_input: offset 0x%x val 0x%x\n",
 				pin->input_reg, pin->input_val);
@@ -682,6 +689,8 @@ static int imx_pinctrl_probe_dt(struct platform_device *pdev,
 int imx_pinctrl_probe(struct platform_device *pdev,
 		      struct imx_pinctrl_soc_info *info)
 {
+	struct device_node *dev_np = pdev->dev.of_node;
+	struct device_node *np;
 	struct imx_pinctrl *ipctl;
 	struct resource *res;
 	int ret, i;
@@ -712,6 +721,23 @@ int imx_pinctrl_probe(struct platform_device *pdev,
 	if (IS_ERR(ipctl->base))
 		return PTR_ERR(ipctl->base);
 
+	if (of_property_read_bool(dev_np, "fsl,input-sel")) {
+		np = of_parse_phandle(dev_np, "fsl,input-sel", 0);
+		if (np) {
+			ipctl->input_sel_base = of_iomap(np, 0);
+			if (IS_ERR(ipctl->input_sel_base)) {
+				of_node_put(np);
+				dev_err(&pdev->dev,
+					"iomuxc input select base address not found\n");
+				return PTR_ERR(ipctl->input_sel_base);
+			}
+		} else {
+			dev_err(&pdev->dev, "iomuxc fsl,input-sel property not found\n");
+			return -EINVAL;
+		}
+		of_node_put(np);
+	}
+
 	imx_pinctrl_desc.name = dev_name(&pdev->dev);
 	imx_pinctrl_desc.pins = info->pins;
 	imx_pinctrl_desc.npins = info->npins;
-- 
2.1.4

[PATCH v5 6/7] pinctrl: freescale: imx7d: support iomux lpsr controller

[Adrian Alonso]

iMX7D has two iomuxc controllers, iomuxc controller similar as
previous iMX SoC generation and iomuxc-lpsr which provides low
power state rentetion capabilities on gpios that are part of
iomuxc-lpsr

Add iomuxc-lpsr gpio group id's

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Add imx7d_lpsr_pads enums
Changes for V3: Resend
Changes for V4: Resend
Changes for V5: Remove flags SHARE_INPUT_SELECT_REG and
 ZERO_OFFSET_VALID.

 drivers/pinctrl/freescale/pinctrl-imx7d.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx7d.c b/drivers/pinctrl/freescale/pinctrl-imx7d.c
index 1fa7530..e901907 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx7d.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx7d.c
@@ -174,6 +174,17 @@ enum imx7d_pads {
 	MX7D_PAD_ENET1_COL = 154,
 };
 
+enum imx7d_lpsr_pads {
+	MX7D_PAD_GPIO1_IO00 = 0,
+	MX7D_PAD_GPIO1_IO01 = 1,
+	MX7D_PAD_GPIO1_IO02 = 2,
+	MX7D_PAD_GPIO1_IO03 = 3,
+	MX7D_PAD_GPIO1_IO04 = 4,
+	MX7D_PAD_GPIO1_IO05 = 5,
+	MX7D_PAD_GPIO1_IO06 = 6,
+	MX7D_PAD_GPIO1_IO07 = 7,
+};
+
 /* Pad names for the pinmux subsystem */
 static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
 	IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0),
@@ -333,13 +344,31 @@ static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL),
 };
 
+/* Pad names for the pinmux subsystem */
+static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = {
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07),
+};
+
 static struct imx_pinctrl_soc_info imx7d_pinctrl_info = {
 	.pins = imx7d_pinctrl_pads,
 	.npins = ARRAY_SIZE(imx7d_pinctrl_pads),
 };
 
+static struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = {
+	.pins = imx7d_lpsr_pinctrl_pads,
+	.npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads),
+};
+
 static struct of_device_id imx7d_pinctrl_of_match[] = {
 	{ .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, },
+	{ .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info },
 	{ /* sentinel */ }
 };
 
-- 
2.1.4

[PATCH v5 6/7] pinctrl: freescale: imx7d: support iomux lpsr controller

[Adrian Alonso]

iMX7D has two iomuxc controllers, iomuxc controller similar as
previous iMX SoC generation and iomuxc-lpsr which provides low
power state rentetion capabilities on gpios that are part of
iomuxc-lpsr

Add iomuxc-lpsr gpio group id's

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Add imx7d_lpsr_pads enums
Changes for V3: Resend
Changes for V4: Resend
Changes for V5: Remove flags SHARE_INPUT_SELECT_REG and
 ZERO_OFFSET_VALID.

 drivers/pinctrl/freescale/pinctrl-imx7d.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/pinctrl/freescale/pinctrl-imx7d.c b/drivers/pinctrl/freescale/pinctrl-imx7d.c
index 1fa7530..e901907 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx7d.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx7d.c
@@ -174,6 +174,17 @@ enum imx7d_pads {
 	MX7D_PAD_ENET1_COL = 154,
 };
 
+enum imx7d_lpsr_pads {
+	MX7D_PAD_GPIO1_IO00 = 0,
+	MX7D_PAD_GPIO1_IO01 = 1,
+	MX7D_PAD_GPIO1_IO02 = 2,
+	MX7D_PAD_GPIO1_IO03 = 3,
+	MX7D_PAD_GPIO1_IO04 = 4,
+	MX7D_PAD_GPIO1_IO05 = 5,
+	MX7D_PAD_GPIO1_IO06 = 6,
+	MX7D_PAD_GPIO1_IO07 = 7,
+};
+
 /* Pad names for the pinmux subsystem */
 static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
 	IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0),
@@ -333,13 +344,31 @@ static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL),
 };
 
+/* Pad names for the pinmux subsystem */
+static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = {
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06),
+	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07),
+};
+
 static struct imx_pinctrl_soc_info imx7d_pinctrl_info = {
 	.pins = imx7d_pinctrl_pads,
 	.npins = ARRAY_SIZE(imx7d_pinctrl_pads),
 };
 
+static struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = {
+	.pins = imx7d_lpsr_pinctrl_pads,
+	.npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads),
+};
+
 static struct of_device_id imx7d_pinctrl_of_match[] = {
 	{ .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, },
+	{ .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info },
 	{ /* sentinel */ }
 };
 
-- 
2.1.4

[PATCH v5 7/7] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings

[Adrian Alonso]

Add iomuxc-lpsr devicetree bindings documentation
Provide documentation context as well an example on
pheriperals that could use pad from either iomuxc controller
supported by iMX7D SoC

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: New patch on imx7d iomuxc-lpsr patch series
Changes for V3: Add shared input select register notes
Changes for V4: Resend
Changes for V5:
- Fix spell error
- Remove references of SHARE_INPUT_SELECT_REG flag

 .../bindings/pinctrl/fsl,imx7d-pinctrl.txt         | 63 +++++++++++++++++++++-
 1 file changed, 62 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
index 8bbf25d..aae069f 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
@@ -1,16 +1,42 @@
 * Freescale i.MX7 Dual IOMUX Controller
 
+iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar
+as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
+power state retention capabilities on gpios that are part of iomuxc-lpsr
+(GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
+mux and pad control settings, it shares the input select register from main
+iomuxc controller for daisy chain settings, the fsl,input-sel property extends
+fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
+
+iomuxc_lpsr: iomuxc-lpsr@302c0000 {
+	compatible = "fsl,imx7d-iomuxc-lpsr";
+	reg = <0x302c0000 0x10000>;
+	fsl,input-sel = <&iomuxc>;
+};
+
+iomuxc: iomuxc@30330000 {
+	compatible = "fsl,imx7d-iomuxc";
+	reg = <0x30330000 0x10000>;
+};
+
+Pheriparials using pads from iomuxc-lpsr support low state retention power
+state, under LPSR mode GPIO's state of pads are retain.
+
 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
 and usage.
 
 Required properties:
-- compatible: "fsl,imx7d-iomuxc"
+- compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or
+  "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.
 - fsl,pins: each entry consists of 6 integers and represents the mux and config
   setting for one pin.  The first 5 integers <mux_reg conf_reg input_reg mux_val
   input_val> are specified using a PIN_FUNC_ID macro, which can be found in
   imx7d-pinfunc.h under device tree source folder.  The last integer CONFIG is
   the pad setting value like pull-up on this pin.  Please refer to i.MX7 Dual
   Reference Manual for detailed CONFIG settings.
+- fsl,input-sel: required property for iomuxc-lpsr controller, this property is
+  a phandle for main iomuxc controller which shares the input select register for
+  daisy chain settings.
 
 CONFIG bits definition:
 PAD_CTL_PUS_100K_DOWN           (0 << 5)
@@ -25,3 +51,38 @@ PAD_CTL_DSE_X1                  (0 << 0)
 PAD_CTL_DSE_X2                  (1 << 0)
 PAD_CTL_DSE_X3                  (2 << 0)
 PAD_CTL_DSE_X4                  (3 << 0)
+
+Examples:
+While iomuxc-lpsr is intended to be used by dedicated peripherals to take
+advantages of LPSR power mode, is also possible that an IP to use pads from
+any of the iomux controllers. For example the I2C1 IP can use SCL pad from
+iomuxc-lpsr controller and SDA pad from iomuxc controller as:
+
+i2c1: i2c@30a20000 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1_1 &pinctrl_i2c1_2>;
+	status = "okay";
+};
+
+iomuxc-lpsr@302c0000 {
+	compatible = "fsl,imx7d-iomuxc-lpsr";
+	reg = <0x302c0000 0x10000>;
+	fsl,input-sel = <&iomuxc>;
+
+	pinctrl_i2c1_1: i2c1grp-1 {
+		fsl,pins = <
+			MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
+		>;
+	};
+};
+
+iomuxc@30330000 {
+	compatible = "fsl,imx7d-iomuxc";
+	reg = <0x30330000 0x10000>;
+
+	pinctrl_i2c1_2: i2c1grp-2 {
+		fsl,pins = <
+			MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
+		>;
+	};
+};
-- 
2.1.4

[PATCH v5 7/7] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings

[Adrian Alonso]

Add iomuxc-lpsr devicetree bindings documentation
Provide documentation context as well an example on
pheriperals that could use pad from either iomuxc controller
supported by iMX7D SoC

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: New patch on imx7d iomuxc-lpsr patch series
Changes for V3: Add shared input select register notes
Changes for V4: Resend
Changes for V5:
- Fix spell error
- Remove references of SHARE_INPUT_SELECT_REG flag

 .../bindings/pinctrl/fsl,imx7d-pinctrl.txt         | 63 +++++++++++++++++++++-
 1 file changed, 62 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
index 8bbf25d..aae069f 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
@@ -1,16 +1,42 @@
 * Freescale i.MX7 Dual IOMUX Controller
 
+iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar
+as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
+power state retention capabilities on gpios that are part of iomuxc-lpsr
+(GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
+mux and pad control settings, it shares the input select register from main
+iomuxc controller for daisy chain settings, the fsl,input-sel property extends
+fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
+
+iomuxc_lpsr: iomuxc-lpsr at 302c0000 {
+	compatible = "fsl,imx7d-iomuxc-lpsr";
+	reg = <0x302c0000 0x10000>;
+	fsl,input-sel = <&iomuxc>;
+};
+
+iomuxc: iomuxc at 30330000 {
+	compatible = "fsl,imx7d-iomuxc";
+	reg = <0x30330000 0x10000>;
+};
+
+Pheriparials using pads from iomuxc-lpsr support low state retention power
+state, under LPSR mode GPIO's state of pads are retain.
+
 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
 and usage.
 
 Required properties:
-- compatible: "fsl,imx7d-iomuxc"
+- compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or
+  "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.
 - fsl,pins: each entry consists of 6 integers and represents the mux and config
   setting for one pin.  The first 5 integers <mux_reg conf_reg input_reg mux_val
   input_val> are specified using a PIN_FUNC_ID macro, which can be found in
   imx7d-pinfunc.h under device tree source folder.  The last integer CONFIG is
   the pad setting value like pull-up on this pin.  Please refer to i.MX7 Dual
   Reference Manual for detailed CONFIG settings.
+- fsl,input-sel: required property for iomuxc-lpsr controller, this property is
+  a phandle for main iomuxc controller which shares the input select register for
+  daisy chain settings.
 
 CONFIG bits definition:
 PAD_CTL_PUS_100K_DOWN           (0 << 5)
@@ -25,3 +51,38 @@ PAD_CTL_DSE_X1                  (0 << 0)
 PAD_CTL_DSE_X2                  (1 << 0)
 PAD_CTL_DSE_X3                  (2 << 0)
 PAD_CTL_DSE_X4                  (3 << 0)
+
+Examples:
+While iomuxc-lpsr is intended to be used by dedicated peripherals to take
+advantages of LPSR power mode, is also possible that an IP to use pads from
+any of the iomux controllers. For example the I2C1 IP can use SCL pad from
+iomuxc-lpsr controller and SDA pad from iomuxc controller as:
+
+i2c1: i2c@30a20000 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1_1 &pinctrl_i2c1_2>;
+	status = "okay";
+};
+
+iomuxc-lpsr at 302c0000 {
+	compatible = "fsl,imx7d-iomuxc-lpsr";
+	reg = <0x302c0000 0x10000>;
+	fsl,input-sel = <&iomuxc>;
+
+	pinctrl_i2c1_1: i2c1grp-1 {
+		fsl,pins = <
+			MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
+		>;
+	};
+};
+
+iomuxc at 30330000 {
+	compatible = "fsl,imx7d-iomuxc";
+	reg = <0x30330000 0x10000>;
+
+	pinctrl_i2c1_2: i2c1grp-2 {
+		fsl,pins = <
+			MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
+		>;
+	};
+};
-- 
2.1.4

Re: [PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Markus Pargmann]

[-- Attachment #1: Type: text/plain, Size: 1977 bytes --]

On Thu, Sep 24, 2015 at 03:54:00PM -0500, Adrian Alonso wrote:
> Allow mux_reg offset zero to be a valid pin_id, on imx7d
> mux_conf reg offset is zero for iomuxc-lspr controller
> 
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2: Resend
> Changes for V3: Resend
> Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
> Changes for V5:
> - Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
> - Allow mux_reg ZERO OFFSET as pin_id
> 
>  drivers/pinctrl/freescale/pinctrl-imx.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
> index b9c6deb..23348d8 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> @@ -550,7 +550,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
>  				conf_reg = -1;
>  		}
>  
> -		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> +		pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;

This will break compatibility with imx35 and imx25 pinctrl drivers. They
have definitions where mux_reg can be 0x0. See imx35-pinfunc.h and
imx25-pinfunc.h:

	git grep -E "0x0+ 0x.* 0x.* 0x.* 0x.*"

This mux_reg behaviour was not described in the DT binding
documentation. But it is used by some platforms. So even if you change
the pincfunc headers to use "-1", it would break devicetrees compiled
with earlier kernel versions.

Regards,

Markus

>  		pin_reg = &info->pin_regs[pin_id];
>  		pin->pin = pin_id;
>  		grp->pin_ids[i] = pin_id;
> -- 
> 2.1.4
> 
> 
> 

-- 
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[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

[PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Markus Pargmann]

On Thu, Sep 24, 2015 at 03:54:00PM -0500, Adrian Alonso wrote:
> Allow mux_reg offset zero to be a valid pin_id, on imx7d
> mux_conf reg offset is zero for iomuxc-lspr controller
> 
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2: Resend
> Changes for V3: Resend
> Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
> Changes for V5:
> - Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
> - Allow mux_reg ZERO OFFSET as pin_id
> 
>  drivers/pinctrl/freescale/pinctrl-imx.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
> index b9c6deb..23348d8 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> @@ -550,7 +550,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
>  				conf_reg = -1;
>  		}
>  
> -		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> +		pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;

This will break compatibility with imx35 and imx25 pinctrl drivers. They
have definitions where mux_reg can be 0x0. See imx35-pinfunc.h and
imx25-pinfunc.h:

	git grep -E "0x0+ 0x.* 0x.* 0x.* 0x.*"

This mux_reg behaviour was not described in the DT binding
documentation. But it is used by some platforms. So even if you change
the pincfunc headers to use "-1", it would break devicetrees compiled
with earlier kernel versions.

Regards,

Markus

>  		pin_reg = &info->pin_regs[pin_id];
>  		pin->pin = pin_id;
>  		grp->pin_ids[i] = pin_id;
> -- 
> 2.1.4
> 
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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Re: [PATCH v5 3/7] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads

[Markus Pargmann]

[-- Attachment #1: Type: text/plain, Size: 1482 bytes --]

On Thu, Sep 24, 2015 at 03:53:59PM -0500, Adrian Alonso wrote:
> Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings
> 
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2: Resend
> Changes for V3: Resend
> Changes for V4: Resend
> Changes for V5: Resend
> 
>  arch/arm/boot/dts/imx7d-sdb.dts | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
> index 8059458..c8a178c 100644
> --- a/arch/arm/boot/dts/imx7d-sdb.dts
> +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> @@ -419,3 +419,18 @@
>  
>  	};
>  };
> +
> +&iomuxc_lpsr {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_hog_2>;
> +
> +	imx7d-sdb {
> +		pinctrl_hog_2: hoggrp-2 {
> +			fsl,pins = <
> +				MX7D_PAD_GPIO1_IO05__GPIO1_IO5    0x14
> +				MX7D_PAD_GPIO1_IO07__GPIO1_IO7    0x59
> +				MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74

In my opinion this should still be in the pincontrol for the watchdog
instead of hogging. Also it is not obvious what the GPIOs are for.

Regards,

Markus

> +			>;
> +		};
> +	};
> +};
> -- 
> 2.1.4
> 
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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[PATCH v5 3/7] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads

[Markus Pargmann]

On Thu, Sep 24, 2015 at 03:53:59PM -0500, Adrian Alonso wrote:
> Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings
> 
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2: Resend
> Changes for V3: Resend
> Changes for V4: Resend
> Changes for V5: Resend
> 
>  arch/arm/boot/dts/imx7d-sdb.dts | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
> index 8059458..c8a178c 100644
> --- a/arch/arm/boot/dts/imx7d-sdb.dts
> +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> @@ -419,3 +419,18 @@
>  
>  	};
>  };
> +
> +&iomuxc_lpsr {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_hog_2>;
> +
> +	imx7d-sdb {
> +		pinctrl_hog_2: hoggrp-2 {
> +			fsl,pins = <
> +				MX7D_PAD_GPIO1_IO05__GPIO1_IO5    0x14
> +				MX7D_PAD_GPIO1_IO07__GPIO1_IO7    0x59
> +				MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74

In my opinion this should still be in the pincontrol for the watchdog
instead of hogging. Also it is not obvious what the GPIOs are for.

Regards,

Markus

> +			>;
> +		};
> +	};
> +};
> -- 
> 2.1.4
> 
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
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Re: [PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[Linus Walleij]

On Thu, Sep 24, 2015 at 1:53 PM, Adrian Alonso <aalonso@freescale.com> wrote:

> From: Robin Gong <b38343@freescale.com>
>
> Fix system chrash caused by groups whose number is smaller than the number
> of groups of the last pinctl instance which is not initialized.
>
> iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing
> the second instance (iomuxc) the chrash below occurs.

Looks like this is not a regression so should not be applied separately
for fixes?

I am waiting for one of the Freescale maintainers to review this, Markus
is raising issues with the DT handling and so the SoC maintainers need
to be involved in this: Shawn and/or Sascha.

Yours,
Linus Walleij

[PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[Linus Walleij]

On Thu, Sep 24, 2015 at 1:53 PM, Adrian Alonso <aalonso@freescale.com> wrote:

> From: Robin Gong <b38343@freescale.com>
>
> Fix system chrash caused by groups whose number is smaller than the number
> of groups of the last pinctl instance which is not initialized.
>
> iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing
> the second instance (iomuxc) the chrash below occurs.

Looks like this is not a regression so should not be applied separately
for fixes?

I am waiting for one of the Freescale maintainers to review this, Markus
is raising issues with the DT handling and so the SoC maintainers need
to be involved in this: Shawn and/or Sascha.

Yours,
Linus Walleij

Re: [PATCH v5 3/7] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads

[Shawn Guo]

On Fri, Sep 25, 2015 at 12:49:22PM +0200, Markus Pargmann wrote:
> On Thu, Sep 24, 2015 at 03:53:59PM -0500, Adrian Alonso wrote:
> > Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings
> > 
> > Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> > ---
> > Changes for V2: Resend
> > Changes for V3: Resend
> > Changes for V4: Resend
> > Changes for V5: Resend
> > 
> >  arch/arm/boot/dts/imx7d-sdb.dts | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
> > index 8059458..c8a178c 100644
> > --- a/arch/arm/boot/dts/imx7d-sdb.dts
> > +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> > @@ -419,3 +419,18 @@
> >  
> >  	};
> >  };
> > +
> > +&iomuxc_lpsr {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_hog_2>;
> > +
> > +	imx7d-sdb {
> > +		pinctrl_hog_2: hoggrp-2 {
> > +			fsl,pins = <
> > +				MX7D_PAD_GPIO1_IO05__GPIO1_IO5    0x14
> > +				MX7D_PAD_GPIO1_IO07__GPIO1_IO7    0x59
> > +				MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
> 
> In my opinion this should still be in the pincontrol for the watchdog
> instead of hogging. Also it is not obvious what the GPIOs are for.

+1

Shawn

[PATCH v5 3/7] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads

[Shawn Guo]

On Fri, Sep 25, 2015 at 12:49:22PM +0200, Markus Pargmann wrote:
> On Thu, Sep 24, 2015 at 03:53:59PM -0500, Adrian Alonso wrote:
> > Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings
> > 
> > Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> > ---
> > Changes for V2: Resend
> > Changes for V3: Resend
> > Changes for V4: Resend
> > Changes for V5: Resend
> > 
> >  arch/arm/boot/dts/imx7d-sdb.dts | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
> > index 8059458..c8a178c 100644
> > --- a/arch/arm/boot/dts/imx7d-sdb.dts
> > +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> > @@ -419,3 +419,18 @@
> >  
> >  	};
> >  };
> > +
> > +&iomuxc_lpsr {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_hog_2>;
> > +
> > +	imx7d-sdb {
> > +		pinctrl_hog_2: hoggrp-2 {
> > +			fsl,pins = <
> > +				MX7D_PAD_GPIO1_IO05__GPIO1_IO5    0x14
> > +				MX7D_PAD_GPIO1_IO07__GPIO1_IO7    0x59
> > +				MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
> 
> In my opinion this should still be in the pincontrol for the watchdog
> instead of hogging. Also it is not obvious what the GPIOs are for.

+1

Shawn

Re: [PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Shawn Guo]

On Fri, Sep 25, 2015 at 12:47:26PM +0200, Markus Pargmann wrote:
> On Thu, Sep 24, 2015 at 03:54:00PM -0500, Adrian Alonso wrote:
> > Allow mux_reg offset zero to be a valid pin_id, on imx7d
> > mux_conf reg offset is zero for iomuxc-lspr controller
> > 
> > Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> > ---
> > Changes for V2: Resend
> > Changes for V3: Resend
> > Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
> > Changes for V5:
> > - Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
> > - Allow mux_reg ZERO OFFSET as pin_id
> > 
> >  drivers/pinctrl/freescale/pinctrl-imx.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
> > index b9c6deb..23348d8 100644
> > --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> > +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> > @@ -550,7 +550,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
> >  				conf_reg = -1;
> >  		}
> >  
> > -		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> > +		pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
> 
> This will break compatibility with imx35 and imx25 pinctrl drivers. They
> have definitions where mux_reg can be 0x0. See imx35-pinfunc.h and
> imx25-pinfunc.h:
> 
> 	git grep -E "0x0+ 0x.* 0x.* 0x.* 0x.*"
> 
> This mux_reg behaviour was not described in the DT binding
> documentation. But it is used by some platforms. So even if you change
> the pincfunc headers to use "-1", it would break devicetrees compiled
> with earlier kernel versions.

Ah, sorry, I'm screwed on the previous review.  So we still need the
flag ZERO_OFFSET_VALID to convert invalid 0 mux_reg to -1.

@Adrian,

Will the following change just work for you?

Shawn

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index d7b98ba36825..ae801ba7e226 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -542,6 +542,9 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
                struct imx_pin_reg *pin_reg;
                struct imx_pin *pin = &grp->pins[i];
 
+               if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
+                       mux_reg = -1;
+
                if (info->flags & SHARE_MUX_CONF_REG) {
                        conf_reg = mux_reg;
                } else {
@@ -550,7 +553,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
                                conf_reg = -1;
                }
 
-               pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
+               pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
                pin_reg = &info->pin_regs[pin_id];
                pin->pin = pin_id;
                grp->pin_ids[i] = pin_id;

[PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Shawn Guo]

On Fri, Sep 25, 2015 at 12:47:26PM +0200, Markus Pargmann wrote:
> On Thu, Sep 24, 2015 at 03:54:00PM -0500, Adrian Alonso wrote:
> > Allow mux_reg offset zero to be a valid pin_id, on imx7d
> > mux_conf reg offset is zero for iomuxc-lspr controller
> > 
> > Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> > ---
> > Changes for V2: Resend
> > Changes for V3: Resend
> > Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
> > Changes for V5:
> > - Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
> > - Allow mux_reg ZERO OFFSET as pin_id
> > 
> >  drivers/pinctrl/freescale/pinctrl-imx.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
> > index b9c6deb..23348d8 100644
> > --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> > +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> > @@ -550,7 +550,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
> >  				conf_reg = -1;
> >  		}
> >  
> > -		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> > +		pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
> 
> This will break compatibility with imx35 and imx25 pinctrl drivers. They
> have definitions where mux_reg can be 0x0. See imx35-pinfunc.h and
> imx25-pinfunc.h:
> 
> 	git grep -E "0x0+ 0x.* 0x.* 0x.* 0x.*"
> 
> This mux_reg behaviour was not described in the DT binding
> documentation. But it is used by some platforms. So even if you change
> the pincfunc headers to use "-1", it would break devicetrees compiled
> with earlier kernel versions.

Ah, sorry, I'm screwed on the previous review.  So we still need the
flag ZERO_OFFSET_VALID to convert invalid 0 mux_reg to -1.

@Adrian,

Will the following change just work for you?

Shawn

diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index d7b98ba36825..ae801ba7e226 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -542,6 +542,9 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
                struct imx_pin_reg *pin_reg;
                struct imx_pin *pin = &grp->pins[i];
 
+               if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
+                       mux_reg = -1;
+
                if (info->flags & SHARE_MUX_CONF_REG) {
                        conf_reg = mux_reg;
                } else {
@@ -550,7 +553,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
                                conf_reg = -1;
                }
 
-               pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
+               pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
                pin_reg = &info->pin_regs[pin_id];
                pin->pin = pin_id;
                grp->pin_ids[i] = pin_id;

Re: [PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[Shawn Guo]

On Thu, Sep 24, 2015 at 03:53:57PM -0500, Adrian Alonso wrote:
> From: Robin Gong <b38343-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> 
> Fix system chrash caused by groups whose number is smaller than the number
> of groups of the last pinctl instance which is not initialized.
> 
> iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing
> the second instance (iomuxc) the chrash below occurs.
> 
> Uncompressing Linux... done, booting the kernel.
> [    0.000000] Booting Linux on physical CPU 0x0
> [    0.000000] Linux version 4.2.0-next-20150901-00006-gebfa43c (aalonso@bluefly)
> [    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7)
> [    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasin instruction cache
> [    0.000000] Machine model: Freescale i.MX7 SabreSD Board
> [    0.661012] [<802a6cb0>] (strcmp) from [<802cc80c>] (imx_dt_node_to_map+0x58/0x208)
> [    0.668879] [<802cc80c>] (imx_dt_node_to_map) from [<802cbe24>] (pinctrl_dt_to_map+0x174/0x2b0)
> [    0.677654] [<802cbe24>] (pinctrl_dt_to_map) from [<802c8f18>] (pinctrl_get+0x100/0x424)
> [    0.685878] [<802c8f18>] (pinctrl_get) from [<802c9510>] (pinctrl_register+0x26c/0x480)
> [    0.694104] [<802c9510>] (pinctrl_register) from [<802ccf3c>] (imx_pinctrl_probe+0x580/0x6e8)
> [    0.702706] [<802ccf3c>] (imx_pinctrl_probe) from [<80351b58>] (platform_drv_probe+0x44/0xa4)
> [    0.711455] [<80351b58>] (platform_drv_probe) from [<803503ec>] (driver_probe_device+0x174/0x2b4)
> [    0.720405] [<803503ec>] (driver_probe_device) from [<803505fc>] (__driver_attach+0x8c/0x90)
> [    0.728982] [<803505fc>] (__driver_attach) from [<8034e930>] (bus_for_each_dev+0x6c/0xa0)
> [    0.737381] [<8034e930>] (bus_for_each_dev) from [<8034fb88>] (bus_add_driver+0x148/0x1f0)
> [    0.745804] [<8034fb88>] (bus_add_driver) from [<80350c00>] (driver_register+0x78/0xf8)
> [    0.753880] [<80350c00>] (driver_register) from [<800097d0>] (do_one_initcall+0x8c/0x1d4)
> [    0.762282] [<800097d0>] (do_one_initcall) from [<80987dac>] (kernel_init_freeable+0x144/0x1e4)
> [    0.771061] [<80987dac>] (kernel_init_freeable) from [<806d9c7c>] (kernel_init+0x8/0xe8)
> [    0.779285] [<806d9c7c>] (kernel_init) from [<8000f628>] (ret_from_fork+0x14/0x2c)
> [    0.786981] Code: e3520000 e5e32001 1afffffb e12fff1e (e4d03001)
> 
> Signed-off-by: Robin Gong <b38343-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Signed-off-by: Adrian Alonso <aalonso-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

Acked-by: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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[PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[Shawn Guo]

On Thu, Sep 24, 2015 at 03:53:57PM -0500, Adrian Alonso wrote:
> From: Robin Gong <b38343@freescale.com>
> 
> Fix system chrash caused by groups whose number is smaller than the number
> of groups of the last pinctl instance which is not initialized.
> 
> iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing
> the second instance (iomuxc) the chrash below occurs.
> 
> Uncompressing Linux... done, booting the kernel.
> [    0.000000] Booting Linux on physical CPU 0x0
> [    0.000000] Linux version 4.2.0-next-20150901-00006-gebfa43c (aalonso at bluefly)
> [    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7)
> [    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasin instruction cache
> [    0.000000] Machine model: Freescale i.MX7 SabreSD Board
> [    0.661012] [<802a6cb0>] (strcmp) from [<802cc80c>] (imx_dt_node_to_map+0x58/0x208)
> [    0.668879] [<802cc80c>] (imx_dt_node_to_map) from [<802cbe24>] (pinctrl_dt_to_map+0x174/0x2b0)
> [    0.677654] [<802cbe24>] (pinctrl_dt_to_map) from [<802c8f18>] (pinctrl_get+0x100/0x424)
> [    0.685878] [<802c8f18>] (pinctrl_get) from [<802c9510>] (pinctrl_register+0x26c/0x480)
> [    0.694104] [<802c9510>] (pinctrl_register) from [<802ccf3c>] (imx_pinctrl_probe+0x580/0x6e8)
> [    0.702706] [<802ccf3c>] (imx_pinctrl_probe) from [<80351b58>] (platform_drv_probe+0x44/0xa4)
> [    0.711455] [<80351b58>] (platform_drv_probe) from [<803503ec>] (driver_probe_device+0x174/0x2b4)
> [    0.720405] [<803503ec>] (driver_probe_device) from [<803505fc>] (__driver_attach+0x8c/0x90)
> [    0.728982] [<803505fc>] (__driver_attach) from [<8034e930>] (bus_for_each_dev+0x6c/0xa0)
> [    0.737381] [<8034e930>] (bus_for_each_dev) from [<8034fb88>] (bus_add_driver+0x148/0x1f0)
> [    0.745804] [<8034fb88>] (bus_add_driver) from [<80350c00>] (driver_register+0x78/0xf8)
> [    0.753880] [<80350c00>] (driver_register) from [<800097d0>] (do_one_initcall+0x8c/0x1d4)
> [    0.762282] [<800097d0>] (do_one_initcall) from [<80987dac>] (kernel_init_freeable+0x144/0x1e4)
> [    0.771061] [<80987dac>] (kernel_init_freeable) from [<806d9c7c>] (kernel_init+0x8/0xe8)
> [    0.779285] [<806d9c7c>] (kernel_init) from [<8000f628>] (ret_from_fork+0x14/0x2c)
> [    0.786981] Code: e3520000 e5e32001 1afffffb e12fff1e (e4d03001)
> 
> Signed-off-by: Robin Gong <b38343@freescale.com>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>

Acked-by: Shawn Guo <shawnguo@kernel.org>

RE: [PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Alonso Adrian]

> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo@kernel.org]
> Sent: Friday, September 25, 2015 2:07 PM
> To: Markus Pargmann <mpa@pengutronix.de>
> Cc: Alonso Lazcano Adrian-B38018 <aalonso@freescale.com>; linux-arm-
> kernel@lists.infradead.org; shawn.guo@linaro.org; linus.walleij@linaro.org;
> lznuaa@gmail.com; devicetree@vger.kernel.org; Li Frank-B20596
> <Frank.Li@freescale.com>; Garg Nitin-B37173 <nitin.garg@freescale.com>;
> Huang Yongcai-B20788 <Anson.Huang@freescale.com>; linux-
> gpio@vger.kernel.org; robh+dt@kernel.org; kernel@pengutronix.de; Gong
> Yibin-B38343 <yibin.gong@freescale.com>
> Subject: Re: [PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero
> 
> On Fri, Sep 25, 2015 at 12:47:26PM +0200, Markus Pargmann wrote:
> > On Thu, Sep 24, 2015 at 03:54:00PM -0500, Adrian Alonso wrote:
> > > Allow mux_reg offset zero to be a valid pin_id, on imx7d mux_conf
> > > reg offset is zero for iomuxc-lspr controller
> > >
> > > Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> > > ---
> > > Changes for V2: Resend
> > > Changes for V3: Resend
> > > Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is
> > > set Changes for V5:
> > > - Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
> > > - Allow mux_reg ZERO OFFSET as pin_id
> > >
> > >  drivers/pinctrl/freescale/pinctrl-imx.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c
> > > b/drivers/pinctrl/freescale/pinctrl-imx.c
> > > index b9c6deb..23348d8 100644
> > > --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> > > +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> > > @@ -550,7 +550,7 @@ static int imx_pinctrl_parse_groups(struct
> device_node *np,
> > >  				conf_reg = -1;
> > >  		}
> > >
> > > -		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> > > +		pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
> >
> > This will break compatibility with imx35 and imx25 pinctrl drivers.
> > They have definitions where mux_reg can be 0x0. See imx35-pinfunc.h
> > and
> > imx25-pinfunc.h:
> >
> > 	git grep -E "0x0+ 0x.* 0x.* 0x.* 0x.*"
> >
> > This mux_reg behaviour was not described in the DT binding
> > documentation. But it is used by some platforms. So even if you change
> > the pincfunc headers to use "-1", it would break devicetrees compiled
> > with earlier kernel versions.
> 
> Ah, sorry, I'm screwed on the previous review.  So we still need the flag
> ZERO_OFFSET_VALID to convert invalid 0 mux_reg to -1.
> 
> @Adrian,
> 
> Will the following change just work for you?
@Shawn, yes the change will work, do you want me to prepare a new patch series?
> 
> Shawn
> 
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c
> b/drivers/pinctrl/freescale/pinctrl-imx.c
> index d7b98ba36825..ae801ba7e226 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> @@ -542,6 +542,9 @@ static int imx_pinctrl_parse_groups(struct device_node
> *np,
>                 struct imx_pin_reg *pin_reg;
>                 struct imx_pin *pin = &grp->pins[i];
> 
> +               if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
> +                       mux_reg = -1;
> +
>                 if (info->flags & SHARE_MUX_CONF_REG) {
>                         conf_reg = mux_reg;
>                 } else {
> @@ -550,7 +553,7 @@ static int imx_pinctrl_parse_groups(struct device_node
> *np,
>                                 conf_reg = -1;
>                 }
> 
> -               pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> +               pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
>                 pin_reg = &info->pin_regs[pin_id];
>                 pin->pin = pin_id;
>                 grp->pin_ids[i] = pin_id;

[PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Alonso Adrian]

> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo at kernel.org]
> Sent: Friday, September 25, 2015 2:07 PM
> To: Markus Pargmann <mpa@pengutronix.de>
> Cc: Alonso Lazcano Adrian-B38018 <aalonso@freescale.com>; linux-arm-
> kernel at lists.infradead.org; shawn.guo at linaro.org; linus.walleij at linaro.org;
> lznuaa at gmail.com; devicetree at vger.kernel.org; Li Frank-B20596
> <Frank.Li@freescale.com>; Garg Nitin-B37173 <nitin.garg@freescale.com>;
> Huang Yongcai-B20788 <Anson.Huang@freescale.com>; linux-
> gpio at vger.kernel.org; robh+dt at kernel.org; kernel at pengutronix.de; Gong
> Yibin-B38343 <yibin.gong@freescale.com>
> Subject: Re: [PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero
> 
> On Fri, Sep 25, 2015 at 12:47:26PM +0200, Markus Pargmann wrote:
> > On Thu, Sep 24, 2015 at 03:54:00PM -0500, Adrian Alonso wrote:
> > > Allow mux_reg offset zero to be a valid pin_id, on imx7d mux_conf
> > > reg offset is zero for iomuxc-lspr controller
> > >
> > > Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> > > ---
> > > Changes for V2: Resend
> > > Changes for V3: Resend
> > > Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is
> > > set Changes for V5:
> > > - Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
> > > - Allow mux_reg ZERO OFFSET as pin_id
> > >
> > >  drivers/pinctrl/freescale/pinctrl-imx.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c
> > > b/drivers/pinctrl/freescale/pinctrl-imx.c
> > > index b9c6deb..23348d8 100644
> > > --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> > > +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> > > @@ -550,7 +550,7 @@ static int imx_pinctrl_parse_groups(struct
> device_node *np,
> > >  				conf_reg = -1;
> > >  		}
> > >
> > > -		pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> > > +		pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
> >
> > This will break compatibility with imx35 and imx25 pinctrl drivers.
> > They have definitions where mux_reg can be 0x0. See imx35-pinfunc.h
> > and
> > imx25-pinfunc.h:
> >
> > 	git grep -E "0x0+ 0x.* 0x.* 0x.* 0x.*"
> >
> > This mux_reg behaviour was not described in the DT binding
> > documentation. But it is used by some platforms. So even if you change
> > the pincfunc headers to use "-1", it would break devicetrees compiled
> > with earlier kernel versions.
> 
> Ah, sorry, I'm screwed on the previous review.  So we still need the flag
> ZERO_OFFSET_VALID to convert invalid 0 mux_reg to -1.
> 
> @Adrian,
> 
> Will the following change just work for you?
@Shawn, yes the change will work, do you want me to prepare a new patch series?
> 
> Shawn
> 
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c
> b/drivers/pinctrl/freescale/pinctrl-imx.c
> index d7b98ba36825..ae801ba7e226 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> @@ -542,6 +542,9 @@ static int imx_pinctrl_parse_groups(struct device_node
> *np,
>                 struct imx_pin_reg *pin_reg;
>                 struct imx_pin *pin = &grp->pins[i];
> 
> +               if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
> +                       mux_reg = -1;
> +
>                 if (info->flags & SHARE_MUX_CONF_REG) {
>                         conf_reg = mux_reg;
>                 } else {
> @@ -550,7 +553,7 @@ static int imx_pinctrl_parse_groups(struct device_node
> *np,
>                                 conf_reg = -1;
>                 }
> 
> -               pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
> +               pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
>                 pin_reg = &info->pin_regs[pin_id];
>                 pin->pin = pin_id;
>                 grp->pin_ids[i] = pin_id;

Re: [PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Shawn Guo]

On Fri, Sep 25, 2015 at 07:16:49PM +0000, Alonso Adrian wrote:
> > Ah, sorry, I'm screwed on the previous review.  So we still need the flag
> > ZERO_OFFSET_VALID to convert invalid 0 mux_reg to -1.
> > 
> > @Adrian,
> > 
> > Will the following change just work for you?
> @Shawn, yes the change will work, do you want me to prepare a new patch series?

Most of the patches in this series will go to Linus.  So that's his
call, but I suggest you resend.

Shawn

[PATCH v5 4/7] pinctrl: freescale: imx: allow mux_reg offset zero

[Shawn Guo]

On Fri, Sep 25, 2015 at 07:16:49PM +0000, Alonso Adrian wrote:
> > Ah, sorry, I'm screwed on the previous review.  So we still need the flag
> > ZERO_OFFSET_VALID to convert invalid 0 mux_reg to -1.
> > 
> > @Adrian,
> > 
> > Will the following change just work for you?
> @Shawn, yes the change will work, do you want me to prepare a new patch series?

Most of the patches in this series will go to Linus.  So that's his
call, but I suggest you resend.

Shawn

Re: [PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[Linus Walleij]

On Thu, Sep 24, 2015 at 1:53 PM, Adrian Alonso <aalonso-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:

> From: Robin Gong <b38343-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>
> Fix system chrash caused by groups whose number is smaller than the number
> of groups of the last pinctl instance which is not initialized.
>
> iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing
> the second instance (iomuxc) the chrash below occurs.

This 1/7 patch applied for next with Shawn's ACK.

Yours,
Linus Walleij
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[PATCH v5 1/7] pinctrl: freescale: imx: fix system crash if enable two pinctl instances

[Linus Walleij]

On Thu, Sep 24, 2015 at 1:53 PM, Adrian Alonso <aalonso@freescale.com> wrote:

> From: Robin Gong <b38343@freescale.com>
>
> Fix system chrash caused by groups whose number is smaller than the number
> of groups of the last pinctl instance which is not initialized.
>
> iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing
> the second instance (iomuxc) the chrash below occurs.

This 1/7 patch applied for next with Shawn's ACK.

Yours,
Linus Walleij