* [PATCH v6 1/6] ARM: dts: imx: imx7d add iomuxc lpsr device node
@ 2015-09-25 21:05 ` Adrian Alonso
0 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:05 UTC (permalink / raw)
To: linux-arm-kernel, shawn.guo, shawnguo, linus.walleij, lznuaa
Cc: linux-gpio, devicetree, kernel, robh+dt, Anson.Huang, Frank.Li,
yibin.gong, nitin.garg
Add device tree node to support iomuxc-lpsr controller, fsl,iput-sel
phandle allows to get input select register base address which is
shared from main iomuxc controller.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Add phandle to get input select register base address
Changes for V4: Resend
Changes for V5: Rename property to fsl,input-sel
Changes for V6: Resend
arch/arm/boot/dts/imx7d.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 15c2193..92ef0a9 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -446,6 +446,12 @@
status = "disabled";
};
+ iomuxc_lpsr: iomuxc-lpsr@302c0000 {
+ compatible = "fsl,imx7d-iomuxc-lpsr";
+ reg = <0x302c0000 0x10000>;
+ fsl,input-sel = <&iomuxc>;
+ };
+
gpt1: gpt@302d0000 {
compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
reg = <0x302d0000 0x10000>;
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 1/6] ARM: dts: imx: imx7d add iomuxc lpsr device node
@ 2015-09-25 21:05 ` Adrian Alonso
0 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:05 UTC (permalink / raw)
To: linux-arm-kernel
Add device tree node to support iomuxc-lpsr controller, fsl,iput-sel
phandle allows to get input select register base address which is
shared from main iomuxc controller.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Add phandle to get input select register base address
Changes for V4: Resend
Changes for V5: Rename property to fsl,input-sel
Changes for V6: Resend
arch/arm/boot/dts/imx7d.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 15c2193..92ef0a9 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -446,6 +446,12 @@
status = "disabled";
};
+ iomuxc_lpsr: iomuxc-lpsr at 302c0000 {
+ compatible = "fsl,imx7d-iomuxc-lpsr";
+ reg = <0x302c0000 0x10000>;
+ fsl,input-sel = <&iomuxc>;
+ };
+
gpt1: gpt at 302d0000 {
compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
reg = <0x302d0000 0x10000>;
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 2/6] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-25 21:05 ` Adrian Alonso
-1 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:05 UTC (permalink / raw)
To: linux-arm-kernel, shawn.guo, shawnguo, linus.walleij, lznuaa
Cc: linux-gpio, devicetree, kernel, robh+dt, Anson.Huang, Frank.Li,
yibin.gong, nitin.garg
Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Resend
Changes for V4: Resend
Changes for V5: Resend
Changes for V6:
- Add wdog pinctrl group, add comments for hog2 group gpios
arch/arm/boot/dts/imx7d-sdb.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 8059458..2da704a 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -419,3 +419,23 @@
};
};
+
+&iomuxc_lpsr {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog_2>;
+
+ imx7d-sdb {
+ pinctrl_hog_2: hoggrp-2 {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* usb_otg1_pwr */
+ MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x59 /* sensor_int_b */
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
+ >;
+ };
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 2/6] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads
@ 2015-09-25 21:05 ` Adrian Alonso
0 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:05 UTC (permalink / raw)
To: linux-arm-kernel
Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Resend
Changes for V4: Resend
Changes for V5: Resend
Changes for V6:
- Add wdog pinctrl group, add comments for hog2 group gpios
arch/arm/boot/dts/imx7d-sdb.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 8059458..2da704a 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -419,3 +419,23 @@
};
};
+
+&iomuxc_lpsr {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog_2>;
+
+ imx7d-sdb {
+ pinctrl_hog_2: hoggrp-2 {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* usb_otg1_pwr */
+ MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x59 /* sensor_int_b */
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
+ >;
+ };
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 3/6] pinctrl: freescale: imx: allow mux_reg offset zero
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-25 21:05 ` Adrian Alonso
-1 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:05 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
shawn.guo-QSEj5FYQhm4dnm+yROfE0A,
shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
linus.walleij-QSEj5FYQhm4dnm+yROfE0A,
lznuaa-Re5JQEeQqe8AvxtiuMwx3w
Cc: linux-gpio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, kernel-bIcnvbaLZ9MEGnE8C9+IrQ,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
Anson.Huang-KZfg59tc24xl57MIdRCFDg,
Frank.Li-KZfg59tc24xl57MIdRCFDg,
yibin.gong-KZfg59tc24xl57MIdRCFDg,
nitin.garg-KZfg59tc24xl57MIdRCFDg
Allow mux_reg offset zero to be a valid pin_id, on imx7d
mux_conf reg offset is zero for iomuxc-lspr controller
Signed-off-by: Adrian Alonso <aalonso-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
Changes for V2: Resend
Changes for V3: Resend
Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
Changes for V5:
- Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
- Allow mux_reg ZERO OFFSET as pin_id
Changes for V6: Restore ZERO_OFFSET_VALID flag
drivers/pinctrl/freescale/pinctrl-imx.c | 5 ++++-
drivers/pinctrl/freescale/pinctrl-imx.h | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index b9c6deb..151d50d 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -542,6 +542,9 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
struct imx_pin_reg *pin_reg;
struct imx_pin *pin = &grp->pins[i];
+ if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
+ mux_reg = -1;
+
if (info->flags & SHARE_MUX_CONF_REG) {
conf_reg = mux_reg;
} else {
@@ -550,7 +553,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
conf_reg = -1;
}
- pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
+ pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
pin_reg = &info->pin_regs[pin_id];
pin->pin = pin_id;
grp->pin_ids[i] = pin_id;
diff --git a/drivers/pinctrl/freescale/pinctrl-imx.h b/drivers/pinctrl/freescale/pinctrl-imx.h
index 2a5fe72..2a592f6 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.h
+++ b/drivers/pinctrl/freescale/pinctrl-imx.h
@@ -85,6 +85,7 @@ struct imx_pinctrl_soc_info {
};
#define SHARE_MUX_CONF_REG 0x1
+#define ZERO_OFFSET_VALID 0x2
#define NO_MUX 0x0
#define NO_PAD 0x0
--
2.1.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 3/6] pinctrl: freescale: imx: allow mux_reg offset zero
@ 2015-09-25 21:05 ` Adrian Alonso
0 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:05 UTC (permalink / raw)
To: linux-arm-kernel
Allow mux_reg offset zero to be a valid pin_id, on imx7d
mux_conf reg offset is zero for iomuxc-lspr controller
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3: Resend
Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
Changes for V5:
- Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
- Allow mux_reg ZERO OFFSET as pin_id
Changes for V6: Restore ZERO_OFFSET_VALID flag
drivers/pinctrl/freescale/pinctrl-imx.c | 5 ++++-
drivers/pinctrl/freescale/pinctrl-imx.h | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index b9c6deb..151d50d 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -542,6 +542,9 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
struct imx_pin_reg *pin_reg;
struct imx_pin *pin = &grp->pins[i];
+ if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg)
+ mux_reg = -1;
+
if (info->flags & SHARE_MUX_CONF_REG) {
conf_reg = mux_reg;
} else {
@@ -550,7 +553,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
conf_reg = -1;
}
- pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
+ pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
pin_reg = &info->pin_regs[pin_id];
pin->pin = pin_id;
grp->pin_ids[i] = pin_id;
diff --git a/drivers/pinctrl/freescale/pinctrl-imx.h b/drivers/pinctrl/freescale/pinctrl-imx.h
index 2a5fe72..2a592f6 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.h
+++ b/drivers/pinctrl/freescale/pinctrl-imx.h
@@ -85,6 +85,7 @@ struct imx_pinctrl_soc_info {
};
#define SHARE_MUX_CONF_REG 0x1
+#define ZERO_OFFSET_VALID 0x2
#define NO_MUX 0x0
#define NO_PAD 0x0
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 4/6] pinctrl: freescale: imx: add shared input select reg support
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-25 21:06 ` Adrian Alonso
-1 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:06 UTC (permalink / raw)
To: linux-arm-kernel, shawn.guo, shawnguo, linus.walleij, lznuaa
Cc: linux-gpio, devicetree, kernel, robh+dt, Anson.Huang, Frank.Li,
yibin.gong, nitin.garg
- Add shared input select register support
- imx7d has two iomux controllers iomuxc and iomuxc-lpsr
which share select_input register for daisy chain settings
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3:
- Use of_parse_phandle instead of of_get_child_by_name to get input select
base register address
Changes for V4: Resend
Changes for V5:
- Remove SHARE_INPUT_SELECT_REG flag
- Use fsl,input-sel to check if shared input select register support is used
Changes for V6: Resend
drivers/pinctrl/freescale/pinctrl-imx.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index 151d50d..a5bb939 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/of_address.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinctrl.h>
@@ -39,6 +40,7 @@ struct imx_pinctrl {
struct device *dev;
struct pinctrl_dev *pctl;
void __iomem *base;
+ void __iomem *input_sel_base;
const struct imx_pinctrl_soc_info *info;
};
@@ -254,7 +256,12 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
* Regular select input register can never be at offset
* 0, and we only print register value for regular case.
*/
- writel(pin->input_val, ipctl->base + pin->input_reg);
+ if (ipctl->input_sel_base)
+ writel(pin->input_val, ipctl->input_sel_base +
+ pin->input_reg);
+ else
+ writel(pin->input_val, ipctl->base +
+ pin->input_reg);
dev_dbg(ipctl->dev,
"==>select_input: offset 0x%x val 0x%x\n",
pin->input_reg, pin->input_val);
@@ -685,6 +692,8 @@ static int imx_pinctrl_probe_dt(struct platform_device *pdev,
int imx_pinctrl_probe(struct platform_device *pdev,
struct imx_pinctrl_soc_info *info)
{
+ struct device_node *dev_np = pdev->dev.of_node;
+ struct device_node *np;
struct imx_pinctrl *ipctl;
struct resource *res;
int ret, i;
@@ -715,6 +724,23 @@ int imx_pinctrl_probe(struct platform_device *pdev,
if (IS_ERR(ipctl->base))
return PTR_ERR(ipctl->base);
+ if (of_property_read_bool(dev_np, "fsl,input-sel")) {
+ np = of_parse_phandle(dev_np, "fsl,input-sel", 0);
+ if (np) {
+ ipctl->input_sel_base = of_iomap(np, 0);
+ if (IS_ERR(ipctl->input_sel_base)) {
+ of_node_put(np);
+ dev_err(&pdev->dev,
+ "iomuxc input select base address not found\n");
+ return PTR_ERR(ipctl->input_sel_base);
+ }
+ } else {
+ dev_err(&pdev->dev, "iomuxc fsl,input-sel property not found\n");
+ return -EINVAL;
+ }
+ of_node_put(np);
+ }
+
imx_pinctrl_desc.name = dev_name(&pdev->dev);
imx_pinctrl_desc.pins = info->pins;
imx_pinctrl_desc.npins = info->npins;
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 4/6] pinctrl: freescale: imx: add shared input select reg support
@ 2015-09-25 21:06 ` Adrian Alonso
0 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:06 UTC (permalink / raw)
To: linux-arm-kernel
- Add shared input select register support
- imx7d has two iomux controllers iomuxc and iomuxc-lpsr
which share select_input register for daisy chain settings
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Resend
Changes for V3:
- Use of_parse_phandle instead of of_get_child_by_name to get input select
base register address
Changes for V4: Resend
Changes for V5:
- Remove SHARE_INPUT_SELECT_REG flag
- Use fsl,input-sel to check if shared input select register support is used
Changes for V6: Resend
drivers/pinctrl/freescale/pinctrl-imx.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c
index 151d50d..a5bb939 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx.c
@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/of_address.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinctrl.h>
@@ -39,6 +40,7 @@ struct imx_pinctrl {
struct device *dev;
struct pinctrl_dev *pctl;
void __iomem *base;
+ void __iomem *input_sel_base;
const struct imx_pinctrl_soc_info *info;
};
@@ -254,7 +256,12 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
* Regular select input register can never be at offset
* 0, and we only print register value for regular case.
*/
- writel(pin->input_val, ipctl->base + pin->input_reg);
+ if (ipctl->input_sel_base)
+ writel(pin->input_val, ipctl->input_sel_base +
+ pin->input_reg);
+ else
+ writel(pin->input_val, ipctl->base +
+ pin->input_reg);
dev_dbg(ipctl->dev,
"==>select_input: offset 0x%x val 0x%x\n",
pin->input_reg, pin->input_val);
@@ -685,6 +692,8 @@ static int imx_pinctrl_probe_dt(struct platform_device *pdev,
int imx_pinctrl_probe(struct platform_device *pdev,
struct imx_pinctrl_soc_info *info)
{
+ struct device_node *dev_np = pdev->dev.of_node;
+ struct device_node *np;
struct imx_pinctrl *ipctl;
struct resource *res;
int ret, i;
@@ -715,6 +724,23 @@ int imx_pinctrl_probe(struct platform_device *pdev,
if (IS_ERR(ipctl->base))
return PTR_ERR(ipctl->base);
+ if (of_property_read_bool(dev_np, "fsl,input-sel")) {
+ np = of_parse_phandle(dev_np, "fsl,input-sel", 0);
+ if (np) {
+ ipctl->input_sel_base = of_iomap(np, 0);
+ if (IS_ERR(ipctl->input_sel_base)) {
+ of_node_put(np);
+ dev_err(&pdev->dev,
+ "iomuxc input select base address not found\n");
+ return PTR_ERR(ipctl->input_sel_base);
+ }
+ } else {
+ dev_err(&pdev->dev, "iomuxc fsl,input-sel property not found\n");
+ return -EINVAL;
+ }
+ of_node_put(np);
+ }
+
imx_pinctrl_desc.name = dev_name(&pdev->dev);
imx_pinctrl_desc.pins = info->pins;
imx_pinctrl_desc.npins = info->npins;
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 5/6] pinctrl: freescale: imx7d: support iomux lpsr controller
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-25 21:06 ` Adrian Alonso
-1 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:06 UTC (permalink / raw)
To: linux-arm-kernel, shawn.guo, shawnguo, linus.walleij, lznuaa
Cc: linux-gpio, devicetree, kernel, robh+dt, Anson.Huang, Frank.Li,
yibin.gong, nitin.garg
iMX7D has two iomuxc controllers, iomuxc controller similar as
previous iMX SoC generation and iomuxc-lpsr which provides low
power state rentetion capabilities on gpios that are part of
iomuxc-lpsr
Add iomuxc-lpsr gpio group id's
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Add imx7d_lpsr_pads enums
Changes for V3: Resend
Changes for V4: Resend
Changes for V5: Remove flags SHARE_INPUT_SELECT_REG and
ZERO_OFFSET_VALID.
Changes for V6: Restore ZERO_OFFSET_VALID flag.
drivers/pinctrl/freescale/pinctrl-imx7d.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/pinctrl/freescale/pinctrl-imx7d.c b/drivers/pinctrl/freescale/pinctrl-imx7d.c
index 1fa7530..16dc925 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx7d.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx7d.c
@@ -174,6 +174,17 @@ enum imx7d_pads {
MX7D_PAD_ENET1_COL = 154,
};
+enum imx7d_lpsr_pads {
+ MX7D_PAD_GPIO1_IO00 = 0,
+ MX7D_PAD_GPIO1_IO01 = 1,
+ MX7D_PAD_GPIO1_IO02 = 2,
+ MX7D_PAD_GPIO1_IO03 = 3,
+ MX7D_PAD_GPIO1_IO04 = 4,
+ MX7D_PAD_GPIO1_IO05 = 5,
+ MX7D_PAD_GPIO1_IO06 = 6,
+ MX7D_PAD_GPIO1_IO07 = 7,
+};
+
/* Pad names for the pinmux subsystem */
static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0),
@@ -333,13 +344,32 @@ static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL),
};
+/* Pad names for the pinmux subsystem */
+static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = {
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07),
+};
+
static struct imx_pinctrl_soc_info imx7d_pinctrl_info = {
.pins = imx7d_pinctrl_pads,
.npins = ARRAY_SIZE(imx7d_pinctrl_pads),
};
+static struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = {
+ .pins = imx7d_lpsr_pinctrl_pads,
+ .npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads),
+ .flags = ZERO_OFFSET_VALID,
+};
+
static struct of_device_id imx7d_pinctrl_of_match[] = {
{ .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, },
+ { .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info },
{ /* sentinel */ }
};
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 5/6] pinctrl: freescale: imx7d: support iomux lpsr controller
@ 2015-09-25 21:06 ` Adrian Alonso
0 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:06 UTC (permalink / raw)
To: linux-arm-kernel
iMX7D has two iomuxc controllers, iomuxc controller similar as
previous iMX SoC generation and iomuxc-lpsr which provides low
power state rentetion capabilities on gpios that are part of
iomuxc-lpsr
Add iomuxc-lpsr gpio group id's
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: Add imx7d_lpsr_pads enums
Changes for V3: Resend
Changes for V4: Resend
Changes for V5: Remove flags SHARE_INPUT_SELECT_REG and
ZERO_OFFSET_VALID.
Changes for V6: Restore ZERO_OFFSET_VALID flag.
drivers/pinctrl/freescale/pinctrl-imx7d.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/pinctrl/freescale/pinctrl-imx7d.c b/drivers/pinctrl/freescale/pinctrl-imx7d.c
index 1fa7530..16dc925 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx7d.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx7d.c
@@ -174,6 +174,17 @@ enum imx7d_pads {
MX7D_PAD_ENET1_COL = 154,
};
+enum imx7d_lpsr_pads {
+ MX7D_PAD_GPIO1_IO00 = 0,
+ MX7D_PAD_GPIO1_IO01 = 1,
+ MX7D_PAD_GPIO1_IO02 = 2,
+ MX7D_PAD_GPIO1_IO03 = 3,
+ MX7D_PAD_GPIO1_IO04 = 4,
+ MX7D_PAD_GPIO1_IO05 = 5,
+ MX7D_PAD_GPIO1_IO06 = 6,
+ MX7D_PAD_GPIO1_IO07 = 7,
+};
+
/* Pad names for the pinmux subsystem */
static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0),
@@ -333,13 +344,32 @@ static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL),
};
+/* Pad names for the pinmux subsystem */
+static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = {
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06),
+ IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07),
+};
+
static struct imx_pinctrl_soc_info imx7d_pinctrl_info = {
.pins = imx7d_pinctrl_pads,
.npins = ARRAY_SIZE(imx7d_pinctrl_pads),
};
+static struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = {
+ .pins = imx7d_lpsr_pinctrl_pads,
+ .npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads),
+ .flags = ZERO_OFFSET_VALID,
+};
+
static struct of_device_id imx7d_pinctrl_of_match[] = {
{ .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, },
+ { .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info },
{ /* sentinel */ }
};
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 6/6] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-25 21:06 ` Adrian Alonso
-1 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:06 UTC (permalink / raw)
To: linux-arm-kernel, shawn.guo, shawnguo, linus.walleij, lznuaa
Cc: devicetree, Frank.Li, nitin.garg, Anson.Huang, linux-gpio,
robh+dt, kernel, yibin.gong
Add iomuxc-lpsr devicetree bindings documentation
Provide documentation context as well an example on
pheriperals that could use pad from either iomuxc controller
supported by iMX7D SoC
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: New patch on imx7d iomuxc-lpsr patch series
Changes for V3: Add shared input select register notes
Changes for V4: Resend
Changes for V5:
- Fix spell error
- Remove references of SHARE_INPUT_SELECT_REG flag
Changes for v6: Resend
.../bindings/pinctrl/fsl,imx7d-pinctrl.txt | 63 +++++++++++++++++++++-
1 file changed, 62 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
index 8bbf25d..aae069f 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
@@ -1,16 +1,42 @@
* Freescale i.MX7 Dual IOMUX Controller
+iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar
+as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
+power state retention capabilities on gpios that are part of iomuxc-lpsr
+(GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
+mux and pad control settings, it shares the input select register from main
+iomuxc controller for daisy chain settings, the fsl,input-sel property extends
+fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
+
+iomuxc_lpsr: iomuxc-lpsr@302c0000 {
+ compatible = "fsl,imx7d-iomuxc-lpsr";
+ reg = <0x302c0000 0x10000>;
+ fsl,input-sel = <&iomuxc>;
+};
+
+iomuxc: iomuxc@30330000 {
+ compatible = "fsl,imx7d-iomuxc";
+ reg = <0x30330000 0x10000>;
+};
+
+Pheriparials using pads from iomuxc-lpsr support low state retention power
+state, under LPSR mode GPIO's state of pads are retain.
+
Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
and usage.
Required properties:
-- compatible: "fsl,imx7d-iomuxc"
+- compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or
+ "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.
- fsl,pins: each entry consists of 6 integers and represents the mux and config
setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
input_val> are specified using a PIN_FUNC_ID macro, which can be found in
imx7d-pinfunc.h under device tree source folder. The last integer CONFIG is
the pad setting value like pull-up on this pin. Please refer to i.MX7 Dual
Reference Manual for detailed CONFIG settings.
+- fsl,input-sel: required property for iomuxc-lpsr controller, this property is
+ a phandle for main iomuxc controller which shares the input select register for
+ daisy chain settings.
CONFIG bits definition:
PAD_CTL_PUS_100K_DOWN (0 << 5)
@@ -25,3 +51,38 @@ PAD_CTL_DSE_X1 (0 << 0)
PAD_CTL_DSE_X2 (1 << 0)
PAD_CTL_DSE_X3 (2 << 0)
PAD_CTL_DSE_X4 (3 << 0)
+
+Examples:
+While iomuxc-lpsr is intended to be used by dedicated peripherals to take
+advantages of LPSR power mode, is also possible that an IP to use pads from
+any of the iomux controllers. For example the I2C1 IP can use SCL pad from
+iomuxc-lpsr controller and SDA pad from iomuxc controller as:
+
+i2c1: i2c@30a20000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1 &pinctrl_i2c1_2>;
+ status = "okay";
+};
+
+iomuxc-lpsr@302c0000 {
+ compatible = "fsl,imx7d-iomuxc-lpsr";
+ reg = <0x302c0000 0x10000>;
+ fsl,input-sel = <&iomuxc>;
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
+ >;
+ };
+};
+
+iomuxc@30330000 {
+ compatible = "fsl,imx7d-iomuxc";
+ reg = <0x30330000 0x10000>;
+
+ pinctrl_i2c1_2: i2c1grp-2 {
+ fsl,pins = <
+ MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
+ >;
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH v6 6/6] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings
@ 2015-09-25 21:06 ` Adrian Alonso
0 siblings, 0 replies; 26+ messages in thread
From: Adrian Alonso @ 2015-09-25 21:06 UTC (permalink / raw)
To: linux-arm-kernel
Add iomuxc-lpsr devicetree bindings documentation
Provide documentation context as well an example on
pheriperals that could use pad from either iomuxc controller
supported by iMX7D SoC
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
---
Changes for V2: New patch on imx7d iomuxc-lpsr patch series
Changes for V3: Add shared input select register notes
Changes for V4: Resend
Changes for V5:
- Fix spell error
- Remove references of SHARE_INPUT_SELECT_REG flag
Changes for v6: Resend
.../bindings/pinctrl/fsl,imx7d-pinctrl.txt | 63 +++++++++++++++++++++-
1 file changed, 62 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
index 8bbf25d..aae069f 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt
@@ -1,16 +1,42 @@
* Freescale i.MX7 Dual IOMUX Controller
+iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar
+as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
+power state retention capabilities on gpios that are part of iomuxc-lpsr
+(GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
+mux and pad control settings, it shares the input select register from main
+iomuxc controller for daisy chain settings, the fsl,input-sel property extends
+fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
+
+iomuxc_lpsr: iomuxc-lpsr at 302c0000 {
+ compatible = "fsl,imx7d-iomuxc-lpsr";
+ reg = <0x302c0000 0x10000>;
+ fsl,input-sel = <&iomuxc>;
+};
+
+iomuxc: iomuxc at 30330000 {
+ compatible = "fsl,imx7d-iomuxc";
+ reg = <0x30330000 0x10000>;
+};
+
+Pheriparials using pads from iomuxc-lpsr support low state retention power
+state, under LPSR mode GPIO's state of pads are retain.
+
Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
and usage.
Required properties:
-- compatible: "fsl,imx7d-iomuxc"
+- compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or
+ "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.
- fsl,pins: each entry consists of 6 integers and represents the mux and config
setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
input_val> are specified using a PIN_FUNC_ID macro, which can be found in
imx7d-pinfunc.h under device tree source folder. The last integer CONFIG is
the pad setting value like pull-up on this pin. Please refer to i.MX7 Dual
Reference Manual for detailed CONFIG settings.
+- fsl,input-sel: required property for iomuxc-lpsr controller, this property is
+ a phandle for main iomuxc controller which shares the input select register for
+ daisy chain settings.
CONFIG bits definition:
PAD_CTL_PUS_100K_DOWN (0 << 5)
@@ -25,3 +51,38 @@ PAD_CTL_DSE_X1 (0 << 0)
PAD_CTL_DSE_X2 (1 << 0)
PAD_CTL_DSE_X3 (2 << 0)
PAD_CTL_DSE_X4 (3 << 0)
+
+Examples:
+While iomuxc-lpsr is intended to be used by dedicated peripherals to take
+advantages of LPSR power mode, is also possible that an IP to use pads from
+any of the iomux controllers. For example the I2C1 IP can use SCL pad from
+iomuxc-lpsr controller and SDA pad from iomuxc controller as:
+
+i2c1: i2c@30a20000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1 &pinctrl_i2c1_2>;
+ status = "okay";
+};
+
+iomuxc-lpsr at 302c0000 {
+ compatible = "fsl,imx7d-iomuxc-lpsr";
+ reg = <0x302c0000 0x10000>;
+ fsl,input-sel = <&iomuxc>;
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
+ >;
+ };
+};
+
+iomuxc at 30330000 {
+ compatible = "fsl,imx7d-iomuxc";
+ reg = <0x30330000 0x10000>;
+
+ pinctrl_i2c1_2: i2c1grp-2 {
+ fsl,pins = <
+ MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
+ >;
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH v6 1/6] ARM: dts: imx: imx7d add iomuxc lpsr device node
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-26 0:28 ` Shawn Guo
-1 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:28 UTC (permalink / raw)
To: Adrian Alonso
Cc: linux-arm-kernel, shawn.guo, linus.walleij, lznuaa, linux-gpio,
devicetree, kernel, robh+dt, Anson.Huang, Frank.Li, yibin.gong,
nitin.garg
On Fri, Sep 25, 2015 at 04:05:57PM -0500, Adrian Alonso wrote:
> Add device tree node to support iomuxc-lpsr controller, fsl,iput-sel
> phandle allows to get input select register base address which is
> shared from main iomuxc controller.
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
For the series,
Acked-by: Shawn Guo <shawnguo@kernel.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v6 1/6] ARM: dts: imx: imx7d add iomuxc lpsr device node
@ 2015-09-26 0:28 ` Shawn Guo
0 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:28 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 25, 2015 at 04:05:57PM -0500, Adrian Alonso wrote:
> Add device tree node to support iomuxc-lpsr controller, fsl,iput-sel
> phandle allows to get input select register base address which is
> shared from main iomuxc controller.
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
For the series,
Acked-by: Shawn Guo <shawnguo@kernel.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v6 1/6] ARM: dts: imx: imx7d add iomuxc lpsr device node
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-26 0:33 ` Shawn Guo
-1 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:33 UTC (permalink / raw)
To: Adrian Alonso
Cc: linux-arm-kernel, shawn.guo, linus.walleij, lznuaa, linux-gpio,
devicetree, kernel, robh+dt, Anson.Huang, Frank.Li, yibin.gong,
nitin.garg
On Fri, Sep 25, 2015 at 04:05:57PM -0500, Adrian Alonso wrote:
> Add device tree node to support iomuxc-lpsr controller, fsl,iput-sel
s/fsl,iput-sel/fsl,input-sel
> phandle allows to get input select register base address which is
> shared from main iomuxc controller.
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
I fixed above typo and applied the patch.
Shawn
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v6 1/6] ARM: dts: imx: imx7d add iomuxc lpsr device node
@ 2015-09-26 0:33 ` Shawn Guo
0 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:33 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 25, 2015 at 04:05:57PM -0500, Adrian Alonso wrote:
> Add device tree node to support iomuxc-lpsr controller, fsl,iput-sel
s/fsl,iput-sel/fsl,input-sel
> phandle allows to get input select register base address which is
> shared from main iomuxc controller.
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
I fixed above typo and applied the patch.
Shawn
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v6 2/6] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-26 0:38 ` Shawn Guo
-1 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:38 UTC (permalink / raw)
To: Adrian Alonso
Cc: linux-arm-kernel, shawn.guo, linus.walleij, lznuaa, linux-gpio,
devicetree, kernel, robh+dt, Anson.Huang, Frank.Li, yibin.gong,
nitin.garg
On Fri, Sep 25, 2015 at 04:05:58PM -0500, Adrian Alonso wrote:
> Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Looked at this patch again, and please see comments below.
> ---
> Changes for V2: Resend
> Changes for V3: Resend
> Changes for V4: Resend
> Changes for V5: Resend
> Changes for V6:
> - Add wdog pinctrl group, add comments for hog2 group gpios
>
> arch/arm/boot/dts/imx7d-sdb.dts | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
> index 8059458..2da704a 100644
> --- a/arch/arm/boot/dts/imx7d-sdb.dts
> +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> @@ -419,3 +419,23 @@
>
> };
> };
> +
> +&iomuxc_lpsr {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog_2>;
> +
> + imx7d-sdb {
> + pinctrl_hog_2: hoggrp-2 {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* usb_otg1_pwr */
Shouldn't this be handled by a pinctrl of regulator@0 ...
> + MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x59 /* sensor_int_b */
... and this by a pinctrl of regulator@2?
> + >;
> + };
> +
> + pinctrl_wdog: wdoggrp {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
> + >;
> + };
Add this only when you have a user for it.
Shawn
> + };
> +};
> --
> 2.1.4
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v6 2/6] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads
@ 2015-09-26 0:38 ` Shawn Guo
0 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:38 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 25, 2015 at 04:05:58PM -0500, Adrian Alonso wrote:
> Add imx7d-sdb iomuxc-lpsr hoggrp-2 default pads settings
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Looked at this patch again, and please see comments below.
> ---
> Changes for V2: Resend
> Changes for V3: Resend
> Changes for V4: Resend
> Changes for V5: Resend
> Changes for V6:
> - Add wdog pinctrl group, add comments for hog2 group gpios
>
> arch/arm/boot/dts/imx7d-sdb.dts | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
> index 8059458..2da704a 100644
> --- a/arch/arm/boot/dts/imx7d-sdb.dts
> +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> @@ -419,3 +419,23 @@
>
> };
> };
> +
> +&iomuxc_lpsr {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog_2>;
> +
> + imx7d-sdb {
> + pinctrl_hog_2: hoggrp-2 {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* usb_otg1_pwr */
Shouldn't this be handled by a pinctrl of regulator at 0 ...
> + MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x59 /* sensor_int_b */
... and this by a pinctrl of regulator at 2?
> + >;
> + };
> +
> + pinctrl_wdog: wdoggrp {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B 0x74
> + >;
> + };
Add this only when you have a user for it.
Shawn
> + };
> +};
> --
> 2.1.4
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v6 3/6] pinctrl: freescale: imx: allow mux_reg offset zero
2015-09-25 21:05 ` Adrian Alonso
@ 2015-09-26 0:39 ` Shawn Guo
-1 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:39 UTC (permalink / raw)
To: Adrian Alonso
Cc: linux-arm-kernel, shawn.guo, linus.walleij, lznuaa, linux-gpio,
devicetree, kernel, robh+dt, Anson.Huang, Frank.Li, yibin.gong,
nitin.garg
On Fri, Sep 25, 2015 at 04:05:59PM -0500, Adrian Alonso wrote:
> Allow mux_reg offset zero to be a valid pin_id, on imx7d
> mux_conf reg offset is zero for iomuxc-lspr controller
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
For #3 ~ #6,
Acked-by: Shawn Guo <shawnguo@kernel.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v6 3/6] pinctrl: freescale: imx: allow mux_reg offset zero
@ 2015-09-26 0:39 ` Shawn Guo
0 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:39 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 25, 2015 at 04:05:59PM -0500, Adrian Alonso wrote:
> Allow mux_reg offset zero to be a valid pin_id, on imx7d
> mux_conf reg offset is zero for iomuxc-lspr controller
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
For #3 ~ #6,
Acked-by: Shawn Guo <shawnguo@kernel.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v6 6/6] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings
2015-09-25 21:06 ` Adrian Alonso
@ 2015-09-26 0:44 ` Shawn Guo
-1 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:44 UTC (permalink / raw)
To: Adrian Alonso
Cc: linux-arm-kernel, shawn.guo, linus.walleij, lznuaa, linux-gpio,
devicetree, kernel, robh+dt, Anson.Huang, Frank.Li, yibin.gong,
nitin.garg
On Fri, Sep 25, 2015 at 04:06:02PM -0500, Adrian Alonso wrote:
> +Examples:
> +While iomuxc-lpsr is intended to be used by dedicated peripherals to take
> +advantages of LPSR power mode, is also possible that an IP to use pads from
> +any of the iomux controllers. For example the I2C1 IP can use SCL pad from
> +iomuxc-lpsr controller and SDA pad from iomuxc controller as:
> +
> +i2c1: i2c@30a20000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1 &pinctrl_i2c1_2>;
> + status = "okay";
> +};
> +
> +iomuxc-lpsr@302c0000 {
> + compatible = "fsl,imx7d-iomuxc-lpsr";
> + reg = <0x302c0000 0x10000>;
> + fsl,input-sel = <&iomuxc>;
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
> + >;
> + };
> +};
> +
> +iomuxc@30330000 {
> + compatible = "fsl,imx7d-iomuxc";
> + reg = <0x30330000 0x10000>;
> +
> + pinctrl_i2c1_2: i2c1grp-2 {
> + fsl,pins = <
> + MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
I thought you have fixed this, as I have pointed it out during the last
review. The example doesn't make sense. There is no reason you need to
have two pads on the same function I2C1_SCL. One of them should be
I2C1_SDA.
Shawn
> + >;
> + };
> +};
> --
> 2.1.4
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v6 6/6] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings
@ 2015-09-26 0:44 ` Shawn Guo
0 siblings, 0 replies; 26+ messages in thread
From: Shawn Guo @ 2015-09-26 0:44 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 25, 2015 at 04:06:02PM -0500, Adrian Alonso wrote:
> +Examples:
> +While iomuxc-lpsr is intended to be used by dedicated peripherals to take
> +advantages of LPSR power mode, is also possible that an IP to use pads from
> +any of the iomux controllers. For example the I2C1 IP can use SCL pad from
> +iomuxc-lpsr controller and SDA pad from iomuxc controller as:
> +
> +i2c1: i2c at 30a20000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1 &pinctrl_i2c1_2>;
> + status = "okay";
> +};
> +
> +iomuxc-lpsr at 302c0000 {
> + compatible = "fsl,imx7d-iomuxc-lpsr";
> + reg = <0x302c0000 0x10000>;
> + fsl,input-sel = <&iomuxc>;
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
> + >;
> + };
> +};
> +
> +iomuxc at 30330000 {
> + compatible = "fsl,imx7d-iomuxc";
> + reg = <0x30330000 0x10000>;
> +
> + pinctrl_i2c1_2: i2c1grp-2 {
> + fsl,pins = <
> + MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
I thought you have fixed this, as I have pointed it out during the last
review. The example doesn't make sense. There is no reason you need to
have two pads on the same function I2C1_SCL. One of them should be
I2C1_SDA.
Shawn
> + >;
> + };
> +};
> --
> 2.1.4
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v6 3/6] pinctrl: freescale: imx: allow mux_reg offset zero
2015-09-25 21:05 ` Adrian Alonso
@ 2015-10-02 21:37 ` Linus Walleij
-1 siblings, 0 replies; 26+ messages in thread
From: Linus Walleij @ 2015-10-02 21:37 UTC (permalink / raw)
To: Adrian Alonso
Cc: linux-arm-kernel, Shawn Guo, Shawn Guo, 李智,
linux-gpio, devicetree, Sascha Hauer, Rob Herring, Anson.Huang,
Frank Li, yibin.gong, nitin.garg
On Fri, Sep 25, 2015 at 2:05 PM, Adrian Alonso <aalonso@freescale.com> wrote:
> Allow mux_reg offset zero to be a valid pin_id, on imx7d
> mux_conf reg offset is zero for iomuxc-lspr controller
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2: Resend
> Changes for V3: Resend
> Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
> Changes for V5:
> - Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
> - Allow mux_reg ZERO OFFSET as pin_id
> Changes for V6: Restore ZERO_OFFSET_VALID flag
Patch applied with Shawn's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v6 3/6] pinctrl: freescale: imx: allow mux_reg offset zero
@ 2015-10-02 21:37 ` Linus Walleij
0 siblings, 0 replies; 26+ messages in thread
From: Linus Walleij @ 2015-10-02 21:37 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 25, 2015 at 2:05 PM, Adrian Alonso <aalonso@freescale.com> wrote:
> Allow mux_reg offset zero to be a valid pin_id, on imx7d
> mux_conf reg offset is zero for iomuxc-lspr controller
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2: Resend
> Changes for V3: Resend
> Changes for V4: Simplify pin_id assigment when ZERO_OFFSET_VALID is set
> Changes for V5:
> - Drop patch pinctrl: freescale: imx: add ZERO_OFFSET_VALID flag
> - Allow mux_reg ZERO OFFSET as pin_id
> Changes for V6: Restore ZERO_OFFSET_VALID flag
Patch applied with Shawn's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v6 4/6] pinctrl: freescale: imx: add shared input select reg support
2015-09-25 21:06 ` Adrian Alonso
@ 2015-10-02 21:39 ` Linus Walleij
-1 siblings, 0 replies; 26+ messages in thread
From: Linus Walleij @ 2015-10-02 21:39 UTC (permalink / raw)
To: Adrian Alonso
Cc: linux-arm-kernel, Shawn Guo, Shawn Guo, 李智,
linux-gpio, devicetree, Sascha Hauer, Rob Herring, Anson.Huang,
Frank Li, yibin.gong, nitin.garg
On Fri, Sep 25, 2015 at 2:06 PM, Adrian Alonso <aalonso@freescale.com> wrote:
> - Add shared input select register support
> - imx7d has two iomux controllers iomuxc and iomuxc-lpsr
> which share select_input register for daisy chain settings
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2: Resend
> Changes for V3:
> - Use of_parse_phandle instead of of_get_child_by_name to get input select
> base register address
> Changes for V4: Resend
> Changes for V5:
> - Remove SHARE_INPUT_SELECT_REG flag
> - Use fsl,input-sel to check if shared input select register support is used
> Changes for V6: Resend
Patch applied with Shawn's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v6 4/6] pinctrl: freescale: imx: add shared input select reg support
@ 2015-10-02 21:39 ` Linus Walleij
0 siblings, 0 replies; 26+ messages in thread
From: Linus Walleij @ 2015-10-02 21:39 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 25, 2015 at 2:06 PM, Adrian Alonso <aalonso@freescale.com> wrote:
> - Add shared input select register support
> - imx7d has two iomux controllers iomuxc and iomuxc-lpsr
> which share select_input register for daisy chain settings
>
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2: Resend
> Changes for V3:
> - Use of_parse_phandle instead of of_get_child_by_name to get input select
> base register address
> Changes for V4: Resend
> Changes for V5:
> - Remove SHARE_INPUT_SELECT_REG flag
> - Use fsl,input-sel to check if shared input select register support is used
> Changes for V6: Resend
Patch applied with Shawn's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 26+ messages in thread
end of thread, other threads:[~2015-10-02 21:39 UTC | newest]
Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-09-25 21:05 [PATCH v6 1/6] ARM: dts: imx: imx7d add iomuxc lpsr device node Adrian Alonso
2015-09-25 21:05 ` Adrian Alonso
2015-09-25 21:05 ` [PATCH v6 2/6] ARM: dts: imx: imx7d-sbd add iomuxc-lpsr hoggrp-2 pads Adrian Alonso
2015-09-25 21:05 ` Adrian Alonso
2015-09-26 0:38 ` Shawn Guo
2015-09-26 0:38 ` Shawn Guo
[not found] ` <1443215162-13716-1-git-send-email-aalonso-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2015-09-25 21:05 ` [PATCH v6 3/6] pinctrl: freescale: imx: allow mux_reg offset zero Adrian Alonso
2015-09-25 21:05 ` Adrian Alonso
2015-09-26 0:39 ` Shawn Guo
2015-09-26 0:39 ` Shawn Guo
2015-10-02 21:37 ` Linus Walleij
2015-10-02 21:37 ` Linus Walleij
2015-09-25 21:06 ` [PATCH v6 4/6] pinctrl: freescale: imx: add shared input select reg support Adrian Alonso
2015-09-25 21:06 ` Adrian Alonso
2015-10-02 21:39 ` Linus Walleij
2015-10-02 21:39 ` Linus Walleij
2015-09-25 21:06 ` [PATCH v6 5/6] pinctrl: freescale: imx7d: support iomux lpsr controller Adrian Alonso
2015-09-25 21:06 ` Adrian Alonso
2015-09-25 21:06 ` [PATCH v6 6/6] pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindings Adrian Alonso
2015-09-25 21:06 ` Adrian Alonso
2015-09-26 0:44 ` Shawn Guo
2015-09-26 0:44 ` Shawn Guo
2015-09-26 0:28 ` [PATCH v6 1/6] ARM: dts: imx: imx7d add iomuxc lpsr device node Shawn Guo
2015-09-26 0:28 ` Shawn Guo
2015-09-26 0:33 ` Shawn Guo
2015-09-26 0:33 ` Shawn Guo
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