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From: Boqun Feng <boqun.feng@gmail.com>
To: Will Deacon <will.deacon@arm.com>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@kernel.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Thomas Gleixner <tglx@linutronix.de>,
	"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
	Waiman Long <waiman.long@hp.com>,
	Davidlohr Bueso <dave@stgolabs.net>
Subject: Re: [PATCH v3 4/6] powerpc: atomic: Implement atomic{,64}_*_return_* variants
Date: Tue, 13 Oct 2015 21:35:54 +0800	[thread overview]
Message-ID: <20151013133554.GA23991@fixme-laptop.cn.ibm.com> (raw)
In-Reply-To: <20151013132132.GH21550@arm.com>

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On Tue, Oct 13, 2015 at 02:21:32PM +0100, Will Deacon wrote:
> On Mon, Oct 12, 2015 at 10:14:04PM +0800, Boqun Feng wrote:
[snip]
> > +/*
> > + * Since {add,sub}_return_relaxed and xchg_relaxed are implemented with
> > + * a "bne-" instruction at the end, so an isync is enough as a acquire barrier
> > + * on the platform without lwsync.
> > + */
> > +#ifdef CONFIG_SMP
> > +#define smp_acquire_barrier__after_atomic() \
> > +	__asm__ __volatile__(PPC_ACQUIRE_BARRIER : : : "memory")
> 
> I'm not keen on this barrier, as it sounds like it's part of the kernel
> memory model, as opposed to an implementation detail on PowerPC (and
> we've already got enough of that in the generic code ;).
> 

Indeed, but we still have smp_lwsync() ;-)

> Can you name it something different please (and maybe #undef it when
> you're done)?
> 

I've considered #undef it after used, but now I think open code this
into __atomic_op_acquire() of PPC is a better idea?


#define __atomic_op_acquire(op, args...)				\
({									\
	typeof(op##_relaxed(args)) __ret  = op##_relaxed(args);		\
	__asm__ __volatile__(PPC_ACQUIRE_BARRIER : : : "memory");	\
	__ret;								\
})

PPC_ACQUIRE_BARRIER will be empty if !SMP, so that will become a pure
compiler barrier and just what we need.

Regards,
Boqun

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WARNING: multiple messages have this Message-ID (diff)
From: Boqun Feng <boqun.feng@gmail.com>
To: Will Deacon <will.deacon@arm.com>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@kernel.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Thomas Gleixner <tglx@linutronix.de>,
	"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
	Waiman Long <waiman.long@hp.com>,
	Davidlohr Bueso <dave@stgolabs.net>
Subject: Re: [PATCH v3 4/6] powerpc: atomic: Implement atomic{, 64}_*_return_* variants
Date: Tue, 13 Oct 2015 21:35:54 +0800	[thread overview]
Message-ID: <20151013133554.GA23991@fixme-laptop.cn.ibm.com> (raw)
In-Reply-To: <20151013132132.GH21550@arm.com>

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On Tue, Oct 13, 2015 at 02:21:32PM +0100, Will Deacon wrote:
> On Mon, Oct 12, 2015 at 10:14:04PM +0800, Boqun Feng wrote:
[snip]
> > +/*
> > + * Since {add,sub}_return_relaxed and xchg_relaxed are implemented with
> > + * a "bne-" instruction at the end, so an isync is enough as a acquire barrier
> > + * on the platform without lwsync.
> > + */
> > +#ifdef CONFIG_SMP
> > +#define smp_acquire_barrier__after_atomic() \
> > +	__asm__ __volatile__(PPC_ACQUIRE_BARRIER : : : "memory")
> 
> I'm not keen on this barrier, as it sounds like it's part of the kernel
> memory model, as opposed to an implementation detail on PowerPC (and
> we've already got enough of that in the generic code ;).
> 

Indeed, but we still have smp_lwsync() ;-)

> Can you name it something different please (and maybe #undef it when
> you're done)?
> 

I've considered #undef it after used, but now I think open code this
into __atomic_op_acquire() of PPC is a better idea?


#define __atomic_op_acquire(op, args...)				\
({									\
	typeof(op##_relaxed(args)) __ret  = op##_relaxed(args);		\
	__asm__ __volatile__(PPC_ACQUIRE_BARRIER : : : "memory");	\
	__ret;								\
})

PPC_ACQUIRE_BARRIER will be empty if !SMP, so that will become a pure
compiler barrier and just what we need.

Regards,
Boqun

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  reply	other threads:[~2015-10-13 13:36 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-12 14:14 [PATCH v3 0/6] atomics: powerpc: Implement relaxed/acquire/release variants of some atomics Boqun Feng
2015-10-12 14:14 ` [PATCH v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier Boqun Feng
2015-10-12 14:23   ` Boqun Feng
2015-10-12 14:14 ` [PATCH v3 2/6] atomics: Add test for atomic operations with _relaxed variants Boqun Feng
     [not found]   ` <201510122205.Uu3yljqf%fengguang.wu@intel.com>
     [not found]     ` <20151012145652.GJ27351@fixme-laptop.cn.ibm.com>
2015-10-12 15:29       ` [lkp] " Fengguang Wu
2015-10-12 15:42         ` Boqun Feng
2015-10-12 16:02           ` [kbuild-all] " Fengguang Wu
2015-10-12 16:09             ` Fengguang Wu
2015-10-13  1:33             ` Boqun Feng
2015-10-12 14:14 ` [PATCH v3 3/6] atomics: Allow architectures to define their own __atomic_op_* helpers Boqun Feng
2015-10-12 14:14 ` [PATCH v3 4/6] powerpc: atomic: Implement atomic{,64}_*_return_* variants Boqun Feng
2015-10-12 14:14   ` [PATCH v3 4/6] powerpc: atomic: Implement atomic{, 64}_*_return_* variants Boqun Feng
2015-10-13 13:21   ` [PATCH v3 4/6] powerpc: atomic: Implement atomic{,64}_*_return_* variants Will Deacon
2015-10-13 13:21     ` [PATCH v3 4/6] powerpc: atomic: Implement atomic{, 64}_*_return_* variants Will Deacon
2015-10-13 13:35     ` Boqun Feng [this message]
2015-10-13 13:35       ` Boqun Feng
2015-10-14  1:00       ` [PATCH v3 4/6] powerpc: atomic: Implement atomic{,64}_*_return_* variants Boqun Feng
2015-10-14  1:00         ` [PATCH v3 4/6] powerpc: atomic: Implement atomic{, 64}_*_return_* variants Boqun Feng
2015-10-12 14:14 ` [PATCH v3 5/6] powerpc: atomic: Implement xchg_* and atomic{,64}_xchg_* variants Boqun Feng
2015-10-12 14:14   ` [PATCH v3 5/6] powerpc: atomic: Implement xchg_* and atomic{, 64}_xchg_* variants Boqun Feng
2015-10-12 14:14 ` [PATCH v3 6/6] powerpc: atomic: Implement cmpxchg{,64}_* and atomic{,64}_cmpxchg_* variants Boqun Feng
2015-10-12 14:14   ` [PATCH v3 6/6] powerpc: atomic: Implement cmpxchg{, 64}_* and atomic{, 64}_cmpxchg_* variants Boqun Feng
2015-10-13 13:24   ` [PATCH v3 6/6] powerpc: atomic: Implement cmpxchg{,64}_* and atomic{,64}_cmpxchg_* variants Will Deacon
2015-10-13 14:32     ` Boqun Feng
2015-10-13 14:43       ` Will Deacon
2015-10-13 14:58         ` Boqun Feng
2015-10-13 15:04           ` Will Deacon
2015-10-13 15:45             ` Boqun Feng
2015-10-14  1:47             ` Boqun Feng
2015-10-14  9:40               ` Will Deacon
2015-10-13 14:46       ` Boqun Feng
2015-10-12 14:30 ` [PATCH RESEND v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier Boqun Feng
2015-10-14  0:10   ` Michael Ellerman
2015-10-14  0:51     ` Boqun Feng
2015-10-14  8:06       ` Peter Zijlstra
2015-10-14  9:26         ` Boqun Feng
2015-10-14  9:33           ` Peter Zijlstra
2015-10-14  9:43             ` Michael Ellerman
2015-10-13 12:27 ` [PATCH v3 0/6] atomics: powerpc: Implement relaxed/acquire/release variants of some atomics Peter Zijlstra
2015-10-13 15:46   ` Paul E. McKenney

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