From: Jean-Francois Moine <moinejf@free.fr>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: "Jens Kuske" <jenskuske@gmail.com>,
devicetree@vger.kernel.org,
"Vishnu Patekar" <vishnupatekar0510@gmail.com>,
"Emilio López" <emilio@elopez.com.ar>,
"Michael Turquette" <mturquette@baylibre.com>,
linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org,
"Hans de Goede" <hdegoede@redhat.com>,
"Chen-Yu Tsai" <wens@csie.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Linus Walleij" <linus.walleij@linaro.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
Date: Thu, 22 Oct 2015 10:29:59 +0200 [thread overview]
Message-ID: <20151022102959.09f0a1f4@OPI2> (raw)
In-Reply-To: <20151022080508.GN10947@lukather>
On Thu, 22 Oct 2015 10:05:08 +0200
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> > + uart0: serial@01c28000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x01c28000 0x400>;
> > + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + clocks = <&bus_gates 112>;
> > + resets = <&bus_rst 208>;
>
> It's a bit weird that the clocks and reset indices don't match,
> usually they do.
>
> What's even weirder is that there's a 96 offset between the two (4 *
> 32), is this expected?
Yes, this is conform to the H3 documentation.
--
Ken ar c'hentañ | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
WARNING: multiple messages have this Message-ID (diff)
From: Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
To: Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: "Jens Kuske" <jenskuske-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
"Vishnu Patekar"
<vishnupatekar0510-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"Emilio López" <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
"Michael Turquette"
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
"Hans de Goede"
<hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
"Chen-Yu Tsai" <wens-jdAy2FN1RRM@public.gmane.org>,
"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"Philipp Zabel" <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
"Linus Walleij"
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
Date: Thu, 22 Oct 2015 10:29:59 +0200 [thread overview]
Message-ID: <20151022102959.09f0a1f4@OPI2> (raw)
In-Reply-To: <20151022080508.GN10947@lukather>
On Thu, 22 Oct 2015 10:05:08 +0200
Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> > + uart0: serial@01c28000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x01c28000 0x400>;
> > + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + clocks = <&bus_gates 112>;
> > + resets = <&bus_rst 208>;
>
> It's a bit weird that the clocks and reset indices don't match,
> usually they do.
>
> What's even weirder is that there's a 96 offset between the two (4 *
> 32), is this expected?
Yes, this is conform to the H3 documentation.
--
Ken ar c'hentañ | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: moinejf@free.fr (Jean-Francois Moine)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI
Date: Thu, 22 Oct 2015 10:29:59 +0200 [thread overview]
Message-ID: <20151022102959.09f0a1f4@OPI2> (raw)
In-Reply-To: <20151022080508.GN10947@lukather>
On Thu, 22 Oct 2015 10:05:08 +0200
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> > + uart0: serial at 01c28000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x01c28000 0x400>;
> > + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + clocks = <&bus_gates 112>;
> > + resets = <&bus_rst 208>;
>
> It's a bit weird that the clocks and reset indices don't match,
> usually they do.
>
> What's even weirder is that there's a 96 offset between the two (4 *
> 32), is this expected?
Yes, this is conform to the H3 documentation.
--
Ken ar c'henta? | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
next prev parent reply other threads:[~2015-10-22 8:30 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-21 16:20 [PATCH 4/6] reset: sunxi: Add compatible for Allwinner H3 bus resets Jens Kuske
2015-10-21 16:20 ` Jens Kuske
2015-10-21 16:20 ` Jens Kuske
2015-10-21 16:20 ` [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI Jens Kuske
2015-10-21 16:20 ` Jens Kuske
2015-10-21 16:20 ` Jens Kuske
2015-10-22 8:05 ` Maxime Ripard
2015-10-22 8:05 ` Maxime Ripard
2015-10-22 8:05 ` Maxime Ripard
2015-10-22 8:29 ` Jean-Francois Moine [this message]
2015-10-22 8:29 ` Jean-Francois Moine
2015-10-22 8:29 ` Jean-Francois Moine
2015-10-22 8:47 ` Maxime Ripard
2015-10-22 8:47 ` Maxime Ripard
2015-10-22 8:47 ` Maxime Ripard
2015-10-22 8:57 ` Jean-Francois Moine
2015-10-22 8:57 ` Jean-Francois Moine
2015-10-22 8:57 ` Jean-Francois Moine
2015-10-22 9:14 ` Maxime Ripard
2015-10-22 9:14 ` Maxime Ripard
2015-10-22 9:14 ` Maxime Ripard
2015-10-22 11:30 ` Jens Kuske
2015-10-22 11:30 ` Jens Kuske
2015-10-22 11:30 ` Jens Kuske
2015-10-23 18:09 ` Maxime Ripard
2015-10-23 18:09 ` Maxime Ripard
2015-10-23 18:09 ` Maxime Ripard
2015-10-22 17:30 ` Jean-Francois Moine
2015-10-22 17:30 ` Jean-Francois Moine
2015-10-22 17:30 ` Jean-Francois Moine
2015-10-23 18:14 ` Maxime Ripard
2015-10-23 18:14 ` Maxime Ripard
2015-10-23 18:14 ` Maxime Ripard
2015-10-23 19:20 ` Jean-Francois Moine
2015-10-23 19:20 ` Jean-Francois Moine
2015-10-23 19:20 ` Jean-Francois Moine
2015-10-24 7:13 ` Maxime Ripard
2015-10-24 7:13 ` Maxime Ripard
2015-10-24 7:13 ` Maxime Ripard
2015-10-24 8:47 ` Jean-Francois Moine
2015-10-24 8:47 ` Jean-Francois Moine
2015-10-24 8:47 ` Jean-Francois Moine
2015-10-26 21:06 ` Maxime Ripard
2015-10-26 21:06 ` Maxime Ripard
2015-10-26 21:06 ` Maxime Ripard
2015-10-27 8:12 ` [linux-sunxi] " Hans de Goede
2015-10-27 8:12 ` Hans de Goede
2015-10-27 8:12 ` Hans de Goede
2015-10-24 8:39 ` [linux-sunxi] " Hans de Goede
2015-10-24 8:39 ` Hans de Goede
2015-10-24 8:39 ` Hans de Goede
2015-10-26 21:00 ` [linux-sunxi] " Maxime Ripard
2015-10-26 21:00 ` Maxime Ripard
2015-10-26 21:00 ` Maxime Ripard
2015-10-21 16:20 ` [PATCH 6/6] ARM: dts: sun8i: Add Orange Pi Plus support Jens Kuske
2015-10-21 16:20 ` Jens Kuske
2015-10-21 16:20 ` Jens Kuske
2015-10-22 7:58 ` [PATCH 4/6] reset: sunxi: Add compatible for Allwinner H3 bus resets Maxime Ripard
2015-10-22 7:58 ` Maxime Ripard
2015-10-22 7:58 ` Maxime Ripard
2015-10-27 16:54 ` Jens Kuske
2015-10-27 16:54 ` Jens Kuske
2015-10-27 16:54 ` Jens Kuske
-- strict thread matches above, loose matches on Subject: below --
2015-05-06 9:31 [PATCH 0/6] ARM: sunxi: Introduce Allwinner H3 support Jens Kuske
2015-05-06 9:31 ` [PATCH 5/6] ARM: dts: sunxi: Add Allwinner H3 DTSI Jens Kuske
2015-05-06 9:31 ` Jens Kuske
2015-05-06 9:31 ` Jens Kuske
2015-05-06 12:19 ` Maxime Ripard
2015-05-06 12:19 ` Maxime Ripard
2015-05-06 12:19 ` Maxime Ripard
2015-05-06 20:47 ` Jens Kuske
2015-05-06 20:47 ` Jens Kuske
2015-05-06 20:47 ` Jens Kuske
2015-05-09 11:44 ` Maxime Ripard
2015-05-09 11:44 ` Maxime Ripard
2015-05-09 11:44 ` Maxime Ripard
2015-05-11 8:11 ` Chen-Yu Tsai
2015-05-11 8:11 ` Chen-Yu Tsai
2015-05-11 8:11 ` Chen-Yu Tsai
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20151022102959.09f0a1f4@OPI2 \
--to=moinejf@free.fr \
--cc=devicetree@vger.kernel.org \
--cc=emilio@elopez.com.ar \
--cc=hdegoede@redhat.com \
--cc=jenskuske@gmail.com \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sunxi@googlegroups.com \
--cc=maxime.ripard@free-electrons.com \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=vishnupatekar0510@gmail.com \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.