[PATCH 0/2] mtd: spi-nor: add new device MT35X

[PATCH 0/2] mtd: spi-nor: add new device MT35X

[Karl Zhang]

Micron has announced a new SPI NOR device MT35X (XTRMFlash).
This device's manufacturer ID is using 2Ch which arranged by
JEDEC. The 20h is also Micron's ID due to the history.

This new device support high speed I/O interface. The clock
frequency could up to 200 MHz (MAX) in DDR (400 MB/s) with
DQS. The device bus width could be 1 or 8, and it's default
width is configurable.

Karl Zhang (2):
  mtd: spi-nor: add Manufacturer ID for Micron
  mtd: spi-nor: add new device MT35X

 drivers/mtd/devices/m25p80.c  | 1 +
 drivers/mtd/spi-nor/spi-nor.c | 2 ++
 include/linux/mtd/cfi.h       | 1 +
 include/linux/mtd/spi-nor.h   | 2 ++
 4 files changed, 6 insertions(+)

-- 
1.9.1

[PATCH 1/2] mtd: spi-nor: add Manufacturer ID for Micron

[Karl Zhang]

Micron Manufacturer ID assigned by JEDEC is 2Ch.
Add this ID, for new Spi NOR from Micron.

ST's ID(20h) is Micron due to the history.

Signed-off-by: Karl Zhang <karlzhang@micron.com>
---
 include/linux/mtd/cfi.h     | 1 +
 include/linux/mtd/spi-nor.h | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index 9b57a9b..cbf7716 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -377,6 +377,7 @@ struct cfi_fixup {
 #define CFI_MFR_SHARP		0x00B0
 #define CFI_MFR_SST		0x00BF
 #define CFI_MFR_ST		0x0020 /* STMicroelectronics */
+#define CFI_MFR_MICRON		0x002C /* Micron */
 #define CFI_MFR_TOSHIBA		0x0098
 #define CFI_MFR_WINBOND		0x00DA
 
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index fac3f6f..b858e93 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -22,6 +22,8 @@
  */
 #define SNOR_MFR_ATMEL		CFI_MFR_ATMEL
 #define SNOR_MFR_INTEL		CFI_MFR_INTEL
+/* Micron Manufacturer ID assigned by JEDEC */
+#define SNOR_MFR_MICRON_JEDEC	CFI_MFR_MICRON
 #define SNOR_MFR_MICRON		CFI_MFR_ST /* ST Micro <--> Micron */
 #define SNOR_MFR_MACRONIX	CFI_MFR_MACRONIX
 #define SNOR_MFR_SPANSION	CFI_MFR_AMD
-- 
1.9.1

[PATCH 2/2] mtd: spi-nor: add new device MT35X

[Karl Zhang]

Micron has announced a new SPI NOR device MT35X(XTRMFlash).
The device can support x1 or x8 bus I/O for high speed.

This patch is purpose to add MT35X into the arch, only
extended mode (x1) was enabled. Octal mode I/O will be done
in the futrue.

Signed-off-by: Karl Zhang <karlzhang@micron.com>
---
 drivers/mtd/devices/m25p80.c  | 1 +
 drivers/mtd/spi-nor/spi-nor.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index c9c3b7f..e57d391 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -259,6 +259,7 @@ static const struct spi_device_id m25p_ids[] = {
 	{"mx25l4005a"},	{"mx25l1606e"},	{"mx25l6405d"},	{"mx25l12805d"},
 	{"mx25l25635e"},{"mx66l51235l"},
 	{"n25q064"},	{"n25q128a11"},	{"n25q128a13"},	{"n25q512a"},
+	{"mt35x512"},
 	{"s25fl256s1"},	{"s25fl512s"},	{"s25sl12801"},	{"s25fl008k"},
 	{"s25fl064k"},
 	{"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 3b2460e..34686b5 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -192,6 +192,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info,
 
 	switch (JEDEC_MFR(info)) {
 	case SNOR_MFR_MICRON:
+	case SNOR_MFR_MICRON_JEDEC:
 		/* Some Micron need WREN command; all will accept it */
 		need_wren = true;
 	case SNOR_MFR_MACRONIX:
@@ -756,6 +757,7 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+	{ "mt35x512",    INFO(0x2c5b1a, 0, 128 * 1024, 512, SECT_4K | USE_FSR) },
 
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
-- 
1.9.1

Re: [PATCH 1/2] mtd: spi-nor: add Manufacturer ID for Micron

[Brian Norris]

On Thu, Dec 10, 2015 at 01:58:59AM +0000, Karl Zhang wrote:
> Micron Manufacturer ID assigned by JEDEC is 2Ch.
> Add this ID, for new Spi NOR from Micron.
> 
> ST's ID(20h) is Micron due to the history.
> 
> Signed-off-by: Karl Zhang <karlzhang@micron.com>
> ---
>  include/linux/mtd/cfi.h     | 1 +
>  include/linux/mtd/spi-nor.h | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
> index 9b57a9b..cbf7716 100644
> --- a/include/linux/mtd/cfi.h
> +++ b/include/linux/mtd/cfi.h
> @@ -377,6 +377,7 @@ struct cfi_fixup {
>  #define CFI_MFR_SHARP		0x00B0
>  #define CFI_MFR_SST		0x00BF
>  #define CFI_MFR_ST		0x0020 /* STMicroelectronics */
> +#define CFI_MFR_MICRON		0x002C /* Micron */
>  #define CFI_MFR_TOSHIBA		0x0098
>  #define CFI_MFR_WINBOND		0x00DA
>  
> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> index fac3f6f..b858e93 100644
> --- a/include/linux/mtd/spi-nor.h
> +++ b/include/linux/mtd/spi-nor.h
> @@ -22,6 +22,8 @@
>   */
>  #define SNOR_MFR_ATMEL		CFI_MFR_ATMEL
>  #define SNOR_MFR_INTEL		CFI_MFR_INTEL
> +/* Micron Manufacturer ID assigned by JEDEC */
> +#define SNOR_MFR_MICRON_JEDEC	CFI_MFR_MICRON

Is this the ID Micron is going to use going forward?

Brian

>  #define SNOR_MFR_MICRON		CFI_MFR_ST /* ST Micro <--> Micron */
>  #define SNOR_MFR_MACRONIX	CFI_MFR_MACRONIX
>  #define SNOR_MFR_SPANSION	CFI_MFR_AMD
> -- 
> 1.9.1
> 

Re: [PATCH 0/2] mtd: spi-nor: add new device MT35X

[Brian Norris]

On Thu, Dec 10, 2015 at 01:58:58AM +0000, Karl Zhang wrote:
> Micron has announced a new SPI NOR device MT35X (XTRMFlash).

Announced? Do you have a flash sample? Did you test?

Brian

> This device's manufacturer ID is using 2Ch which arranged by
> JEDEC. The 20h is also Micron's ID due to the history.
> 
> This new device support high speed I/O interface. The clock
> frequency could up to 200 MHz (MAX) in DDR (400 MB/s) with
> DQS. The device bus width could be 1 or 8, and it's default
> width is configurable.
> 
> Karl Zhang (2):
>   mtd: spi-nor: add Manufacturer ID for Micron
>   mtd: spi-nor: add new device MT35X
> 
>  drivers/mtd/devices/m25p80.c  | 1 +
>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>  include/linux/mtd/cfi.h       | 1 +
>  include/linux/mtd/spi-nor.h   | 2 ++
>  4 files changed, 6 insertions(+)
> 
> -- 
> 1.9.1
> 

Re: [PATCH 2/2] mtd: spi-nor: add new device MT35X

[Brian Norris]

On Thu, Dec 10, 2015 at 01:59:00AM +0000, Karl Zhang wrote:
> Micron has announced a new SPI NOR device MT35X(XTRMFlash).
> The device can support x1 or x8 bus I/O for high speed.
> 
> This patch is purpose to add MT35X into the arch, only
> extended mode (x1) was enabled. Octal mode I/O will be done
> in the futrue.
> 
> Signed-off-by: Karl Zhang <karlzhang@micron.com>
> ---
>  drivers/mtd/devices/m25p80.c  | 1 +
>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
> index c9c3b7f..e57d391 100644
> --- a/drivers/mtd/devices/m25p80.c
> +++ b/drivers/mtd/devices/m25p80.c
> @@ -259,6 +259,7 @@ static const struct spi_device_id m25p_ids[] = {
>  	{"mx25l4005a"},	{"mx25l1606e"},	{"mx25l6405d"},	{"mx25l12805d"},
>  	{"mx25l25635e"},{"mx66l51235l"},
>  	{"n25q064"},	{"n25q128a11"},	{"n25q128a13"},	{"n25q512a"},
> +	{"mt35x512"},

Did you read the text above this array?

Brian

>  	{"s25fl256s1"},	{"s25fl512s"},	{"s25sl12801"},	{"s25fl008k"},
>  	{"s25fl064k"},
>  	{"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 3b2460e..34686b5 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -192,6 +192,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info,
>  
>  	switch (JEDEC_MFR(info)) {
>  	case SNOR_MFR_MICRON:
> +	case SNOR_MFR_MICRON_JEDEC:
>  		/* Some Micron need WREN command; all will accept it */
>  		need_wren = true;
>  	case SNOR_MFR_MACRONIX:
> @@ -756,6 +757,7 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>  	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>  	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
> +	{ "mt35x512",    INFO(0x2c5b1a, 0, 128 * 1024, 512, SECT_4K | USE_FSR) },
>  
>  	/* PMC */
>  	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
> -- 
> 1.9.1
> 

RE: [PATCH 2/2] mtd: spi-nor: add new device MT35X

[Bean Huo 霍斌斌 (beanhuo)]

> > This patch is purpose to add MT35X into the arch, only extended mode
> > (x1) was enabled. Octal mode I/O will be done in the futrue.
> >
> > Signed-off-by: Karl Zhang <karlzhang@micron.com>
> > ---
> >  drivers/mtd/devices/m25p80.c  | 1 +
> >  drivers/mtd/spi-nor/spi-nor.c | 2 ++
> >  2 files changed, 3 insertions(+)
> >
> > diff --git a/drivers/mtd/devices/m25p80.c
> > b/drivers/mtd/devices/m25p80.c index c9c3b7f..e57d391 100644
> > --- a/drivers/mtd/devices/m25p80.c
> > +++ b/drivers/mtd/devices/m25p80.c
> > @@ -259,6 +259,7 @@ static const struct spi_device_id m25p_ids[] = {
> >  	{"mx25l4005a"},	{"mx25l1606e"},	{"mx25l6405d"},
> 	{"mx25l12805d"},
> >  	{"mx25l25635e"},{"mx66l51235l"},
> >  	{"n25q064"},	{"n25q128a11"},	{"n25q128a13"},	{"n25q512a"},
> > +	{"mt35x512"},
> 
> Did you read the text above this array?
> 
> Brian
Karl , I think, you can remove this item in your next version patch.

> >  	{"s25fl256s1"},	{"s25fl512s"},	{"s25sl12801"},	{"s25fl008k"},
> >  	{"s25fl064k"},
> >  	{"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
> > diff --git a/drivers/mtd/spi-nor/spi-nor.c
> > b/drivers/mtd/spi-nor/spi-nor.c index 3b2460e..34686b5 100644
> > --- a/drivers/mtd/spi-nor/spi-nor.c
> > +++ b/drivers/mtd/spi-nor/spi-nor.c
> > @@ -192,6 +192,7 @@ static inline int set_4byte(struct spi_nor *nor,
> > const struct flash_info *info,
> >
> >  	switch (JEDEC_MFR(info)) {
> >  	case SNOR_MFR_MICRON:
> > +	case SNOR_MFR_MICRON_JEDEC:
> >  		/* Some Micron need WREN command; all will accept it */
> >  		need_wren = true;
> >  	case SNOR_MFR_MACRONIX:
> > @@ -756,6 +757,7 @@ static const struct flash_info spi_nor_ids[] = {
> >  	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K |
> USE_FSR | SPI_NOR_QUAD_READ) },
> >  	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K |
> USE_FSR | SPI_NOR_QUAD_READ) },
> >  	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K |
> USE_FSR | SPI_NOR_QUAD_READ) },
> > +	{ "mt35x512",    INFO(0x2c5b1a, 0, 128 * 1024, 512, SECT_4K |
> USE_FSR) },
> >
> >  	/* PMC */
> >  	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
> > --
> > 1.9.1
> >

RE: [PATCH 2/2] mtd: spi-nor: add new device MT35X

[Karl Zhang 张双锣 (karlzhang)]

> -----Original Message-----
> From: Bean Huo 霍斌斌 (beanhuo)
> Sent: Thursday, December 10, 2015 10:49 AM
> To: Brian Norris; Karl Zhang
> Cc: dwmw2@infradead.org; linux-mtd@lists.infradead.org; Peter Pan 潘栋
> (peterpandong); Zoltan Szubbocsev (zszubbocsev); Karl Zhang 张双锣
> (karlzhang)
> Subject: RE: [PATCH 2/2] mtd: spi-nor: add new device MT35X
> 
> > > This patch is purpose to add MT35X into the arch, only extended mode
> > > (x1) was enabled. Octal mode I/O will be done in the futrue.
> > >
> > > Signed-off-by: Karl Zhang <karlzhang@micron.com>
> > > ---
> > >  drivers/mtd/devices/m25p80.c  | 1 +  drivers/mtd/spi-nor/spi-nor.c
> > > | 2 ++
> > >  2 files changed, 3 insertions(+)
> > >
> > > diff --git a/drivers/mtd/devices/m25p80.c
> > > b/drivers/mtd/devices/m25p80.c index c9c3b7f..e57d391 100644
> > > --- a/drivers/mtd/devices/m25p80.c
> > > +++ b/drivers/mtd/devices/m25p80.c
> > > @@ -259,6 +259,7 @@ static const struct spi_device_id m25p_ids[] = {
> > >  	{"mx25l4005a"},	{"mx25l1606e"},	{"mx25l6405d"},
> > 	{"mx25l12805d"},
> > >  	{"mx25l25635e"},{"mx66l51235l"},
> > >  	{"n25q064"},	{"n25q128a11"},	{"n25q128a13"},
> 	{"n25q512a"},
> > > +	{"mt35x512"},
> >
> > Did you read the text above this array?
> >
> > Brian
> Karl , I think, you can remove this item in your next version patch.

Ok, I will remove this line later, sorry for my mistake.

> > >  	{"s25fl256s1"},	{"s25fl512s"},	{"s25sl12801"},	{"s25fl008k"},
> > >  	{"s25fl064k"},
> > >  	{"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
> > > diff --git a/drivers/mtd/spi-nor/spi-nor.c
> > > b/drivers/mtd/spi-nor/spi-nor.c index 3b2460e..34686b5 100644
> > > --- a/drivers/mtd/spi-nor/spi-nor.c
> > > +++ b/drivers/mtd/spi-nor/spi-nor.c
> > > @@ -192,6 +192,7 @@ static inline int set_4byte(struct spi_nor *nor,
> > > const struct flash_info *info,
> > >
> > >  	switch (JEDEC_MFR(info)) {
> > >  	case SNOR_MFR_MICRON:
> > > +	case SNOR_MFR_MICRON_JEDEC:
> > >  		/* Some Micron need WREN command; all will accept it */
> > >  		need_wren = true;
> > >  	case SNOR_MFR_MACRONIX:
> > > @@ -756,6 +757,7 @@ static const struct flash_info spi_nor_ids[] = {
> > >  	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K |
> > USE_FSR | SPI_NOR_QUAD_READ) },
> > >  	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K |
> > USE_FSR | SPI_NOR_QUAD_READ) },
> > >  	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K |
> > USE_FSR | SPI_NOR_QUAD_READ) },
> > > +	{ "mt35x512",    INFO(0x2c5b1a, 0, 128 * 1024, 512, SECT_4K |
> > USE_FSR) },
> > >
> > >  	/* PMC */
> > >  	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
> > > --
> > > 1.9.1
> > >

RE: [PATCH 1/2] mtd: spi-nor: add Manufacturer ID for Micron

[Karl Zhang 张双锣 (karlzhang)]

> -----Original Message-----
> From: Brian Norris [mailto:computersforpeace@gmail.com]
> Sent: Thursday, December 10, 2015 10:45 AM
> To: Karl Zhang
> Cc: dwmw2@infradead.org; linux-mtd@lists.infradead.org; Peter Pan 潘栋
> (peterpandong); Bean Huo 霍斌斌 (beanhuo); Zoltan Szubbocsev
> (zszubbocsev); Karl Zhang 张双锣 (karlzhang)
> Subject: Re: [PATCH 1/2] mtd: spi-nor: add Manufacturer ID for Micron
> 
> On Thu, Dec 10, 2015 at 01:58:59AM +0000, Karl Zhang wrote:
> > Micron Manufacturer ID assigned by JEDEC is 2Ch.
> > Add this ID, for new Spi NOR from Micron.
> >
> > ST's ID(20h) is Micron due to the history.
> >
> > Signed-off-by: Karl Zhang <karlzhang@micron.com>
> > ---
> >  include/linux/mtd/cfi.h     | 1 +
> >  include/linux/mtd/spi-nor.h | 2 ++
> >  2 files changed, 3 insertions(+)
> >
> > diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index
> > 9b57a9b..cbf7716 100644
> > --- a/include/linux/mtd/cfi.h
> > +++ b/include/linux/mtd/cfi.h
> > @@ -377,6 +377,7 @@ struct cfi_fixup {
> >  #define CFI_MFR_SHARP		0x00B0
> >  #define CFI_MFR_SST		0x00BF
> >  #define CFI_MFR_ST		0x0020 /* STMicroelectronics */
> > +#define CFI_MFR_MICRON		0x002C /* Micron */
> >  #define CFI_MFR_TOSHIBA		0x0098
> >  #define CFI_MFR_WINBOND		0x00DA
> >
> > diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> > index fac3f6f..b858e93 100644
> > --- a/include/linux/mtd/spi-nor.h
> > +++ b/include/linux/mtd/spi-nor.h
> > @@ -22,6 +22,8 @@
> >   */
> >  #define SNOR_MFR_ATMEL		CFI_MFR_ATMEL
> >  #define SNOR_MFR_INTEL		CFI_MFR_INTEL
> > +/* Micron Manufacturer ID assigned by JEDEC */
> > +#define SNOR_MFR_MICRON_JEDEC	CFI_MFR_MICRON
> 
> Is this the ID Micron is going to use going forward?
> 
> Brian
> 
The old products is using 0x20, but new product will going to use 0x2C.
Both of them are Micron.

Karl

> >  #define SNOR_MFR_MICRON		CFI_MFR_ST /* ST Micro <-->
> Micron */
> >  #define SNOR_MFR_MACRONIX	CFI_MFR_MACRONIX
> >  #define SNOR_MFR_SPANSION	CFI_MFR_AMD
> > --
> > 1.9.1
> >

RE: [PATCH 0/2] mtd: spi-nor: add new device MT35X

[Karl Zhang 张双锣 (karlzhang)]

> > Micron has announced a new SPI NOR device MT35X (XTRMFlash).
> 
> Announced? Do you have a flash sample? Did you test?
> 
> Brian
> 
Yes, we have samples, and tested it with SPI x1 I/O.

Karl

> > This device's manufacturer ID is using 2Ch which arranged by JEDEC.
> > The 20h is also Micron's ID due to the history.
> >
> > This new device support high speed I/O interface. The clock frequency
> > could up to 200 MHz (MAX) in DDR (400 MB/s) with DQS. The device bus
> > width could be 1 or 8, and it's default width is configurable.
> >
> > Karl Zhang (2):
> >   mtd: spi-nor: add Manufacturer ID for Micron
> >   mtd: spi-nor: add new device MT35X
> >
> >  drivers/mtd/devices/m25p80.c  | 1 +
> >  drivers/mtd/spi-nor/spi-nor.c | 2 ++
> >  include/linux/mtd/cfi.h       | 1 +
> >  include/linux/mtd/spi-nor.h   | 2 ++
> >  4 files changed, 6 insertions(+)
> >
> > --
> > 1.9.1
> >
> 
> ______________________________________________________
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