* [PATCH 0/6] SATA for r8a7795, Salvator-X
@ 2015-12-14 15:42 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
This is an adaptation of the patch set from the BSP, adjusted to the new PFC
and MSTP clock models. Applied on top of renesas-drivers, this works great
for me.
CU
Uli
Kouei Abe (3):
arm64: dts: r8a7795: Add SATA controller node
arm64: dts: salvator-x: Enable SATA controller
arm64: defconfig: Add Renesas R-Car SATA driver for R-Car Gen3 SoCs
Takeshi Kihara (1):
pinctrl: sh-pfc: r8a7795: Add SATA support
Ulrich Hecht (2):
clk: shmobile: r8a7795: Add SATA0 clock
pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 11 ++++++++++
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++
arch/arm64/configs/defconfig | 1 +
drivers/clk/shmobile/r8a7795-cpg-mssr.c | 1 +
drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++++++++++++++++++++++
5 files changed, 45 insertions(+)
--
2.6.3
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH 1/6] clk: shmobile: r8a7795: Add SATA0 clock
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-14 15:42 ` Ulrich Hecht
-1 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
drivers/clk/shmobile/r8a7795-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
index 05479e6..ad4d9fd 100644
--- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
+++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
@@ -159,6 +159,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
DEF_MOD("gpio2", 910, R8A7795_CLK_CP),
DEF_MOD("gpio1", 911, R8A7795_CLK_CP),
DEF_MOD("gpio0", 912, R8A7795_CLK_CP),
+ DEF_MOD("sata0", 915, R8A7795_CLK_S3D2),
DEF_MOD("i2c6", 918, R8A7795_CLK_S3D2),
DEF_MOD("i2c5", 919, R8A7795_CLK_S3D2),
DEF_MOD("i2c4", 927, R8A7795_CLK_S3D2),
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH 1/6] clk: shmobile: r8a7795: Add SATA0 clock
@ 2015-12-14 15:42 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
drivers/clk/shmobile/r8a7795-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
index 05479e6..ad4d9fd 100644
--- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
+++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
@@ -159,6 +159,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
DEF_MOD("gpio2", 910, R8A7795_CLK_CP),
DEF_MOD("gpio1", 911, R8A7795_CLK_CP),
DEF_MOD("gpio0", 912, R8A7795_CLK_CP),
+ DEF_MOD("sata0", 915, R8A7795_CLK_S3D2),
DEF_MOD("i2c6", 918, R8A7795_CLK_S3D2),
DEF_MOD("i2c5", 919, R8A7795_CLK_S3D2),
DEF_MOD("i2c4", 927, R8A7795_CLK_S3D2),
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH 1/6] clk: shmobile: r8a7795: Add SATA0 clock
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-15 10:41 ` Geert Uytterhoeven
-1 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2015-12-15 10:41 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> ---
> drivers/clk/shmobile/r8a7795-cpg-mssr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> index 05479e6..ad4d9fd 100644
> --- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> +++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> @@ -159,6 +159,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
> DEF_MOD("gpio2", 910, R8A7795_CLK_CP),
> DEF_MOD("gpio1", 911, R8A7795_CLK_CP),
> DEF_MOD("gpio0", 912, R8A7795_CLK_CP),
> + DEF_MOD("sata0", 915, R8A7795_CLK_S3D2),
My datasheet says 815?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* [PATCH 1/6] clk: shmobile: r8a7795: Add SATA0 clock
@ 2015-12-15 10:41 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2015-12-15 10:41 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> ---
> drivers/clk/shmobile/r8a7795-cpg-mssr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/shmobile/r8a7795-cpg-mssr.c b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> index 05479e6..ad4d9fd 100644
> --- a/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> +++ b/drivers/clk/shmobile/r8a7795-cpg-mssr.c
> @@ -159,6 +159,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
> DEF_MOD("gpio2", 910, R8A7795_CLK_CP),
> DEF_MOD("gpio1", 911, R8A7795_CLK_CP),
> DEF_MOD("gpio0", 912, R8A7795_CLK_CP),
> + DEF_MOD("sata0", 915, R8A7795_CLK_S3D2),
My datasheet says 815?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH 2/6] arm64: dts: r8a7795: Add SATA controller node
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-14 15:42 ` Ulrich Hecht
-1 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Kouei Abe <kouei.abe.cp@renesas.com>
This adds SATA device node to r8a7795.dtsi.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
[uli: adjusted for new MSTP clock scheme]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index c018423..7d4707e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -972,5 +972,13 @@
};
};
};
+
+ sata: sata@ee300000 {
+ compatible = "renesas,sata-r8a7795";
+ reg = <0 0xee300000 0 0x1fff>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>;
+ status = "disabled";
+ };
};
};
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH 2/6] arm64: dts: r8a7795: Add SATA controller node
@ 2015-12-14 15:42 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Kouei Abe <kouei.abe.cp@renesas.com>
This adds SATA device node to r8a7795.dtsi.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
[uli: adjusted for new MSTP clock scheme]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index c018423..7d4707e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -972,5 +972,13 @@
};
};
};
+
+ sata: sata at ee300000 {
+ compatible = "renesas,sata-r8a7795";
+ reg = <0 0xee300000 0 0x1fff>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>;
+ status = "disabled";
+ };
};
};
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH 2/6] arm64: dts: r8a7795: Add SATA controller node
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-15 10:44 ` Geert Uytterhoeven
-1 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2015-12-15 10:44 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index c018423..7d4707e 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -972,5 +972,13 @@
> };
> };
> };
> +
> + sata: sata@ee300000 {
> + compatible = "renesas,sata-r8a7795";
> + reg = <0 0xee300000 0 0x1fff>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>;
My datasheet says 815.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* [PATCH 2/6] arm64: dts: r8a7795: Add SATA controller node
@ 2015-12-15 10:44 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2015-12-15 10:44 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index c018423..7d4707e 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -972,5 +972,13 @@
> };
> };
> };
> +
> + sata: sata at ee300000 {
> + compatible = "renesas,sata-r8a7795";
> + reg = <0 0xee300000 0 0x1fff>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>;
My datasheet says 815.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH 2/6] arm64: dts: r8a7795: Add SATA controller node
2015-12-15 10:44 ` Geert Uytterhoeven
@ 2015-12-15 11:21 ` Ulrich Hecht
-1 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-15 11:21 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Dec 15, 2015 at 11:44 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
> <ulrich.hecht+renesas@gmail.com> wrote:
>> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
>> index c018423..7d4707e 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
>> @@ -972,5 +972,13 @@
>> };
>> };
>> };
>> +
>> + sata: sata@ee300000 {
>> + compatible = "renesas,sata-r8a7795";
>> + reg = <0 0xee300000 0 0x1fff>;
>> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&cpg CPG_MOD 915>;
>
> My datasheet says 815.
So does the BSP, I must have misread that.
Simon, should I send an incremental patch for this one with v2?
CU
Uli
^ permalink raw reply [flat|nested] 30+ messages in thread* [PATCH 2/6] arm64: dts: r8a7795: Add SATA controller node
@ 2015-12-15 11:21 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-15 11:21 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Dec 15, 2015 at 11:44 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
> <ulrich.hecht+renesas@gmail.com> wrote:
>> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
>> index c018423..7d4707e 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
>> @@ -972,5 +972,13 @@
>> };
>> };
>> };
>> +
>> + sata: sata at ee300000 {
>> + compatible = "renesas,sata-r8a7795";
>> + reg = <0 0xee300000 0 0x1fff>;
>> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&cpg CPG_MOD 915>;
>
> My datasheet says 815.
So does the BSP, I must have misread that.
Simon, should I send an incremental patch for this one with v2?
CU
Uli
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH 2/6] arm64: dts: r8a7795: Add SATA controller node
2015-12-15 11:21 ` Ulrich Hecht
@ 2015-12-16 4:39 ` Simon Horman
-1 siblings, 0 replies; 30+ messages in thread
From: Simon Horman @ 2015-12-16 4:39 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Dec 15, 2015 at 12:21:16PM +0100, Ulrich Hecht wrote:
> On Tue, Dec 15, 2015 at 11:44 AM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
> > On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
> > <ulrich.hecht+renesas@gmail.com> wrote:
> >> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> >> index c018423..7d4707e 100644
> >> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> >> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> >> @@ -972,5 +972,13 @@
> >> };
> >> };
> >> };
> >> +
> >> + sata: sata@ee300000 {
> >> + compatible = "renesas,sata-r8a7795";
> >> + reg = <0 0xee300000 0 0x1fff>;
> >> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> >> + clocks = <&cpg CPG_MOD 915>;
> >
> > My datasheet says 815.
>
> So does the BSP, I must have misread that.
>
> Simon, should I send an incremental patch for this one with v2?
Please send an incremental patch, though I may well squash it into
what I already have queued up depending on when it arrives.
^ permalink raw reply [flat|nested] 30+ messages in thread* [PATCH 2/6] arm64: dts: r8a7795: Add SATA controller node
@ 2015-12-16 4:39 ` Simon Horman
0 siblings, 0 replies; 30+ messages in thread
From: Simon Horman @ 2015-12-16 4:39 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Dec 15, 2015 at 12:21:16PM +0100, Ulrich Hecht wrote:
> On Tue, Dec 15, 2015 at 11:44 AM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
> > On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
> > <ulrich.hecht+renesas@gmail.com> wrote:
> >> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> >> index c018423..7d4707e 100644
> >> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> >> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> >> @@ -972,5 +972,13 @@
> >> };
> >> };
> >> };
> >> +
> >> + sata: sata at ee300000 {
> >> + compatible = "renesas,sata-r8a7795";
> >> + reg = <0 0xee300000 0 0x1fff>;
> >> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> >> + clocks = <&cpg CPG_MOD 915>;
> >
> > My datasheet says 815.
>
> So does the BSP, I must have misread that.
>
> Simon, should I send an incremental patch for this one with v2?
Please send an incremental patch, though I may well squash it into
what I already have queued up depending on when it arrives.
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH 3/6] arm64: dts: salvator-x: Enable SATA controller
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-14 15:42 ` Ulrich Hecht
-1 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Kouei Abe <kouei.abe.cp@renesas.com>
This enables SATA device in r8a7795-salvator-x.dts.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 0c67442..297c9f0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -268,6 +268,10 @@
};
};
+&sata {
+ status = "okay";
+};
+
&ssi1 {
shared-pin;
};
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH 3/6] arm64: dts: salvator-x: Enable SATA controller
@ 2015-12-14 15:42 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Kouei Abe <kouei.abe.cp@renesas.com>
This enables SATA device in r8a7795-salvator-x.dts.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 0c67442..297c9f0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -268,6 +268,10 @@
};
};
+&sata {
+ status = "okay";
+};
+
&ssi1 {
shared-pin;
};
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 4/6] pinctrl: sh-pfc: r8a7795: Add SATA support
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-14 15:42 ` Ulrich Hecht
-1 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds SATA0 pinmux support to r8a7795 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: adjusted for new PFC driver]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 35e0172..d036c92 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -2492,6 +2492,22 @@ static const unsigned int msiof3_rxd_d_mux[] = {
MSIOF3_RXD_D_MARK,
};
+/* - SATA --------------------------------------------------------------------*/
+static const unsigned int sata0_devslp_a_pins[] = {
+ /* DEVSLP */
+ RCAR_GP_PIN(6, 16),
+};
+static const unsigned int sata0_devslp_a_mux[] = {
+ SATA_DEVSLP_A_MARK,
+};
+static const unsigned int sata0_devslp_b_pins[] = {
+ /* DEVSLP */
+ RCAR_GP_PIN(4, 6),
+};
+static const unsigned int sata0_devslp_b_mux[] = {
+ SATA_DEVSLP_B_MARK,
+};
+
/* - SCIF0 ------------------------------------------------------------------ */
static const unsigned int scif0_data_pins[] = {
/* RX, TX */
@@ -3020,6 +3036,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(msiof3_ss1_d),
SH_PFC_PIN_GROUP(msiof3_txd_d),
SH_PFC_PIN_GROUP(msiof3_rxd_d),
+ SH_PFC_PIN_GROUP(sata0_devslp_a),
+ SH_PFC_PIN_GROUP(sata0_devslp_b),
SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(scif0_clk),
SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -3267,6 +3285,11 @@ static const char * const msiof3_groups[] = {
"msiof3_rxd_d",
};
+static const char * const sata0_groups[] = {
+ "sata0_devslp_a",
+ "sata0_devslp_b",
+};
+
static const char * const scif0_groups[] = {
"scif0_data",
"scif0_clk",
@@ -3358,6 +3381,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(msiof1),
SH_PFC_FUNCTION(msiof2),
SH_PFC_FUNCTION(msiof3),
+ SH_PFC_FUNCTION(sata0),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif2),
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH 4/6] pinctrl: sh-pfc: r8a7795: Add SATA support
@ 2015-12-14 15:42 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
This patch adds SATA0 pinmux support to r8a7795 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: adjusted for new PFC driver]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 35e0172..d036c92 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -2492,6 +2492,22 @@ static const unsigned int msiof3_rxd_d_mux[] = {
MSIOF3_RXD_D_MARK,
};
+/* - SATA --------------------------------------------------------------------*/
+static const unsigned int sata0_devslp_a_pins[] = {
+ /* DEVSLP */
+ RCAR_GP_PIN(6, 16),
+};
+static const unsigned int sata0_devslp_a_mux[] = {
+ SATA_DEVSLP_A_MARK,
+};
+static const unsigned int sata0_devslp_b_pins[] = {
+ /* DEVSLP */
+ RCAR_GP_PIN(4, 6),
+};
+static const unsigned int sata0_devslp_b_mux[] = {
+ SATA_DEVSLP_B_MARK,
+};
+
/* - SCIF0 ------------------------------------------------------------------ */
static const unsigned int scif0_data_pins[] = {
/* RX, TX */
@@ -3020,6 +3036,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(msiof3_ss1_d),
SH_PFC_PIN_GROUP(msiof3_txd_d),
SH_PFC_PIN_GROUP(msiof3_rxd_d),
+ SH_PFC_PIN_GROUP(sata0_devslp_a),
+ SH_PFC_PIN_GROUP(sata0_devslp_b),
SH_PFC_PIN_GROUP(scif0_data),
SH_PFC_PIN_GROUP(scif0_clk),
SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -3267,6 +3285,11 @@ static const char * const msiof3_groups[] = {
"msiof3_rxd_d",
};
+static const char * const sata0_groups[] = {
+ "sata0_devslp_a",
+ "sata0_devslp_b",
+};
+
static const char * const scif0_groups[] = {
"scif0_data",
"scif0_clk",
@@ -3358,6 +3381,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(msiof1),
SH_PFC_FUNCTION(msiof2),
SH_PFC_FUNCTION(msiof3),
+ SH_PFC_FUNCTION(sata0),
SH_PFC_FUNCTION(scif0),
SH_PFC_FUNCTION(scif1),
SH_PFC_FUNCTION(scif2),
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH 4/6] pinctrl: sh-pfc: r8a7795: Add SATA support
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-16 9:55 ` Geert Uytterhoeven
-1 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2015-12-16 9:55 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> This patch adds SATA0 pinmux support to r8a7795 SoC.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [uli: adjusted for new PFC driver]
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Thanks, queued for v4.5.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* [PATCH 4/6] pinctrl: sh-pfc: r8a7795: Add SATA support
@ 2015-12-16 9:55 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2015-12-16 9:55 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> This patch adds SATA0 pinmux support to r8a7795 SoC.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> [uli: adjusted for new PFC driver]
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Thanks, queued for v4.5.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH 5/6] pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-14 15:42 ` Ulrich Hecht
-1 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 297c9f0..3d6c1e0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -140,6 +140,10 @@
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
+ sata0_pins: sata0 {
+ renesas,groups = "sata0_devslp_a";
+ renesas,function = "sata0";
+ };
scif1_pins: scif1 {
renesas,groups = "scif1_data_a", "scif1_ctrl";
renesas,function = "scif1";
@@ -269,6 +273,9 @@
};
&sata {
+ pinctrl-0 = <&sata0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH 5/6] pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
@ 2015-12-14 15:42 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 297c9f0..3d6c1e0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -140,6 +140,10 @@
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
+ sata0_pins: sata0 {
+ renesas,groups = "sata0_devslp_a";
+ renesas,function = "sata0";
+ };
scif1_pins: scif1 {
renesas,groups = "scif1_data_a", "scif1_ctrl";
renesas,function = "scif1";
@@ -269,6 +273,9 @@
};
&sata {
+ pinctrl-0 = <&sata0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH 5/6] pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-16 10:11 ` Geert Uytterhoeven
-1 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2015-12-16 10:11 UTC (permalink / raw)
To: linux-arm-kernel
Hi Ulrich,
On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> ---
> arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> index 297c9f0..3d6c1e0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> @@ -140,6 +140,10 @@
> pinctrl-0 = <&scif_clk_pins>;
> pinctrl-names = "default";
>
> + sata0_pins: sata0 {
> + renesas,groups = "sata0_devslp_a";
This pin is GP6_16, which is used for USB-OTG on Salvator-X, according to the
schematics?
It looks like the SATA DEVSLP feature is not used at all on Salvator-X.
Upon closer look, using the feature (on a board where the pin is connected)
would need a driver update, as the SATAEDEVSLPR register is not present on
R-Car Gen2, and thus not yet handled by the driver.
Hence I expect SATA to work fine without any pinctrl, and this patch should
just be dropped?
Can you please check? Thanks!
> + renesas,function = "sata0";
> + };
> scif1_pins: scif1 {
> renesas,groups = "scif1_data_a", "scif1_ctrl";
> renesas,function = "scif1";
> @@ -269,6 +273,9 @@
> };
>
> &sata {
> + pinctrl-0 = <&sata0_pins>;
> + pinctrl-names = "default";
> +
> status = "okay";
> };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* [PATCH 5/6] pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
@ 2015-12-16 10:11 ` Geert Uytterhoeven
0 siblings, 0 replies; 30+ messages in thread
From: Geert Uytterhoeven @ 2015-12-16 10:11 UTC (permalink / raw)
To: linux-arm-kernel
Hi Ulrich,
On Mon, Dec 14, 2015 at 4:42 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
> ---
> arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> index 297c9f0..3d6c1e0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> @@ -140,6 +140,10 @@
> pinctrl-0 = <&scif_clk_pins>;
> pinctrl-names = "default";
>
> + sata0_pins: sata0 {
> + renesas,groups = "sata0_devslp_a";
This pin is GP6_16, which is used for USB-OTG on Salvator-X, according to the
schematics?
It looks like the SATA DEVSLP feature is not used at all on Salvator-X.
Upon closer look, using the feature (on a board where the pin is connected)
would need a driver update, as the SATAEDEVSLPR register is not present on
R-Car Gen2, and thus not yet handled by the driver.
Hence I expect SATA to work fine without any pinctrl, and this patch should
just be dropped?
Can you please check? Thanks!
> + renesas,function = "sata0";
> + };
> scif1_pins: scif1 {
> renesas,groups = "scif1_data_a", "scif1_ctrl";
> renesas,function = "scif1";
> @@ -269,6 +273,9 @@
> };
>
> &sata {
> + pinctrl-0 = <&sata0_pins>;
> + pinctrl-names = "default";
> +
> status = "okay";
> };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH 5/6] pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
2015-12-16 10:11 ` Geert Uytterhoeven
@ 2015-12-16 10:23 ` Ulrich Hecht
-1 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-16 10:23 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 16, 2015 at 11:11 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hence I expect SATA to work fine without any pinctrl, and this patch should
> just be dropped?
>
> Can you please check? Thanks!
Works just fine without. I'll drop it.
CU
Uli
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH 5/6] pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
@ 2015-12-16 10:23 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-16 10:23 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 16, 2015 at 11:11 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> Hence I expect SATA to work fine without any pinctrl, and this patch should
> just be dropped?
>
> Can you please check? Thanks!
Works just fine without. I'll drop it.
CU
Uli
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH 6/6] arm64: defconfig: Add Renesas R-Car SATA driver for R-Car Gen3 SoCs
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-14 15:42 ` Ulrich Hecht
-1 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Kouei Abe <kouei.abe.cp@renesas.com>
This adds Renesas sata_rcar driver to defconfig.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index f239a2e..bdbe783 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -93,6 +93,7 @@ CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_CEVA=y
CONFIG_AHCI_XGENE=y
+CONFIG_SATA_RCAR=y
CONFIG_PATA_PLATFORM=y
CONFIG_PATA_OF_PLATFORM=y
CONFIG_NETDEVICES=y
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 6/6] arm64: defconfig: Add Renesas R-Car SATA driver for R-Car Gen3 SoCs
@ 2015-12-14 15:42 ` Ulrich Hecht
0 siblings, 0 replies; 30+ messages in thread
From: Ulrich Hecht @ 2015-12-14 15:42 UTC (permalink / raw)
To: linux-arm-kernel
From: Kouei Abe <kouei.abe.cp@renesas.com>
This adds Renesas sata_rcar driver to defconfig.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index f239a2e..bdbe783 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -93,6 +93,7 @@ CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_CEVA=y
CONFIG_AHCI_XGENE=y
+CONFIG_SATA_RCAR=y
CONFIG_PATA_PLATFORM=y
CONFIG_PATA_OF_PLATFORM=y
CONFIG_NETDEVICES=y
--
2.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH 0/6] SATA for r8a7795, Salvator-X
2015-12-14 15:42 ` Ulrich Hecht
@ 2015-12-15 4:22 ` Simon Horman
-1 siblings, 0 replies; 30+ messages in thread
From: Simon Horman @ 2015-12-15 4:22 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 14, 2015 at 04:42:32PM +0100, Ulrich Hecht wrote:
> Hi!
>
> This is an adaptation of the patch set from the BSP, adjusted to the new PFC
> and MSTP clock models. Applied on top of renesas-drivers, this works great
> for me.
>
> CU
> Uli
>
>
> Kouei Abe (3):
> arm64: dts: r8a7795: Add SATA controller node
> arm64: dts: salvator-x: Enable SATA controller
> arm64: defconfig: Add Renesas R-Car SATA driver for R-Car Gen3 SoCs
Thanks, I have queued up the above three arm64 patches for v4.5.
Please send incremental updates if changes need to be made.
The remaining patches, below, can probably be guided into next by Geert.
>
> Takeshi Kihara (1):
> pinctrl: sh-pfc: r8a7795: Add SATA support
>
> Ulrich Hecht (2):
> clk: shmobile: r8a7795: Add SATA0 clock
> pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
>
> arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 11 ++++++++++
> arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++
> arch/arm64/configs/defconfig | 1 +
> drivers/clk/shmobile/r8a7795-cpg-mssr.c | 1 +
> drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++++++++++++++++++++++
> 5 files changed, 45 insertions(+)
>
> --
> 2.6.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH 0/6] SATA for r8a7795, Salvator-X
@ 2015-12-15 4:22 ` Simon Horman
0 siblings, 0 replies; 30+ messages in thread
From: Simon Horman @ 2015-12-15 4:22 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 14, 2015 at 04:42:32PM +0100, Ulrich Hecht wrote:
> Hi!
>
> This is an adaptation of the patch set from the BSP, adjusted to the new PFC
> and MSTP clock models. Applied on top of renesas-drivers, this works great
> for me.
>
> CU
> Uli
>
>
> Kouei Abe (3):
> arm64: dts: r8a7795: Add SATA controller node
> arm64: dts: salvator-x: Enable SATA controller
> arm64: defconfig: Add Renesas R-Car SATA driver for R-Car Gen3 SoCs
Thanks, I have queued up the above three arm64 patches for v4.5.
Please send incremental updates if changes need to be made.
The remaining patches, below, can probably be guided into next by Geert.
>
> Takeshi Kihara (1):
> pinctrl: sh-pfc: r8a7795: Add SATA support
>
> Ulrich Hecht (2):
> clk: shmobile: r8a7795: Add SATA0 clock
> pinctrl: sh-pfc: r8a7795: add SATA0 pin conf to DT
>
> arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 11 ++++++++++
> arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++
> arch/arm64/configs/defconfig | 1 +
> drivers/clk/shmobile/r8a7795-cpg-mssr.c | 1 +
> drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 24 ++++++++++++++++++++++
> 5 files changed, 45 insertions(+)
>
> --
> 2.6.3
>
> --
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