From: Mark Rutland <mark.rutland@arm.com> To: Shannon Zhao <zhaoshenglong@huawei.com> Cc: kvmarm@lists.cs.columbia.edu, marc.zyngier@arm.com, christoffer.dall@linaro.org, kvm@vger.kernel.org, will.deacon@arm.com, linux-arm-kernel@lists.infradead.org, shannon.zhao@linaro.org Subject: Re: [PATCH v7 07/19] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Date: Thu, 17 Dec 2015 15:22:27 +0000 [thread overview] Message-ID: <20151217152054.GB11796@leverpostej> (raw) In-Reply-To: <1450169379-12336-8-git-send-email-zhaoshenglong@huawei.com> On Tue, Dec 15, 2015 at 04:49:27PM +0800, Shannon Zhao wrote: > From: Shannon Zhao <shannon.zhao@linaro.org> > > When we use tools like perf on host, perf passes the event type and the > id of this event type category to kernel, then kernel will map them to > hardware event number and write this number to PMU PMEVTYPER<n>_EL0 > register. When getting the event number in KVM, directly use raw event > type to create a perf_event for it. > > Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> > --- > arch/arm64/include/asm/pmu.h | 3 ++ > arch/arm64/kvm/Makefile | 1 + > include/kvm/arm_pmu.h | 11 ++++ > virt/kvm/arm/pmu.c | 122 +++++++++++++++++++++++++++++++++++++++++++ > 4 files changed, 137 insertions(+) > create mode 100644 virt/kvm/arm/pmu.c [...] > +/** > + * kvm_pmu_set_counter_event_type - set selected counter to monitor some event > + * @vcpu: The vcpu pointer > + * @data: The data guest writes to PMXEVTYPER_EL0 > + * @select_idx: The number of selected counter > + * > + * When OS accesses PMXEVTYPER_EL0, that means it wants to set a PMC to count an > + * event with given hardware event number. Here we call perf_event API to > + * emulate this action and create a kernel perf event for it. > + */ > +void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, > + u64 select_idx) > +{ > + struct kvm_pmu *pmu = &vcpu->arch.pmu; > + struct kvm_pmc *pmc = &pmu->pmc[select_idx]; > + struct perf_event *event; > + struct perf_event_attr attr; > + u64 eventsel, counter; > + > + kvm_pmu_stop_counter(vcpu, pmc); > + eventsel = data & ARMV8_EVTYPE_EVENT; > + > + memset(&attr, 0, sizeof(struct perf_event_attr)); > + attr.type = PERF_TYPE_RAW; > + attr.size = sizeof(attr); > + attr.pinned = 1; > + attr.disabled = kvm_pmu_counter_is_enabled(vcpu, select_idx); > + attr.exclude_user = data & ARMV8_EXCLUDE_EL0 ? 1 : 0; > + attr.exclude_kernel = data & ARMV8_EXCLUDE_EL1 ? 1 : 0; > + attr.exclude_hv = 1; /* Don't count EL2 events */ > + attr.exclude_host = 1; /* Don't count host events */ > + attr.config = eventsel; > + > + counter = kvm_pmu_get_counter_value(vcpu, select_idx); > + /* The initial sample period (overflow count) of an event. */ > + attr.sample_period = (-counter) & pmc->bitmask; > + > + event = perf_event_create_kernel_counter(&attr, -1, current, NULL, pmc); As far as I can see, this is going to result in unreliable counts on a big.LITTLE system, even if the VCPUs are constrained to one class of core. As this is a task-bound event (cpu == -1, task is current), the perf core will stop as soon as one PMU driver agrees to handle the event. The event will then only count on CPUs handled by that driver. If you're unlucky, the set of CPUs handled by that driver is not the same as the set of CPUs your VM is constrained to. e.g. your VM might be on little cores, but the big PMU driver accepted the event, and only counts on big cores. I'm not sure how we can solve that. Thanks, Mark. > + if (IS_ERR(event)) { > + printk_once("kvm: pmu event creation failed %ld\n", > + PTR_ERR(event)); > + return; > + } > + > + pmc->perf_event = event; > +} > -- > 2.0.4 > > > _______________________________________________ > kvmarm mailing list > kvmarm@lists.cs.columbia.edu > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm >
WARNING: multiple messages have this Message-ID (diff)
From: mark.rutland@arm.com (Mark Rutland) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 07/19] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Date: Thu, 17 Dec 2015 15:22:27 +0000 [thread overview] Message-ID: <20151217152054.GB11796@leverpostej> (raw) In-Reply-To: <1450169379-12336-8-git-send-email-zhaoshenglong@huawei.com> On Tue, Dec 15, 2015 at 04:49:27PM +0800, Shannon Zhao wrote: > From: Shannon Zhao <shannon.zhao@linaro.org> > > When we use tools like perf on host, perf passes the event type and the > id of this event type category to kernel, then kernel will map them to > hardware event number and write this number to PMU PMEVTYPER<n>_EL0 > register. When getting the event number in KVM, directly use raw event > type to create a perf_event for it. > > Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> > --- > arch/arm64/include/asm/pmu.h | 3 ++ > arch/arm64/kvm/Makefile | 1 + > include/kvm/arm_pmu.h | 11 ++++ > virt/kvm/arm/pmu.c | 122 +++++++++++++++++++++++++++++++++++++++++++ > 4 files changed, 137 insertions(+) > create mode 100644 virt/kvm/arm/pmu.c [...] > +/** > + * kvm_pmu_set_counter_event_type - set selected counter to monitor some event > + * @vcpu: The vcpu pointer > + * @data: The data guest writes to PMXEVTYPER_EL0 > + * @select_idx: The number of selected counter > + * > + * When OS accesses PMXEVTYPER_EL0, that means it wants to set a PMC to count an > + * event with given hardware event number. Here we call perf_event API to > + * emulate this action and create a kernel perf event for it. > + */ > +void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, > + u64 select_idx) > +{ > + struct kvm_pmu *pmu = &vcpu->arch.pmu; > + struct kvm_pmc *pmc = &pmu->pmc[select_idx]; > + struct perf_event *event; > + struct perf_event_attr attr; > + u64 eventsel, counter; > + > + kvm_pmu_stop_counter(vcpu, pmc); > + eventsel = data & ARMV8_EVTYPE_EVENT; > + > + memset(&attr, 0, sizeof(struct perf_event_attr)); > + attr.type = PERF_TYPE_RAW; > + attr.size = sizeof(attr); > + attr.pinned = 1; > + attr.disabled = kvm_pmu_counter_is_enabled(vcpu, select_idx); > + attr.exclude_user = data & ARMV8_EXCLUDE_EL0 ? 1 : 0; > + attr.exclude_kernel = data & ARMV8_EXCLUDE_EL1 ? 1 : 0; > + attr.exclude_hv = 1; /* Don't count EL2 events */ > + attr.exclude_host = 1; /* Don't count host events */ > + attr.config = eventsel; > + > + counter = kvm_pmu_get_counter_value(vcpu, select_idx); > + /* The initial sample period (overflow count) of an event. */ > + attr.sample_period = (-counter) & pmc->bitmask; > + > + event = perf_event_create_kernel_counter(&attr, -1, current, NULL, pmc); As far as I can see, this is going to result in unreliable counts on a big.LITTLE system, even if the VCPUs are constrained to one class of core. As this is a task-bound event (cpu == -1, task is current), the perf core will stop as soon as one PMU driver agrees to handle the event. The event will then only count on CPUs handled by that driver. If you're unlucky, the set of CPUs handled by that driver is not the same as the set of CPUs your VM is constrained to. e.g. your VM might be on little cores, but the big PMU driver accepted the event, and only counts on big cores. I'm not sure how we can solve that. Thanks, Mark. > + if (IS_ERR(event)) { > + printk_once("kvm: pmu event creation failed %ld\n", > + PTR_ERR(event)); > + return; > + } > + > + pmc->perf_event = event; > +} > -- > 2.0.4 > > > _______________________________________________ > kvmarm mailing list > kvmarm at lists.cs.columbia.edu > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm >
next prev parent reply other threads:[~2015-12-17 15:22 UTC|newest] Thread overview: 135+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-12-15 8:49 [PATCH v7 00/19] KVM: ARM64: Add guest PMU support Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 01/19] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 11:34 ` Marc Zyngier 2015-12-15 11:34 ` Marc Zyngier 2015-12-15 11:44 ` Shannon Zhao 2015-12-15 11:44 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 02/19] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 03/19] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 04/19] KVM: ARM64: Add access handler for PMCR register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 05/19] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 06/19] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 14:20 ` Marc Zyngier 2015-12-15 14:20 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 07/19] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-17 15:22 ` Mark Rutland [this message] 2015-12-17 15:22 ` Mark Rutland 2015-12-17 15:30 ` Marc Zyngier 2015-12-17 15:30 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 08/19] KVM: ARM64: Add access handler for event typer register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 13:43 ` Marc Zyngier 2015-12-15 13:43 ` Marc Zyngier 2015-12-15 14:26 ` Marc Zyngier 2015-12-15 14:26 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 09/19] KVM: ARM64: Add access handler for event counter register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 13:44 ` Marc Zyngier 2015-12-15 13:44 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 10/19] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 13:56 ` Marc Zyngier 2015-12-15 13:56 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 11/19] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 14:02 ` Marc Zyngier 2015-12-15 14:02 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 12/19] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 14:06 ` Marc Zyngier 2015-12-15 14:06 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 13/19] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 14:36 ` Marc Zyngier 2015-12-15 14:36 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 14/19] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 15/19] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 14:58 ` Marc Zyngier 2015-12-15 14:58 ` Marc Zyngier 2015-12-15 15:59 ` Shannon Zhao 2015-12-15 15:59 ` Shannon Zhao 2015-12-15 16:02 ` Marc Zyngier 2015-12-15 16:02 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 16/19] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 15:19 ` Marc Zyngier 2015-12-15 15:19 ` Marc Zyngier 2015-12-15 8:49 ` [PATCH v7 17/19] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 18/19] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` [PATCH v7 19/19] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 8:49 ` Shannon Zhao 2015-12-15 15:33 ` Marc Zyngier 2015-12-15 15:33 ` Marc Zyngier 2015-12-15 15:50 ` Shannon Zhao 2015-12-15 15:50 ` Shannon Zhao 2015-12-15 15:59 ` Marc Zyngier 2015-12-15 15:59 ` Marc Zyngier 2015-12-15 17:50 ` Andrew Jones 2015-12-15 17:50 ` Andrew Jones 2015-12-15 17:50 ` [Qemu-devel] " Andrew Jones 2015-12-15 20:47 ` Christoffer Dall 2015-12-15 20:47 ` Christoffer Dall 2015-12-16 7:31 ` Shannon Zhao 2015-12-16 7:31 ` Shannon Zhao 2015-12-16 7:31 ` Shannon Zhao 2015-12-16 8:06 ` Shannon Zhao 2015-12-16 8:06 ` Shannon Zhao 2015-12-16 9:04 ` Marc Zyngier 2015-12-16 9:04 ` Marc Zyngier 2015-12-16 9:29 ` Shannon Zhao 2015-12-16 9:29 ` Shannon Zhao 2015-12-16 9:29 ` Shannon Zhao 2015-12-16 20:33 ` Christoffer Dall 2015-12-16 20:33 ` Christoffer Dall 2015-12-17 7:22 ` Shannon Zhao 2015-12-17 7:22 ` Shannon Zhao 2015-12-17 7:22 ` Shannon Zhao 2015-12-17 8:33 ` Marc Zyngier 2015-12-17 8:33 ` Marc Zyngier 2015-12-17 8:33 ` Marc Zyngier 2015-12-17 8:41 ` Shannon Zhao 2015-12-17 8:41 ` Shannon Zhao 2015-12-17 8:41 ` Shannon Zhao 2015-12-17 9:38 ` Marc Zyngier 2015-12-17 9:38 ` Marc Zyngier 2015-12-17 10:10 ` Shannon Zhao 2015-12-17 10:10 ` Shannon Zhao 2015-12-17 10:10 ` Shannon Zhao 2015-12-17 10:38 ` Marc Zyngier 2015-12-17 10:38 ` Marc Zyngier 2015-12-18 10:00 ` Christoffer Dall 2015-12-18 10:00 ` Christoffer Dall 2015-12-15 15:41 ` [PATCH v7 00/19] KVM: ARM64: Add guest PMU support Marc Zyngier 2015-12-15 15:41 ` Marc Zyngier
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